diff --git a/hw1.t.v b/hw1.t.v
new file mode 100644
index 0000000..70dd750
--- /dev/null
+++ b/hw1.t.v
@@ -0,0 +1,27 @@
+`include "hw1.v"
+
+module demorgan_test ();
+
+  // Instantiate device/module under test
+  reg A, B;                // Primary test inputs
+  wire nA, nB, nAandnB;    // Test outputs
+
+  demorgan1 turnip(A, B, nA, nB, nAandnB);  // Module to be tested
+  demorgan2 potato(A, B, AorB, notAorB); 
+  demorgan3 leek(A, B, AxB, notAxB);  // Module to be tested
+  demorgan4 radish(A, B, nA, nB,  nAornB); 
+
+
+  // Run sequence of test stimuli
+  initial begin
+    $display("A B | ~A ~B|~A~B|~(A+B)|~(AB)|~A+~B");   // Prints header for truth table
+    A=0;B=0; #1                                 // Set A and B, wait for update (#1)
+    $display("%b %b | %b  %b |  %b  |  %b  |  %b  | %b", A,B, nA, nB, nAandnB, notAorB, notAxB, nAornB);
+    A=0;B=1; #1                                 // Set A and B, wait for new update
+    $display("%b %b | %b  %b |  %b  |  %b  |  %b  | %b", A,B, nA, nB, nAandnB, notAorB, notAxB, nAornB);
+    A=1;B=0; #1
+    $display("%b %b | %b  %b |  %b  |  %b  |  %b  | %b", A,B, nA, nB, nAandnB, notAorB, notAxB, nAornB);
+    A=1;B=1; #1
+    $display("%b %b | %b  %b |  %b  |  %b  |  %b  | %b", A,B, nA, nB, nAandnB, notAorB, notAxB, nAornB);
+  end
+endmodule    // End demorgan_test
diff --git a/hw1.v b/hw1.v
new file mode 100644
index 0000000..ad76cd0
--- /dev/null
+++ b/hw1.v
@@ -0,0 +1,57 @@
+module demorgan1
+(
+  input  A,          // Single bit inputs
+  input  B,
+  output nA,         // Output intermediate complemented inputs
+  output nB,
+  output nAandnB     // Single bit output, (~A)*(~B)
+);
+  wire nA;
+  wire nB;
+  not Ainv(nA, A);  	// Top inverter is named Ainv, takes A as input and produces nA
+  not Binv(nB, B);
+  and andgate(nAandnB, nA, nB); 	// AND gate produces nAandnB from nA and nB
+endmodule
+
+//////////////////////////////////////////////////////////////////////////////////
+module demorgan2
+(
+  input  A,          
+  input  B,
+  output AorB,         
+  output notAorB        // output final answer ~(A+B)
+);
+  wire AorB;
+  or orgate(AorB, A, B); 
+  not inv(notAorB, AorB);
+endmodule
+
+//////////////////////////////////////////////////////////////////////////////////
+module demorgan3
+(
+  input  A,          
+  input  B,
+  output AxB,	     
+  output notAxB     // output final answer ~(AB)
+);
+  wire AxB;
+  and andgate(AxB, A, B);   
+  not inv(notAxB, AxB);   
+endmodule
+
+//////////////////////////////////////////////////////////////////////////////////
+module demorgan4
+(
+  input  A,          
+  input  B,
+  output nA,         
+  output nB,
+  output nAornB     // output final answer (~A)+(~B)
+);
+  wire nA;
+  wire nB;
+  not Ainv(nA, A);  	
+  not Binv(nB, B);
+  or orgate(nAornB, nA, nB); 	
+endmodule
+
diff --git a/results.txt b/results.txt
new file mode 100644
index 0000000..2c2fd58
--- /dev/null
+++ b/results.txt
@@ -0,0 +1,6 @@
+A B | ~A ~B|~A~B|~(A+B)|~(AB)|~A+~B
+0 0 | 1  1 |  1  |  1  |  1  | 1
+0 1 | 1  0 |  0  |  0  |  1  | 1
+1 0 | 0  1 |  0  |  0  |  1  | 1
+1 1 | 0  0 |  0  |  0  |  0  | 0
+