diff --git a/hw1.t.v b/hw1.t.v
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+++ b/hw1.t.v
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+`include "hw1.v"
+
+module demorgan_test ();
+
+  // Instantiate device/module under test
+  reg A, B;                // Primary test inputs
+  wire nA, nB, nAandnB, AandB, nAB, nAornB, AorB, nAorB;    // Test outputs
+
+  demorgan dut(A, B, nA, nB, nAandnB, AandB, nAB, nAornB, AorB, nAorB);  // Module to be tested
+
+
+  // Run sequence of test stimuli
+  initial begin
+    $display("A B | ~A ~B | ~A~B ~(A+B) | ~(A*B) ~A+~B ");            // Prints header for truth table
+    A=0;B=0; #1                                 // Set A and B, wait for update (#1)
+    $display("%b %b |  %b  %b |   %b    %b    |    %b     %b   |", A,B, nA, nB, nAandnB, nAorB, nAB, nAornB);
+    A=0;B=1; #1                                 // Set A and B, wait for new update
+    $display("%b %b |  %b  %b |   %b    %b    |    %b     %b   |", A,B, nA, nB, nAandnB, nAorB, nAB, nAornB);
+    A=1;B=0; #1
+    $display("%b %b |  %b  %b |   %b    %b    |    %b     %b   |", A,B, nA, nB, nAandnB, nAorB, nAB, nAornB);
+    A=1;B=1; #1
+    $display("%b %b |  %b  %b |   %b    %b    |    %b     %b   |", A,B, nA, nB, nAandnB, nAorB, nAB, nAornB);
+  end
+endmodule    // End demorgan_test
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diff --git a/hw1.v b/hw1.v
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+++ b/hw1.v
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+// Homework 1 modules
+
+module demorgan
+( // notAndnot
+  input  A,          // Single bit inputs
+  input  B,
+  output nA,         // Output intermediate complemented inputs
+  output nB,
+  output nAandnB,    // Single bit output, (~A)*(~B)
+  output AandB,      // Single bit output, A*B
+  output nAB,        // ~(A*B)
+  output nAornB,     // ~A+~B
+  output AorB,       // A+B
+  output nAorB       // ~(A+B)
+);
+
+  wire nA;
+  wire nB;
+  wire AorB;
+  not Ainv(nA, A);  	// Top inverter is named Ainv, takes signal A as input and produces signal nA
+  not Binv(nB, B);
+  and andgate(nAandnB, nA, nB); 	// AND gate produces nAandnB from nA and nB
+  and andgate2(AandB, A, B);
+  not ABinv(nAB, AandB);
+  or orgate(nAornB, nA, nB);
+  or orgate2(AorB, A, B);
+  not AorBinv(nAorB, AorB);
+
+endmodule
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diff --git a/results.txt b/results.txt
new file mode 100644
index 0000000..d46cc09
--- /dev/null
+++ b/results.txt
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+// Homework 1 results
+// Kaitlyn Keil
+// CompArch Fall 2017
+
+A B | ~A ~B | ~A~B ~(A+B) | ~(A*B) ~A+~B 
+0 0 |  1  1 |   1    1    |    1     1   |
+0 1 |  1  0 |   0    0    |    1     1   |
+1 0 |  0  1 |   0    0    |    1     1   |
+1 1 |  0  0 |   0    0    |    0     0   |