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grossmjgrossmj
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Merge pull request #294 from GNS3/fix-nvram-extract-config
Revert "Remove force_align_arg_pointer function attribute."
2 parents a832799 + 491a1de commit 992acc6

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+38
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2 files changed

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‎stable/mips_mts.c

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -142,6 +142,7 @@ static void *MTS_PROTO(lookup)(cpu_mips_t *cpu,m_uint64_t vaddr)
142142
/* === MIPS Memory Operations ============================================= */
143143

144144
/* LB: Load Byte */
145+
__attribute__((force_align_arg_pointer))
145146
void MTS_PROTO(lb)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
146147
{
147148
m_uint64_t data;
@@ -153,6 +154,7 @@ void MTS_PROTO(lb)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
153154
}
154155

155156
/* LBU: Load Byte Unsigned */
157+
__attribute__((force_align_arg_pointer))
156158
void MTS_PROTO(lbu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
157159
{
158160
m_uint64_t data;
@@ -164,6 +166,7 @@ void MTS_PROTO(lbu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
164166
}
165167

166168
/* LH: Load Half-Word */
169+
__attribute__((force_align_arg_pointer))
167170
void MTS_PROTO(lh)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
168171
{
169172
m_uint64_t data;
@@ -175,6 +178,7 @@ void MTS_PROTO(lh)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
175178
}
176179

177180
/* LHU: Load Half-Word Unsigned */
181+
__attribute__((force_align_arg_pointer))
178182
void MTS_PROTO(lhu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
179183
{
180184
m_uint64_t data;
@@ -186,6 +190,7 @@ void MTS_PROTO(lhu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
186190
}
187191

188192
/* LW: Load Word */
193+
__attribute__((force_align_arg_pointer))
189194
void MTS_PROTO(lw)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
190195
{
191196
m_uint64_t data;
@@ -197,6 +202,7 @@ void MTS_PROTO(lw)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
197202
}
198203

199204
/* LWU: Load Word Unsigned */
205+
__attribute__((force_align_arg_pointer))
200206
void MTS_PROTO(lwu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
201207
{
202208
m_uint64_t data;
@@ -208,6 +214,7 @@ void MTS_PROTO(lwu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
208214
}
209215

210216
/* LD: Load Double-Word */
217+
__attribute__((force_align_arg_pointer))
211218
void MTS_PROTO(ld)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
212219
{
213220
m_uint64_t data;
@@ -219,6 +226,7 @@ void MTS_PROTO(ld)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
219226
}
220227

221228
/* SB: Store Byte */
229+
__attribute__((force_align_arg_pointer))
222230
void MTS_PROTO(sb)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
223231
{
224232
m_uint64_t data;
@@ -230,6 +238,7 @@ void MTS_PROTO(sb)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
230238
}
231239

232240
/* SH: Store Half-Word */
241+
__attribute__((force_align_arg_pointer))
233242
void MTS_PROTO(sh)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
234243
{
235244
m_uint64_t data;
@@ -241,6 +250,7 @@ void MTS_PROTO(sh)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
241250
}
242251

243252
/* SW: Store Word */
253+
__attribute__((force_align_arg_pointer))
244254
void MTS_PROTO(sw)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
245255
{
246256
m_uint64_t data;
@@ -252,6 +262,7 @@ void MTS_PROTO(sw)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
252262
}
253263

254264
/* SD: Store Double-Word */
265+
__attribute__((force_align_arg_pointer))
255266
void MTS_PROTO(sd)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
256267
{
257268
m_uint64_t data;
@@ -263,6 +274,7 @@ void MTS_PROTO(sd)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
263274
}
264275

265276
/* LDC1: Load Double-Word To Coprocessor 1 */
277+
__attribute__((force_align_arg_pointer))
266278
void MTS_PROTO(ldc1)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
267279
{
268280
m_uint64_t data;
@@ -274,6 +286,7 @@ void MTS_PROTO(ldc1)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
274286
}
275287

276288
/* LWL: Load Word Left */
289+
__attribute__((force_align_arg_pointer))
277290
void MTS_PROTO(lwl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
278291
{
279292
m_uint64_t r_mask,naddr;
@@ -297,6 +310,7 @@ void MTS_PROTO(lwl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
297310
}
298311

299312
/* LWR: Load Word Right */
313+
__attribute__((force_align_arg_pointer))
300314
void MTS_PROTO(lwr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
301315
{
302316
m_uint64_t r_mask,naddr;
@@ -321,6 +335,7 @@ void MTS_PROTO(lwr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
321335
}
322336

323337
/* LDL: Load Double-Word Left */
338+
__attribute__((force_align_arg_pointer))
324339
void MTS_PROTO(ldl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
325340
{
326341
m_uint64_t r_mask,naddr;
@@ -343,6 +358,7 @@ void MTS_PROTO(ldl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
343358
}
344359

345360
/* LDR: Load Double-Word Right */
361+
__attribute__((force_align_arg_pointer))
346362
void MTS_PROTO(ldr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
347363
{
348364
m_uint64_t r_mask,naddr;
@@ -365,6 +381,7 @@ void MTS_PROTO(ldr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
365381
}
366382

367383
/* SWL: Store Word Left */
384+
__attribute__((force_align_arg_pointer))
368385
void MTS_PROTO(swl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
369386
{
370387
m_uint64_t d_mask,naddr;
@@ -389,6 +406,7 @@ void MTS_PROTO(swl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
389406
}
390407

391408
/* SWR: Store Word Right */
409+
__attribute__((force_align_arg_pointer))
392410
void MTS_PROTO(swr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
393411
{
394412
m_uint64_t d_mask,naddr;
@@ -413,6 +431,7 @@ void MTS_PROTO(swr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
413431
}
414432

415433
/* SDL: Store Double-Word Left */
434+
__attribute__((force_align_arg_pointer))
416435
void MTS_PROTO(sdl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
417436
{
418437
m_uint64_t d_mask,naddr;
@@ -437,6 +456,7 @@ void MTS_PROTO(sdl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
437456
}
438457

439458
/* SDR: Store Double-Word Right */
459+
__attribute__((force_align_arg_pointer))
440460
void MTS_PROTO(sdr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
441461
{
442462
m_uint64_t d_mask,naddr;
@@ -461,6 +481,7 @@ void MTS_PROTO(sdr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
461481
}
462482

463483
/* LL: Load Linked */
484+
__attribute__((force_align_arg_pointer))
464485
void MTS_PROTO(ll)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
465486
{
466487
m_uint64_t data;
@@ -474,6 +495,7 @@ void MTS_PROTO(ll)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
474495
}
475496

476497
/* SC: Store Conditional */
498+
__attribute__((force_align_arg_pointer))
477499
void MTS_PROTO(sc)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
478500
{
479501
m_uint64_t data;
@@ -489,6 +511,7 @@ void MTS_PROTO(sc)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
489511
}
490512

491513
/* SDC1: Store Double-Word from Coprocessor 1 */
514+
__attribute__((force_align_arg_pointer))
492515
void MTS_PROTO(sdc1)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
493516
{
494517
m_uint64_t data;
@@ -500,6 +523,7 @@ void MTS_PROTO(sdc1)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg)
500523
}
501524

502525
/* CACHE: Cache operation */
526+
__attribute__((force_align_arg_pointer))
503527
void MTS_PROTO(cache)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int op)
504528
{
505529
mips64_jit_tcb_t *block;

‎stable/ppc32_mem.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -724,6 +724,7 @@ static void ppc405_dump_tlb(cpu_gen_t *cpu)
724724
/* === PPC Memory Operations ============================================= */
725725

726726
/* LBZ: Load Byte Zero */
727+
__attribute__((force_align_arg_pointer))
727728
void ppc32_lbz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
728729
{
729730
m_uint64_t data;
@@ -735,6 +736,7 @@ void ppc32_lbz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
735736
}
736737

737738
/* LHZ: Load Half-Word Zero */
739+
__attribute__((force_align_arg_pointer))
738740
void ppc32_lhz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
739741
{
740742
m_uint64_t data;
@@ -746,6 +748,7 @@ void ppc32_lhz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
746748
}
747749

748750
/* LWZ: Load Word Zero */
751+
__attribute__((force_align_arg_pointer))
749752
void ppc32_lwz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
750753
{
751754
m_uint64_t data;
@@ -757,6 +760,7 @@ void ppc32_lwz(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
757760
}
758761

759762
/* LWBR: Load Word Byte Reverse */
763+
__attribute__((force_align_arg_pointer))
760764
void ppc32_lwbr(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
761765
{
762766
m_uint64_t data;
@@ -768,6 +772,7 @@ void ppc32_lwbr(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
768772
}
769773

770774
/* LHA: Load Half-Word Algebraic */
775+
__attribute__((force_align_arg_pointer))
771776
void ppc32_lha(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
772777
{
773778
m_uint64_t data;
@@ -779,6 +784,7 @@ void ppc32_lha(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
779784
}
780785

781786
/* STB: Store Byte */
787+
__attribute__((force_align_arg_pointer))
782788
void ppc32_stb(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
783789
{
784790
m_uint64_t data;
@@ -790,6 +796,7 @@ void ppc32_stb(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
790796
}
791797

792798
/* STH: Store Half-Word */
799+
__attribute__((force_align_arg_pointer))
793800
void ppc32_sth(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
794801
{
795802
m_uint64_t data;
@@ -801,6 +808,7 @@ void ppc32_sth(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
801808
}
802809

803810
/* STW: Store Word */
811+
__attribute__((force_align_arg_pointer))
804812
void ppc32_stw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
805813
{
806814
m_uint64_t data;
@@ -812,6 +820,7 @@ void ppc32_stw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
812820
}
813821

814822
/* STWBR: Store Word Byte Reversed */
823+
__attribute__((force_align_arg_pointer))
815824
void ppc32_stwbr(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
816825
{
817826
m_uint64_t data;
@@ -823,6 +832,7 @@ void ppc32_stwbr(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
823832
}
824833

825834
/* LSW: Load String Word */
835+
__attribute__((force_align_arg_pointer))
826836
void ppc32_lsw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
827837
{
828838
m_uint64_t data;
@@ -834,6 +844,7 @@ void ppc32_lsw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
834844
}
835845

836846
/* STW: Store String Word */
847+
__attribute__((force_align_arg_pointer))
837848
void ppc32_stsw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
838849
{
839850
m_uint64_t data;
@@ -845,6 +856,7 @@ void ppc32_stsw(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
845856
}
846857

847858
/* LFD: Load Floating-Point Double */
859+
__attribute__((force_align_arg_pointer))
848860
void ppc32_lfd(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
849861
{
850862
m_uint64_t data;
@@ -856,6 +868,7 @@ void ppc32_lfd(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
856868
}
857869

858870
/* STFD: Store Floating-Point Double */
871+
__attribute__((force_align_arg_pointer))
859872
void ppc32_stfd(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
860873
{
861874
m_uint64_t data;
@@ -867,6 +880,7 @@ void ppc32_stfd(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int reg)
867880
}
868881

869882
/* ICBI: Instruction Cache Block Invalidate */
883+
__attribute__((force_align_arg_pointer))
870884
void ppc32_icbi(cpu_ppc_t *cpu,m_uint32_t vaddr,u_int op)
871885
{
872886
ppc32_jit_tcb_t *block;

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