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Zhiqiang-Houdleach02
Zhiqiang-Hou
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dleach02
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snippets: add ram-console snippet support
The ram-console snippet disabled UART console and enabled the RAM console with the option link the RAM console buffer to a dedicate section in a new added memory-region. Signed-off-by: Hou Zhiqiang <[email protected]>
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‎snippets/ram-console/README.rst

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.. _snippet-ram-console:
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RAM Console Snippet (ram-console)
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#################################
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.. code-block:: console
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west build -S ram-console [...]
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Overview
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********
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This snippet redirects console output to a RAM buffer. The RAM console
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buffer is a global array located in RAM region by default, whose address
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is unknown before building. The RAM console driver also supports using
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a dedicated section for the RAM console buffer with prefined address.
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How to enable RAM console buffer section
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****************************************
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Add board dts overlay to this snippet to add property ``zephyr,ram-console``
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in the chosen node and memory-region node with compatible string
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:dtcompatible:`zephyr,memory-region` as the following:
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.. code-block:: DTS
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/ {
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chosen {
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zephyr,ram-console = &snippet_ram_console;
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};
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snippet_ram_console: memory@93d00000 {
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compatible = "zephyr,memory-region";
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reg = <0x93d00000 DT_SIZE_K(4)>;
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zephyr,memory-region = "RAM_CONSOLE";
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};
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};

‎snippets/ram-console/boards/imx8mm_evk_mimx8mm6_a53.overlay

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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,ram-console = &snippet_ram_console;
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};
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snippet_ram_console: memory@93d00000 {
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compatible = "zephyr,memory-region";
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reg = <0x93d00000 DT_SIZE_K(4)>;
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zephyr,memory-region = "RAM_CONSOLE";
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};
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};

‎snippets/ram-console/boards/imx8mn_evk_mimx8mn6_a53.overlay

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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,ram-console = &snippet_ram_console;
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};
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snippet_ram_console: memory@93d00000 {
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compatible = "zephyr,memory-region";
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reg = <0x93d00000 DT_SIZE_K(4)>;
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zephyr,memory-region = "RAM_CONSOLE";
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};
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};

‎snippets/ram-console/boards/imx8mp_evk_mimx8ml8_a53.overlay

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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,ram-console = &snippet_ram_console;
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};
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snippet_ram_console: memory@c0100000 {
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compatible = "zephyr,memory-region";
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reg = <0xc0100000 DT_SIZE_K(4)>;
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zephyr,memory-region = "RAM_CONSOLE";
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};
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};

‎snippets/ram-console/boards/imx93_evk_mimx9352_a55.overlay

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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,ram-console = &snippet_ram_console;
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};
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snippet_ram_console: memory@d0100000 {
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compatible = "zephyr,memory-region";
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reg = <0xd0100000 DT_SIZE_K(4)>;
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zephyr,memory-region = "RAM_CONSOLE";
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};
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};

‎snippets/ram-console/ram-console.conf

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#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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# Disable UART Console
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CONFIG_UART_CONSOLE=n
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# Enable RAM Console
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CONFIG_RAM_CONSOLE=y

‎snippets/ram-console/snippet.yml

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#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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name: ram-console
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append:
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EXTRA_CONF_FILE: ram-console.conf
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boards:
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imx8mm_evk/mimx8mm6/a53:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mm_evk_mimx8mm6_a53.overlay
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imx8mm_evk/mimx8mm6/a53/smp:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mm_evk_mimx8mm6_a53.overlay
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imx8mn_evk/mimx8mn6/a53:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mn_evk_mimx8mn6_a53.overlay
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imx8mn_evk/mimx8mn6/a53/smp:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mn_evk_mimx8mn6_a53.overlay
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imx8mp_evk/mimx8ml8/a53:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mp_evk_mimx8ml8_a53.overlay
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imx8mp_evk/mimx8ml8/a53/smp:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx8mp_evk_mimx8ml8_a53.overlay
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imx93_evk/mimx9352/a55:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/imx93_evk_mimx9352_a55.overlay

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