From 67067486d7fc96f8c5ace47fdd6a298e3da4581d Mon Sep 17 00:00:00 2001 From: Dmitry Ilyin <6576495+widgetii@users.noreply.github.com> Date: Tue, 23 Jun 2026 18:39:55 +0300 Subject: [PATCH] libraries: build hi3519dv500 (V5 aarch64) sensor drivers from source Add the Hi3519DV500/Hi3516DV500 (V5/SS626, aarch64 Cortex-A55) sensor drivers, compiled from the vendor SDK source the same way the cv500/cv300/ hi3519v101 chips are (per-sensor _cmos.c + _sensor_ctl.c built against the DV500 ISP/MPI headers). cv6xx's cis_/sensor_common refactor does not apply here: the DV500 ISP API differs from cv6xx's, and the vendor source matches the DV500 headers directly. 8 sensors -> libsns_*.{so,a}: sc450ai, os04a10, os04a10_slave, os08a20, sc850sl, imx347_slave, imx515, gst412c. Also adds the DV500 vendor ISP/MPI headers (libraries/isp/include/hi3519dv500, kernel/include/hi3519dv500 trimmed to the set the sensors include) and the libraries/Makefile CHIPARCH filter. Verified: all 8 build to aarch64 ELF via `make -C libraries CHIPARCH=hi3519dv500` with aarch64-openipc-linux-musl. Kernel modules (open_*.ko) are a separate follow-up. --- kernel/include/hi3519dv500/autoconf.h | 522 ++ kernel/include/hi3519dv500/ot_common.h | 383 ++ kernel/include/hi3519dv500/ot_common_isp.h | 3033 +++++++++++ kernel/include/hi3519dv500/ot_common_snap.h | 94 + kernel/include/hi3519dv500/ot_common_sns.h | 195 + kernel/include/hi3519dv500/ot_common_video.h | 1270 +++++ kernel/include/hi3519dv500/ot_debug.h | 189 + kernel/include/hi3519dv500/ot_defines.h | 590 +++ kernel/include/hi3519dv500/ot_errno.h | 95 + kernel/include/hi3519dv500/ot_isp_define.h | 172 + kernel/include/hi3519dv500/ot_math.h | 333 ++ kernel/include/hi3519dv500/ot_type.h | 73 + kernel/include/hi3519dv500/securec.h | 616 +++ kernel/include/hi3519dv500/securectype.h | 571 +++ libraries/Makefile | 14 + .../isp/include/hi3519dv500/3a/ot_common_ae.h | 197 + .../isp/include/hi3519dv500/3a/ot_common_af.h | 24 + .../include/hi3519dv500/3a/ot_common_awb.h | 70 + .../isp/include/hi3519dv500/3a/ot_mpi_ae.h | 75 + .../isp/include/hi3519dv500/3a/ot_mpi_awb.h | 51 + .../include/hi3519dv500/3a/ot_mpi_thermo.h | 40 + .../isp/include/hi3519dv500/ext_inc/isp_ext.h | 481 ++ .../include/hi3519dv500/ext_inc/ot_mpi_sys.h | 83 + .../hi3519dv500/ext_inc/ot_mpi_sys_mem.h | 51 + .../include/hi3519dv500/ext_inc/ot_mpi_vb.h | 63 + .../include/hi3519dv500/ext_inc/ot_mpi_vi.h | 186 + .../isp/include/hi3519dv500/ot_common_3a.h | 500 ++ .../isp/include/hi3519dv500/ot_common_isp.h | 3033 +++++++++++ libraries/isp/include/hi3519dv500/ot_i2c.h | 55 + .../isp/include/hi3519dv500/ot_isp_bin.h | 43 + .../isp/include/hi3519dv500/ot_isp_debug.h | 39 + .../isp/include/hi3519dv500/ot_mpi_isp.h | 228 + .../isp/include/hi3519dv500/ot_sns_ctrl.h | 105 + libraries/isp/include/hi3519dv500/ot_spi.h | 126 + libraries/isp/include/hi3519dv500/ot_ssp.h | 35 + .../sensor/hi3519dv500/gst_412c/Makefile | 22 + .../hi3519dv500/gst_412c/gst412c_cmos.c | 680 +++ .../hi3519dv500/gst_412c/gst412c_cmos.h | 63 + .../hi3519dv500/gst_412c/gst412c_cmos_ex.h | 2768 +++++++++++ .../hi3519dv500/gst_412c/gst412c_sensor_ctl.c | 442 ++ .../hi3519dv500/omnivision_os04a10/Makefile | 22 + .../omnivision_os04a10/os04a10_cmos.c | 1556 ++++++ .../omnivision_os04a10/os04a10_cmos.h | 118 + .../omnivision_os04a10/os04a10_cmos_ex.h | 4415 +++++++++++++++++ .../omnivision_os04a10/os04a10_sensor_ctl.c | 1000 ++++ .../omnivision_os04a10_slave/Makefile | 22 + .../os04a10_slave_cmos.c | 1148 +++++ .../os04a10_slave_cmos.h | 101 + .../os04a10_slave_cmos_ex.h | 3183 ++++++++++++ .../os04a10_slave_sensor_ctl.c | 651 +++ .../hi3519dv500/omnivision_os08a20/Makefile | 22 + .../omnivision_os08a20/os08a20_cmos.c | 1502 ++++++ .../omnivision_os08a20/os08a20_cmos.h | 106 + .../omnivision_os08a20/os08a20_cmos_ex.h | 4046 +++++++++++++++ .../omnivision_os08a20/os08a20_sensor_ctl.c | 749 +++ .../sensor/hi3519dv500/smart_sc450ai/Makefile | 22 + .../hi3519dv500/smart_sc450ai/sc450ai_cmos.c | 1443 ++++++ .../hi3519dv500/smart_sc450ai/sc450ai_cmos.h | 105 + .../smart_sc450ai/sc450ai_cmos_ex.h | 4399 ++++++++++++++++ .../smart_sc450ai/sc450ai_sensor_ctl.c | 676 +++ .../sensor/hi3519dv500/smart_sc850sl/Makefile | 22 + .../hi3519dv500/smart_sc850sl/sc850sl_cmos.c | 1474 ++++++ .../hi3519dv500/smart_sc850sl/sc850sl_cmos.h | 145 + .../smart_sc850sl/sc850sl_cmos_ex.h | 4351 ++++++++++++++++ .../smart_sc850sl/sc850sl_sensor_ctl.c | 725 +++ .../hi3519dv500/sony_imx347_slave/Makefile | 22 + .../sony_imx347_slave/imx347_slave_cmos.c | 1165 +++++ .../sony_imx347_slave/imx347_slave_cmos.h | 90 + .../sony_imx347_slave/imx347_slave_cmos_ex.h | 3896 +++++++++++++++ .../imx347_slave_sensor_ctl.c | 423 ++ .../sensor/hi3519dv500/sony_imx515/Makefile | 22 + .../hi3519dv500/sony_imx515/imx515_cmos.c | 1080 ++++ .../hi3519dv500/sony_imx515/imx515_cmos.h | 65 + .../hi3519dv500/sony_imx515/imx515_cmos_ex.h | 4300 ++++++++++++++++ .../sony_imx515/imx515_sensor_ctl.c | 428 ++ 75 files changed, 61104 insertions(+) create mode 100644 kernel/include/hi3519dv500/autoconf.h create mode 100644 kernel/include/hi3519dv500/ot_common.h create mode 100644 kernel/include/hi3519dv500/ot_common_isp.h create mode 100644 kernel/include/hi3519dv500/ot_common_snap.h create mode 100644 kernel/include/hi3519dv500/ot_common_sns.h create mode 100644 kernel/include/hi3519dv500/ot_common_video.h create mode 100644 kernel/include/hi3519dv500/ot_debug.h create mode 100644 kernel/include/hi3519dv500/ot_defines.h create mode 100644 kernel/include/hi3519dv500/ot_errno.h create mode 100644 kernel/include/hi3519dv500/ot_isp_define.h create mode 100644 kernel/include/hi3519dv500/ot_math.h create mode 100644 kernel/include/hi3519dv500/ot_type.h create mode 100644 kernel/include/hi3519dv500/securec.h create mode 100644 kernel/include/hi3519dv500/securectype.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_common_ae.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_common_af.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_common_awb.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_mpi_ae.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_mpi_awb.h create mode 100644 libraries/isp/include/hi3519dv500/3a/ot_mpi_thermo.h create mode 100644 libraries/isp/include/hi3519dv500/ext_inc/isp_ext.h create mode 100644 libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys.h create mode 100644 libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys_mem.h create mode 100644 libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vb.h create mode 100644 libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vi.h create mode 100644 libraries/isp/include/hi3519dv500/ot_common_3a.h create mode 100644 libraries/isp/include/hi3519dv500/ot_common_isp.h create mode 100644 libraries/isp/include/hi3519dv500/ot_i2c.h create mode 100644 libraries/isp/include/hi3519dv500/ot_isp_bin.h create mode 100644 libraries/isp/include/hi3519dv500/ot_isp_debug.h create mode 100644 libraries/isp/include/hi3519dv500/ot_mpi_isp.h create mode 100644 libraries/isp/include/hi3519dv500/ot_sns_ctrl.h create mode 100644 libraries/isp/include/hi3519dv500/ot_spi.h create mode 100644 libraries/isp/include/hi3519dv500/ot_ssp.h create mode 100644 libraries/sensor/hi3519dv500/gst_412c/Makefile create mode 100644 libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.c create mode 100644 libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.h create mode 100644 libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/gst_412c/gst412c_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10/Makefile create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10_slave/Makefile create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os08a20/Makefile create mode 100644 libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.c create mode 100644 libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/smart_sc450ai/Makefile create mode 100644 libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.c create mode 100644 libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.h create mode 100644 libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/smart_sc850sl/Makefile create mode 100644 libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.c create mode 100644 libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.h create mode 100644 libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/sony_imx347_slave/Makefile create mode 100644 libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.c create mode 100644 libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.h create mode 100644 libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_sensor_ctl.c create mode 100644 libraries/sensor/hi3519dv500/sony_imx515/Makefile create mode 100644 libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.c create mode 100644 libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.h create mode 100644 libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos_ex.h create mode 100644 libraries/sensor/hi3519dv500/sony_imx515/imx515_sensor_ctl.c diff --git a/kernel/include/hi3519dv500/autoconf.h b/kernel/include/hi3519dv500/autoconf.h new file mode 100644 index 0000000..387522b --- /dev/null +++ b/kernel/include/hi3519dv500/autoconf.h @@ -0,0 +1,522 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ +#ifndef __AUTOCONF_H__ +#define __AUTOCONF_H__ + +#define AUTOCONF_TIMESTAMP "2024-01-25 09:25:23 CST" + +/* + * General Setup + */ +#define CONFIG_HI3519DV500 1 +#define CONFIG_OT_CHIP_TYPE 0x3519d500 +#define CONFIG_OT_ARCH "hi3519dv500" +#define CONFIG_SUBCHIP_HI3519DV500 1 +#define CONFIG_OT_SUBARCH "hi3519dv500" +#define CONFIG_OT_SUBCHIP_TYPE 0x3519d500 +#define CONFIG_SMP 1 +#define CONFIG_ARM_ARCH_TYPE "smp" +#define CONFIG_A55 1 +#define CONFIG_CPU_TYPE "a55" +#define CONFIG_VERSION_ASIC 1 +#define CONFIG_LINUX_OS 1 +#define CONFIG_OS_TYPE "linux" +#define CONFIG_PHYS_ADDR_BIT_WIDTH_64 1 +#define CONFIG_KERNEL_SPACE 1 +#define CONFIG_DRIVER_SPACE_TYPE "kernel_space" +#define CONFIG_GCC 1 +#define CONFIG_LINUX_5_10_y 1 +#define CONFIG_KERNEL_VERSION "linux-5.10.y" +#define CONFIG_KERNEL_AARCH64_V01C01_LINUX_MUSL 1 +#define CONFIG_OT_CROSS "aarch64-v01c01-linux-musl-" +#define CONFIG_LIBC_TYPE "musl" +#define CONFIG_KERNEL_BIT "KERNEL_BIT_64" +#define CONFIG_USER_AARCH64_V01C01_LINUX_MUSL 1 +#define CONFIG_OT_CROSS_LIB "aarch64-v01c01-linux-musl-" +#define CONFIG_USER_BIT "USER_BIT_64" +#define CONFIG_LINUX_STYLE 1 +#define CONFIG_CODE_SYTLE "USE_LINUX_STYLE" +#define CONFIG_RELEASE_TYPE_RELEASE 1 +#define CONFIG_OT_RLS_MODE "OT_RELEASE" + +/* + * Media Modules Setup + */ + +/* + * media audio config + */ +#define CONFIG_OT_AUDIO_SUPPORT 1 +#define CONFIG_OT_ACODEC_SUPPORT 1 +#define CONFIG_OT_ACODEC_VERSION "V751" +#define CONFIG_OT_ACODEC_MAX_GAIN 56 +#define CONFIG_OT_ACODEC_MIN_GAIN 0 +#define CONFIG_OT_ACODEC_GAIN_STEP 3 +#define CONFIG_OT_ACODEC_FAST_POWER_SUPPORT 1 +#define CONFIG_OT_ACODEC_DIFF_SOFT_INVERT 1 +#define CONFIG_OT_DOWNVQE_SUPPORT 1 +#define CONFIG_OT_TALKVQE_SUPPORT 1 +#define CONFIG_OT_RECORDVQE_SUPPORT 1 +#define CONFIG_OT_TALKVQEV2_SUPPORT 1 +#define CONFIG_OT_TALKVQEV2_WNR_SUPPORT 1 +#define CONFIG_OT_AUDIO_STATIC_REGISTER_SUPPORT 1 +#define CONFIG_OT_AUDIO_DMIC_SUPPORT 1 +#define CONFIG_OT_AENC_SUPPORT 1 +#define CONFIG_OT_AENC_AAC_SUPPORT 1 +#define CONFIG_OT_AENC_MP3_SUPPORT 1 +#define CONFIG_OT_AENC_OPUS_SUPPORT 1 +#define CONFIG_OT_ADEC_SUPPORT 1 +#define CONFIG_OT_ADEC_AAC_SUPPORT 1 +#define CONFIG_OT_ADEC_MP3_SUPPORT 1 +#define CONFIG_OT_ADEC_OPUS_SUPPORT 1 + +/* + * media base config + */ + +/* + * media vb config + */ +#define CONFIG_OT_VB_EXTPOOL_SUPPORT 1 +#define CONFIG_OT_VB_SUPPLEMENT_MASK_SUPPORT 1 + +/* + * media vca config + */ +#define CONFIG_OT_VCA_SUPPORT 1 + +/* + * media chnl config + */ +#define CONFIG_OT_CHNL_SUPPORT 1 + +/* + * media dis config + */ +#define CONFIG_OT_DIS_SUPPORT 1 +#define CONFIG_OT_DIS_SUBMIT_TO_VGS_SUPPORT 1 +#define CONFIG_OT_GYRO_DIS_MESH_SUPPORT 1 + +/* + * media gdc config + */ +#define CONFIG_OT_GDC_SUPPORT 1 +#define CONFIG_OT_GDC_LOWDELAY_SUPPORT 1 +#define CONFIG_OT_GDC_FISHEYE_LMF_SUPPORT 1 +#define CONFIG_OT_GDC_FISHEYE_SUPPORT 1 +#define CONFIG_OT_GDC_LDC_SUPPORT 1 +#define CONFIG_OT_GDC_LDC_V2_SUPPORT 1 +#define CONFIG_OT_GDC_SPREAD_SUPPORT 1 +#define CONFIG_OT_GDC_LUT_SUPPORT 1 +#define CONFIG_OT_GDC_SCALE_SUPPORT 1 +#define CONFIG_OT_GDC_STITCH_SUPPORT 1 +#define CONFIG_OT_GDC_PRE_ROTATION_SUPPORT 1 + +/* + * media hdmi config + */ + +/* + * media isp config + */ +#define CONFIG_OT_ISP_SUPPORT 1 +#define CONFIG_OT_ISP_AF_SUPPORT 1 +#define CONFIG_OT_ISP_CR_SUPPORT 1 +#define CONFIG_OT_ISP_GCAC_SUPPORT 1 +#define CONFIG_OT_ISP_CA_SUPPORT 1 +#define CONFIG_OT_ISP_SPECAWB_SUPPORT 1 +#define CONFIG_OT_ISP_DETAIL_STATS_SUPPORT 1 +#define CONFIG_OT_ISP_DPC_STATIC_TABLE_SUPPORT 1 +#define CONFIG_OT_AIISP_SUPPORT 1 +#define CONFIG_OT_AIBNR_SUPPORT 1 +#define CONFIG_OT_AIDRC_SUPPORT 1 +#define CONFIG_OT_AIDM_SUPPORT 1 +#define CONFIG_OT_AI3DNR_SUPPORT 1 +#define CONFIG_OT_AIDESTRIP_SUPPORT 1 +#define CONFIG_OT_NUC_SUPPORT 1 + +/* + * media region config + */ +#define CONFIG_OT_REGION_SUPPORT 1 +#define CONFIG_OT_RGN_VGS_QUICKCOPY_SUPPORT 1 +#define CONFIG_OT_RGN_CORNER_RECT_SUPPORT 1 + +/* + * media sys config + */ +#define CONFIG_OT_SYS_SUPPORT 1 +#define CONFIG_OT_SYS_SCALE_COEF_SUPPORT 1 +#define CONFIG_OT_SYS_3DNR_POS_SET_SUPPORT 1 +#define CONFIG_OT_SYS_FMU_SUPPORT 1 +#define CONFIG_OT_SYS_FMU0_SUPPORT 1 +#define CONFIG_OT_SYS_FMU0_DIRECT_SUPPORT 1 +#define CONFIG_OT_SYS_FMU1_SUPPORT 1 +#define CONFIG_OT_SYS_FMU1_DIRECT_SUPPORT 1 +#define CONFIG_OT_SYS_FMU1_WRAP_SUPPORT 1 +#define CONFIG_SYS_CLK_CTRL_SUPPORT 1 + +/* + * media tde config + */ +#define CONFIG_OT_TDE_SUPPORT 1 + +/* + * media vda config + */ + +/* + * media vdec config + */ +#define CONFIG_OT_VDEC_SUPPORT 1 +#define CONFIG_OT_H265D_SUPPORT 1 +#define CONFIG_OT_H264D_SUPPORT 1 +#define CONFIG_OT_JPEGD_SUPPORT 1 +#define CONFIG_OT_DEC_SHVC_SUPPORT 1 +#define CONFIG_VDEC_IP "VDEC_IP_VEDU" +#define CONFIG_OT_JPEGD_SUPPORT 1 +#define CONFIG_OT_JPEGD_LEFT_EAR_SUPPORT 1 +#define CONFIG_OT_JPEGD_PROGRESSIVE 1 +#define CONFIG_OT_JPEGD_MESSAGE_POOL_SUPPORT 1 +#define CONFIG_VDEC_ROTATION_SUPPORT 1 +#define CONFIG_VDEC_TILE_ROTATION_SUPPORT 1 +#define CONFIG_VDEC_LOW_DELAY_ROTATION_SUPPORT 1 +#define CONFIG_VDEC_USERDATA_SUPPORT 1 +#define CONFIG_VDEC_LOWDELAY_SUPPORT 1 + +/* + * media venc config + */ +#define CONFIG_OT_VENC_SUPPORT 1 +#define CONFIG_OT_VENC_KERNEL_VERSION 1 +#define CONFIG_OT_H265E_SUPPORT 1 +#define CONFIG_OT_H265E_USERDATA_SUPPORT 1 +#define CONFIG_OT_H265E_INTRA_REFRESH_SUPPORT 1 +#define CONFIG_OT_H264E_SUPPORT 1 +#define CONFIG_OT_H264E_USERDATA_SUPPORT 1 +#define CONFIG_OT_H264E_INTRA_REFRESH_SUPPORT 1 +#define CONFIG_OT_JPEGE_SUPPORT 1 +#define CONFIG_OT_JPEGE_ROI_SUPPORT 1 +#define CONFIG_OT_MJPEGE_SUPPORT 1 +#define CONFIG_OT_JPEGE_MPF_DCF_SUPPORT 1 +#define CONFIG_OT_JPEGE_USERDATA_SUPPORT 1 +#define CONFIG_OT_VENC_LOWDELAY_SUPPORT 1 +#define CONFIG_OT_VENC_VPSSAUTO_SUPPORT 1 +#define CONFIG_OT_VENC_FRAMEBUF_RECYCLE_SUPPORT 1 +#define CONFIG_OT_VENC_VGS_SUPPORT 1 +#define CONFIG_OT_VENC_SVC_SUPPORT 1 +#define CONFIG_OT_VENC_SMARTP_SUPPORT 1 +#define CONFIG_OT_VENC_DUALP_SUPPORT 1 +#define CONFIG_OT_VENC_RCNREF_SHARE_SUPPORT 1 +#define CONFIG_OT_VENC_DEBREATH_SUPPORT 1 +#define CONFIG_OT_VENC_SKIPREF_SUPPORT 1 +#define CONFIG_OT_VENC_SCENE0_SUPPORT 1 +#define CONFIG_OT_VENC_SCENE1_SUPPORT 1 +#define CONFIG_OT_VENC_SCENE2_SUPPORT 1 +#define CONFIG_OT_RC_AVBR_SUPPORT 1 +#define CONFIG_OT_RC_QPMAP_SUPPORT 1 +#define CONFIG_OT_RC_QVBR_SUPPORT 1 +#define CONFIG_OT_RC_CVBR_SUPPORT 1 +#define CONFIG_OT_VENC_COMPOSITE_SUPPORT 1 + +/* + * media vgs config + */ +#define CONFIG_OT_VGS_SUPPORT 1 +#define CONFIG_OT_VGS_STITCH_SUPPORT 1 +#define CONFIG_OT_VGS_LUMA_STAT_SUPPORT 1 +#define CONFIG_OT_VGS_CORNER_RECT_SUPPORT 1 +#define CONFIG_OT_VGS_SHBD_SUPPORT 1 +#define CONFIG_OT_VGS_MCF_SUPPORT 1 +#define CONFIG_OT_VGS_LOW_DELAY_SUPPORT 1 +#define CONFIG_OT_VGS_ROTATION_INPUT_LOW_DELAY_SUPPORT 1 +#define CONFIG_OT_VGS_FPD_SUPPORT 1 +#define CONFIG_OT_VGS_MULTI_CHN_SUPPORT 1 +#define CONFIG_OT_VGS_GME_SUPPORT 1 +#define CONFIG_OT_VGS_MOSAIC_ONLINE_SUPPORT 1 +#define CONFIG_OT_VGS_HOR_CHROMA_8TAP_SCALE_COEF_SUPPORT 1 +#define CONFIG_OT_VGS_BLEND_SUPPORT 1 + +/* + * media vi config + */ +#define CONFIG_OT_VI_SUPPORT 1 +#define CONFIG_OT_VI_ALL_SUPPORT 1 +#define CONFIG_OT_VI_DEV_SEND_FRAME 1 +#define CONFIG_OT_VI_DEV_GENERATE_TIMING 1 +#define CONFIG_OT_VI_DEV_GENERATE_DATA 1 +#define CONFIG_OT_VI_VIRT_PIPE 1 +#define CONFIG_OT_VI_PIPE_PRE_CROP 1 +#define CONFIG_OT_VI_PIPE_POST_CROP 1 +#define CONFIG_OT_VI_PIPE_DUMP_FRAME 1 +#define CONFIG_OT_VI_PIPE_DUMP_PRIVATE_DATA 1 +#define CONFIG_OT_VI_PIPE_SEND_FRAME 1 +#define CONFIG_OT_VI_PIPE_INTERRUPT_EN 1 +#define CONFIG_OT_VI_PIPE_LOW_DELAY 1 +#define CONFIG_OT_VI_PIPE_FRAME_INTERRUPT_TYPE 1 +#define CONFIG_OT_VI_PIPE_GET_COMPRESS_PARAM 1 +#define CONFIG_OT_VI_PIPE_USER_PIC 1 +#define CONFIG_OT_VI_PIPE_FPN 1 +#define CONFIG_OT_VI_PIPE_IR_ASSIST_NR 1 +#define CONFIG_OT_VI_PIPE_BNR 1 +#define CONFIG_OT_VI_PIPE_VNR 1 +#define CONFIG_OT_VI_CHN_LOW_DELAY 1 +#define CONFIG_OT_VI_CHN_DIS 1 +#define CONFIG_OT_VI_STITCH_GRP 1 +#define CONFIG_OT_VI_PTS 1 +#define CONFIG_OT_VI_VIRT_IP 1 +#define CONFIG_OT_VI_PIPE_RGBW 1 + +/* + * media vo config + */ +#define CONFIG_OT_VO_SUPPORT 1 +#define CONFIG_OT_VO_VPSS_AUTO 1 +#define CONFIG_OT_VO_PLAY_CTL 1 +#define CONFIG_OT_VO_COVER_OSD_SUPPORT 1 +#define CONFIG_OT_VO_CORNER_RECT_SUPPORT 1 +#define CONFIG_OT_VO_VGS 1 +#define CONFIG_OT_VO_GRAPH 1 +#define CONFIG_OT_VO_LOW_DELAY 1 +#define CONFIG_OT_VO_BORDER_BY_COVER 1 +#define CONFIG_OT_VO_RGB 1 +#define CONFIG_OT_VO_BT1120 1 +#define CONFIG_OT_VO_MIPI 1 +#define CONFIG_OT_VO_INTF_GAMMA 1 +#define CONFIG_OT_VO_LESS_BUF 1 +#define CONFIG_OT_VO_USER_NOTIFY 1 +#define CONFIG_OT_VO_DEV_BYPASS 1 +#define CONFIG_OT_VO_LAYER_HOR_HALF_SPLIT_SUPPORT 1 +#define CONFIG_OT_VO_CHN_ASPECT_RATIO 1 +#define CONFIG_OT_VO_EXPORT_FUNCTION 1 +#define CONFIG_OT_VO_FB_SEPARATE 1 + +/* + * media vpss config + */ +#define CONFIG_OT_VPSS_SUPPORT 1 + +/* + * vpss online config + */ +#define CONFIG_OT_VPSS_VIPROC_VPSS_ONLINE_SUPPORT 1 +#define CONFIG_OT_VPSS_ONLINE_SUPPORT 1 + +/* + * vpss 3dnr config + */ +#define CONFIG_OT_VPSS_3DNR_SUPPORT 1 +#define CONFIG_OT_VPSS_3DNR_GAMMA_SUPPORT 1 +#define CONFIG_OT_VPSS_AUTO_SUPPORT 1 + +/* + * vpss rgn config + */ + +/* + * vpss grp rgn config + */ +#define CONFIG_OT_VPSS_CORNER_RECT_SUPPORT 1 +#define CONFIG_OT_VPSS_MOSAIC_SUPPORT 1 + +/* + * vpss chn rgn config + */ +#define CONFIG_OT_VPSS_RGN_ON_CHN_SUPPORT 1 +#define CONFIG_OT_VPSS_COVER_SUPPORT 1 +#define CONFIG_OT_VPSS_COVER_RECT_SUPPORT 1 +#define CONFIG_OT_VPSS_COVER_HOLLOW_SUPPORT 1 +#define CONFIG_OT_VPSS_2SCALE_SUPPORT 1 +#define CONFIG_OT_VPSS_VGS_GRP_SUPPORT 1 +#define CONFIG_OT_VPSS_BUFFER_REUSE_SUPPORT 1 +#define CONFIG_OT_VPSS_LOW_DELAY_SUPPORT 1 +#define CONFIG_OT_VPSS_EXT_CHN_SUPPORT 1 +#define CONFIG_OT_VPSS_CHN_CROP_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_CROP_SIZE_PRIOR_SUPPORT 1 +#define CONFIG_OT_VPSS_CHN_STRIDE_ALIGN_SUPPORT 1 +#define CONFIG_OT_VPSS_CHN_LBA_SUPPORT 1 +#define CONFIG_OT_VPSS_MCF_SUPPORT 1 + +/* + * vpss gdc config + */ +#define CONFIG_OT_VPSS_GDC_SUPPORT 1 +#define CONFIG_OT_VPSS_FISHEYE_LMF_SUPPORT 1 + +/* + * vpss grp gdc config + */ +#define CONFIG_OT_VPSS_GRP_GDC_SUPPORT 1 +#define CONFIG_OT_VPSS_OUT_LUT_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_LDC_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_SPREAD_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_FISHEYE_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_ROTATION_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_PMF_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_FOV_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_LUT_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_ZME_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_STITCH_SUPPORT 1 +#define CONFIG_OT_VPSS_GRP_STITCH_BLEND_SUPPORT 1 + +/* + * vpss chn gdc config + */ +#define CONFIG_OT_VPSS_NODE_CANCEL_SUPPORT 1 + +/* + * media vpp config + */ +#define CONFIG_OT_VPP_SUPPORT 1 +#define CONFIG_OT_VPP_FOV_CORRECTION_SUPPORT 1 +#define CONFIG_OT_VPP_VI_SUPPORT 1 +#define CONFIG_OT_VPP_COVEREX_RATIO_SUPPORT 1 +#define CONFIG_OT_VPP_GRP_GDC_SUPPORT 1 +#define CONFIG_OT_VPP_STITCH_SUPPORT 1 +#define CONFIG_OT_VPP_PMF_SUPPORT 1 + +/* + * media dcc config + */ + +/* + * media security_subsys Config + */ +#define CONFIG_OT_SECURITY_SUBSYS_SUPPORT 1 +#define CONFIG_OT_CIPHER_SUPPORT 1 + +/* + * media gfbg Config + */ +#define CONFIG_OT_GFBG_SUPPORT 1 +#define CONFIG_GFBG_DPU_V3 1 + +/* + * media ot_syslink Config + */ + +/* + * media pciv Config + */ + +/* + * media avs lut Config + */ +#define CONFIG_OT_AVS_LUT_SUPPORT 1 + +/* + * media avs convert Config + */ + +/* + * media pos_query Config + */ + +/* + * media snap Config + */ +#define CONFIG_OT_SNAP_SUPPORT 1 + +/* + * media photo Config + */ + +/* + * media heif Config + */ +#define CONFIG_OT_HEIF_SUPPORT 1 + +/* + * media svp Config + */ +#define CONFIG_OT_SVP_SUPPORT 1 +#define CONFIG_OT_SVP_IVE 1 +#define CONFIG_OT_SVP_IVE_CSC 1 +#define CONFIG_OT_SVP_IVE_FILTER_AND_CSC 1 +#define CONFIG_OT_SVP_IVE_NCC 1 +#define CONFIG_OT_SVP_IVE_LBP 1 +#define CONFIG_OT_SVP_IVE_NORM_GRAD 1 +#define CONFIG_OT_SVP_IVE_ST_CANDI_CORNER 1 +#define CONFIG_OT_SVP_IVE_RESIZE 1 +#define CONFIG_OT_SVP_IVE_PERSP_TRANS 1 +#define CONFIG_OT_SVP_IVE_KCF 1 +#define CONFIG_OT_SVP_IVE_HOG 1 +#define CONFIG_OT_SVP_MD 1 +#define CONFIG_OT_SVP_NPU_V2R2 1 +#define CONFIG_OT_SVP_DPU_RECT 1 +#define CONFIG_OT_SVP_DPU_MATCH 1 + +/* + * media motionfusion config + */ +#define CONFIG_OT_MOTIONFUSION_SUPPORT 1 + +/* + * media mcf Config + */ +#define CONFIG_OT_MCF_SUPPORT 1 + +/* + * media securec Config + */ +#define CONFIG_OT_SECUREC_SUPPORT 1 + +/* + * media irq config + */ + +/* + * media proc config + */ + +/* + * media uvc config + */ +#define CONFIG_OT_UVC_SUPPORT 1 + +/* + * media smmz agent config + */ +#define CONFIG_OT_SMMZ_AGENT_SUPPORT 1 + +/* + * media pm Config + */ +#define CONFIG_OT_PM_SUPPORT 1 +#define CONFIG_OT_PM_TEMP_COMP_SUPPORT 1 + +/* + * Device Driver Setup + */ + +/* + * drv config + */ +#define CONFIG_DRV 1 +#define CONFIG_EXTDRV 1 +#define CONFIG_INTERDRV 1 +#define CONFIG_OT_USER 1 +#define CONFIG_MIPI_TX 1 +#define CONFIG_MIPI_RX 1 +#define CONFIG_OT_ADC 1 +#define CONFIG_OT_LSADC 1 +#define CONFIG_OT_WDG 1 +#define CONFIG_OT_SYSCFG 1 + +/* + * Debug Config + */ + +/* + * GDB config + */ +#define CONFIG_OT_GDB_NO 1 +#define CONFIG_OT_GDB "n" +#define CONFIG_OT_PROC_SHOW_SUPPORT 1 +#define CONFIG_OT_LOG_TRACE_SUPPORT 1 +#define CONFIG_OT_LOG_TRACE_ALL 1 +#define CONFIG_OT_LOG_TRACE_LEVEL 7 + +#endif /* __AUTOCONF_H__ */ + diff --git a/kernel/include/hi3519dv500/ot_common.h b/kernel/include/hi3519dv500/ot_common.h new file mode 100644 index 0000000..523cd2f --- /dev/null +++ b/kernel/include/hi3519dv500/ot_common.h @@ -0,0 +1,383 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_H +#define OT_COMMON_H + +#include "autoconf.h" +#include "ot_type.h" +#include "ot_defines.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* end of #ifdef __cplusplus */ + +#ifndef VER_X +#define VER_X 1 +#endif + +#ifndef VER_Y +#define VER_Y 0 +#endif + +#ifndef VER_Z +#define VER_Z 0 +#endif + +#ifndef VER_P +#define VER_P 0 +#endif + +#ifndef VER_B +#define VER_B 0 +#endif + +#ifdef OT_DEBUG +#define VER_D " Debug" +#else +#define VER_D " Release" +#endif + +#define ATTRIBUTE __attribute__((aligned(OT_ALIGN_NUM))) +#define ot_unused(x) ((td_void)(x)) + +#define OT_COMPAT_POINTER(ptr, type) \ + do { \ + td_u32 dest_addr_ = (td_u32)(td_uintptr_t)(ptr); \ + ptr = (type)(td_uintptr_t)dest_addr_; \ + } while (0) + +#define __MK_VERSION(x, y, z, p, b) #x "." #y "." #z "." #p " B0" #b +#define MK_VERSION(x, y, z, p, b) __MK_VERSION(x, y, z, p, b) +#define OT_MPP_VERSION OT_CHIP_NAME OT_MPP_VER_PRIX MK_VERSION(VER_X, VER_Y, VER_Z, VER_P, VER_B) VER_D + +#define OT_MAX_VERSION_NAME_LEN 64 +#define OT_INVALID_CHN (-1) +#define OT_INVALID_WAY (-1) +#define OT_INVALID_LAYER (-1) +#define OT_INVALID_DEV (-1) +#define OT_INVALID_HANDLE (-1) +#define OT_INVALID_VALUE (-1) +#define OT_INVALID_TYPE (-1) + +#define OT_MPP_MOD_VI "vi" +#define OT_MPP_MOD_VO "vo" +#define OT_MPP_MOD_VO_DEV "vo_dev" +#define OT_MPP_MOD_AVS "avs" +#define OT_MPP_MOD_HDMI "hdmi" +#define OT_MPP_MOD_VGS "vgs" +#define OT_MPP_MOD_GDC "gdc" +#define OT_MPP_MOD_DIS "dis" +#define OT_MPP_MOD_GYRODIS "gyrodis" +#define OT_MPP_MOD_CHNL "chnl" +#define OT_MPP_MOD_VENC "venc" +#define OT_MPP_MOD_VENC_MSG "venc_msg" +#define OT_MPP_MOD_VPSS "vpss" +#define OT_MPP_MOD_RGN "rgn" +#define OT_MPP_MOD_IVE "ive" +#define OT_MPP_MOD_FD "fd" +#define OT_MPP_MOD_MD "md" +#define OT_MPP_MOD_IVP "ivp" +#define OT_MPP_MOD_SVP "svp" +#define OT_MPP_MOD_SVP_NNIE "nnie" +#define OT_MPP_MOD_SVP_DSP "dsp" +#define OT_MPP_MOD_SVP_ALG "svp_alg" +#define OT_MPP_MOD_DPU_RECT "rect" +#define OT_MPP_MOD_DPU_MATCH "match" +#define OT_MPP_MOD_SVP_MAU "mau" +#define OT_MPP_MOD_H264E "h264e" +#define OT_MPP_MOD_H265E "h265e" +#define OT_MPP_MOD_JPEGE "jpege" +#define OT_MPP_MOD_MPEG4E "mpeg4e" +#define OT_MPP_MOD_VEDU "vedu" +#define OT_MPP_MOD_PRORES "prores" +#define OT_MPP_MOD_VDEC "vdec" +#define OT_MPP_MOD_H264D "h264d" +#define OT_MPP_MOD_JPEGD "jpegd" +#define OT_MPP_MOD_AI "ai" +#define OT_MPP_MOD_AO "ao" +#define OT_MPP_MOD_AENC "aenc" +#define OT_MPP_MOD_ADEC "adec" +#define OT_MPP_MOD_AIO "aio" +#define OT_MPP_MOD_ACODEC "acodec" +#define OT_MPP_MOD_AB "ab" +#define OT_MPP_MOD_VB "vb" +#define OT_MPP_MOD_VB_USER "vb_user" +#define OT_MPP_MOD_SYS "sys" +#define OT_MPP_MOD_SYS_USER "sys_user" +#define OT_MPP_MOD_CMPI "cmpi" +#define OT_MPP_MOD_PCIV "pciv" +#define OT_MPP_MOD_PCIVFMW "pcivfmw" +#define OT_MPP_MOD_PROC "proc" +#define OT_MPP_MOD_LOG "logmpp" +#define OT_MPP_MOD_LOG_USER "logmpp_user" +#define OT_MPP_MOD_LOG_MDC "logmpp_mdc" +#define OT_MPP_MOD_FB "fb" +#define OT_MPP_MOD_RC "rc" +#define OT_MPP_MOD_TDE "tde" +#define OT_MPP_MOD_ISP "isp" +#define OT_MPP_MOD_USR "usr" +#define OT_MPP_MOD_MCF "mcf" +#define OT_MPP_MOD_PM "pm" +#define OT_MPP_MOD_MFUSION "motionfusion" +#define OT_MPP_MOD_VDA "vda" +#define OT_MPP_MOD_VPP "vpp" +#define OT_MPP_MOD_KCF "kcf" +#define OT_MPP_MOD_PQP "pqp" +#define OT_MPP_MOD_SVP_NPU "svp_npu" +#define OT_MPP_MOD_NPU_DEV "npudev" +#define OT_MPP_MOD_NPU_AICPU "aicpu" +#define OT_MPP_MOD_NPU_DFX "npudfx" +#define OT_MPP_MOD_NPU_TSFW "tsfw" +#define OT_MPP_MOD_CIPHER "cipher" +#define OT_MPP_MOD_KLAD "klad" +#define OT_MPP_MOD_OTP "otp" +#define OT_MPP_MOD_DCC "dcc" +#define OT_MPP_MOD_VDEC_SERVERS "vdec_server" +#define OT_MPP_MOD_VDEC_ADAPT "vdec_adapt" +#define OT_MPP_MOD_VCA "vca" +#define OT_MPP_MOD_UVC "uvc" +#define OT_MPP_MOD_VI_RGBW "vi_rgbw" + +typedef struct { + td_char version[OT_MAX_VERSION_NAME_LEN]; +} ot_mpp_version; + +typedef td_s32 ot_ai_chn; +typedef td_s32 ot_ao_chn; +typedef td_s32 ot_aenc_chn; +typedef td_s32 ot_adec_chn; +typedef td_s32 ot_audio_dev; +typedef td_s32 ot_vi_dev; +typedef td_s32 ot_vi_pipe; +typedef td_s32 ot_vi_way; +typedef td_s32 ot_vi_chn; +typedef td_s32 ot_vi_grp; +typedef td_s32 ot_vo_dev; +typedef td_s32 ot_vo_layer; +typedef td_s32 ot_vo_chn; +typedef td_s32 ot_vo_wbc; +typedef td_s32 ot_gfx_layer; +typedef td_s32 ot_venc_chn; +typedef td_s32 ot_vdec_chn; +typedef td_s32 ot_ive_handle; +typedef td_s32 ot_fd_chn; +typedef td_s32 ot_md_chn; +typedef td_s32 ot_isp_dev; +typedef td_s32 ot_blk_dev; +typedef td_s32 ot_sensor_id; +typedef td_s32 ot_mipi_dev; +typedef td_s32 ot_slave_dev; +typedef td_s32 ot_svp_nnie_handle; +typedef td_s32 ot_svp_dsp_handle; +typedef td_s32 ot_svp_alg_chn; +typedef td_s32 ot_svp_mau_handle; +typedef td_s32 ot_vpss_grp; +typedef td_s32 ot_vpss_grp_pipe; +typedef td_s32 ot_vpss_chn; +typedef td_s32 ot_avs_grp; +typedef td_s32 ot_avs_pipe; +typedef td_s32 ot_avs_chn; +typedef td_s32 ot_mcf_grp; +typedef td_s32 ot_mcf_pipe; +typedef td_s32 ot_mcf_chn; +typedef td_s32 ot_vda_chn; +typedef td_s32 ot_pciv_chn; +typedef td_s32 ot_uvc_chn; + +typedef enum { + OT_ID_MEM = 0, + OT_ID_VB = 1, + OT_ID_SYS = 2, + OT_ID_RGN = 3, + OT_ID_BASE = 4, + OT_ID_VDEC = 5, + OT_ID_AVS = 6, + OT_ID_VPSS = 7, + OT_ID_VENC = 8, + OT_ID_SVP = 9, + OT_ID_H264E = 10, + OT_ID_JPEGE = 11, + OT_ID_H265E = 13, + OT_ID_JPEGD = 14, + OT_ID_VO = 15, + OT_ID_VI = 16, + OT_ID_DIS = 17, + OT_ID_CHNL = 18, + OT_ID_RC = 19, + OT_ID_AIO = 20, + OT_ID_AI = 21, + OT_ID_AO = 22, + OT_ID_AENC = 23, + OT_ID_ADEC = 24, + OT_ID_VPU = 25, + OT_ID_PCIV = 26, + OT_ID_PCIVFMW = 27, + OT_ID_ISP = 28, + OT_ID_IVE = 29, + OT_ID_USER = 30, + OT_ID_PROC = 33, + OT_ID_LOG = 34, + OT_ID_VFMW = 35, + OT_ID_GDC = 37, + OT_ID_PHOTO = 38, + OT_ID_FB = 39, + OT_ID_HDMI = 40, + OT_ID_VOIE = 41, + OT_ID_TDE = 42, + OT_ID_HDR = 43, + OT_ID_PRORES = 44, + OT_ID_VGS = 45, + OT_ID_VCA = 46, + OT_ID_FD = 47, + OT_ID_OD = 48, + OT_ID_LPR = 50, + OT_ID_SVP_NNIE = 51, + OT_ID_SVP_DSP = 52, + OT_ID_DPU_RECT = 53, + OT_ID_DPU_MATCH = 54, + + OT_ID_MOTIONSENSOR = 55, + OT_ID_MOTIONFUSION = 56, + + OT_ID_GYRODIS = 57, + OT_ID_PM = 58, + OT_ID_SVP_ALG = 59, + OT_ID_IVP = 60, + OT_ID_MCF = 61, + OT_ID_SVP_MAU = 62, + OT_ID_VDA = 63, + OT_ID_VPP = 64, + OT_ID_KCF = 65, + OT_ID_PQP = 66, + + OT_ID_NPUDEV = 67, + OT_ID_AICPU = 68, + OT_ID_NPUDFX = 69, + OT_ID_TSFW = 70, + + OT_ID_CIPHER = 71, + OT_ID_KLAD = 72, + OT_ID_KEYSLOT = 73, + OT_ID_OTP = 74, + OT_ID_VDEC_ADAPT = 75, + OT_ID_DCC = 76, + OT_ID_VDEC_SERVER = 77, + OT_ID_VFMW_MDC = 78, + OT_ID_VB_LOG = 79, + OT_ID_MCF_CALIBRATION = 80, + OT_ID_SVP_NPU = 81, + OT_ID_HNR = 82, + OT_ID_SNAP = 83, + OT_ID_LOG_MDC = 84, + OT_ID_VENC_SVR = 85, + OT_ID_AB = 86, + OT_ID_VO_DEV = 87, + OT_ID_IRQ = 88, + OT_ID_AIISP = 89, + OT_ID_UVC = 90, + OT_ID_VI_RGBW = 91, + OT_ID_ACODEC = 92, + OT_ID_BUTT, +} ot_mod_id; + +typedef struct { + ot_mod_id mod_id; + td_s32 dev_id; + td_s32 chn_id; +} ot_mpp_chn; + +/* We just copy this value of payload type from RTP/RTSP definition */ +typedef enum { + OT_PT_PCMU = 0, + OT_PT_1016 = 1, + OT_PT_G721 = 2, + OT_PT_GSM = 3, + OT_PT_G723 = 4, + OT_PT_DVI4_8K = 5, + OT_PT_DVI4_16K = 6, + OT_PT_LPC = 7, + OT_PT_PCMA = 8, + OT_PT_G722 = 9, + OT_PT_S16BE_STEREO = 10, + OT_PT_S16BE_MONO = 11, + OT_PT_QCELP = 12, + OT_PT_CN = 13, + OT_PT_MPEGAUDIO = 14, + OT_PT_G728 = 15, + OT_PT_DVI4_3 = 16, + OT_PT_DVI4_4 = 17, + OT_PT_G729 = 18, + OT_PT_G711A = 19, + OT_PT_G711U = 20, + OT_PT_G726 = 21, + OT_PT_G729A = 22, + OT_PT_LPCM = 23, + OT_PT_CelB = 25, + OT_PT_JPEG = 26, + OT_PT_CUSM = 27, + OT_PT_NV = 28, + OT_PT_PICW = 29, + OT_PT_CPV = 30, + OT_PT_H261 = 31, + OT_PT_MPEGVIDEO = 32, + OT_PT_MPEG2TS = 33, + OT_PT_H263 = 34, + OT_PT_SPEG = 35, + OT_PT_MPEG2VIDEO = 36, + OT_PT_AAC = 37, + OT_PT_WMA9STD = 38, + OT_PT_HEAAC = 39, + OT_PT_PCM_VOICE = 40, + OT_PT_PCM_AUDIO = 41, + OT_PT_MP3 = 43, + OT_PT_ADPCMA = 49, + OT_PT_AEC = 50, + OT_PT_X_LD = 95, + OT_PT_H264 = 96, + OT_PT_D_GSM_HR = 200, + OT_PT_D_GSM_EFR = 201, + OT_PT_D_L8 = 202, + OT_PT_D_RED = 203, + OT_PT_D_VDVI = 204, + OT_PT_D_BT656 = 220, + OT_PT_D_H263_1998 = 221, + OT_PT_D_MP1S = 222, + OT_PT_D_MP2P = 223, + OT_PT_D_BMPEG = 224, + OT_PT_MP4VIDEO = 230, + OT_PT_MP4AUDIO = 237, + OT_PT_VC1 = 238, + OT_PT_JVC_ASF = 255, + OT_PT_D_AVI = 256, + OT_PT_DIVX3 = 257, + OT_PT_AVS = 258, + OT_PT_REAL8 = 259, + OT_PT_REAL9 = 260, + OT_PT_VP6 = 261, + OT_PT_VP6F = 262, + OT_PT_VP6A = 263, + OT_PT_SORENSON = 264, + OT_PT_H265 = 265, + OT_PT_VP8 = 266, + OT_PT_MVC = 267, + OT_PT_PNG = 268, + /* add by vendor */ + OT_PT_AMR = 1001, + OT_PT_MJPEG = 1002, + OT_PT_AMRWB = 1003, + OT_PT_PRORES = 1006, + OT_PT_OPUS = 1007, + OT_PT_BUTT +} ot_payload_type; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* end of #ifdef __cplusplus */ + +#endif /* OT_COMMON_H */ diff --git a/kernel/include/hi3519dv500/ot_common_isp.h b/kernel/include/hi3519dv500/ot_common_isp.h new file mode 100644 index 0000000..d983d6b --- /dev/null +++ b/kernel/include/hi3519dv500/ot_common_isp.h @@ -0,0 +1,3033 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_ISP_H +#define OT_COMMON_ISP_H + +#include "ot_type.h" +#include "ot_errno.h" +#include "ot_common.h" +#include "ot_isp_debug.h" +#include "ot_common_video.h" +#include "ot_isp_define.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* MACRO DEFINITION */ +#define ot_isp_res_width_max(dev) (isp_get_max_width(dev)) +#define ot_isp_res_height_max(dev) (isp_get_max_height(dev)) +#define OT_ISP_WIDTH_MIN 120 +#define OT_ISP_HEIGHT_MIN 88 +#define OT_ISP_ALIGN_WIDTH 4 +#define OT_ISP_ALIGN_HEIGHT 4 +#define OT_ISP_FRAME_RATE_MAX 65535.0 + +#define OT_ISP_BE_BUF_NUM_MIN 2 + +#define OT_ISP_VREG_MAX_NUM 16 + +#define OT_ISP_AE_ZONE_ROW 15 +#define OT_ISP_AE_ZONE_COLUMN 17 +#define OT_ISP_AE_PLANE_NUM 4 +#define OT_ISP_MG_ZONE_ROW 15 +#define OT_ISP_MG_ZONE_COLUMN 17 +#define OT_ISP_AWB_ZONE_NUM (OT_ISP_AWB_ZONE_ORIG_ROW * OT_ISP_AWB_ZONE_ORIG_COLUMN) +#define OT_ISP_AWB_ZONE_STITCH_MAX (OT_ISP_AWB_ZONE_NUM * OT_ISP_MAX_STITCH_NUM) +#define OT_ISP_AF_ZONE_ROW 15 +#define OT_ISP_AF_ZONE_COLUMN 17 +#define OT_ISP_MAX_AWB_LIB_NUM (OT_ISP_AWB_LIB_NUM) +#define OT_ISP_MAX_AE_LIB_NUM (OT_ISP_AE_LIB_NUM) + +#define OT_ISP_AE_MIN_WIDTH 256 +#define OT_ISP_AE_MIN_HEIGHT 120 + +#define OT_ISP_AWB_MIN_WIDTH 20 +#define OT_ISP_AWB_MIN_HEIGHT 15 +#define OT_ISP_AWB_ZONE_MAX_WIDTH 1024 +#define OT_ISP_AWB_ZONE_MAX_HEIGHT 1024 + +#define OT_ISP_AF_MIN_WIDTH 256 +#define OT_ISP_AF_MIN_HEIGHT 120 +#define OT_ISP_AF_ALIGN_WIDTH 8 +#define OT_ISP_AF_ALIGN_HEIGHT 2 +#define OT_ISP_AF_PLGS_NUM 2 + +#define OT_ISP_GAMMA_NODE_NUM 1025 +#define OT_ISP_PREGAMMA_NODE_NUM 257 +#define OT_ISP_SCALE_MIN 204 +#define OT_ISP_SCALE_MAX 5120 + +#define OT_ISP_AUTO_ISO_NUM 16 +#define OT_ISP_SHARPEN_LUMA_NUM 32 +#define OT_ISP_SHARPEN_GAIN_NUM 32 + +#define OT_ISP_MAX_SNS_REGS 32 + +#define OT_ISP_MLSC_X_HALF_GRID_NUM ((OT_ISP_LSC_GRID_COL - 1) / 2) +#define OT_ISP_MLSC_Y_HALF_GRID_NUM ((OT_ISP_LSC_GRID_ROW - 1) / 2) +#define OT_ISP_MLSC_GAIN_LUT_NUM 2 +#define OT_ISP_ACS_LIGHT_NUM 32 +#define OT_ISP_ACS_CHN_NUM 2 + +#define OT_ISP_WDR_MAX_FRAME_NUM 4 + +#define OT_ISP_CSC_DC_NUM 3 +#define OT_ISP_CSC_COEF_NUM 9 + +#define OT_ISP_BAYER_CALIBTAION_MAX_NUM 50 +#define OT_ISP_AI_MAX_STEP_FNO_NUM 1024 +#define OT_ISP_BAYER_GE_LUT_NUM 129 + +#define OT_ISP_BAYERNR_LUT_LENGTH 33 +#define OT_ISP_BAYERNR_LUT_LENGTH1 32 +#define OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM 16 +#define OT_ISP_PRO_MAX_FRAME_NUM 8 +#define OT_ISP_RGB_CHN_NUM 3 + +#define OT_ISP_DEMOSAIC_LUT_LENGTH 17 +#define OT_ISP_DEMOSAIC_AIDM_LUT_NUM 128 +#define OT_ISP_BAYER_CHN_NUM 4 +#define OT_ISP_CHN_R 0 +#define OT_ISP_CHN_GR 1 +#define OT_ISP_CHN_GB 2 +#define OT_ISP_CHN_B 3 + +#define OT_ISP_DRC_LMIX_NODE_NUM 33 +#define OT_ISP_DRC_EXP_COMP_SAMPLE_NUM 8 +#define OT_ISP_DRC_SHP_LOG_CONFIG_NUM 16 + +#define OT_ISP_DEHAZE_LUT_SIZE 256 +#define OT_ISP_WDR_RATIO_NUM 10 + +#define OT_ISP_LCAC_EXP_RATIO_NUM 16 +#define OT_ISP_LCAC_DET_NUM 3 + +#define OT_ISP_CAC_EXP_RATIO_NUM 16 +#define OT_ISP_CAC_THR_NUM 2 +#define OT_ISP_CAC_CURVE_NUM 3 + +#define OT_ISP_BSHP_LUMA_WGT_NUM 32 +#define OT_ISP_BSHP_HALF_CURVE_NUM 32 +#define OT_ISP_BSHP_CURVE_NUM 8 +#define OT_ISP_BSHP_THD_NUM 2 + +#define OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE (-2) + +/* DEFAULT VALUE OF GLOBAL REGISTERS DEFINED HERE */ +/* AE */ +#define OT_ISP_TOP_RGGB_START_R_GR_GB_B 0 +#define OT_ISP_TOP_RGGB_START_GR_R_B_GB 1 +#define OT_ISP_TOP_RGGB_START_GB_B_R_GR 2 +#define OT_ISP_TOP_RGGB_START_B_GB_GR_R 3 + +/* AWB */ +#define OT_ISP_AWB_OFFSET_COMP_DEF 0 +#define OT_ISP_CCM_COLORTONE_EN_DEFAULT 1 +#define OT_ISP_CCM_COLORTONE_RGAIN_DEFAULT 256 +#define OT_ISP_CCM_COLORTONE_BGAIN_DEFAULT 256 +#define OT_ISP_CCM_COLORTONE_GGAIN_DEFAULT 256 + +#define OT_ISP_CCM_PROT_EN_DEFAULT 0 +#define OT_ISP_CCM_RECOVER_EN_DEFAULT 1 +#define OT_ISP_CCM_MATRIX_SIZE 9 +#define OT_ISP_CCM_MATRIX_NUM 7 +#ifdef CONFIG_SD3403V100 +#define OT_ISP_DRC_RG_BG_CTR_NODE_NUM 12 +#endif +/* GENERAL STRUCTURES */ +/* + * ISP Error Code + * 0x40 : ISP_NOT_INIT + * 0x41 : ISP_MEM_NOT_INIT + * 0x42 : ISP_ATTR_NOT_CFG + * 0x43 : ISP_SNS_UNREGISTER + * 0x44 : ISP_INVALID_ADDR + * 0x45 : ISP_NOMEM + * 0x46 : ISP_NO_INT + */ +typedef enum { + OT_ERR_ISP_NOT_INIT = 0x40, /* ISP not init */ + OT_ERR_ISP_MEM_NOT_INIT = 0x41, /* ISP memory not init */ + OT_ERR_ISP_ATTR_NOT_CFG = 0x42, /* ISP attribute not cfg */ + OT_ERR_ISP_SNS_UNREGISTER = 0x43, /* ISP sensor unregister */ + OT_ERR_ISP_INVALID_ADDR = 0x44, /* ISP invalid address */ + OT_ERR_ISP_NOMEM = 0x45, /* ISP nomem */ + OT_ERR_ISP_NO_INT = 0x46, /* ISP */ + OT_ERR_ISP_ALG_NOT_INIT = 0x47, /* ISP alg not init */ +} ot_isp_err_code; + +#define OT_ERR_ISP_NULL_PTR OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_NULL_PTR) +#define OT_ERR_ISP_ILLEGAL_PARAM OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ILLEGAL_PARAM) +#define OT_ERR_ISP_NOT_SUPPORT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_SUPPORT) + +#define OT_ERR_ISP_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NOT_INIT) +#define OT_ERR_ISP_MEM_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_MEM_NOT_INIT) +#define OT_ERR_ISP_ATTR_NOT_CFG OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_ATTR_NOT_CFG) +#define OT_ERR_ISP_SNS_UNREGISTER OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_SNS_UNREGISTER) +#define OT_ERR_ISP_INVALID_ADDR OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_INVALID_ADDR) +#define OT_ERR_ISP_NOMEM OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NOMEM) +#define OT_ERR_ISP_NO_INT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NO_INT) +#define OT_ERR_ISP_ALG_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_ALG_NOT_INIT) +/* Defines the structure of ISP module parameters. */ +typedef struct { + td_u32 interrupt_bottom_half; /* RW;Range:[0, 1]; Format:32.0; Indicate ISP interrupt bottom half, + No distinction vipipe */ +} ot_isp_mod_param; + +/* Defines the structure of ISP control parameters. */ + +typedef enum { + OT_ISP_UPDATE_OB_STATS_FE_FRAME_END = 0, /* delay 1 frame */ + OT_ISP_UPDATE_OB_STATS_FE_FRAME_START = 1, /* delay 2 frame */ + OT_ISP_UPDATE_OB_STATS_BUTT, +} ot_isp_ob_stats_update_pos; + +typedef enum { + OT_ISP_ALG_RUN_NORM = 0, + OT_ISP_ALG_RUN_FE_ONLY = 1, + OT_ISP_ALG_RUN_BUTT, +} ot_isp_alg_run_select; + +typedef enum { + OT_ISP_RUN_WAKEUP_FE_START = 0, + OT_ISP_RUN_WAKEUP_BE_END = 1, + OT_ISP_RUN_WAKEUP_BUTT, +} ot_isp_run_wakeup_select; + +typedef struct { + td_u8 be_buf_num; /* RW;Range:[2, 20]; offline be cfg buffer number(Only used for offline mode). + Not support changed after isp init */ + td_u32 proc_param; /* RW;Format:32.0; Indicate the update frequency of ISP_PROC information, + No distinction vipipe */ + td_u32 stat_interval; /* RW;Range:(0, 0xffffffff];Format:32.0; + Indicate the time interval of ISP statistic information */ + td_u32 update_pos; /* RW;Range:[0, 1]; Format:32.0; Indicate the location of the configuration register of + ISP interrupt */ + td_u32 interrupt_time_out; /* RW;Format:32.0; Indicate the time(unit:ms) of interrupt timeout */ + td_u32 pwm_num; /* RW;Format:32.0; Indicate PWM number */ + td_u32 port_interrupt_delay; /* RW;Format:32.0; Port intertupt delay value, unit:clk */ + td_bool ldci_tpr_flt_en; /* RW;Range:[0, 1]; Indicate Enable LDCI temporal filter. Not support changed after + isp init */ + ot_isp_ob_stats_update_pos ob_stats_update_pos; /* RW;Range:[0, 1]; Indicate the location of reading ob orea + statistics. Not support changed after isp init */ + ot_isp_alg_run_select alg_run_select; /* RW;Range:[0, 1]; Indicate the algorithm of isp register and run. + Not support changed after isp init */ + ot_isp_run_wakeup_select isp_run_wakeup_select; /* RW;Range:[0, 1]; Indicate the isp software is drived by which + interrupt, FE_START or BE_END */ + td_bool quick_start_en; /* RW;Range:[0, 1]; Indicate ISP Quick Start. */ + td_bool long_frame_interrupt_en; /* RW;Range:[0, 1]; when wdr mode enable/disable long frame pipe interrupt. */ +} ot_isp_ctrl_param; + +/* + * Defines the prior frame of ISP + * 0 = long frame + * 1 = short frame + */ +typedef enum { + OT_ISP_LONG_FRAME = 0, + OT_ISP_SHORT_FRAME = 1, + OT_ISP_PRIOR_FRAME_BUTT +} ot_isp_prior_frame; + +/* + * Defines the ISP correction or detection status + * 0 = initial status, no calibration + * 1 = The static defect pixel calibration ends normally + * 2 = The static defect pixel calibration ends due to timeout. + */ +typedef enum { + OT_ISP_STATE_INIT = 0, + OT_ISP_STATE_SUCCESS = 1, + OT_ISP_STATE_TIMEOUT = 2, + OT_ISP_STATE_BUTT +} ot_isp_status; + +typedef struct { + ot_op_mode op_type; + td_u8 overlap; /* RW; Range:[1,16] */ + td_s32 offset[OT_ISP_BAYER_CHN_NUM]; /* RW;Range:[-0x3FFF, 0x3FFF];Format:15.0; + Black level differences between the offset value */ + td_u32 gain[OT_ISP_BAYER_CHN_NUM]; /* RW;Range:[0x80, 0x400];Format:4.8; The gain difference ratio */ + td_u16 color_matrix[OT_ISP_CCM_MATRIX_SIZE]; /* RW;Range:[0x0, 0xFFFF];Format:8.8; Color correction matrix */ +} ot_isp_pipe_diff_attr; + +/* Defines the format of the input Bayer image */ +typedef enum { + OT_ISP_BAYER_RGGB = 0, + OT_ISP_BAYER_GRBG = 1, + OT_ISP_BAYER_GBRG = 2, + OT_ISP_BAYER_BGGR = 3, + OT_ISP_BAYER_BUTT +} ot_isp_bayer_format; + +/* Defines the bitwidth of the input Bayer image, used for lsc online calibration */ +typedef enum { + OT_ISP_BAYER_RAW_BIT_8BIT = 8, + OT_ISP_BAYER_RAW_BIT_10BIT = 10, + OT_ISP_BAYER_RAW_BIT_12BIT = 12, + OT_ISP_BAYER_RAW_BIT_14BIT = 14, + OT_ISP_BAYER_RAW_BIT_16BIT = 16, + OT_ISP_BAYER_RAW_BIT_BUTT +} ot_isp_bayer_raw_bit; + +/* MIPI attribute, contains the mipi crop attribute */ +typedef struct { + td_bool mipi_crop_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable mipi crop */ + ot_rect mipi_crop_offset; /* RW; start position of the mipi crop window, image width and height */ +} ot_mipi_crop_attr; + +/* ISP public attribute, contains the public image attribute */ +typedef struct { + ot_rect wnd_rect; /* RW; start position of the cropping window, image width, and image height */ + ot_size sns_size; /* RW; width and height of the image output from the sensor */ + td_float frame_rate; /* RW; Range: [0, 0xFFFF]; for frame rate */ + ot_isp_bayer_format bayer_format; /* RW; Range:[0,3] ;Format:2.0;the format of the input bayer image */ + ot_wdr_mode wdr_mode; /* RW; WDR mode select */ + td_u8 sns_mode; /* RW; Range: [0, 0xFF]; Format: 8.0; for special sensor mode switches */ + td_bool sns_flip_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable sensor flip */ + td_bool sns_mirror_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable sensor mirror */ + ot_mipi_crop_attr mipi_crop_attr; /* RW; mipi crop window attr, enable/disable mipi crop */ +} ot_isp_pub_attr; + +/* Slave mode sensor sync signal generate module */ +typedef struct { + union { + struct { + td_u32 bit16_reserved : 16; + td_u32 bit_h_inv : 1; + td_u32 bit_v_inv : 1; + td_u32 bit12_reserved : 12; + td_u32 bit_h_enable : 1; + td_u32 bit_v_enable : 1; + } bits; + td_u32 bytes; + } cfg; + + td_u32 vs_time; + td_u32 hs_time; + td_u32 vs_cyc; + td_u32 hs_cyc; + td_u32 hs_dly_cyc; + td_u32 slave_mode_time; +} ot_isp_slave_sns_sync; + +/* Defines the ISP stitch attribute. */ +/* + * Defines the ISP firmware status + * 0 = Running status + * 1 = Frozen status + */ +typedef enum { + OT_ISP_FMW_STATE_RUN = 0, + OT_ISP_FMW_STATE_FREEZE, + OT_ISP_FMW_STATE_BUTT +} ot_isp_fmw_state; + +/* Defines the WDR mode of the ISP */ +typedef struct { + ot_wdr_mode wdr_mode; +} ot_isp_wdr_mode; + +typedef union { + td_u64 key; + struct { + td_u64 bit_bypass_isp_d_gain : 1; /* RW;[0] */ + td_u64 bit_bypass_anti_false_color : 1; /* RW;[1] */ + td_u64 bit_bypass_crosstalk_removal : 1; /* RW;[2] */ + td_u64 bit_bypass_dpc : 1; /* RW;[3] */ + td_u64 bit_bypass_nr : 1; /* RW;[4] */ + td_u64 bit_bypass_dehaze : 1; /* RW;[5] */ + td_u64 bit_bypass_wb_gain : 1; /* RW;[6] */ + td_u64 bit_bypass_mesh_shading : 1; /* RW;[7] */ + td_u64 bit_bypass_drc : 1; /* RW;[8] */ + td_u64 bit_bypass_demosaic : 1; /* RW;[9] */ + td_u64 bit_bypass_color_matrix : 1; /* RW;[10] */ + td_u64 bit_bypass_gamma : 1; /* RW;[11] */ + td_u64 bit_bypass_fswdr : 1; /* RW;[12] */ + td_u64 bit_bypass_ca : 1; /* RW;[13] */ + td_u64 bit_bypass_csc : 1; /* RW;[14] */ + td_u64 bit_bypass_radial_crop : 1; /* RW;[15] */ + td_u64 bit_bypass_sharpen : 1; /* RW;[16] */ + td_u64 bit_bypass_bayer_sharpen : 1; /* RW;[17] */ + td_u64 bit_bypass_cac : 1; /* RW;[18]; */ + td_u64 bit2_chn_select : 2; /* RW;[19:20] */ + td_u64 bit_bypass_ldci : 1; /* RW;[21] */ + td_u64 bit_bypass_pregamma : 1; /* RW;[22], not support for Hi3519DV500 */ + td_u64 bit_bypass_ae_stat_fe : 1; /* RW;[23] */ + td_u64 bit_bypass_ae_stat_be : 1; /* RW;[24] */ + td_u64 bit_bypass_mg_stat : 1; /* RW;[25] */ + td_u64 bit_bypass_af_stat_fe : 1; /* RW;[26] */ + td_u64 bit_bypass_af_stat_be : 1; /* RW;[27] */ + td_u64 bit_bypass_awb_stat : 1; /* RW;[28] */ + td_u64 bit_bypass_clut : 1; /* RW;[29] */ + td_u64 bit_bypass_rgbir : 1; /* RW;[30], not support for Hi3519DV500 */ + td_u64 bit_bypass_lblc : 1; /* RW;[31] */ + td_u64 bit_reserved32 : 32; /* H; [32:63] */ + }; +} ot_isp_module_ctrl; + +/* + * Defines the RAW stream Position from the ISP + * 0 = the data is writing out after all isp module. + * 1 = the raw data is writing out after the WDR module. + */ +typedef enum { + OT_ISP_DUMP_FRAME_POS_NORMAL = 0, + OT_ISP_DUMP_FRAME_POS_AFTER_WDR = 1, + OT_ISP_DUMP_FRAME_POS_BUTT +} ot_isp_dump_frame_pos; + +/* + * Defines the dump frame Position from the ISP. + */ +typedef struct { + ot_isp_dump_frame_pos frame_pos; +} ot_isp_be_frame_attr; + +/* + * Defines the ISP WDR merge mode. + * 0 = WDR mode is used + * 1 = Fusion mode is used + */ +typedef enum { + OT_ISP_MERGE_WDR_MODE = 0, + OT_ISP_MERGE_FUSION_MODE = 1, + OT_ISP_MERGE_BUTT +} ot_isp_wdr_merge_mode; + +typedef enum { + OT_ISP_BNR_EX = 0, + OT_ISP_BNR_NORM = 1, +} ot_isp_bnr_sfm0_mode; + +typedef enum { + OT_ISP_WDR_WBGAIN_IN_DG1 = 0, + OT_ISP_WDR_WBGAIN_IN_WB = 1, + OT_ISP_WDR_WBGAIN_POS_BUTT +} ot_isp_wdr_wb_gain_pos; + +typedef struct { + td_u8 md_thr_low_gain; /* RW;Range:[0x0,0xFF];Format:8.0 */ + td_u8 md_thr_hig_gain; /* RW;Range:[0x0,0xFF];Format:8.0 */ +} ot_isp_fswdr_manual_attr; + +typedef struct { + td_u8 md_thr_low_gain[OT_ISP_WDR_RATIO_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0xFF];Format:8.0 */ + td_u8 md_thr_hig_gain[OT_ISP_WDR_RATIO_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0xFF];Format:8.0 */ +} ot_isp_fswdr_auto_attr; + +typedef struct { + td_bool short_expo_chk; /* RW;Range:[0x0,0x1];Format:1.0; */ + td_u16 short_check_threshold; /* RW;Range:[0x0,0xFFF];Format:12.0 */ + td_bool md_ref_flicker; + td_u8 mdt_still_threshold; /* RW;Range:[0x0,0xFE];Format:8.0 */ + td_u8 mdt_full_threshold; /* RW;Range:[0x0,0xFE];Format:8.0 */ + td_u8 mdt_long_blend; /* RW;Range:[0x0,0xFE] */ + ot_op_mode op_type; + ot_isp_fswdr_manual_attr manual_attr; + ot_isp_fswdr_auto_attr auto_attr; +} ot_isp_fswdr_mdt_attr; + +typedef struct { + td_bool motion_comp; /* RW;Range:[0, 0x1];Format:1.0; enable/disable motion compensation */ + td_u16 short_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data above this threshold will be taken from + short exposure only. */ + td_u16 long_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; limited range:[0x0, short_threshold], + data below this threshold will be taken from long exposure only. */ + td_bool force_long; /* RW;Range:[0, 1];Format:1.0; enable/disable force long */ + td_u16 force_long_low_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data above this threshold will force to choose + long frame only */ + td_u16 force_long_hig_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data below this threshold will force to choose + long frame only */ + ot_isp_fswdr_mdt_attr wdr_mdt; +} ot_isp_wdr_combine_attr; + +typedef struct { + td_bool fusion_blend_en; + td_u8 fusion_blend_wgt; /* RW; Range: [0, 16] */ + td_u16 fusion_threshold[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range: [0x0, 0xFFF] */ + td_bool fusion_force_gray_en; + td_u8 fusion_force_blend_threshold; /* RW; Range: [0, 15] */ +} ot_isp_fusion_attr; + +typedef struct { + ot_isp_wdr_merge_mode wdr_merge_mode; + ot_isp_wdr_combine_attr wdr_combine; + ot_isp_fusion_attr fusion_attr; +} ot_isp_wdr_fs_attr; + +typedef struct { + td_u8 asymmetry; /* RW; Range:[ 1, 30]; Parameter0 of DRC asymmetry tone mapping curve */ + td_u8 second_pole; /* RW; Range:[150, 210]; Parameter1 of DRC asymmetry tone mapping curve */ + td_u8 stretch; /* RW; Range:[ 30, 60]; Parameter2 of DRC asymmetry tone mapping curve */ + td_u8 compress; /* RW; Range:[100, 200]; Parameter3 of DRC asymmetry tone mapping curve */ +} ot_isp_drc_asymmetry_curve_attr; + +typedef struct { + td_u16 strength; /* RW; Range:[0x0, 0x3FF]; DRC manual strength */ +} ot_isp_drc_manual_attr; + +typedef struct { + td_u16 strength; /* RW; Range:[0x0, 0x3FF]; Base strength for strength adaptation in auto mode. + The actual DRC strength is calculated automatically by firmware: + 1) linear mode, auto strength = f1(strength, histogram) + 2) sensor built-in WDR mode: auto strength = f2(strength, histogram) + 3) FS WDR mode: auto strength = f3(strength, exp_ratio) */ + td_u16 strength_max; /* RW; Range:[0x0, 0x3FF]; uppper limit of firmware calculated strength */ + td_u16 strength_min; /* RW; Range:[0x0, 0x3FF]; lower limit of firmware calculated strength */ +} ot_isp_drc_auto_attr; + +/* DRC curve type: 0 = Asymmetry curve, 1 = User-defined curve */ +typedef enum { + OT_ISP_DRC_CURVE_ASYMMETRY = 0x0, + OT_ISP_DRC_CURVE_USER, + OT_ISP_DRC_CURVE_BUTT +} ot_isp_drc_curve_select; + +typedef struct { + td_bool enable; + ot_isp_drc_curve_select curve_select; /* RW; Range:[0x0, 0x1]; Tone mapping curve selection */ + td_u8 purple_reduction_strength; /* RW; Range:[0x0, 0x80]; Purple detection and reduction strength */ + td_u8 bright_gain_limit; /* RW; Range:[0x0, 0xF]; Bright area gain limit */ + td_u8 bright_gain_limit_step; /* RW; Range:[0x0, 0xF]; Bright area gain high limit step */ + td_u8 dark_gain_limit_luma; /* RW; Range:[0x0, 0x85]; Dark area luma gain limit */ + td_u8 dark_gain_limit_chroma; /* RW; Range:[0x0, 0x85]; Dark area chroma gain limit */ + td_u8 contrast_ctrl; /* RW; Range:[0x0, 0xF]; Format:4.0; Contrast control, smaller value yields better contrast */ + td_u8 rim_reduction_strength; /* RW; Range:[0x0, 0x40]; Gradient reversal (rim) reduction strength */ + td_u8 rim_reduction_threshold; /* RW; Range:[0x0, 0x80]; Gradient reversal (rim) reduction threshold */ + td_u16 color_correction_lut[OT_ISP_DRC_CC_NODE_NUM]; /* RW; Range:[0x0, 0x400]; + LUT of color correction coefficients */ + td_u16 tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM]; /* RW; Range:[0x0, 0xffff]; LUT of user-defined curve */ + td_u8 spatial_filter_coef; /* RW; Range:[0x0, 0x5]; Spatial filter coefficients */ + td_u8 range_filter_coef; /* RW; Range:[0x0, 0xA]; Range filter coefficients */ + td_u8 detail_adjust_coef; /* RW; Range:[0x0, 0xF]; Detail adjust coefficient */ + td_u8 local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM]; /* RW; Range:[0x0, 0x80]; + LUT of enhancement coefficients for positive details */ + td_u8 local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM]; /* RW; Range:[0x0, 0x80]; + LUT of enhancement coefficients for negative details */ + td_u8 high_saturation_color_ctrl; /* RW; Range:[0x0, 0xF]; High saturation color control */ + td_u8 global_color_ctrl; /* RW; Range:[0x0, 0xF]; global color control */ + + td_bool shoot_reduction_en; /* RW; Range:[0x0, 0x1]; shoot reduction enable */ + + ot_op_mode op_type; + ot_isp_drc_manual_attr manual_attr; + ot_isp_drc_auto_attr auto_attr; + ot_isp_drc_asymmetry_curve_attr asymmetry_curve; +} ot_isp_drc_attr; + +#define OT_ISP_EXPANDER_POINT_NUM_MAX (OT_ISP_EXPANDER_NODE_NUM - 1) + +typedef struct { + td_bool enable; + td_u8 bit_depth_in; /* RW;Range:[0xC, 0x14];Format:5.0;The Bit depth of input. + bit_depth_in must be an even number */ + td_u8 bit_depth_out; /* RW;Range:[0xC, 0x14];Format:5.0;The Bit depth of output. + bit_depth_out must be an even number */ + td_u16 knee_point_num; /* Range:[1, 256]; Format:9.0; the number of knee point */ + ot_point knee_point_coord[OT_ISP_EXPANDER_POINT_NUM_MAX]; /* RW; Range: x:[0x0, 0x100], y:[0x0, 0x100000]; + The coordinate of knee point. + The coordinate must be monotonically increasing */ +} ot_isp_expander_attr; + +typedef struct { + td_u8 wgt; /* RW;Range: [0x0, 0xFF]; + Format:1.7;Weight of Gaussian distribution */ + td_u8 sigma; /* RW;Range: [0x1, 0xFF];Format:0.8;Sigma of Gaussian distribution */ + td_u8 mean; /* RW;Range: [0x0, 0xFF];Format:0.8;Mean of Gaussian distribution */ +} ot_isp_ldci_gauss_coef_attr; + +typedef struct { + ot_isp_ldci_gauss_coef_attr he_pos_wgt; + ot_isp_ldci_gauss_coef_attr he_neg_wgt; +} ot_isp_ldci_he_wgt_attr; + +typedef struct { + ot_isp_ldci_he_wgt_attr he_wgt; + td_u16 blc_ctrl; /* RW;Range: [0x0, 0x1FF];Format:9.0;Restrain dark region */ +} ot_isp_ldci_manual_attr; + +typedef struct { + ot_isp_ldci_he_wgt_attr he_wgt[OT_ISP_AUTO_ISO_NUM]; + td_u16 blc_ctrl[OT_ISP_AUTO_ISO_NUM]; /* RW;Range: [0x0, 0x1FF];Format:9.0;auto mode, + Restrain dark region */ +} ot_isp_ldci_auto_attr; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; */ + td_u8 gauss_lpf_sigma; /* RW;Range: [0x1, 0xFF];Format:0.8; + Coefficient of Gaussian low-pass filter */ + ot_op_mode op_type; + ot_isp_ldci_manual_attr manual_attr; + ot_isp_ldci_auto_attr auto_attr; + td_u16 tpr_incr_coef; /* RW;Range: [0x0, 0x100];Format:0.9; + Increase Coefficient of temporal filter */ + td_u16 tpr_decr_coef; /* RW;Range: [0x0, 0x100];Format:0.9; + Decrease Coefficient of temporal filter */ +} ot_isp_ldci_attr; + +/* + defines CA type + 0 = enable Ca module + 1 = enable Cp module + */ +typedef enum { + OT_ISP_CA_ENABLE = 0x0, + OT_ISP_CP_ENABLE, + OT_ISP_CA_BUTT +} ot_isp_ca_type; + +typedef struct { + td_u32 y_ratio_lut[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,2047];Format:1.11 */ + td_s32 iso_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0,2047];Format:1.10 */ + td_u32 y_sat_lut[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,2047];Format:1.11 */ +} ot_isp_ca_lut; + +typedef struct { + td_u8 cp_lut_y[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ + td_u8 cp_lut_u[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ + td_u8 cp_lut_v[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ +} ot_isp_cp_lut; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0 */ + ot_isp_ca_type ca_cp_en; + ot_isp_ca_lut ca; + ot_isp_cp_lut cp; +} ot_isp_ca_attr; + +/* CSC */ +typedef struct { + td_s16 csc_in_dc[OT_ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; + Input dc component for csc matrix */ + td_s16 csc_out_dc[OT_ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; + Output dc component for csc matrix */ + td_s16 csc_coef[OT_ISP_CSC_COEF_NUM]; /* RW; Range:[-4096, 4095]; Format: 5.10; 3x3 coefficients for csc matrix */ +} ot_isp_csc_matrx; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ + ot_color_gamut color_gamut; /* RW; Range: [0, 3]; Color gamut type; Not Support COLOR_GAMUT_BT2020 */ + td_u8 hue; /* RW; Range:[0, 100];Format:8.0; Csc Hue Value */ + td_u8 luma; /* RW; Range:[0, 100];Format:8.0; Csc Luma Value */ + td_u8 contr; /* RW; Range:[0, 100];Format:8.0; Csc Contrast Value */ + td_u8 satu; /* RW; Range:[0, 100];Format:8.0; Csc Saturation Value */ + td_bool limited_range_en; /* RW; Range: [0x0, 0x1]; + Enable/Disable: Enable Limited range output mode(default full range output) */ + td_bool ext_csc_en; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable extended luma range */ + td_bool ct_mode_en; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable ct mode */ + ot_isp_csc_matrx csc_magtrx; /* RW; Color Space Conversion matrix */ +} ot_isp_csc_attr; + +/* CLUT */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function */ + td_u32 gain_r; /* RW; Range:[0, 4095];Format:12.0 */ + td_u32 gain_g; /* RW; Range:[0, 4095];Format:12.0 */ + td_u32 gain_b; /* RW; Range:[0, 4095];Format:12.0 */ +} ot_isp_clut_attr; + +/* CLUT LUT */ +typedef struct { + td_u32 lut[OT_ISP_CLUT_LUT_LENGTH]; /* RW; Range: [0, 1073741823] */ +} ot_isp_clut_lut; + +/* + * Defines the type of static defect pixel calibration + * 0 = bright defect pixel calibration + * 1 = dark defect pixel calibration + */ +typedef enum { + OT_ISP_STATIC_DP_BRIGHT = 0x0, + OT_ISP_STATIC_DP_DARK, + OT_ISP_STATIC_DP_BUTT +} ot_isp_static_dp_type; + +typedef struct { + td_bool enable_detect; /* RW; Range: [0, 1];Format 1.0;Set 'TD_TRUE'to start static defect-pixel + calibration, and firmware will set 'TD_FALSE' when finished */ + ot_isp_static_dp_type static_dp_type; /* RW; Range: [0, 1];Format 1.0;Select static bright/dark defect-pixel + calibration */ + td_u8 start_thresh; /* RW; Range: [1, 255]; Format 8.0;Start threshold for static defect-pixel calibraiton */ + td_u16 count_max; /* RW; Range:Hi3519DV500 = (0, 6144]; + Format 14.0; limited Range: (0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + Limit of max number of static defect-pixel calibraiton */ + td_u16 count_min; /* RW; Range:Hi3519DV500 = [0, 6144);Format 14.0; limited Range: [0, count_max), + Limit of min number of static defect-pixel calibraiton */ + td_u16 time_limit; /* RW; Range: [0x0, 1600];Format 11.0;Time limit for static defect-pixel calibraiton */ + + td_u32 table[OT_ISP_STATIC_DP_COUNT_MAX]; /* R; Range: [0, 0x1FFF1FFF];Format 29.0; + Static defect-pixel calibraiton table, + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel */ + td_u8 finish_thresh; /* R; Range: [0, 255];Format 8.0; Finish threshold for static defect-pixel calibraiton */ + td_u16 count; /* R; Range:Hi3519DV500 = [0, 6144];Format 14.0; + Finish number for static defect-pixel calibraiton */ + ot_isp_status status; /* R; Range: [0, 2];Format 2.0;Status of static defect-pixel calibraiton */ +} ot_isp_dp_static_calibrate; + +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel module */ + td_u16 bright_count; /* RW; Range:Hi3519DV500 = [0, 6144];Format 14.0; + limited Range: [0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + When used as input(W), indicate the number of static bright defect pixels; + As output(R),indicate the number of static bright and dark defect pixels */ + td_u16 dark_count; /* RW; Range:Hi3519DV500 = [0, 6144];Format 14.0; + limited Range: [0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + When used as input(W), indicate the number of static dark defect pixels; + As output(R), invalid value 0. */ + td_u32 bright_table[OT_ISP_STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel + Notice: When used as input(W), indicate static bright defect pixels + table; As output(R), indicate static bright and dark defect pixels + table. */ + + td_u32 dark_table[OT_ISP_STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel + Notice: When used as input(W), indicate static dark defect pixels table; + As output(R), invalid value */ + td_bool show; /* RW; Range: [0, 1];Format 1.0;RW;highlight static defect pixel */ +} ot_isp_dp_static_attr; + +typedef struct { + td_u8 strength; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ + td_u8 blend_ratio; /* RW; Range: [0, 128];Format:1.7;Blending ratio required for DPC */ +} ot_isp_dp_dynamic_manual_attr; + +typedef struct { + td_u8 strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ + td_u8 blend_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 128];Format:1.7;Blending ratio required for DPC */ +} ot_isp_dp_dynamic_auto_attr; + +typedef struct { + td_bool sup_twinkle_en; /* RW; Range: [0, 1];Format 1.0;Enable/disable the twinkle suppression module */ + td_s8 soft_thr; /* RW; Range: [0, 127];Format s8.0;twinkle suppression threshold */ + td_u8 soft_slope; /* RW; Range: [0, 255];Format 8.0;Correction controlling parameter of the pixels whose + deviation is smaller than soft_thr. */ + ot_op_mode op_type; /* RW; Range: [0, 1];Format 1.0;Working mode of dynamic DPC */ + ot_isp_dp_dynamic_manual_attr manual_attr; + ot_isp_dp_dynamic_auto_attr auto_attr; + td_u8 bright_strength; /* RW; Range: [0, 127];Format 8.0, local DPC strength for bright area */ + td_u8 dark_strength; /* RW; Range: [0, 127];Format 8.0, local DPC strength for dark area */ +} ot_isp_dp_frame_dynamic_attr; + +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixel module */ + ot_isp_dp_frame_dynamic_attr frame_dynamic[OT_ISP_WDR_MAX_FRAME_NUM]; /* dynamic attr for short/long frames */ +} ot_isp_dp_dynamic_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; TD_TRUE: enable lblc; TD_FALSE: disable lblc */ + td_u16 strength; /* RW; Range:[0, 1023]; The strength of the lblc correction */ +} ot_isp_lblc_attr; + +typedef struct { + td_u16 offset_r; /* RW; Range:[0, 16383]; average value of the R channel Mesh BLC. */ + td_u16 offset_gr; /* RW; Range:[0, 16383]; average value of the Gr channel Mesh BLC. */ + td_u16 offset_gb; /* RW; Range:[0, 16383]; average value of the Gb channel Mesh BLC. */ + td_u16 offset_b; /* RW; Range:[0, 16383]; average value of the B channel Mesh BLC. */ + td_u16 mesh_blc_r[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the R channel Mesh BLC. */ + td_u16 mesh_blc_gr[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the Gr channel Mesh BLC. */ + td_u16 mesh_blc_gb[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the Gb channel Mesh BLC. */ + td_u16 mesh_blc_b[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the B channel Mesh BLC. */ +} ot_isp_lblc_lut_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; TD_TRUE: enable lsc; TD_FALSE: disable lsc */ + td_u16 mesh_strength; /* RW; Range:[0, 16383]; The strength of the mesh shading correction */ + td_u16 blend_ratio; /* RW; Range:[0, 256];Format:9.0; the blendratio of the two mesh gain lookup-table */ +} ot_isp_shading_attr; + +typedef struct { + td_u16 r_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + R channel required for LSC. */ + td_u16 gr_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + Gr channel required for LSC. */ + td_u16 gb_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + Gb channel required for LSC. */ + td_u16 b_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + B channel required for LSC. */ +} ot_isp_shading_gain_lut; + +typedef struct { + td_u8 mesh_scale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for + the 10 bit gain coefficients stored in mesh tables */ + td_u16 x_grid_width[OT_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the width data of each GRID partition */ + td_u16 y_grid_width[OT_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Range:[4, 255]; + Member used to store the height data of each GRID partition */ + ot_isp_shading_gain_lut lsc_gain_lut[OT_ISP_MLSC_GAIN_LUT_NUM]; +} ot_isp_shading_lut_attr; + +typedef struct { + ot_isp_bayer_format bayer; /* RW; Range: [0, 3];Format ENUM;Shows bayer pattern */ + ot_isp_bayer_raw_bit raw_bit; /* RW; Range: {8,10,12,14,16};Format ENUM;Shows input raw bitwidth */ + + td_u16 img_height; /* RW; Range: [0, 65535];Format 16.0;Input raw image height */ + td_u16 img_width; /* RW; Range: [0, 65535];Format 16.0;Input raw image width */ + + td_u16 dst_img_height; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_height], Image height that + crop from input raw image, set to ImgHeight if don't need to crop */ + td_u16 dst_img_width; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_width], Image width that + crop from input raw image, set to ImgWidth if don't need to crop */ + td_u16 offset_x; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_width - dst_img_width], + Horizontal offset that crop from input raw image, set to 0 if don't need to crop */ + td_u16 offset_y; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_height - dst_img_height], + Vertical offset that crop from input raw image, set to 0 if don't need to crop */ + + td_u32 mesh_scale; /* RW; Range: [0, 7];Format 3.0; Shows Mesh Scale value */ + + td_u16 blc_offset_r; /* RW; Range: [0, 4095];Format 12.0;BLC value for R channel */ + td_u16 blc_offset_gr; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gr channel */ + td_u16 blc_offset_gb; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gb channel */ + td_u16 blc_offset_b; /* RW; Range: [0, 4095];Format 12.0;BLC value for B channel */ +} ot_isp_mlsc_calibration_cfg; + +typedef struct { + td_u8 mesh_scale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for + the 10 bit gain coefficients stored in mesh tables */ + td_u16 x_grid_width[OT_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the width data of each GRID partition */ + td_u16 y_grid_width[OT_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the height data of each GRID partition */ + ot_isp_shading_gain_lut lsc_gain_lut; +} ot_isp_mesh_shading_table; + +typedef struct { + td_bool enable; /* RW; Range:[0,1];Format:1.0;Acs Enable */ + td_u16 y_strength; /* RW; Range:[0,256];Format:8.0;Acs correction strength for y shading */ + td_u16 run_interval; /* RW; Range:[1,255];Format:16.0;Acs Run Interval */ + td_bool lock_enable; /* RW; Range:[0,1];Format:1.0;Lock Gain Lut Enable */ +} ot_isp_acs_attr; + +typedef struct { + td_u16 dering_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1023];Format:10.0; dering strength. */ + td_u8 dering_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; dering threshold. */ + td_u8 dering_static_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; dering static strength */ + td_u8 dering_motion_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; dering moving strength */ +} ot_isp_nr_dering_auto_attr; + +typedef struct { + td_u16 dering_strength; /* RW; Range:[0, 1023];Format:10.0; dering strength. */ + td_u8 dering_thresh; /* RW; Range:[0, 255];Format:8.0; dering threshold. */ + td_u8 dering_static_strength; /* RW; Range:[0, 32];Format:6.0; dering static strength. */ + td_u8 dering_motion_strength; /* RW; Range:[0, 32];Format:6.0; dering moving strength. */ +} ot_isp_nr_dering_manual_attr; + +typedef struct { + ot_isp_nr_dering_auto_attr dering_auto; + ot_isp_nr_dering_manual_attr dering_manual; +} ot_isp_nr_dering_attr; + +typedef struct { + td_u16 sfm0_coarse_strength[OT_ISP_BAYER_CHN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 864];Format:10.0; + sfm0 filter coarse strength */ + td_u8 sfm0_detail_prot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 31];Format:5.0; sfm0 filter detail protect rate */ + td_u16 sfm1_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1023];Format:16.0; sfm1 filter strength. */ + td_u8 sfm1_adp_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 16];Format:5.0; sfm1 filter adaptive strength. */ + td_u8 sfm6_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; sfm6 hybrid filter strength. */ + td_u8 sfm7_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; sfm7 hybrid filter strength. */ + td_u8 sth[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; hybrid filter threshold. */ + td_u8 fine_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; denoise rate. */ + td_u16 coring_wgt[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0, 3200];Format:12.0;Strength of reserving the random noise. */ + td_u8 coring_mot_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 63];Format:6.0; coring on moving area. */ +} ot_isp_nr_snr_auto_attr; + +typedef struct { + td_u16 sfm0_coarse_strength[OT_ISP_BAYER_CHN_NUM]; /* RW; Range:[0,864];Format:10.0; sfm0 coarse strength */ + td_u8 sfm0_detail_prot; /* RW; Range:[0, 31];Format:5.0; sfm0 filter detail protect rate */ + td_u16 sfm1_strength; /* RW; Range:[0, 1023];Format:16.0; sfm1 filter strength. */ + td_u8 sfm1_adp_strength; /* RW; Range:[0, 16];Format:5.0; sfm1 filter adaptive strength. */ + td_u8 sfm6_strength; /* RW; Range:[0, 64];Format:7.0; sfm6 hybrid filter strength. */ + td_u8 sfm7_strength; /* RW; Range:[0, 64];Format:7.0; sfm7 hybrid filter strength. */ + td_u8 sth; /* RW; Range:[0, 255];Format:8.0; hybrid filter threshold. */ + td_u8 fine_strength; /* RW; Range:[0, 128];Format:8.0; denoise rate. */ + td_u16 coring_wgt; /* RW;Range:[0, 3200];Format:12.0;Strength of reserving the random noise. */ + td_u8 coring_mot_ratio; /* RW; Range:[0, 63];Format:6.0; coring on moving area. */ +} ot_isp_nr_snr_manual_attr; + +typedef struct { + ot_isp_nr_snr_auto_attr snr_auto; + ot_isp_nr_snr_manual_attr snr_manual; +} ot_isp_nr_snr_attr_v0; + +typedef enum { + OT_NR_SNR_V0, +} ot_nr_snr_mode; + +typedef struct { + ot_nr_snr_mode snr_version; + union { + ot_isp_nr_snr_attr_v0 snr_attr; /* AUTO:ot_nr_snr_mode:OT_NR_SNR_V0 */ + }; +} ot_isp_nr_snr_attr; + +typedef struct { + td_u8 md_mode[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1];Format:1.0; motion detection win size. */ + td_u8 md_size_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; motion detection size blend ratio. */ + td_u8 md_anti_flicker_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; + motion detection anti flicker strength. */ + td_u8 md_static_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; motion detection static area ratio */ + td_u8 md_motion_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; motion detection motion area ratio */ + td_u8 md_static_fine_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; + motion detection background tnr strength */ + td_u8 tfs[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; tnr absolute strength. */ + td_bool user_define_md[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1];Format:1.0; user define motion detection mode. */ + td_s16 user_define_slope[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[-32768, 32767];Format:8.8; user define motion + detection strength change with luma. */ + td_u16 user_define_dark_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 65535];Format:8.8; user define motion + detection strength in dark area. */ + td_u8 user_define_color_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; user define motion + detection strength in color area. */ + td_u8 sfr_r[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate r */ + td_u8 sfr_g[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate g */ + td_u8 sfr_b[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate b */ +} ot_isp_nr_tnr_auto_attr; + +typedef struct { + td_u8 md_mode; /* RW; Range:[0, 1];Format:1.0; motion detection win size. */ + td_u8 md_size_ratio; /* RW; Range:[0, 32];Format:6.0; motion detection size blend ratio. */ + td_u8 md_anti_flicker_strength; /* RW; Range:[0, 64];Format:7.0; motion detection anti flicker strength. */ + td_u8 md_static_ratio; /* RW; Range:[0, 64];Format:7.0; motion detection static area ratio */ + td_u8 md_motion_ratio; /* RW; Range:[0, 64];Format:7.0; motion detection motion area ratio */ + td_u8 md_static_fine_strength; /* RW; Range:[0, 255];Format:8.0; motion detection background tnr strength */ + td_u8 tfs; /* RW; Range:[0, 255];Format:8.0; tnr absolute strength. */ + td_bool user_define_md; /* RW; Range:[0, 1];Format:1.0; user define motion detection mode. */ + td_s16 user_define_slope; /* RW; Range:[-32768, 32767];Format:8.8; user define motion detection strength + change with luma. */ + td_u16 user_define_dark_thresh; /* RW; Range:[0, 65535];Format:8.8; user define motion detection strength in + dark area. */ + td_u8 user_define_color_thresh; /* RW; Range:[0, 64];Format:7.0; user define motion detection strength in + color area. */ + td_u8 sfr_r; /* RW; Range:[0, 128];Format:8.0; sfr rate r */ + td_u8 sfr_g; /* RW; Range:[0, 128];Format:8.0; sfr rate g */ + td_u8 sfr_b; /* RW; Range:[0, 128];Format:8.0; sfr rate b */ +} ot_isp_nr_tnr_manual_attr; + +typedef struct { + ot_isp_nr_tnr_auto_attr tnr_auto; + ot_isp_nr_tnr_manual_attr tnr_manual; +} ot_isp_nr_tnr_attr; + +typedef struct { + td_u8 snr_sfm0_wdr_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm0 strength */ + td_u8 snr_sfm0_fusion_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm0 strength */ + td_u8 snr_wdr_sfm6_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm6 strength */ + td_u8 snr_wdr_sfm7_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm7 strength */ + td_u8 snr_fusion_sfm6_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm6 strength */ + td_u8 snr_fusion_sfm7_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm7 strength */ + td_u8 md_wdr_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr md tnr strength */ + td_u8 md_fusion_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion md tnr strength */ +} ot_isp_nr_wdr_attr; + +typedef struct { + td_u8 denoise_y_alpha; /* RW; Range:[0, 255];Format:8.0; */ + td_u8 denoise_y_fg_str_lut[OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM]; /* RW; Range:[0, 255];Format:8.0; */ + td_u8 denoise_y_bg_str_lut[OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM]; /* RW; Range:[0, 255];Format:8.0; */ +} ot_isp_nr_ynet_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; bayernr enable */ + ot_op_mode op_type; /* RW; Range:[0, 1];Format:1.0; bayernr operation mode */ + td_bool tnr_en; /* RW; Range:[0, 1];Format:1.0; bayernr tnr enable */ + td_bool lsc_nr_en; /* RW; Range:[0, 1];Format:1.0; lsc nr enable. */ + td_u8 lsc_ratio1; /* RW; Range:[0, 15];Format:4.0; lsc nr ratio1. */ + td_u16 coring_ratio[OT_ISP_BAYERNR_LUT_LENGTH]; /* RW;Range:[0, 1023];Format:10.0; + Strength of reserving the random noise according to luma. */ + td_u16 mix_gain[OT_ISP_BAYERNR_LUT_LENGTH1]; /* RW;Range:[0, 128];Format:8.0; mixing rate based on luma. */ + + ot_isp_nr_snr_attr snr_cfg; + ot_isp_nr_tnr_attr tnr_cfg; + ot_isp_nr_wdr_attr wdr_cfg; + ot_isp_nr_dering_attr dering_cfg; +} ot_isp_nr_attr; + +typedef enum { + OT_ISP_IRBAYER_GRGBI = 0, + OT_ISP_IRBAYER_RGBGI = 1, + OT_ISP_IRBAYER_GBGRI = 2, + OT_ISP_IRBAYER_BGRGI = 3, + OT_ISP_IRBAYER_IGRGB = 4, + OT_ISP_IRBAYER_IRGBG = 5, + OT_ISP_IRBAYER_IBGRG = 6, + OT_ISP_IRBAYER_IGBGR = 7, + OT_ISP_IRBAYER_BUTT +} ot_isp_ir_bayer_format; + +typedef enum { + OT_ISP_IR_CVTMAT_MODE_NORMAL = 0, + OT_ISP_IR_CVTMAT_MODE_MONO, + OT_ISP_IR_CVTMAT_MODE_USER, + OT_ISP_IR_CVTMAT_MODE_BUTT +} ot_isp_ir_cvtmat_mode; + +typedef enum { + OT_ISP_RGBIR_MODE_RGBIR4X4 = 0, + OT_ISP_RGBIR_MODE_NORMAL, + OT_ISP_RGBIR_MODE_BUTT +} ot_isp_rgbir_mode; + +typedef struct { + ot_isp_rgbir_mode mode; /* RW; Range:[0x0, 0x1]; 0: rgbir mode; 1: ir remove mode */ + ot_isp_bayer_format out_pattern; /* RW;Range:[0x0, 0x3];Format:2.0; Bayer pattern of the output */ + ot_isp_ir_bayer_format in_rgbir_pattern; /* RW;Range:[0x0, 0x7];Format:3.0; IR pattern of the input */ + ot_isp_bayer_format in_bayer_pattern; /* RW;Range:[0x0, 0x3]; Format:2.0; + Bayer pattern of the input signal for ir remove mode */ + td_bool is_ir_upscale; /* RW;Range:[0x0, 0x1]; Format:1.0; + is upscale for ir image input of IR remove mode */ +} ot_isp_rgbir_cfg; + +typedef struct { + td_bool rgbir_en; /* RW;Range:[0x0, 0x1];Format:1.0; Enable/Disable RGBIR module */ + ot_isp_rgbir_cfg rgbir_cfg; + td_u32 ir_sum_info; /* R;Range:[0, 0xffffffff]; Format:32.0; ir_sum_info value, only read */ + td_bool auto_gain_en; /* RW;Range:[0x0,0x1];Format:1.0; Enable/Disable auto gain */ + td_u16 auto_gain; /* RW;Range:[0, 1023]; Format:10.0; auto gain value, 256 for 1x */ + td_bool smooth_en; /* RW;Range:[0x0, 0x1];Format:1.0; Enable/Disable Smooth Function */ + td_u16 exp_ctrl[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0, 2047];Format:11.0; Over expose control */ + td_u16 exp_gain[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0, 511];Format:9.0; Over expose control */ + td_bool ir_rm_en; /* RW;Range:[0x0,0x1]; Format:1.0; Enable/Disable ir remove Function before interplattion */ + td_u16 ir_rm_ratio[OT_ISP_RGBIR_CROSSTALK_NUM]; /* RW;Range:[0, 1000]; Format:10.0; crosstalk, 1000 for 1x */ + ot_isp_ir_cvtmat_mode ir_cvtmat_mode; + td_s16 cvt_matrix[OT_ISP_RGBIR_CVTMAT_NUM]; /* RW;Range:[-16384, 16383]; Format:s14.0; + RGBIR to Bayer image Convert matrix (need calibration) */ + td_u16 wb_ctrl_strength[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0,1024]; Format:11.0; wb control of R/B */ +} ot_isp_rgbir_attr; + +/* + Defines the type of the ISP gamma curve + 0 = Default curve + 1 = Default BT.709 curve (Gamma Curve) + 2 = Default SMPTE.2084 curve (PQ Curve), Not Support + 3 = User defined Gamma curve, LUT must be correct +*/ +typedef enum { + OT_ISP_GAMMA_CURVE_DEFAULT = 0x0, + OT_ISP_GAMMA_CURVE_SRGB, + OT_ISP_GAMMA_CURVE_HDR, /* Not Support */ + OT_ISP_GAMMA_CURVE_USER_DEFINE, + OT_ISP_GAMMA_CURVE_BUTT +} ot_isp_gamma_curve_type; +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Gamma Function */ + td_u16 table[OT_ISP_GAMMA_NODE_NUM]; /* RW; Range:[0, 4095]; Format:12.0;Gamma LUT nodes value */ + + ot_isp_gamma_curve_type curve_type; /* RW; Range:[0, 3]; Format:2.0;Gamma curve type */ +} ot_isp_gamma_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreGamma Function */ + td_u32 table[OT_ISP_PREGAMMA_NODE_NUM]; /* RW; Range:SD3403V100 = [0, 0xFFFFF]; Format:20.0; + Not support for Hi3519DV500; + PreGamma LUT nodes value */ +} ot_isp_pregamma_attr; + +typedef struct { + td_u8 luma_wgt[OT_ISP_SHARPEN_LUMA_NUM]; /* RW; Range: [0, 31]; + Format:0.5;Adjust the sharpen strength according to luma. + Sharpen strength will be weaker when it decrease. */ + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Undirectional sharpen + strength for texture and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Directional sharpen strength for edge enhancement */ + td_u16 texture_freq; /* RW; Range: [0, 4095];Format:6.6; Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq; /* RW; Range: [0, 4095];Format:6.6; Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */ + td_u8 under_shoot; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */ + + td_u16 motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095];Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_texture_freq; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u16 motion_edge_freq; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u8 motion_over_shoot; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + td_u8 motion_under_shoot; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + + td_u8 shoot_sup_strength; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, the + amplitude and width of shoot will be decrease when shootSupSt increase */ + td_u8 shoot_sup_adj; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot suppression adjusting, + adjust the edge shoot suppression strength */ + td_u8 detail_ctrl; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for detail and edge. + When it is bigger than 128, detail sharpen strength will be stronger than edge */ + td_u8 detail_ctrl_threshold; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, it is used to + distinguish detail and edge. */ + td_u8 edge_filt_strength; /* RW; Range: [0, 63]; Format:6.0;The strength of edge filtering. */ + td_u8 edge_filt_max_cap; /* RW; Range: [0, 47]; Format:6.0;The max capacity of edge filtering. */ + td_u8 r_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Red Area */ + td_u8 g_gain; /* RW; Range: [0, 255]; Format:8.0; Sharpen Gain for Green Area */ + td_u8 b_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Blue Area */ + td_u8 skin_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ + td_u16 max_sharp_gain; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ +} ot_isp_sharpen_manual_attr; + +typedef struct { + td_u8 luma_wgt[OT_ISP_SHARPEN_LUMA_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 31]; Format:0.5; + Adjust the sharpen strength according to luma. + Sharpen strength will be weaker when it decrease */ + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Undirectional sharpen strength for texture + and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Directional sharpen strength for edge enhancement */ + td_u16 texture_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0 */ + td_u8 under_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0 */ + + td_u16 motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; + Format:7.5. Not support for Hi3519DV500 */ + td_u16 motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_texture_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u16 motion_edge_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u8 motion_over_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + td_u8 motion_under_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + + td_u8 shoot_sup_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot + suppression strength, the amplitude and width of shoot will be + decrease when shootSupSt increase */ + td_u8 shoot_sup_adj[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot + suppression adjusting, adjust the edge shoot suppression strength */ + td_u8 detail_ctrl[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for + detail and edge. When it is bigger than 128, detail sharpen + strength will be stronger than edge. */ + td_u8 detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, + it is used to distinguish detail and edge. */ + td_u8 edge_filt_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 63]; Format:6.0; + The strength of edge filtering. */ + td_u8 edge_filt_max_cap[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 47]; Format:6.0; + The max capacity of edge filtering. */ + td_u8 r_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0; Sharpen Gain for Red Area */ + td_u8 g_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0; Sharpen Gain for Green Area */ + td_u8 b_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0; Sharpen Gain for Blue Area */ + td_u8 skin_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ + td_u16 max_sharp_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ +} ot_isp_sharpen_auto_attr; + +typedef enum { + OT_ISP_SHARPEN_NORMAL = 0, + OT_ISP_SHARPEN_OFF, + OT_ISP_SHARPEN_DIFF_NORM, + OT_ISP_SHARPEN_DIFF, + OT_ISP_SHARPEN_TOTAL, + OT_ISP_SHARPEN_TEXTURE, + OT_ISP_SHARPEN_EDGE, + OT_ISP_SHARPEN_TOTAL_FREQ, + OT_ISP_SHARPEN_TEXTURE_FREQ, + OT_ISP_SHARPEN_EDGE_FREQ, + OT_ISP_SHARPEN_BUTT +} ot_isp_sharpen_detail_map; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable sharpen module */ + td_bool motion_en; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable motion sharpen module. + Not support for Hi3519DV500 */ + td_u8 motion_threshold0; /* RW; Range: [0, 15]; Format:8.0. Not support for Hi3519DV500 */ + td_u8 motion_threshold1; /* RW; Range: [0, 15]; Format:8.0. Not support for Hi3519DV500 */ + td_u16 motion_gain0; /* RW; Range: [0, 256]; Format:16.0. Not support for Hi3519DV500 */ + td_u16 motion_gain1; /* RW; Range: [0, 256]; Format:16.0. Not support for Hi3519DV500 */ + td_u8 skin_umin; /* RW; Range: [0, 255]; Format:8.0; U min value of the range of skin area */ + td_u8 skin_vmin; /* RW; Range: [0, 255]; Format:8.0; V min value of the range of skin area */ + td_u8 skin_umax; /* RW; Range: [0, 255]; Format:8.0; U max value of the range of skin area */ + td_u8 skin_vmax; /* RW; Range: [0, 255]; Format:8.0; V max value of the range of skin area */ + ot_op_mode op_type; + ot_isp_sharpen_detail_map detail_map; + ot_isp_sharpen_manual_attr manual_attr; + ot_isp_sharpen_auto_attr auto_attr; +} ot_isp_sharpen_attr; + +/* Crosstalk Removal */ +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format:1.0;Enable/disable the crosstalk removal module */ + td_u8 slope; /* RW; Range: [0, 12]; Crosstalk slope value. */ + td_u8 sensi_slope; /* RW; Range: [0, 12]; Crosstalk sensitivity. */ + td_u16 sensi_threshold; /* RW; Range: [0, 4095]; Crosstalk sensitivity threshold. */ + td_u16 strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0,256];Crosstalk strength value. */ + td_u16 threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Crosstalk threshold. */ + td_u8 filter_mode[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31];Format:5.0; Crosstalk filter mode. */ + td_u16 np_offset[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [512, 4095]; Not support for Hi3519DV500 */ +} ot_isp_cr_attr; + +typedef struct { + td_u8 threshold; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */ + td_u8 strength; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */ +} ot_isp_anti_false_color_manual_attr; + +typedef struct { + td_u8 threshold[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */ + td_u8 strength[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */ +} ot_isp_anti_false_color_auto_attr; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ + ot_op_mode op_type; + ot_isp_anti_false_color_manual_attr manual_attr; + ot_isp_anti_false_color_auto_attr auto_attr; +} ot_isp_anti_false_color_attr; + +typedef struct { + td_u8 nddm_strength; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ + td_u8 nddm_mf_detail_strength; /* RW; Range:[0x0, 0x7f]; + Format:3.4; Non-direction medium frequent detail enhance strength */ + td_u8 nddm_hf_detail_strength; /* RW; Range:[0x0, 0x10]; Format:2.2; + Non-direction high frequent detail enhance strength */ + td_u8 detail_smooth_range; /* RW; Range:[0x1, 0x7]; Format:4.0; Detail smooth range */ + td_u8 color_noise_f_threshold; /* RW; Range:[0x0,0xff]; Format:8.0; Threshold of color noise cancel */ + td_u8 color_noise_f_strength; /* RW; Range:[0x0, 0x8]; Format:4.0; Strength of color noise cancel */ + td_u8 color_noise_y_threshold; /* RW; Range:[0x0, 0xF]; + Format:8.0; Range of color denoise luma, related to luminance and saturation */ + td_u8 color_noise_y_strength; /* RW; Range:[0x0, 0x3F]; Format:8.0;Format:8.0; Strength of color denoise luma */ +} ot_isp_demosaic_manual_attr; + +typedef struct { + td_u8 nddm_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ + td_u8 nddm_mf_detail_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x7f]; Format:3.4; + Non-direction medium frequent detail enhance strength */ + td_u8 nddm_hf_detail_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x10]; Format:2.2; Non-direction + high frequent detail enhance strength */ + td_u8 detail_smooth_range[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x1, 0x7]; Format:4.0; Detail smooth range */ + td_u8 color_noise_f_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xff]; Format:8.0; + Threshold of color noise cancel */ + td_u8 color_noise_f_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x8]; Format:4.0; Strength of color + noise cancel */ + td_u8 color_noise_y_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xF]; Format:8.0; + Range of color denoise luma, related to luminance and saturation */ + td_u8 color_noise_y_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x3F]; Format:8.0;Format:8.0; + Strength of color denoise luma */ +} ot_isp_demosaic_auto_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable demosaic module */ + ot_op_mode op_type; + td_u16 ai_detail_strength; /* RW; Range:[0x0, 0x1FF]; Format:9.0; ai detail strength */ + ot_isp_demosaic_manual_attr manual_attr; + ot_isp_demosaic_auto_attr auto_attr; +} ot_isp_demosaic_attr; + +/* Defines the attributes of the ISP black level */ +typedef enum { + OT_ISP_BLACK_LEVEL_MODE_AUTO = 0, + OT_ISP_BLACK_LEVEL_MODE_MANUAL = 1, + OT_ISP_BLACK_LEVEL_MODE_DYNAMIC = 2, + OT_ISP_BLACK_LEVEL_MODE_BUTT +} ot_isp_black_level_mode; + +typedef struct { + td_u16 black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0x3FFF];Format:14.0; + sensor Black level values that correspond to the black levels of the + R,Gr, Gb, and B components respectively. */ +} ot_isp_black_level_manual_attr; + +typedef enum { + OT_ISP_DYNAMIC_PATTERN_RGB = 0, + OT_ISP_DYNAMIC_PATTERN_RGBIR, + OT_ISP_DYNAMIC_PATTERN_BUTT +} ot_isp_black_level_dynamic_pattern; + +typedef struct { + ot_isp_black_level_dynamic_pattern pattern; /* RW; Range: [0, 1]; The pattern of raw. */ + ot_rect ob_area; /* RW; xRange: [0, width of the ob_area]; yRange: [0, height of the ob_area]; + obWidthRange: [0, width of the ob_area - x]; obHeightRange: [0, height of ob_area - y]; + The size of OB area. */ + td_u16 low_threshold; /* RW; Range: [0x0, 0xFFF]; Format:14.0;Lower limit of normal pixel value; */ + td_u16 high_threshold; /* RW; Range: [0x0, 0x3FFF]; Format:14.0;Higher limit of normal pixel value; */ + td_s16 offset[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [-0x3FFF, 0x3FFF]; Format:15.0;Offset limit of dynamic blc; */ + td_u16 tolerance; /* RW; Range: [0x0, 0x3FFF]; Format:14.0;Tolerance limit of dynamic blc; */ + td_u8 filter_strength; /* RW; Range: [0, 64];Format:6.0; ob black level minus light black level */ + td_bool separate_en; /* RW; Range: [0, 1]; set rggb black level separately */ + td_u16 calibration_black_level[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0x0, 0x3FFF]; Format:14.0; + dynamic blc of again; */ + td_u16 filter_thr; /* RW; Range: [0, 0x3FFF]; Format:14.0; black level IIR filter threshold; */ +} ot_isp_black_level_dynamic_attr; + +typedef struct { + td_bool user_black_level_en; + td_u16 user_black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0x3FFF];Format:14.0; + user define Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ + ot_isp_black_level_mode black_level_mode; + ot_isp_black_level_manual_attr manual_attr; + ot_isp_black_level_dynamic_attr dynamic_attr; +} ot_isp_black_level_attr; + +/* + Defines the FPN removal type + 0 = Frame mode correction + 1 = Line mode correction + */ +typedef enum { + OT_ISP_FPN_TYPE_FRAME = 0, + OT_ISP_FPN_TYPE_LINE = 1, + OT_ISP_FPN_TYPE_BUTT +} ot_isp_fpn_type; + +/* + Defines the FPN frame output mode + 0: the pixel value algin with the least significant bit (right-most bit) + 1: the pixel value algin with the most significant bit (left-most bit) + */ +typedef enum { + OT_ISP_FPN_OUT_MODE_NORM = 0, + OT_ISP_FPN_OUT_MODE_HIGH, + OT_ISP_FPN_OUT_MODE_BUTT +} ot_isp_fpn_out_mode; + +/* Defines the information about calibrated black frames */ +typedef struct { + td_u32 iso; /* RW;Range:[0x64,0xFFFFFFFF];Format:32.0;FPN CALIBRATE ISO */ + td_u32 offset[OT_ISP_STRIPING_MAX_NUM]; /* RW;Range:[0, 0x3FFF];Format:14.0; + FPN frame u32Offset (agv pixel value), + only higher 12bits valid */ + td_u32 frm_size; /* RW;FPN frame size (exactly frm size or compress len) */ + ot_video_frame_info fpn_frame; /* FPN frame info, 8bpp,10bpp,12bpp,16bpp. Compression or not */ +} ot_isp_fpn_frame_info; + +/* Defines the calibration attribute of the FPN removal module */ +typedef struct { + td_u32 threshold; /* RW;Range:[1,0xFFF];Format:12.0;pix value > threshold means defective pixel */ + td_u32 frame_num; /* RW;Range:[1, 16];Format:5.0;Number of frames to be calibrated. + The value range is {1, 2, 4, 8, 16},that is, the integer exponentiation of 2 */ + ot_isp_fpn_type fpn_type; /* frame mode or line mode */ + ot_isp_fpn_frame_info fpn_cali_frame; + ot_isp_fpn_out_mode fpn_mode; /* FPN frame output mode, for normal use, set to 0 */ +} ot_isp_fpn_calibrate_attr; + +/* Defines the manual correction attribute of the FPN removal module */ +typedef struct { + td_u32 strength; /* RW;Range:[0,1023];Format:10.0;Manual correction strength */ +} ot_isp_fpn_manual_attr; + +/* Defines the automatic correction attribute of the FPN removal module */ +typedef struct { + td_u32 strength; /* RW;Range:[0,1023];Format:10.0;Auto correction strength */ +} ot_isp_fpn_auto_attr; + +/* Defines the correction attribute of the FPN removal module */ +typedef struct { + td_bool enable; /* RW;Range:[0,1];Format:1.0; */ + td_bool aibnr_mode; /* RW;Range:[0,1];Format:1.0; */ + ot_op_mode op_type; /* manual or auto mode */ + ot_isp_fpn_type fpn_type; + ot_isp_fpn_frame_info fpn_frm_info; + ot_isp_fpn_manual_attr manual_attr; + ot_isp_fpn_auto_attr auto_attr; +} ot_isp_fpn_attr; + +/* Defines the manual dehaze attribute */ +typedef struct { + td_u8 strength; /* RW;Range:[0,0xFF];Format:8.0;Manual dehaze strength */ +} ot_isp_dehaze_manual_attr; + +/* Defines the automatic dehaze attribute */ +typedef struct { + td_u8 strength; /* RW;Range:[0,0xFF];Format:8.0;Weighted coefficient for automatic dehaze strength. */ +} ot_isp_dehaze_auto_attr; + +/* Defines the ISP dehaze attribute */ +typedef struct { + td_bool enable; /* RW;Range:[0,1];Format:1.0; */ + td_bool user_lut_en; /* RW;Range:[0,1];0:Auto Lut 1:User Lut */ + td_u8 dehaze_lut[OT_ISP_DEHAZE_LUT_SIZE]; + ot_op_mode op_type; + ot_isp_dehaze_manual_attr manual_attr; + ot_isp_dehaze_auto_attr auto_attr; + td_u16 tmprflt_incr_coef; /* RW, Range: [0x0, 0x80].filter increase coefficient. */ + td_u16 tmprflt_decr_coef; /* RW, Range: [0x0, 0x80].filter decrease coefficient. */ +} ot_isp_dehaze_attr; + +/* Defines purple fringing correction attribute */ +typedef struct { + td_u16 edge_threshold[OT_ISP_CAC_THR_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 4095]; + format:12.0; cac edge threshold */ + td_u16 edge_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 1023]; format:10.0; cac edge gain */ + td_u16 cac_rb_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 31]; format:5.0; cac strength on rb */ + td_u16 purple_alpha[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 63]; format:6.0; cac purple alpha */ + td_u16 edge_alpha[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 63]; format:6.0; cac edge alpha */ + td_u16 satu_low_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 4095]; format:12.0; cac purple saturation + low threshold */ + td_u16 satu_high_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 16383]; format:14.0; cac purple saturation + high threshold */ +} ot_isp_cac_acac_auto_attr; + +typedef struct { + td_u16 edge_threshold[OT_ISP_CAC_THR_NUM]; /* RW; range: [0, 4095]; format:12.0; cac edge threshold */ + td_u16 edge_gain; /* RW; range: [0, 1023]; format:10.0; cac edge gain */ + td_u16 cac_rb_strength; /* RW; range: [0, 31]; format:5.0; cac strength on rb */ + td_u16 purple_alpha; /* RW; range: [0, 63]; format:6.0; cac purple alpha */ + td_u16 edge_alpha; /* RW; range: [0, 63]; format:6.0; cac edge alpha */ + td_u16 satu_low_threshold; /* RW; range: [0, 4095]; format:12.0; cac purple saturation low threshold */ + td_u16 satu_high_threshold; /* RW; range: [0, 16383]; format:14.0; cac purple saturation high threshold */ +} ot_isp_cac_acac_manual_attr; + +typedef struct { + ot_isp_cac_acac_manual_attr acac_manual; + ot_isp_cac_acac_auto_attr acac_auto; +} ot_isp_cac_acac_attr; + +typedef struct { + td_u8 de_purple_cr_strength[OT_ISP_CAC_EXP_RATIO_NUM]; /* RW; range: [0, 8]; format:4.0; + correction strength of the R channel */ + td_u8 de_purple_cb_strength[OT_ISP_CAC_EXP_RATIO_NUM]; /* RW; range: [0, 8]; format:4.0; + correction strength of the B channel */ +} ot_isp_cac_lcac_auto_attr; + +typedef struct { + td_u8 de_purple_cr_strength; /* RW; range: [0, 8]; format:4.0; correction strength of the R channel */ + td_u8 de_purple_cb_strength; /* RW; range: [0, 8]; format:4.0; correction strength of the B channel */ +} ot_isp_cac_lcac_manual_attr; + +typedef struct { + td_u16 purple_detect_range; /* RW; range: [0, 410]; format:9.0; purple fringing detection scope */ + td_u16 var_threshold; /* RW; range: [0, 4095]; format:12.0; edge detection threshold */ + td_u16 r_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component R detection thd */ + td_u16 g_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component G detection thd */ + td_u16 b_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component B detection thd */ + ot_isp_cac_lcac_manual_attr lcac_manual; + ot_isp_cac_lcac_auto_attr lcac_auto; +} ot_isp_cac_lcac_attr; + +typedef struct { + td_bool enable; /* RW; range: [0, 1]; format:1.0; cac enable */ + ot_op_mode op_type; /* RW; range: [0, 1]; format:1.0; purple fringing correction working mode */ + td_u8 detect_mode; /* RW; range: [0, 2]; format:2.0; cac edge detect mode */ + td_s16 purple_upper_limit; /* RW; range: [-2048,2047]; format:s12.0; cac purple high limitation */ + td_s16 purple_lower_limit; /* RW; range: [-2048,2047]; format:s12.0; cac purple low limitation */ + ot_isp_cac_acac_attr acac_cfg; + ot_isp_cac_lcac_attr lcac_cfg; +} ot_isp_cac_attr; + + +typedef struct { + td_u8 mf_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];mf_strength. */ + td_u8 hf_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];hf_strength. */ + td_u8 dark_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];dark_strength. */ + td_u8 mf_gain; /* RW; range:[0, 15];format:4.0; mf gain */ + td_u8 hf_gain; /* RW; range:[0, 15];format:4.0; hf gain */ + td_u8 dark_gain; /* RW; range:[0, 15];format:4.0; dark gain */ + td_u16 overshoot; /* RW; range:[0, 255];format:8.0; over shoot */ + td_u16 undershoot; /* RW; range:[0, 255];format:8.0; under shoot */ +} ot_isp_bayershp_manual_attr; + +typedef struct { + td_u8 mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];mf_strength. */ + td_u8 hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];hf_strength. */ + td_u8 dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];dark_strength. */ + td_u8 mf_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; mf gain */ + td_u8 hf_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; hf gain */ + td_u8 dark_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; dark gain */ + td_u16 overshoot[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 255];format:8.0; over shoot */ + td_u16 undershoot[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 255];format:8.0; under shoot */ +} ot_isp_bayershp_auto_attr; + +typedef struct { + td_bool enable; /* RW; range:[0, 1]; format:1.0;en/disable bayershrpen module */ + td_u16 dark_threshold[OT_ISP_BSHP_THD_NUM]; /* RW; range:[0, 4095];format:12.0; dark threshold */ + td_u16 texture_threshold[OT_ISP_BSHP_THD_NUM]; /* RW; range:[0, 4095];format:12.0; texture threshold */ + ot_op_mode op_type; + ot_isp_bayershp_manual_attr manual_attr; + ot_isp_bayershp_auto_attr auto_attr; +} ot_isp_bayershp_attr; + +/* Defines the Radial Crop attribute */ +typedef struct { + td_bool enable; /* RW;Range:[0, 1];Format:1.0; enable/disable ridial crop */ + ot_point center_coord; /* RW;the coordinate of central pixel */ + td_u32 radius; /* RW;Range:[0, 11586];Format:14.0; when the distance to central pixel is greater than + u32Radius, the pixel value becomes 0. */ +} ot_isp_rc_attr; + +typedef struct { + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* R; range: [0, 4095]; Format:7.5;Undirectional sharpen + strength for texture and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* R; range: [0, 4095]; Format:7.5;Directional sharpen strength + for edge enhancement */ + td_u16 texture_freq; /* R; range: [0, 4095];Format:6.6; Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq; /* R; range: [0, 4095];Format:6.6; Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot; /* R; range: [0, 127]; Format:7.0;u8OvershootAmt */ + td_u8 under_shoot; /* R; range: [0, 127]; Format:7.0;u8UndershootAmt */ + td_u8 shoot_sup_strength; /* R; range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, + the amplitude and width of shoot will be decrease when shootSupSt increase */ + + td_u8 nr_lsc_ratio; /* R;Range:[0x0, 0xf];Format:4.0; lsc nr ratio */ + td_u16 coarse_strength[OT_ISP_BAYER_CHN_NUM]; /* R;Range:[0x0, 0x360];Format:10.0; + Coarse Strength of noise reduction */ + td_u8 wdr_frame_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* R;Range:[0x0, 0x40];Format:7.0; + Coarse strength of each frame in wdr mode */ + td_u8 fine_strength; /* R;Range:[0x0,0x80];Format:8.0;Strength of Luma noise reduction */ + td_u16 coring_wgt; /* R;Range:[0x0,0xC80];Format:12.0;Strength of reserving the random noise */ + + td_u16 dehaze_strength_actual; /* R;Range:[0,0xFF];Format:8.0;actual dehaze strength */ + td_u16 drc_strength_actual; /* R;Range: Hi3519DV500 = [0x0, 0x3FF]; + Strength of dynamic range compression. + Higher values lead to higher differential gain between shadows and highlights. */ + td_u32 wdr_exp_ratio_actual[OT_ISP_WDR_MAX_FRAME_NUM - 1]; /* R; Range:[0x40, 0x4000]; Format:26.6; + 0x40 means 1 times. + When enExpRatioType is OT_OP_MODE_AUTO, u32ExpRatio is invalid. + When enExpRatioType is OT_OP_MODE_MANUAL, u32ExpRatio is + quotient of long exposure time / short exposure time. */ + td_bool wdr_switch_finish; /* R; Range:[0, 1];Format:1.0;TD_TRUE: WDR switch is finished */ + td_bool res_switch_finish; /* R; Range:[0, 1];Format:1.0;TD_TRUE: Resolution switch is finished */ + td_u16 black_level_actual[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0x3FFF];Format:14.0; + Actual Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ + + td_u16 sns_black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0x3FFF];Format:14.0; + sesnor Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ +} ot_isp_inner_state_info; + +typedef enum { + OT_ISP_AI_NONE = 0, + OT_ISP_AI_BNR, + OT_ISP_AI_DRC, + OT_ISP_AI_DEMOSAIC, + OT_ISP_AI_BUTT +} ot_isp_ai_mode; + +/* + The position of AE histogram in ISP BE pipeline + 0 = After DG; + 1 = After static WB; + 2 = After DRC; + */ +typedef enum { + OT_ISP_AE_AFTER_DG = 0, + OT_ISP_AE_AFTER_WB, + OT_ISP_AE_AFTER_DRC, + OT_ISP_AE_SWITCH_BUTT +} ot_isp_ae_switch; + +/* + FourPlaneMode enable + 0 : Disabled; + 1 : Enabled +*/ +typedef enum { + OT_ISP_AE_FOUR_PLANE_MODE_DISABLE = 0, + OT_ISP_AE_FOUR_PLANE_MODE_ENABLE, + OT_ISP_AE_FOUR_PLANE_MODE_BUTT +} ot_isp_ae_four_plane_mode; + +typedef enum { + OT_ISP_AE_HIST_SKIP_EVERY_PIXEL = 0, + OT_ISP_AE_HIST_SKIP_EVERY_2ND_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_3RD_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_4TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_5TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_8TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_9TH_PIXEL, + OT_ISP_AE_HIST_SKIP_BUTT +} ot_isp_ae_hist_skip; + +typedef enum { + OT_ISP_AE_HIST_START_FORM_FIRST_COLUMN = 0, + OT_ISP_AE_HIST_START_FORM_SECOND_COLUMN, + OT_ISP_AE_HIST_OFFSET_X_BUTT +} ot_isp_ae_hist_offset_x; + +typedef enum { + OT_ISP_AE_HIST_START_FORM_FIRST_ROW = 0, + OT_ISP_AE_HIST_START_FORM_SECOND_ROW, + OT_ISP_AE_HIST_OFFSET_Y_BUTT +} ot_isp_ae_hist_offset_y; + +/* Defines the mode configuration for the sampling points during global histogram statistics. */ +typedef struct { + ot_isp_ae_hist_skip hist_skip_x; /* RW; Range:[0, 6]; Format:4.0; + Histogram decimation in horizontal direction: 0=every pixel; + 1=every 2nd pixel; 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; + 5=every 8th pixel ; 6+=every 9th pixel */ + ot_isp_ae_hist_skip hist_skip_y; /* RW; Range:[0, 6]; Format:4.0; + Histogram decimation in vertical direction: 0=every pixel; 1=every 2nd pixel; + 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; 5=every 8th pixel; + 6+=every 9th pixel */ + ot_isp_ae_hist_offset_x hist_offset_x; /* RW; Range:[0, 1]; Format:1.0; + 0= start from the first column; 1=start from second column */ + ot_isp_ae_hist_offset_y hist_offset_y; /* RW; Range:[0, 1]; Format:1.0; + 0= start from the first row; 1= start from second row */ +} ot_isp_ae_hist_config; + +typedef enum { + OT_ISP_AE_NORMAL = 0, + OT_ISP_AE_ROOT, + OT_ISP_AE_STAT_MODE_BUTT +} ot_isp_ae_stat_mode; + +/* Crops the input image of the AE module */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0;AE crop enable. */ + td_u16 x; /* RW; Range: Hi3519DV500 = [0, 8192 - 256]; + Format:13.0;AE image crop start x, limited range:[0, ImageWidth - 256] */ + td_u16 y; /* RW; Range: Hi3519DV500 = [0, 8192 - 120]; + Format:13.0;AEimage crop start y, limited range:[0, ImageHeight - 120] */ + td_u16 width; /* RW; Range: Hi3519DV500 = [256, 8192]; + Format:14.0;AE image crop width, limited range:[256, ImageWidth] */ + td_u16 height; /* RW; Range: Hi3519DV500 = [120, 8192]; + Format:14.0;AE image crop height limited range:[120, ImageHeight] */ +} ot_isp_ae_crop; + +/* config of statistics structs */ +typedef struct { + ot_isp_ae_switch ae_switch; /* RW; Range:[0, 2]; Format:2.0; + The position of AE histogram in ISP BE pipeline */ + ot_isp_ae_hist_config hist_config; + ot_isp_ae_four_plane_mode four_plane_mode; /* RW; Range:[0, 1]; Format:2.0;Four Plane Mode Enable */ + ot_isp_ae_stat_mode hist_mode; /* RW; Range:[0, 1]; Format:2.0;AE Hist Rooting Mode */ + ot_isp_ae_stat_mode aver_mode; /* RW; Range:[0, 1]; Format:2.0;AE Aver Rooting Mode */ + ot_isp_ae_stat_mode max_gain_mode; /* RW; Range:[0, 1]; Format:2.0;Max Gain Rooting Mode */ + ot_isp_ae_crop crop; /* RW; AE input image crop for module */ + ot_isp_ae_crop fe_crop; /* RW; AE input image crop for FE module */ + td_u8 weight[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]; /* RW; Range:[0x0, 0xF]; Format:4.0; AE weighting table */ +} ot_isp_ae_stats_cfg; + +/* Smart Info */ +#define OT_ISP_PEOPLE_CLASS_MAX 2 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable smart roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u8 luma; /* R; Range:[0x00, 0xFF]; luma of roi area */ +} ot_isp_people_roi; + +typedef enum { + OT_ISP_FACE_INDEX = 0, + OT_ISP_PEOPLE_INDEX = 1, + OT_ISP_PEOPLE_BUTT +} ot_isp_people_type; + +#define OT_ISP_TUNNEL_CLASS_MAX 2 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable tunnel roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u32 tunnel_area_ratio; /* R; Range:[0, 10000]; the proportion of tunnels in the whole picture */ + td_u32 tunnel_exp_perf; /* R; Range:[0, 10000]; the performance of tunnels exposure result */ +} ot_isp_tunnel_roi; + +typedef enum { + OT_ISP_TUNNEL_IN_INDEX = 0, + OT_ISP_TUNNEL_OUT_INDEX = 1, + OT_ISP_TUNNEL_BUTT +} ot_isp_tunnel_type; + +#define OT_ISP_FACE_NUM 5 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable fast face roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u64 frame_pts; /* pts of face info */ + ot_rect face_rect[OT_ISP_FACE_NUM]; /* face roi rect */ +} ot_isp_face_roi; + +typedef struct { + ot_isp_people_roi people_roi[OT_ISP_PEOPLE_CLASS_MAX]; /* people ae info */ + ot_isp_tunnel_roi tunnel_roi[OT_ISP_TUNNEL_CLASS_MAX]; /* tunnels ae info */ + ot_isp_face_roi face_roi; /* fast face ae info */ +} ot_isp_smart_info; + +/* fines whether the peak value of the zoned IIR statistics is calculated. */ +typedef enum { + OT_ISP_AF_STA_NORM = 0, /* use every value of the block statistic */ + OT_ISP_AF_STA_PEAK, /* use the maximum value in one line of the block statistic */ + OT_ISP_AF_STA_BUTT +} ot_isp_af_peak_mode; + +/* Defines whether the zoned statistics are squared in square mode. */ +typedef enum { + OT_ISP_AF_STA_SUM_NORM = 0, /* statistic value accumulate */ + OT_ISP_AF_STA_SUM_SQUARE, /* statistic value square then accumulate */ + OT_ISP_AF_STA_SUM_BUTT +} ot_isp_af_square_mode; +/* Crops the input image of the AF module. */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0; AF crop enable */ + td_u16 x; /* RW; Range: Hi3519DV500 = [0, 7936]; + Format:13.0;AF image crop start x, limited range:[0, ImageWidth-256] */ + td_u16 y; /* RW; Range: Hi3519DV500 = [0, 8072]; + Format:13.0;AF image crop start y, limited range:[0, ImageHeight-120] */ + td_u16 width; /* RW; Range: Hi3519DV500 = [256, 8192]; + Format:14.0;AF image crop width, limited range:[256, ImageWidth] */ + td_u16 height; /* RW; Range: Hi3519DV500 = [120, 8192]; + Format:14.0;AF image crop height, limited range:[120, ImageHeight] */ +} ot_isp_af_crop; + +/* Defines the position of AF module statistics. */ +typedef enum { + OT_ISP_AF_STATS_AFTER_DGAIN = 0, /* The AF module is placed in the raw field for statistics,AF after DGain */ + OT_ISP_AF_STATS_AFTER_DRC, /* The AF module is placed in the raw field for statistics,AF after DRC */ + OT_ISP_AF_STATS_AFTER_CSC, /* The AF module is placed in the YUV field for statistics,AF after CSC */ + OT_ISP_AF_STATS_BUTT +} ot_isp_af_stats_pos; + +/* Configures the Bayer field of the AF module. */ +typedef struct { + td_u8 gamma_gain_limit; /* RW; Range: [0x0, 0x5]; Format:3.0; Not support for Hi3519DV500 */ + td_u8 gamma_value; /* RW; Range: SD3403V100 = [0x0, 0x6]| Hi3519DV500 = [0x0, 0x1]; */ + ot_isp_bayer_format bayer_format; /* RW; Range: [0x0, 0x3]; Format:2.0;raw domain pattern */ +} ot_isp_af_raw_cfg; + +/* Configures the pre-filter of the AF module. */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0; pre filter enable . */ + td_u16 strength; /* RW; Range: [0x0, 0xFFFF]; Format:16.0;pre filter strength */ +} ot_isp_af_pre_filter_cfg; + +/* Defines AF statistics configuration parameters. */ +typedef struct { + td_bool af_en; /* RW; Range: [0,1]; AF enable. */ + td_u16 zone_col; /* RW; Range: [1, 17]; AF statistic window horizontal block. */ + td_u16 zone_row; /* RW; Range: [1, 15]; AF statistic window vertical block. */ + ot_isp_af_peak_mode peak_mode; /* RW; Range: [0,1]; AF peak value statistic mode. */ + ot_isp_af_square_mode square_mode; /* RW; Range: [0,1]; AF statistic square accumulate. */ + ot_isp_af_crop crop; /* RW; AF input image crop */ + ot_isp_af_crop fe_crop; /* RW; AF input image crop for FE module */ + ot_isp_af_stats_pos stats_pos; /* RW; Range: [0,2]; AF statistic position, it can be set to yuv or raw */ + ot_isp_af_raw_cfg raw_cfg; /* RW; When AF locate at RAW domain, these para should be cfg. */ + ot_isp_af_pre_filter_cfg pre_flt_cfg; /* RW; pre filter cfg */ + td_u16 high_luma_threshold; /* RW; Range: [0,0xFF]; high luma threshold. */ +} ot_isp_af_cfg; + +/* Configures the AF level depend gain module. */ +typedef struct { + td_bool enable; /* RW; Range: [0, 1]; FILTER level depend gain enable. */ + td_u16 threshold_low; /* RW; range: [0x0, 0xFF]; FILTER level depend th low */ + td_u16 gain_low; /* RW; range: [0x0, 0xFF]; FILTER level depend gain low */ + td_u16 slope_low; /* RW; range: [0x0, 0xF]; FILTER level depend slope low */ + td_u16 threshold_high; /* RW; range: [0x0, 0xFF]; FILTER level depend th high */ + td_u16 gain_high; /* RW; range: [0x0, 0xFF]; FILTER level depend gain high */ + td_u16 slope_high; /* RW; range: [0x0, 0xF]; FILTER level depend slope high */ +} ot_isp_af_level_depend; + +/* Configures the AF coring module. */ +typedef struct { + td_u16 threshold; /* RW; Range: [0x0, 0x7FF];FILTER coring threshold. */ + td_u16 slope; /* RW; Range: [0x0, 0xF]; FILTER Coring Slope */ + td_u16 limit; /* RW; Range: [0x0, 0x7FF];FILTER coring limit */ +} ot_isp_af_coring; + +#define OT_ISP_IIR_EN_NUM 3 +#define OT_ISP_IIR_GAIN_NUM 7 +#define OT_ISP_IIR_SHIFT_NUM 4 +/* Defines the IIR parameter configuration of horizontal filters for AF statistics. */ +typedef struct { + td_bool narrow_band_en; /* RW; Range: [0, 1]; IIR narrow band enable. */ + td_bool iir_en[OT_ISP_IIR_EN_NUM]; /* RW; Range: [0, 1]; IIR enable. */ + td_u8 iir_shift; /* RW; Range: [0, 63]; IIR Shift */ + td_s16 iir_gain[OT_ISP_IIR_GAIN_NUM]; /* RW; Range: [-511, 511]. IIR gain,gain0 range:[0,255]. */ + td_u16 iir_shift_lut[OT_ISP_IIR_SHIFT_NUM]; /* RW; Range: [0x0, 0x7]; IIR shift. */ + ot_isp_af_level_depend level_depend; /* RW; filter level depend. */ + ot_isp_af_coring coring; /* RW; filter coring. */ +} ot_isp_af_h_param; + +#define OT_ISP_FIR_GAIN_NUM 5 + +typedef struct { + td_s16 fir_gain[OT_ISP_FIR_GAIN_NUM]; /* RW; Range: [-31, 31]; FIR gain. */ + ot_isp_af_level_depend level_depend; /* RW; filter level depend. */ + ot_isp_af_coring coring; /* RW; filter coring. */ +} ot_isp_af_v_param; + +#define OT_ISP_ACC_SHIFT_H_NUM 2 +#define OT_ISP_ACC_SHIFT_V_NUM 2 +typedef struct { + td_u16 acc_shift_y; /* RW; Range: [0x0, 0xF]; luminance Y statistic shift. */ + td_u16 acc_shift_h[OT_ISP_ACC_SHIFT_H_NUM]; /* RW; Range: [0x0, 0xF]; IIR statistic shift. */ + td_u16 acc_shift_v[OT_ISP_ACC_SHIFT_V_NUM]; /* RW; Range: [0x0, 0xF]; FIR statistic shift. */ + td_u16 hl_cnt_shift; /* RW; Range: [0x0, 0xF]; High luminance counter shift */ +} ot_isp_af_fv_param; + +typedef struct { + ot_isp_af_cfg config; + ot_isp_af_h_param h_param_iir0; + ot_isp_af_h_param h_param_iir1; + ot_isp_af_v_param v_param_fir0; + ot_isp_af_v_param v_param_fir1; + ot_isp_af_fv_param fv_param; +} ot_isp_focus_stats_cfg; + +/* + the main purpose of stat key was to access individual statistic info separately... + ...for achieving performance optimization of CPU, because of we acquire stat... + ... in ISP_DRV ISR for our firmware reference and USER can also use alternative MPI... + ... to do this job, so bit1AeStat1~bit1AfStat for MPI behavior control, and bit16IsrAccess... + ... for ISR access control, they were independent. but they have the same bit order, for example... + ... bit1AeStat1 for MPI AeStat1 access key, and bit16 of u32Key for ISR AeStat1 access key + */ +typedef union { + td_u32 key; + struct { + td_u32 bit1_fe_ae_global_stat : 1; /* [0] */ + td_u32 bit1_fe_ae_local_stat : 1; /* [1] */ + td_u32 bit1_fe_ae_stitch_global_stat : 1; /* [2] */ + td_u32 bit1_fe_ae_stitch_local_stat : 1; /* [3] */ + td_u32 bit1_be_ae_global_stat : 1; /* [4] */ + td_u32 bit1_be_ae_local_stat : 1; /* [5] */ + td_u32 bit1_be_ae_stitch_global_stat : 1; /* [6] */ + td_u32 bit1_be_ae_stitch_local_stat : 1; /* [7] */ + td_u32 bit1_awb_stat1 : 1; /* [8] */ + td_u32 bit1_awb_stat2 : 1; /* [9] */ + td_u32 bit2_reserved0 : 2; /* [10:11] */ + td_u32 bit1_fe_af_stat : 1; /* [12] */ + td_u32 bit1_be_af_stat : 1; /* [13] */ + td_u32 bit2_reserved1 : 2; /* [14:15] */ + td_u32 bit1_dehaze : 1; /* [16] */ + td_u32 bit1_mg_stat : 1; /* [17] */ + td_u32 bit1_extend_stats : 1; /* [18] */ + td_u32 bit13_reserved : 13; /* [19:31] */ + }; +} ot_isp_stats_ctrl; + +/* statistics structs */ +#define OT_ISP_HIST_NUM 1024 + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AE_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AE_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_ae_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_MG_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_MG_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_mg_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AWB_ZONE_ORIG_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AWB_ZONE_ORIG_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_awb_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AF_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AF_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_focus_grid_info; + +typedef struct { + td_u32 fe_hist1024_value[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of FE */ + td_u16 fe_global_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of FE */ + td_u16 fe_zone_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of FE */ + td_u32 be_estimate_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Estimated Global 1024 bins histogram of BE */ + td_u32 be_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of BE */ + td_u16 be_global_avg[OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of BE */ + td_u16 be_zone_avg[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; + Format:16.0; Zone average value of BE */ + ot_isp_ae_grid_info fe_grid_info; + ot_isp_ae_grid_info be_grid_info; + td_u64 pts; +} ot_isp_ae_stats; + +typedef struct { + td_u32 fe_hist1024_value[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of FE */ + td_u16 fe_global_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of FE. */ + td_u16 fe_zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]\ + [OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of FE. */ + td_u32 be_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of BE. */ + td_u16 be_global_avg[OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Global average value of BE */ + td_u16 be_zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of BE */ + td_u64 pts; +} ot_isp_ae_stitch_stats; + +typedef struct { + td_u16 zone_avg[OT_ISP_MG_ZONE_ROW][OT_ISP_MG_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFF]; + Format:8.0; Zone average value */ + ot_isp_mg_grid_info grid_info; +} ot_isp_mg_stats; + +typedef enum { + OT_ISP_AWB_AFTER_DG = 0, + OT_ISP_AWB_AFTER_EXPANDER, + OT_ISP_AWB_AFTER_DRC, + OT_ISP_AWB_SWITCH_BUTT +} ot_isp_awb_switch; + +/* Crops the input image of the AWB module */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0;AWB crop enable */ + td_u16 x; /* RW; Range: [0, 8192 - 20]; + Format:13.0; AWB image crop start x, limited range:[0, image_width - zone_col * 20] */ + td_u16 y; /* RW; Range: [0, 8192 - 15]; + Format:13.0; AWB image crop start y,limited range:[0, image_height - zone_row * 15] */ + td_u16 width; /* RW; Range: [20, 8192]; Format:14.0; + AWB image crop width, limited range:[zone_col * 20, image_width] */ + td_u16 height; /* RW; Range: [15, 8192]; Format:14.0; + AWB image crop height, limited range:[zone_row * 15, image_height] */ +} ot_isp_awb_crop; + +/* Defines the AWB statistics configuration */ +typedef struct { + ot_isp_awb_switch awb_switch; /* RW; Range: [0x0, 0x2]; Position of AWB statistics in pipeline */ + td_u16 zone_row; /* RW; Range: [0x1, 0x20]; Vertical Blocks, + limited range:[ceil(image_height / 1024), min(32, image_height / 15)] */ + td_u16 zone_col; /* RW; Range: [0x1, 0x20]; Horizontal Blocks, + limited range:[max(BlkNum, ceil(width / 1024)), min(32, image_width / 20)] */ + td_u16 white_level; /* RW; Range: [0x0, 0xFFFF];Upper limit of valid data for white region, + for Bayer statistics, [0x0, 0x3FF] for RGB statistics */ + td_u16 black_level; /* RW; Range: [0x0, 0xFFFF];limited range: [0x0, u16WhiteLevel], + Lower limit of valid data for white region . + for Bayer statistics, bitwidth is 12, for RGB statistics, bitwidth is 10 */ + td_u16 cb_max; /* RW; Range: [0x0, 0xFFF];Maximum value of B/G for white region */ + td_u16 cb_min; /* RW; Range: [0x0, 0xFFF]; + limited range: [0x0, u16CbMax]Minimum value of B/G for white region */ + td_u16 cr_max; /* RW; Range: [0x0, 0xFFF];Maximum value of R/G for white region */ + td_u16 cr_min; /* RW; Range: [0x0, 0xFFF]; + limited range: [0x0, u16CrMax],Minimum value of R/G for white region */ + ot_isp_awb_crop crop; +} ot_isp_wb_stats_cfg; + +typedef struct { + td_u16 zone_row; /* R; Range: [0x0, 0x20]; + effective horizontal block number for AWB statistic stitch window */ + td_u16 zone_col; /* R; Range: [0x0, 0x80]; + effective vetical block number for AWB statistic stitch window */ + td_u16 zone_avg_r[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average R for Stitich mode */ + td_u16 zone_avg_g[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average G for Stitich mode */ + td_u16 zone_avg_b[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average B for Stitich mode */ + td_u16 zone_count_all[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF]; + normalized number of Gray points for Stitich mode */ + td_u64 pts; +} ot_isp_wb_stitch_stats; + +typedef struct { + td_u16 global_r; /* R; Range: [0x0, 0xFFFF];Global WB output Average R */ + td_u16 global_g; /* R; Range: [0x0, 0xFFFF];Global WB output Average G */ + td_u16 global_b; /* R; Range: [0x0, 0xFFFF];Global WB output Average B */ + td_u16 count_all; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + + td_u16 zone_avg_r[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average R */ + td_u16 zone_avg_g[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average G */ + td_u16 zone_avg_b[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average B */ + td_u16 zone_count_all[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + ot_isp_awb_grid_info grid_info; + td_u64 pts; +} ot_isp_wb_stats; + +typedef struct { + td_u16 v1; /* R; Range: [0x0, 0xFFFF];vertical fir block1 Statistics */ + td_u16 h1; /* R; Range: [0x0, 0xFFFF];horizontal iir block1 Statistics */ + td_u16 v2; /* R; Range: [0x0, 0xFFFF];vertical fir block2 Statistics */ + td_u16 h2; /* R; Range: [0x0, 0xFFFF];horizontal iir block2 Statistics */ + td_u16 y; /* R; Range: [0x0, 0xFFFF];Y Statistics */ + td_u16 hl_cnt; /* R; Range: [0x0, 0xFFFF];HlCnt Statistics */ +} ot_isp_focus_zone; + +typedef struct { + ot_isp_focus_zone zone_metrics[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; + The zoned measure of contrast */ +} ot_isp_fe_focus_stats; + +typedef struct { + ot_isp_focus_zone zone_metrics[OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */ +} ot_isp_be_focus_stats; + +typedef struct { + ot_isp_fe_focus_stats fe_af_stat; + ot_isp_be_focus_stats be_af_stat; + ot_isp_focus_grid_info fe_af_grid_info; + ot_isp_focus_grid_info be_af_grid_info; + td_u64 pts; +} ot_isp_af_stats; + +typedef struct { + td_bool enable; + ot_rect roi_rect; +} ot_isp_fe_roi_cfg; + +typedef struct { + ot_isp_stats_ctrl ctrl; + ot_isp_stats_ctrl update; + ot_isp_ae_stats_cfg ae_cfg; + ot_isp_wb_stats_cfg wb_cfg; + ot_isp_focus_stats_cfg focus_cfg; +} ot_isp_stats_cfg; + +typedef enum { + OT_ISP_DEBUG_AE = 0, + OT_ISP_DEBUG_AWB, + OT_ISP_DEBUG_BLC, + OT_ISP_DEBUG_DEHAZE, + OT_ISP_DEBUG_BUTT, +} ot_isp_debug_type; + +/* ISP debug information */ +typedef struct { + ot_isp_debug_type debug_type; /* RW; type of debug info */ + td_bool debug_en; /* RW; 1:enable debug, 0:disable debug */ + td_u64 phys_addr; /* RW; physics address of debug info */ + td_u32 depth; /* RW; depth of debug info */ +} ot_isp_debug_info; + +typedef struct { + td_u32 reserved; /* H;need to add member */ +} ot_isp_debug_attr; + +typedef struct { + td_u32 frame_num_begain; + td_u16 black_level_actual[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; BLC actual value */ + td_u16 black_level_original[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; BLC logic value */ + td_u32 frame_num_end; +} ot_isp_debug_status; + +/* +0 = Communication between the sensor and the ISP over the I2C interface +1 = Communication between the sensor and the ISP over the SSP interface +*/ +typedef enum { + OT_ISP_SNS_TYPE_I2C = 0, + OT_ISP_SNS_TYPE_SSP, + + OT_ISP_SNS_TYPE_BUTT, +} ot_isp_sns_type; + +/* sensor communication bus */ +typedef union { + td_s8 i2c_dev; /* AUTO:ot_isp_sns_type:OT_ISP_SNS_TYPE_I2C */ + struct { + td_s8 bit4_ssp_dev : 4; + td_s8 bit4_ssp_cs : 4; + } ssp_dev; /* AUTO:ot_isp_sns_type:OT_ISP_SNS_TYPE_SSP */ +} ot_isp_sns_commbus; + +typedef struct { + td_bool update; /* RW; Range: [0x0, 0x1]; Format:1.0; + TD_TRUE: The sensor registers are written, + TD_FALSE: The sensor registers are not written */ + td_u8 delay_frame_num; /* RW; Number of delayed frames for the sensor register */ + td_u8 interrupt_pos; /* RW;Position where the configuration of the sensor register takes effect */ + /* 0x0,very short frame start interrupt, 0x1:very short frame end interrupt, + 0x10,short frame start interrupt, 0x11:short frame end interrupt, + 0x20,middle frame start interrupt, 0x21:middle frame end interrupt, + 0x30,long frame start interrupt, 0x31:long frame end interrupt */ + td_u8 dev_addr; /* RW;Sensor device address */ + td_u32 reg_addr; /* RW;Sensor register address */ + td_u32 addr_byte_num; /* RW;Bit width of the sensor register address */ + td_u32 data; /* RW;Sensor register data */ + td_u32 data_byte_num; /* RW;Bit width of sensor register data */ +} ot_isp_i2c_data; + +typedef struct { + td_bool update; /* RW; Range: [0x0, 0x1]; Format:1.0; + TD_TRUE: The sensor registers are written, + TD_FALSE: The sensor registers are not written */ + td_u8 delay_frame_num; /* RW; Number of delayed frames for the sensor register */ + td_u8 interrupt_pos; /* RW;Position where the configuration of the sensor register takes effect + 0x0,very short frame start interrupt, 0x1:very short frame end interrupt + 0x10,short frame start interrupt, 0x11:short frame end interrupt + 0x20,middle frame start interrupt, 0x21:middle frame end interrupt + 0x30,long frame start interrupt, 0x31:long frame end interrupt */ + + td_u32 dev_addr; /* RW;Sensor device address */ + td_u32 dev_addr_byte_num; /* RW;Bit width of the sensor device address */ + td_u32 reg_addr; /* RW;Sensor register address */ + td_u32 reg_addr_byte_num; /* RW;Bit width of the sensor register address */ + td_u32 data; /* RW;Sensor register data */ + td_u32 data_byte_num; /* RW;Bit width of sensor register data */ +} ot_isp_ssp_data; + +typedef struct { + ot_isp_sns_type sns_type; /* RW; Range:[0, 1]; Format: 1.0; + OT_ISP_SNS_TYPE_I2C: I2C interface type between the sensor and ISP, + OT_ISP_SNS_TYPE_SSP: SPI interface type between the sensor and ISP */ + td_u32 reg_num; /* RW;Number of registers required when exposure results are written to the sensor. + The member value cannot be dynamically changed */ + td_u8 cfg2_valid_delay_max; /* RW;Maximum number of delayed frames from the time when all sensor registers are + configured to the time when configurations take effect, which is used to ensure + the synchronization between sensor registers and ISP registers */ + + td_u32 exp_distance[OT_ISP_WDR_MAX_FRAME_NUM - 1]; /* RW; wdr sensor exposure distance, + not support for Hi3519DV500 */ + ot_isp_sns_commbus com_bus; + union { + ot_isp_i2c_data i2c_data[OT_ISP_MAX_SNS_REGS]; /* AUTO: ot_isp_sns_type:OT_ISP_SNS_TYPE_I2C */ + ot_isp_ssp_data ssp_data[OT_ISP_MAX_SNS_REGS]; /* AUTO: ot_isp_sns_type:OT_ISP_SNS_TYPE_SSP */ + }; + + struct { + td_bool update; + td_u8 delay_frame_num; + td_u32 slave_vs_time; /* RW;time of vsync. Unit: inck clock cycle */ + td_u32 slave_bind_dev; + } slv_sync; + + td_bool config; +} ot_isp_sns_regs_info; + +typedef enum { + OT_ISP_VD_FE_START = 0, + OT_ISP_VD_FE_END, + OT_ISP_VD_BE_END, + + OT_ISP_VD_BUTT +} ot_isp_vd_type; + +/* Defines the attributes of the virtual addresses for the registers of ISP submodules */ +typedef struct { + td_void *isp_ext_reg_addr; /* R;Start virtual address for the ISP external virtual registers */ + td_u32 isp_ext_reg_size; /* R;Size of the ISP external virtual registers */ + td_void *ae_ext_reg_addr; /* R;Start virtual address for the AE library module */ + td_u32 ae_ext_reg_size; /* R;Size of the AE library module */ + td_void *awb_ext_reg_addr; /* R;Start virtual address for the AWB library module */ + td_u32 awb_ext_reg_size; /* R;Size of the AWB library module */ +} ot_isp_reg_attr; + +/* AI structs */ +/* + Defines the ISP iris type + 0 = DC iris + 1 = P iris + */ +typedef enum { + OT_ISP_IRIS_TYPE_DC = 0, + OT_ISP_IRIS_TYPE_P, + + OT_ISP_IRIS_TYPE_BUTT, +} ot_isp_iris_type; + +/* Defines the F value of the ISP iris */ +typedef enum { + OT_ISP_IRIS_F_NO_32_0 = 0, + OT_ISP_IRIS_F_NO_22_0, + OT_ISP_IRIS_F_NO_16_0, + OT_ISP_IRIS_F_NO_11_0, + OT_ISP_IRIS_F_NO_8_0, + OT_ISP_IRIS_F_NO_5_6, + OT_ISP_IRIS_F_NO_4_0, + OT_ISP_IRIS_F_NO_2_8, + OT_ISP_IRIS_F_NO_2_0, + OT_ISP_IRIS_F_NO_1_4, + OT_ISP_IRIS_F_NO_1_0, + + OT_ISP_IRIS_F_NO_BUTT, +} ot_isp_iris_f_no; + +typedef struct { + td_s32 kp; /* RW; Range:[0, 100000]; Format:32.0; the proportional gain of PID algorithm, + default value is 7000 */ + td_s32 ki; /* RW; Range:[0, 1000]; Format:32.0; the integral gain of PID algorithm, + default value is 100 */ + td_s32 kd; /* RW; Range:[0, 100000]; Format:32.0; the derivative gain of PID algorithm, + default value is 3000 */ + td_u32 min_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the min pwm duty for dciris control */ + td_u32 max_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the max pwm duty for dciris control */ + td_u32 open_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the open pwm duty for dciris control */ +} ot_isp_dciris_attr; + +typedef struct { + td_bool step_fno_table_change; /* W; Range:[0, 1]; Format:1.0; Step-F number mapping table change or not */ + td_bool zero_is_max; /* RW; Range:[0, 1]; Format:1.0; Step 0 corresponds to max aperture or not, + it's related to the specific iris */ + td_u16 total_step; /* RW; Range:[1, 1024]; Format:16.0; Total steps of Piris's aperture, + it's related to the specific iris */ + td_u16 step_count; /* RW; Range:[1, 1024]; Format:16.0; Used steps of Piris's aperture. + when Piris's aperture is too small, the F number precision is not enough, + so not all the steps can be used. It's related to the specific iris */ + td_u16 step_fno_table[OT_ISP_AI_MAX_STEP_FNO_NUM]; /* RW; Range:[1, 1024]; Format:16.0; Step-F number mapping table. + F1.0 is expressed as 1024, F32 is expressed as 1, + it's related to the specific iris */ + ot_isp_iris_f_no max_iris_fno_target; /* RW; Range:[0, 10]; Format:4.0; + Max F number of Piris's aperture, it's related to the specific iris */ + ot_isp_iris_f_no min_iris_fno_target; /* RW; Range:[0, 10]; Format:4.0; + Min F number of Piris's aperture, it's related to the specific iris */ + + td_bool fno_ex_valid; /* RW; Range:[0, 1]; Format:1.0; use equivalent gain to present FNO or not */ + td_u32 max_iris_fno_target_linear; /* RW; Range:[1, 1024]; Format:16.0; + Max equivalent gain of F number of Piris's aperture, + only used when bFNOExValid is true, it's related to the specific iris */ + td_u32 min_iris_fno_target_linear; /* RW; Range:[1, 1024]; Format:16.0; + Min equivalent gain of F number of Piris's aperture, + only used when bFNOExValid is true, it's related to the specific iris */ +} ot_isp_piris_attr; + +/* Defines the MI attribute */ +typedef struct { + td_u32 hold_value; /* RW; Range:[0, 1000]; Format:32.0; iris hold value for DC-iris */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; the F number of P-iris */ +} ot_isp_mi_attr; + +/* + Defines the ISP iris status + 0 = In this mode can set the MI holdvalue + 1 = Open Iris to the max + 2 = Close Iris to the min + */ +typedef enum { + OT_ISP_IRIS_KEEP = 0, + OT_ISP_IRIS_OPEN = 1, + OT_ISP_IRIS_CLOSE = 2, + OT_ISP_IRIS_BUTT +} ot_isp_iris_status; + +/* Defines the iris attribute */ +typedef struct { + td_bool enable; /* RW;iris enable/disable */ + ot_op_mode op_type; /* auto iris or manual iris */ + ot_isp_iris_type iris_type; /* DC-iris or P-iris */ + ot_isp_iris_status iris_status; /* RW; status of Iris */ + ot_isp_mi_attr mi_attr; +} ot_isp_iris_attr; + +/* AE structs */ +/* + Defines the AE mode + 0 = Automatic frame rate reduction mode (slow shutter mode) + 1 = Constant frame rate mode + */ +typedef enum { + OT_ISP_AE_MODE_SLOW_SHUTTER = 0, + OT_ISP_AE_MODE_FIX_FRAME_RATE = 1, + OT_ISP_AE_MODE_BUTT +} ot_isp_ae_mode; +/* + Defines the AE exposure policy mode + 0 = Highlight first exposure mode + 1 = Lowlight first exposure mode + */ +typedef enum { + OT_ISP_AE_EXP_HIGHLIGHT_PRIOR = 0, + OT_ISP_AE_EXP_LOWLIGHT_PRIOR = 1, + OT_ISP_AE_STRATEGY_MODE_BUTT +} ot_isp_ae_strategy; +/* Defines the maximum exposure time or gain and minimum exposure time or gain */ +typedef struct { + td_u32 max; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;Maximum value */ + td_u32 min; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;limited Range:[0,u32Max],Minimum value */ +} ot_isp_ae_range; + +/* Defines the ISP exposure delay attribute */ +typedef struct { + td_u16 black_delay_frame; /* RW; Range:[0, 65535]; Format:16.0; AE black delay frame count */ + td_u16 white_delay_frame; /* RW; Range:[0, 65535]; Format:16.0; AE white delay frame count */ +} ot_isp_ae_delay; + +/* + Defines the anti-flicker mode. + 0 = The epxosure time is fixed to be the multiplies of 1/(2*frequency) sec, + it may lead to over exposure in the high-luminance environments. + 1 = The anti flicker may be closed to avoid over exposure in the high-luminance environments. + */ +typedef enum { + OT_ISP_ANTIFLICKER_NORMAL_MODE = 0x0, + OT_ISP_ANTIFLICKER_AUTO_MODE = 0x1, + OT_ISP_ANTIFLICKER_MODE_BUTT +} ot_isp_antiflicker_mode; + +/* Defines the anti-flicker attribute */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + td_u8 frequency; /* RW; Range:[0, 255]; Format:8.0; + usually this value is 50 or 60 which is the frequency of the AC power supply */ + ot_isp_antiflicker_mode mode; +} ot_isp_antiflicker; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + + td_u8 luma_diff; /* RW; Range:[0, 100]; Format:8.0; if subflicker mode enable, current luma is less than AE + compensation plus LumaDiff, AE will keep min antiflicker shutter time + (for example: 1/100s or 1/120s) to avoid flicker. while current luma is larger than AE + compensation plus the LumaDiff, AE will reduce shutter time to avoid over-exposure and + introduce flicker in the pircture */ +} ot_isp_subflicker; + +typedef struct { + /* base parameter */ + ot_isp_ae_range exp_time_range; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; sensor exposure time (unit: us), + it's related to the specific sensor */ + ot_isp_ae_range a_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the + specific sensor */ + ot_isp_ae_range d_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the + specific sensor */ + ot_isp_ae_range ispd_gain_range; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain (unit: times, 10bit precision), it's related to the + ISP digital gain range */ + ot_isp_ae_range sys_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + system gain (unit: times, 10bit precision), it's related to the specific sensor + and ISP Dgain range */ + td_u32 gain_threshold; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + Gain threshold for slow shutter mode (unit: times, 10bit precision) */ + + td_u8 speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; + AE adjust step for dark scene to bright scene switch */ + td_u16 black_speed_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; + AE adjust step bias for bright scene to dark scene switch */ + td_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE adjust tolerance */ + td_u8 compensation; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE compensation */ + td_u16 ev_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE EV bias */ + ot_isp_ae_strategy ae_strategy_mode; /* RW; Range:[0, 1]; Format:1.0; Support Highlight prior or Lowlight prior */ + td_u16 hist_ratio_slope; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE hist ratio slope */ + td_u8 max_hist_offset; /* RW; Range:[0x0, 0xFF]; Format:8.0; Max hist offset */ + + ot_isp_ae_mode ae_mode; /* RW; Range:[0, 1]; Format:1.0; AE mode(slow shutter/fix framerate)(onvif) */ + ot_isp_antiflicker antiflicker; + ot_isp_subflicker subflicker; + ot_isp_ae_delay ae_delay_attr; + + td_bool manual_exp_value; /* RW; Range:[0, 1]; Format:1.0; manual exposure value or not */ + td_u32 exp_value; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; manual exposure value */ + + ot_isp_fswdr_mode fswdr_mode; /* RW; Range:[0, 2]; Format:2.0; FSWDR running mode */ + td_bool wdr_quick; /* RW; Range:[0, 1]; Format:1.0; WDR use delay strategy or not; + If is true, WDR AE adjust will be faster */ + + td_u16 iso_cal_coef; /* RW; Range:[0x0, 0xFFFF]; Format:8.8; + The coefficient between Standard ISO and origin ISO (unit: times, 8bit precision) */ +} ot_isp_ae_attr; + +typedef struct { + ot_op_mode exp_time_op_type; + ot_op_mode a_gain_op_type; + ot_op_mode d_gain_op_type; + ot_op_mode ispd_gain_op_type; + + td_u32 exp_time; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 a_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 d_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 isp_d_gain; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain(unit: times, 10bit precision), it's related to the ISP digital gain range */ +} ot_isp_me_attr; + +typedef struct { + td_bool bypass; /* RW; Range:[0, 1]; Format:1.0; */ + ot_op_mode op_type; + td_u8 ae_run_interval; /* RW; Range:[0x1, 0xFF]; Format:8.0; set the AE run interval */ + td_bool hist_stat_adjust; /* RW; Range:[0, 1]; Format:1.0; + TD_TRUE: 256 bin histogram statistic config will adjust when large red or blue + area detected. + TD_FALSE: 256 bin histogram statistic config will not change */ + td_bool ae_route_ex_valid; /* RW; Range:[0, 1]; Format:1.0; use extend AE route or not */ + ot_isp_me_attr manual_attr; + ot_isp_ae_attr auto_attr; + ot_isp_prior_frame prior_frame; /* RW; Range:[0, 1]; Format:1.0; AE prior frame */ + td_bool ae_gain_sep_cfg; /* RW; Range:[0, 1]; Format:1.0; long and short frame gain separately configure or not */ + td_bool advance_ae; /* RW; Range:[0, 1]; Format:1.0; open advance AE or not */ +} ot_isp_exposure_attr; + +#define OT_ISP_AE_ROUTE_MAX_NODES 16 +typedef struct { + td_u32 int_time; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 sys_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + system gain (unit: times, 10bit precision), it's related to the specific sensor and + ISP Dgain range */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; + the F number of the iris's aperture, only support for Piris */ + td_u32 iris_fno_lin; /* RW; Range:[0x1, 0x400]; Format:32.0; + the equivalent gain of F number of the iris's aperture, only support for Piris */ +} ot_isp_ae_route_node; + +typedef struct { + td_u32 total_num; /* RW; Range:[0, 0x10]; Format:8.0; total node number of AE route */ + ot_isp_ae_route_node route_node[OT_ISP_AE_ROUTE_MAX_NODES]; +} ot_isp_ae_route; + +#define OT_ISP_AE_ROUTE_EX_MAX_NODES 16 +typedef struct { + td_u32 int_time; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 a_gain; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 d_gain; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 isp_d_gain; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain (unit: times, 10bit precision) */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; + the F number of the iris's aperture, only support for Piris */ + td_u32 iris_fno_lin; /* RW; Range:[0x1, 0x400]; Format:32.0; + the equivalent gain of F number of the iris's aperture, only support for Piris */ +} ot_isp_ae_route_ex_node; + +typedef struct { + td_u32 total_num; /* RW; Range:[0, 0x10]; Format:8.0; total node number of extend AE route */ + ot_isp_ae_route_ex_node route_ex_node[OT_ISP_AE_ROUTE_EX_MAX_NODES]; +} ot_isp_ae_route_ex; + +typedef struct { + td_u32 exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; Linear long_exp_time */ + td_u32 short_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 2To1 WDR long_exp_time */ + td_u32 median_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 3To1 WDR long_exp_time */ + td_u32 long_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 4To1 WDR long_exp_time */ + td_u32 a_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 d_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 a_gain_sf; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 d_gain_sf; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 isp_d_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 exposure; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ + td_bool exposure_is_max; /* R; Range:[0, 1]; Format:1.0; */ + td_s16 hist_error; /* R; Range:[-32768, 32767]; Format:16.0; */ + td_u32 ae_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; + 1024 bins histogram for channel 1 */ + + td_u8 ave_lum; /* R; Range:[0x0, 0xFF]; Format:8.0; */ + td_u32 lines_per500ms; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; exposure lines per 500ms */ + td_u32 piris_fno; /* R; Range:[0x0, 0x400]; Format:32.0; */ + td_u32 fps; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; actual fps */ + td_u32 iso; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + td_u32 isosf; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + td_u32 iso_calibrate; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ + td_u32 ref_exp_ratio; /* R; Range:[0x40, 0x4000]; Format:26.6; */ + td_u16 wdr_exp_coef; /* R; Range:[0x0, 0x400]; Format:6.10; 0x400 means 1 times */ + td_u32 first_stable_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; AE first stable time for quick start */ + td_u32 quick_star_iso; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + ot_isp_ae_route ae_route; /* R; Actual AE route */ + ot_isp_ae_route_ex ae_route_ex; /* R; Actual AE route_ex */ + ot_isp_ae_route ae_route_sf; /* R; Actual AE route_sf */ + ot_isp_ae_route_ex ae_route_sf_ex; /* R; Actual AE route_sf_ex */ +} ot_isp_exp_info; + +typedef struct { + td_u32 reg_addr; + td_u32 reg_value; +} ot_isp_exp_param_reg; + +typedef struct { + td_u32 tar_fps; + td_u32 tar_isp_dgain; /* 10 bit */ + ot_isp_exp_param_reg time_reg[10]; /* default 10 */ + ot_isp_exp_param_reg again_reg[10]; /* default 10 */ + ot_isp_exp_param_reg dgain_reg[10]; /* default 10 */ +} ot_isp_exp_conv_param; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + td_u8 face_tolerance; /* RW; Range:[0, 0xFF]; Format:8.0 */ + td_u8 face_comp; /* RW; Range:[0, 0xFF]; Format:8.0 */ + td_u8 stat_delay_num; /* RW; Range:[0, 10]; Format:4.0 */ + td_u8 speed; /* RW; Range:[0, 0x64]; Format:7.0 */ + td_u16 face_delay_num; /* RW; Range:[0, 0x400]; Format:11.0 */ +} ot_isp_fast_face_ae_attr; + +#define OT_ISP_EXP_RATIO_NUM 3 +typedef struct { + ot_op_mode exp_ratio_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The exp_ratio used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The exp_ratio used in ISP is set by exp_ratio */ + td_u32 exp_ratio[OT_ISP_EXP_RATIO_NUM]; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio is invalid. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio is quotient of + long exposure time / short exposure time. */ + td_u32 exp_ratio_max; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio_max is max(upper limit) of + exp_ratio generated by firmware. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio_max is invalid. */ + td_u32 exp_ratio_min; /* RW; Range:[0x40, 0x4000]; Format:26.6; limited Range:[0x40, exp_ratio_max], + 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio_min is min(lower limit) of + exp_ratio generated by firmware. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio_min is invalid. */ + td_u16 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0;et the dynamic range tolerance. + Format: unsigned 6.2-bit fixed-point. 0x4 means 1dB. */ + td_u16 speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; exposure ratio adjust speed */ + td_u16 ratio_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; exposure ratio bias */ + td_u16 high_light_target; /* RW; Range:[0x0, 0x400]; Format:10.0; the high light target. */ + td_u16 exp_coef_min; /* RW; Range:[0x0, 0x400]; Format:6.10; 0x400 means 1 times; min exposure coefficient */ +} ot_isp_wdr_exposure_attr; + +typedef struct { + ot_op_mode exp_hdr_lv_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The ExpHDRLv used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The ExpHDRLv used in ISP is set by exp_hdr_lv */ + td_u32 exp_hdr_lv; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv is invalid. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv is the quotient of + exposure / linear exposure. */ + td_u32 exp_hdr_lv_max; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv_max is max(upper limit) of + ExpHDRLv generated by firmware. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv_max is invalid. */ + td_u32 exp_hdr_lv_min; /* RW; Range:[0x40, 0x400]; Format:26.6; limited range:[0x40, exp_hdr_lv_max], + 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv_min is min(lower limit) of + ExpHDRLv generated by firmware. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv_min is invalid. */ + td_u32 exp_hdr_lv_weight; /* RW; Range:[0x0, 0x400]; Format:16.0; exposure HDR level weight. */ +} ot_isp_hdr_exposure_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; smart ae enable or not */ + td_bool ir_mode; /* RW; Range:[0, 1]; Format:1.0; smart ae IR mode or not */ + ot_op_mode smart_exp_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The ExpCoef used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The ExpCoef used in ISP is set by u32ExpCoef */ + td_u16 exp_coef; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoef is invalid. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoef is the quotient of exposure. */ + td_u8 luma_target; /* RW; Range:[0x0, 0xFF]; Format:8.0; luma target of smart ae. */ + td_u16 exp_coef_max; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoefvMax is max(upper limit) of ExpCoef + generated by firmware. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoefMax is invalid. */ + td_u16 exp_coef_min; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoefMax is min(lower limit) of ExpCoef + generated by firmware. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoefMin is invalid. */ + td_u8 smart_interval; /* RW; Range:[0x1, 0xFF]; Format:8.0; smart ae run interval */ + td_u8 smart_speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; smart ae adjust step */ + td_u16 smart_delay_num; /* RW; Range:[0x0, 0x400]; Format:16.0; smart ae adjust delay frame num */ +} ot_isp_smart_exposure_attr; + +/* AWB structs */ +/* + * Defines the AWB online calibration type + * avg_r_gain: the avg value of Rgain after online calibration + * avg_b_gain: the avg value of Bgain after online calibration + */ +typedef struct { + td_u16 avg_r_gain; + td_u16 avg_b_gain; +} ot_isp_awb_calibration_gain; + +/* + Defines the AWB algorithm type + 0 = Improved gray world algorithm. + 1 = AWB algorithm that classifies the statistics and re-filters the white blocks + 2 = AWB algorithm that opt outdoor performance for dv + */ +typedef enum { + OT_ISP_AWB_ALG_LOWCOST = 0, + OT_ISP_AWB_ALG_ADVANCE = 1, + OT_ISP_AWB_ALG_NATURA = 2, + OT_ISP_AWB_ALG_BUTT +} ot_isp_awb_alg_type; + +/* + Defines the AWB policy in the multi-illuminant scenario + 0 = Automatic saturation adjustment in the multi-illuminant scenario + 1 = Automatic ccm adjustment in the multi-illuminant scenario + */ +typedef enum { + OT_ISP_AWB_MULTI_LS_SAT = 0, + OT_ISP_AWB_MULTI_LS_CCM = 1, + OT_ISP_AWB_MULTI_LS_BUTT +} ot_isp_awb_multi_ls_type; + +typedef enum { + OT_ISP_AWB_SCENE_MODE_INDOOR = 0, + OT_ISP_AWB_SCENE_MODE_OUTDOOR = 1, + OT_ISP_AWB_SCENE_MODE_BUTT +} ot_isp_awb_scene_mode_status; + +/* Defines the AWB gain range */ +typedef struct { + td_bool enable; + ot_op_mode op_type; + + td_u16 high_rg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; + in Manual Mode, user define the Max Rgain of High Color Temperature */ + td_u16 high_bg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; + in Manual Mode, user define the Min Bgain of High Color Temperature */ + td_u16 low_rg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; limited range:[0x0, high_rg_limit), + in Manual Mode, user define the Min Rgain of Low Color Temperature */ + td_u16 low_bg_limit; /* RW; Range:[0, 0xFFF]; Format:4.8; limited Range:(high_bg_limit, 0xFFF], + in Manual Mode, user define the Max Bgain of Low Color Temperature */ +} ot_isp_awb_ct_limit_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; Outdoor/Indoor scenario determination enable */ + ot_op_mode op_type; + ot_isp_awb_scene_mode_status scene_status; /* RW; User should config indoor or outdoor status in Manual Mode */ + td_u32 out_thresh; /* RW;Format:32.0;shutter time(in us) to judge indoor or outdoor */ + td_u16 low_start; /* RW;Format:16.0;5000K is recommend */ + td_u16 low_stop; /* RW;Format:16.0;limited range:(0, low_start), + 4500K is recommend, should be smaller than low_start */ + td_u16 high_start; /* RW;Format:16.0;limited range:(low_start, 0xFFFF], + 6500K is recommend, should be larger than low_start */ + td_u16 high_stop; /* RW;Format:16.0;limited range:(high_start, 0xFFFF], + 8000K is recommend, should be larger than high_start */ + td_bool green_enhance_en; /* RW; Range:[0, 1]; Format:1.0;If this is enabled, Green channel will be enhanced + based on the ratio of green plant */ + td_u8 out_shift_limit; /* RW; Range:[0, 0xFF]; Format:8.0;Max white point zone distance to Planckian Curve */ +} ot_isp_awb_in_out_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; + If enabled, statistic parameter cr, cb will change according to iso */ + + td_u16 cr_max[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF]; cr_max[i] >= cr_min[i] */ + td_u16 cr_min[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF] */ + td_u16 cb_max[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF]; cb_max[i] >= cb_min[i] */ + td_u16 cb_min[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF] */ +} ot_isp_awb_cbcr_track_attr; + +#define OT_ISP_AWB_LUM_HIST_NUM 6 +/* Defines the parameters of the luminance histogram statistics for white balance */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; + If enabled, zone weight to awb is combined with zone luma */ + ot_op_mode op_type; /* In auto mode, the weight distribution follows Gaussian distribution */ + td_u8 hist_thresh[OT_ISP_AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFF]; Format:8.0; + In manual mode, user define luma thresh, thresh[0] is 0, + thresh[5] is 0xFF, thresh[i] greater or equal to thresh[i-1] */ + td_u16 hist_wt[OT_ISP_AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; + user can define luma weight in both manual and auto mode. */ +} ot_isp_awb_lum_histgram_attr; + +/* Defines the information about a separate illuminant */ +typedef struct { + td_u16 white_r_gain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/R of White points at this light source */ + td_u16 white_b_gain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/B of White points at this light source */ + td_u16 exp_quant; /* RW;shutter time * again * dgain >> 4, Not support Now */ + td_u8 light_status; /* RW;Range:[0,2]; Format:2.0; idle 1:add light source 2:delete sensitive color */ + td_u8 radius; /* RW;Range:[0x0, 0xFF]; Format:8.0; Radius of light source, */ +} ot_isp_awb_extra_light_source_info; + +#define OT_ISP_AWB_LS_NUM 4 +#define OT_ISP_AWB_MULTI_CT_NUM 8 +/* extended AWB attributes */ +typedef struct { + td_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AWB adjust tolerance */ + td_u8 zone_radius; /* RW; Range:[0x0, 0xFF]; Format:8.0; radius of AWB blocks */ + td_u16 curve_l_limit; /* RW; Range:[0x0, 0x100]; Format:9.0; Left limit of AWB Curve, + recommend for indoor 0xE0, outdoor 0xE0 */ + td_u16 curve_r_limit; /* RW; Range:[0x100, 0xFFF]; Format:12.0; Right Limit of AWB Curve, + recommend for indoor 0x130, outdoor 0x120 */ + + td_bool extra_light_en; /* RW; Range:[0, 1]; Format:1.0; Enable special light source function */ + ot_isp_awb_extra_light_source_info light_info[OT_ISP_AWB_LS_NUM]; + ot_isp_awb_in_out_attr in_or_out; + + td_bool multi_light_source_en; /* RW; Range:[0, 1]; Format:1.0; If enabled, awb will do special process + in multi light source environment */ + ot_isp_awb_multi_ls_type multi_ls_type; /* Saturation or CCM Tuning */ + td_u16 multi_ls_scaler; /* RW; Range:[0x0, 0x100]; Format:12.0; + In saturation type, it means the max saturation it can achieve, + in ccm type, it means the strength of multi process. */ + td_u16 multi_ct_bin[OT_ISP_AWB_MULTI_CT_NUM]; /* RW; Range:[0, 0XFFFF]; Format:16.0; + AWB Support divide the color temperature range by 8 bins */ + td_u16 multi_ct_wt[OT_ISP_AWB_MULTI_CT_NUM]; /* RW; Range:[0x0, 0x400];Weight for different color temperature, + same value of 8 means CT weight doesn't work, */ + + td_bool fine_tun_en; /* RW; Range:[0x0, 0x1]; Format:1.0;If enabled, skin color scene will be optimized */ + td_u8 fine_tun_strength; /* RW; Range:[0x0, 0xFF]; Format:8.0; + larger value means better performance of skin color scene, + but will increase error probability in low color temperature scene */ +} ot_isp_awb_attr_ex; + +#define OT_ISP_AWB_CURVE_PARA_NUM 6 +typedef struct { + td_bool enable; /* RW; Range:[0x0, 0x1]; Format:1.0;If AWB is disabled, static wb gain will be used, + otherwise auto wb gain will be used */ + + td_u16 ref_color_temp; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; Calibration Information */ + td_u16 static_wb[OT_ISP_BAYER_CHN_NUM]; /* RW; Range:[0x0, 0xFFF]; Format:12.0;Calibration Information */ + td_s32 curve_para[OT_ISP_AWB_CURVE_PARA_NUM]; /* RW; Format:32.0;Calibration Information, + limited Range:as32CurvePara[3] != 0, as32CurvePara[4]==128 */ + + ot_isp_awb_alg_type alg_type; + + td_u8 rg_strength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of R Channel */ + td_u8 bg_strength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of B Channel */ + td_u16 speed; /* RW; Range: [0x0, 0xFFF]; Format:12.0; Convergence speed of AWB */ + td_u16 zone_sel; /* RW; Range: [0, 255]; Format:8.0; A value of 0 or 0xFF means global AWB, + A value between 0 and 0xFF means zoned AWB */ + td_u16 high_color_temp; /* RW; Range: [1, 65535]; Format:16.0; AWB max temperature, Recommended: [8500, 10000] */ + td_u16 low_color_temp; /* RW; Range: [0, 65535]; Format:16.0; Limited Range:[0, high_color_temp), + AWB min temperature, Recommended: [2000, 2500] */ + ot_isp_awb_ct_limit_attr ct_limit; + td_bool shift_limit_en; /* RW; Range: [0, 1]; Format:1.0; If enabled, when the statistic information is out of + range, it should be project back */ + td_u8 shift_limit; /* RW; Range: [0x0, 0xFF]; Format:8.0; planckian curve range, Recommended: [0x30, 0x50] */ + td_bool gain_norm_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, the min of RGB gain is fixed. */ + td_bool natural_cast_en; /* RW, Range: [0, 1]; Format:1.0; if enabled, the color performance will be natural in + lowlight and low color temperature */ + + ot_isp_awb_cbcr_track_attr cb_cr_track; + ot_isp_awb_lum_histgram_attr luma_hist; + td_bool awb_zone_wt_en; /* RW, Range: [0, 1]; Format:1.0; if enabled, user can set weight for each zones */ + td_u8 zone_wt[OT_ISP_AWB_ZONE_NUM]; /* RW; Range: [0, 255]; Format:8.0;Zone Wt Table */ +} ot_isp_awb_attr; + +typedef struct { + td_u16 r_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for R color channel */ + td_u16 gr_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gr color channel */ + td_u16 gb_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gb color channel */ + td_u16 b_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for B color channel */ +} ot_isp_mwb_attr; + +typedef enum { + OT_ISP_ALG_AWB_GW = 0, + OT_ISP_ALG_AWB_SPEC = 1, + OT_ISP_ALG_BUTT +} ot_isp_awb_alg; + +typedef struct { + td_bool bypass; /* RW; Range: [0, 1]; Format:1.0; If enabled, awb will be bypassed */ + td_u8 awb_run_interval; /* RW; Range: [0x1, 0xFF]; Format:8.0; set the AWB run interval */ + ot_op_mode op_type; + ot_isp_mwb_attr manual_attr; + ot_isp_awb_attr auto_attr; + ot_isp_awb_alg alg_type; +} ot_isp_wb_attr; + +typedef struct { + td_bool sat_en; /* RW; Range: [0, 1]; Format:1.0; + If sat_en=1, the active CCM = SatMatrix * ManualMatrix, + else the active CCM = ManualMatrix */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; Manul CCM matrix, */ +} ot_isp_color_matrix_manual; + +typedef struct { + td_u16 color_temp; /* RW; Range: [500, 30000]; Format:16.0; the current color temperature */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8;CCM matrixes for different + color temperature */ +} ot_isp_color_matrix_param; + +typedef struct { + td_bool iso_act_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass in low light */ + td_bool temp_act_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass when color temperature is + larger than 8000K or less than 2500K */ + td_u16 ccm_tab_num; /* RW; Range: [0x3, 0x7]; Format:16.0; The number of CCM matrixes */ + ot_isp_color_matrix_param ccm_tab[OT_ISP_CCM_MATRIX_NUM]; +} ot_isp_color_matrix_auto; + +typedef struct { + ot_op_mode op_type; + ot_isp_color_matrix_manual manual_attr; + ot_isp_color_matrix_auto auto_attr; +} ot_isp_color_matrix_attr; + +typedef struct { + td_u8 saturation; /* RW; Range: [0, 0xFF]; Format:8.0; set the manual saturation of CCM */ +} ot_isp_saturation_manual; + +typedef struct { + td_u8 sat[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 0xFF]; should be decreased with increasing ISO */ +} ot_isp_saturation_auto; + +typedef struct { + ot_op_mode op_type; + ot_isp_saturation_manual manual_attr; + ot_isp_saturation_auto auto_attr; +} ot_isp_saturation_attr; + +typedef struct { + td_u16 red_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; R channel gain after CCM */ + td_u16 green_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; G channel gain after CCM */ + td_u16 blue_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; B channel gain after CCM */ +} ot_isp_color_tone_attr; + +typedef struct { + td_u16 r_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8;AWB result of R color channel */ + td_u16 gr_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gr color channel */ + td_u16 gb_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gb color channel */ + td_u16 b_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of B color channel */ + td_u16 saturation; /* R; Range: [0x0, 0xFF];Format:8.0;Current saturation */ + td_u16 color_temp; /* R; Range: [0x0, 0xFFFF];Format:16.0;Detect color temperature, maybe out of color + cemeprature range */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* R; Range: [0x0, 0xFFFF];Format:16.0;Current color correction matrix */ + + td_u16 ls0_ct; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of primary light source */ + td_u16 ls1_ct; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of secondary light source */ + td_u16 ls0_area; /* R; Range: [0x0, 0xFF];Format:8.0;area of primary light source */ + td_u16 ls1_area; /* R; Range: [0x0, 0xFF];Format:8.0;area of secondary light source */ + td_u8 multi_degree; /* R; Range: [0x0, 0xFF];0 means uniform light source, larger value means multi + light source */ + td_u16 active_shift; /* R; Range;[0x0,0xFF] */ + td_u32 first_stable_time; /* R, Range: [0x0, 0xFFFFFFFF];Format:32.0;AWB first stable frame number */ + ot_isp_awb_scene_mode_status scene_status; /* R; indoor or outdoor status */ + td_s16 bv; /* R; Range;[-32768, 32767]; Bv value */ +} ot_isp_wb_info; + +typedef struct { + td_bool is_ir_mode; + td_u32 ae_comp; + td_u32 exp_time; + td_float int_time_accu; + td_u32 a_gain; + td_float again_accu; + td_u32 d_gain; + td_float dgain_accu; + td_u32 ispd_gain; + td_u32 exposure; + td_u32 init_iso; + td_u32 lines_per500ms; + td_u32 piris_fno; + td_u16 wb_r_gain; + td_u16 wb_g_gain; + td_u16 wb_b_gain; + td_u16 sample_r_gain; + td_u16 sample_b_gain; + td_u16 init_ccm[OT_ISP_CCM_MATRIX_SIZE]; + td_bool ae_route_ex_valid; + td_bool quick_start_en; + ot_isp_ae_route ae_route; + ot_isp_ae_route_ex ae_route_ex; + ot_isp_ae_route ae_route_sf; + ot_isp_ae_route_ex ae_route_sf_ex; + td_u32 ae_stat_pos; +} ot_isp_init_attr; + +typedef struct { + td_s32 distance_max; /* RW;the focus range */ + td_s32 distance_min; + td_u8 wgt[OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* RW;weighting table */ +} ot_isp_af_attr; + +typedef struct { + td_s32 default_speed; /* RW;1,default speed(unit:m/s).(onvif) */ +} ot_isp_mf_attr; + +typedef struct { + ot_op_mode op_type; + ot_isp_mf_attr manual_attr; + ot_isp_af_attr auto_attr; +} ot_isp_focus_attr; + +/* + DNG cfalayout type + 1 = Rectangular (or square) layout + 2 = Staggered layout A: even columns are offset down by 1/2 row + 3 = Staggered layout B: even columns are offset up by 1/2 row + 4 = Staggered layout C: even rows are offset right by 1/2 column + 5 = Staggered layout D: even rows are offset left by 1/2 column + 6 = Staggered layout E: even rows are offset up by 1/2 row, even columns are offset left by 1/2 column + 7 = Staggered layout F: even rows are offset up by 1/2 row, even columns are offset right by 1/2 column + 8 = Staggered layout G: even rows are offset down by 1/2 row, even columns are offset left by 1/2 column + 9 = Staggered layout H: even rows are offset down by 1/2 row, even columns are offset right by 1/2 column + */ +typedef enum { + OT_ISP_CFALAYOUT_TYPE_RECTANGULAR = 1, + OT_ISP_CFALAYOUT_TYPE_A, /* a,b,c... not support */ + OT_ISP_CFALAYOUT_TYPE_B, + OT_ISP_CFALAYOUT_TYPE_C, + OT_ISP_CFALAYOUT_TYPE_D, + OT_ISP_CFALAYOUT_TYPE_E, + OT_ISP_CFALAYOUT_TYPE_F, + OT_ISP_CFALAYOUT_TYPE_G, + OT_ISP_CFALAYOUT_TYPE_H, + OT_ISP_CFALAYOUT_TYPE_BUTT +} ot_isp_dng_cfa_layout_type; + +typedef struct { + td_s32 numerator; /* represents the numerator of a fraction, */ + td_s32 denominator; /* the denominator. */ +} ot_isp_dng_srational; + +typedef struct { + td_u16 repeat_row; + td_u16 repeat_col; +} ot_isp_dng_black_level_repeat_dim; + +typedef struct { + ot_isp_dng_srational default_scale_hor; + ot_isp_dng_srational default_scale_ver; +} ot_isp_dng_default_scale; + +typedef struct { + td_u16 repeat_pattern_dim_row; + td_u16 repeat_pattern_dim_col; +} ot_isp_dng_repeat_pattern_dim; + +/* Defines the structure of dng raw format. */ +typedef struct { + td_u8 bits_per_sample; /* RO;Format:8.0; Indicate the bit numbers of raw data */ + td_u8 cfa_plane_color[OT_CFACOLORPLANE]; /* RO;Format:8.0; Indicate the planer numbers of raw data; + 0:red 1:green 2: blue */ + ot_isp_dng_cfa_layout_type cfa_layout; /* RO;Range:[1,9]; Describes the spatial layout of the CFA */ + ot_isp_dng_black_level_repeat_dim black_level_repeat_dim; /* Specifies repeat pattern size for the BlackLevel */ + td_u32 white_level; /* RO;Format:32.0; Indicate the WhiteLevel of the raw data */ + ot_isp_dng_default_scale default_scale; /* Specifies the default scale factors for each direction to convert + the image to square pixels */ + ot_isp_dng_repeat_pattern_dim cfa_repeat_pattern_dim; /* Specifies the pixel number of repeat color planer in + each direction */ + td_u8 cfa_pattern[OT_ISP_BAYER_CHN_NUM]; /* RO;Format:8.0; Indicate the bayer start order; + 0:red 1:green 2: blue */ +} ot_isp_dng_raw_format; + +/* Defines the structure of dng image static information. read only */ +typedef struct { + ot_isp_dng_raw_format dng_raw_format; + ot_isp_dng_srational color_matrix1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ + values to reference camera native color space values, + under the first calibration illuminant. */ + ot_isp_dng_srational color_matrix2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ + values to reference camera native color space values, + under the second calibration illuminant. */ + ot_isp_dng_srational camera_calibration1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms + reference camera native space values to + individual camera native space values under + the first calibration illuminant */ + ot_isp_dng_srational camera_calibration2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms + reference camera native space values to + individual camera native space values under + the second calibration illuminant */ + ot_isp_dng_srational forwad_matrix1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera + colors to XYZ D50 colors */ + ot_isp_dng_srational forwad_matrix2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera + colors to XYZ D50 colors */ + + td_u8 calibration_illuminant1; /* RO;Format:8.0;Light source, actually this means white balance setting. + '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, + '17' standard light A, '18' standard light B, '19' standard light C, + '20' D55, '21' D65, '22' D75, '255' other */ + td_u8 calibration_illuminant2; /* RO;Format:8.0;Light source, actually this means white balance setting. + '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, + '17' standard light A, '18' standard light B, '19' standard light C, + '20' D55, '21' D65, '22' D75, '255' other */ +} ot_isp_dng_image_static_info; + +/* Defines the structure of DNG WB gain used for calculate DNG colormatrix. */ +typedef struct { + td_u16 r_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for R color channel */ + td_u16 g_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for G color channel */ + td_u16 b_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for B color channel */ +} ot_isp_dng_wb_gain; + +typedef struct { + td_u16 color_temp; /* RW; range:[2000,10000]; format:16.0; the current color temperature */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; range: [0x0, 0xFFFF]; format:8.8; + CCM matrixes for different color temperature */ +} ot_isp_dng_ccm_tab; + +/* Defines the structure of DNG color parameters. */ +typedef struct { + ot_isp_dng_wb_gain wb_gain1; /* the calibration White balance gain of colorcheker in low colortemper light source */ + ot_isp_dng_wb_gain wb_gain2; /* the calibration White balance gain of colorcheker in high colortemper + light source */ + ot_isp_dng_ccm_tab ccm_tab1; /* the calibration CCM in low colortemper light source */ + ot_isp_dng_ccm_tab ccm_tab2; /* the calibration CCM in high colortemper light source */ +} ot_isp_dng_color_param; + +typedef enum { + OT_ISP_IR_STATUS_NORMAL = 0, + OT_ISP_IR_STATUS_IR = 1, + OT_ISP_IR_BUTT +} ot_isp_ir_status; + +typedef enum { + OT_ISP_IR_SWITCH_NONE = 0, + OT_ISP_IR_SWITCH_TO_NORMAL = 1, + OT_ISP_IR_SWITCH_TO_IR = 2, + OT_ISP_IR_SWITCH_BUTT +} ot_isp_ir_switch_status; + +typedef struct { + td_bool enable; /* RW, TD_TRUE: enable IR_auto function; TD_TRUE: disable IR_auto function. */ + td_u32 normal_to_ir_iso_threshold; /* RW, Range: [0, 0xFFFFFFFF]. + ISO threshold of switching from normal to IR mode. */ + td_u32 ir_to_normal_iso_threshold; /* RW, Range: [0, 0xFFFFFFFF]. + ISO threshold of switching from IR to normal mode. */ + td_u32 rg_max; /* RW, Range: [0x0, 0xFFF]. Maximum value of R/G in IR scene, 4.8-bit fix-point. */ + td_u32 rg_min; /* RW, Range: [0x0, u32RGMax]. Minimum value of R/G in IR scene, 4.8-bit fix-point. */ + td_u32 bg_max; /* RW, Range: [0x0, 0xFFF]. Maximum value of B/G in IR scene, 4.8-bit fix-point. */ + td_u32 bg_min; /* RW, Range: [0x0, u32BGMax]. Minimum value of B/G in IR scene, 4.8-bit fix-point. */ + + ot_isp_ir_status ir_status; /* RW. Current IR status. */ + ot_isp_ir_switch_status ir_switch; /* RO, IR switch status. */ +} ot_isp_ir_auto_attr; + +typedef enum { + OT_ISP_FLICKER_TYPE_NONE = 0, + OT_ISP_FLICKER_TYPE_UNKNOW, + OT_ISP_FLICKER_TYPE_50HZ, + OT_ISP_FLICKER_TYPE_60HZ, + OT_ISP_FLICKER_TYPE_BUTT, +} ot_isp_calc_flicker_type; + +typedef struct { + td_u32 lines_per_second; /* The total line number of 1 second */ +} ot_isp_calc_flicker_input; + +typedef struct { + ot_isp_calc_flicker_type flicker_type; /* The calculate result of flicker type */ +} ot_isp_calc_flicker_output; + +#define OT_BAYER_CALIBRATION_PARA_NUM_NEW 16 +typedef struct { + td_double calibration_coef[OT_BAYER_CALIBRATION_PARA_NUM_NEW]; +} ot_isp_noise_calibration; + +typedef union { + td_u32 key; + struct { + td_u32 bit1_ae : 1; /* [0] */ + td_u32 bit1_awb : 1; /* [1] */ + td_u32 bit30_reserved : 30; /* [2:31] */ + }; +} ot_isp_detail_stats_ctrl; + +typedef struct { + td_bool enable; + ot_isp_detail_stats_ctrl ctrl; + td_u8 row; /* RW; Range: [1, 4], when col = 1, raw can't = 1, (1, 4]; Vertical Blocks */ + td_u8 col; /* RW; Range: [1, 6]; when raw = 1, col can't = 1, (1, 6]; Horizontal Blocks */ + td_u16 interval; +} ot_isp_detail_stats_cfg; + +#define OT_ISP_DETAIL_STATS_MAX_ROW 4 +#define OT_ISP_DETAIL_STATS_MAX_COLUMN 6 +#define OT_ISP_DETAIL_STATS_BLK_NUM_MAX (OT_ISP_DETAIL_STATS_MAX_COLUMN * OT_ISP_DETAIL_STATS_MAX_ROW) + +#define OT_ISP_DETAIL_AWB_ZONE_NUM (OT_ISP_AWB_ZONE_NUM * OT_ISP_DETAIL_STATS_BLK_NUM_MAX) +#define OT_ISP_DETAIL_AE_ZONE_ROW (OT_ISP_AE_ZONE_ROW * OT_ISP_DETAIL_STATS_MAX_ROW) +#define OT_ISP_DETAIL_AE_ZONE_COLUMN (OT_ISP_AE_ZONE_COLUMN * OT_ISP_DETAIL_STATS_MAX_COLUMN) + +typedef struct { + td_u16 grid_y_pos[OT_ISP_DETAIL_AE_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_DETAIL_AE_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_detail_ae_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AWB_ZONE_ORIG_ROW * OT_ISP_DETAIL_STATS_MAX_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AWB_ZONE_ORIG_COLUMN * OT_ISP_DETAIL_STATS_MAX_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_detail_awb_grid_info; + +typedef struct { + td_u16 be_zone_avg[OT_ISP_DETAIL_AE_ZONE_ROW][OT_ISP_DETAIL_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of BE detail stats */ + ot_isp_detail_ae_grid_info ae_grid_info; +} ot_isp_detail_ae_stats; + +typedef struct { + td_u16 zone_avg_r[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average R */ + td_u16 zone_avg_g[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average G */ + td_u16 zone_avg_b[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average B */ + td_u16 zone_count_all[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + ot_isp_detail_awb_grid_info awb_grid_info; +} ot_isp_detail_awb_stats; + +typedef struct { + ot_isp_detail_ae_stats ae_stats; + ot_isp_detail_awb_stats awb_stats; + td_u64 pts; +} ot_isp_detail_stats; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_COMM_ISP_H */ diff --git a/kernel/include/hi3519dv500/ot_common_snap.h b/kernel/include/hi3519dv500/ot_common_snap.h new file mode 100644 index 0000000..3f1cf3a --- /dev/null +++ b/kernel/include/hi3519dv500/ot_common_snap.h @@ -0,0 +1,94 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_SNAP_H +#define OT_COMMON_SNAP_H + +#include "ot_common.h" +#include "ot_common_video.h" +#include "ot_common_isp.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define OT_ERR_SNAP_INVALID_PIPE_ID OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_INVALID_PIPE_ID) +#define OT_ERR_SNAP_ILLEGAL_PARAM OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_ILLEGAL_PARAM) +#define OT_ERR_SNAP_NULL_PTR OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_NULL_PTR) +#define OT_ERR_SNAP_NOT_SUPPORT OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_SUPPORT) +#define OT_ERR_SNAP_NOT_PERM OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_PERM) +#define OT_ERR_SNAP_NO_MEM OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_NO_MEM) +#define OT_ERR_SNAP_NOT_READY OT_DEFINE_ERR(OT_ID_SNAP, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_READY) + +typedef enum { + OT_SNAP_TYPE_NORM, /* ZSL and none-ZSL type */ + OT_SNAP_TYPE_PRO, /* Professional type support HDR, AEB, LongExposure */ + OT_SNAP_TYPE_BUTT +} ot_snap_type; + +typedef struct { + td_u32 frame_cnt; /* RW; Set capture frame counts */ + td_u32 repeat_send_times; /* + * RW; Range: [0, 3]; + * When FE-BE is offline, the first raw frame that is triggered + * should be sent repeatedly to the BE. + */ + + td_bool zsl_en; /* RW; statical attrs */ + td_u32 frame_depth; /* RW; buffer depth: [1,8] */ + td_u32 rollback_ms; /* RW; Rollback time, unit(ms), invalid when zsl_en is TD_FALSE */ + td_u32 interval; /* RW; For continuous capture, select frame every intercal frames */ +} ot_snap_norm_attr; + +typedef struct { + td_u32 exp_time[OT_ISP_PRO_MAX_FRAME_NUM]; /* + * RW; Range: [0x0, 0xFFFFFFFF], sensor exposure time (unit: us), + * it's related to the specific sensor. + */ + + td_u32 sys_gain[OT_ISP_PRO_MAX_FRAME_NUM]; /* + * RW; Range: [0x400, 0xFFFFFFFF], + * system gain (unit: times, 10bit precision), + * it's related to the specific sensor and ISP d_gain range. + */ +} ot_snap_pro_manual_param; + +typedef struct { + td_u16 exp_step[OT_ISP_PRO_MAX_FRAME_NUM]; /* + * RW; Range:[0x0, 0xFFFF], + * Professional exposure step (unit: times, 8bit precision). + */ +} ot_snap_pro_auto_param; + +typedef struct { + ot_op_mode op_mode; + ot_snap_pro_auto_param auto_param; + ot_snap_pro_manual_param manual_param; +} ot_snap_pro_param; + +typedef struct { + td_u32 frame_cnt; /* RW; Range: [1, OT_ISP_PRO_MAX_FRAME_NUM] */ + td_u32 repeat_send_times; /* + * RW; Range: [0, 3]; + * When FE-BE is offline, the first raw frame that is triggered + * should be sent repeatedly to the BE. + */ + + ot_snap_pro_param pro_param; +} ot_snap_pro_attr; + +typedef struct { + ot_snap_type snap_type; /* snap type */ + td_bool load_ccm_en; /* TD_TRUE:use CCM of snap_isp_info, TD_FALSE: Algorithm calculate */ + union { + ot_snap_norm_attr norm_attr; /* AUTO: ot_snap_type:OT_SNAP_TYPE_NORM. */ + ot_snap_pro_attr pro_attr; /* AUTO: ot_snap_type:OT_SNAP_TYPE_PRO. */ + }; +} ot_snap_attr; + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* OT_COMMON_SNAP_H */ diff --git a/kernel/include/hi3519dv500/ot_common_sns.h b/kernel/include/hi3519dv500/ot_common_sns.h new file mode 100644 index 0000000..24fa721 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_common_sns.h @@ -0,0 +1,195 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_SNS_H +#define OT_COMMON_SNS_H + +#include "ot_type.h" +#include "ot_common.h" +#include "ot_common_isp.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +typedef struct { + td_bool update; + td_u16 black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* 14bits */ +} ot_isp_black_level_auto_attr; + +typedef struct { + ot_size ob_sns_size; +} ot_isp_sns_total_size_attr; + +typedef struct { + td_bool user_black_level_en; + td_u16 user_black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; + ot_isp_black_level_mode black_level_mode; + ot_isp_black_level_manual_attr manual_attr; + ot_isp_black_level_dynamic_attr dynamic_attr; + ot_isp_black_level_auto_attr auto_attr; + ot_isp_sns_total_size_attr sns_with_ob_attr; +} ot_isp_cmos_black_level; + +typedef struct { + ot_sensor_id sns_id; +} ot_isp_sns_attr_info; + +#define BAYER_CALIBRATION_PARA_NUM 3 + +typedef struct { + td_u32 max_width; + td_u32 max_height; +} ot_isp_cmos_sns_max_resolution; + +typedef struct { + ot_isp_shading_attr lsc_attr; + ot_isp_shading_lut_attr lsc_lut; +} ot_isp_cmos_lsc; + +typedef struct { + ot_isp_lblc_attr lblc_attr; + ot_isp_lblc_lut_attr lblc_lut; +} ot_isp_cmos_lblc; + +typedef struct { + ot_isp_clut_attr clut_attr; + ot_isp_clut_lut clut_lut; +} ot_isp_cmos_clut; + +typedef struct { + td_u32 sns_id; + td_u8 sns_mode; + td_bool valid_dng_raw_format; + ot_isp_dng_raw_format dng_raw_format; +} ot_isp_cmos_sns_mode; + +typedef ot_isp_dng_color_param ot_isp_cmos_dng_color_param; + +typedef struct { + td_u32 exp_ratio[OT_ISP_EXP_RATIO_NUM]; +} ot_isp_cmos_wdr_switch_attr; + +typedef struct { + td_u16 g_param_high_ct[OT_ISP_LSC_GRID_POINTS]; + td_u16 g_param_low_ct[OT_ISP_LSC_GRID_POINTS]; +} ot_isp_acs_y_shading_lut; + +typedef struct { + td_float avg_rg_map[OT_ISP_LSC_GRID_POINTS]; + td_float avg_bg_map[OT_ISP_LSC_GRID_POINTS]; + td_float prof_rg_map[OT_ISP_LSC_GRID_POINTS]; + td_float prof_bg_map[OT_ISP_LSC_GRID_POINTS]; +} ot_isp_acs_color_shading_lut; + +typedef struct { + td_s16 light_index[OT_ISP_ACS_LIGHT_NUM * OT_ISP_ACS_CHN_NUM]; + td_float model_ar_min; + td_float model_ar_step; + td_float model_ab_min; + td_float model_ab_step; + td_s16 light_type_g_high; + td_s16 light_type_g_low; +} ot_isp_acs_calib_param; + +typedef struct { + ot_isp_acs_attr acs_attr; + ot_isp_acs_calib_param acs_calib_param; + ot_isp_acs_y_shading_lut acs_y_shading_lut; + ot_isp_acs_color_shading_lut acs_color_shading_lut; +} ot_isp_cmos_acs; + +typedef union { + td_u64 key; + struct { + td_u64 bit1_drc : 1; /* [0] */ + td_u64 bit1_demosaic : 1; /* [1] */ + td_u64 bit1_pregamma : 1; /* [2] Not support for Hi3519DV500 */ + td_u64 bit1_gamma : 1; /* [3] */ + td_u64 bit1_sharpen : 1; /* [4] */ + td_u64 bit1_ldci : 1; /* [5] */ + td_u64 bit1_dpc : 1; /* [6] */ + td_u64 bit1_lsc : 1; /* [7] */ + td_u64 bit1_ge : 1; /* [8] */ + td_u64 bit1_anti_false_color : 1; /* [9] */ + td_u64 bit1_bayer_nr : 1; /* [10] */ + td_u64 bit1_ca : 1; /* [11] */ + td_u64 bit1_expander : 1; /* [12] */ + td_u64 bit1_clut : 1; /* [13] */ + td_u64 bit1_wdr : 1; /* [14] */ + td_u64 bit1_dehaze : 1; /* [15] */ + td_u64 bit1_cac : 1; /* [16] */ + td_u64 bit1_acs : 1; /* [17] */ + td_u64 bit1_bshp : 1; /* [18] */ + td_u64 bit1_lblc : 1; /* [19] */ + td_u64 bit44_reserved : 44; /* [20:63] */ + }; +} ot_isp_cmos_alg_key; + +typedef struct { + ot_isp_cmos_alg_key key; + const ot_isp_drc_attr *drc; + const ot_isp_demosaic_attr *demosaic; + const ot_isp_gamma_attr *gamma; + const ot_isp_sharpen_attr *sharpen; + const ot_isp_ldci_attr *ldci; + const ot_isp_dp_dynamic_attr *dpc; + const ot_isp_cmos_lsc *lsc; + const ot_isp_cr_attr *ge; + const ot_isp_anti_false_color_attr *anti_false_color; + const ot_isp_nr_attr *bayer_nr; + const ot_isp_ca_attr *ca; + const ot_isp_expander_attr *expander; + const ot_isp_cmos_clut *clut; + const ot_isp_wdr_fs_attr *wdr; + const ot_isp_dehaze_attr *dehaze; + const ot_isp_cac_attr *cac; + const ot_isp_bayershp_attr *bshp; + const ot_isp_cmos_acs *acs; + const ot_isp_cmos_lblc *lblc; + ot_isp_noise_calibration noise_calibration; + ot_isp_cmos_sns_max_resolution sns_max_resolution; + ot_isp_cmos_sns_mode sns_mode; + ot_isp_cmos_dng_color_param dng_color_param; + ot_isp_cmos_wdr_switch_attr wdr_switch_attr; +} ot_isp_cmos_default; + +typedef struct { + td_u16 width; + td_u16 height; + td_float fps; + td_u8 sns_mode; +} ot_isp_cmos_sns_image_mode; + +typedef struct { + td_void (*pfn_cmos_sns_init)(ot_vi_pipe vi_pipe); + td_void (*pfn_cmos_sns_exit)(ot_vi_pipe vi_pipe); + td_void (*pfn_cmos_sns_global_init)(ot_vi_pipe vi_pipe); + td_s32 (*pfn_cmos_set_image_mode)(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode); + td_s32 (*pfn_cmos_set_wdr_mode)(ot_vi_pipe vi_pipe, td_u8 mode); + + /* the algs get data which is associated with sensor, except 3a */ + td_s32 (*pfn_cmos_get_isp_default)(ot_vi_pipe vi_pipe, ot_isp_cmos_default *def); + td_s32 (*pfn_cmos_get_isp_black_level)(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level); + td_s32 (*pfn_cmos_get_blc_clamp_info)(ot_vi_pipe vi_pipe, td_bool *clamp_en); + td_s32 (*pfn_cmos_get_sns_reg_info)(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info); + + /* the function of sensor set pixel detect */ + td_void (*pfn_cmos_set_pixel_detect)(ot_vi_pipe vi_pipe, td_bool enable); + td_s32 (*pfn_cmos_get_awb_gains)(ot_vi_pipe vi_pipe, td_u32 *sns_awb_gain); +} ot_isp_sns_exp_func; + +typedef struct { + ot_isp_sns_exp_func sns_exp; +} ot_isp_sns_register; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_COMM_SNS_H */ diff --git a/kernel/include/hi3519dv500/ot_common_video.h b/kernel/include/hi3519dv500/ot_common_video.h new file mode 100644 index 0000000..c069e02 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_common_video.h @@ -0,0 +1,1270 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_VIDEO_H +#define OT_COMMON_VIDEO_H + +#include "ot_type.h" +#include "ot_common.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define OT_ISP_BAYER_CHN 4 +#define OT_DCF_DESCRIPTION_LENGTH 32 +#define OT_DCF_CAPTURE_TIME_LENGTH 20 +#define OT_CFACOLORPLANE 3 +#define OT_DNG_NP_SIZE 6 +#define OT_ISP_WB_GAIN_NUM 4 +/* 3*3=9 matrix */ +#define OT_ISP_CAP_CCM_NUM 9 +#define OT_SRC_LENS_COEF_NUM 9 +#define OT_DST_LENS_COEF_NUM 14 +#define OT_ISP_WDR_MAX_FRAME_NUM 4 + +#define OT_GDC_COMMON_COEF_NUM 9 +#define OT_GDC_MAX_STITCH_NUM 4 + +#define OT_NR_S_IDX_LEN 17 + +#define OT_FMU_MIN_PAGE_NUM 4 +#define OT_FMU_MAX_Y_PAGE_NUM 512 +#define OT_FMU_MAX_C_PAGE_NUM 256 + +#define OT_DIS_PRIVATE_NUM 9 +#define OT_DIS_MOTIONDATA_NUM 9 +#define OT_DIS_POINT_NUM 10 + +typedef enum { + OT_OP_MODE_AUTO = 0, + OT_OP_MODE_MANUAL = 1, + OT_OP_MODE_BUTT +} ot_op_mode; + +typedef enum { + OT_VB_SRC_COMMON = 0, + OT_VB_SRC_MOD = 1, + OT_VB_SRC_PRIVATE = 2, + OT_VB_SRC_USER = 3, + OT_VB_SRC_BUTT +} ot_vb_src; + +typedef enum { + OT_ASPECT_RATIO_NONE = 0, /* full screen */ + OT_ASPECT_RATIO_AUTO = 1, /* ratio no change, 1:1 */ + OT_ASPECT_RATIO_MANUAL = 2, /* ratio manual set */ + OT_ASPECT_RATIO_BUTT +} ot_aspect_ratio_type; + +typedef enum { + OT_VIDEO_FIELD_TOP = 1, /* even field */ + OT_VIDEO_FIELD_BOTTOM = 2, /* odd field */ + OT_VIDEO_FIELD_INTERLACED = 3, /* two interlaced fields */ + OT_VIDEO_FIELD_FRAME = 4, /* frame */ + + OT_VIDEO_FIELD_BUTT +} ot_video_field; + +typedef enum { + OT_VIDEO_FORMAT_LINEAR = 0, /* nature video line */ + OT_VIDEO_FORMAT_TILE_64x16, /* tile cell: 64pixel x 16line */ + OT_VIDEO_FORMAT_TILE_16x8, /* tile cell: 16pixel x 8line */ + OT_VIDEO_FORMAT_TILE_32x4, /* tile cell: 32pixel x 4ine */ + + OT_VIDEO_FORMAT_BUTT +} ot_video_format; + +typedef enum { + OT_COMPRESS_MODE_NONE = 0, /* no compress */ + OT_COMPRESS_MODE_SEG, /* compress unit is 256x1 bytes as a segment. */ + OT_COMPRESS_MODE_SEG_COMPACT, /* compact compress unit is 256x1 bytes as a segment. */ + OT_COMPRESS_MODE_TILE, /* compress unit is a tile. */ + OT_COMPRESS_MODE_LINE, /* compress unit is the whole line. */ + OT_COMPRESS_MODE_FRAME, /* compress unit is the whole frame. YUV for 3DNR */ + OT_COMPRESS_MODE_FMAP, /* compress unit is the whole line, based on mapping transformation. */ + + OT_COMPRESS_MODE_BUTT +} ot_compress_mode; + +typedef enum { + OT_VIDEO_DISPLAY_MODE_PREVIEW = 0, + OT_VIDEO_DISPLAY_MODE_PLAYBACK = 1, + + OT_VIDEO_DISPLAY_MODE_BUTT +} ot_video_display_mode; + +typedef enum { + OT_FRAME_FLAG_SNAP_FLASH = 0x1 << 0, + OT_FRAME_FLAG_SNAP_CUR = 0x1 << 1, + OT_FRAME_FLAG_SNAP_REF = 0x1 << 2, + OT_FRAME_FLAG_SNAP_END = 0x1 << 3, + OT_FRAME_FLAG_MIRROR = 0x1 << 4, + OT_FRAME_FLAG_FLIP = 0x1 << 5, + OT_FRAME_FLAG_DGAIN_BYPASS = 0x1 << 6, + OT_FRAME_FLAG_OUTPUT_NONE = 0x1 << 7, + OT_FRAME_FLAG_USER_SEND_DISCARD = 0x1 << 8, + OT_FRAME_FLAG_BUTT +} ot_frame_flag; + +typedef enum { + OT_COLOR_GAMUT_BT601 = 0, + OT_COLOR_GAMUT_BT709, + OT_COLOR_GAMUT_BT2020, + OT_COLOR_GAMUT_USER, + OT_COLOR_GAMUT_BUTT +} ot_color_gamut; + +/* we ONLY define picture format used, all unused will be deleted! */ +typedef enum { + OT_PIXEL_FORMAT_RGB_444 = 0, + OT_PIXEL_FORMAT_RGB_555, + OT_PIXEL_FORMAT_RGB_565, + OT_PIXEL_FORMAT_RGB_888, + + OT_PIXEL_FORMAT_BGR_444, + OT_PIXEL_FORMAT_BGR_555, + OT_PIXEL_FORMAT_BGR_565, + OT_PIXEL_FORMAT_BGR_888, + + OT_PIXEL_FORMAT_ARGB_1555, + OT_PIXEL_FORMAT_ARGB_4444, + OT_PIXEL_FORMAT_ARGB_8565, + OT_PIXEL_FORMAT_ARGB_8888, + OT_PIXEL_FORMAT_ARGB_2BPP, + OT_PIXEL_FORMAT_ARGB_CLUT2, + OT_PIXEL_FORMAT_ARGB_CLUT4, + + OT_PIXEL_FORMAT_ABGR_1555, + OT_PIXEL_FORMAT_ABGR_4444, + OT_PIXEL_FORMAT_ABGR_8565, + OT_PIXEL_FORMAT_ABGR_8888, + + OT_PIXEL_FORMAT_RGB_BAYER_8BPP, + OT_PIXEL_FORMAT_RGB_BAYER_10BPP, + OT_PIXEL_FORMAT_RGB_BAYER_12BPP, + OT_PIXEL_FORMAT_RGB_BAYER_14BPP, + OT_PIXEL_FORMAT_RGB_BAYER_16BPP, + + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_H10, + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_H12, + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_H14, + + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_L10, + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_L12, + OT_PIXEL_FORMAT_RGB_BAYER_16BPP_L14, + + OT_PIXEL_FORMAT_YVU_PLANAR_422, + OT_PIXEL_FORMAT_YVU_PLANAR_420, + OT_PIXEL_FORMAT_YVU_PLANAR_444, + + OT_PIXEL_FORMAT_YVU_SEMIPLANAR_422, + OT_PIXEL_FORMAT_YVU_SEMIPLANAR_420, + OT_PIXEL_FORMAT_YVU_SEMIPLANAR_444, + + OT_PIXEL_FORMAT_YUV_SEMIPLANAR_422, + OT_PIXEL_FORMAT_YUV_SEMIPLANAR_420, + OT_PIXEL_FORMAT_YUV_SEMIPLANAR_444, + + OT_PIXEL_FORMAT_YUYV_PACKAGE_422, + OT_PIXEL_FORMAT_YVYU_PACKAGE_422, + OT_PIXEL_FORMAT_UYVY_PACKAGE_422, + OT_PIXEL_FORMAT_VYUY_PACKAGE_422, + OT_PIXEL_FORMAT_YYUV_PACKAGE_422, + OT_PIXEL_FORMAT_YYVU_PACKAGE_422, + OT_PIXEL_FORMAT_UVYY_PACKAGE_422, + OT_PIXEL_FORMAT_VUYY_PACKAGE_422, + OT_PIXEL_FORMAT_VY1UY0_PACKAGE_422, + + OT_PIXEL_FORMAT_YUV_400, + OT_PIXEL_FORMAT_UV_420, + + /* SVP data format */ + OT_PIXEL_FORMAT_BGR_888_PLANAR, + OT_PIXEL_FORMAT_HSV_888_PACKAGE, + OT_PIXEL_FORMAT_HSV_888_PLANAR, + OT_PIXEL_FORMAT_LAB_888_PACKAGE, + OT_PIXEL_FORMAT_LAB_888_PLANAR, + OT_PIXEL_FORMAT_S8C1, + OT_PIXEL_FORMAT_S8C2_PACKAGE, + OT_PIXEL_FORMAT_S8C2_PLANAR, + OT_PIXEL_FORMAT_S8C3_PLANAR, + OT_PIXEL_FORMAT_S16C1, + OT_PIXEL_FORMAT_U8C1, + OT_PIXEL_FORMAT_U16C1, + OT_PIXEL_FORMAT_S32C1, + OT_PIXEL_FORMAT_U32C1, + OT_PIXEL_FORMAT_U64C1, + OT_PIXEL_FORMAT_S64C1, + + OT_PIXEL_FORMAT_BUTT +} ot_pixel_format; + +typedef enum { + OT_DYNAMIC_RANGE_SDR8 = 0, + OT_DYNAMIC_RANGE_SDR10, + OT_DYNAMIC_RANGE_HDR10, + OT_DYNAMIC_RANGE_HLG, + OT_DYNAMIC_RANGE_SLF, + OT_DYNAMIC_RANGE_XDR, + OT_DYNAMIC_RANGE_BUTT +} ot_dynamic_range; + +typedef enum { + OT_DATA_BIT_WIDTH_8 = 0, + OT_DATA_BIT_WIDTH_10, + OT_DATA_BIT_WIDTH_12, + OT_DATA_BIT_WIDTH_14, + OT_DATA_BIT_WIDTH_16, + OT_DATA_BIT_WIDTH_32, + OT_DATA_BIT_WIDTH_64, + OT_DATA_BIT_WIDTH_BUTT +} ot_data_bit_width; + +typedef struct { + td_u32 top_width; + td_u32 bottom_width; + td_u32 left_width; + td_u32 right_width; + td_u32 color; +} ot_border; + +typedef struct { + td_s32 x; + td_s32 y; +} ot_point; + +typedef struct { + td_u32 width; + td_u32 height; +} ot_size; + +typedef struct { + td_s32 x; + td_s32 y; + td_u32 width; + td_u32 height; +} ot_rect; + +typedef enum { + OT_COORD_ABS = 0, /* Absolute coordinate. */ + OT_COORD_RATIO, /* Ratio coordinate. */ + OT_COORD_BUTT +} ot_coord; + +typedef enum { + OT_COVER_RECT = 0, /* Rectangle cover. */ + OT_COVER_QUAD, /* Quadrangle cover. */ + OT_COVER_BUTT +} ot_cover_type; + +typedef struct { + td_bool is_solid; /* RW; Solid or hollow cover. */ + td_u32 thick; /* RW; Thick of the hollow quadrangle. */ + ot_point point[OT_QUAD_POINT_NUM]; /* RW; Four points of the quadrangle. */ +} ot_quad_cover; + +typedef struct { + td_bool is_solid; /* RW; Solid or hollow cover. */ + td_u32 thick; /* RW; Thick of the hollow rectangle. */ + ot_rect rect; /* RW; The area of rectangle. */ +} ot_rect_cover; + +typedef struct { + ot_cover_type type; /* RW; Cover type. */ + union { + ot_rect_cover rect_attr; /* RW; The rectangle area. AUTO:ot_cover_type:OT_COVER_RECT; */ + ot_quad_cover quad_attr; /* RW; The quadrangle area. AUTO:ot_cover_type:OT_COVER_QUAD; */ + }; + td_u32 color; /* RW; Range: [0,0xFFFFFF]; Color of cover. */ +} ot_cover; + +typedef enum { + OT_MOSAIC_BLK_SIZE_4 = 0, /* block size 4 * 4 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_8, /* block size 8 * 8 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_16, /* block size 16 * 16 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_32, /* block size 32 * 32 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_64, /* block size 64 * 64 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_128, /* block size 128 * 128 of MOSAIC */ + OT_MOSAIC_BLK_SIZE_BUTT +} ot_mosaic_blk_size; + +typedef struct { + ot_mosaic_blk_size blk_size; + ot_rect rect; /* RW; The rectangle area. */ +} ot_mosaic; + +typedef struct { + td_bool enable; + ot_rect rect; +} ot_crop_info; + +typedef struct { + td_s32 src_frame_rate; /* RW; source frame rate */ + td_s32 dst_frame_rate; /* RW; dest frame rate */ +} ot_frame_rate_ctrl; + +typedef struct { + ot_aspect_ratio_type mode; /* aspect ratio mode: none/auto/manual */ + td_u32 bg_color; /* background color, RGB 888 */ + ot_rect video_rect; /* valid in ASPECT_RATIO_MANUAL mode */ +} ot_aspect_ratio; + +typedef struct { + td_s16 offset_top; /* top offset of show area */ + td_s16 offset_left; /* left offset of show area */ + td_s16 offset_bottom; /* bottom offset of show area */ + td_s16 offset_right; /* right offset of show area */ + + td_u32 max_luma; /* for HDR */ + td_u32 min_luma; /* for HDR */ + td_u64 private_data[OT_MAX_PRIVATE_DATA_NUM]; +} ot_video_supplement_misc; + +typedef struct { + td_phys_addr_t misc_info_phys_addr; /* default allocated buffer */ + td_phys_addr_t jpeg_dcf_phys_addr; + td_phys_addr_t isp_info_phys_addr; + td_phys_addr_t low_delay_phys_addr; + td_phys_addr_t bnr_mot_phys_addr; + td_phys_addr_t motion_data_phys_addr; + td_phys_addr_t frame_dng_phys_addr; + td_phys_addr_t aiisp_phys_addr; + + td_void* ATTRIBUTE misc_info_virt_addr; /* misc info */ + td_void* ATTRIBUTE jpeg_dcf_virt_addr; /* jpeg_dcf, used in JPEG DCF */ + td_void* ATTRIBUTE isp_info_virt_addr; /* isp_frame_info, used in ISP debug, when get raw and send raw */ + td_void* ATTRIBUTE low_delay_virt_addr; /* used in low delay */ + td_void* ATTRIBUTE bnr_mot_virt_addr; /* used for 3dnr from bnr mot */ + td_void* ATTRIBUTE motion_data_virt_addr; /* gme motion data, filter motion data, gyro data. */ + td_void* ATTRIBUTE frame_dng_virt_addr; + td_void* ATTRIBUTE aiisp_virt_addr; /* aiisp info */ +} ot_video_supplement; + +typedef struct { + td_u32 width; + td_u32 height; + ot_video_field field; + ot_pixel_format pixel_format; + ot_video_format video_format; + ot_compress_mode compress_mode; + ot_dynamic_range dynamic_range; + ot_color_gamut color_gamut; + + td_u32 header_stride[OT_MAX_COLOR_COMPONENT]; + td_u32 stride[OT_MAX_COLOR_COMPONENT]; + + td_phys_addr_t header_phys_addr[OT_MAX_COLOR_COMPONENT]; + td_phys_addr_t phys_addr[OT_MAX_COLOR_COMPONENT]; + td_void* ATTRIBUTE header_virt_addr[OT_MAX_COLOR_COMPONENT]; + td_void* ATTRIBUTE virt_addr[OT_MAX_COLOR_COMPONENT]; + + td_u32 time_ref; + td_u64 pts; + + td_u64 user_data[OT_MAX_USER_DATA_NUM]; + td_u32 frame_flag; /* frame_flag, can be OR operation. */ + ot_video_supplement supplement; +} ot_video_frame; + +typedef struct { + ot_video_frame video_frame; + td_u32 pool_id; + ot_mod_id mod_id; +} ot_video_frame_info; + +typedef struct { + td_u32 vb_size; + + td_u32 head_stride; + td_u32 head_size; + td_u32 head_y_size; + + td_u32 main_stride; + td_u32 main_size; + td_u32 main_y_size; +} ot_vb_calc_cfg; + +typedef struct { + ot_pixel_format pixel_format; /* bitmap's pixel format */ + td_u32 width; /* bitmap's width */ + td_u32 height; /* bitmap's height */ + td_void* ATTRIBUTE data; /* address of bitmap's data */ +} ot_bmp; + +/* Angle of rotation */ +typedef enum { + OT_ROTATION_0 = 0, + OT_ROTATION_90 = 1, + OT_ROTATION_180 = 2, + OT_ROTATION_270 = 3, + OT_ROTATION_BUTT +} ot_rotation; + +typedef enum { + OT_ROTATION_VIEW_TYPE_ALL = 0, /* View all source Image,no lose */ + OT_ROTATION_VIEW_TYPE_TYPICAL = 1, /* View from rotation Image with source size,same lose */ + OT_ROTATION_VIEW_TYPE_INSIDE = 2, /* View with no black section,all in dest Image */ + OT_ROTATION_VIEW_TYPE_BUTT, +} ot_rotation_view_type; + +typedef struct { + ot_rotation_view_type view_type; /* RW;range: [0, 2];rotation mode */ + td_u32 angle; /* RW;range: [0,360];rotation angle:[0,360] */ + /* RW;range: [-511, 511];horizontal offset of the image distortion center relative to image center. */ + td_s32 center_x_offset; + /* RW;range: [-511, 511];vertical offset of the image distortion center relative to image center. */ + td_s32 center_y_offset; + ot_size dst_size; /* RW; range: width:[480, 8192],height:[360, 8192]; dest size of any angle rotation */ +} ot_free_rotation_attr; + +typedef enum { + OT_ROTATION_ANG_FIXED = 0, /* Fixed angle. */ + OT_ROTATION_ANG_FREE, /* Free angle. */ + OT_ROTATION_ANG_FREE_HP, /* Free high-precision angle. */ + OT_ROTATION_ANG_BUTT +} ot_rotation_type; + +typedef struct { + td_bool enable; /* RW; range: [0, 1]; Rotate enable. */ + ot_rotation_type rotation_type; /* RW; Rotate type. */ + union { + /* + * RW; Fixed rotation attribute. + * AUTO:ot_rotation_type:OT_ROTATION_ANG_FIXED; + */ + ot_rotation rotation_fixed; + /* + * RW; Free rotation attribute. + * AUTO:ot_rotation_type:OT_ROTATION_ANG_FREE, OT_ROTATION_ANG_FREE_HP; + */ + ot_free_rotation_attr rotation_free; + }; +} ot_rotation_attr; + +typedef enum { + OT_FRAME_INTERRUPT_START, + OT_FRAME_INTERRUPT_EARLY, + OT_FRAME_INTERRUPT_EARLY_END, + OT_FRAME_INTERRUPT_EARLY_EARLY, + OT_FRAME_INTERRUPT_BUTT, +} ot_frame_interrupt_type; + +typedef struct { + ot_frame_interrupt_type interrupt_type; + td_u32 early_line; +} ot_frame_interrupt_attr; + +typedef enum { + OT_DATA_RATE_X1 = 0, /* RW; output 1 pixel per clock */ + OT_DATA_RATE_X2, /* RW; output 2 pixel per clock */ + + OT_DATA_RATE_BUTT +} ot_data_rate; + +typedef enum { + OT_WDR_MODE_NONE = 0, + OT_WDR_MODE_BUILT_IN, + OT_WDR_MODE_QUADRA, + + OT_WDR_MODE_2To1_LINE, + OT_WDR_MODE_2To1_FRAME, + + OT_WDR_MODE_3To1_LINE, + OT_WDR_MODE_3To1_FRAME, + + OT_WDR_MODE_4To1_LINE, + OT_WDR_MODE_4To1_FRAME, + + OT_WDR_MODE_BUTT, +} ot_wdr_mode; + +typedef enum { + OT_CORNER_RECT_TYPE_CORNER = 0, + OT_CORNER_RECT_TYPE_FULL_LINE, + OT_CORNER_RECT_TYPE_BUTT +}ot_corner_rect_type; + +typedef struct { + ot_rect rect; + td_u32 hor_len; + td_u32 ver_len; + td_u32 thick; +} ot_corner_rect; + +typedef struct { + ot_corner_rect_type corner_rect_type; + td_u32 color; +} ot_corner_rect_attr; + +typedef struct { + td_u8 image_description[OT_DCF_DESCRIPTION_LENGTH]; + /* shows manufacturer of digital cameras */ + td_u8 make[OT_DCF_DESCRIPTION_LENGTH]; + /* shows model number of digital cameras */ + td_u8 model[OT_DCF_DESCRIPTION_LENGTH]; + /* shows firmware (internal software of digital cameras) version number */ + td_u8 software[OT_DCF_DESCRIPTION_LENGTH]; + /* + * light source, actually this means white balance setting. '0' means unknown, '1' daylight, + * '2' fluorescent, '3' tungsten, '10' flash, '17' standard light A, '18' standard light B, + * '19' standard light C, '20' D55, '21' D65, '22' D75, '255' other. + */ + td_u8 light_source; + /* focal length of lens used to take image. unit is millimeter */ + td_u32 focal_length; + /* indicates the type of scene. value '0x01' means that the image was directly photographed. */ + td_u8 scene_type; + /* + * indicates the use of special processing on image data, such as rendering geared to output. + * 0 = normal process, 1 = custom process. + */ + td_u8 custom_rendered; + /* indicates the equivalent focal length assuming a 35mm film camera, in mm */ + td_u8 focal_length_in35mm_film; + /* indicates the type of scene that was shot. 0 = standard, 1 = landscape, 2 = portrait, 3 = night scene. */ + td_u8 scene_capture_type; + /* + * indicates the degree of overall image gain adjustment. 0 = none, 1 = low gain up, 2 = high gain up, + * 3 = low gain down, 4 = high gain down. + */ + td_u8 gain_control; + /* + * indicates the direction of contrast processing applied by the camera when the image was shot. + * 0 = normal, 1 = soft, 2 = hard. + */ + td_u8 contrast; + /* + * indicates the direction of saturation processing applied by the camera when the image was shot. + * 0 = normal, 1 = low saturation, 2 = high saturation. + */ + td_u8 saturation; + /* + * indicates the direction of sharpness processing applied by the camera when the image was shot. + * 0 = normal, 1 = soft, 2 = hard. + */ + td_u8 sharpness; + /* + * exposure metering method. '0' means unknown, '1' average, '2' center weighted average, '3' spot, + * '4' multi-spot, '5' multi-segment, '6' partial, '255' other. + */ + td_u8 metering_mode; +} ot_isp_dcf_const_info; + +typedef struct { + /* CCD sensitivity equivalent to ag-hr film speedrate */ + td_u32 iso_speed_ratings; + /* exposure time (reciprocal of shutter speed). */ + td_u32 exposure_time; + /* exposure bias (compensation) value of taking picture */ + td_u32 exposure_bias_value; + /* + * exposure program that the camera used when image was taken. '1' means manual control, + * '2' program normal, '3' aperture priority, '4' shutter priority, '5' program creative (slow program), + * '6' program action(high-speed program), '7' portrait mode, '8' landscape mode. + */ + td_u8 exposure_program; + /* the actual F-number (F-stop) of lens when the image was taken */ + td_u32 f_number; + /* maximum aperture value of lens. */ + td_u32 max_aperture_value; + /* + * indicates the exposure mode set when the image was shot. + * 0 = auto exposure, 1 = manual exposure, 2 = auto bracket + */ + td_u8 exposure_mode; + /* + * indicates the white balance mode set when the image was shot. + * 0 = auto white balance, 1 = manual white balance. + */ + td_u8 white_balance; +} ot_isp_dcf_update_info; + +typedef struct { + ot_isp_dcf_const_info isp_dcf_const_info; + ot_isp_dcf_update_info isp_dcf_update_info; +} ot_isp_dcf_info; + +typedef struct { + /* the date and time when the picture data was generated */ + td_u8 capture_time[OT_DCF_CAPTURE_TIME_LENGTH]; + /* whether the picture is captured when a flash lamp is on */ + td_bool flash; + /* + * indicates the digital zoom ratio when the image was shot. + * if the numerator of the recorded value is 0, this indicates that digital zoom was not used. + */ + td_u32 digital_zoom_ratio; + ot_isp_dcf_info isp_dcf_info; +} ot_jpeg_dcf; + +/* + * Defines the ISP FSWDR operating mode + * 0 = Normal FSWDR mode + * 1 = Long frame mode, only effective in LINE_WDR, + * when running in this mode FSWDR module only output the long frame data + */ +typedef enum { + OT_ISP_FSWDR_NORMAL_MODE = 0x0, + OT_ISP_FSWDR_LONG_FRAME_MODE = 0x1, + OT_ISP_FSWDR_AUTO_LONG_FRAME_MODE = 0x2, /* Auto long frame mode, only effective in LINE_WDR, When running in this + mode, normal WDR and long frame mode would auto switch */ + OT_ISP_FSWDR_MODE_BUTT +} ot_isp_fswdr_mode; + +typedef struct { + td_u32 iso; /* ISP internal ISO : again*dgain*is_pgain */ + td_u32 exposure_time[OT_ISP_WDR_MAX_FRAME_NUM]; /* exposure time (reciprocal of shutter speed), unit is us */ + td_u32 isp_dgain[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 again[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 dgain[OT_ISP_WDR_MAX_FRAME_NUM]; + ot_isp_fswdr_mode fs_wdr_mode; + + td_s32 fe_id[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 ratio[OT_ISP_WDR_MAX_FRAME_NUM - 1]; + td_u32 isp_nr_strength; + td_u32 f_number; /* the actual F-number (F-stop) of lens when the image was taken */ + td_u32 sensor_id; /* which sensor is used */ + td_u32 sensor_mode; + td_u32 hmax_times; /* sensor hmax_times,unit is ns */ + td_u32 vmax; /* sensor vmax,unit is line */ + td_u32 vc_num; /* when dump wdr frame, which is long or short exposure frame. */ + td_u32 wb_gain[OT_ISP_WB_GAIN_NUM]; /* white balance gain info */ + td_u16 ccm[OT_ISP_CAP_CCM_NUM]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; Manual CCM matrix. */ + td_u32 exposure_distance[OT_ISP_WDR_MAX_FRAME_NUM - 1]; /* wdr sensor exposure distance line number. */ + td_s32 sync_id; + td_u32 blc_sync_id; +} ot_isp_frame_info; + +typedef struct { + td_u32 color_temp; + td_u16 ccm[OT_ISP_CAP_CCM_NUM]; + td_u8 saturation; +} ot_isp_hdr_info; + +typedef enum { + OT_NR_V1 = 1, + + OT_NR_BUTT +} ot_nr_version; + +typedef struct { + /* ies0~3 for different frequency response. */ + td_u16 ies0; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u16 ies1; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u16 ies2; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u16 ies3; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u16 aux_ies; /* RW; Range: [0, 255]; The gains of edge enhancement for NO.2 filter. */ + struct { + td_u16 iedz : 10; /* RW; Range: [0, 999]; The threshold to control the generated artifacts. */ + td_u16 _rb_ : 6; + }; + td_u8 o_sht; /* RW; Range: [0, 255]; The gains to control the overshoot. */ + td_u8 u_sht; /* RW; Range: [0, 255]; The gains to control the undershoot. */ + td_u8 aux_o_sht; /* RW; Range: [0, 255]; The gains to control the overshoot. */ + td_u8 aux_u_sht; /* RW; Range: [0, 255]; The gains to control the undershoot. */ +} ot_nr_v1_adv_iey; + +typedef struct { + struct { + td_u16 spn6 : 4; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ + td_u16 sbn6 : 4; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ + td_u16 pbr6 : 5; /* RW; Range: [0, 16]; The mix ratio between spn and sbr. */ + td_u16 j_mode6 : 2; /* RW; Range: [0, 2]; The selection modes for the blending of spatial filters. */ + td_u16 _rb_ : 1; /* RW; Reserved */ + }; + td_u8 sfr6[4]; /* RW; Range: [0, 31]; The relative NR strength for NO.6 filter. (Effective when jmode = 2). */ + td_u8 sbr6[2]; /* RW; Range: [0, 15]; The control of overshoot and undershoot. */ + td_u8 sfs1; /* RW; Range: [0, 255]; The NR strength parameters for NO.1 filter. */ + td_u8 sfs2; /* RW; Range: [0, 255]; Currently no use, reserved. */ + td_u16 bld1; /* RW; Range: [0, 999]; The NR strength parameters for NO.1 filter. */ + struct { + td_u16 spn3 : 3; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.3 filter. */ + td_u16 sbn3 : 3; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.3 filter. */ + td_u16 pbr3 : 5; /* RW; Range: [0, 16]; The mix ratio between spn and sbr. */ + td_u16 _rb0_ : 5; + }; + struct { + td_u16 spn4 : 3; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.4 filter. */ + td_u16 sbn4 : 3; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.4 filter. */ + td_u16 pbr4 : 5; /* RW; Range: [0, 16]; The mix ratio between spn and sbr. */ + td_u16 _rb1_ : 5; + }; + + td_u8 sfs5; /* RW; Range: [0, 255]; The NR strength parameters for NO.5 filters. */ + td_u8 sft5; /* RW; Range: [0, 255]; The NR strength parameters for NO.5 filters. */ + td_u8 sbr5; /* RW; Range: [0, 255]; The NR strength parameters for NO.5 filters. */ + td_u8 reserved2; + + td_u16 sth1; /* RW; Range: [0, 511]; The thresholds for protection of edges from blurring. */ + td_u16 sth2; /* RW; Range: [0, 511]; The thresholds for protection of edges from blurring. */ + td_u16 sth3; /* RW; Range: [0, 511]; The thresholds for protection of edges from blurring. */ + struct { + td_u16 sfn0 : 4; /* RW; Range: [0, 6]; Filter selection for different foreground image areas based on sth1. */ + td_u16 sfn1 : 4; /* RW; Range: [0, 6]; Filter selection for different foreground image areas based on sth1. */ + td_u16 sfn2 : 4; /* RW; Range: [0, 6]; Filter selection for different foreground image areas based on sth2. */ + td_u16 sfn3 : 4; /* RW; Range: [0, 6]; Filter selection for different foreground image areas based on sth3. */ + }; + td_u8 bri_str[OT_NR_S_IDX_LEN]; /* RW; Range: [0, 255]; Spatial NR strength based on brightness. */ + td_u8 bri_idx; /* RW; Range: [0, 6]; The filter selection based on brightness */ + td_u8 k_mode; /* RW; Range: [0, 1]; mode selection of k filter */ + td_u8 sbs_k[33]; /* RW; Range: [0, 255]; the filter strength of k filter depending on brightness */ + td_u8 sds_k[33]; /* RW; Range: [0, 255]; the filter strength of k filter depending on brightness */ + td_u8 reserved3; +} ot_nr_v1_adv_sfy; + +typedef struct { + td_u8 adv_mode; /* RW; Range: [0, 3]; */ + ot_nr_v1_adv_iey adv_ie_y[2]; + ot_nr_v1_adv_sfy adv_sf_y[2]; +} ot_ai3dnr_adv_v1; + +typedef struct { + ot_ai3dnr_adv_v1 adv_param; +} ot_ai3dnr_manual_adv_param; + +typedef struct { + td_u32 param_num; + ot_ai3dnr_adv_v1 ATTRIBUTE *adv_param; +} ot_ai3dnr_auto_adv_param; + +typedef struct { + ot_op_mode op_mode; + ot_ai3dnr_manual_adv_param manual_adv_param; + ot_ai3dnr_auto_adv_param auto_adv_param; +} ot_ai3dnr_adv_param_v1; + +typedef struct { + ot_nr_version nr_version; /* RW; Version of 3DNR parameters. */ + union { + ot_ai3dnr_adv_param_v1 nr_adv_param_v1; /* AUTO: ot_nr_version:OT_NR_V1. */ + }; +} ot_ai3dnr_adv_param; + +typedef enum { + OT_NR_TYPE_VIDEO_NORM = 0, + OT_NR_TYPE_SNAP_NORM, + OT_NR_TYPE_VIDEO_SPATIAL, + OT_NR_TYPE_VIDEO_ENHANCED, + OT_NR_TYPE_BUTT +} ot_nr_type; + +typedef enum { + OT_NR_MOTION_MODE_NORM = 0, /* Normal. */ + OT_NR_MOTION_MODE_COMPENSATION, /* Motion compensate. */ + OT_NR_MOTION_MODE_BUTT +} ot_nr_motion_mode; + +typedef struct { + /* ies0~3 for different frequency response. */ + td_u8 ies0; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u8 ies1; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u8 ies2; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u8 ies3; /* RW; Range: [0, 255]; The gains of edge and texture enhancement. */ + td_u16 iedz; /* RW; Range: [0, 999]; The threshold to control the generated artifacts. */ + td_u8 o_sht; /* RW; Range: [0, 255]; The gains to control the overshoot. */ + td_u8 u_sht; /* RW; Range: [0, 255]; The gains to control the undershoot. */ +} ot_nr_v1_iey; + +typedef struct { + struct { + td_u16 spn : 4; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ + td_u16 sbn : 4; /* RW; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ + td_u16 pbr : 5; /* RW; Range: [0, 16]; The mix ratio between spn and sbr. */ + td_u16 j_mode : 2; /* RW; Range: [0, 2]; The selection modes for the blending of spatial filters. */ + td_u16 _rb_ : 1; /* RW; Reserved */ + }; + + td_u8 sfr6[4]; /* RW; Range: [0, 31]; The relative NR strength for NO.6 filter. (Effective when jmode = 2). */ + td_u8 sbr6[2]; /* RW; Range: [0, 15]; The control of overshoot and undershoot. */ + + td_u8 sfs1; /* RW; Range: [0, 255]; The NR strength parameters for NO.1 filter. */ + td_u8 sbr1; /* RW; Range: [0, 255]; The NR strength parameters for NO.1 filter. */ + td_u8 sfs2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + td_u8 sft2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + td_u8 sbr2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + td_u8 sfs4; /* RW; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */ + td_u8 sft4; /* RW; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */ + td_u8 sbr4; /* RW; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */ + /* + * sth1_0, sth2_0, sth3_0; Range: [0, 511]; The thresholds for protection of edges on foreground from blurring. + * sth1_1, sth2_1, sth3_1; Range: [0, 511]; The thresholds for protection of edges on background from blurring. + * bri_idx0, bri_idx1; Range: [0, 7]; The filter selection based on brightness + * for foreground and background, respectively. + */ + td_u16 sth1_0; + td_u16 sth2_0; + td_u16 sth3_0; + td_u16 sth1_1; + td_u16 sth2_1; + td_u16 sth3_1; + + /* + * sfn0_0~sfn3_0; Range: [0, 6]; Filter selection for different foreground image areas based on sth1_0~sth3_0. + * sfn0_1~sfn3_1; Range: [0, 6]; Filter selection for different background image areas based on sth1_1~sth3_1. + */ + struct { + td_u16 sfn0_0 : 4; + td_u16 sfn1_0 : 4; + td_u16 sfn2_0 : 4; + td_u16 sfn3_0 : 4; + }; + struct { + td_u16 sfn0_1 : 4; + td_u16 sfn1_1 : 4; + td_u16 sfn2_1 : 4; + td_u16 sfn3_1 : 4; + }; + td_u8 bri_str[OT_NR_S_IDX_LEN]; /* RW ; Range: [0, 255]; Spatial NR strength based on brightness. */ + struct { + td_u8 bri_idx0 : 3; /* RW; Range: [0, 6]; The filter selection based on brightness */ + td_u8 bri_idx1 : 3; /* RW; Range: [0, 6]; The filter selection based on brightness */ + td_u8 reserved1 : 2; + }; + td_u8 k_mode; /* RW; Range: [0, 2]; mode selection of k filter */ + td_u8 sbs_k[33]; /* RW; Range: [0, 255]; the filter strength of k filter depending on brightness */ + td_u8 sds_k[33]; /* RW; Range: [0, 255]; the filter strength of k filter depending on brightness */ + td_u8 reserved2; +} ot_nr_v1_sfy; + +typedef struct { + struct { + td_u16 tfs0 : 4; /* RW; Range: [0, 15]; The NR strength for temporal filtering. */ + td_u16 tdz0 : 10; /* RW; Range: [0, 999]; Protection of the weak texture area from temporal filtering. */ + td_u16 ref_en : 1; /* RW; Range: [0, 1]; The switch the reference frame. */ + td_u16 _rb0_ : 1; + }; + struct { + td_u16 tfs1 : 4; /* RW; Range: [0, 15]; The NR strength for temporal filtering. */ + td_u16 tdz1 : 10; /* RW; Range: [0, 999]; Protection of the weak texture area from temporal filtering. */ + td_u16 math_mode : 1; /* RW; Range: [0, 1]; The motion detection mode. */ + td_u16 _rb1_ : 1; + }; + td_u8 tss0; /* RW; Range: [0, 15]; The ratio for blending spatial NR with the temporal NR results. */ + td_u8 tss1; /* RW; Range: [0, 15]; The ratio for blending spatial NR with the temporal NR results. */ + + td_u16 auto_math; /* RW; Range: [0, 999]; The motion threshold for the Level 0 denoise. */ + td_u8 tfr0[6]; /* RW; Range: [0, 31]; The temporal NR strength control for background (static) area. */ + td_u8 tfr1[6]; /* RW; Range: [0, 31]; The temporal NR strength control for background (static) area. */ +} ot_nr_v1_tfy; + +typedef struct { + struct { + td_u16 math0 : 10; /* RW; Range: [0, 999]; The threshold for motion detection. */ + td_u16 mate0 : 4; /* RW; Range: [0, 8]; The motion index for smooth image area. */ + td_u16 adv_math : 2; /* RW; Range: [0, 2]; The mode selection for motion detection. */ + }; + struct { + td_u16 math1 : 10; /* RW; Range: [0, 999]; The threshold for motion detection. */ + td_u16 mate1 : 4; /* RW; Range: [0, 8]; The motion index for smooth image area. */ + td_u16 _rb1_ : 2; + }; + td_u8 mabw0; /* RW; Range: [5, 9]; The window size for motion detection. */ + td_u8 mabw1; /* RW; Range: [5, 9]; The window size for motion detection. */ + + td_u16 artc; /* RW; Range: [0, 255]; The artifact control for motion */ + td_u16 mcth; /* RW; Range: [0, 999]; The sensitivity for motion */ + td_u16 dci_w; /* RW; Range: [0, 999]; The temporal gain for dci gain */ +} ot_nr_v1_mdy; + +typedef struct { + td_u8 sfc_enhance; /* RW; Range: [0, 255]; The chroma NR strength for sfc. */ + td_u8 sfc_ext; /* RW; Range: [0, 255]; The extra chroma NR strength for sfc. */ + td_u8 trc; /* RW; Range: [0, 255]; The temporal chroma NR strength. */ + td_u8 reserved; + struct { + td_u16 sfc : 8; /* RW; Range: [0, 255]; The motion threshold for chroma. */ + td_u16 tfc : 6; /* RW; Range: [0, 63]; The control of temporal chroma NR strength. */ + td_u16 _rb0_ : 2; + }; + td_u8 tpc; /* RW; Range: [0, 1]; Chroma denoise mode. */ + td_u8 pre_sfc; /* RW; Range: [0, 31]; pre-chroma denoise. */ +} ot_nr_v1_nrc0; + +typedef struct { + td_u8 sfs2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + td_u8 sft2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + td_u8 sbr2; /* RW; Range: [0, 255]; The NR strength parameters for NO.2 filter. */ + struct { + td_u16 pbr0 : 4; /* RW; Range: [0, 15]; The mix ratio. */ + td_u16 pbr1 : 4; /* RW; Range: [0, 15]; The mix ratio. */ + td_u16 _rb0_ : 8; + }; +} ot_nr_v1_nrc1; + +typedef struct { + ot_nr_v1_iey iey[5]; + ot_nr_v1_sfy sfy[5]; + ot_nr_v1_mdy mdy[2]; + ot_nr_v1_tfy tfy[3]; + ot_nr_v1_nrc0 nrc0; + ot_nr_v1_nrc1 nrc1; + + struct { + td_u8 limit_range_en : 1; /* RW; Range: [0, 1]; The switch for limit range mode. */ + td_u8 nry0_en : 1; /* RW; Range: [0, 1]; The switch for luma denoise. */ + td_u8 nry1_en : 1; /* RW; Range: [0, 1]; The switch for luma denoise. */ + td_u8 nry2_en : 1; /* RW; Range: [0, 1]; The switch for luma denoise. */ + td_u8 nry3_en : 1; /* RW; Range: [0, 1]; The switch for luma denoise. */ + td_u8 nrc0_en : 1; /* RW; Range: [0, 1]; The switch for chroma denoise. */ + td_u8 nrc1_en : 1; /* RW; Range: [0, 1]; The switch for chroma denoise. */ + td_u8 _rb_ : 1; + }; +} ot_nr_v1; + +typedef struct { + ot_nr_v1 nr_param; +} ot_nr_param_manual_v1; + +typedef struct { + td_u32 param_num; + td_u32 ATTRIBUTE *iso; + ot_nr_v1 ATTRIBUTE *nr_param; +} ot_nr_param_auto_v1; + +typedef struct { + ot_op_mode op_mode; + ot_nr_param_manual_v1 nr_manual; + ot_nr_param_auto_v1 nr_auto; +} ot_nr_norm_param_v1; + +typedef struct { + td_u32 mdz; /* RW; Range: [0, 63]; */ + td_u32 hard_tf_strength; /* RW; Range: [0, 96]; Relation strength of hard NR channel. */ + /* Only for weak nr chn */ + td_u32 edz; /* RW; Range: [0, 63]; */ + td_u32 weak_tf_strength; /* RW; Range: [0, 63]; Relation strength of weak NR channel. */ +} ot_nr_adv_param; + +typedef struct { + ot_nr_version nr_version; /* RW; Version of 3DNR parameters. */ + union { + ot_nr_norm_param_v1 nr_norm_param_v1; /* AUTO: ot_nr_version:OT_NR_V1. */ + }; +} ot_3dnr_param; + +typedef struct { + td_bool enable; + ot_nr_type nr_type; /* RW; 3DNR type. */ + ot_compress_mode compress_mode; /* RW; Reference frame compression mode. */ + ot_nr_motion_mode nr_motion_mode; /* RW; 3DNR motion compensate mode. */ +} ot_3dnr_attr; + +typedef struct { + ot_isp_hdr_info isp_hdr; + td_u32 iso; + td_u32 init_iso; + td_u8 sns_wdr_mode; +} ot_isp_attach_info; + +typedef struct { + ot_color_gamut color_gamut; +} ot_isp_colorgammut_info; + +typedef struct { + td_u32 numerator; /* represents the numerator of a fraction. */ + td_u32 denominator; /* the denominator. */ +} ot_dng_rational; + +/* defines the structure of DNG image dynamic information */ +typedef struct { + /* RO; range: [0x0, 0xFFFF]; black level. */ + td_u32 black_level[OT_ISP_BAYER_CHN]; + /* + * specifies the selected white balance at time of capture, + * encoded as the coordinates of a perfectly neutral color in linear reference space values. + */ + ot_dng_rational as_shot_neutral[OT_CFACOLORPLANE]; + /* RO; describes the amount of noise in a raw image */ + td_double ad_noise_profile[OT_DNG_NP_SIZE]; +} ot_dng_image_dynamic_info; + +typedef struct { + td_u32 iso; + td_u32 isp_dgain; + td_u32 exposure_time; + td_u32 white_balance_gain[OT_ISP_WB_GAIN_NUM]; + td_u32 color_temperature; + td_u16 cap_ccm[OT_ISP_CAP_CCM_NUM]; +} ot_isp_config_info; + +typedef struct { + td_bool enable; /* RW; low delay enable. */ + td_u32 line_cnt; /* RW; range: [16, 8192]; low delay shoreline. */ + td_bool one_buf_en; /* RW; one buffer for low delay enable. */ +} ot_low_delay_info; + +typedef enum { + OT_SCHEDULE_NORMAL = 0, + OT_SCHEDULE_QUICK, + OT_SCHEDULE_BUTT +} ot_schedule_mode; + +/* spread correction attribute */ +typedef struct { + /* RW; range: [0, 1];whether enable spread or not, when spread on,ldc distortion_ratio range should be [0, 500] */ + td_bool enable; + td_u32 spread_coef; /* RW; range: [0, 18];strength coefficient of spread correction */ +} ot_spread_attr; + +/* dest_point */ +typedef struct { + td_s64 motion_data[OT_DIS_MOTIONDATA_NUM]; +} ot_dis_motion_data; + +typedef struct { + ot_dis_motion_data data; + td_bool valid; +} ot_dis_motion_info; + +typedef struct { + td_s32 point_num; + ot_point point[OT_DIS_POINT_NUM]; +} ot_dst_point_info; + +typedef struct { + ot_dis_motion_info gme_motion_data; + ot_dis_motion_info fliter_motion_data; + ot_dst_point_info dst_point_info; + td_s32 private_data[OT_DIS_PRIVATE_NUM]; +} ot_dis_motion_data_info; + +typedef struct { + td_bool aspect; /* RW;range: [0, 1];whether aspect ration is keep */ + td_s32 x_ratio; /* RW; range: [0, 100]; field angle ration of horizontal,valid when aspect=0. */ + td_s32 y_ratio; /* RW; range: [0, 100]; field angle ration of vertical,valid when aspect=0. */ + td_s32 xy_ratio; /* RW; range: [0, 100]; field angle ration of all,valid when aspect=1. */ + /* RW; range: [-511, 511]; horizontal offset of the image distortion center relative to image center. */ + td_s32 center_x_offset; + /* RW; range: [-511, 511]; vertical offset of the image distortion center relative to image center. */ + td_s32 center_y_offset; + /* RW; range: [-300, 500]; LDC distortion ratio.when spread on,distortion_ratio range should be [0, 500] */ + td_s32 distortion_ratio; +} ot_ldc_v1_attr; + +typedef struct { + td_bool aspect; /* RW;range: [0, 1];whether aspect ration is keep */ + td_s32 x_ratio; /* RW; range: [0, 100]; field angle ration of horizontal,valid when aspect=0. */ + td_s32 y_ratio; /* RW; range: [0, 100]; field angle ration of vertical,valid when aspect=0. */ + td_s32 xy_ratio; /* RW; range: [0, 100]; field angle ration of all,valid when aspect=1. */ + /* RW; range: [6400, 3276700]; focal length in horizontal direction, with 2 decimal numbers */ + td_s32 focal_len_x; + /* RW; range: [6400, 3276700]; focal length in vertical direction, with 2 decimal numbers */ + td_s32 focal_len_y; + /* RW; range: [35*width, 65*width]; coordinate of image center, with 2 decimal numbers */ + td_s32 coord_shift_x; + /* RW; range: [35*height, 65*height]; Y coordinate of image center, with 2 decimal numbers */ + td_s32 coord_shift_y; + /* RW; lens distortion coefficients of the source image, with 5 decimal numbers */ + td_s32 src_calibration_ratio[OT_SRC_LENS_COEF_NUM]; + /* RW; lens distortion coefficients of the source image (for interpolation), with 5 decimal numbers */ + td_s32 src_calibration_ratio_next[OT_SRC_LENS_COEF_NUM]; + td_u32 coef_intp_ratio; /* RW; range: [0, 32768]; interpolation ratio between two coefficient sets, 15bits */ +} ot_ldc_v2_attr; + +typedef struct { + /* RW; range: [6400, 117341700]; focal length in horizontal direction, with 2 decimal numbers */ + td_s32 focal_len_x; + /* RW; range: [6400, 117341700]; focal length in vertical direction, with 2 decimal numbers */ + td_s32 focal_len_y; + /* RW; range: [35*width, 65*width]; coordinate of image center, with 2 decimal numbers */ + td_s32 coord_shift_x; + /* RW; range: [35*height, 65*height]; Y coordinate of image center, with 2 decimal numbers */ + td_s32 coord_shift_y; + /* RW; range: [-1600000, 1600000]; lens distortion coefficients of the source image, with 5 decimal numbers + src_calibration_ratio[0]: 100000; src_calibration_ratio[8]: [0, 3200000] */ + td_s32 src_calibration_ratio[OT_SRC_LENS_COEF_NUM]; + /* RW; range: [-1600000, 1600000]; lens distortion coefficients, with 5 decimal numbers + dst_calibration_ratio[12]: [0, 1600000]; dst_calibration_ratio[13]: [0, 1600000] */ + td_s32 dst_calibration_ratio[OT_DST_LENS_COEF_NUM]; + /* RW; range: [0, 1048576]; max undistorted distance before 3rd polynomial drop, with 16bits decimal */ + td_s32 max_du; +} ot_dis_ldc_attr; + +typedef enum { + OT_LDC_V1 = 0, + OT_LDC_V2 = 1, + + OT_LDC_VERSION_BUTT +} ot_ldc_version; + +typedef struct { + td_bool enable; /* RW; Range [0,1]; Whether LDC is enable */ + ot_ldc_version ldc_version; /* RW; Version of LDC */ + union { + ot_ldc_v1_attr ldc_v1_attr; /* RW; Attribute of LDC v1. AUTO:ot_ldc_version:OT_LDC_V1; */ + ot_ldc_v2_attr ldc_v2_attr; /* RW; Attribute of LDC v2. AUTO:ot_ldc_version:OT_LDC_V2; */ + }; +} ot_ldc_attr; + +/* gdc PMF attr */ +typedef struct { + td_bool enable; /* RW; Range [0,1]; Whether or not pmf is enable */ + ot_size dst_size; + td_s64 pmf_coef[OT_GDC_COMMON_COEF_NUM]; /* RW; PMF coefficient of gdc */ +} ot_pmf_attr; + + +/* gdc FOV attr */ +typedef struct { + td_bool enable; /* RW; Range [0,1]; Whether or not fov is enable */ + td_s64 fov_coef[OT_GDC_COMMON_COEF_NUM]; /* RW; matrix for match the two */ +} ot_fov_attr; + +typedef enum { + OT_LUT_CELL_SIZE_16, + OT_LUT_CELL_SIZE_32, + OT_LUT_CELL_SIZE_64, + OT_LUT_CELL_SIZE_128, + OT_LUT_CELL_SIZE_256, + + OT_LUT_CELL_SIZE_BUTT +} ot_lut_cell_size; + +typedef struct { + ot_size in_size; /* gdc input size, default: grp_attr.max_width, grp_attr.max_height */ + ot_lut_cell_size cell_size; /* gdc function cell size, default:OT_LUT_CELL_SIZE_16 */ +} ot_gdc_param; + +typedef struct { + ot_size in_size; /* lut in size */ + ot_size out_size; /* lut out size */ + ot_lut_cell_size cell_size; /* lut cell size */ + td_phys_addr_t lut_phys_addr; /* phys addr of lut */ + td_u32 lut_len; /* length of lut */ +} ot_lut; + +typedef enum { + OT_LUT_CONNECT_MODE, + OT_LUT_FUSION_MODE, + OT_LUT_MODE_BUTT +} ot_lut_mode; + +typedef struct { + td_bool pre_lut_en; /* RW; Range [0,1]; Whether or not the pre lut is enable */ + ot_lut pre_lut; /* RW; pre lut */ + td_bool post_lut_en; /* RW; Range [0,1]; Whether or not the post lut is enable */ + ot_lut post_lut; /* RW; post lut */ + ot_lut_mode lut_mode; /* RW; lut mode */ + td_u32 ratio; /* RW; range: [0, 32768]; fusion ratio of two lut */ +} ot_lut_attr; + +typedef struct { + td_u32 blend_position; /* RW; blend position, the beginning of the blend range */ + td_u32 blend_range; /* RW; blend range, within blend area */ +} ot_blend_param; + +typedef struct { + td_u32 buf_num; /* RW; Range [0, 5]; buffer number of blend area */ + ot_blend_param blend_param[OT_GDC_MAX_STITCH_NUM - 1]; /* RW; param of stitch blend */ +} ot_stitch_blend_param; + +typedef struct { + td_s32 isp_pipe[OT_GDC_MAX_STITCH_NUM]; /* W; isp pipe of bind stitch in pipe */ + td_u32 milli_sec; /* W; Range [100, 10000]; sync time interval, millisecond */ + td_u8 smooth_strength; /* W; Range [1, 16]; vertical filter window size */ + td_u8 shading_adjust_threshold; /* W; Range [0, 255]; shading gain range */ +} ot_stitch_luma_sync_param; + +typedef enum { + OT_STITCH_BLEND, /* Stitching in blend mode. */ + OT_STITCH_NOBLEND_VER, /* Vertical stitching, no blending. */ + OT_STITCH_NOBLEND_HOR, /* Horizontal stitching, no blending. */ + OT_STITCH_NOBLEND_QR, /* Quarter stitching, no blending. */ + + OT_STITCH_BUTT +} ot_stitch_mode; + +typedef enum { + OT_STITCH_CORRECTION_CYLINDRICAL, + OT_STITCH_CORRECTION_LUT, + OT_STITCH_CORRECTION_BUTT, +} ot_stitch_correction_mode; + +typedef struct { + td_bool pmf_enable; /* RW; Range [0, 1]; Whether or not pmf is enable */ + td_s64 pmf_coef[OT_GDC_COMMON_COEF_NUM]; /* RW; PMF coefficient of gdc */ + td_s32 center_x_offset; /* RW; offset of x; Range [-511, 511] */ + td_s32 center_y_offset; /* RW; offset of y; Range [-511, 511] */ + td_u32 ratio; /* RW: ratio of cylindrical projection; Range [0, 500] */ + ot_size dst_size; /* RW: destination size of stitch pipe */ +} ot_cylindrical_attr; + +typedef union { + /* attribute of cylindrical mode. AUTO:ot_stitch_correction_mode: OT_STITCH_CORRECTION_CYLINDRICAL; */ + ot_cylindrical_attr cylindrical_attr; + /* attribute of lut mode. AUTO:ot_stitch_correction_mode: OT_STITCH_CORRECTION_LUT; */ + ot_lut lut; +} ot_stitch_correction_attr; + +typedef struct { + td_bool enable; /* RW; Range [0, 1]; Whether or not stitch is enable */ + td_u32 pipe_num; /* RW; Range [2, 4]; stitch pipe number */ + td_bool sync_pipe_en; /* RW; Range [0, 1]; sync pipe with pts or not */ + ot_stitch_mode stitch_mode; /* RW; stitch mode: blend/noblend_ver/noblend_hor/noblend_qr */ + ot_point overlap_point[OT_GDC_MAX_STITCH_NUM][2]; /* RW; start and end position of overlap area */ + ot_stitch_correction_mode correction_mode; /* RW; correction mode: cylindrical/lut */ + ot_stitch_correction_attr correction_attr[OT_GDC_MAX_STITCH_NUM]; /* RW; attribute of correction */ +} ot_stitch_attr; + +typedef struct { + td_bool enable; /* RW; Range: [0, 1]; Zoom enable. */ + ot_coord mode; /* RW; Coordinate mode of zoom. */ + ot_rect rect; /* RW; Zoom rectangular. */ +} ot_zoom_attr; + +typedef enum { + OT_3DNR_POS_VI, + OT_3DNR_POS_VPSS, + + OT_3DNR_POS_BUTT +} ot_3dnr_pos_type; + +typedef enum { + OT_FMU_MODE_OFF, + OT_FMU_MODE_WRAP, + OT_FMU_MODE_DIRECT, + + OT_FMU_MODE_BUTT +} ot_fmu_mode; + +typedef enum { + OT_FMU_ID_VI = 0, + OT_FMU_ID_VPSS = 1, + + OT_FMU_ID_BUTT +} ot_fmu_id; + +typedef struct { + td_bool wrap_en; + td_u32 page_num; +} ot_fmu_attr; + +typedef struct { + td_u32 width; + td_u32 height; + td_u32 align; + ot_data_bit_width bit_width; + ot_pixel_format pixel_format; + ot_compress_mode compress_mode; + ot_video_format video_format; +} ot_pic_buf_attr; + +typedef struct { + td_bool share_buf_en; + td_u32 frame_buf_ratio; + ot_pic_buf_attr pic_buf_attr; +} ot_venc_buf_attr; + +typedef enum { + OT_SCALE_COEF_TYPE_NORMAL = 0, + OT_SCALE_COEF_TYPE_BILINEAR, + OT_SCALE_COEF_TYPE_BUTT +} ot_scale_coef_type; + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* OT_COMMON_VIDEO_H */ diff --git a/kernel/include/hi3519dv500/ot_debug.h b/kernel/include/hi3519dv500/ot_debug.h new file mode 100644 index 0000000..887edc0 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_debug.h @@ -0,0 +1,189 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_DEBUG_H +#define OT_DEBUG_H + +#ifndef __KERNEL__ +#include +#include +#else +#include "ot_osal.h" +#endif + +#include "ot_type.h" +#include "ot_common.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#define _EX__FILE_LINE(fxx, lxx) "[File]:" fxx"\n[Line]:"#lxx"\n[Info]:" +#define EX__FILE_LINE(fxx, lxx) _EX__FILE_LINE(fxx, lxx) +#define __FILE_LINE__ EX__FILE_LINE(__FILE__, __LINE__) +#define OT_MAX_MOD_NAME_LEN 16 + +#define OT_DBG_EMERG 0 /* system is unusable */ +#define OT_DBG_ALERT 1 /* action must be taken immediately */ +#define OT_DBG_CRIT 2 /* critical conditions */ +#define OT_DBG_ERR 3 /* error conditions */ +#define OT_DBG_WARN 4 /* warning conditions */ +#define OT_DBG_NOTICE 5 /* normal but significant condition */ +#define OT_DBG_INFO 6 /* informational */ +#define OT_DBG_DEBUG 7 /* debug-level messages */ + +/* Using samples: ot_assert(x>y); */ +#define ot_assert(expr) \ + do { \ + if (!(expr)) { \ + OT_ASSERT_LOG("\nASSERT at:\n" \ + " >Function : %s\n" \ + " >Line No. : %d\n" \ + " >Condition: %s\n", \ + __FUNCTION__, __LINE__, #expr); \ + } \ + } while (0) + +#ifndef __KERNEL__ +/* + * For User Mode : OT_PRINT, ot_assert, OT_TRACE + */ +#define OT_PRINT printf +#define OT_ASSERT_LOG printf + +/* #ifdef OT_DEBUG */ +#ifdef CONFIG_OT_LOG_TRACE_SUPPORT + + /* + * Using samples: + * OT_TRACE(OT_DBG_DEBUG, OT_ID_MEM, "Test %d, %s\n", 12, "Test"); + */ +#define OT_TRACE(level, enModId, fmt...) \ + do { \ + if (level <= OT_DBG_ERR) \ + fprintf(stderr, ##fmt); \ + } while (0) + +#else + #define OT_TRACE(level, enModId, fmt...) +#endif + +#else +/* + * For Linux Kernel : OT_PRINT, ot_assert, OT_TRACE + */ +#define OT_PRINT osal_printk + +int OT_LOG(td_s32 level, ot_mod_id enModId, const char *fmt, ...) __attribute__((format(printf, 3, 4))); + +/* #ifdef OT_DEBUG */ +#ifdef CONFIG_OT_LOG_TRACE_SUPPORT + +#ifdef OT_DEBUG +#define OT_ASSERT_LOG osal_panic +#else +#define OT_ASSERT_LOG osal_printk +#endif + + /* + * Using samples: + * OT_TRACE(OT_DBG_DEBUG, OT_ID_MEM, "Test %d, %s\n", 12, "Test"); + */ +#define OT_TRACE OT_LOG +#else +#define ot_assert(expr) +#define OT_TRACE(level, enModId, fmt...) +#endif + +#endif /* end of __KERNEL__ */ + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_EMERG) + +#define OT_EMERG_TRACE(mod, fmt...) OT_TRACE(OT_DBG_EMERG, mod, fmt) + +#else +#define OT_EMERG_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_ALERT) + +#define OT_ALERT_TRACE(mod, fmt...) OT_TRACE(OT_DBG_ALERT, mod, fmt) + +#else +#define OT_ALERT_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_CRIT) + +#define OT_CRIT_TRACE(mod, fmt...) OT_TRACE(OT_DBG_CRIT, mod, fmt) + +#else +#define OT_CRIT_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_ERR) + +#define OT_ERR_TRACE(mod, fmt...) OT_TRACE(OT_DBG_ERR, mod, fmt) + +#else +#define OT_ERR_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_WARN) + +#define OT_WARN_TRACE(mod, fmt...) OT_TRACE(OT_DBG_WARN, mod, fmt) + +#else +#define OT_WARN_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_NOTICE) + +#define OT_NOTICE_TRACE(mod, fmt...) OT_TRACE(OT_DBG_NOTICE, mod, fmt) + +#else +#define OT_NOTICE_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_INFO) + +#define OT_INFO_TRACE(mod, fmt...) OT_TRACE(OT_DBG_INFO, mod, fmt) + +#else +#define OT_INFO_TRACE(mod, fmt...) +#endif + +#if (CONFIG_OT_LOG_TRACE_LEVEL >= OT_DBG_DEBUG) + +#define OT_DEBUG_TRACE(mod, fmt...) OT_TRACE(OT_DBG_DEBUG, mod, fmt) + +#else +#define OT_DEBUG_TRACE(mod, fmt...) +#endif + +#define MPI_STATIC + +typedef struct { + ot_mod_id mod_id; + td_s32 level; + td_char mod_name[OT_MAX_MOD_NAME_LEN]; +} ot_log_level_cfg; + +#ifndef __KERNEL__ + +#else + +int ot_log(td_s32 level, ot_mod_id mod_id, const char *fmt, ...) __attribute__((format(printf, 3, 4))); + +#endif /* end of __KERNEL__ */ + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* OT_DEBUG_H */ diff --git a/kernel/include/hi3519dv500/ot_defines.h b/kernel/include/hi3519dv500/ot_defines.h new file mode 100644 index 0000000..989cfbb --- /dev/null +++ b/kernel/include/hi3519dv500/ot_defines.h @@ -0,0 +1,590 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_DEFINES_H +#define OT_DEFINES_H + +#include "autoconf.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#ifndef OT_CHIP +#define OT_CHIP CONFIG_OT_SUBCHIP_TYPE +#endif + +#define OT_CHIP_HI3516DV500 0x3516D500 +#define OT_CHIP_HI3519DV500 0x3519D500 +#define OT_CHIP_SD3403V100 0xd3403100 +#define OT_CHIP_SD3491V100 0xd3491100 + +#if OT_CHIP == OT_CHIP_HI3516DV500 +#define OT_CHIP_NAME "HI3516DV500" +#elif OT_CHIP == OT_CHIP_HI3519DV500 +#define OT_CHIP_NAME "HI3519DV500" +#else +#error OT_CHIP define may be error +#endif + +#define OT_MAX_BIND_DST_NUM 6 +#define OT_MPP_VER_PRIX "_MPP_V" + +#define OT_MAX_COLOR_COMPONENT 2 +#define OT_ALIGN_NUM 8 +#define OT_MAX_PRIVATE_DATA_NUM 2 +#define OT_MAX_USER_DATA_NUM 2 +#define OT_LUMA_PHYS_ALIGN 32 + +#define OT_DEFAULT_ALIGN 32 +#define OT_MAX_ALIGN 1024 +#define OT_SEG_COMPRESS_LEN 256 + +#define OT_MAX_MMZ_NAME_LEN 32 + +#define OT_QUAD_POINT_NUM 4 + +/* For VB */ +#define OT_VB_MAX_POOLS 256 + +/* For VENC */ +#define OT_VENC_VEDU_IP_NUM 1 +#define OT_VENC_JPGE_IP_NUM 1 +#define OT_VENC_MAX_TILE_NUM 1 +#define OT_VENC_MAX_REG_NUM 2 +#define OT_VENC_MAX_CHN_NUM 16 +#define OT_VENC_H264_MAX_WIDTH 6144 +#define OT_VENC_H264_MAX_HEIGHT 6144 +#define OT_VENC_H264_MIN_WIDTH 114 +#define OT_VENC_H264_MIN_HEIGHT 114 +#define OT_VENC_H265_MAX_WIDTH 6144 +#define OT_VENC_H265_MAX_HEIGHT 6144 +#define OT_VENC_H265_MIN_WIDTH 114 +#define OT_VENC_H265_MIN_HEIGHT 114 +#define OT_VENC_JPEG_MAX_WIDTH 16384 +#define OT_VENC_JPEG_MAX_HEIGHT 16384 +#define OT_VENC_JPEG_MIN_WIDTH 32 +#define OT_VENC_JPEG_MIN_HEIGHT 32 +#define OT_VENC_MAX_INPUT_FRAME_RATE 240 +#define OT_VENC_MIN_INPUT_FRAME_RATE 1 +#define OT_VENC_MAX_RECV_SRC 4 +#define OT_VENC_H265_ADAPTIVE_FRAME_TYPE 4 +#define OT_VENC_H265_ADAPTIVE_QP_TYPE 5 +#define OT_VENC_H265E_LCU_SIZE 32 + +/* For RC */ +#define OT_VENC_MAX_BITRATE (160 * 1024) +#define OT_VENC_MIN_BITRATE 2 + +/* For VDEC */ +#define OT_VDEC_MAX_CHN_NUM 8 +#define OT_VFMW_MAX_CHN_NUM 8 + +#define OT_H264D_ALIGN_W 64 +#define OT_H264D_ALIGN_H 16 +#define OT_H265D_ALIGN_W 64 +#define OT_H265D_ALIGN_H 64 +#define OT_JPEGD_ALIGN_W 64 +#define OT_JPEGD_ALIGN_H 16 + +#define OT_H264D_MAX_SPS 32 +#define OT_H264D_MIN_SPS 1 +#define OT_H264D_MAX_PPS 256 +#define OT_H264D_MIN_PPS 1 +#define OT_H264D_MAX_SLICE 600 +#define OT_H264D_MIN_SLICE 1 + +#define OT_H265D_MAX_VPS 16 +#define OT_H265D_MIN_VPS 1 +#define OT_H265D_MAX_SPS 16 +#define OT_H265D_MIN_SPS 1 +#define OT_H265D_MAX_PPS 64 +#define OT_H265D_MIN_PPS 1 +#define OT_H265D_MAX_SLICE 600 +#define OT_H265D_MIN_SLICE 1 + +#define OT_H264D_MAX_WIDTH 6144 +#define OT_H264D_MAX_HEIGHT 6144 +#define OT_H264D_MIN_WIDTH 114 +#define OT_H264D_MIN_HEIGHT 114 +#define OT_H265D_MAX_WIDTH 6144 +#define OT_H265D_MAX_HEIGHT 6144 +#define OT_H265D_MIN_WIDTH 114 +#define OT_H265D_MIN_HEIGHT 114 +#define OT_VDH_MIN_MSG_NUM 1 +#define OT_VDH_MAX_MSG_NUM 8 +#define OT_VEDU_MSG_NUM 2 + +#define OT_JPEGD_IP_NUM 1 +#define OT_JPEGD_MAX_WIDTH 16384 +#define OT_JPEGD_MAX_HEIGHT 16384 +#define OT_JPEGD_MIN_WIDTH 8 +#define OT_JPEGD_MIN_HEIGHT 8 + +/* For Region */ +#define OT_RGN_MIN_WIDTH 2 +#define OT_RGN_MIN_HEIGHT 2 +#define OT_RGN_ALIGN 2 + +#define OT_RGN_COVER_MIN_X (-8192) +#define OT_RGN_COVER_MIN_Y (-8192) +#define OT_RGN_COVER_MAX_X 8190 +#define OT_RGN_COVER_MAX_Y 8190 +#define OT_RGN_COVER_MAX_WIDTH 8192 +#define OT_RGN_COVER_MAX_HEIGHT 8192 +#define OT_RGN_COVER_MIN_THICK 2 +#define OT_RGN_COVER_MAX_THICK 16 +#define OT_RGN_COVER_THICK_ALIGN 2 + +#define OT_RGN_COVEREX_MIN_X (-16384) +#define OT_RGN_COVEREX_MIN_Y (-8192) +#define OT_RGN_COVEREX_MAX_X 16382 +#define OT_RGN_COVEREX_MAX_Y 8190 +#define OT_RGN_COVEREX_MAX_WIDTH 16384 +#define OT_RGN_COVEREX_MAX_HEIGHT 8192 +#define OT_RGN_COVEREX_MIN_THICK 2 +#define OT_RGN_COVEREX_MAX_THICK 16 +#define OT_RGN_COVEREX_THICK_ALIGN 2 + +#define OT_RGN_OVERLAY_MIN_X 0 +#define OT_RGN_OVERLAY_MIN_Y 0 +#define OT_RGN_OVERLAY_MAX_X 8190 +#define OT_RGN_OVERLAY_MAX_Y 8190 +#define OT_RGN_OVERLAY_MAX_WIDTH 8192 +#define OT_RGN_OVERLAY_MAX_HEIGHT 8192 +#define OT_RGN_OVERLAY_MIN_ALPHA 0 +#define OT_RGN_OVERLAY_MAX_ALPHA 255 +#define OT_RGN_OVERLAY_VENC_MAX_ALPHA 255 + +#define OT_RGN_OVERLAYEX_MIN_X 0 +#define OT_RGN_OVERLAYEX_MIN_Y 0 +#define OT_RGN_OVERLAYEX_MAX_X 16382 +#define OT_RGN_OVERLAYEX_MAX_Y 8190 +#define OT_RGN_OVERLAYEX_MAX_WIDTH 8192 +#define OT_RGN_OVERLAYEX_MAX_HEIGHT 8192 +#define OT_RGN_OVERLAYEX_MIN_ALPHA 0 +#define OT_RGN_OVERLAYEX_MAX_ALPHA 255 + +#define OT_RGN_LINE_MIN_X 0 +#define OT_RGN_LINE_MIN_Y 0 +#define OT_RGN_LINE_MAX_X 16382 +#define OT_RGN_LINE_MAX_Y 8190 +#define OT_RGN_LINE_MIN_THICK 2 +#define OT_RGN_LINE_MAX_THICK 16 + +#define OT_RGN_LINEEX_MIN_X 0 +#define OT_RGN_LINEEX_MIN_Y 0 +#define OT_RGN_LINEEX_MAX_X 16382 +#define OT_RGN_LINEEX_MAX_Y 8190 +#define OT_RGN_LINEEX_MIN_THICK 2 +#define OT_RGN_LINEEX_MAX_THICK 16 + +#define OT_RGN_MOSAIC_X_ALIGN 4 +#define OT_RGN_MOSAIC_Y_ALIGN 2 +#define OT_RGN_MOSAIC_WIDTH_ALIGN 4 +#define OT_RGN_MOSAIC_HEIGHT_ALIGN 2 + +#define OT_RGN_MOSAIC_MIN_X (-8192) +#define OT_RGN_MOSAIC_MIN_Y (-8192) +#define OT_RGN_MOSAIC_MAX_X 8188 +#define OT_RGN_MOSAIC_MAX_Y 8190 +#define OT_RGN_MOSAIC_MIN_WIDTH 8 +#define OT_RGN_MOSAIC_MIN_HEIGHT 8 +#define OT_RGN_MOSAIC_MAX_WIDTH 8192 +#define OT_RGN_MOSAIC_MAX_HEIGHT 8192 + +#define OT_RGN_MOSAICEX_MIN_X (-8192) +#define OT_RGN_MOSAICEX_MIN_Y (-8192) +#define OT_RGN_MOSAICEX_MAX_X 16380 +#define OT_RGN_MOSAICEX_MAX_Y 8190 +#define OT_RGN_MOSAICEX_MIN_WIDTH 8 +#define OT_RGN_MOSAICEX_MIN_HEIGHT 8 +#define OT_RGN_MOSAICEX_MAX_WIDTH 8192 +#define OT_RGN_MOSAICEX_MAX_HEIGHT 8192 + +#define OT_RGN_CORNER_RECT_MIN_X (-8192) +#define OT_RGN_CORNER_RECT_MIN_Y (-8192) +#define OT_RGN_CORNER_RECT_MAX_X 8190 +#define OT_RGN_CORNER_RECT_MAX_Y 8190 +#define OT_RGN_CORNER_RECT_MIN_THICK 2 +#define OT_RGN_CORNER_RECT_MAX_THICK 16 +#define OT_RGN_CORNER_RECT_THICK_ALIGN 2 + +#define OT_RGN_CORNER_RECT_MAX_WIDTH 8192 +#define OT_RGN_CORNER_RECT_MAX_HEIGHT 8192 +#define OT_RGN_CORNER_RECT_MIN_HOR_LEN 2 +#define OT_RGN_CORNER_RECT_MAX_HOR_LEN 8192 +#define OT_RGN_CORNER_RECT_MIN_VER_LEN 2 +#define OT_RGN_CORNER_RECT_MAX_VER_LEN 8192 + +#define OT_RGN_CORNER_RECTEX_MIN_X (-8192) +#define OT_RGN_CORNER_RECTEX_MIN_Y (-8192) +#define OT_RGN_CORNER_RECTEX_MAX_X 16382 +#define OT_RGN_CORNER_RECTEX_MAX_Y 8190 +#define OT_RGN_CORNER_RECTEX_MIN_THICK 2 +#define OT_RGN_CORNER_RECTEX_MAX_THICK 16 +#define OT_RGN_CORNER_RECTEX_THICK_ALIGN 2 + +#define OT_RGN_CORNER_RECTEX_MAX_WIDTH 8192 +#define OT_RGN_CORNER_RECTEX_MAX_HEIGHT 8192 +#define OT_RGN_CORNER_RECTEX_MIN_HOR_LEN 2 +#define OT_RGN_CORNER_RECTEX_MAX_HOR_LEN 8192 +#define OT_RGN_CORNER_RECTEX_MIN_VER_LEN 2 +#define OT_RGN_CORNER_RECTEX_MAX_VER_LEN 8192 + +#define OT_RGN_HANDLE_MAX 256 +#define OT_RGN_MAX_BUF_NUM 2 + +#define OT_RGN_VI_MAX_COVEREX_NUM 16 +#define OT_RGN_VI_MAX_OVERLAYEX_NUM 0 + +#define OT_RGN_VENC_MAX_OVERLAY_NUM 8 + +#define OT_RGN_VPSS_MAX_COVER_NUM 12 +#define OT_RGN_VPSS_MAX_RECT_COVER_NUM 12 +#define OT_RGN_VPSS_MAX_QUAD_COVER_NUM 0 +#define OT_RGN_VPSS_MAX_COVEREX_NUM 8 +#define OT_RGN_VPSS_MAX_OVERLAYEX_NUM 8 +#define OT_RGN_VPSS_MAX_LINE_NUM 0 +#define OT_RGN_VPSS_MAX_LINEEX_NUM 40 +#define OT_RGN_VPSS_MAX_MOSAIC_NUM 12 +#define OT_RGN_VPSS_MAX_MOSAICEX_NUM 8 +#define OT_RGN_VPSS_MAX_CORNER_RECT_NUM 12 +#define OT_RGN_VPSS_MAX_CORNER_RECTEX_NUM 32 + +#define OT_RGN_MCF_MAX_OVERLAYEX_NUM 8 +#define OT_RGN_MCF_MAX_COVER_NUM 9 +#define OT_RGN_MCF_MAX_COVEREX_NUM 8 +#define OT_RGN_MCF_MAX_MOSAIC_NUM 4 +#define OT_RGN_MCF_MAX_MOSAICEX_NUM 8 +#define OT_RGN_MCF_MAX_LINEEX_NUM 40 +#define OT_RGN_MCF_MAX_CORNER_RECTEX_NUM 8 + +#define OT_RGN_AVS_MAX_OVERLAYEX_NUM 0 + +#define OT_RGN_VO_MAX_COVEREX_NUM 1 +#define OT_RGN_VO_MAX_OVERLAYEX_NUM 1 +#define OT_RGN_VO_MAX_LINEEX_NUM 4 +#define OT_RGN_VO_MAX_CORNER_RECTEX_NUM 8 + +#define OT_RGN_PCIV_MAX_OVERLAYEX_NUM 1 + +#define OT_RGN_VGS_MAX_TASK_WIDTH 8192 + +/* For vi */ +#define OT_VI_MAX_DEV_NUM 4 +#define OT_VI_MAX_PHYS_PIPE_NUM 7 +#define OT_VI_MAX_VIRT_PIPE_NUM 8 +#define OT_VI_MAX_PIPE_NUM (OT_VI_MAX_PHYS_PIPE_NUM + OT_VI_MAX_VIRT_PIPE_NUM) +#define OT_VI_MAX_STITCH_GRP_NUM 4 +#define OT_VI_MAX_WDR_FUSION_GRP_NUM OT_VI_MAX_PIPE_NUM +#define OT_VI_MAX_WDR_NUM 2 +#define OT_VI_MAX_WDR_FRAME_NUM 2 +#define OT_VI_MAX_PHYS_CHN_NUM 1 +#define OT_VI_MAX_EXT_CHN_NUM 0 +#define OT_VI_EXT_CHN_START OT_VI_MAX_PHYS_CHN_NUM +#define OT_VI_MAX_CHN_NUM (OT_VI_MAX_PHYS_CHN_NUM + OT_VI_MAX_EXT_CHN_NUM) +#define OT_VI_MAX_EXTCHN_BIND_PER_CHN 8 + +#define OT_VI_MAX_SPLIT_NODE_NUM 3 + +#define OT_VI_MIN_BNR_BUF_NUM 2 +#define OT_VI_MAX_BNR_BUF_NUM 128 + +#define OT_VI_DEV_MIN_WIDTH 120 +#define OT_VI_DEV_MIN_HEIGHT 88 +#define OT_VI_DEV_MAX_WIDTH 8192 +#define OT_VI_DEV_MAX_HEIGHT 8192 + +#define OT_VI_PIPE_OFFLINE_MIN_WIDTH 120 +#define OT_VI_PIPE_OFFLINE_MIN_HEIGHT 88 +#define OT_VI_PIPE_OFFLINE_MAX_WIDTH 8192 +#define OT_VI_PIPE_OFFLINE_MAX_HEIGHT 8192 + +#define OT_VI_PIPE_ONLINE_MIN_WIDTH 120 +#define OT_VI_PIPE_ONLINE_MIN_HEIGHT 88 +#define OT_VI_PIPE_ONLINE_MAX_WIDTH 4096 +#define OT_VI_PIPE_ONLINE_MAX_HEIGHT 8192 + +#define OT_VI_PHYS_CHN_OFFLINE_MIN_WIDTH 120 +#define OT_VI_PHYS_CHN_OFFLINE_MIN_HEIGHT 88 +#define OT_VI_PHYS_CHN_OFFLINE_MAX_WIDTH 8192 +#define OT_VI_PHYS_CHN_OFFLINE_MAX_HEIGHT 8192 + +#define OT_VI_PHYS_CHN_ONLINE_MIN_WIDTH 120 +#define OT_VI_PHYS_CHN_ONLINE_MIN_HEIGHT 88 +#define OT_VI_PHYS_CHN_ONLINE_MAX_WIDTH 4096 +#define OT_VI_PHYS_CHN_ONLINE_MAX_HEIGHT 8192 + +#define OT_VI_EXT_CHN_MIN_WIDTH 32 +#define OT_VI_EXT_CHN_MIN_HEIGHT 32 +#define OT_VI_EXT_CHN_MAX_WIDTH 8192 +#define OT_VI_EXT_CHN_MAX_HEIGHT 8192 +#define OT_VI_EXT_CHN_MAX_ZOOMIN 16 +#define OT_VI_EXT_CHN_MAX_ZOOMOUT 30 + +#define OT_VI_COMPRESS_PARAM_SIZE 152 + +/* For DIS */ +#define OT_DIS_PYRAMID_LAYER_NUM 5 +#define OT_DIS_MAX_CHN_NUM 4 +#define OT_DIS_MAX_IMAGE_WIDTH 8192 +#define OT_DIS_MIN_IMAGE_WIDTH 120 +#define OT_DIS_MAX_IMAGE_HEIGHT 8192 +#define OT_DIS_MIN_IMAGE_HEIGHT 88 + +/* For VO */ +#define OT_VO_MAX_PHYS_DEV_NUM 1 /* max physical dev num */ +#define OT_VO_MAX_VIRT_DEV_NUM 0 /* max virtual dev num */ +#define OT_VO_MAX_CAS_DEV_NUM 0 /* max cascade dev num */ +/* max dev num */ +#define OT_VO_MAX_DEV_NUM (OT_VO_MAX_PHYS_DEV_NUM + OT_VO_MAX_VIRT_DEV_NUM + OT_VO_MAX_CAS_DEV_NUM) + +#define OT_VO_MAX_PHYS_VIDEO_LAYER_NUM 1 /* max physical video layer num */ +#define OT_VO_MAX_GFX_LAYER_NUM 1 /* max graphic layer num */ +/* max physical layer num */ +#define OT_VO_MAX_PHYS_LAYER_NUM (OT_VO_MAX_PHYS_VIDEO_LAYER_NUM + OT_VO_MAX_GFX_LAYER_NUM) +/* max layer num */ +#define OT_VO_MAX_LAYER_NUM (OT_VO_MAX_PHYS_LAYER_NUM + OT_VO_MAX_VIRT_DEV_NUM + OT_VO_MAX_CAS_DEV_NUM) +#define OT_VO_MAX_LAYER_IN_DEV 2 /* max video layer num of each dev */ + +#define OT_VO_LAYER_V0 0 /* video layer 0 */ +#define OT_VO_LAYER_G0 1 /* graphics layer 0 */ +#define OT_VO_MAX_PRIORITY 1 /* max layer priority */ +#define OT_VO_MIN_TOLERATE 1 /* min play toleration 1ms */ +#define OT_VO_MAX_TOLERATE 100000 /* max play toleration 100s */ + +#define OT_VO_MAX_CHN_NUM 4 /* max chn num */ +#define OT_VO_MIN_CHN_WIDTH 32 /* channel minimal width */ +#define OT_VO_MIN_CHN_HEIGHT 32 /* channel minimal height */ +#define OT_VO_MAX_ZOOM_RATIO 1000 /* max zoom ratio, 1000 means 100% scale */ +#define OT_VO_MAX_NODE_NUM 16 /* max node num */ + +#define OT_VO_MAX_WBC_NUM 0 /* max wbc num */ +#define OT_VO_MAX_IMG_WIDTH 16384 /* vo max img width */ +#define OT_VO_MAX_IMG_HEIGHT 8192 /* vo max img height */ + +/* For AVS */ +#define OT_AVS_MAX_GRP_NUM 32 +#define OT_AVS_PIPE_NUM 4 +#define OT_AVS_SPLIT_PIPE_NUM 4 +#define OT_AVS_MAX_CHN_NUM 2 +#define OT_AVS_SPLIT_NUM 2 +#define OT_AVS_CUBE_MAP_SURFACE_NUM 6 + +#define OT_AVS_BLEND_MIN_IN_WIDTH 1280 +#define OT_AVS_BLEND_MIN_IN_HEIGHT 720 +#define OT_AVS_NO_BLEND_MIN_IN_WIDTH 64 +#define OT_AVS_NO_BLEND_MIN_IN_HEIGHT 64 +#define OT_AVS_MAX_IN_WIDTH 8192 +#define OT_AVS_MAX_IN_HEIGHT 8192 + +#define OT_AVS_MIN_OUT_WIDTH 256 +#define OT_AVS_MIN_OUT_HEIGHT 256 +#define OT_AVS_MAX_OUT_WIDTH 16384 +#define OT_AVS_MAX_OUT_HEIGHT 8192 + +/* For AUDIO */ +#define OT_AI_DEV_MAX_NUM 1 +#define OT_AO_DEV_MIN_NUM 0 +#define OT_AO_DEV_MAX_NUM 1 +#define OT_AIO_MAX_NUM ((OT_AO_DEV_MAX_NUM > OT_AI_DEV_MAX_NUM) ? OT_AO_DEV_MAX_NUM : OT_AI_DEV_MAX_NUM) +#define OT_AENC_MAX_CHN_NUM 16 +#define OT_ADEC_MAX_CHN_NUM 16 + +#define OT_AI_MAX_CHN_NUM 16 +#define OT_AO_MAX_CHN_NUM 9 +#define OT_AO_SYS_CHN_ID (OT_AO_MAX_CHN_NUM - 1) + +#define OT_AIO_MAX_CHN_NUM ((OT_AO_MAX_CHN_NUM > OT_AI_MAX_CHN_NUM) ? OT_AO_MAX_CHN_NUM : OT_AI_MAX_CHN_NUM) + +/* For VPSS */ +#define OT_VPSS_MAX_GRP_NUM 16 +#define OT_VPSS_MAX_GRP_PIPE_NUM 4 +#define OT_VPSS_VGS_GRP_NO 10 +#define OT_VPSS_IP_NUM 1 +#define OT_VPSS0 0 +#define OT_VPSS_MAX_PHYS_CHN_NUM 4 +#define OT_VPSS_MAX_EXT_CHN_NUM 4 +#define OT_VPSS_MAX_CHN_NUM (OT_VPSS_MAX_PHYS_CHN_NUM + OT_VPSS_MAX_EXT_CHN_NUM) +#define OT_VPSS_MAX_SPLIT_NODE_NUM 4 +#define OT_VPSS_MAX_STITCH_BUF_NUM 5 +#define OT_VPSS_MAX_FPS 240 +#define OT_VPSS_USER_LIST_MAX_DEPTH 8 +#define OT_VPSS_MAX_OUT_RGN_NUM 9 +#define OT_VPSS_LOW_DELAY_MIN_LINE 16 +#define OT_VPSS_MIN_IMG_WIDTH 64 +#define OT_VPSS_MIN_IMG_HEIGHT 64 +#define OT_VPSS_MAX_IN_IMG_WIDTH 8192 +#define OT_VPSS_MAX_IN_IMG_HEIGHT 8192 +#define OT_VPSS_MAX_OUT_IMG_WIDTH 8192 +#define OT_VPSS_MAX_OUT_IMG_HEIGHT 8192 +#define OT_VPSS_MAX_SEG_COMPACT_WIDTH 4096 +#define OT_VPSS_MAX_ZOOMIN 16 +#define OT_VPSS_MAX_ZOOMOUT 15 +#define OT_VPSS_EXT_CHN_MAX_ZOOMIN 16 +#define OT_VPSS_EXT_CHN_MAX_ZOOMOUT 30 +#define OT_VPSS_EXT_CHN_MAX_IMG_WIDTH 16384 +#define OT_VPSS_EXT_CHN_MAX_IMG_HEIGHT 8192 + +/* For PCIV */ +#define OT_PCIV_MAX_CHN_NUM 16 /* max pciv channel number in each pciv device */ + +/* For IVS_MD */ +#define OT_MD_MAX_CHN 16 +#define OT_MD_MAX_WIDTH 1920 +#define OT_MD_MAX_HEIGHT 1080 +#define OT_MD_MIN_WIDTH 64 +#define OT_MD_MIN_HEIGHT 64 + +/* For IVE */ +#define OT_IVE_MAX_ARR_LEN 512 +#define OT_IVE_MIN_ARR_LEN 20 +#define OT_IVE_DEFAULT_NODE_NUM 128 + +/* For RECT */ +#define OT_DPU_RECT_MAX_GRP_NUM 8 +#define OT_DPU_RECT_MAX_PIPE_NUM 2 +#define OT_DPU_RECT_MAX_CHN_NUM 2 + +#define OT_DPU_RECT_IN_IMAGE_MAX_WIDTH 2048 +#define OT_DPU_RECT_IN_IMAGE_MAX_HEIGHT 2048 +#define OT_DPU_RECT_IN_IMAGE_MIN_WIDTH 64 +#define OT_DPU_RECT_IN_IMAGE_MIN_HEIGHT 64 +#define OT_DPU_RECT_OUT_IMAGE_MAX_WIDTH 2048 +#define OT_DPU_RECT_OUT_IMAGE_MAX_HEIGHT 2048 +#define OT_DPU_RECT_OUT_IMAGE_MIN_WIDTH 64 +#define OT_DPU_RECT_OUT_IMAGE_MIN_HEIGHT 64 + +/* For MATCH */ +#define OT_DPU_MATCH_MAX_GRP_NUM 8 +#define OT_DPU_MATCH_MAX_PIPE_NUM 2 +#define OT_DPU_MATCH_MAX_CHN_NUM 1 + +#define OT_DPU_MATCH_IN_IMAGE_MAX_WIDTH 2048 +#define OT_DPU_MATCH_IN_IMAGE_MAX_HEIGHT 2046 +#define OT_DPU_MATCH_IN_IMAGE_MIN_WIDTH 64 +#define OT_DPU_MATCH_IN_IMAGE_MIN_HEIGHT 64 +#define OT_DPU_MATCH_OUT_IMAGE_MAX_WIDTH 2048 +#define OT_DPU_MATCH_OUT_IMAGE_MAX_HEIGHT 2046 +#define OT_DPU_MATCH_OUT_IMAGE_MIN_WIDTH 64 +#define OT_DPU_MATCH_OUT_IMAGE_MIN_HEIGHT 64 + +/* For NPU */ +#define OT_SVP_NPU_MAX_STREAM_NUM 128 +#define OT_SVP_NPU_MIN_STREAM_NUM 1 +#define OT_SVP_NPU_DEF_STREAM_NUM 64 +#define OT_SVP_NPU_MAX_TASK_NODE_NUM 512 +#define OT_SVP_NPU_MIN_TASK_NODE_NUM 2 +#define OT_SVP_NPU_DEF_TASK_NODE_NUM 32 +#define OT_SVP_NPU_MAX_EVENT_NUM 128 +#define OT_SVP_NPU_MIN_EVENT_NUM 0 +#define OT_SVP_NPU_DEF_EVENT_NUM 32 +#define OT_SVP_NPU_MAX_PROF_MEM_KB 1048576 +#define OT_SVP_NPU_MIN_PROF_MEM_KB 512 +#define OT_SVP_NPU_DEF_PROF_MEM_KB 2048 + +/* For VGS */ +#define OT_VGS_IP_NUM 1 +#define OT_VGS0 0 +#define OT_VGS_MAX_CHN_NUM 3 +#define OT_VGS_MAX_CORNER_RECT_NUM 8 +#define OT_VGS_MAX_SOLID_RECT_COVER_NUM 8 +#define OT_VGS_MAX_HOLLOW_RECT_COVER_NUM OT_VGS_MAX_CORNER_RECT_NUM +#define OT_VGS_MAX_RECT_COVER_NUM (OT_VGS_MAX_SOLID_RECT_COVER_NUM + OT_VGS_MAX_HOLLOW_RECT_COVER_NUM) +#define OT_VGS_MAX_QUAD_COVER_NUM 1 +#define OT_VGS_MAX_COVER_NUM (OT_VGS_MAX_RECT_COVER_NUM + OT_VGS_MAX_QUAD_COVER_NUM) +#define OT_VGS_MAX_OSD_NUM 1 +#define OT_VGS_MAX_MOSAIC_NUM 4 + +#define OT_VGS_DEFAULT_JOB_NUM 64 +#define OT_VGS_DEFAULT_TASK_NUM 100 +#define OT_VGS_DEFAULT_NODE_NUM 100 + +#define OT_VGS_MAX_JOB_NUM 200 +#define OT_VGS_MIN_JOB_NUM 20 +#define OT_VGS_MAX_TASK_NUM 400 +#define OT_VGS_MIN_TASK_NUM 20 +#define OT_VGS_MAX_NODE_NUM 400 +#define OT_VGS_MIN_NODE_NUM 20 + +/* For TDE */ +#define OT_TDE_MAX_NODE_NUM 500 +#define OT_TDE_MIN_NODE_NUM 2 +#define OT_TDE_DEFAULT_NODE_NUM 100 + +/* For GDC */ +#define OT_FISHEYE_MIN_IN_IMAGE_WIDTH 352 +#define OT_FISHEYE_MIN_IN_IMAGE_HEIGHT 288 +#define OT_FISHEYE_MIN_OUT_IMAGE_WIDTH 352 +#define OT_FISHEYE_MIN_OUT_IMAGE_HEIGHT 288 + +#define OT_LDC_MIN_IMAGE_WIDTH 120 +#define OT_LDC_MIN_IMAGE_HEIGHT 88 + +#define OT_SPREAD_MIN_IMAGE_WIDTH 120 +#define OT_SPREAD_MIN_IMAGE_HEIGHT 88 + +#define OT_ROTATION_EX_MIN_IMAGE_WIDTH 120 +#define OT_ROTATION_EX_MIN_IMAGE_HEIGHT 88 + +#define OT_PMF_MIN_IMAGE_WIDTH 120 +#define OT_PMF_MIN_IMAGE_HEIGHT 88 + +#define OT_GDC_MAX_IMAGE_WIDTH 8192 +#define OT_GDC_MAX_IMAGE_HEIGHT 8192 +#define OT_GDC_IP_NUM 1 + +#define OT_GDC_MAX_JOB_NUM 100 /* gdc max job number */ +#define OT_GDC_MIN_JOB_NUM 4 /* gdc min job number */ + +#define OT_GDC_MAX_TASK_NUM 200 /* gdc max task number */ +#define OT_GDC_MIN_TASK_NUM 4 /* gdc min task number */ + +#define OT_GDC_MAX_NODE_NUM 200 /* gdc max node number */ +#define OT_GDC_MIN_NODE_NUM 4 /* gdc min node number */ + +#define OT_GDC_DEFAULT_JOB_NUM 16 +#define OT_GDC_DEFAULT_TASK_NUM 50 +#define OT_GDC_DEFAULT_NODE_NUM 50 + +/* For MCF */ +#define OT_MCF_PIPE_NUM 2 +#define OT_MCF_MAX_GRP_NUM 2 +#define OT_MCF_MAX_PHYS_CHN_NUM 3 +#define OT_MCF_MAX_EXT_CHN_NUM 4 +#define OT_MCF_MAX_CHN_NUM (OT_MCF_MAX_PHYS_CHN_NUM + OT_MCF_MAX_EXT_CHN_NUM) + +#define OT_MCF_MAX_PIPE_WIDTH 8192 +#define OT_MCF_MAX_PIPE_HEIGHT 4096 +#define OT_MCF_MIN_PIPE_WIDTH 256 +#define OT_MCF_MIN_PIPE_HEIGHT 256 + +#define OT_MCF_MAX_CHN_WIDTH 8192 +#define OT_MCF_MAX_CHN_HEIGHT 8192 +#define OT_MCF_MIN_CHN_WIDTH 128 +#define OT_MCF_MIN_CHN_HEIGHT 64 + +#define OT_MCF_MAX_EXT_CHN_WIDTH 8192 +#define OT_MCF_MAX_EXT_CHN_HEIGHT 8192 +#define OT_MCF_MIN_EXT_CHN_WIDTH 64 +#define OT_MCF_MIN_EXT_CHN_HEIGHT 64 + +/* For UVC */ +#define OT_UVC_MAX_CHN_NUM 1 /* max chn num */ + +#define OT_AIISP_PIPE_MIN_WIDTH 120 +#define OT_AIISP_PIPE_MIN_HEIGHT 88 +#define OT_AIISP_PIPE_MAX_WIDTH 4096 +#define OT_AIISP_PIPE_MAX_HEIGHT 4096 + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* OT_DEFINES_H */ diff --git a/kernel/include/hi3519dv500/ot_errno.h b/kernel/include/hi3519dv500/ot_errno.h new file mode 100644 index 0000000..b9b7476 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_errno.h @@ -0,0 +1,95 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_ERRNO_H +#define OT_ERRNO_H + +#include "ot_debug.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* end of #ifdef __cplusplus */ + +/* + * 1010 0000b + * VTOP use APPID from 0~31 + * so, vendor use APPID based on 32 + */ +#define OT_ERR_APP_ID (0x80000000L + 0x20000000L) + +/* + * |----------------------------------------------------------------| + * | 1 | APP_ID | MOD_ID | ERR_LEVEL | ERR_ID | + * |----------------------------------------------------------------| + * |<--><--7bits----><----8bits---><--3bits---><------13bits------->| + */ +#define OT_DEFINE_ERR(mod, level, err_id) \ + ((td_s32)((OT_ERR_APP_ID) | ((mod) << 16) | ((level) << 13) | (err_id))) + +/* + * NOTE! the following defined all common error code, + * all module must reserved 0~63 for their common error code + */ +typedef enum { + OT_ERR_LEVEL_DEBUG = 0, /* debug-level */ + OT_ERR_LEVEL_INFO, /* informational */ + OT_ERR_LEVEL_NOTICE, /* normal but significant condition */ + OT_ERR_LEVEL_WARNING, /* warning conditions */ + OT_ERR_LEVEL_ERROR, /* error conditions */ + OT_ERR_LEVEL_CRIT, /* critical conditions */ + OT_ERR_LEVEL_ALERT, /* action must be taken immediately */ + OT_ERR_LEVEL_FATAL, /* just for compatibility with previous version */ + OT_ERR_LEVEL_BUTT +} ot_err_level; + +typedef enum { + OT_ERR_INVALID_DEV_ID = 0x1, /* invalid device ID */ + OT_ERR_INVALID_PIPE_ID = 0x2, /* invalid pipe ID */ + OT_ERR_INVALID_CHN_ID = 0x3, /* invalid channel ID */ + OT_ERR_INVALID_LAYER_ID = 0x4, /* invalid channel ID */ + OT_ERR_INVALID_GRP_ID = 0x5, /* invalid group ID */ + + OT_ERR_ILLEGAL_PARAM = 0x7, /* at lease one parameter is illegal + * eg, an illegal enumeration value */ + OT_ERR_EXIST = 0x8, /* resource exists */ + OT_ERR_UNEXIST = 0x9, /* resource not exists */ + OT_ERR_NULL_PTR = 0xa, /* using a NULL pointer */ + OT_ERR_NOT_CFG = 0xb, /* try to enable or initialize system, device + ** or channel, before configing attribute */ + OT_ERR_NOT_SUPPORT = 0xc, /* operation or type is not supported by NOW */ + OT_ERR_NOT_PERM = 0xd, /* operation is not permitted + ** eg, try to change static attribute */ + OT_ERR_NOT_ENABLE = 0x10, + OT_ERR_NOT_DISABLE = 0x11, + OT_ERR_NOT_START = 0x12, + OT_ERR_NOT_STOP = 0x13, + OT_ERR_NO_MEM = 0x14, /* failure caused by malloc memory */ + OT_ERR_NO_BUF = 0x15, /* failure caused by malloc buffer */ + OT_ERR_BUF_EMPTY = 0x16, /* no data in buffer */ + OT_ERR_BUF_FULL = 0x17, /* no buffer for new data */ + OT_ERR_NOT_READY = 0x18, /* System is not ready, maybe not initialed or + ** loaded. Returning the error code when opening + ** a device file failed. */ + OT_ERR_TIMEOUT = 0x20, + OT_ERR_BAD_ADDR = 0x21, /* bad address, + ** eg. used for copy_from_user & copy_to_user */ + OT_ERR_BUSY = 0x22, /* resource is busy, + ** eg. destroy a venc chn without unregister it */ + OT_ERR_SIZE_NOT_ENOUGH = 0x23, /* buffer size is smaller than the actual size required */ + + OT_ERR_NOT_BINDED = 0x24, + OT_ERR_BINDED = 0x25, + OT_ERR_BUTT = 0x3f, /* maximum code, private error code of all modules + ** must be greater than it */ +} ot_errno; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* OT_ERRNO_H */ diff --git a/kernel/include/hi3519dv500/ot_isp_define.h b/kernel/include/hi3519dv500/ot_isp_define.h new file mode 100644 index 0000000..8bf699e --- /dev/null +++ b/kernel/include/hi3519dv500/ot_isp_define.h @@ -0,0 +1,172 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_ISP_DEFINE_H +#define OT_ISP_DEFINE_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* isp sys part */ +#define OT_ISP_BE_BUF_NUM_MAX 20 +#define OT_ISP_STRIPING_MAX_NUM 3 +#define OT_ISP_SBS_BLOCK_NUM 2 + +#define OT_ISP_MAX_FE_PIPE_NUM 4 +#define OT_ISP_MAX_PHY_PIPE_NUM 7 // 4 + 3, 3 is no fe pipe +#define OT_ISP_MAX_VIR_PIPE_NUM 8 +#define OT_ISP_MAX_PIPE_NUM (OT_ISP_MAX_PHY_PIPE_NUM + OT_ISP_MAX_VIR_PIPE_NUM) +#define OT_ISP_MAX_STITCH_NUM OT_ISP_MAX_FE_PIPE_NUM + +#define OT_ISP_SENSOR_WIDTH_MAX 8192 +#define OT_ISP_SENSOR_HEIGHT_MAX 8192 +#define OT_ISP_RES_WIDTH_MAX 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, \ + 8192, 8192, 8192, 8192 +#define OT_ISP_RES_HEIGHT_MAX 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192, \ + 8192, 8192, 8192, 8192 + +/* isp alg part */ +#define OT_ISP_CLUT_LUT_LENGTH 5508 +#define OT_ISP_CA_YRATIO_LUT_LENGTH 256 +#define OT_ISP_STATIC_DP_COUNT_NORMAL 2048 +#define OT_ISP_STATIC_DP_COUNT_MAX (OT_ISP_STATIC_DP_COUNT_NORMAL * OT_ISP_STRIPING_MAX_NUM) +#define OT_ISP_SUPPORT_OFFLINE_DPC_CALIBRATION 1 + +#define OT_ISP_AWB_ZONE_ORIG_ROW 32 +#define OT_ISP_AWB_ZONE_ORIG_COLUMN 32 + +#define OT_ISP_SPECAWB_FACTTBL_ELMNUM 7 +#define OT_ISP_SPECAWB_FACTTBL_SIZE 64 +#define OT_ISP_SPECAWB_BBL_SIZE 40 + +#define OT_ISP_SPECAWB_FACT_ELEMENT_LUT 4096 +#define OT_ISP_SPECAWB_WB_CNVTBL_LUT 16384 +#define OT_ISP_SPECAWB_KELDBB_LUT 16384 +#define OT_ISP_SPECAWB_BBL_LUT 240 +#define OT_ISP_SPECAWB_CAA_LUT 16384 +#define OT_ISP_SPECAWB_BUF_SIZE 110832 +#define OT_ISP_SPECAWB_WB_CNVTBL_LUT_OFFSET (OT_ISP_SPECAWB_FACT_ELEMENT_LUT * OT_ISP_SPECAWB_FACTTBL_ELMNUM) +#define OT_ISP_SPECAWB_KELDBB_LUT_OFFSET (OT_ISP_SPECAWB_WB_CNVTBL_LUT_OFFSET + OT_ISP_SPECAWB_WB_CNVTBL_LUT) +#define OT_ISP_SPECAWB_BBL_LUT_OFFSET (OT_ISP_SPECAWB_KELDBB_LUT_OFFSET + OT_ISP_SPECAWB_KELDBB_LUT) +#define OT_ISP_SPECAWB_CAA_LUT_OFFSET (OT_ISP_SPECAWB_BBL_LUT_OFFSET + OT_ISP_SPECAWB_BBL_LUT) + +#define OT_ISP_AWB_LIB_NUM (OT_ISP_MAX_PIPE_NUM) +#define OT_ISP_AE_LIB_NUM (OT_ISP_MAX_PIPE_NUM) + +#define OT_ISP_SHARPEN_RGAIN 31 +#define OT_ISP_SHARPEN_RGAIN_MAX 31 +#define OT_ISP_SHARPEN_RGAIN_BIT 31 +#define OT_ISP_SHARPEN_GGAIN 32 +#define OT_ISP_SHARPEN_GGAIN_MAX 255 +#define OT_ISP_SHARPEN_GGAIN_BIT 255 +#define OT_ISP_SHARPEN_BGAIN 31 +#define OT_ISP_SHARPEN_BGAIN_MAX 31 +#define OT_ISP_SHARPEN_BGAIN_BIT 31 +#define OT_ISP_SHARPEN_LUMAWGT_MAX 31 +#define OT_ISP_SHARPEN_LUMAWGT 31 +#define OT_ISP_SHARPEN_LUMAWGT_BIT 31 +#define OT_ISP_SHARPEN_EDGE_FILT_MAX_CAP 18 +#define OT_ISP_SHARPEN_EDGE_FILT_MAX_CAP_MAX 47 +#define OT_ISP_SHARPEN_EDGE_FILT_MAX_CAP_BIT 63 + +#define OT_ISP_DRC_STRENGTH_MAX 1023 +#define OT_ISP_DRC_SPA_FLT_COEF_MAX 5 +#define OT_ISP_DRC_CC_NODE_NUM 33 +#define OT_ISP_DRC_TM_NODE_NUM 200 +#define OT_ISP_DRC_CC_COEF_MAX 0x400 +#define OT_ISP_DRC_SHP_LOG_MIN 0 + +#define OT_ISP_DEMOSAIC_DETAIL_SMOOTH_RANGE_MAX 7 +#define OT_ISP_DEMOSAIC_DETAIL_SMOOTH_RANGE_MIN 1 +#define OT_ISP_DEMOSAIC_NONDIR_MFDETALEHC_STR_MAX 127 +#define OT_ISP_DEMOSAIC_COLOR_NOISE_THDY_MAX 15 +#define OT_ISP_DEMOSAIC_COLOR_NOISE_STRY_MAX 63 + +#define OT_ISP_LDCI_HEPOSWGT_MAX 255 +#define OT_ISP_LDCI_HENEGWGT_MAX 255 + +#define OT_ISP_PREGAMMA_LUT_MAX 0xFFFFF + +#define OT_ISP_LBLC_STRENGTH_MAX 1023 +#define OT_ISP_LBLC_DEFAULT_STRENGTH 256 +#define OT_ISP_LBLC_GRID_COL 33 +#define OT_ISP_LBLC_GRID_ROW 33 +#define OT_ISP_LBLC_GRID_POINTS (OT_ISP_LBLC_GRID_COL * OT_ISP_LBLC_GRID_ROW) +#define OT_ISP_LBLC_MAX_VALUE 16383 + +#define OT_ISP_LSC_MESHSTR_MAX 16383 +#define OT_ISP_LSC_DEFAULT_MESH_STRENGTH 4096 +#define OT_ISP_LSC_DEFAULT_WEIGHT 256 +#define OT_ISP_LSC_GRID_COL 33 +#define OT_ISP_LSC_GRID_ROW 33 +#define OT_ISP_LSC_GRID_POINTS (OT_ISP_LSC_GRID_COL * OT_ISP_LSC_GRID_ROW) +#define OT_ISP_LSC_DEFAULT_MESH_SCALE 3 +#define ot_isp_lsc_xgrid_width_max(x) 255 +#define ot_isp_lsc_ygrid_width_max(x) 255 +#define OT_ISP_LSC_MESHSCALE_NUM 8 +#define OT_ISP_LSC_MESHSCALE0_DEF_GAIN 512 +#define OT_ISP_LSC_MESHSCALE1_DEF_GAIN 256 +#define OT_ISP_LSC_MESHSCALE2_DEF_GAIN 128 +#define OT_ISP_LSC_MESHSCALE3_DEF_GAIN 64 +#define OT_ISP_LSC_MAX_GAIN 1023 +#define OT_ISP_LSC_GAIN_BITWIDTH 10 + +#define OT_ISP_AF_GAMMA_VALUE_MAX 1 + +#define OT_ISP_CR_SLOPE_MAX 12 +#define OT_ISP_CR_THR_MAX 4095 +#define OT_ISP_CR_NPOFFSET_MAX 4095 +#define OT_ISP_CR_NPOFFSET_MIN 512 + +#define OT_ISP_FE_AF_SUPPORT 1 +#define OT_ISP_BE_AF_SUPPORT 1 +#define OT_ISP_AF_ENABLE_MASK ((OT_ISP_BE_AF_SUPPORT << 1) + OT_ISP_FE_AF_SUPPORT) + +#define OT_ISP_RGBIR_CVTMAT_NUM 12 +#define OT_ISP_RGBIR_CTRL_NUM 2 +#define OT_ISP_RGBIR_CROSSTALK_NUM 3 +#define OT_ISP_RGBIR_LUT_NUM 33 +#define OT_ISP_CRB_LUT_LENGTH 1024 +#define OT_ISP_CRB_GAIN_MAX 2047 +#define OT_ISP_CRB_GAIN_MIN 511 + +#define OT_ISP_CA_RATIO_MAX 2047 +#define OT_ISP_CLUT_GAIN_MAX 4095 + +#define OT_ISP_CCM_LUMA_COEFR_DEFAULT 8 +#define OT_ISP_CCM_LUMA_COEFB_DEFAULT 4 +#define OT_ISP_CCM_DARKPREV_DEFAULT 14 +#define OT_ISP_CCM_LUMA_COEFR_UP_DEFAULT 10 +#define OT_ISP_CCM_LUMA_COEFB_UP_DEFAULT 10 +#define OT_ISP_CCM_SOFT_CLIP0_STEP_DEFAULT 10 +#define OT_ISP_CCM_SOFT_CLIP1_STEP_DEFAULT 14 +#define OT_ISP_CCM_PEAKSUPP_SAT_DEFAULT 200 +#define OT_ISP_CCM_PEAKSUPP_MAX_DEFAULT 255 +#define OT_ISP_CCM_DARK_RANGE_MAX 15 + +#define OT_ISP_EXPANDER_NODE_NUM 257 + +#define OT_ISP_FUSION_THRESHOLD_MAX 0xFFF +#define OT_ISP_AIBNR_SUPPORT 1 + +#define OT_ISP_DCF_LIGHT_SOURCE_FLASH 4 +#define OT_ISP_DCF_LIGHT_SOURCE_CLOUDY 10 +#define OT_ISP_DCF_LIGHT_SOURCE_STANDARD_A 17 +#define OT_ISP_DCF_LIGHT_SOURCE_D75 22 +#define OT_ISP_DCF_LIGHT_SOURCE_OTHER 255 +#define OT_ISP_DCF_CUSTOM_RENDERED_MAX 1 +#define OT_ISP_DCF_CAPTRUE_TYPE_MAX 3 +#define OT_ISP_DCF_GAIN_CONTROL_MAX 4 +#define OT_ISP_DCF_SATURATION_MAX 2 + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_ISP_DEFINE_H */ diff --git a/kernel/include/hi3519dv500/ot_math.h b/kernel/include/hi3519dv500/ot_math.h new file mode 100644 index 0000000..2756df9 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_math.h @@ -0,0 +1,333 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MATH_H +#define OT_MATH_H + +#include "ot_type.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +/* + * ABS(x) absolute value of x + * SIGN(x) sign of x + * CMP(x,y) 0 if x==y; 1 if x>y; -1 if x= 0 ? (x) : (-(x))) +#define _SIGN(x) ((x) >= 0 ? 1 : (-1)) +#define CMP(x, y) (((x) == (y)) ? 0 : (((x) > (y)) ? 1 : (-1))) + +/* + * MAX2(x,y) maximum of x and y + * MIN2(x,y) minimum of x and y + * MAX3(x,y,z) maximum of x, y and z + * MIN3(x,y,z) minimum of x, y and z + */ +#define MAX2(x, y) ((x) > (y) ? (x) : (y)) +#define MIN2(x, y) ((x) < (y) ? (x) : (y)) +#define MAX3(x, y, z) ((x) > (y) ? MAX2(x, z) : MAX2(y, z)) +#define MIN3(x, y, z) ((x) < (y) ? MIN2(x, z) : MIN2(y, z)) + +/* + * CLIP3(x,min,max) clip x within [min,max] + * value_between(x,min.max) True if x is between [min,max] inclusively. + */ +#define clip_min(x, min) (((x) >= (min)) ? (x) : (min)) +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#define clip_max(x, max) ((x) > (max) ? (max) : (x)) +#define value_between(x, min, max) (((x) >= (min)) && ((x) <= (max))) + +/* + * MULTI_OF_2_POWER(x,a) whether x is multiple of a(a must be power of 2) + * OT_ALIGN_DOWN(x,a) floor x to multiple of a(a must be power of 2) + * OT_ALIGN_UP(x, a) align x to multiple of a + * + * Example: + * ALIGN UP, OT_ALIGN_UP(5,4) = 8 + * ALIGN DOWN, OT_ALIGN_DOWN(5,4) = 4 + */ +#define MULTI_OF_2_POWER(x, a) (!((x) & ((a) - 1))) +#define OT_CEILING(x, a) (((x) + (a)-1) / (a)) + +#define OT_ALIGN_UP(x, a) ((((x) + ((a) - 1)) / (a)) * (a)) +#define OT_ALIGN_DOWN(x, a) (((x) / (a)) * (a)) + +#define OT_DIV_UP(x, a) (((x) + ((a) - 1)) / (a)) + +/* + * FRACTION32(de,nu) fraction: nu(minator) / de(nominator). + * NUMERATOR32(x) of x(x is fraction) + * DENOMINATOR32(x) Denominator of x(x is fraction) + * represent fraction in 32 bit. LSB 16 is numerator, MSB 16 is denominator + * It is integer if denominator is 0. + */ +#define FRACTION32(de, nu) (((de) << 16) | (nu)) +#define NUMERATOR32(x) ((x) & 0xffff) +#define DENOMINATOR32(x) ((x) >> 16) + +/* + * RGB(r,g,b) assemble the r,g,b to 24bit color + * RGB_R(c) get RED from 24bit color + * RGB_G(c) get GREEN from 24bit color + * RGB_B(c) get BLUE from 24bit color + */ +#define RGB(r, g, b) ((((r) & 0xff) << 16) | (((g) & 0xff) << 8) | ((b) & 0xff)) +#define RGB_R(c) (((c) & 0xff0000) >> 16) +#define RGB_G(c) (((c) & 0xff00) >> 8) +#define RGB_B(c) ((c) & 0xff) + +/* + * YUV(y,u,v) assemble the y,u,v to 30bit color + * YUV_Y(c) get Y from 30bit color + * YUV_U(c) get U from 30bit color + * YUV_V(c) get V from 30bit color + */ +#define YUV(y, u, v) ((((y) & 0x03ff) << 20) | (((u) & 0x03ff) << 10) | ((v) & 0x03ff)) +#define YUV_Y(c) (((c) & 0x3ff00000) >> 20) +#define YUV_U(c) (((c) & 0x000ffc00) >> 10) +#define YUV_V(c) ((c) & 0x000003ff) + +/* + * YUV_8BIT(y,u,v) assemble the y,u,v to 24bit color + * YUV_8BIT_Y(c) get Y from 24bit color + * YUV_8BIT_U(c) get U from 24bit color + * YUV_8BIT_V(c) get V from 24bit color + */ +#define YUV_8BIT(y, u, v) ((((y) & 0xff) << 16) | (((u) & 0xff) << 8) | ((v) & 0xff)) +#define YUV_8BIT_Y(c) (((c) & 0xff0000) >> 16) +#define YUV_8BIT_U(c) (((c) & 0xff00) >> 8) +#define YUV_8BIT_V(c) ((c) & 0xff) + +#define ot_usleep(usec) \ + do { \ + usleep(usec); \ + } while (0) + +/* + * Get the span between two unsigned number, such as + * SPAN(td_u32, 100, 200) is 200 - 100 = 100 + * SPAN(td_u32, 200, 100) is 0xFFFFFFFF - 200 + 100 + * SPAN(td_u64, 200, 100) is 0xFFFFFFFFFFFFFFFF - 200 + 100 + */ +#define SPAN(type, begin, end) \ +({ \ + type b = (begin); \ + type e = (end); \ + (type)((b >= e) ? (b - e) : (b + ((~((type)0)) - e))); \ +}) + +/* + * ENDIAN32(x,y) little endian <---> big endian + * IS_LITTLE_END() whether the system is little end mode + */ +#define ENDIAN32(x) \ + (((x) << 24) | \ + (((x) & 0x0000ff00) << 8) | \ + (((x) & 0x00ff0000) >> 8) | \ + (((x) >> 24) & 0x000000ff)) + + +/* + * ENDIAN16(x,y) little endian <---> big endian + * IS_LITTLE_END() whether the system is little end mode + */ +#define ENDIAN16(x) ((((x) << 8) & 0xff00) | (((x) >> 8) & 255)) + +__inline static td_bool is_little_end(void) +{ + union end_test_u { + td_char test[4]; + td_u32 test_full; + } end_test; + + end_test.test[0] = 0x01; + end_test.test[1] = 0x02; + end_test.test[2] = 0x03; + end_test.test[3] = 0x04; + + return (end_test.test_full > 0x01020304) ? (TD_TRUE) : (TD_FALSE); +} + +/* + * rgb_to_yc(r, g, b, *y, *u, *u) convert r,g,b to y,u,v + * rgb_to_yuv(rgb) convert rgb to yuv + * rgbfull to yuv601limit + */ +__inline static td_void rgb_to_yc(td_u16 r, td_u16 g, td_u16 b, td_u16 *y, td_u16 *cb, td_u16 *cr) +{ + /* Y */ + *y = (td_u16)((((r * 66 + g * 129 + b * 25) >> 8) + 16) << 2); + + /* cb */ + *cb = (td_u16)(((((b * 112 - r * 38) - g * 74) >> 8) + 128) << 2); + + /* cr */ + *cr = (td_u16)(((((r * 112 - g * 94) - b * 18) >> 8) + 128) << 2); +} + +__inline static td_u32 rgb_to_yuv(td_u32 rgb) +{ + td_u16 y, u, v; + + rgb_to_yc(RGB_R(rgb), RGB_G(rgb), RGB_B(rgb), &y, &u, &v); + + return YUV(y, u, v); +} + + +/* rgbfull to yuv601full */ +__inline static td_void rgb_to_yc_full(td_u16 r, td_u16 g, td_u16 b, td_u16 *y, td_u16 *cb, td_u16 *cr) +{ + td_u16 y_tmp, cb_tmp, cr_tmp; + + y_tmp = (td_u16)(((r * 76 + g * 150 + b * 29) >> 8) * 4); + cb_tmp = (td_u16)(clip_min(((((b * 128 - r * 43) - g * 84) >> 8) + 128), 0) * 4); + cr_tmp = (td_u16)(clip_min(((((r * 128 - g * 107) - b * 20) >> 8) + 128), 0) * 4); + + *y = MAX2(MIN2(y_tmp, 1023), 0); + *cb = MAX2(MIN2(cb_tmp, 1023), 0); + *cr = MAX2(MIN2(cr_tmp, 1023), 0); +} + +__inline static td_u32 rgb_to_yuv_full(td_u32 rgb) +{ + td_u16 y, u, v; + + rgb_to_yc_full(RGB_R(rgb), RGB_G(rgb), RGB_B(rgb), &y, &u, &v); + + return YUV(y, u, v); +} + +__inline static td_void yc_full_to_rgb(td_u16 y, td_u16 cb, td_u16 cr, td_u16 *r, td_u16 *g, td_u16 *b) +{ + td_s16 r_tmp, g_tmp, b_tmp; + + r_tmp = (y >> 2) + ((359 * (cr - 512)) >> 10); + g_tmp = (y >> 2) - (((88 * (cb - 512) + 182 * (cr - 512))) >> 10); + b_tmp = (y >> 2) + ((454 * (cb - 512)) >> 10); + + *r = MAX2(MIN2(r_tmp, 255), 0); + *g = MAX2(MIN2(g_tmp, 255), 0); + *b = MAX2(MIN2(b_tmp, 255), 0); +} + +__inline static td_u32 yuv_full_to_rgb(td_u32 yuv) +{ + td_u16 r, g, b; + + yc_full_to_rgb(YUV_Y(yuv), YUV_U(yuv), YUV_V(yuv), &r, &g, &b); + + return RGB(r, g, b); +} + + +/* + * rgb_to_yc_8bit(r, g, b, *y, *u, *u) convert r,g,b to y,u,v + * rgb_to_yuv_8bit(rgb) convert rgb to yuv + * rgbfull to yuv601limit + */ +__inline static td_void rgb_to_yc_8bit(td_u8 r, td_u8 g, td_u8 b, td_u8 *y, td_u8 *cb, td_u8 *cr) +{ + /* Y */ + *y = (td_u8)(((r * 66 + g * 129 + b * 25) >> 8) + 16); + + /* cb */ + *cb = (td_u8)((((b * 112 - r * 38) - g * 74) >> 8) + 128); + + /* cr */ + *cr = (td_u8)((((r * 112 - g * 94) - b * 18) >> 8) + 128); +} + +__inline static td_u32 rgb_to_yuv_8bit(td_u32 rgb) +{ + td_u8 y, u, v; + + rgb_to_yc_8bit(RGB_R(rgb), RGB_G(rgb), RGB_B(rgb), &y, &u, &v); + + return YUV_8BIT(y, u, v); +} + +/* rgbfull to yuv601full */ +__inline static td_void rgb_to_yc_full_8bit(td_u8 r, td_u8 g, td_u8 b, td_u8 *y, td_u8 *cb, td_u8 *cr) +{ + td_s16 y_tmp, cb_tmp, cr_tmp; + + y_tmp = (r * 76 + g * 150 + b * 29) >> 8; + cb_tmp = (((b * 128 - r * 43) - g * 84) >> 8) + 128; + cr_tmp = (((r * 128 - g * 107) - b * 20) >> 8) + 128; + + *y = MAX2(MIN2(y_tmp, 255), 0); + *cb = MAX2(MIN2(cb_tmp, 255), 0); + *cr = MAX2(MIN2(cr_tmp, 255), 0); +} + +__inline static td_u32 rgb2_yuv_full_8_bit(td_u32 rgb) +{ + td_u8 y, u, v; + + rgb_to_yc_full_8bit(RGB_R(rgb), RGB_G(rgb), RGB_B(rgb), &y, &u, &v); + + return YUV_8BIT(y, u, v); +} + +/* + * fps_control using sample: + * fps_ctrl g_fps_ctrl; + * + * take 12 frame uniform in 25. + * usage: init_fps(&g_fps_ctrl, 25, 12); + * + * { + * if(fps_control(&g_fps_ctrl)) printf("yes, this frame should be token"); + * } + */ +typedef struct { + td_u32 full_fps; /* full frame rate */ + td_u32 target_fps; /* target frame rate */ + td_u32 frame_key; /* update key frame */ +} fps_ctrl; + +__inline static td_void init_fps(fps_ctrl *frame_ctrl, td_u32 full_fps, td_u32 tag_fps) +{ + frame_ctrl->full_fps = full_fps; + frame_ctrl->target_fps = tag_fps; + frame_ctrl->frame_key = 0; +} + +__inline static td_bool do_fps_ctrl(fps_ctrl *frame_ctrl) +{ + td_bool ret = TD_FALSE; + + frame_ctrl->frame_key += frame_ctrl->target_fps; + if (frame_ctrl->frame_key >= frame_ctrl->full_fps) { + frame_ctrl->frame_key -= frame_ctrl->full_fps; + ret = TD_TRUE; + } + + return ret; +} + +__inline static td_u32 get_low_addr(td_phys_addr_t phys_addr) +{ + return (td_u32)phys_addr; +} + +__inline static td_u32 get_high_addr(td_phys_addr_t phys_addr) +{ + td_u32 low_width = 32; /* 32bit low addr */ + return (sizeof(phys_addr) > (low_width / 8)) ? (td_u32)(phys_addr >> low_width) : 0; /* 8 bits per byte */ +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* OT_MATH_H */ + diff --git a/kernel/include/hi3519dv500/ot_type.h b/kernel/include/hi3519dv500/ot_type.h new file mode 100644 index 0000000..fdc7c77 --- /dev/null +++ b/kernel/include/hi3519dv500/ot_type.h @@ -0,0 +1,73 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_TYPE_H +#define OT_TYPE_H + +#ifdef __KERNEL__ + +#include +#else + +#include +#endif +#include "autoconf.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C"{ +#endif +#endif /* __cplusplus */ + +#ifndef NULL + #define NULL 0L +#endif + +#define TD_NULL 0L +#define TD_SUCCESS 0 +#define TD_FAILURE (-1) + +typedef unsigned char td_uchar; +typedef unsigned char td_u8; +typedef unsigned short td_u16; +typedef unsigned int td_u32; +typedef unsigned long td_ulong; + +typedef char td_char; +typedef signed char td_s8; +typedef short td_s16; +typedef int td_s32; +typedef long td_slong; + +typedef float td_float; +typedef double td_double; + +typedef void td_void; + +typedef unsigned long long td_u64; +typedef long long td_s64; + +#ifdef CONFIG_PHYS_ADDR_BIT_WIDTH_64 + typedef unsigned long long td_phys_addr_t; +#else + typedef unsigned int td_phys_addr_t; +#endif + +typedef td_u32 td_handle; +typedef uintptr_t td_uintptr_t; +typedef unsigned int td_fr32; + +typedef enum { + TD_FALSE = 0, + TD_TRUE = 1, +} td_bool; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* OT_TYPE_H */ + diff --git a/kernel/include/hi3519dv500/securec.h b/kernel/include/hi3519dv500/securec.h new file mode 100644 index 0000000..49b5e4a --- /dev/null +++ b/kernel/include/hi3519dv500/securec.h @@ -0,0 +1,616 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef SECUREC_H_5D13A042_DC3F_4ED9_A8D1_882811274C27 +#define SECUREC_H_5D13A042_DC3F_4ED9_A8D1_882811274C27 + +#include "securectype.h" +#ifndef SECUREC_HAVE_STDARG_H +#define SECUREC_HAVE_STDARG_H 1 +#endif + +#if SECUREC_HAVE_STDARG_H +#include +#endif + +#ifndef SECUREC_HAVE_ERRNO_H +#define SECUREC_HAVE_ERRNO_H 1 +#endif + +/* EINVAL ERANGE may defined in errno.h */ +#if SECUREC_HAVE_ERRNO_H +#if SECUREC_IN_KERNEL +#include +#else +#include +#endif +#endif + +/* Define error code */ +#if defined(SECUREC_NEED_ERRNO_TYPE) || !defined(__STDC_WANT_LIB_EXT1__) || \ + (defined(__STDC_WANT_LIB_EXT1__) && (!__STDC_WANT_LIB_EXT1__)) +#ifndef SECUREC_DEFINED_ERRNO_TYPE +#define SECUREC_DEFINED_ERRNO_TYPE +/* Just check whether macrodefinition exists. */ +#ifndef errno_t +typedef int errno_t; +#endif +#endif +#endif + +/* Success */ +#ifndef EOK +#define EOK 0 +#endif + +#ifndef EINVAL +/* The src buffer is not correct and destination buffer can not be reset */ +#define EINVAL 22 +#endif + +#ifndef EINVAL_AND_RESET +/* Once the error is detected, the dest buffer must be reset! Value is 22 or 128 */ +#define EINVAL_AND_RESET 150 +#endif + +#ifndef ERANGE +/* The destination buffer is not long enough and destination buffer can not be reset */ +#define ERANGE 34 +#endif + +#ifndef ERANGE_AND_RESET +/* Once the error is detected, the dest buffer must be reset! Value is 34 or 128 */ +#define ERANGE_AND_RESET 162 +#endif + +#ifndef EOVERLAP_AND_RESET +/* Once the buffer overlap is detected, the dest buffer must be reset! Value is 54 or 128 */ +#define EOVERLAP_AND_RESET 182 +#endif + +/* If you need export the function of this library in Win32 dll, use __declspec(dllexport) */ +#ifndef SECUREC_API +#if defined(SECUREC_DLL_EXPORT) +#define SECUREC_API __declspec(dllexport) +#elif defined(SECUREC_DLL_IMPORT) +#define SECUREC_API __declspec(dllimport) +#else +/* + * Standardized function declaration. If a security function is declared in the your code, + * it may cause a compilation alarm,Please delete the security function you declared. + * Adding extern under windows will cause the system to have inline functions to expand, + * so do not add the extern in default + */ +#if defined(_MSC_VER) +#define SECUREC_API +#else +#define SECUREC_API extern +#endif +#endif +#endif + +#ifdef __cplusplus +extern "C" { +#endif +/* + * Description: The GetHwSecureCVersion function get SecureC Version string and version number. + * Parameter: verNumber - to store version number (for example value is 0x500 | 0xa) + * Return: version string + */ +SECUREC_API const char *GetHwSecureCVersion(unsigned short *verNumber); + +#if SECUREC_ENABLE_MEMSET +/* + * Description: The memset_s function copies the value of c (converted to an unsigned char) into each of + * the first count characters of the object pointed to by dest. + * Parameter: dest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: c - the value to be copied + * Parameter: count - copies count bytes of value to dest + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t memset_s(void *dest, size_t destMax, int c, size_t count); +#endif + +#ifndef SECUREC_ONLY_DECLARE_MEMSET +#define SECUREC_ONLY_DECLARE_MEMSET 0 +#endif + +#if !SECUREC_ONLY_DECLARE_MEMSET + +#if SECUREC_ENABLE_MEMMOVE +/* + * Description: The memmove_s function copies n characters from the object pointed to by src + * into the object pointed to by dest. + * Parameter: dest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: src - source address + * Parameter: count - copies count bytes from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t memmove_s(void *dest, size_t destMax, const void *src, size_t count); +#endif + +#if SECUREC_ENABLE_MEMCPY +/* + * Description: The memcpy_s function copies n characters from the object pointed to + * by src into the object pointed to by dest. + * Parameter: dest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: src - source address + * Parameter: count - copies count bytes from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t memcpy_s(void *dest, size_t destMax, const void *src, size_t count); +#endif + +#if SECUREC_ENABLE_STRCPY +/* + * Description: The strcpy_s function copies the string pointed to by strSrc (including + * the terminating null character) into the array pointed to by strDest + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating null character) + * Parameter: strSrc - source address + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t strcpy_s(char *strDest, size_t destMax, const char *strSrc); +#endif + +#if SECUREC_ENABLE_STRNCPY +/* + * Description: The strncpy_s function copies not more than n successive characters (not including + * the terminating null character) from the array pointed to by strSrc to the array pointed to by strDest. + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating null character) + * Parameter: strSrc - source address + * Parameter: count - copies count characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t strncpy_s(char *strDest, size_t destMax, const char *strSrc, size_t count); +#endif + +#if SECUREC_ENABLE_STRCAT +/* + * Description: The strcat_s function appends a copy of the string pointed to by strSrc (including + * the terminating null character) to the end of the string pointed to by strDest. + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating null wide character) + * Parameter: strSrc - source address + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t strcat_s(char *strDest, size_t destMax, const char *strSrc); +#endif + +#if SECUREC_ENABLE_STRNCAT +/* + * Description: The strncat_s function appends not more than n successive characters (not including + * the terminating null character) + * from the array pointed to by strSrc to the end of the string pointed to by strDest. + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating null character) + * Parameter: strSrc - source address + * Parameter: count - copies count characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t strncat_s(char *strDest, size_t destMax, const char *strSrc, size_t count); +#endif + +#if SECUREC_ENABLE_VSPRINTF +/* + * Description: The vsprintf_s function is equivalent to the vsprintf function except for the parameter destMax + * and the explicit runtime-constraints violation + * Parameter: strDest - produce output according to a format,write to the character string strDest. + * Parameter: destMax - The maximum length of destination buffer(including the terminating null wide character) + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1. + */ +SECUREC_API int vsprintf_s(char *strDest, size_t destMax, const char *format, + va_list argList) SECUREC_ATTRIBUTE(3, 0); +#endif + +#if SECUREC_ENABLE_SPRINTF +/* + * Description: The sprintf_s function is equivalent to the sprintf function except for the parameter destMax + * and the explicit runtime-constraints violation + * Parameter: strDest - produce output according to a format ,write to the character string strDest. + * Parameter: destMax - The maximum length of destination buffer(including the terminating null byte '\0') + * Parameter: format - format string + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1. +*/ +SECUREC_API int sprintf_s(char *strDest, size_t destMax, const char *format, ...) SECUREC_ATTRIBUTE(3, 4); +#endif + +#if SECUREC_ENABLE_VSNPRINTF +/* + * Description: The vsnprintf_s function is equivalent to the vsnprintf function except for + * the parameter destMax/count and the explicit runtime-constraints violation + * Parameter: strDest - produce output according to a format ,write to the character string strDest. + * Parameter: destMax - The maximum length of destination buffer(including the terminating null byte '\0') + * Parameter: count - do not write more than count bytes to strDest(not including the terminating null byte '\0') + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1.Pay special attention to returning -1 when truncation occurs. + */ +SECUREC_API int vsnprintf_s(char *strDest, size_t destMax, size_t count, const char *format, + va_list argList) SECUREC_ATTRIBUTE(4, 0); +#endif + +#if SECUREC_ENABLE_SNPRINTF +/* + * Description: The snprintf_s function is equivalent to the snprintf function except for + * the parameter destMax/count and the explicit runtime-constraints violation + * Parameter: strDest - produce output according to a format ,write to the character string strDest. + * Parameter: destMax - The maximum length of destination buffer(including the terminating null byte '\0') + * Parameter: count - do not write more than count bytes to strDest(not including the terminating null byte '\0') + * Parameter: format - format string + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1.Pay special attention to returning -1 when truncation occurs. + */ +SECUREC_API int snprintf_s(char *strDest, size_t destMax, size_t count, const char *format, + ...) SECUREC_ATTRIBUTE(4, 5); +#endif + +#if SECUREC_SNPRINTF_TRUNCATED +/* + * Description: The vsnprintf_truncated_s function is equivalent to the vsnprintf_s function except + * no count parameter and return value + * Parameter: strDest - produce output according to a format ,write to the character string strDest + * Parameter: destMax - The maximum length of destination buffer(including the terminating null byte '\0') + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1.Pay special attention to returning destMax - 1 when truncation occurs +*/ +SECUREC_API int vsnprintf_truncated_s(char *strDest, size_t destMax, const char *format, + va_list argList) SECUREC_ATTRIBUTE(3, 0); + +/* + * Description: The snprintf_truncated_s function is equivalent to the snprintf_s function except + * no count parameter and return value + * Parameter: strDest - produce output according to a format,write to the character string strDest. + * Parameter: destMax - The maximum length of destination buffer(including the terminating null byte '\0') + * Parameter: format - format string + * Return: the number of characters printed(not including the terminating null byte '\0'), + * If an error occurred Return: -1.Pay special attention to returning destMax - 1 when truncation occurs. + */ +SECUREC_API int snprintf_truncated_s(char *strDest, size_t destMax, + const char *format, ...) SECUREC_ATTRIBUTE(3, 4); +#endif + +#if SECUREC_ENABLE_SCANF +/* + * Description: The scanf_s function is equivalent to fscanf_s with the argument stdin + * interposed before the arguments to scanf_s + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int scanf_s(const char *format, ...); +#endif + +#if SECUREC_ENABLE_VSCANF +/* + * Description: The vscanf_s function is equivalent to scanf_s, with the variable argument list replaced by argList + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vscanf_s(const char *format, va_list argList); +#endif + +#if SECUREC_ENABLE_SSCANF +/* + * Description: The sscanf_s function is equivalent to fscanf_s, except that input is obtained from a + * string (specified by the argument buffer) rather than from a stream + * Parameter: buffer - read character from buffer + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int sscanf_s(const char *buffer, const char *format, ...); +#endif + +#if SECUREC_ENABLE_VSSCANF +/* + * Description: The vsscanf_s function is equivalent to sscanf_s, with the variable argument list + * replaced by argList + * Parameter: buffer - read character from buffer + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vsscanf_s(const char *buffer, const char *format, va_list argList); +#endif + +#if SECUREC_ENABLE_FSCANF +/* + * Description: The fscanf_s function is equivalent to fscanf except that the c, s, and [ conversion specifiers + * apply to a pair of arguments (unless assignment suppression is indicated by a *) + * Parameter: stream - stdio file stream + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int fscanf_s(FILE *stream, const char *format, ...); +#endif + +#if SECUREC_ENABLE_VFSCANF +/* + * Description: The vfscanf_s function is equivalent to fscanf_s, with the variable argument list + * replaced by argList + * Parameter: stream - stdio file stream + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vfscanf_s(FILE *stream, const char *format, va_list argList); +#endif + +#if SECUREC_ENABLE_STRTOK +/* + * Description: The strtok_s function parses a string into a sequence of strToken, + * replace all characters in strToken string that match to strDelimit set with 0. + * On the first call to strtok_s the string to be parsed should be specified in strToken. + * In each subsequent call that should parse the same string, strToken should be NULL + * Parameter: strToken - the string to be delimited + * Parameter: strDelimit - specifies a set of characters that delimit the tokens in the parsed string + * Parameter: context - is a pointer to a char * variable that is used internally by strtok_s function + * Return: On the first call returns the address of the first non \0 character, otherwise NULL is returned. + * In subsequent calls, the strtoken is set to NULL, and the context set is the same as the previous call, + * return NULL if the *context string length is equal 0, otherwise return *context. + */ +SECUREC_API char *strtok_s(char *strToken, const char *strDelimit, char **context); +#endif + +#if SECUREC_ENABLE_GETS && !SECUREC_IN_KERNEL +/* + * Description: The gets_s function reads at most one less than the number of characters specified + * by destMax from the stream pointed to by stdin, into the array pointed to by buffer + * Parameter: buffer - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating null character) + * Return: buffer if there was no runtime-constraint violation,If an error occurred Return: NULL. + */ +SECUREC_API char *gets_s(char *buffer, size_t destMax); +#endif + +#if SECUREC_ENABLE_WCHAR_FUNC +#if SECUREC_ENABLE_MEMCPY +/* + * Description: The wmemcpy_s function copies n successive wide characters from the object pointed to + * by src into the object pointed to by dest. + * Parameter: dest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: src - source address + * Parameter: count - copies count wide characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wmemcpy_s(wchar_t *dest, size_t destMax, const wchar_t *src, size_t count); +#endif + +#if SECUREC_ENABLE_MEMMOVE +/* + * Description: The wmemmove_s function copies n successive wide characters from the object + * pointed to by src into the object pointed to by dest. + * Parameter: dest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: src - source address + * Parameter: count - copies count wide characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wmemmove_s(wchar_t *dest, size_t destMax, const wchar_t *src, size_t count); +#endif + +#if SECUREC_ENABLE_STRCPY +/* + * Description: The wcscpy_s function copies the wide string pointed to by strSrc(including the terminating + * null wide character) into the array pointed to by strDest + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer + * Parameter: strSrc - source address + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wcscpy_s(wchar_t *strDest, size_t destMax, const wchar_t *strSrc); +#endif + +#if SECUREC_ENABLE_STRNCPY +/* + * Description: The wcsncpy_s function copies not more than n successive wide characters (not including the + * terminating null wide character) from the array pointed to by strSrc to the array pointed to by strDest + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating wide character) + * Parameter: strSrc - source address + * Parameter: count - copies count wide characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wcsncpy_s(wchar_t *strDest, size_t destMax, const wchar_t *strSrc, size_t count); +#endif + +#if SECUREC_ENABLE_STRCAT +/* + * Description: The wcscat_s function appends a copy of the wide string pointed to by strSrc (including the + * terminating null wide character) to the end of the wide string pointed to by strDest + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating wide character) + * Parameter: strSrc - source address + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wcscat_s(wchar_t *strDest, size_t destMax, const wchar_t *strSrc); +#endif + +#if SECUREC_ENABLE_STRNCAT +/* + * Description: The wcsncat_s function appends not more than n successive wide characters (not including the + * terminating null wide character) from the array pointed to by strSrc to the end of the wide string pointed to + * by strDest. + * Parameter: strDest - destination address + * Parameter: destMax - The maximum length of destination buffer(including the terminating wide character) + * Parameter: strSrc - source address + * Parameter: count - copies count wide characters from the src + * Return: EOK if there was no runtime-constraint violation + */ +SECUREC_API errno_t wcsncat_s(wchar_t *strDest, size_t destMax, const wchar_t *strSrc, size_t count); +#endif + +#if SECUREC_ENABLE_STRTOK +/* + * Description: The wcstok_s function is the wide-character equivalent of the strtok_s function + * Parameter: strToken - the string to be delimited + * Parameter: strDelimit - specifies a set of characters that delimit the tokens in the parsed string + * Parameter: context - is a pointer to a char * variable that is used internally by strtok_s function + * Return: a pointer to the first character of a token, or a null pointer if there is no token + * or there is a runtime-constraint violation. + */ +SECUREC_API wchar_t *wcstok_s(wchar_t *strToken, const wchar_t *strDelimit, wchar_t **context); +#endif + +#if SECUREC_ENABLE_VSPRINTF +/* + * Description: The vswprintf_s function is the wide-character equivalent of the vsprintf_s function + * Parameter: strDest - produce output according to a format,write to the character string strDest + * Parameter: destMax - The maximum length of destination buffer(including the terminating null) + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of characters printed(not including the terminating null wide character), + * If an error occurred Return: -1. + */ +SECUREC_API int vswprintf_s(wchar_t *strDest, size_t destMax, const wchar_t *format, va_list argList); +#endif + +#if SECUREC_ENABLE_SPRINTF +/* + * Description: The swprintf_s function is the wide-character equivalent of the sprintf_s function + * Parameter: strDest - produce output according to a format,write to the character string strDest + * Parameter: destMax - The maximum length of destination buffer(including the terminating null) + * Parameter: format - format string + * Return: the number of characters printed(not including the terminating null wide character), + * If an error occurred Return: -1. + */ +SECUREC_API int swprintf_s(wchar_t *strDest, size_t destMax, const wchar_t *format, ...); +#endif + +#if SECUREC_ENABLE_FSCANF +/* + * Description: The fwscanf_s function is the wide-character equivalent of the fscanf_s function + * Parameter: stream - stdio file stream + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int fwscanf_s(FILE *stream, const wchar_t *format, ...); +#endif + +#if SECUREC_ENABLE_VFSCANF +/* + * Description: The vfwscanf_s function is the wide-character equivalent of the vfscanf_s function + * Parameter: stream - stdio file stream + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vfwscanf_s(FILE *stream, const wchar_t *format, va_list argList); +#endif + +#if SECUREC_ENABLE_SCANF +/* + * Description: The wscanf_s function is the wide-character equivalent of the scanf_s function + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int wscanf_s(const wchar_t *format, ...); +#endif + +#if SECUREC_ENABLE_VSCANF +/* + * Description: The vwscanf_s function is the wide-character equivalent of the vscanf_s function + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vwscanf_s(const wchar_t *format, va_list argList); +#endif + +#if SECUREC_ENABLE_SSCANF +/* + * Description: The swscanf_s function is the wide-character equivalent of the sscanf_s function + * Parameter: buffer - read character from buffer + * Parameter: format - format string + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int swscanf_s(const wchar_t *buffer, const wchar_t *format, ...); +#endif + +#if SECUREC_ENABLE_VSSCANF +/* + * Description: The vswscanf_s function is the wide-character equivalent of the vsscanf_s function + * Parameter: buffer - read character from buffer + * Parameter: format - format string + * Parameter: argList - instead of a variable number of arguments + * Return: the number of input items assigned, If an error occurred Return: -1. + */ +SECUREC_API int vswscanf_s(const wchar_t *buffer, const wchar_t *format, va_list argList); +#endif +#endif /* SECUREC_ENABLE_WCHAR_FUNC */ +#endif + +/* Those functions are used by macro,must declare hare, also for without function declaration warning */ +extern errno_t strncpy_error(char *strDest, size_t destMax, const char *strSrc, size_t count); +extern errno_t strcpy_error(char *strDest, size_t destMax, const char *strSrc); + +#if SECUREC_WITH_PERFORMANCE_ADDONS +/* Those functions are used by macro */ +extern errno_t memset_sOptAsm(void *dest, size_t destMax, int c, size_t count); +extern errno_t memset_sOptTc(void *dest, size_t destMax, int c, size_t count); +extern errno_t memcpy_sOptAsm(void *dest, size_t destMax, const void *src, size_t count); +extern errno_t memcpy_sOptTc(void *dest, size_t destMax, const void *src, size_t count); + +/* The strcpy_sp is a macro, not a function in performance optimization mode. */ +#define strcpy_sp(dest, destMax, src) ((__builtin_constant_p((destMax)) && \ + __builtin_constant_p((src))) ? \ + SECUREC_STRCPY_SM((dest), (destMax), (src)) : \ + strcpy_s((dest), (destMax), (src))) + +/* The strncpy_sp is a macro, not a function in performance optimization mode. */ +#define strncpy_sp(dest, destMax, src, count) ((__builtin_constant_p((count)) && \ + __builtin_constant_p((destMax)) && \ + __builtin_constant_p((src))) ? \ + SECUREC_STRNCPY_SM((dest), (destMax), (src), (count)) : \ + strncpy_s((dest), (destMax), (src), (count))) + +/* The strcat_sp is a macro, not a function in performance optimization mode. */ +#define strcat_sp(dest, destMax, src) ((__builtin_constant_p((destMax)) && \ + __builtin_constant_p((src))) ? \ + SECUREC_STRCAT_SM((dest), (destMax), (src)) : \ + strcat_s((dest), (destMax), (src))) + +/* The strncat_sp is a macro, not a function in performance optimization mode. */ +#define strncat_sp(dest, destMax, src, count) ((__builtin_constant_p((count)) && \ + __builtin_constant_p((destMax)) && \ + __builtin_constant_p((src))) ? \ + SECUREC_STRNCAT_SM((dest), (destMax), (src), (count)) : \ + strncat_s((dest), (destMax), (src), (count))) + +/* The memcpy_sp is a macro, not a function in performance optimization mode. */ +#define memcpy_sp(dest, destMax, src, count) (__builtin_constant_p((count)) ? \ + (SECUREC_MEMCPY_SM((dest), (destMax), (src), (count))) : \ + (__builtin_constant_p((destMax)) ? \ + (((size_t)(destMax) > 0 && \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_MEM_MAX_LEN)) ? \ + memcpy_sOptTc((dest), (destMax), (src), (count)) : ERANGE) : \ + memcpy_sOptAsm((dest), (destMax), (src), (count)))) + +/* The memset_sp is a macro, not a function in performance optimization mode. */ +#define memset_sp(dest, destMax, c, count) (__builtin_constant_p((count)) ? \ + (SECUREC_MEMSET_SM((dest), (destMax), (c), (count))) : \ + (__builtin_constant_p((destMax)) ? \ + (((((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_MEM_MAX_LEN)) ? \ + memset_sOptTc((dest), (destMax), (c), (count)) : ERANGE) : \ + memset_sOptAsm((dest), (destMax), (c), (count)))) + +#endif + +#ifdef __cplusplus +} +#endif +#endif + diff --git a/kernel/include/hi3519dv500/securectype.h b/kernel/include/hi3519dv500/securectype.h new file mode 100644 index 0000000..0516774 --- /dev/null +++ b/kernel/include/hi3519dv500/securectype.h @@ -0,0 +1,571 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ +/* + * [Standardize-exceptions]: Performance-sensitive + * [reason]: Strict parameter verification has been done before use + */ + +#ifndef SECURECTYPE_H_A7BBB686_AADA_451B_B9F9_44DACDAE18A7 +#define SECURECTYPE_H_A7BBB686_AADA_451B_B9F9_44DACDAE18A7 + +#ifndef SECUREC_USING_STD_SECURE_LIB +#if defined(_MSC_VER) && _MSC_VER >= 1400 +#if defined(__STDC_WANT_SECURE_LIB__) && (!__STDC_WANT_SECURE_LIB__) +/* Security functions have been provided since vs2005, default use of system library functions */ +#define SECUREC_USING_STD_SECURE_LIB 0 +#else +#define SECUREC_USING_STD_SECURE_LIB 1 +#endif +#else +#define SECUREC_USING_STD_SECURE_LIB 0 +#endif +#endif + +/* Compatibility with older Secure C versions, shielding VC symbol redefinition warning */ +#if defined(_MSC_VER) && (_MSC_VER >= 1400) && (!SECUREC_USING_STD_SECURE_LIB) +#ifndef SECUREC_DISABLE_CRT_FUNC +#define SECUREC_DISABLE_CRT_FUNC 1 +#endif +#ifndef SECUREC_DISABLE_CRT_IMP +#define SECUREC_DISABLE_CRT_IMP 1 +#endif +#else /* MSC VER */ +#ifndef SECUREC_DISABLE_CRT_FUNC +#define SECUREC_DISABLE_CRT_FUNC 0 +#endif +#ifndef SECUREC_DISABLE_CRT_IMP +#define SECUREC_DISABLE_CRT_IMP 0 +#endif +#endif + +#if SECUREC_DISABLE_CRT_FUNC +#ifdef __STDC_WANT_SECURE_LIB__ +#undef __STDC_WANT_SECURE_LIB__ +#endif +#define __STDC_WANT_SECURE_LIB__ 0 +#endif + +#if SECUREC_DISABLE_CRT_IMP +#ifdef _CRTIMP_ALTERNATIVE +#undef _CRTIMP_ALTERNATIVE +#endif +#define _CRTIMP_ALTERNATIVE /* Comment Microsoft *_s function */ +#endif + +/* Compile in kernel under macro control */ +#ifndef SECUREC_IN_KERNEL +#ifdef __KERNEL__ +#define SECUREC_IN_KERNEL 1 +#else +#define SECUREC_IN_KERNEL 0 +#endif +#endif + +/* make kernel symbols of functions available to loadable modules */ +#ifndef SECUREC_EXPORT_KERNEL_SYMBOL +#if SECUREC_IN_KERNEL +#define SECUREC_EXPORT_KERNEL_SYMBOL 1 +#else +#define SECUREC_EXPORT_KERNEL_SYMBOL 0 +#endif +#endif + +#if SECUREC_IN_KERNEL +#ifndef SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_SCANF_FILE 0 +#endif +#ifndef SECUREC_ENABLE_WCHAR_FUNC +#define SECUREC_ENABLE_WCHAR_FUNC 0 +#endif +#else /* SECUREC_IN_KERNEL */ +#ifndef SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_SCANF_FILE 1 +#endif +#ifndef SECUREC_ENABLE_WCHAR_FUNC +#define SECUREC_ENABLE_WCHAR_FUNC 1 +#endif +#endif + +/* Default secure function declaration, default declarations for non-standard functions */ +#ifndef SECUREC_SNPRINTF_TRUNCATED +#define SECUREC_SNPRINTF_TRUNCATED 1 +#endif + +#if SECUREC_USING_STD_SECURE_LIB +#if defined(_MSC_VER) && _MSC_VER >= 1400 +/* Declare secure functions that are not available in the VS compiler */ +#ifndef SECUREC_ENABLE_MEMSET +#define SECUREC_ENABLE_MEMSET 1 +#endif +/* VS 2005 have vsnprintf_s function */ +#ifndef SECUREC_ENABLE_VSNPRINTF +#define SECUREC_ENABLE_VSNPRINTF 0 +#endif +#ifndef SECUREC_ENABLE_SNPRINTF +/* VS 2005 have vsnprintf_s function Adapt the snprintf_s of the security function */ +#define snprintf_s _snprintf_s +#define SECUREC_ENABLE_SNPRINTF 0 +#endif +/* Before VS 2010 do not have v functions */ +#if _MSC_VER <= 1600 || defined(SECUREC_FOR_V_SCANFS) +#ifndef SECUREC_ENABLE_VFSCANF +#define SECUREC_ENABLE_VFSCANF 1 +#endif +#ifndef SECUREC_ENABLE_VSCANF +#define SECUREC_ENABLE_VSCANF 1 +#endif +#ifndef SECUREC_ENABLE_VSSCANF +#define SECUREC_ENABLE_VSSCANF 1 +#endif +#endif + +#else /* MSC VER */ +#ifndef SECUREC_ENABLE_MEMSET +#define SECUREC_ENABLE_MEMSET 0 +#endif +#ifndef SECUREC_ENABLE_SNPRINTF +#define SECUREC_ENABLE_SNPRINTF 0 +#endif +#ifndef SECUREC_ENABLE_VSNPRINTF +#define SECUREC_ENABLE_VSNPRINTF 0 +#endif +#endif + +#ifndef SECUREC_ENABLE_MEMMOVE +#define SECUREC_ENABLE_MEMMOVE 0 +#endif +#ifndef SECUREC_ENABLE_MEMCPY +#define SECUREC_ENABLE_MEMCPY 0 +#endif +#ifndef SECUREC_ENABLE_STRCPY +#define SECUREC_ENABLE_STRCPY 0 +#endif +#ifndef SECUREC_ENABLE_STRNCPY +#define SECUREC_ENABLE_STRNCPY 0 +#endif +#ifndef SECUREC_ENABLE_STRCAT +#define SECUREC_ENABLE_STRCAT 0 +#endif +#ifndef SECUREC_ENABLE_STRNCAT +#define SECUREC_ENABLE_STRNCAT 0 +#endif +#ifndef SECUREC_ENABLE_SPRINTF +#define SECUREC_ENABLE_SPRINTF 0 +#endif +#ifndef SECUREC_ENABLE_VSPRINTF +#define SECUREC_ENABLE_VSPRINTF 0 +#endif +#ifndef SECUREC_ENABLE_SSCANF +#define SECUREC_ENABLE_SSCANF 0 +#endif +#ifndef SECUREC_ENABLE_VSSCANF +#define SECUREC_ENABLE_VSSCANF 0 +#endif +#ifndef SECUREC_ENABLE_SCANF +#define SECUREC_ENABLE_SCANF 0 +#endif +#ifndef SECUREC_ENABLE_VSCANF +#define SECUREC_ENABLE_VSCANF 0 +#endif + +#ifndef SECUREC_ENABLE_FSCANF +#define SECUREC_ENABLE_FSCANF 0 +#endif +#ifndef SECUREC_ENABLE_VFSCANF +#define SECUREC_ENABLE_VFSCANF 0 +#endif +#ifndef SECUREC_ENABLE_STRTOK +#define SECUREC_ENABLE_STRTOK 0 +#endif +#ifndef SECUREC_ENABLE_GETS +#define SECUREC_ENABLE_GETS 0 +#endif + +#else /* SECUREC USE STD SECURE LIB */ + +#ifndef SECUREC_ENABLE_MEMSET +#define SECUREC_ENABLE_MEMSET 1 +#endif +#ifndef SECUREC_ENABLE_MEMMOVE +#define SECUREC_ENABLE_MEMMOVE 1 +#endif +#ifndef SECUREC_ENABLE_MEMCPY +#define SECUREC_ENABLE_MEMCPY 1 +#endif +#ifndef SECUREC_ENABLE_STRCPY +#define SECUREC_ENABLE_STRCPY 1 +#endif +#ifndef SECUREC_ENABLE_STRNCPY +#define SECUREC_ENABLE_STRNCPY 1 +#endif +#ifndef SECUREC_ENABLE_STRCAT +#define SECUREC_ENABLE_STRCAT 1 +#endif +#ifndef SECUREC_ENABLE_STRNCAT +#define SECUREC_ENABLE_STRNCAT 1 +#endif +#ifndef SECUREC_ENABLE_SPRINTF +#define SECUREC_ENABLE_SPRINTF 1 +#endif +#ifndef SECUREC_ENABLE_VSPRINTF +#define SECUREC_ENABLE_VSPRINTF 1 +#endif +#ifndef SECUREC_ENABLE_SNPRINTF +#define SECUREC_ENABLE_SNPRINTF 1 +#endif +#ifndef SECUREC_ENABLE_VSNPRINTF +#define SECUREC_ENABLE_VSNPRINTF 1 +#endif +#ifndef SECUREC_ENABLE_SSCANF +#define SECUREC_ENABLE_SSCANF 1 +#endif +#ifndef SECUREC_ENABLE_VSSCANF +#define SECUREC_ENABLE_VSSCANF 1 +#endif +#ifndef SECUREC_ENABLE_SCANF +#if SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_SCANF 1 +#else +#define SECUREC_ENABLE_SCANF 0 +#endif +#endif +#ifndef SECUREC_ENABLE_VSCANF +#if SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_VSCANF 1 +#else +#define SECUREC_ENABLE_VSCANF 0 +#endif +#endif + +#ifndef SECUREC_ENABLE_FSCANF +#if SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_FSCANF 1 +#else +#define SECUREC_ENABLE_FSCANF 0 +#endif +#endif +#ifndef SECUREC_ENABLE_VFSCANF +#if SECUREC_ENABLE_SCANF_FILE +#define SECUREC_ENABLE_VFSCANF 1 +#else +#define SECUREC_ENABLE_VFSCANF 0 +#endif +#endif + +#ifndef SECUREC_ENABLE_STRTOK +#define SECUREC_ENABLE_STRTOK 1 +#endif +#ifndef SECUREC_ENABLE_GETS +#define SECUREC_ENABLE_GETS 1 +#endif +#endif /* SECUREC_USE_STD_SECURE_LIB */ + +#if !SECUREC_ENABLE_SCANF_FILE +#if SECUREC_ENABLE_FSCANF +#undef SECUREC_ENABLE_FSCANF +#define SECUREC_ENABLE_FSCANF 0 +#endif +#if SECUREC_ENABLE_VFSCANF +#undef SECUREC_ENABLE_VFSCANF +#define SECUREC_ENABLE_VFSCANF 0 +#endif +#if SECUREC_ENABLE_SCANF +#undef SECUREC_ENABLE_SCANF +#define SECUREC_ENABLE_SCANF 0 +#endif +#if SECUREC_ENABLE_FSCANF +#undef SECUREC_ENABLE_FSCANF +#define SECUREC_ENABLE_FSCANF 0 +#endif + +#endif + +#if SECUREC_IN_KERNEL +#include +#include +#else +#ifndef SECUREC_HAVE_STDIO_H +#define SECUREC_HAVE_STDIO_H 1 +#endif +#ifndef SECUREC_HAVE_STRING_H +#define SECUREC_HAVE_STRING_H 1 +#endif +#ifndef SECUREC_HAVE_STDLIB_H +#define SECUREC_HAVE_STDLIB_H 1 +#endif +#if SECUREC_HAVE_STDIO_H +#include +#endif +#if SECUREC_HAVE_STRING_H +#include +#endif +#if SECUREC_HAVE_STDLIB_H +#include +#endif +#endif + +/* + * If you need high performance, enable the SECUREC_WITH_PERFORMANCE_ADDONS macro, default is enable. + * The macro is automatically closed on the windows platform and linux kernel + */ +#ifndef SECUREC_WITH_PERFORMANCE_ADDONS +#if SECUREC_IN_KERNEL +#define SECUREC_WITH_PERFORMANCE_ADDONS 0 +#else +#define SECUREC_WITH_PERFORMANCE_ADDONS 1 +#endif +#endif + +/* If enable SECUREC_COMPATIBLE_WIN_FORMAT, the output format will be compatible to Windows. */ +#if (defined(_WIN32) || defined(_WIN64) || defined(_MSC_VER)) && !defined(SECUREC_COMPATIBLE_LINUX_FORMAT) +#ifndef SECUREC_COMPATIBLE_WIN_FORMAT +#define SECUREC_COMPATIBLE_WIN_FORMAT +#endif +#endif + +#if defined(SECUREC_COMPATIBLE_WIN_FORMAT) +/* On windows platform, can't use optimized function for there is no __builtin_constant_p like function */ +/* If need optimized macro, can define this: define __builtin_constant_p(x) 0 */ +#ifdef SECUREC_WITH_PERFORMANCE_ADDONS +#undef SECUREC_WITH_PERFORMANCE_ADDONS +#define SECUREC_WITH_PERFORMANCE_ADDONS 0 +#endif +#endif + +#if defined(__VXWORKS__) || defined(__vxworks) || defined(__VXWORKS) || defined(_VXWORKS_PLATFORM_) || \ + defined(SECUREC_VXWORKS_VERSION_5_4) +#ifndef SECUREC_VXWORKS_PLATFORM +#define SECUREC_VXWORKS_PLATFORM +#endif +#endif + +/* If enable SECUREC_COMPATIBLE_LINUX_FORMAT, the output format will be compatible to Linux. */ +#if !defined(SECUREC_COMPATIBLE_WIN_FORMAT) && !defined(SECUREC_VXWORKS_PLATFORM) +#ifndef SECUREC_COMPATIBLE_LINUX_FORMAT +#define SECUREC_COMPATIBLE_LINUX_FORMAT +#endif +#endif + +#ifdef SECUREC_COMPATIBLE_LINUX_FORMAT +#ifndef SECUREC_HAVE_STDDEF_H +#define SECUREC_HAVE_STDDEF_H 1 +#endif +/* Some system may no stddef.h */ +#if SECUREC_HAVE_STDDEF_H +#if !SECUREC_IN_KERNEL +#include +#endif +#endif +#endif + +/* + * Add the -DSECUREC_SUPPORT_FORMAT_WARNING=1 compiler option to supoort -Wformat=2. + * Default does not check the format is that the same data type in the actual code. + * In the product is different in the original data type definition of VxWorks and Linux. + */ +#ifndef SECUREC_SUPPORT_FORMAT_WARNING +#define SECUREC_SUPPORT_FORMAT_WARNING 0 +#endif + +#if SECUREC_SUPPORT_FORMAT_WARNING +#define SECUREC_ATTRIBUTE(x, y) __attribute__((format(printf, (x), (y)))) +#else +#define SECUREC_ATTRIBUTE(x, y) +#endif + +/* + * Add the -DSECUREC_SUPPORT_BUILTIN_EXPECT=0 compiler option, if compiler can not support __builtin_expect. + */ +#ifndef SECUREC_SUPPORT_BUILTIN_EXPECT +#define SECUREC_SUPPORT_BUILTIN_EXPECT 1 +#endif + +#if SECUREC_SUPPORT_BUILTIN_EXPECT && defined(__GNUC__) && ((__GNUC__ > 3) || \ + (defined(__GNUC_MINOR__) && (__GNUC__ == 3 && __GNUC_MINOR__ > 3))) +/* + * This is a built-in function that can be used without a declaration, if warning for declaration not found occurred, + * you can add -DSECUREC_NEED_BUILTIN_EXPECT_DECLARE to compiler options + */ +#ifdef SECUREC_NEED_BUILTIN_EXPECT_DECLARE +long __builtin_expect(long exp, long c); +#endif + +#define SECUREC_LIKELY(x) __builtin_expect(!!(x), 1) +#define SECUREC_UNLIKELY(x) __builtin_expect(!!(x), 0) +#else +#define SECUREC_LIKELY(x) (x) +#define SECUREC_UNLIKELY(x) (x) +#endif + +/* Define the max length of the string */ +#ifndef SECUREC_STRING_MAX_LEN +#define SECUREC_STRING_MAX_LEN 0x7fffffffUL +#endif +#define SECUREC_WCHAR_STRING_MAX_LEN (SECUREC_STRING_MAX_LEN / sizeof(wchar_t)) + +/* Add SECUREC_MEM_MAX_LEN for memcpy and memmove */ +#ifndef SECUREC_MEM_MAX_LEN +#define SECUREC_MEM_MAX_LEN 0x7fffffffUL +#endif +#define SECUREC_WCHAR_MEM_MAX_LEN (SECUREC_MEM_MAX_LEN / sizeof(wchar_t)) + +#if SECUREC_STRING_MAX_LEN > 0x7fffffffUL +#error "max string is 2G" +#endif + +#if (defined(__GNUC__) && defined(__SIZEOF_POINTER__)) +#if (__SIZEOF_POINTER__ != 4) && (__SIZEOF_POINTER__ != 8) +#error "unsupported system" +#endif +#endif + +#if defined(_WIN64) || defined(WIN64) || defined(__LP64__) || defined(_LP64) +#define SECUREC_ON_64BITS +#endif + +#if (!defined(SECUREC_ON_64BITS) && defined(__GNUC__) && defined(__SIZEOF_POINTER__)) +#if __SIZEOF_POINTER__ == 8 +#define SECUREC_ON_64BITS +#endif +#endif + +#if defined(__SVR4) || defined(__svr4__) +#define SECUREC_ON_SOLARIS +#endif + +#if (defined(__hpux) || defined(_AIX) || defined(SECUREC_ON_SOLARIS)) +#define SECUREC_ON_UNIX +#endif + +/* + * Codes should run under the macro SECUREC_COMPATIBLE_LINUX_FORMAT in unknown system on default, + * and strtold. + * The function strtold is referenced first at ISO9899:1999(C99), and some old compilers can + * not support these functions. Here provides a macro to open these functions: + * SECUREC_SUPPORT_STRTOLD -- If defined, strtold will be used + */ +#ifndef SECUREC_SUPPORT_STRTOLD +#define SECUREC_SUPPORT_STRTOLD 0 +#if (defined(SECUREC_COMPATIBLE_LINUX_FORMAT)) +#if defined(__USE_ISOC99) || \ + (defined(_AIX) && defined(_ISOC99_SOURCE)) || \ + (defined(__hpux) && defined(__ia64)) || \ + (defined(SECUREC_ON_SOLARIS) && (!defined(_STRICT_STDC) && !defined(__XOPEN_OR_POSIX)) || \ + defined(_STDC_C99) || defined(__EXTENSIONS__)) +#undef SECUREC_SUPPORT_STRTOLD +#define SECUREC_SUPPORT_STRTOLD 1 +#endif +#endif +#if ((defined(SECUREC_WRLINUX_BELOW4) || defined(_WRLINUX_BELOW4_))) +#undef SECUREC_SUPPORT_STRTOLD +#define SECUREC_SUPPORT_STRTOLD 0 +#endif +#endif + +#if SECUREC_WITH_PERFORMANCE_ADDONS + +#ifndef SECUREC_TWO_MIN +#define SECUREC_TWO_MIN(a, b) ((a) < (b) ? (a) : (b)) +#endif + +/* For strncpy_s performance optimization */ +#define SECUREC_STRNCPY_SM(dest, destMax, src, count) \ + (((void *)(dest) != NULL && (const void *)(src) != NULL && (size_t)(destMax) > 0 && \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_STRING_MAX_LEN) && \ + (SECUREC_TWO_MIN((size_t)(count), strlen(src)) + 1) <= (size_t)(destMax)) ? \ + (((size_t)(count) < strlen(src)) ? (memcpy((dest), (src), (count)), *((char *)(dest) + (count)) = '\0', EOK) : \ + (memcpy((dest), (src), strlen(src) + 1), EOK)) : (strncpy_error((dest), (destMax), (src), (count)))) + +#define SECUREC_STRCPY_SM(dest, destMax, src) \ + (((void *)(dest) != NULL && (const void *)(src) != NULL && (size_t)(destMax) > 0 && \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_STRING_MAX_LEN) && \ + (strlen(src) + 1) <= (size_t)(destMax)) ? (memcpy((dest), (src), strlen(src) + 1), EOK) : \ + (strcpy_error((dest), (destMax), (src)))) + +/* For strcat_s performance optimization */ +#if defined(__GNUC__) +#define SECUREC_STRCAT_SM(dest, destMax, src) ({ \ + int catRet_ = EOK; \ + if ((void *)(dest) != NULL && (const void *)(src) != NULL && (size_t)(destMax) > 0 && \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_STRING_MAX_LEN)) { \ + char *catTmpDst_ = (char *)(dest); \ + size_t catRestSize_ = (destMax); \ + while (catRestSize_ > 0 && *catTmpDst_ != '\0') { \ + ++catTmpDst_; \ + --catRestSize_; \ + } \ + if (catRestSize_ == 0) { \ + catRet_ = EINVAL; \ + } else if ((strlen(src) + 1) <= catRestSize_) { \ + memcpy(catTmpDst_, (src), strlen(src) + 1); \ + catRet_ = EOK; \ + } else { \ + catRet_ = ERANGE; \ + } \ + if (catRet_ != EOK) { \ + catRet_ = strcat_s((dest), (destMax), (src)); \ + } \ + } else { \ + catRet_ = strcat_s((dest), (destMax), (src)); \ + } \ + catRet_; \ +}) +#else +#define SECUREC_STRCAT_SM(dest, destMax, src) strcat_s((dest), (destMax), (src)) +#endif + +/* For strncat_s performance optimization */ +#if defined(__GNUC__) +#define SECUREC_STRNCAT_SM(dest, destMax, src, count) ({ \ + int ncatRet_ = EOK; \ + if ((void *)(dest) != NULL && (const void *)(src) != NULL && (size_t)(destMax) > 0 && \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) < SECUREC_STRING_MAX_LEN) && \ + (((unsigned long long)(count) & (unsigned long long)(-2)) < SECUREC_STRING_MAX_LEN)) { \ + char *ncatTmpDest_ = (char *)(dest); \ + size_t ncatRestSize_ = (size_t)(destMax); \ + while (ncatRestSize_ > 0 && *ncatTmpDest_ != '\0') { \ + ++ncatTmpDest_; \ + --ncatRestSize_; \ + } \ + if (ncatRestSize_ == 0) { \ + ncatRet_ = EINVAL; \ + } else if ((SECUREC_TWO_MIN((count), strlen(src)) + 1) <= ncatRestSize_) { \ + if ((size_t)(count) < strlen(src)) { \ + memcpy(ncatTmpDest_, (src), (count)); \ + *(ncatTmpDest_ + (count)) = '\0'; \ + } else { \ + memcpy(ncatTmpDest_, (src), strlen(src) + 1); \ + } \ + } else { \ + ncatRet_ = ERANGE; \ + } \ + if (ncatRet_ != EOK) { \ + ncatRet_ = strncat_s((dest), (destMax), (src), (count)); \ + } \ + } else { \ + ncatRet_ = strncat_s((dest), (destMax), (src), (count)); \ + } \ + ncatRet_; \ +}) +#else +#define SECUREC_STRNCAT_SM(dest, destMax, src, count) strncat_s((dest), (destMax), (src), (count)) +#endif + +/* This macro do not check buffer overlap by default */ +#define SECUREC_MEMCPY_SM(dest, destMax, src, count) \ + (!(((size_t)(destMax) == 0) || \ + (((unsigned long long)(destMax) & (unsigned long long)(-2)) > SECUREC_MEM_MAX_LEN) || \ + ((size_t)(count) > (size_t)(destMax)) || ((void *)(dest)) == NULL || ((const void *)(src) == NULL)) ? \ + (memcpy((dest), (src), (count)), EOK) : \ + (memcpy_s((dest), (destMax), (src), (count)))) + +#define SECUREC_MEMSET_SM(dest, destMax, c, count) \ + (!((((unsigned long long)(destMax) & (unsigned long long)(-2)) > SECUREC_MEM_MAX_LEN) || \ + ((void *)(dest) == NULL) || ((size_t)(count) > (size_t)(destMax))) ? \ + (memset((dest), (c), (count)), EOK) : \ + (memset_s((dest), (destMax), (c), (count)))) + +#endif +#endif + diff --git a/libraries/Makefile b/libraries/Makefile index 3a6fb8e..867bcee 100644 --- a/libraries/Makefile +++ b/libraries/Makefile @@ -47,6 +47,20 @@ ifeq ($(CHIPARCH),hi3516cv6xx) SUBDIRS := $(filter-out ./sensor/hi3516cv6xx/common/,$(SUBDIRS)) endif +# hi3519dv500 (V5, aarch64): build sensor drivers from SDK source. +ifeq ($(CHIPARCH),hi3519dv500) + SUBDIRS := $(filter ./sensor/hi3519dv500/%,$(SUBDIRS)) +endif + +# hi3519dv500 sensors are aarch64-only — the 32-bit toolchains used by every +# other chiparch can't compile their 64-bit-aligned vendor headers. Exclude +# them from any non-dv500 build (chiparchs without an explicit filter above, +# e.g. the V4 family, otherwise sweep in every sensor dir). Mirrors the +# nnie_neo guard. +ifneq ($(CHIPARCH),hi3519dv500) + SUBDIRS := $(filter-out ./sensor/hi3519dv500/%,$(SUBDIRS)) +endif + all: @failed=""; \ for dir in $(SUBDIRS); do \ diff --git a/libraries/isp/include/hi3519dv500/3a/ot_common_ae.h b/libraries/isp/include/hi3519dv500/3a/ot_common_ae.h new file mode 100644 index 0000000..8835ea6 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_common_ae.h @@ -0,0 +1,197 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_AE_H +#define OT_COMMON_AE_H + +#include "ot_type.h" +#include "ot_debug.h" +#include "ot_common_isp.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define OT_AE_LIB_NAME "ot_ae_lib" +#define OT_THERMO_LIB_NAME "ot_thermo_lib" + +/* sensor's interface to ae + * eg: 0.35db, enAccuType=OT_ISP_AE_ACCURACY_DB, f32Accuracy=0.35 + * and the multiply of 0.35db is power(10, (0.35/20)) + * eg: 1/16, 2/16, 3/16 multiplies, enAccuType=OT_ISP_AE_ACCURACY_LINEAR, f32Accuracy=0.0625 + * eg: 1,2,4,8,16 multiplies, enAccuType=OT_ISP_AE_ACCURACY_DB, f32Accuracy=6 + */ +typedef enum { + OT_ISP_AE_ACCURACY_DB = 0, + OT_ISP_AE_ACCURACY_LINEAR, + OT_ISP_AE_ACCURACY_TABLE, + + OT_ISP_AE_ACCURACY_BUTT, +} ot_isp_ae_accuracy_type; + +typedef struct { + ot_isp_ae_accuracy_type accu_type; + float accuracy; + float offset; +} ot_isp_ae_accuracy; + +typedef struct { + td_bool quick_start_enable; + td_u8 black_frame_num; + td_bool ir_mode_en; + td_u32 init_exposure_ir; + td_u32 iso_thr_ir; + td_u16 ir_cut_delay_time; +} ot_isp_quick_start_param; + +typedef struct { + td_u8 ae_compensation; + + td_u32 lines_per500ms; + td_u32 flicker_freq; + td_float fps; + td_u32 hmax_times; /* unit is ns */ + td_u32 init_exposure; + td_u32 init_int_time; + td_u32 init_again; + td_u32 init_dgain; + td_u32 init_isp_dgain; + td_u32 init_ae_speed; + td_u32 init_ae_tolerance; + + td_u32 full_lines_std; + td_u32 full_lines_max; + td_u32 full_lines; + td_u32 binning_full_lines; + td_u32 max_int_time; /* RW;unit is line */ + td_u32 min_int_time; + td_u32 max_int_time_target; + td_u32 min_int_time_target; + ot_isp_ae_accuracy int_time_accu; + + td_u32 max_again; + td_u32 min_again; + td_u32 max_again_target; + td_u32 min_again_target; + ot_isp_ae_accuracy again_accu; + + td_u32 max_dgain; + td_u32 min_dgain; + td_u32 max_dgain_target; + td_u32 min_dgain_target; + ot_isp_ae_accuracy dgain_accu; + + td_u32 max_isp_dgain_target; + td_u32 min_isp_dgain_target; + td_u32 isp_dgain_shift; + + td_u32 max_int_time_step; + td_bool max_time_step_enable; + td_u32 max_inc_time_step[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 max_dec_time_step[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 lf_max_short_time; + td_u32 lf_min_exposure; + + ot_isp_ae_route ae_route_attr; + td_bool ae_route_ex_valid; + ot_isp_ae_route_ex ae_route_attr_ex; + + ot_isp_ae_route ae_route_sf_attr; + ot_isp_ae_route_ex ae_route_sf_attr_ex; + + td_u16 man_ratio_enable; + td_u32 arr_ratio[OT_ISP_EXP_RATIO_NUM]; + + ot_isp_iris_type iris_type; + ot_isp_piris_attr piris_attr; + ot_isp_iris_f_no max_iris_fno; /* RW; Range:[0, 10]; Format:4.0; + Max F number of Piris's aperture, it's related to the specific iris */ + ot_isp_iris_f_no min_iris_fno; /* RW; Range:[0, 10]; Format:4.0; + Min F number of Piris's aperture, it's related to the specific iris */ + + ot_isp_ae_strategy ae_exp_mode; + + td_u16 iso_cal_coef; + td_u8 ae_run_interval; + td_u32 exp_ratio_max; + td_u32 exp_ratio_min; + td_bool diff_gain_support; + ot_isp_quick_start_param quick_start; + ot_isp_prior_frame prior_frame; + td_bool ae_gain_sep_cfg; + td_bool lhcg_support; + td_u32 sns_lhcg_exp_ratio; + + td_u8 ae_stat_pos; /* RW; Range:[0, 1]; Format:1.0 */ +} ot_isp_ae_sensor_default; + +typedef struct { + ot_isp_fswdr_mode fswdr_mode; +} ot_isp_ae_fswdr_attr; + +typedef struct { + td_u32 reg_addr; + td_u32 reg_value; +} ot_isp_ae_param_reg; + +typedef struct { + td_u32 tar_fps; + td_u32 exp_time; + td_u32 exp_again; + td_u32 exp_dgain; + td_u32 exp_isp_dgain; + ot_isp_ae_param_reg time_reg[10]; /* 10 */ + ot_isp_ae_param_reg again_reg[10]; /* 10 */ + ot_isp_ae_param_reg dgain_reg[10]; /* 10 */ +} ot_isp_ae_convert_param; + +typedef struct { + td_u32 int_time_min[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 int_time_max[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 pre_int_time[OT_ISP_WDR_MAX_FRAME_NUM]; +} ot_isp_ae_int_time_range; + +typedef struct { + td_u8 dark_throw_ratio; /* RW; Range:[1, 100]; Format:8.0; */ + td_u8 bright_throw_ratio; /* RW; Range:[1, 100]; Format:8.0; */ + td_u32 bright_compensation; /* RW; Range:[0, 16383]; Format:32.0; */ +} ot_isp_thermo_sensor_default; + +typedef struct { + td_s32 (*pfn_cmos_get_ae_default)(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft); + + /* the function of sensor set fps */ + td_void (*pfn_cmos_fps_set)(ot_vi_pipe vi_pipe, td_float f32_fps, ot_isp_ae_sensor_default *ae_sns_dft); + td_void (*pfn_cmos_slow_framerate_set)(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft); + + /* while isp notify ae to update sensor regs, ae call these funcs. */ + td_void (*pfn_cmos_inttime_update)(ot_vi_pipe vi_pipe, td_u32 int_time); + td_void (*pfn_cmos_gains_update)(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain); + + td_void (*pfn_cmos_again_calc_table)(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db); + td_void (*pfn_cmos_dgain_calc_table)(ot_vi_pipe vi_pipe, td_u32 *dgain_lin, td_u32 *dgain_db); + + td_void (*pfn_cmos_get_inttime_max)(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time); + + /* long frame mode set */ + td_void (*pfn_cmos_ae_fswdr_attr_set)(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr); + td_void (*pfn_cmos_ae_quick_start_status_set)(ot_vi_pipe vi_pipe, td_bool quick_start_status); + td_void (*pfn_cmos_exp_param_convert)(ot_vi_pipe vi_pipe, ot_isp_ae_convert_param *exp_param); + td_s32 (*pfn_cmos_get_thermo_default)(ot_vi_pipe vi_pipe, ot_isp_thermo_sensor_default *thermo_sns_dft); +} ot_isp_ae_sensor_exp_func; + +typedef struct { + ot_isp_ae_sensor_exp_func sns_exp; +} ot_isp_ae_sensor_register; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/3a/ot_common_af.h b/libraries/isp/include/hi3519dv500/3a/ot_common_af.h new file mode 100644 index 0000000..9a470e6 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_common_af.h @@ -0,0 +1,24 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_AF_H +#define OT_COMMON_AF_H + +#include "ot_type.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define OT_AF_LIB_NAME "ot_af_lib" + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/3a/ot_common_awb.h b/libraries/isp/include/hi3519dv500/3a/ot_common_awb.h new file mode 100644 index 0000000..4499181 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_common_awb.h @@ -0,0 +1,70 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_AWB_H +#define OT_COMMON_AWB_H + +#include "ot_type.h" +#include "ot_debug.h" +#include "ot_common_isp.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* end of #ifdef __cplusplus */ + +#define OT_AWB_LIB_NAME "ot_awb_lib" + +/* sensor's interface to awb */ +typedef struct { + td_u16 color_temp; /* RW; range:[2000,10000]; format:16.0; the current color temperature */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; range: [0x0, 0xFFFF]; format:8.8; + CCM matrixes for different color temperature */ +} ot_isp_awb_ccm_tab; + +typedef struct { + td_u16 ccm_tab_num; /* RW; range: [0x3, 0x7]; format:16.0; the number of CCM matrixes */ + ot_isp_awb_ccm_tab ccm_tab[OT_ISP_CCM_MATRIX_NUM]; +} ot_isp_awb_ccm; + +typedef struct { + td_bool valid; + + td_u8 saturation[OT_ISP_AUTO_ISO_NUM]; /* RW;adjust saturation, different iso with different saturation */ +} ot_isp_awb_agc_table; + +typedef struct { + td_u16 wb_ref_temp; /* RW;reference color temperature for WB */ + td_u16 gain_offset[OT_ISP_BAYER_CHN_NUM]; /* RW; gain offset for white balance */ + td_s32 wb_para[OT_ISP_AWB_CURVE_PARA_NUM]; /* RW; parameter for wb curve,p1,p2,q1,a1,b1,c1 */ + + td_u16 golden_rgain; /* rgain for the golden sample */ + td_u16 golden_bgain; /* bgain for the golden sample */ + td_u16 sample_rgain; /* rgain for the current sample */ + td_u16 sample_bgain; /* bgain for the current sample */ + ot_isp_awb_agc_table agc_tbl; + ot_isp_awb_ccm ccm; + td_u16 init_rgain; /* init WB gain */ + td_u16 init_ggain; + td_u16 init_bgain; + td_u8 awb_run_interval; /* RW;AWB run interval */ + td_u16 init_ccm[OT_ISP_CCM_MATRIX_SIZE]; +} ot_isp_awb_sensor_default; + +typedef struct { + td_s32 (*pfn_cmos_get_awb_default)(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft); +} ot_isp_awb_sensor_exp_func; + +typedef struct { + ot_isp_awb_sensor_exp_func sns_exp; +} ot_isp_awb_sensor_register; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* end of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/3a/ot_mpi_ae.h b/libraries/isp/include/hi3519dv500/3a/ot_mpi_ae.h new file mode 100644 index 0000000..6c31ed8 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_mpi_ae.h @@ -0,0 +1,75 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_AE_H +#define OT_MPI_AE_H + +#include "ot_common_isp.h" +#include "ot_common_3a.h" +#include "ot_common_ae.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* The interface of ae lib register to isp. */ +td_s32 ot_mpi_ae_register(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *ae_lib); +td_s32 ot_mpi_ae_unregister(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *ae_lib); + +/* The callback function of sensor register to ae lib. */ +td_s32 ot_mpi_ae_sensor_reg_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, + const ot_isp_sns_attr_info *sns_attr_info, ot_isp_ae_sensor_register *pregister); +td_s32 ot_mpi_ae_sensor_unreg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *ae_lib, ot_sensor_id sns_id); + +td_s32 ot_mpi_isp_set_exposure_attr(ot_vi_pipe vi_pipe, const ot_isp_exposure_attr *exp_attr); +td_s32 ot_mpi_isp_get_exposure_attr(ot_vi_pipe vi_pipe, ot_isp_exposure_attr *exp_attr); + +td_s32 ot_mpi_isp_set_wdr_exposure_attr(ot_vi_pipe vi_pipe, const ot_isp_wdr_exposure_attr *wdr_exp_attr); +td_s32 ot_mpi_isp_get_wdr_exposure_attr(ot_vi_pipe vi_pipe, ot_isp_wdr_exposure_attr *wdr_exp_attr); + +td_s32 ot_mpi_isp_set_hdr_exposure_attr(ot_vi_pipe vi_pipe, const ot_isp_hdr_exposure_attr *hdr_exp_attr); +td_s32 ot_mpi_isp_get_hdr_exposure_attr(ot_vi_pipe vi_pipe, ot_isp_hdr_exposure_attr *hdr_exp_attr); + +td_s32 ot_mpi_isp_set_ae_route_attr(ot_vi_pipe vi_pipe, const ot_isp_ae_route *ae_route_attr); +td_s32 ot_mpi_isp_get_ae_route_attr(ot_vi_pipe vi_pipe, ot_isp_ae_route *ae_route_attr); + +td_s32 ot_mpi_isp_set_ae_route_sf_attr(ot_vi_pipe vi_pipe, const ot_isp_ae_route *ae_route_sf_attr); +td_s32 ot_mpi_isp_get_ae_route_sf_attr(ot_vi_pipe vi_pipe, ot_isp_ae_route *ae_route_sf_attr); + +td_s32 ot_mpi_isp_query_exposure_info(ot_vi_pipe vi_pipe, ot_isp_exp_info *exp_info); + +td_s32 ot_mpi_isp_set_iris_attr(ot_vi_pipe vi_pipe, const ot_isp_iris_attr *iris_attr); +td_s32 ot_mpi_isp_get_iris_attr(ot_vi_pipe vi_pipe, ot_isp_iris_attr *iris_attr); + +td_s32 ot_mpi_isp_set_dciris_attr(ot_vi_pipe vi_pipe, const ot_isp_dciris_attr *dciris_attr); +td_s32 ot_mpi_isp_get_dciris_attr(ot_vi_pipe vi_pipe, ot_isp_dciris_attr *dciris_attr); + +td_s32 ot_mpi_isp_set_piris_attr(ot_vi_pipe vi_pipe, const ot_isp_piris_attr *piris_attr); +td_s32 ot_mpi_isp_get_piris_attr(ot_vi_pipe vi_pipe, ot_isp_piris_attr *piris_attr); + +td_s32 ot_mpi_isp_set_ae_route_attr_ex(ot_vi_pipe vi_pipe, const ot_isp_ae_route_ex *ae_route_attr_ex); +td_s32 ot_mpi_isp_get_ae_route_attr_ex(ot_vi_pipe vi_pipe, ot_isp_ae_route_ex *ae_route_attr_ex); + +td_s32 ot_mpi_isp_set_ae_route_sf_attr_ex(ot_vi_pipe vi_pipe, const ot_isp_ae_route_ex *ae_route_sf_attr_ex); +td_s32 ot_mpi_isp_get_ae_route_sf_attr_ex(ot_vi_pipe vi_pipe, ot_isp_ae_route_ex *ae_route_sf_attr_ex); + +td_s32 ot_mpi_isp_set_smart_exposure_attr(ot_vi_pipe vi_pipe, + const ot_isp_smart_exposure_attr *smart_exp_attr); +td_s32 ot_mpi_isp_get_smart_exposure_attr(ot_vi_pipe vi_pipe, ot_isp_smart_exposure_attr *smart_exp_attr); +td_s32 ot_mpi_isp_set_exp_convert(ot_vi_pipe vi_pipe, const ot_isp_exp_conv_param *conv_param); +td_s32 ot_mpi_isp_get_exp_convert(ot_vi_pipe vi_pipe, ot_isp_exp_conv_param *conv_param); + +td_s32 ot_mpi_isp_set_fast_face_ae_attr(ot_vi_pipe vi_pipe, const ot_isp_fast_face_ae_attr *fast_face_attr); +td_s32 ot_mpi_isp_get_fast_face_ae_attr(ot_vi_pipe vi_pipe, ot_isp_fast_face_ae_attr *fast_face_attr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/3a/ot_mpi_awb.h b/libraries/isp/include/hi3519dv500/3a/ot_mpi_awb.h new file mode 100644 index 0000000..96c3ae3 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_mpi_awb.h @@ -0,0 +1,51 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_AWB_H +#define OT_MPI_AWB_H + +#include "ot_common_isp.h" +#include "ot_common_3a.h" +#include "ot_common_awb.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* end of #ifdef __cplusplus */ + +/* The interface of awb lib register to isp. */ +td_s32 ot_mpi_awb_unregister(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *awb_lib); +td_s32 ot_mpi_awb_register(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *awb_lib); + +/* The callback function of sensor register to awb lib. */ +td_s32 ot_mpi_awb_sensor_reg_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *awb_lib, + ot_isp_sns_attr_info *sns_attr_info, + ot_isp_awb_sensor_register *awb_sns_register); +td_s32 ot_mpi_awb_sensor_unreg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *awb_lib, ot_sensor_id sns_id); + +td_s32 ot_mpi_isp_set_wb_attr(ot_vi_pipe vi_pipe, const ot_isp_wb_attr *wb_attr); +td_s32 ot_mpi_isp_get_wb_attr(ot_vi_pipe vi_pipe, ot_isp_wb_attr *wb_attr); + +td_s32 ot_mpi_isp_set_awb_attr_ex(ot_vi_pipe vi_pipe, const ot_isp_awb_attr_ex *awb_attr_ex); +td_s32 ot_mpi_isp_get_awb_attr_ex(ot_vi_pipe vi_pipe, ot_isp_awb_attr_ex *awb_attr_ex); + +td_s32 ot_mpi_isp_set_ccm_attr(ot_vi_pipe vi_pipe, const ot_isp_color_matrix_attr *ccm_attr); +td_s32 ot_mpi_isp_get_ccm_attr(ot_vi_pipe vi_pipe, ot_isp_color_matrix_attr *ccm_attr); + +td_s32 ot_mpi_isp_set_saturation_attr(ot_vi_pipe vi_pipe, const ot_isp_saturation_attr *sat_attr); +td_s32 ot_mpi_isp_get_saturation_attr(ot_vi_pipe vi_pipe, ot_isp_saturation_attr *sat_attr); + +td_s32 ot_mpi_isp_query_wb_info(ot_vi_pipe vi_pipe, ot_isp_wb_info *wb_info); +td_s32 ot_mpi_isp_cal_gain_by_temp(ot_vi_pipe vi_pipe, const ot_isp_wb_attr *wb_attr, td_u16 color_temp, + td_s16 shift, td_u16 *awb_gain); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* end of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/3a/ot_mpi_thermo.h b/libraries/isp/include/hi3519dv500/3a/ot_mpi_thermo.h new file mode 100644 index 0000000..31fe984 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/3a/ot_mpi_thermo.h @@ -0,0 +1,40 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ +#ifndef OT_MPI_THERMO_H +#define OT_MPI_THERMO_H + +#include +#include + +#include "ot_common_isp.h" +#include "ot_common_3a.h" +#include "ot_common_ae.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +td_s32 ot_mpi_thermo_register(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *thermo_lib); +td_s32 ot_mpi_thermo_unregister(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *thermo_lib); + +/* The callback function of sensor register to ae lib. */ +td_s32 ot_mpi_thermo_sensor_reg_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *thermo_lib, + const ot_isp_sns_attr_info *sns_attr_info, ot_isp_ae_sensor_register *s_register); +td_s32 ot_mpi_thermo_sensor_unreg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *thermo_lib, + ot_sensor_id sns_id); +td_s32 ot_mpi_isp_set_thermo_attr(ot_vi_pipe vi_pipe, const ot_isp_thermo_attr *thermo_attr); +td_s32 ot_mpi_isp_get_thermo_attr(ot_vi_pipe vi_pipe, ot_isp_thermo_attr *thermo_attr); +td_s32 ot_mpi_thermo_query_exposure_info(ot_vi_pipe vi_pipe, ot_isp_thermo_info *thermo_info); +td_s32 ot_mpi_isp_set_thermo_curve_attr(ot_vi_pipe vi_pipe, ot_isp_thermo_curve_attr *curve_attr); +td_s32 ot_mpi_isp_get_thermo_curve_attr(ot_vi_pipe vi_pipe, ot_isp_thermo_curve_attr *curve_attr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/ext_inc/isp_ext.h b/libraries/isp/include/hi3519dv500/ext_inc/isp_ext.h new file mode 100644 index 0000000..d8b9e1a --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ext_inc/isp_ext.h @@ -0,0 +1,481 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ +#ifndef ISP_EXT_H +#define ISP_EXT_H + +#include "ot_type.h" +#include "ot_common_isp.h" +#include "ot_common_vi.h" +#include "mod_ext.h" +#include "mkp_isp.h" +#include "ot_osal.h" +#include "isp_list.h" +#include "ot_common_video.h" + +#ifndef __LITEOS__ +#define ISP_WRITE_I2C_THROUGH_MUL_REG +#define ISP_WRITE_I2C_MAX_REG_NUM 60 +#endif + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +typedef enum { + ISP_BE_FORMAT_YUV420, + ISP_BE_FORMAT_YUV422, + ISP_BE_FORMAT_RAW, + ISP_BE_FORMAT_BUTT +} isp_be_format; + +typedef enum { + ISP_BUS_TYPE_I2C = 0, + ISP_BUS_TYPE_SSP, + + ISP_BUS_TYPE_BUTT, +} isp_bus_type; + +typedef struct { + td_u8 vc_num; +} isp_pro_ctrl; + +typedef struct { +#ifndef ISP_WRITE_I2C_THROUGH_MUL_REG + td_s32 (*pfn_isp_write_i2c_data)(td_u8 i2c_dev, td_u8 dev_addr, td_u32 reg_addr, + td_u32 reg_addr_byte_num, td_u32 data, td_u32 data_byte_num); +#else + td_s32 (*pfn_isp_write_i2c_data)(td_u8 i2c_dev, td_u8 dev_addr, td_s8 *data_buf, td_u8 data_buf_len, td_u8 data_len, + td_u32 reg_addr_byte_num, td_u32 data_byte_num); +#endif + td_s32 (*pfn_isp_write_ssp_data)(td_u32 spi_dev, td_u32 spi_csn, + td_u32 dev_addr, td_u32 dev_addr_byte_num, + td_u32 reg_addr, td_u32 reg_addr_byte_num, td_u32 data, td_u32 data_byte_num); +} isp_bus_callback; + +typedef struct { + td_s32 (*pfn_piris_gpio_update)(td_s32 vi_pipe, const td_s32 *pos); +} isp_piris_callback; + +/* AF */ +#define DRV_AF_ZONE_ROW 15 +#define DRV_AF_ZONE_COLUMN 17 +#define DRV_WDR_CHN_MAX 4 + +typedef struct { + td_u16 v1; + td_u16 h1; + td_u16 v2; + td_u16 h2; + td_u16 y; + td_u16 hl_cnt; +} ot_isp_drv_focus_zone; + +typedef struct { + /* RO, The zoned measure of contrast */ + ot_isp_drv_focus_zone zone_metrics[DRV_WDR_CHN_MAX][DRV_AF_ZONE_ROW][DRV_AF_ZONE_COLUMN]; +} ot_isp_drv_fe_focus_statistics; + +typedef struct { + ot_isp_drv_focus_zone zone_metrics[DRV_AF_ZONE_ROW][DRV_AF_ZONE_COLUMN]; /* RO, The zoned measure of contrast */ +} ot_isp_drv_be_focus_statistics; + +typedef struct { + ot_isp_drv_fe_focus_statistics fe_af_stat; + ot_isp_drv_be_focus_statistics be_af_stat; +} ot_isp_drv_af_statistics; + +/* ---------------------------------------------------------------------------------------- */ +/* isp sync task */ +typedef enum { + ISP_SYNC_TSK_METHOD_HW_IRQ = 0, + ISP_SYNC_TSK_METHOD_WORKQUE, + + ISP_SYNC_TSK_METHOD_BUTT +} ot_isp_sync_tsk_method; + +typedef struct { + ot_isp_sync_tsk_method method; + td_s32 (*isp_sync_tsk_callback)(td_u64 data); + td_u64 data; + const char *sz_id; + struct osal_list_head list; + ot_isp_drv_af_statistics *focus_stat; + ot_isp_ae_stats *ae_stat; +} ot_isp_sync_task_node; + +/* offline mode isp sync para */ +typedef struct { + td_bool correct_en; + td_u16 offset; + td_u32 isp_fpn_frame_calibrate_shift; + td_u32 isp_fpn_out_shift; + td_u32 isp_fpn_in_shift; + td_u32 isp_fpn_shift; + td_u32 isp_fpn_max; +} isp_fpn_cor_reg_cfg; + +typedef struct { + td_bool aibnr_en; + td_bool blend_en; + td_bool bnr_bypass; + td_bool dgain_bypass; +} isp_aibnr_cfg; + +typedef enum { + ISP_AIISP_PENDING_STAT_IDLE = 0, + ISP_AIISP_PENDING_STAT_ENABLE, + ISP_AIISP_PENDING_STAT_DISABLE, + ISP_AIISP_PENDING_STAT_BUTT +} isp_aiisp_pending_stat; + +/* AIDRC */ +typedef enum { + ISP_AIDRC_MODE_NORMAL = 0x0, + ISP_AIDRC_MODE_ADVANCED, + ISP_AIDRC_MODE_BUTT +} isp_aidrc_mode; + +typedef struct { + td_bool aidrc_en; + isp_aidrc_mode mode; + isp_aiisp_pending_stat pending_stat; + td_u32 pending_idx; +} isp_aidrc_cfg; + +typedef enum { + ISP_ALG_IN_PRE = 0, + ISP_ALG_IN_POST = 1, + ISP_ALG_BUTT +} isp_alg_in_pre_post; + +typedef struct { + union { + struct { + td_u32 bit_ae : 1; /* [0] */ + td_u32 bit_awb : 1; /* [1] */ + td_u32 bit_af : 1; /* [2] */ + td_u32 bit_la : 1; /* [3] */ + td_u32 bit_drc : 1; /* [4] */ + td_u32 bit_rsv : 27; /* [5:31] */ + } bits; + td_u32 pos; + } alg_pos; + td_u32 stat_valid; // isp_be_stat_valid stat_valid; + u_isp_viproc_ispbe_ctrl0 be_ctrl0; + u_isp_viproc_ispbe_ctrl1 be_ctrl1; +} isp_ai_alg_cfg; + +typedef struct { + ot_vi_aiisp_mode aiisp_mode; + td_u32 be_mask; + td_u32 split_index; + isp_be_wo_cfg_buf *be_cfg_buf_pre; + isp_be_wo_cfg_buf *be_cfg_buf_post; +} isp_vi_ai_work_param; +#ifdef CONFIG_OT_ISP_DETAIL_STATS_SUPPORT +typedef struct { + ot_isp_detail_stats_cfg stats_cfg; + size_t stt_offset; + size_t stt_size; +} isp_vi_detail_stats_cfg; +#endif + +typedef struct { + td_s32 (*pfn_isp_register_bus_callback) (td_s32 vi_pipe, isp_bus_type type, isp_bus_callback *bus_cb); + td_s32 (*pfn_isp_register_piris_callback) (td_s32 vi_pipe, isp_piris_callback *piris_cb); + td_s32 (*pfn_isp_get_dcf_info)(ot_vi_pipe vi_pipe, ot_isp_dcf_info *isp_dcf); + td_s32 (*pfn_isp_get_frame_info)(ot_vi_pipe vi_pipe, ot_isp_frame_info *isp_frame); + td_s32 (*pfn_isp_get_attach_info)(ot_vi_pipe vi_pipe, ot_isp_attach_info *isp_attach_info); + td_s32 (*pfn_isp_get_color_gamut_info)(ot_vi_pipe vi_pipe, ot_isp_colorgammut_info *isp_color_gamut_info); + td_s32 (*pfn_isp_get_dng_image_dynamic_info)(ot_vi_pipe vi_pipe, ot_dng_image_dynamic_info *dng_image_dynamic_info); + + td_s32 (*pfn_isp_drv_get_be_offline_addr_info)(ot_vi_pipe vi_pipe, isp_be_offline_addr_info *be_offline_addr); + td_s32 (*pfn_isp_drv_get_ready_be_buf)(ot_vi_pipe vi_pipe, isp_be_wo_cfg_buf *be_cfg_buf); + td_s32 (*pfn_isp_drv_put_free_be_buf)(ot_vi_pipe vi_pipe, isp_be_wo_cfg_buf *be_cfg_buf); + td_s32 (*pfn_isp_drv_hold_busy_be_buf)(ot_vi_pipe vi_pipe, isp_be_wo_cfg_buf *be_cfg_buf); + td_s32 (*pfn_isp_drv_get_be_sync_para)(ot_vi_pipe vi_pipe, const ot_video_frame_info *frame_info, + isp_be_sync_para *be_sync_para); + td_s32 (*pfn_isp_drv_set_be_sync_para)(ot_vi_pipe vi_pipe, void *be_node, isp_be_sync_para *be_sync_para, + isp_aibnr_cfg *ainr_cfg); + td_s32 (*pfn_isp_drv_set_be_format)(ot_vi_pipe vi_pipe, void *be_node, isp_be_format be_format); +#ifdef CONFIG_OT_SNAP_SUPPORT + td_s32 (*pfn_isp_set_pro_enable)(ot_vi_pipe vi_pipe); + td_s32 (*pfn_isp_set_snap_attr)(ot_vi_pipe vi_pipe, const isp_snap_attr *snap_attr); +#endif + td_s32 (*pfn_isp_drv_be_end_int_proc)(ot_vi_pipe vi_pipe); + td_s32 (*pfn_isp_register_sync_task)(ot_vi_pipe vi_pipe, ot_isp_sync_task_node *new_node); + td_s32 (*pfn_isp_unregister_sync_task)(ot_vi_pipe vi_pipe, ot_isp_sync_task_node *del_node); + td_s32 (*pfn_isp_int_bottom_half)(td_s32 irq, void *id); + td_s32 (*pfn_isp_isr)(td_s32 irq, void *id, td_u32 vicap_int_status); + td_s32 (*pfn_isp_get_pub_attr)(ot_vi_pipe vi_pipe, ot_isp_pub_attr *pub_attr); + td_s32 (*pfn_isp_drv_get_fpn_sum)(ot_vi_pipe vi_pipe, td_u64 *fpn_sum, td_phys_addr_t phy_addr); + td_s32 (*pfn_isp_drv_set_online_statistics_stt_addr)(ot_vi_pipe vi_pipe, td_u32 viproc_irq_status); + td_s32 (*pfn_isp_drv_set_online_reg_be)(ot_vi_pipe vi_pipe, td_u64 viproc_irq_status); + td_s32 (*pfn_isp_drv_switch_be_offline_stt_info)(ot_vi_pipe vi_pipe, td_u32 viproc_id, + td_u32 stat_valid); /* viproc frame end */ + td_s32 (*pfn_isp_drv_get_be_offline_stt_addr)(ot_vi_pipe vi_pipe, td_u32 viproc_id, td_u64 pts, + isp_be_offline_stt_buf *be_offline_stt_addr); /* set isp stt addr */ + td_bool (*pfn_isp_drv_is_stitch_sync_lost_frame)(ot_vi_pipe vi_pipe, td_u32 viproc_id); + td_bool (*pfn_isp_drv_get_wbf_en)(ot_vi_pipe vi_pipe); +#ifdef CONFIG_OT_AIBNR_SUPPORT + td_s32 (*pfn_isp_drv_update_aibnr_be_cfg)(ot_vi_pipe vi_pipe, td_void *be_node, isp_aibnr_cfg *ainr_cfg); +#endif +#ifdef CONFIG_OT_AIDRC_SUPPORT + td_s32 (*pfn_isp_drv_update_aidrc_be_cfg)(ot_vi_pipe vi_pipe, td_void *be_node, isp_aidrc_cfg *cfg); +#endif + td_s32 (*pfn_isp_update_pts)(ot_vi_pipe vi_pipe, td_u64 pts); + td_s32 (*pfn_isp_update_fe_pts)(ot_vi_pipe vi_pipe, td_u64 pts); + td_s32 (*pfn_isp_drv_vi_set_frame_info)(ot_vi_pipe vi_pipe, ot_isp_frame_info *isp_frame); + td_s32 (*pfn_isp_drv_get_sync_id)(ot_vi_pipe vi_pipe, const ot_video_frame_info *frame_info, td_bool current_frm, + td_bool before_sns_cfg); + td_s32 (*pfn_isp_drv_set_aibnr_fpn_cor_cfg)(ot_vi_pipe vi_pipe, isp_fpn_cor_reg_cfg *fpn_cor_cfg); + td_s32 (*pfn_isp_drv_get_ai_be_cfg)(ot_vi_pipe vi_pipe, isp_vi_ai_work_param *param, isp_ai_alg_cfg *alg_cfg); + td_s32 (*pfn_isp_drv_set_vicap_int_mask)(ot_vi_pipe vi_pipe, td_bool int0_mask_en); +#ifdef CONFIG_OT_ISP_DETAIL_STATS_SUPPORT + td_s32 (*pfn_isp_drv_get_detail_stats_cfg)(ot_vi_pipe vi_pipe, isp_vi_detail_stats_cfg *cfg); + td_s32 (*pfn_isp_drv_get_detail_stats_alg_ctrl)(ot_vi_pipe vi_pipe, u_isp_viproc_ispbe_ctrl0 *be_ctrl0, + u_isp_viproc_ispbe_ctrl1 *be_ctrl1); +#endif +} isp_export_func; + +#define ckfn_isp() \ + (func_entry(isp_export_func, OT_ID_ISP) != TD_NULL) + +#define ckfn_isp_register_bus_callback() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_bus_callback != TD_NULL) +#define call_isp_register_bus_callback(vi_pipe, type, bus_cb) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_bus_callback(vi_pipe, type, bus_cb) + +#define ckfn_isp_register_piris_callback() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_piris_callback != TD_NULL) +#define call_isp_register_piris_callback(vi_pipe, piris_cb) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_piris_callback(vi_pipe, piris_cb) + + +#define ckfn_isp_get_dcf_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_dcf_info != TD_NULL) +#define call_isp_get_dcf_info(vi_pipe, isp_dcf) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_dcf_info(vi_pipe, isp_dcf) + +#define ckfn_isp_get_frame_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_frame_info != TD_NULL) +#define call_isp_get_frame_info(vi_pipe, isp_frame) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_frame_info(vi_pipe, isp_frame) + +#define ckfn_isp_get_attach_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_attach_info != TD_NULL) +#define call_isp_get_attach_info(vi_pipe, isp_attach_info) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_attach_info(vi_pipe, isp_attach_info) + +#define ckfn_isp_get_color_gamut_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_color_gamut_info != TD_NULL) +#define call_isp_get_color_gamut_info(vi_pipe, isp_color_gamut_info) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_color_gamut_info(vi_pipe, isp_color_gamut_info) + +#define ckfn_isp_get_dng_image_dynamic_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_dng_image_dynamic_info != TD_NULL) +#define call_isp_get_dng_image_dynamic_info(vi_pipe, dng_image_dynamic_info) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_dng_image_dynamic_info(vi_pipe, dng_image_dynamic_info) + +#define ckfn_isp_set_pro_enable() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_enable != TD_NULL) +#define call_isp_set_pro_enable(vi_pipe) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_enable(vi_pipe) + +#define ckfn_isp_drv_get_be_offline_addr_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_offline_addr_info != TD_NULL) +#define call_isp_drv_get_be_offline_addr_info(vi_pipe, be_offline_addr) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_offline_addr_info(vi_pipe, be_offline_addr) + +#define ckfn_isp_drv_get_ready_be_buf() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_ready_be_buf != TD_NULL) +#define call_isp_drv_get_ready_be_buf(vi_pipe, be_cfg_buf) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_ready_be_buf(vi_pipe, be_cfg_buf) + +#define ckfn_isp_drv_put_free_be_buf() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_put_free_be_buf != TD_NULL) +#define call_isp_drv_put_free_be_buf(vi_pipe, be_cfg_buf) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_put_free_be_buf(vi_pipe, be_cfg_buf) + +#define ckfn_isp_drv_hold_busy_be_buf() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_hold_busy_be_buf != TD_NULL) +#define call_isp_drv_hold_busy_be_buf(vi_pipe, be_cfg_buf) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_hold_busy_be_buf(vi_pipe, be_cfg_buf) + +#define ckfn_isp_drv_get_be_sync_para() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_sync_para != TD_NULL) +#define call_isp_drv_get_be_sync_para(vi_pipe, frame_info, be_sync_para) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_sync_para(vi_pipe, frame_info, be_sync_para) + +#define ckfn_isp_drv_set_be_sync_para() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_be_sync_para != TD_NULL) +#define call_isp_drv_set_be_sync_para(vi_pipe, be_node, be_sync_para, aibnr_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_be_sync_para(vi_pipe, be_node, be_sync_para, aibnr_cfg) + +#define ckfn_isp_drv_set_be_format() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_be_format != TD_NULL) +#define call_isp_drv_set_be_format(vi_pipe, be_node, be_format) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_be_format(vi_pipe, be_node, be_format) + +#define ckfn_isp_set_snap_attr() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_snap_attr != TD_NULL) +#define call_isp_set_snap_attr(vi_pipe, snap_attr) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_snap_attr(vi_pipe, snap_attr) + +#define ckfn_isp_set_pro_nr_param() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_nr_param != TD_NULL) +#define call_isp_set_pro_nr_param(vi_pipe, pro_nr_param) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_nr_param(vi_pipe, pro_nr_param) +#define ckfn_isp_set_pro_shp_param() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_shp_param != TD_NULL) +#define call_isp_set_pro_shp_param(vi_pipe, pro_shp_param) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_set_pro_shp_param(vi_pipe, pro_shp_param) +#define ckfn_isp_get_pro_nr_param() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pro_nr_param != TD_NULL) +#define call_isp_get_pro_nr_param(vi_pipe, pro_nr_param) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pro_nr_param(vi_pipe, pro_nr_param) +#define ckfn_isp_get_pro_shp_param() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pro_shp_param != TD_NULL) +#define call_isp_get_pro_shp_param(vi_pipe, pro_shp_param) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pro_shp_param(vi_pipe, pro_shp_param) +#define ckfn_isp_drv_be_end_int_proc() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_be_end_int_proc != TD_NULL) +#define call_isp_drv_be_end_int_proc(vi_pipe) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_be_end_int_proc(vi_pipe) + +#define ckfn_isp_get_pub_attr() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pub_attr != TD_NULL) +#define call_isp_get_pub_attr(vi_pipe, pub_attr) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_get_pub_attr(vi_pipe, pub_attr) + +#define ckfn_isp_register_sync_task() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_sync_task != TD_NULL) +#define call_isp_register_sync_task(vi_pipe, node) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_register_sync_task(vi_pipe, node) + +#define ckfn_isp_unregister_sync_task() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_unregister_sync_task != TD_NULL) +#define call_isp_unregister_sync_task(vi_pipe, node) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_unregister_sync_task(vi_pipe, node) + +#define ckfn_isp_int_bottom_half() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_int_bottom_half != TD_NULL) +#define call_isp_int_bottom_half(irq, id) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_int_bottom_half(irq, id) + +#define ckfn_isp_isr() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_isr != TD_NULL) +#define call_isp_isr(irq, id, vicap_int_status) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_isr(irq, id, vicap_int_status) + +#define ckfn_isp_get_fpn_sum() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_fpn_sum != TD_NULL) +#define call_isp_get_fpn_sum(vi_pipe, fpn_sum, phys_addr) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_fpn_sum(vi_pipe, fpn_sum, phys_addr) + +#define ckfn_isp_drv_set_online_statistics_stt_addr() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_online_statistics_stt_addr != TD_NULL) +#define call_isp_drv_set_online_statistics_stt_addr(vi_pipe, proc_irq_status) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_online_statistics_stt_addr(vi_pipe, proc_irq_status) + +#define ckfn_isp_drv_set_online_reg_be() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_online_reg_be != TD_NULL) +#define call_isp_drv_set_online_reg_be(vi_pipe, proc_irq_status) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_online_reg_be(vi_pipe, proc_irq_status) + +#define ckfn_isp_drv_switch_be_stt_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_switch_be_offline_stt_info != TD_NULL) +#define call_isp_drv_switch_be_stt_info(vi_pipe, viproc_id, stat_valid) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_switch_be_offline_stt_info(vi_pipe, viproc_id, stat_valid) + +#define ckfn_isp_drv_get_be_offline_stt_addr() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_offline_stt_addr != TD_NULL) +#define call_isp_drv_get_be_offline_stt_addr(vi_pipe, viproc_id, pts, stt_addr) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_be_offline_stt_addr(vi_pipe, viproc_id, pts, stt_addr) + +#define ckfn_isp_drv_is_stitch_sync_lost_frame() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_is_stitch_sync_lost_frame != TD_NULL) +#define call_isp_drv_is_stitch_sync_lost_frame(vi_pipe, viproc_id) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_is_stitch_sync_lost_frame(vi_pipe, viproc_id) + +#define ckfn_isp_drv_get_wbf_en() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_wbf_en != TD_NULL) +#define call_isp_drv_get_wbf_en(vi_pipe) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_wbf_en(vi_pipe) +#ifdef CONFIG_OT_AIBNR_SUPPORT +#define ckfn_isp_drv_update_aibnr_be_cfg() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_update_aibnr_be_cfg != TD_NULL) +#define call_isp_drv_update_aibnr_be_cfg(vi_pipe, be_node, hnr_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_update_aibnr_be_cfg(vi_pipe, be_node, hnr_cfg) +#endif +#ifdef CONFIG_OT_AIDRC_SUPPORT +#define ckfn_isp_drv_update_aidrc_be_cfg() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_update_aidrc_be_cfg != TD_NULL) +#define call_isp_drv_update_aidrc_be_cfg(vi_pipe, be_node, cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_update_aidrc_be_cfg(vi_pipe, be_node, cfg) +#endif + +#define ckfn_isp_drv_set_aibnr_fpn_cor_cfg() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_aibnr_fpn_cor_cfg != TD_NULL) +#define call_isp_drv_set_aibnr_fpn_cor_cfg(vi_pipe, fpn_cor_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_aibnr_fpn_cor_cfg(vi_pipe, fpn_cor_cfg) + +#define OT_ISP_SYNC_TASK_ID_MAX_LENGTH 64 + +#define ckfn_isp_update_frame_pts() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_update_pts != TD_NULL) +#define call_isp_update_frame_pts(vi_pipe, pts) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_update_pts(vi_pipe, pts) + +#define ckfn_isp_update_frame_fe_pts() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_update_fe_pts != TD_NULL) +#define call_isp_update_frame_fe_pts(vi_pipe, pts) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_update_fe_pts(vi_pipe, pts) +#define ckfn_isp_drv_vi_set_frame_info() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_vi_set_frame_info != TD_NULL) +#define call_isp_drv_vi_set_frame_info(vi_pipe, isp_frame) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_vi_set_frame_info(vi_pipe, isp_frame) + + +#define ckfn_isp_drv_get_sync_id() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_sync_id != TD_NULL) +#define call_isp_drv_get_sync_id(vi_pipe, frame_info, is_current_frm, before_sns_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_sync_id(vi_pipe, frame_info, is_current_frm, before_sns_cfg) + +#define ckfn_isp_drv_get_ai_be_cfg_pos() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_ai_be_cfg != TD_NULL) +#define call_isp_drv_get_ai_be_cfg_pos(vi_pipe, work_mode, alg_ctrl_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_ai_be_cfg(vi_pipe, work_mode, alg_ctrl_cfg) + +#define ckfn_isp_drv_set_vicap_int_mask() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_vicap_int_mask != TD_NULL) +#define call_isp_drv_set_vicap_int_mask(vi_pipe, int0_mask_en) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_set_vicap_int_mask(vi_pipe, int0_mask_en) +#ifdef CONFIG_OT_ISP_DETAIL_STATS_SUPPORT +#define ckfn_isp_drv_get_detail_stats_cfg() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_detail_stats_cfg != TD_NULL) +#define call_isp_drv_get_detail_stats_cfg(vi_pipe, detail_stats_cfg) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_detail_stats_cfg(vi_pipe, detail_stats_cfg) + +#define ckfn_isp_drv_get_detail_stats_alg_ctrl() \ + (func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_detail_stats_alg_ctrl != TD_NULL) +#define call_isp_drv_get_detail_stats_alg_ctrl(vi_pipe, be_ctrl0, be_ctrl1) \ + func_entry(isp_export_func, OT_ID_ISP)->pfn_isp_drv_get_detail_stats_alg_ctrl(vi_pipe, be_ctrl0, be_ctrl1) +#endif +td_s32 ot_isp_sync_task_register(ot_vi_pipe vi_pipe, ot_isp_sync_task_node *new_node); +td_s32 ot_isp_sync_task_unregister(ot_vi_pipe vi_pipe, ot_isp_sync_task_node *del_node); + +td_s32 isp_set_smart_info(ot_vi_pipe vi_pipe, const ot_isp_smart_info *smart_info); +td_s32 isp_get_smart_info(ot_vi_pipe vi_pipe, ot_isp_smart_info *smart_info); + +td_void *isp_get_export_func(td_void); +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys.h b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys.h new file mode 100644 index 0000000..4918e68 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys.h @@ -0,0 +1,83 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_SYS_H +#define OT_MPI_SYS_H + +#include "ot_type.h" +#include "ot_common.h" +#include "ot_common_sys.h" +#include "ot_debug.h" + +#ifdef __cplusplus +extern "C" { +#endif + +td_s32 ot_mpi_log_set_level_cfg(const ot_log_level_cfg *level_cfg); +td_s32 ot_mpi_log_get_level_cfg(ot_log_level_cfg *level_cfg); + +td_s32 ot_mpi_log_set_wait_flag(td_bool flag); +td_s32 ot_mpi_log_read(td_char *buf, td_u32 size); +td_void ot_mpi_log_close(td_void); + +td_s32 ot_mpi_sys_init(td_void); +td_s32 ot_mpi_sys_exit(td_void); + +td_s32 ot_mpi_sys_set_cfg(const ot_mpp_sys_cfg *sys_cfg); +td_s32 ot_mpi_sys_get_cfg(ot_mpp_sys_cfg *sys_cfg); + +td_s32 ot_mpi_sys_get_version(ot_mpp_version *version); + +td_s32 ot_mpi_sys_get_cur_pts(td_u64 *cur_pts); +td_s32 ot_mpi_sys_init_pts_base(td_u64 pts_base); +td_s32 ot_mpi_sys_sync_pts(td_u64 pts_base); + +td_s32 ot_mpi_sys_close_fd(td_void); + +td_s32 ot_mpi_sys_set_mem_cfg(const ot_mpp_chn *mpp_chn, const td_char *mmz_name); +td_s32 ot_mpi_sys_get_mem_cfg(const ot_mpp_chn *mpp_chn, td_char *mmz_name); + +td_s32 ot_mpi_sys_set_scale_coef_level(const ot_scale_range *scale_range, + const ot_scale_coef_level *scale_coef_level); +td_s32 ot_mpi_sys_get_scale_coef_level(const ot_scale_range *scale_range, ot_scale_coef_level *scale_coef_level); + +td_s32 ot_mpi_sys_set_time_zone(td_s32 time_zone); +td_s32 ot_mpi_sys_get_time_zone(td_s32 *time_zone); + +td_s32 ot_mpi_sys_set_gps_info(const ot_gps_info *gps_info); +td_s32 ot_mpi_sys_get_gps_info(ot_gps_info *gps_info); + +td_s32 ot_mpi_sys_set_vi_vpss_mode(const ot_vi_vpss_mode *vi_vpss_mode); +td_s32 ot_mpi_sys_get_vi_vpss_mode(ot_vi_vpss_mode *vi_vpss_mode); + +td_s32 ot_mpi_sys_set_vi_aiisp_mode(ot_vi_pipe vi_pipe, ot_vi_aiisp_mode aiisp_mode); +td_s32 ot_mpi_sys_get_vi_aiisp_mode(ot_vi_pipe vi_pipe, ot_vi_aiisp_mode *aiisp_mode); + +td_s32 ot_mpi_sys_get_chip_id(td_u32 *chip_id); +td_s32 ot_mpi_sys_get_custom_code(td_u32 *custom_code); +td_s32 ot_mpi_sys_get_unique_id(ot_unique_id *unique_id); + +td_s32 ot_mpi_sys_set_raw_frame_compress_param(const ot_raw_frame_compress_param *compress_param); +td_s32 ot_mpi_sys_get_raw_frame_compress_param(ot_raw_frame_compress_param *compress_param); + +td_s32 ot_mpi_sys_set_tuning_connect(td_s32 connect); +td_s32 ot_mpi_sys_get_tuning_connect(td_s32 *connect); + +td_s32 ot_mpi_sys_set_schedule_mode(const ot_schedule_mode *schedule_mode); +td_s32 ot_mpi_sys_get_schedule_mode(ot_schedule_mode *schedule_mode); + +td_s32 ot_mpi_sys_set_fmu_attr(ot_fmu_id id, const ot_fmu_attr *fmu_attr); +td_s32 ot_mpi_sys_get_fmu_attr(ot_fmu_id id, ot_fmu_attr *fmu_attr); + +td_s32 ot_mpi_sys_set_3dnr_pos(ot_3dnr_pos_type pos); +td_s32 ot_mpi_sys_get_3dnr_pos(ot_3dnr_pos_type *pos); + +td_s32 ot_mpi_sys_start_sync_frame_rate_ctrl(const ot_mpp_chn *src_chn, const ot_mpp_chn *dst_chn); +td_s32 ot_mpi_sys_stop_sync_frame_rate_ctrl(const ot_mpp_chn *src_chn, const ot_mpp_chn *dst_chn); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* OT_MPI_SYS_H */ diff --git a/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys_mem.h b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys_mem.h new file mode 100644 index 0000000..669aad1 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_sys_mem.h @@ -0,0 +1,51 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_SYS_MEM_H +#define OT_MPI_SYS_MEM_H + +#include "ot_type.h" +#include "ot_common_sys_mem.h" + +#ifdef __cplusplus +extern "C" { +#endif + +td_void *ot_mpi_sys_mmap(td_phys_addr_t phys_addr, td_u32 size); + +td_void *ot_mpi_sys_mmap_cached(td_phys_addr_t phys_addr, td_u32 size); + +td_s32 ot_mpi_sys_munmap(const td_void *virt_addr, td_u32 size); + +/* alloc mmz memory in user context */ +td_s32 ot_mpi_sys_mmz_alloc(td_phys_addr_t *phys_addr, td_void **virt_addr, + const td_char *mmb, const td_char *zone, td_u32 len); + +/* alloc mmz memory with cache in user context */ +td_s32 ot_mpi_sys_mmz_alloc_cached(td_phys_addr_t *phys_addr, td_void **virt_addr, + const td_char *mmb, const td_char *zone, td_u32 len); + +/* free mmz memory in user context */ +td_s32 ot_mpi_sys_mmz_free(td_phys_addr_t phys_addr, const td_void *virt_addr); + +/* flush cache */ +td_s32 ot_mpi_sys_flush_cache(td_phys_addr_t phys_addr, td_void *virt_addr, td_u32 size); + +/* get virtual meminfo according to virtual addr, should be in one process */ +td_s32 ot_mpi_sys_get_virt_mem_info(const td_void *virt_addr, ot_sys_virt_mem_info *mem_info); + +td_s32 ot_mpi_sys_mem_share(const td_void *mem_handle, td_s32 pid); +td_s32 ot_mpi_sys_mem_unshare(const td_void *mem_handle, td_s32 pid); +td_s32 ot_mpi_sys_mem_share_all(const td_void *mem_handle); +td_s32 ot_mpi_sys_mem_unshare_all(const td_void *mem_handle); + +td_s32 ot_mpi_sys_get_mem_info_by_virt(const td_void *virt_addr, ot_sys_mem_info *mem_info); +td_s32 ot_mpi_sys_get_mem_info_by_phys(td_phys_addr_t phys_addr, ot_sys_mem_info *mem_info); +td_s32 ot_mpi_sys_get_mem_info_by_handle(const td_void *mem_handle, ot_sys_mem_info *mem_info); + +#ifdef __cplusplus +} +#endif + +#endif /* OT_MPI_SYS_MEM_H */ diff --git a/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vb.h b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vb.h new file mode 100644 index 0000000..c54cd4b --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vb.h @@ -0,0 +1,63 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_VB_H +#define OT_MPI_VB_H + +#include "ot_common_vb.h" +#include "ot_common_video.h" + +#ifdef __cplusplus +extern "C" { +#endif + +ot_vb_pool ot_mpi_vb_create_pool(const ot_vb_pool_cfg *vb_pool_cfg); +ot_vb_pool ot_mpi_vb_create_ext_pool(const ot_vb_pool_cfg *vb_pool_cfg); +td_s32 ot_mpi_vb_destroy_pool(ot_vb_pool pool); + +ot_vb_blk ot_mpi_vb_get_blk(ot_vb_pool pool, td_u64 blk_size, const td_char *mmz_name); +td_s32 ot_mpi_vb_release_blk(ot_vb_blk vb_blk); + +ot_vb_blk ot_mpi_vb_insert_buf_to_ext_pool(ot_vb_pool pool, td_phys_addr_t phys_addr, td_u64 size, td_bool is_filled); +td_s32 ot_mpi_vb_delete_buf_from_ext_pool(ot_vb_blk block, td_s32 milli_sec); + +ot_vb_blk ot_mpi_vb_phys_addr_to_handle(td_phys_addr_t phys_addr); +td_phys_addr_t ot_mpi_vb_handle_to_phys_addr(ot_vb_blk vb_blk); +ot_vb_pool ot_mpi_vb_handle_to_pool_id(ot_vb_blk vb_blk); + +td_s32 ot_mpi_vb_inquire_user_cnt(ot_vb_blk vb_blk); + +td_s32 ot_mpi_vb_get_supplement_addr(ot_vb_blk vb_blk, ot_video_supplement *supplement); + +td_s32 ot_mpi_vb_set_supplement_cfg(const ot_vb_supplement_cfg *supplement_cfg); +td_s32 ot_mpi_vb_get_supplement_cfg(ot_vb_supplement_cfg *supplement_cfg); + +td_s32 ot_mpi_vb_init(td_void); +td_s32 ot_mpi_vb_exit(td_void); + +td_s32 ot_mpi_vb_set_cfg(const ot_vb_cfg *vb_cfg); +td_s32 ot_mpi_vb_get_cfg(ot_vb_cfg *vb_cfg); + +td_s32 ot_mpi_vb_get_pool_info(ot_vb_pool pool, ot_vb_pool_info *pool_info); + +td_s32 ot_mpi_vb_init_mod_common_pool(ot_vb_uid vb_uid); +td_s32 ot_mpi_vb_exit_mod_common_pool(ot_vb_uid vb_uid); + +td_s32 ot_mpi_vb_set_mod_pool_cfg(ot_vb_uid vb_uid, const ot_vb_cfg *vb_cfg); +td_s32 ot_mpi_vb_get_mod_pool_cfg(ot_vb_uid vb_uid, ot_vb_cfg *vb_cfg); + +td_s32 ot_mpi_vb_get_common_pool_id(ot_vb_common_pools_id *pools_id); +td_s32 ot_mpi_vb_get_mod_common_pool_id(ot_vb_uid vb_uid, ot_vb_common_pools_id *pools_id); + +td_s32 ot_mpi_vb_pool_share(ot_vb_pool pool, td_s32 pid); +td_s32 ot_mpi_vb_pool_unshare(ot_vb_pool pool, td_s32 pid); +td_s32 ot_mpi_vb_pool_share_all(ot_vb_pool pool); +td_s32 ot_mpi_vb_pool_unshare_all(ot_vb_pool pool); + +#ifdef __cplusplus +} +#endif + +#endif /* OT_MPI_VB_H */ + diff --git a/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vi.h b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vi.h new file mode 100644 index 0000000..d86034c --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ext_inc/ot_mpi_vi.h @@ -0,0 +1,186 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_VI_H +#define OT_MPI_VI_H + +#include "ot_common_vi.h" +#include "ot_common_gdc.h" +#include "ot_common_dis.h" +#include "ot_common_vb.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/* device interface */ +td_s32 ot_mpi_vi_set_dev_attr(ot_vi_dev vi_dev, const ot_vi_dev_attr *dev_attr); +td_s32 ot_mpi_vi_get_dev_attr(ot_vi_dev vi_dev, ot_vi_dev_attr *dev_attr); + +td_s32 ot_mpi_vi_set_dev_irq_affinity(ot_vi_dev vi_dev, td_u32 irq_index); +td_s32 ot_mpi_vi_get_dev_irq_affinity(ot_vi_dev vi_dev, td_u32 *irq_index); + +td_s32 ot_mpi_vi_enable_dev(ot_vi_dev vi_dev); +td_s32 ot_mpi_vi_disable_dev(ot_vi_dev vi_dev); + +td_s32 ot_mpi_vi_set_thermo_sns_attr(ot_vi_dev vi_dev, const ot_vi_thermo_sns_attr *sns_attr); +td_s32 ot_mpi_vi_get_thermo_sns_attr(ot_vi_dev vi_dev, ot_vi_thermo_sns_attr *sns_attr); + +td_s32 ot_mpi_vi_enable_dev_send_frame(ot_vi_dev vi_dev); +td_s32 ot_mpi_vi_disable_dev_send_frame(ot_vi_dev vi_dev); +td_s32 ot_mpi_vi_send_dev_frame(ot_vi_dev vi_dev, const ot_video_frame_info *frame_info, td_s32 milli_sec); + +td_s32 ot_mpi_vi_set_dev_timing_attr(ot_vi_dev vi_dev, const ot_vi_dev_timing_attr *timing_attr); +td_s32 ot_mpi_vi_get_dev_timing_attr(ot_vi_dev vi_dev, ot_vi_dev_timing_attr *timing_attr); + +td_s32 ot_mpi_vi_set_dev_data_attr(ot_vi_dev vi_dev, const ot_vi_dev_data_attr *data_attr); +td_s32 ot_mpi_vi_get_dev_data_attr(ot_vi_dev vi_dev, ot_vi_dev_data_attr *data_attr); + +/* vi dev bind pipe interface */ +td_s32 ot_mpi_vi_bind(ot_vi_dev vi_dev, ot_vi_pipe vi_pipe); +td_s32 ot_mpi_vi_unbind(ot_vi_dev vi_dev, ot_vi_pipe vi_pipe); +td_s32 ot_mpi_vi_get_bind_by_dev(ot_vi_dev vi_dev, ot_vi_bind_pipe *bind_pipe); +td_s32 ot_mpi_vi_get_bind_by_pipe(ot_vi_pipe vi_pipe, ot_vi_dev *vi_dev); + +/* WDR fusion group */ +td_s32 ot_mpi_vi_set_wdr_fusion_grp_attr(ot_vi_grp fusion_grp, const ot_vi_wdr_fusion_grp_attr *grp_attr); +td_s32 ot_mpi_vi_get_wdr_fusion_grp_attr(ot_vi_grp fusion_grp, ot_vi_wdr_fusion_grp_attr *grp_attr); + +/* pipe interface */ +td_s32 ot_mpi_vi_create_pipe(ot_vi_pipe vi_pipe, const ot_vi_pipe_attr *pipe_attr); +td_s32 ot_mpi_vi_destroy_pipe(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_vi_set_pipe_attr(ot_vi_pipe vi_pipe, const ot_vi_pipe_attr *pipe_attr); +td_s32 ot_mpi_vi_get_pipe_attr(ot_vi_pipe vi_pipe, ot_vi_pipe_attr *pipe_attr); + +td_s32 ot_mpi_vi_start_pipe(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_vi_stop_pipe(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_vi_set_pipe_3dnr_attr(ot_vi_pipe vi_pipe, const ot_3dnr_attr *attr); +td_s32 ot_mpi_vi_get_pipe_3dnr_attr(ot_vi_pipe vi_pipe, ot_3dnr_attr *attr); + +td_s32 ot_mpi_vi_set_pipe_3dnr_param(ot_vi_pipe vi_pipe, const ot_3dnr_param *param); +td_s32 ot_mpi_vi_get_pipe_3dnr_param(ot_vi_pipe vi_pipe, ot_3dnr_param *param); + +td_s32 ot_mpi_vi_set_pipe_pre_crop(ot_vi_pipe vi_pipe, const ot_crop_info *crop_info); +td_s32 ot_mpi_vi_get_pipe_pre_crop(ot_vi_pipe vi_pipe, ot_crop_info *crop_info); + +td_s32 ot_mpi_vi_set_pipe_post_crop(ot_vi_pipe vi_pipe, const ot_crop_info *crop_info); +td_s32 ot_mpi_vi_get_pipe_post_crop(ot_vi_pipe vi_pipe, ot_crop_info *crop_info); + +td_s32 ot_mpi_vi_set_pipe_frame_dump_attr(ot_vi_pipe vi_pipe, const ot_vi_frame_dump_attr *dump_attr); +td_s32 ot_mpi_vi_get_pipe_frame_dump_attr(ot_vi_pipe vi_pipe, ot_vi_frame_dump_attr *dump_attr); + +td_s32 ot_mpi_vi_get_pipe_frame(ot_vi_pipe vi_pipe, ot_video_frame_info *frame_info, td_s32 milli_sec); +td_s32 ot_mpi_vi_release_pipe_frame(ot_vi_pipe vi_pipe, const ot_video_frame_info *frame_info); + +td_s32 ot_mpi_vi_set_pipe_private_data_dump_attr(ot_vi_pipe vi_pipe, const ot_vi_private_data_dump_attr *dump_attr); +td_s32 ot_mpi_vi_get_pipe_private_data_dump_attr(ot_vi_pipe vi_pipe, ot_vi_private_data_dump_attr *dump_attr); + +td_s32 ot_mpi_vi_get_pipe_private_data(ot_vi_pipe vi_pipe, ot_vi_private_data_info *data_info, td_s32 milli_sec); +td_s32 ot_mpi_vi_release_pipe_private_data(ot_vi_pipe vi_pipe, const ot_vi_private_data_info *data_info); + +td_s32 ot_mpi_vi_set_pipe_param(ot_vi_pipe vi_pipe, const ot_vi_pipe_param *pipe_param); +td_s32 ot_mpi_vi_get_pipe_param(ot_vi_pipe vi_pipe, ot_vi_pipe_param *pipe_param); + +td_s32 ot_mpi_vi_set_pipe_bnr_buf_num(ot_vi_pipe vi_pipe, td_u32 buf_num); +td_s32 ot_mpi_vi_get_pipe_bnr_buf_num(ot_vi_pipe vi_pipe, td_u32 *buf_num); + +td_s32 ot_mpi_vi_set_pipe_frame_source(ot_vi_pipe vi_pipe, const ot_vi_pipe_frame_source frame_source); +td_s32 ot_mpi_vi_get_pipe_frame_source(ot_vi_pipe vi_pipe, ot_vi_pipe_frame_source *frame_source); + +td_s32 ot_mpi_vi_send_pipe_yuv(ot_vi_pipe vi_pipe, const ot_video_frame_info *frame_info, td_s32 milli_sec); +td_s32 ot_mpi_vi_send_pipe_raw(ot_vi_pipe vi_pipe, + const ot_video_frame_info *frame_info[], td_u32 frame_num, + td_s32 milli_sec); + +td_s32 ot_mpi_vi_query_pipe_status(ot_vi_pipe vi_pipe, ot_vi_pipe_status *pipe_status); + +td_s32 ot_mpi_vi_enable_pipe_interrupt(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_vi_disable_pipe_interrupt(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_vi_set_pipe_vc_number(ot_vi_pipe vi_pipe, td_u32 vc_number); +td_s32 ot_mpi_vi_get_pipe_vc_number(ot_vi_pipe vi_pipe, td_u32 *vc_number); + +td_s32 ot_mpi_vi_set_pipe_low_delay(ot_vi_pipe vi_pipe, const ot_low_delay_info *low_delay_info); +td_s32 ot_mpi_vi_get_pipe_low_delay(ot_vi_pipe vi_pipe, ot_low_delay_info *low_delay_info); + +td_s32 ot_mpi_vi_set_pipe_frame_interrupt_attr(ot_vi_pipe vi_pipe, const ot_frame_interrupt_attr *interrupt_attr); +td_s32 ot_mpi_vi_get_pipe_frame_interrupt_attr(ot_vi_pipe vi_pipe, ot_frame_interrupt_attr *interrupt_attr); + +td_s32 ot_mpi_vi_get_pipe_compress_param(ot_vi_pipe vi_pipe, ot_vi_compress_param *compress_param); + +td_s32 ot_mpi_vi_set_pipe_user_pic(ot_vi_pipe vi_pipe, const ot_video_frame_info *user_pic_info); +td_s32 ot_mpi_vi_enable_pipe_user_pic(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_vi_disable_pipe_user_pic(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_vi_set_pipe_vb_src(ot_vi_pipe vi_pipe, ot_vb_src vb_src); +td_s32 ot_mpi_vi_get_pipe_vb_src(ot_vi_pipe vi_pipe, ot_vb_src *vb_src); + +td_s32 ot_mpi_vi_attach_pipe_vb_pool(ot_vi_pipe vi_pipe, ot_vb_pool vb_pool); +td_s32 ot_mpi_vi_detach_pipe_vb_pool(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_vi_attach_aiisp_vb_pool(ot_vi_pipe vi_pipe, ot_aiisp_pool *pool_attr); +td_s32 ot_mpi_vi_detach_aiisp_vb_pool(ot_vi_pipe vi_pipe, ot_aiisp_type aiisp_type); + +td_s32 ot_mpi_vi_get_pipe_fd(ot_vi_pipe vi_pipe); + +/* channel interface */ +td_s32 ot_mpi_vi_set_chn_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_vi_chn_attr *chn_attr); +td_s32 ot_mpi_vi_get_chn_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vi_chn_attr *chn_attr); + +td_s32 ot_mpi_vi_enable_chn(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); +td_s32 ot_mpi_vi_disable_chn(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); + +td_s32 ot_mpi_vi_set_chn_crop(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_vi_crop_info *crop_info); +td_s32 ot_mpi_vi_get_chn_crop(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vi_crop_info *crop_info); + +td_s32 ot_mpi_vi_set_chn_dis_cfg(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_dis_cfg *dis_cfg); +td_s32 ot_mpi_vi_get_chn_dis_cfg(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_dis_cfg *dis_cfg); +td_s32 ot_mpi_vi_set_chn_dis_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_dis_attr *dis_attr); +td_s32 ot_mpi_vi_get_chn_dis_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_dis_attr *dis_attr); +td_s32 ot_mpi_vi_get_chn_dis_out_size(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_size *out_size); +td_s32 ot_mpi_vi_set_chn_dis_param(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_dis_param *dis_param); +td_s32 ot_mpi_vi_get_chn_dis_param(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_dis_param *dis_param); +td_s32 ot_mpi_vi_set_chn_dis_alg_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_dis_alg_attr *dis_alg_attr); +td_s32 ot_mpi_vi_get_chn_dis_alg_attr(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_dis_alg_attr *dis_alg_attr); + +td_s32 ot_mpi_vi_get_chn_frame(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_video_frame_info *frame_info, + td_s32 milli_sec); +td_s32 ot_mpi_vi_release_chn_frame(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_video_frame_info *frame_info); + +td_s32 ot_mpi_vi_set_chn_low_delay(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, const ot_low_delay_info *low_delay_info); +td_s32 ot_mpi_vi_get_chn_low_delay(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_low_delay_info *low_delay_info); + +td_s32 ot_mpi_vi_set_chn_align(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, td_u32 align); +td_s32 ot_mpi_vi_get_chn_align(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, td_u32 *align); + +td_s32 ot_mpi_vi_set_chn_fmu_mode(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_fmu_mode fmu_mode); +td_s32 ot_mpi_vi_get_chn_fmu_mode(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_fmu_mode *fmu_mode); + +td_s32 ot_mpi_vi_set_chn_vb_src(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vb_src vb_src); +td_s32 ot_mpi_vi_get_chn_vb_src(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vb_src *vb_src); + +td_s32 ot_mpi_vi_attach_chn_vb_pool(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vb_pool vb_pool); +td_s32 ot_mpi_vi_detach_chn_vb_pool(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); + +td_s32 ot_mpi_vi_query_chn_status(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn, ot_vi_chn_status *chn_status); + +td_s32 ot_mpi_vi_get_chn_fd(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); + +/* stitch group interface */ +td_s32 ot_mpi_vi_set_stitch_grp_attr(ot_vi_grp stitch_grp, const ot_vi_stitch_grp_attr *stitch_grp_attr); +td_s32 ot_mpi_vi_get_stitch_grp_attr(ot_vi_grp stitch_grp, ot_vi_stitch_grp_attr *stitch_grp_attr); + +/* vi module interface */ +td_s32 ot_mpi_vi_set_mod_param(const ot_vi_mod_param *mod_param); +td_s32 ot_mpi_vi_get_mod_param(ot_vi_mod_param *mod_param); + +td_s32 ot_mpi_vi_enable_chn_motion_denoise(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); +td_s32 ot_mpi_vi_disable_chn_motion_denoise(ot_vi_pipe vi_pipe, ot_vi_chn vi_chn); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* OT_MPI_VI_H */ \ No newline at end of file diff --git a/libraries/isp/include/hi3519dv500/ot_common_3a.h b/libraries/isp/include/hi3519dv500/ot_common_3a.h new file mode 100644 index 0000000..2f9534c --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_common_3a.h @@ -0,0 +1,500 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_3A_H +#define OT_COMMON_3A_H + +#include "ot_common.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" +#include "ot_common_video.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define is_linear_mode(mode) ((mode) == OT_WDR_MODE_NONE) +#define is_wdr_mode(mode) ((!is_linear_mode(mode)) && ((mode) < OT_WDR_MODE_BUTT)) +#define is_hdr_mode(mode) (((mode) > OT_DYNAMIC_RANGE_SDR10) && ((mode) < OT_DYNAMIC_RANGE_BUTT)) +#define is_built_in_wdr_mode(mode) ((mode) == OT_WDR_MODE_BUILT_IN) +#define is_fs_wdr_mode(mode) ((!is_linear_mode(mode)) && (!is_built_in_wdr_mode(mode)) && \ + ((mode) < OT_WDR_MODE_BUTT)) +#define is_2to1_wdr_mode(mode) (((mode) == OT_WDR_MODE_2To1_FRAME) || \ + ((mode) == OT_WDR_MODE_2To1_LINE) || ((mode) == OT_WDR_MODE_QUADRA)) +#define is_3to1_wdr_mode(mode) (((mode) == OT_WDR_MODE_3To1_FRAME) || ((mode) == OT_WDR_MODE_3To1_LINE)) +#define is_4to1_wdr_mode(mode) (((mode) == OT_WDR_MODE_4To1_FRAME) || ((mode) == OT_WDR_MODE_4To1_LINE)) +#define is_full_wdr_mode(mode) 0 + +#define is_half_wdr_mode(mode) (((mode) == OT_WDR_MODE_2To1_FRAME) || ((mode) == OT_WDR_MODE_3To1_FRAME) || \ + ((mode) == OT_WDR_MODE_4To1_FRAME)) +#define is_line_wdr_mode(mode) (((mode) == OT_WDR_MODE_2To1_LINE) || ((mode) == OT_WDR_MODE_3To1_LINE) || \ + ((mode) == OT_WDR_MODE_4To1_LINE) || ((mode) == OT_WDR_MODE_QUADRA)) + +#define is_stitch_main_pipe(vi_pipe, main_pipe) ((vi_pipe) == (main_pipe)) +#define is_offline_mode(mode) ((mode) == ISP_MODE_RUNNING_OFFLINE) +#define is_online_mode(mode) ((mode) == ISP_MODE_RUNNING_ONLINE) +#define is_sidebyside_mode(mode) ((mode) == ISP_MODE_RUNNING_SIDEBYSIDE) +#define is_striping_mode(mode) ((mode) == ISP_MODE_RUNNING_STRIPING) +#define is_pre_online_post_offline(mode) ((mode) == ISP_MODE_RUNNING_PRE_ONLINE_POST_OFFLINE) +#define is_virt_pipe(vi_pipe) (((vi_pipe) >= OT_ISP_MAX_PHY_PIPE_NUM) && ((vi_pipe) < OT_ISP_MAX_PIPE_NUM)) +#define is_no_fe_pipe(vi_pipe) (((vi_pipe) >= OT_ISP_MAX_FE_PIPE_NUM) && ((vi_pipe) < OT_ISP_MAX_PIPE_NUM)) +#define is_no_fe_phy_pipe(vi_pipe) (((vi_pipe) >= OT_ISP_MAX_FE_PIPE_NUM) && ((vi_pipe) < OT_ISP_MAX_PHY_PIPE_NUM)) + +#define OT_ISP_MAX_REGISTER_ALG_LIB_NUM 2 +#define OT_ISP_THERMO_FUSION_CURVE_NUM 1025 + +typedef enum { + OT_ISP_ALG_AE = 0, + OT_ISP_ALG_AF, + OT_ISP_ALG_AWB, + OT_ISP_ALG_BLC, + OT_ISP_ALG_DP, + OT_ISP_ALG_PREGAMMA, + OT_ISP_ALG_DRC, + OT_ISP_ALG_DEMOSAIC, + OT_ISP_ALG_ANTIFALSECOLOR, + OT_ISP_ALG_GAMMA, + OT_ISP_ALG_GE, + OT_ISP_ALG_SHARPEN, + OT_ISP_ALG_FRAMEWDR, + OT_ISP_ALG_FPN, + OT_ISP_ALG_DEHAZE, + OT_ISP_ALG_LCAC, + OT_ISP_ALG_CAC, + OT_ISP_ALG_BSHP, + OT_ISP_ALG_CSC, + OT_ISP_ALG_EXPANDER, + OT_ISP_ALG_MCDS, + OT_ISP_ALG_ACS, + OT_ISP_ALG_LSC, + OT_ISP_ALG_RC, + OT_ISP_ALG_RGBIR, + OT_ISP_ALG_HRS, + OT_ISP_ALG_DG, + OT_ISP_ALG_BAYERNR, + OT_ISP_ALG_FLICKER, + OT_ISP_ALG_LDCI, + OT_ISP_ALG_CA, + OT_ISP_ALG_CLUT, + OT_ISP_ALG_CCM, + OT_ISP_ALG_AI, + OT_ISP_ALG_CRB, + OT_ISP_ALG_HNR, + OT_ISP_ALG_LBLC, + OT_ISP_ALG_MOD_BUTT, +} ot_isp_alg_mod; + +typedef enum { + OT_ISP_WDR_MODE_SET = 8000, + OT_ISP_PROC_WRITE, + + OT_ISP_AE_FPS_BASE_SET, + OT_ISP_AE_BLC_SET, + OT_ISP_AE_RC_SET, + OT_ISP_AE_BAYER_FORMAT_SET, + OT_ISP_AE_INIT_INFO_GET, + + OT_ISP_AWB_ISO_SET, /* set iso, change saturation when iso change */ + OT_ISP_CHANGE_IMAGE_MODE_SET, + OT_ISP_UPDATE_INFO_GET, + OT_ISP_FRAMEINFO_GET, + OT_ISP_ATTACHINFO_GET, + OT_ISP_COLORGAMUTINFO_GET, + OT_ISP_AWB_INTTIME_SET, + OT_ISP_BAS_MODE_SET, + OT_ISP_PROTRIGGER_SET, + OT_ISP_AWB_PIRIS_SET, + OT_ISP_AWB_SNAP_MODE_SET, + OT_ISP_AWB_ZONE_ROW_SET, + OT_ISP_AWB_ZONE_COL_SET, + OT_ISP_AWB_ZONE_BIN_SET, + OT_ISP_AWB_ERR_GET, + + OT_ISP_DEHAZE_DEBUG_ATTR_SET, + OT_ISP_AE_DEBUG_ATTR_SET, + OT_ISP_CTRL_CMD_BUTT, +} ot_isp_ctrl_cmd; + +typedef struct { + td_char *proc_buff; + td_u32 buff_len; + size_t write_len; /* the len count should contain '\0'. */ +} ot_isp_ctrl_proc_write; + +typedef struct { + td_bool stitch_enable; + td_bool main_pipe; + td_u8 stitch_pipe_num; + td_s8 stitch_bind_id[OT_ISP_MAX_STITCH_NUM]; +} ot_isp_stitch_attr; + +/* AE */ +/* the init param of ae alg */ +typedef struct { + ot_sensor_id sns_id; + td_u8 wdr_mode; + td_u8 hdr_mode; + td_u16 black_level; + td_float fps; + ot_isp_bayer_format bayer; + ot_isp_stitch_attr stitch_attr; + + td_s32 reserved; +} ot_isp_ae_param; + +/* the statistics of ae alg */ +typedef struct { + td_u32 pixel_count[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 pixel_weight[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 histogram_mem_array[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_HIST_NUM]; + td_u32 histogram_mem_array_ir[OT_ISP_HIST_NUM]; /* only support fe0 not support for Hi3519DV500 */ +} ot_isp_fe_ae_stat_1; + +typedef struct { + td_u16 global_avg_r[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u16 global_avg_gr[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u16 global_avg_gb[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u16 global_avg_b[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u16 global_avg_ir; /* only support fe0 not support for Hi3519DV500 */ +} ot_isp_fe_ae_stat_2; + +typedef struct { + td_u16 zone_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; + td_u16 zone_avg_ir[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]; /* only support fe0 not support for Hi3519DV500 */ +} ot_isp_fe_ae_stat_3; + +typedef struct { + td_u16 zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]\ + [OT_ISP_BAYER_CHN_NUM]; +} ot_isp_fe_ae_stitch_stat_3; + +typedef struct { + td_u32 pixel_count; + td_u32 pixel_weight; + td_u32 histogram_mem_array[OT_ISP_HIST_NUM]; + td_u32 estimate_histogram_mem_array[OT_ISP_HIST_NUM]; +} ot_isp_be_ae_stat_1; + +typedef struct { + td_u16 global_avg_r; + td_u16 global_avg_gr; + td_u16 global_avg_gb; + td_u16 global_avg_b; +} ot_isp_be_ae_stat_2; + +typedef struct { + td_u16 zone_avg[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; +} ot_isp_be_ae_stat_3; + +typedef struct { + td_u16 zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; +} ot_isp_be_ae_stitch_stat_3; + +typedef struct { + td_u32 frame_cnt; /* the counting of frame */ + td_u64 frame_pts; + td_u16 frame_width; + td_u16 frame_height; + ot_isp_smart_info smart_info; + + ot_isp_fe_ae_stat_1 *fe_ae_stat1; + ot_isp_fe_ae_stat_2 *fe_ae_stat2; + ot_isp_fe_ae_stat_3 *fe_ae_stat3; + ot_isp_fe_ae_stitch_stat_3 *fe_ae_sti_stat; + ot_isp_be_ae_stat_1 *be_ae_stat1; + ot_isp_be_ae_stat_2 *be_ae_stat2; + ot_isp_be_ae_stat_3 *be_ae_stat3; + ot_isp_be_ae_stitch_stat_3 *be_ae_sti_stat; +} ot_isp_ae_info; + +typedef struct { + td_bool change; + + td_bool hist_adjust; + td_u8 ae_be_sel; + td_u8 four_plane_mode; + td_u8 hist_offset_x; + td_u8 hist_offset_y; + td_u8 hist_skip_x; + td_u8 hist_skip_y; + + td_bool mode_update; + td_u8 hist_mode; + td_u8 aver_mode; + td_u8 max_gain_mode; + + td_bool wight_table_update; + td_u8 weight_table[OT_VI_MAX_PIPE_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]; +} ot_isp_ae_stat_attr; + +typedef struct { + td_u8 dark_throw_ratio; /* R; Range:[1, 100]; Format:8.0; */ + td_u8 bright_throw_ratio; /* R; Range:[1, 100]; Format:8.0; */ + td_u32 bright_compensation; /* R; Range:[0, 16383]; Format:32.0; */ + td_u32 isp_dgain; /* R; Range:[0x400, 0x40000]; Format:22.10; */ + td_u32 blc; /* R; Range:[0, 16383]; Format:32.0; */ + td_u32 iso; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + td_u16 tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM]; /* R; Range:[0, 65535]; Format:16.0; */ +} ot_isp_thermo_info; + +typedef struct { + td_u16 clip; /* RW; Range:[1, 4096] */ + td_u8 fusion_ratio; /* RW; Range:[0, 100] */ + td_u16 fusion_curve_value[OT_ISP_GAMMA_NODE_NUM]; /* RW; Range:[0, 4095] */ +} ot_isp_thermo_curve_attr; + +typedef struct { + td_u32 int_time; + td_u8 run_interval; + td_u32 iso; + td_u32 isp_dgain; + td_u32 dc; + td_u16 tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM]; +} ot_isp_thermo_result; + +typedef struct { + td_u32 blc; /* RW; Range:[0, 16383]; Format:32.0; */ + td_u32 isp_dgain; /* RW; Range:[0x400, 0x40000]; Format:22.10; */ +} ot_isp_thermo_manual_attr; + +typedef struct { + td_bool bypass; /* RW; Range:[0, 1]; Format:1.0; */ + ot_op_mode op_type; + ot_isp_thermo_manual_attr manual_attr; + td_u8 thermo_run_interval; /* RW; Range:[1, 255]; Format:8.0; */ + td_u8 dark_throw_ratio; /* RW; Range:[1, 100]; Format:8.0; */ + td_u8 bright_throw_ratio; /* RW; Range:[1, 100]; Format:8.0; */ + td_u32 bright_compensation; /* RW; Range:[0, 16383]; Format:32.0; */ +} ot_isp_thermo_attr; + +/* the final calculate of ae alg */ +#define AE_INT_TIME_NUM 4 +typedef struct { + td_u32 int_time[AE_INT_TIME_NUM]; + td_u32 isp_dgain; + td_u32 again; + td_u32 dgain; + td_u32 iso; + td_u32 isp_dgain_sf; + td_u32 again_sf; + td_u32 dgain_sf; + td_u32 iso_sf; + td_u8 ae_run_interval; + + td_bool piris_valid; + td_s32 piris_pos; + td_u32 piris_gain; + td_u32 sns_lhcg_exp_ratio; + + ot_isp_fswdr_mode fswdr_mode; + td_u32 wdr_gain[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 hmax_times; /* unit is ns */ + td_u32 vmax; /* unit is line */ + + ot_isp_ae_stat_attr stat_attr; + ot_isp_dcf_update_info update_info; +} ot_isp_ae_result; + +typedef struct { + td_u32 isp_dgain; + td_u32 iso; +} ot_isp_ae_init_info; + +typedef struct { + td_s32 (*pfn_ae_init)(td_s32 handle, const ot_isp_ae_param *ae_param); + td_s32 (*pfn_ae_run)(td_s32 handle, + const ot_isp_ae_info *ae_info, + ot_isp_ae_result *ae_result, + td_s32 reserved); + td_s32 (*pfn_thermo_run)(td_s32 handle, + const ot_isp_ae_info *ae_info, + ot_isp_thermo_result *thermo_result, + td_s32 reserved); + td_s32 (*pfn_ae_ctrl)(td_s32 handle, td_u32 cmd, td_void *value); + td_s32 (*pfn_ae_exit)(td_s32 handle); +} ot_isp_ae_exp_func; + +typedef struct { + ot_isp_ae_exp_func ae_exp_func; +} ot_isp_ae_register; + +/* AWB */ +typedef enum { + OT_ISP_AWB_CCM_CONFIG_SET, + OT_ISP_AWB_CCM_CONFIG_GET, + + OT_ISP_AWB_DEBUG_ATTR_SET, + + OT_ISP_AWB_CTRL_BUTT, +} ot_isp_awb_ctrl_cmd; + +typedef struct { + td_bool awb_bypass_en; + td_bool manual_sat_en; + td_bool manual_temp_en; + + td_u32 manual_sat_value; + td_u32 manual_temp_value; + td_u16 ccm_speed; + + td_u16 high_ccm[OT_ISP_CCM_MATRIX_SIZE]; + td_u16 low_ccm[OT_ISP_CCM_MATRIX_SIZE]; + td_u16 high_color_temp; + td_u16 low_color_temp; +} awb_ccm_config; + +/* the init param of awb alg */ +typedef struct { + ot_sensor_id sns_id; + td_u8 wdr_mode; + td_u8 awb_zone_row; + td_u8 awb_zone_col; + td_u8 awb_zone_bin; + ot_isp_stitch_attr stitch_attr; + td_u16 awb_width; + td_u16 awb_height; + td_u32 init_iso; + td_s8 reserved; +} ot_isp_awb_param; + +/* the statistics of awb alg */ +typedef struct { + td_u16 metering_awb_avg_r; + td_u16 metering_awb_avg_g; + td_u16 metering_awb_avg_b; + td_u16 metering_awb_count_all; +} ot_isp_awb_stat_1; + +typedef struct { + td_u16 metering_mem_array_avg_r[OT_ISP_AWB_ZONE_NUM]; + td_u16 metering_mem_array_avg_g[OT_ISP_AWB_ZONE_NUM]; + td_u16 metering_mem_array_avg_b[OT_ISP_AWB_ZONE_NUM]; + td_u16 metering_mem_array_count_all[OT_ISP_AWB_ZONE_NUM]; +} ot_isp_awb_stat_2; + +typedef struct { + td_u16 zone_col; + td_u16 zone_row; + td_u16 zone_bin; + td_u16 metering_mem_array_avg_r[OT_ISP_AWB_ZONE_STITCH_MAX]; + td_u16 metering_mem_array_avg_g[OT_ISP_AWB_ZONE_STITCH_MAX]; + td_u16 metering_mem_array_avg_b[OT_ISP_AWB_ZONE_STITCH_MAX]; + td_u16 metering_mem_array_count_all[OT_ISP_AWB_ZONE_STITCH_MAX]; +} ot_isp_awb_stat_stitch; + +typedef struct { + td_u16 *zone_avg_r; + td_u16 *zone_avg_g; + td_u16 *zone_avg_b; + td_u16 *zone_count; +} ot_isp_awb_stat_result; + +typedef struct { + td_u8 col_start; + td_u8 col_stop; + td_u8 row_start; + td_u8 row_stop; +} ot_isp_awb_overlap_zone; + +typedef struct { + td_u8 stitch_pipe_num; + ot_isp_awb_overlap_zone left_zone_range[OT_ISP_MAX_STITCH_NUM]; + ot_isp_awb_overlap_zone right_zone_range[OT_ISP_MAX_STITCH_NUM]; +} ot_isp_awb_overlap_all_zone; + +typedef struct { + td_u32 frame_cnt; + + ot_isp_awb_stat_1 *awb_stat1; + ot_isp_awb_stat_result awb_stat2; + td_u8 awb_gain_switch; + td_u8 awb_stat_switch; + td_bool wb_gain_in_sns; + td_u32 wdr_wb_gain[OT_ISP_BAYER_CHN_NUM]; + ot_isp_awb_overlap_all_zone overlap_all_zone; +} ot_isp_awb_info; + +/* the statistics's attr of awb alg */ +typedef struct { + td_bool stat_cfg_update; + + td_u16 metering_white_level_awb; + td_u16 metering_black_level_awb; + td_u16 metering_cr_ref_max_awb; + td_u16 metering_cb_ref_max_awb; + td_u16 metering_cr_ref_min_awb; + td_u16 metering_cb_ref_min_awb; +} ot_isp_awb_raw_stat_attr; + +typedef struct { + td_u32 left_overlap_zone_awb[OT_ISP_MAX_STITCH_NUM][OT_ISP_BAYER_CHN_NUM]; + td_u32 right_overlap_zone_awb[OT_ISP_MAX_STITCH_NUM][OT_ISP_BAYER_CHN_NUM]; +} ot_isp_awb_overlap_result; + +/* the final calculate of awb alg */ +typedef struct { + td_u32 white_balance_gain[OT_ISP_BAYER_CHN_NUM]; + td_u16 color_matrix[OT_ISP_CCM_MATRIX_SIZE]; + td_u32 color_temp; + td_u8 saturation; + ot_isp_awb_raw_stat_attr raw_stat_attr; + ot_isp_awb_overlap_result overlap_result; +} ot_isp_awb_result; + +typedef struct { + td_s32 (*pfn_awb_init)(td_s32 handle, const ot_isp_awb_param *awb_param, ot_isp_awb_result *awb_result); + td_s32 (*pfn_awb_run)(td_s32 handle, + const ot_isp_awb_info *awb_info, + ot_isp_awb_result *awb_result, + td_s32 reserved); + td_s32 (*pfn_awb_ctrl)(td_s32 handle, td_u32 cmd, td_void *value); + td_s32 (*pfn_awb_exit)(td_s32 handle); +} ot_isp_awb_exp_func; + +typedef struct { + ot_isp_awb_exp_func awb_exp_func; +} ot_isp_awb_register; + +/* AF */ +/* the statistics of af alg */ +typedef struct { + td_u16 v1; + td_u16 h1; + td_u16 v2; + td_u16 h2; + td_u16 y; + td_u16 hl_cnt; +} ot_isp_af_zone; + +typedef struct { + ot_isp_af_zone zone_metrics[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; + the zoned measure of contrast */ +} ot_isp_fe_af_stat; + +typedef struct { + ot_isp_af_zone zone_metrics[OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; the zoned measure of contrast */ +} ot_isp_be_af_stat; + +#define ALG_LIB_NAME_SIZE_MAX 20 +typedef struct { + td_s32 id; + td_char lib_name[ALG_LIB_NAME_SIZE_MAX]; +} ot_isp_3a_alg_lib; + +typedef struct { + ot_sensor_id sns_id; + ot_isp_3a_alg_lib ae_lib; + ot_isp_3a_alg_lib af_lib; + ot_isp_3a_alg_lib awb_lib; +} ot_isp_bind_attr; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_COMM_3A_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_common_isp.h b/libraries/isp/include/hi3519dv500/ot_common_isp.h new file mode 100644 index 0000000..d983d6b --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_common_isp.h @@ -0,0 +1,3033 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_COMMON_ISP_H +#define OT_COMMON_ISP_H + +#include "ot_type.h" +#include "ot_errno.h" +#include "ot_common.h" +#include "ot_isp_debug.h" +#include "ot_common_video.h" +#include "ot_isp_define.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* MACRO DEFINITION */ +#define ot_isp_res_width_max(dev) (isp_get_max_width(dev)) +#define ot_isp_res_height_max(dev) (isp_get_max_height(dev)) +#define OT_ISP_WIDTH_MIN 120 +#define OT_ISP_HEIGHT_MIN 88 +#define OT_ISP_ALIGN_WIDTH 4 +#define OT_ISP_ALIGN_HEIGHT 4 +#define OT_ISP_FRAME_RATE_MAX 65535.0 + +#define OT_ISP_BE_BUF_NUM_MIN 2 + +#define OT_ISP_VREG_MAX_NUM 16 + +#define OT_ISP_AE_ZONE_ROW 15 +#define OT_ISP_AE_ZONE_COLUMN 17 +#define OT_ISP_AE_PLANE_NUM 4 +#define OT_ISP_MG_ZONE_ROW 15 +#define OT_ISP_MG_ZONE_COLUMN 17 +#define OT_ISP_AWB_ZONE_NUM (OT_ISP_AWB_ZONE_ORIG_ROW * OT_ISP_AWB_ZONE_ORIG_COLUMN) +#define OT_ISP_AWB_ZONE_STITCH_MAX (OT_ISP_AWB_ZONE_NUM * OT_ISP_MAX_STITCH_NUM) +#define OT_ISP_AF_ZONE_ROW 15 +#define OT_ISP_AF_ZONE_COLUMN 17 +#define OT_ISP_MAX_AWB_LIB_NUM (OT_ISP_AWB_LIB_NUM) +#define OT_ISP_MAX_AE_LIB_NUM (OT_ISP_AE_LIB_NUM) + +#define OT_ISP_AE_MIN_WIDTH 256 +#define OT_ISP_AE_MIN_HEIGHT 120 + +#define OT_ISP_AWB_MIN_WIDTH 20 +#define OT_ISP_AWB_MIN_HEIGHT 15 +#define OT_ISP_AWB_ZONE_MAX_WIDTH 1024 +#define OT_ISP_AWB_ZONE_MAX_HEIGHT 1024 + +#define OT_ISP_AF_MIN_WIDTH 256 +#define OT_ISP_AF_MIN_HEIGHT 120 +#define OT_ISP_AF_ALIGN_WIDTH 8 +#define OT_ISP_AF_ALIGN_HEIGHT 2 +#define OT_ISP_AF_PLGS_NUM 2 + +#define OT_ISP_GAMMA_NODE_NUM 1025 +#define OT_ISP_PREGAMMA_NODE_NUM 257 +#define OT_ISP_SCALE_MIN 204 +#define OT_ISP_SCALE_MAX 5120 + +#define OT_ISP_AUTO_ISO_NUM 16 +#define OT_ISP_SHARPEN_LUMA_NUM 32 +#define OT_ISP_SHARPEN_GAIN_NUM 32 + +#define OT_ISP_MAX_SNS_REGS 32 + +#define OT_ISP_MLSC_X_HALF_GRID_NUM ((OT_ISP_LSC_GRID_COL - 1) / 2) +#define OT_ISP_MLSC_Y_HALF_GRID_NUM ((OT_ISP_LSC_GRID_ROW - 1) / 2) +#define OT_ISP_MLSC_GAIN_LUT_NUM 2 +#define OT_ISP_ACS_LIGHT_NUM 32 +#define OT_ISP_ACS_CHN_NUM 2 + +#define OT_ISP_WDR_MAX_FRAME_NUM 4 + +#define OT_ISP_CSC_DC_NUM 3 +#define OT_ISP_CSC_COEF_NUM 9 + +#define OT_ISP_BAYER_CALIBTAION_MAX_NUM 50 +#define OT_ISP_AI_MAX_STEP_FNO_NUM 1024 +#define OT_ISP_BAYER_GE_LUT_NUM 129 + +#define OT_ISP_BAYERNR_LUT_LENGTH 33 +#define OT_ISP_BAYERNR_LUT_LENGTH1 32 +#define OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM 16 +#define OT_ISP_PRO_MAX_FRAME_NUM 8 +#define OT_ISP_RGB_CHN_NUM 3 + +#define OT_ISP_DEMOSAIC_LUT_LENGTH 17 +#define OT_ISP_DEMOSAIC_AIDM_LUT_NUM 128 +#define OT_ISP_BAYER_CHN_NUM 4 +#define OT_ISP_CHN_R 0 +#define OT_ISP_CHN_GR 1 +#define OT_ISP_CHN_GB 2 +#define OT_ISP_CHN_B 3 + +#define OT_ISP_DRC_LMIX_NODE_NUM 33 +#define OT_ISP_DRC_EXP_COMP_SAMPLE_NUM 8 +#define OT_ISP_DRC_SHP_LOG_CONFIG_NUM 16 + +#define OT_ISP_DEHAZE_LUT_SIZE 256 +#define OT_ISP_WDR_RATIO_NUM 10 + +#define OT_ISP_LCAC_EXP_RATIO_NUM 16 +#define OT_ISP_LCAC_DET_NUM 3 + +#define OT_ISP_CAC_EXP_RATIO_NUM 16 +#define OT_ISP_CAC_THR_NUM 2 +#define OT_ISP_CAC_CURVE_NUM 3 + +#define OT_ISP_BSHP_LUMA_WGT_NUM 32 +#define OT_ISP_BSHP_HALF_CURVE_NUM 32 +#define OT_ISP_BSHP_CURVE_NUM 8 +#define OT_ISP_BSHP_THD_NUM 2 + +#define OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE (-2) + +/* DEFAULT VALUE OF GLOBAL REGISTERS DEFINED HERE */ +/* AE */ +#define OT_ISP_TOP_RGGB_START_R_GR_GB_B 0 +#define OT_ISP_TOP_RGGB_START_GR_R_B_GB 1 +#define OT_ISP_TOP_RGGB_START_GB_B_R_GR 2 +#define OT_ISP_TOP_RGGB_START_B_GB_GR_R 3 + +/* AWB */ +#define OT_ISP_AWB_OFFSET_COMP_DEF 0 +#define OT_ISP_CCM_COLORTONE_EN_DEFAULT 1 +#define OT_ISP_CCM_COLORTONE_RGAIN_DEFAULT 256 +#define OT_ISP_CCM_COLORTONE_BGAIN_DEFAULT 256 +#define OT_ISP_CCM_COLORTONE_GGAIN_DEFAULT 256 + +#define OT_ISP_CCM_PROT_EN_DEFAULT 0 +#define OT_ISP_CCM_RECOVER_EN_DEFAULT 1 +#define OT_ISP_CCM_MATRIX_SIZE 9 +#define OT_ISP_CCM_MATRIX_NUM 7 +#ifdef CONFIG_SD3403V100 +#define OT_ISP_DRC_RG_BG_CTR_NODE_NUM 12 +#endif +/* GENERAL STRUCTURES */ +/* + * ISP Error Code + * 0x40 : ISP_NOT_INIT + * 0x41 : ISP_MEM_NOT_INIT + * 0x42 : ISP_ATTR_NOT_CFG + * 0x43 : ISP_SNS_UNREGISTER + * 0x44 : ISP_INVALID_ADDR + * 0x45 : ISP_NOMEM + * 0x46 : ISP_NO_INT + */ +typedef enum { + OT_ERR_ISP_NOT_INIT = 0x40, /* ISP not init */ + OT_ERR_ISP_MEM_NOT_INIT = 0x41, /* ISP memory not init */ + OT_ERR_ISP_ATTR_NOT_CFG = 0x42, /* ISP attribute not cfg */ + OT_ERR_ISP_SNS_UNREGISTER = 0x43, /* ISP sensor unregister */ + OT_ERR_ISP_INVALID_ADDR = 0x44, /* ISP invalid address */ + OT_ERR_ISP_NOMEM = 0x45, /* ISP nomem */ + OT_ERR_ISP_NO_INT = 0x46, /* ISP */ + OT_ERR_ISP_ALG_NOT_INIT = 0x47, /* ISP alg not init */ +} ot_isp_err_code; + +#define OT_ERR_ISP_NULL_PTR OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_NULL_PTR) +#define OT_ERR_ISP_ILLEGAL_PARAM OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ILLEGAL_PARAM) +#define OT_ERR_ISP_NOT_SUPPORT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_SUPPORT) + +#define OT_ERR_ISP_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NOT_INIT) +#define OT_ERR_ISP_MEM_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_MEM_NOT_INIT) +#define OT_ERR_ISP_ATTR_NOT_CFG OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_ATTR_NOT_CFG) +#define OT_ERR_ISP_SNS_UNREGISTER OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_SNS_UNREGISTER) +#define OT_ERR_ISP_INVALID_ADDR OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_INVALID_ADDR) +#define OT_ERR_ISP_NOMEM OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NOMEM) +#define OT_ERR_ISP_NO_INT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_NO_INT) +#define OT_ERR_ISP_ALG_NOT_INIT OT_DEFINE_ERR(OT_ID_ISP, OT_ERR_LEVEL_ERROR, OT_ERR_ISP_ALG_NOT_INIT) +/* Defines the structure of ISP module parameters. */ +typedef struct { + td_u32 interrupt_bottom_half; /* RW;Range:[0, 1]; Format:32.0; Indicate ISP interrupt bottom half, + No distinction vipipe */ +} ot_isp_mod_param; + +/* Defines the structure of ISP control parameters. */ + +typedef enum { + OT_ISP_UPDATE_OB_STATS_FE_FRAME_END = 0, /* delay 1 frame */ + OT_ISP_UPDATE_OB_STATS_FE_FRAME_START = 1, /* delay 2 frame */ + OT_ISP_UPDATE_OB_STATS_BUTT, +} ot_isp_ob_stats_update_pos; + +typedef enum { + OT_ISP_ALG_RUN_NORM = 0, + OT_ISP_ALG_RUN_FE_ONLY = 1, + OT_ISP_ALG_RUN_BUTT, +} ot_isp_alg_run_select; + +typedef enum { + OT_ISP_RUN_WAKEUP_FE_START = 0, + OT_ISP_RUN_WAKEUP_BE_END = 1, + OT_ISP_RUN_WAKEUP_BUTT, +} ot_isp_run_wakeup_select; + +typedef struct { + td_u8 be_buf_num; /* RW;Range:[2, 20]; offline be cfg buffer number(Only used for offline mode). + Not support changed after isp init */ + td_u32 proc_param; /* RW;Format:32.0; Indicate the update frequency of ISP_PROC information, + No distinction vipipe */ + td_u32 stat_interval; /* RW;Range:(0, 0xffffffff];Format:32.0; + Indicate the time interval of ISP statistic information */ + td_u32 update_pos; /* RW;Range:[0, 1]; Format:32.0; Indicate the location of the configuration register of + ISP interrupt */ + td_u32 interrupt_time_out; /* RW;Format:32.0; Indicate the time(unit:ms) of interrupt timeout */ + td_u32 pwm_num; /* RW;Format:32.0; Indicate PWM number */ + td_u32 port_interrupt_delay; /* RW;Format:32.0; Port intertupt delay value, unit:clk */ + td_bool ldci_tpr_flt_en; /* RW;Range:[0, 1]; Indicate Enable LDCI temporal filter. Not support changed after + isp init */ + ot_isp_ob_stats_update_pos ob_stats_update_pos; /* RW;Range:[0, 1]; Indicate the location of reading ob orea + statistics. Not support changed after isp init */ + ot_isp_alg_run_select alg_run_select; /* RW;Range:[0, 1]; Indicate the algorithm of isp register and run. + Not support changed after isp init */ + ot_isp_run_wakeup_select isp_run_wakeup_select; /* RW;Range:[0, 1]; Indicate the isp software is drived by which + interrupt, FE_START or BE_END */ + td_bool quick_start_en; /* RW;Range:[0, 1]; Indicate ISP Quick Start. */ + td_bool long_frame_interrupt_en; /* RW;Range:[0, 1]; when wdr mode enable/disable long frame pipe interrupt. */ +} ot_isp_ctrl_param; + +/* + * Defines the prior frame of ISP + * 0 = long frame + * 1 = short frame + */ +typedef enum { + OT_ISP_LONG_FRAME = 0, + OT_ISP_SHORT_FRAME = 1, + OT_ISP_PRIOR_FRAME_BUTT +} ot_isp_prior_frame; + +/* + * Defines the ISP correction or detection status + * 0 = initial status, no calibration + * 1 = The static defect pixel calibration ends normally + * 2 = The static defect pixel calibration ends due to timeout. + */ +typedef enum { + OT_ISP_STATE_INIT = 0, + OT_ISP_STATE_SUCCESS = 1, + OT_ISP_STATE_TIMEOUT = 2, + OT_ISP_STATE_BUTT +} ot_isp_status; + +typedef struct { + ot_op_mode op_type; + td_u8 overlap; /* RW; Range:[1,16] */ + td_s32 offset[OT_ISP_BAYER_CHN_NUM]; /* RW;Range:[-0x3FFF, 0x3FFF];Format:15.0; + Black level differences between the offset value */ + td_u32 gain[OT_ISP_BAYER_CHN_NUM]; /* RW;Range:[0x80, 0x400];Format:4.8; The gain difference ratio */ + td_u16 color_matrix[OT_ISP_CCM_MATRIX_SIZE]; /* RW;Range:[0x0, 0xFFFF];Format:8.8; Color correction matrix */ +} ot_isp_pipe_diff_attr; + +/* Defines the format of the input Bayer image */ +typedef enum { + OT_ISP_BAYER_RGGB = 0, + OT_ISP_BAYER_GRBG = 1, + OT_ISP_BAYER_GBRG = 2, + OT_ISP_BAYER_BGGR = 3, + OT_ISP_BAYER_BUTT +} ot_isp_bayer_format; + +/* Defines the bitwidth of the input Bayer image, used for lsc online calibration */ +typedef enum { + OT_ISP_BAYER_RAW_BIT_8BIT = 8, + OT_ISP_BAYER_RAW_BIT_10BIT = 10, + OT_ISP_BAYER_RAW_BIT_12BIT = 12, + OT_ISP_BAYER_RAW_BIT_14BIT = 14, + OT_ISP_BAYER_RAW_BIT_16BIT = 16, + OT_ISP_BAYER_RAW_BIT_BUTT +} ot_isp_bayer_raw_bit; + +/* MIPI attribute, contains the mipi crop attribute */ +typedef struct { + td_bool mipi_crop_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable mipi crop */ + ot_rect mipi_crop_offset; /* RW; start position of the mipi crop window, image width and height */ +} ot_mipi_crop_attr; + +/* ISP public attribute, contains the public image attribute */ +typedef struct { + ot_rect wnd_rect; /* RW; start position of the cropping window, image width, and image height */ + ot_size sns_size; /* RW; width and height of the image output from the sensor */ + td_float frame_rate; /* RW; Range: [0, 0xFFFF]; for frame rate */ + ot_isp_bayer_format bayer_format; /* RW; Range:[0,3] ;Format:2.0;the format of the input bayer image */ + ot_wdr_mode wdr_mode; /* RW; WDR mode select */ + td_u8 sns_mode; /* RW; Range: [0, 0xFF]; Format: 8.0; for special sensor mode switches */ + td_bool sns_flip_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable sensor flip */ + td_bool sns_mirror_en; /* RW;Range:[0, 0x1];Format:1.0; enable/disable sensor mirror */ + ot_mipi_crop_attr mipi_crop_attr; /* RW; mipi crop window attr, enable/disable mipi crop */ +} ot_isp_pub_attr; + +/* Slave mode sensor sync signal generate module */ +typedef struct { + union { + struct { + td_u32 bit16_reserved : 16; + td_u32 bit_h_inv : 1; + td_u32 bit_v_inv : 1; + td_u32 bit12_reserved : 12; + td_u32 bit_h_enable : 1; + td_u32 bit_v_enable : 1; + } bits; + td_u32 bytes; + } cfg; + + td_u32 vs_time; + td_u32 hs_time; + td_u32 vs_cyc; + td_u32 hs_cyc; + td_u32 hs_dly_cyc; + td_u32 slave_mode_time; +} ot_isp_slave_sns_sync; + +/* Defines the ISP stitch attribute. */ +/* + * Defines the ISP firmware status + * 0 = Running status + * 1 = Frozen status + */ +typedef enum { + OT_ISP_FMW_STATE_RUN = 0, + OT_ISP_FMW_STATE_FREEZE, + OT_ISP_FMW_STATE_BUTT +} ot_isp_fmw_state; + +/* Defines the WDR mode of the ISP */ +typedef struct { + ot_wdr_mode wdr_mode; +} ot_isp_wdr_mode; + +typedef union { + td_u64 key; + struct { + td_u64 bit_bypass_isp_d_gain : 1; /* RW;[0] */ + td_u64 bit_bypass_anti_false_color : 1; /* RW;[1] */ + td_u64 bit_bypass_crosstalk_removal : 1; /* RW;[2] */ + td_u64 bit_bypass_dpc : 1; /* RW;[3] */ + td_u64 bit_bypass_nr : 1; /* RW;[4] */ + td_u64 bit_bypass_dehaze : 1; /* RW;[5] */ + td_u64 bit_bypass_wb_gain : 1; /* RW;[6] */ + td_u64 bit_bypass_mesh_shading : 1; /* RW;[7] */ + td_u64 bit_bypass_drc : 1; /* RW;[8] */ + td_u64 bit_bypass_demosaic : 1; /* RW;[9] */ + td_u64 bit_bypass_color_matrix : 1; /* RW;[10] */ + td_u64 bit_bypass_gamma : 1; /* RW;[11] */ + td_u64 bit_bypass_fswdr : 1; /* RW;[12] */ + td_u64 bit_bypass_ca : 1; /* RW;[13] */ + td_u64 bit_bypass_csc : 1; /* RW;[14] */ + td_u64 bit_bypass_radial_crop : 1; /* RW;[15] */ + td_u64 bit_bypass_sharpen : 1; /* RW;[16] */ + td_u64 bit_bypass_bayer_sharpen : 1; /* RW;[17] */ + td_u64 bit_bypass_cac : 1; /* RW;[18]; */ + td_u64 bit2_chn_select : 2; /* RW;[19:20] */ + td_u64 bit_bypass_ldci : 1; /* RW;[21] */ + td_u64 bit_bypass_pregamma : 1; /* RW;[22], not support for Hi3519DV500 */ + td_u64 bit_bypass_ae_stat_fe : 1; /* RW;[23] */ + td_u64 bit_bypass_ae_stat_be : 1; /* RW;[24] */ + td_u64 bit_bypass_mg_stat : 1; /* RW;[25] */ + td_u64 bit_bypass_af_stat_fe : 1; /* RW;[26] */ + td_u64 bit_bypass_af_stat_be : 1; /* RW;[27] */ + td_u64 bit_bypass_awb_stat : 1; /* RW;[28] */ + td_u64 bit_bypass_clut : 1; /* RW;[29] */ + td_u64 bit_bypass_rgbir : 1; /* RW;[30], not support for Hi3519DV500 */ + td_u64 bit_bypass_lblc : 1; /* RW;[31] */ + td_u64 bit_reserved32 : 32; /* H; [32:63] */ + }; +} ot_isp_module_ctrl; + +/* + * Defines the RAW stream Position from the ISP + * 0 = the data is writing out after all isp module. + * 1 = the raw data is writing out after the WDR module. + */ +typedef enum { + OT_ISP_DUMP_FRAME_POS_NORMAL = 0, + OT_ISP_DUMP_FRAME_POS_AFTER_WDR = 1, + OT_ISP_DUMP_FRAME_POS_BUTT +} ot_isp_dump_frame_pos; + +/* + * Defines the dump frame Position from the ISP. + */ +typedef struct { + ot_isp_dump_frame_pos frame_pos; +} ot_isp_be_frame_attr; + +/* + * Defines the ISP WDR merge mode. + * 0 = WDR mode is used + * 1 = Fusion mode is used + */ +typedef enum { + OT_ISP_MERGE_WDR_MODE = 0, + OT_ISP_MERGE_FUSION_MODE = 1, + OT_ISP_MERGE_BUTT +} ot_isp_wdr_merge_mode; + +typedef enum { + OT_ISP_BNR_EX = 0, + OT_ISP_BNR_NORM = 1, +} ot_isp_bnr_sfm0_mode; + +typedef enum { + OT_ISP_WDR_WBGAIN_IN_DG1 = 0, + OT_ISP_WDR_WBGAIN_IN_WB = 1, + OT_ISP_WDR_WBGAIN_POS_BUTT +} ot_isp_wdr_wb_gain_pos; + +typedef struct { + td_u8 md_thr_low_gain; /* RW;Range:[0x0,0xFF];Format:8.0 */ + td_u8 md_thr_hig_gain; /* RW;Range:[0x0,0xFF];Format:8.0 */ +} ot_isp_fswdr_manual_attr; + +typedef struct { + td_u8 md_thr_low_gain[OT_ISP_WDR_RATIO_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0xFF];Format:8.0 */ + td_u8 md_thr_hig_gain[OT_ISP_WDR_RATIO_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0xFF];Format:8.0 */ +} ot_isp_fswdr_auto_attr; + +typedef struct { + td_bool short_expo_chk; /* RW;Range:[0x0,0x1];Format:1.0; */ + td_u16 short_check_threshold; /* RW;Range:[0x0,0xFFF];Format:12.0 */ + td_bool md_ref_flicker; + td_u8 mdt_still_threshold; /* RW;Range:[0x0,0xFE];Format:8.0 */ + td_u8 mdt_full_threshold; /* RW;Range:[0x0,0xFE];Format:8.0 */ + td_u8 mdt_long_blend; /* RW;Range:[0x0,0xFE] */ + ot_op_mode op_type; + ot_isp_fswdr_manual_attr manual_attr; + ot_isp_fswdr_auto_attr auto_attr; +} ot_isp_fswdr_mdt_attr; + +typedef struct { + td_bool motion_comp; /* RW;Range:[0, 0x1];Format:1.0; enable/disable motion compensation */ + td_u16 short_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data above this threshold will be taken from + short exposure only. */ + td_u16 long_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; limited range:[0x0, short_threshold], + data below this threshold will be taken from long exposure only. */ + td_bool force_long; /* RW;Range:[0, 1];Format:1.0; enable/disable force long */ + td_u16 force_long_low_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data above this threshold will force to choose + long frame only */ + td_u16 force_long_hig_threshold; /* RW;Range:[0, 0xFFF];Format:12.0; data below this threshold will force to choose + long frame only */ + ot_isp_fswdr_mdt_attr wdr_mdt; +} ot_isp_wdr_combine_attr; + +typedef struct { + td_bool fusion_blend_en; + td_u8 fusion_blend_wgt; /* RW; Range: [0, 16] */ + td_u16 fusion_threshold[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range: [0x0, 0xFFF] */ + td_bool fusion_force_gray_en; + td_u8 fusion_force_blend_threshold; /* RW; Range: [0, 15] */ +} ot_isp_fusion_attr; + +typedef struct { + ot_isp_wdr_merge_mode wdr_merge_mode; + ot_isp_wdr_combine_attr wdr_combine; + ot_isp_fusion_attr fusion_attr; +} ot_isp_wdr_fs_attr; + +typedef struct { + td_u8 asymmetry; /* RW; Range:[ 1, 30]; Parameter0 of DRC asymmetry tone mapping curve */ + td_u8 second_pole; /* RW; Range:[150, 210]; Parameter1 of DRC asymmetry tone mapping curve */ + td_u8 stretch; /* RW; Range:[ 30, 60]; Parameter2 of DRC asymmetry tone mapping curve */ + td_u8 compress; /* RW; Range:[100, 200]; Parameter3 of DRC asymmetry tone mapping curve */ +} ot_isp_drc_asymmetry_curve_attr; + +typedef struct { + td_u16 strength; /* RW; Range:[0x0, 0x3FF]; DRC manual strength */ +} ot_isp_drc_manual_attr; + +typedef struct { + td_u16 strength; /* RW; Range:[0x0, 0x3FF]; Base strength for strength adaptation in auto mode. + The actual DRC strength is calculated automatically by firmware: + 1) linear mode, auto strength = f1(strength, histogram) + 2) sensor built-in WDR mode: auto strength = f2(strength, histogram) + 3) FS WDR mode: auto strength = f3(strength, exp_ratio) */ + td_u16 strength_max; /* RW; Range:[0x0, 0x3FF]; uppper limit of firmware calculated strength */ + td_u16 strength_min; /* RW; Range:[0x0, 0x3FF]; lower limit of firmware calculated strength */ +} ot_isp_drc_auto_attr; + +/* DRC curve type: 0 = Asymmetry curve, 1 = User-defined curve */ +typedef enum { + OT_ISP_DRC_CURVE_ASYMMETRY = 0x0, + OT_ISP_DRC_CURVE_USER, + OT_ISP_DRC_CURVE_BUTT +} ot_isp_drc_curve_select; + +typedef struct { + td_bool enable; + ot_isp_drc_curve_select curve_select; /* RW; Range:[0x0, 0x1]; Tone mapping curve selection */ + td_u8 purple_reduction_strength; /* RW; Range:[0x0, 0x80]; Purple detection and reduction strength */ + td_u8 bright_gain_limit; /* RW; Range:[0x0, 0xF]; Bright area gain limit */ + td_u8 bright_gain_limit_step; /* RW; Range:[0x0, 0xF]; Bright area gain high limit step */ + td_u8 dark_gain_limit_luma; /* RW; Range:[0x0, 0x85]; Dark area luma gain limit */ + td_u8 dark_gain_limit_chroma; /* RW; Range:[0x0, 0x85]; Dark area chroma gain limit */ + td_u8 contrast_ctrl; /* RW; Range:[0x0, 0xF]; Format:4.0; Contrast control, smaller value yields better contrast */ + td_u8 rim_reduction_strength; /* RW; Range:[0x0, 0x40]; Gradient reversal (rim) reduction strength */ + td_u8 rim_reduction_threshold; /* RW; Range:[0x0, 0x80]; Gradient reversal (rim) reduction threshold */ + td_u16 color_correction_lut[OT_ISP_DRC_CC_NODE_NUM]; /* RW; Range:[0x0, 0x400]; + LUT of color correction coefficients */ + td_u16 tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM]; /* RW; Range:[0x0, 0xffff]; LUT of user-defined curve */ + td_u8 spatial_filter_coef; /* RW; Range:[0x0, 0x5]; Spatial filter coefficients */ + td_u8 range_filter_coef; /* RW; Range:[0x0, 0xA]; Range filter coefficients */ + td_u8 detail_adjust_coef; /* RW; Range:[0x0, 0xF]; Detail adjust coefficient */ + td_u8 local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM]; /* RW; Range:[0x0, 0x80]; + LUT of enhancement coefficients for positive details */ + td_u8 local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM]; /* RW; Range:[0x0, 0x80]; + LUT of enhancement coefficients for negative details */ + td_u8 high_saturation_color_ctrl; /* RW; Range:[0x0, 0xF]; High saturation color control */ + td_u8 global_color_ctrl; /* RW; Range:[0x0, 0xF]; global color control */ + + td_bool shoot_reduction_en; /* RW; Range:[0x0, 0x1]; shoot reduction enable */ + + ot_op_mode op_type; + ot_isp_drc_manual_attr manual_attr; + ot_isp_drc_auto_attr auto_attr; + ot_isp_drc_asymmetry_curve_attr asymmetry_curve; +} ot_isp_drc_attr; + +#define OT_ISP_EXPANDER_POINT_NUM_MAX (OT_ISP_EXPANDER_NODE_NUM - 1) + +typedef struct { + td_bool enable; + td_u8 bit_depth_in; /* RW;Range:[0xC, 0x14];Format:5.0;The Bit depth of input. + bit_depth_in must be an even number */ + td_u8 bit_depth_out; /* RW;Range:[0xC, 0x14];Format:5.0;The Bit depth of output. + bit_depth_out must be an even number */ + td_u16 knee_point_num; /* Range:[1, 256]; Format:9.0; the number of knee point */ + ot_point knee_point_coord[OT_ISP_EXPANDER_POINT_NUM_MAX]; /* RW; Range: x:[0x0, 0x100], y:[0x0, 0x100000]; + The coordinate of knee point. + The coordinate must be monotonically increasing */ +} ot_isp_expander_attr; + +typedef struct { + td_u8 wgt; /* RW;Range: [0x0, 0xFF]; + Format:1.7;Weight of Gaussian distribution */ + td_u8 sigma; /* RW;Range: [0x1, 0xFF];Format:0.8;Sigma of Gaussian distribution */ + td_u8 mean; /* RW;Range: [0x0, 0xFF];Format:0.8;Mean of Gaussian distribution */ +} ot_isp_ldci_gauss_coef_attr; + +typedef struct { + ot_isp_ldci_gauss_coef_attr he_pos_wgt; + ot_isp_ldci_gauss_coef_attr he_neg_wgt; +} ot_isp_ldci_he_wgt_attr; + +typedef struct { + ot_isp_ldci_he_wgt_attr he_wgt; + td_u16 blc_ctrl; /* RW;Range: [0x0, 0x1FF];Format:9.0;Restrain dark region */ +} ot_isp_ldci_manual_attr; + +typedef struct { + ot_isp_ldci_he_wgt_attr he_wgt[OT_ISP_AUTO_ISO_NUM]; + td_u16 blc_ctrl[OT_ISP_AUTO_ISO_NUM]; /* RW;Range: [0x0, 0x1FF];Format:9.0;auto mode, + Restrain dark region */ +} ot_isp_ldci_auto_attr; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; */ + td_u8 gauss_lpf_sigma; /* RW;Range: [0x1, 0xFF];Format:0.8; + Coefficient of Gaussian low-pass filter */ + ot_op_mode op_type; + ot_isp_ldci_manual_attr manual_attr; + ot_isp_ldci_auto_attr auto_attr; + td_u16 tpr_incr_coef; /* RW;Range: [0x0, 0x100];Format:0.9; + Increase Coefficient of temporal filter */ + td_u16 tpr_decr_coef; /* RW;Range: [0x0, 0x100];Format:0.9; + Decrease Coefficient of temporal filter */ +} ot_isp_ldci_attr; + +/* + defines CA type + 0 = enable Ca module + 1 = enable Cp module + */ +typedef enum { + OT_ISP_CA_ENABLE = 0x0, + OT_ISP_CP_ENABLE, + OT_ISP_CA_BUTT +} ot_isp_ca_type; + +typedef struct { + td_u32 y_ratio_lut[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,2047];Format:1.11 */ + td_s32 iso_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0,2047];Format:1.10 */ + td_u32 y_sat_lut[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,2047];Format:1.11 */ +} ot_isp_ca_lut; + +typedef struct { + td_u8 cp_lut_y[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ + td_u8 cp_lut_u[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ + td_u8 cp_lut_v[OT_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0,255];Format:8.0; */ +} ot_isp_cp_lut; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0 */ + ot_isp_ca_type ca_cp_en; + ot_isp_ca_lut ca; + ot_isp_cp_lut cp; +} ot_isp_ca_attr; + +/* CSC */ +typedef struct { + td_s16 csc_in_dc[OT_ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; + Input dc component for csc matrix */ + td_s16 csc_out_dc[OT_ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; + Output dc component for csc matrix */ + td_s16 csc_coef[OT_ISP_CSC_COEF_NUM]; /* RW; Range:[-4096, 4095]; Format: 5.10; 3x3 coefficients for csc matrix */ +} ot_isp_csc_matrx; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ + ot_color_gamut color_gamut; /* RW; Range: [0, 3]; Color gamut type; Not Support COLOR_GAMUT_BT2020 */ + td_u8 hue; /* RW; Range:[0, 100];Format:8.0; Csc Hue Value */ + td_u8 luma; /* RW; Range:[0, 100];Format:8.0; Csc Luma Value */ + td_u8 contr; /* RW; Range:[0, 100];Format:8.0; Csc Contrast Value */ + td_u8 satu; /* RW; Range:[0, 100];Format:8.0; Csc Saturation Value */ + td_bool limited_range_en; /* RW; Range: [0x0, 0x1]; + Enable/Disable: Enable Limited range output mode(default full range output) */ + td_bool ext_csc_en; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable extended luma range */ + td_bool ct_mode_en; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable ct mode */ + ot_isp_csc_matrx csc_magtrx; /* RW; Color Space Conversion matrix */ +} ot_isp_csc_attr; + +/* CLUT */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function */ + td_u32 gain_r; /* RW; Range:[0, 4095];Format:12.0 */ + td_u32 gain_g; /* RW; Range:[0, 4095];Format:12.0 */ + td_u32 gain_b; /* RW; Range:[0, 4095];Format:12.0 */ +} ot_isp_clut_attr; + +/* CLUT LUT */ +typedef struct { + td_u32 lut[OT_ISP_CLUT_LUT_LENGTH]; /* RW; Range: [0, 1073741823] */ +} ot_isp_clut_lut; + +/* + * Defines the type of static defect pixel calibration + * 0 = bright defect pixel calibration + * 1 = dark defect pixel calibration + */ +typedef enum { + OT_ISP_STATIC_DP_BRIGHT = 0x0, + OT_ISP_STATIC_DP_DARK, + OT_ISP_STATIC_DP_BUTT +} ot_isp_static_dp_type; + +typedef struct { + td_bool enable_detect; /* RW; Range: [0, 1];Format 1.0;Set 'TD_TRUE'to start static defect-pixel + calibration, and firmware will set 'TD_FALSE' when finished */ + ot_isp_static_dp_type static_dp_type; /* RW; Range: [0, 1];Format 1.0;Select static bright/dark defect-pixel + calibration */ + td_u8 start_thresh; /* RW; Range: [1, 255]; Format 8.0;Start threshold for static defect-pixel calibraiton */ + td_u16 count_max; /* RW; Range:Hi3519DV500 = (0, 6144]; + Format 14.0; limited Range: (0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + Limit of max number of static defect-pixel calibraiton */ + td_u16 count_min; /* RW; Range:Hi3519DV500 = [0, 6144);Format 14.0; limited Range: [0, count_max), + Limit of min number of static defect-pixel calibraiton */ + td_u16 time_limit; /* RW; Range: [0x0, 1600];Format 11.0;Time limit for static defect-pixel calibraiton */ + + td_u32 table[OT_ISP_STATIC_DP_COUNT_MAX]; /* R; Range: [0, 0x1FFF1FFF];Format 29.0; + Static defect-pixel calibraiton table, + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel */ + td_u8 finish_thresh; /* R; Range: [0, 255];Format 8.0; Finish threshold for static defect-pixel calibraiton */ + td_u16 count; /* R; Range:Hi3519DV500 = [0, 6144];Format 14.0; + Finish number for static defect-pixel calibraiton */ + ot_isp_status status; /* R; Range: [0, 2];Format 2.0;Status of static defect-pixel calibraiton */ +} ot_isp_dp_static_calibrate; + +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel module */ + td_u16 bright_count; /* RW; Range:Hi3519DV500 = [0, 6144];Format 14.0; + limited Range: [0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + When used as input(W), indicate the number of static bright defect pixels; + As output(R),indicate the number of static bright and dark defect pixels */ + td_u16 dark_count; /* RW; Range:Hi3519DV500 = [0, 6144];Format 14.0; + limited Range: [0, OT_ISP_STATIC_DP_COUNT_NORMAL*BlkNum], + When used as input(W), indicate the number of static dark defect pixels; + As output(R), invalid value 0. */ + td_u32 bright_table[OT_ISP_STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel + Notice: When used as input(W), indicate static bright defect pixels + table; As output(R), indicate static bright and dark defect pixels + table. */ + + td_u32 dark_table[OT_ISP_STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; + 0~12 bits represents the X coordinate of the defect pixel, + 16~28 bits represent the Y coordinate of the defect pixel + Notice: When used as input(W), indicate static dark defect pixels table; + As output(R), invalid value */ + td_bool show; /* RW; Range: [0, 1];Format 1.0;RW;highlight static defect pixel */ +} ot_isp_dp_static_attr; + +typedef struct { + td_u8 strength; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ + td_u8 blend_ratio; /* RW; Range: [0, 128];Format:1.7;Blending ratio required for DPC */ +} ot_isp_dp_dynamic_manual_attr; + +typedef struct { + td_u8 strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ + td_u8 blend_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 128];Format:1.7;Blending ratio required for DPC */ +} ot_isp_dp_dynamic_auto_attr; + +typedef struct { + td_bool sup_twinkle_en; /* RW; Range: [0, 1];Format 1.0;Enable/disable the twinkle suppression module */ + td_s8 soft_thr; /* RW; Range: [0, 127];Format s8.0;twinkle suppression threshold */ + td_u8 soft_slope; /* RW; Range: [0, 255];Format 8.0;Correction controlling parameter of the pixels whose + deviation is smaller than soft_thr. */ + ot_op_mode op_type; /* RW; Range: [0, 1];Format 1.0;Working mode of dynamic DPC */ + ot_isp_dp_dynamic_manual_attr manual_attr; + ot_isp_dp_dynamic_auto_attr auto_attr; + td_u8 bright_strength; /* RW; Range: [0, 127];Format 8.0, local DPC strength for bright area */ + td_u8 dark_strength; /* RW; Range: [0, 127];Format 8.0, local DPC strength for dark area */ +} ot_isp_dp_frame_dynamic_attr; + +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixel module */ + ot_isp_dp_frame_dynamic_attr frame_dynamic[OT_ISP_WDR_MAX_FRAME_NUM]; /* dynamic attr for short/long frames */ +} ot_isp_dp_dynamic_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; TD_TRUE: enable lblc; TD_FALSE: disable lblc */ + td_u16 strength; /* RW; Range:[0, 1023]; The strength of the lblc correction */ +} ot_isp_lblc_attr; + +typedef struct { + td_u16 offset_r; /* RW; Range:[0, 16383]; average value of the R channel Mesh BLC. */ + td_u16 offset_gr; /* RW; Range:[0, 16383]; average value of the Gr channel Mesh BLC. */ + td_u16 offset_gb; /* RW; Range:[0, 16383]; average value of the Gb channel Mesh BLC. */ + td_u16 offset_b; /* RW; Range:[0, 16383]; average value of the B channel Mesh BLC. */ + td_u16 mesh_blc_r[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the R channel Mesh BLC. */ + td_u16 mesh_blc_gr[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the Gr channel Mesh BLC. */ + td_u16 mesh_blc_gb[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the Gb channel Mesh BLC. */ + td_u16 mesh_blc_b[OT_ISP_LBLC_GRID_POINTS]; /* RW; Range:[0, 16383]; Member used to store + the calibration data of the B channel Mesh BLC. */ +} ot_isp_lblc_lut_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; TD_TRUE: enable lsc; TD_FALSE: disable lsc */ + td_u16 mesh_strength; /* RW; Range:[0, 16383]; The strength of the mesh shading correction */ + td_u16 blend_ratio; /* RW; Range:[0, 256];Format:9.0; the blendratio of the two mesh gain lookup-table */ +} ot_isp_shading_attr; + +typedef struct { + td_u16 r_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + R channel required for LSC. */ + td_u16 gr_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + Gr channel required for LSC. */ + td_u16 gb_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + Gb channel required for LSC. */ + td_u16 b_gain[OT_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the + B channel required for LSC. */ +} ot_isp_shading_gain_lut; + +typedef struct { + td_u8 mesh_scale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for + the 10 bit gain coefficients stored in mesh tables */ + td_u16 x_grid_width[OT_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the width data of each GRID partition */ + td_u16 y_grid_width[OT_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Range:[4, 255]; + Member used to store the height data of each GRID partition */ + ot_isp_shading_gain_lut lsc_gain_lut[OT_ISP_MLSC_GAIN_LUT_NUM]; +} ot_isp_shading_lut_attr; + +typedef struct { + ot_isp_bayer_format bayer; /* RW; Range: [0, 3];Format ENUM;Shows bayer pattern */ + ot_isp_bayer_raw_bit raw_bit; /* RW; Range: {8,10,12,14,16};Format ENUM;Shows input raw bitwidth */ + + td_u16 img_height; /* RW; Range: [0, 65535];Format 16.0;Input raw image height */ + td_u16 img_width; /* RW; Range: [0, 65535];Format 16.0;Input raw image width */ + + td_u16 dst_img_height; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_height], Image height that + crop from input raw image, set to ImgHeight if don't need to crop */ + td_u16 dst_img_width; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_width], Image width that + crop from input raw image, set to ImgWidth if don't need to crop */ + td_u16 offset_x; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_width - dst_img_width], + Horizontal offset that crop from input raw image, set to 0 if don't need to crop */ + td_u16 offset_y; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, img_height - dst_img_height], + Vertical offset that crop from input raw image, set to 0 if don't need to crop */ + + td_u32 mesh_scale; /* RW; Range: [0, 7];Format 3.0; Shows Mesh Scale value */ + + td_u16 blc_offset_r; /* RW; Range: [0, 4095];Format 12.0;BLC value for R channel */ + td_u16 blc_offset_gr; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gr channel */ + td_u16 blc_offset_gb; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gb channel */ + td_u16 blc_offset_b; /* RW; Range: [0, 4095];Format 12.0;BLC value for B channel */ +} ot_isp_mlsc_calibration_cfg; + +typedef struct { + td_u8 mesh_scale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for + the 10 bit gain coefficients stored in mesh tables */ + td_u16 x_grid_width[OT_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the width data of each GRID partition */ + td_u16 y_grid_width[OT_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Range:[4, 255], + Member used to store the height data of each GRID partition */ + ot_isp_shading_gain_lut lsc_gain_lut; +} ot_isp_mesh_shading_table; + +typedef struct { + td_bool enable; /* RW; Range:[0,1];Format:1.0;Acs Enable */ + td_u16 y_strength; /* RW; Range:[0,256];Format:8.0;Acs correction strength for y shading */ + td_u16 run_interval; /* RW; Range:[1,255];Format:16.0;Acs Run Interval */ + td_bool lock_enable; /* RW; Range:[0,1];Format:1.0;Lock Gain Lut Enable */ +} ot_isp_acs_attr; + +typedef struct { + td_u16 dering_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1023];Format:10.0; dering strength. */ + td_u8 dering_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; dering threshold. */ + td_u8 dering_static_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; dering static strength */ + td_u8 dering_motion_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; dering moving strength */ +} ot_isp_nr_dering_auto_attr; + +typedef struct { + td_u16 dering_strength; /* RW; Range:[0, 1023];Format:10.0; dering strength. */ + td_u8 dering_thresh; /* RW; Range:[0, 255];Format:8.0; dering threshold. */ + td_u8 dering_static_strength; /* RW; Range:[0, 32];Format:6.0; dering static strength. */ + td_u8 dering_motion_strength; /* RW; Range:[0, 32];Format:6.0; dering moving strength. */ +} ot_isp_nr_dering_manual_attr; + +typedef struct { + ot_isp_nr_dering_auto_attr dering_auto; + ot_isp_nr_dering_manual_attr dering_manual; +} ot_isp_nr_dering_attr; + +typedef struct { + td_u16 sfm0_coarse_strength[OT_ISP_BAYER_CHN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 864];Format:10.0; + sfm0 filter coarse strength */ + td_u8 sfm0_detail_prot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 31];Format:5.0; sfm0 filter detail protect rate */ + td_u16 sfm1_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1023];Format:16.0; sfm1 filter strength. */ + td_u8 sfm1_adp_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 16];Format:5.0; sfm1 filter adaptive strength. */ + td_u8 sfm6_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; sfm6 hybrid filter strength. */ + td_u8 sfm7_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; sfm7 hybrid filter strength. */ + td_u8 sth[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; hybrid filter threshold. */ + td_u8 fine_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; denoise rate. */ + td_u16 coring_wgt[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0, 3200];Format:12.0;Strength of reserving the random noise. */ + td_u8 coring_mot_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 63];Format:6.0; coring on moving area. */ +} ot_isp_nr_snr_auto_attr; + +typedef struct { + td_u16 sfm0_coarse_strength[OT_ISP_BAYER_CHN_NUM]; /* RW; Range:[0,864];Format:10.0; sfm0 coarse strength */ + td_u8 sfm0_detail_prot; /* RW; Range:[0, 31];Format:5.0; sfm0 filter detail protect rate */ + td_u16 sfm1_strength; /* RW; Range:[0, 1023];Format:16.0; sfm1 filter strength. */ + td_u8 sfm1_adp_strength; /* RW; Range:[0, 16];Format:5.0; sfm1 filter adaptive strength. */ + td_u8 sfm6_strength; /* RW; Range:[0, 64];Format:7.0; sfm6 hybrid filter strength. */ + td_u8 sfm7_strength; /* RW; Range:[0, 64];Format:7.0; sfm7 hybrid filter strength. */ + td_u8 sth; /* RW; Range:[0, 255];Format:8.0; hybrid filter threshold. */ + td_u8 fine_strength; /* RW; Range:[0, 128];Format:8.0; denoise rate. */ + td_u16 coring_wgt; /* RW;Range:[0, 3200];Format:12.0;Strength of reserving the random noise. */ + td_u8 coring_mot_ratio; /* RW; Range:[0, 63];Format:6.0; coring on moving area. */ +} ot_isp_nr_snr_manual_attr; + +typedef struct { + ot_isp_nr_snr_auto_attr snr_auto; + ot_isp_nr_snr_manual_attr snr_manual; +} ot_isp_nr_snr_attr_v0; + +typedef enum { + OT_NR_SNR_V0, +} ot_nr_snr_mode; + +typedef struct { + ot_nr_snr_mode snr_version; + union { + ot_isp_nr_snr_attr_v0 snr_attr; /* AUTO:ot_nr_snr_mode:OT_NR_SNR_V0 */ + }; +} ot_isp_nr_snr_attr; + +typedef struct { + td_u8 md_mode[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1];Format:1.0; motion detection win size. */ + td_u8 md_size_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 32];Format:6.0; motion detection size blend ratio. */ + td_u8 md_anti_flicker_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; + motion detection anti flicker strength. */ + td_u8 md_static_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; motion detection static area ratio */ + td_u8 md_motion_ratio[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; motion detection motion area ratio */ + td_u8 md_static_fine_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; + motion detection background tnr strength */ + td_u8 tfs[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 255];Format:8.0; tnr absolute strength. */ + td_bool user_define_md[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 1];Format:1.0; user define motion detection mode. */ + td_s16 user_define_slope[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[-32768, 32767];Format:8.8; user define motion + detection strength change with luma. */ + td_u16 user_define_dark_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 65535];Format:8.8; user define motion + detection strength in dark area. */ + td_u8 user_define_color_thresh[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 64];Format:7.0; user define motion + detection strength in color area. */ + td_u8 sfr_r[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate r */ + td_u8 sfr_g[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate g */ + td_u8 sfr_b[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 128];Format:8.0; sfr rate b */ +} ot_isp_nr_tnr_auto_attr; + +typedef struct { + td_u8 md_mode; /* RW; Range:[0, 1];Format:1.0; motion detection win size. */ + td_u8 md_size_ratio; /* RW; Range:[0, 32];Format:6.0; motion detection size blend ratio. */ + td_u8 md_anti_flicker_strength; /* RW; Range:[0, 64];Format:7.0; motion detection anti flicker strength. */ + td_u8 md_static_ratio; /* RW; Range:[0, 64];Format:7.0; motion detection static area ratio */ + td_u8 md_motion_ratio; /* RW; Range:[0, 64];Format:7.0; motion detection motion area ratio */ + td_u8 md_static_fine_strength; /* RW; Range:[0, 255];Format:8.0; motion detection background tnr strength */ + td_u8 tfs; /* RW; Range:[0, 255];Format:8.0; tnr absolute strength. */ + td_bool user_define_md; /* RW; Range:[0, 1];Format:1.0; user define motion detection mode. */ + td_s16 user_define_slope; /* RW; Range:[-32768, 32767];Format:8.8; user define motion detection strength + change with luma. */ + td_u16 user_define_dark_thresh; /* RW; Range:[0, 65535];Format:8.8; user define motion detection strength in + dark area. */ + td_u8 user_define_color_thresh; /* RW; Range:[0, 64];Format:7.0; user define motion detection strength in + color area. */ + td_u8 sfr_r; /* RW; Range:[0, 128];Format:8.0; sfr rate r */ + td_u8 sfr_g; /* RW; Range:[0, 128];Format:8.0; sfr rate g */ + td_u8 sfr_b; /* RW; Range:[0, 128];Format:8.0; sfr rate b */ +} ot_isp_nr_tnr_manual_attr; + +typedef struct { + ot_isp_nr_tnr_auto_attr tnr_auto; + ot_isp_nr_tnr_manual_attr tnr_manual; +} ot_isp_nr_tnr_attr; + +typedef struct { + td_u8 snr_sfm0_wdr_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm0 strength */ + td_u8 snr_sfm0_fusion_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm0 strength */ + td_u8 snr_wdr_sfm6_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm6 strength */ + td_u8 snr_wdr_sfm7_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr sfm7 strength */ + td_u8 snr_fusion_sfm6_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm6 strength */ + td_u8 snr_fusion_sfm7_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion sfm7 strength */ + td_u8 md_wdr_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; wdr md tnr strength */ + td_u8 md_fusion_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* RW; Range:[0, 64];Format:7.0; fusion md tnr strength */ +} ot_isp_nr_wdr_attr; + +typedef struct { + td_u8 denoise_y_alpha; /* RW; Range:[0, 255];Format:8.0; */ + td_u8 denoise_y_fg_str_lut[OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM]; /* RW; Range:[0, 255];Format:8.0; */ + td_u8 denoise_y_bg_str_lut[OT_ISP_BAYERNR_DENOISE_Y_LUT_NUM]; /* RW; Range:[0, 255];Format:8.0; */ +} ot_isp_nr_ynet_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1];Format:1.0; bayernr enable */ + ot_op_mode op_type; /* RW; Range:[0, 1];Format:1.0; bayernr operation mode */ + td_bool tnr_en; /* RW; Range:[0, 1];Format:1.0; bayernr tnr enable */ + td_bool lsc_nr_en; /* RW; Range:[0, 1];Format:1.0; lsc nr enable. */ + td_u8 lsc_ratio1; /* RW; Range:[0, 15];Format:4.0; lsc nr ratio1. */ + td_u16 coring_ratio[OT_ISP_BAYERNR_LUT_LENGTH]; /* RW;Range:[0, 1023];Format:10.0; + Strength of reserving the random noise according to luma. */ + td_u16 mix_gain[OT_ISP_BAYERNR_LUT_LENGTH1]; /* RW;Range:[0, 128];Format:8.0; mixing rate based on luma. */ + + ot_isp_nr_snr_attr snr_cfg; + ot_isp_nr_tnr_attr tnr_cfg; + ot_isp_nr_wdr_attr wdr_cfg; + ot_isp_nr_dering_attr dering_cfg; +} ot_isp_nr_attr; + +typedef enum { + OT_ISP_IRBAYER_GRGBI = 0, + OT_ISP_IRBAYER_RGBGI = 1, + OT_ISP_IRBAYER_GBGRI = 2, + OT_ISP_IRBAYER_BGRGI = 3, + OT_ISP_IRBAYER_IGRGB = 4, + OT_ISP_IRBAYER_IRGBG = 5, + OT_ISP_IRBAYER_IBGRG = 6, + OT_ISP_IRBAYER_IGBGR = 7, + OT_ISP_IRBAYER_BUTT +} ot_isp_ir_bayer_format; + +typedef enum { + OT_ISP_IR_CVTMAT_MODE_NORMAL = 0, + OT_ISP_IR_CVTMAT_MODE_MONO, + OT_ISP_IR_CVTMAT_MODE_USER, + OT_ISP_IR_CVTMAT_MODE_BUTT +} ot_isp_ir_cvtmat_mode; + +typedef enum { + OT_ISP_RGBIR_MODE_RGBIR4X4 = 0, + OT_ISP_RGBIR_MODE_NORMAL, + OT_ISP_RGBIR_MODE_BUTT +} ot_isp_rgbir_mode; + +typedef struct { + ot_isp_rgbir_mode mode; /* RW; Range:[0x0, 0x1]; 0: rgbir mode; 1: ir remove mode */ + ot_isp_bayer_format out_pattern; /* RW;Range:[0x0, 0x3];Format:2.0; Bayer pattern of the output */ + ot_isp_ir_bayer_format in_rgbir_pattern; /* RW;Range:[0x0, 0x7];Format:3.0; IR pattern of the input */ + ot_isp_bayer_format in_bayer_pattern; /* RW;Range:[0x0, 0x3]; Format:2.0; + Bayer pattern of the input signal for ir remove mode */ + td_bool is_ir_upscale; /* RW;Range:[0x0, 0x1]; Format:1.0; + is upscale for ir image input of IR remove mode */ +} ot_isp_rgbir_cfg; + +typedef struct { + td_bool rgbir_en; /* RW;Range:[0x0, 0x1];Format:1.0; Enable/Disable RGBIR module */ + ot_isp_rgbir_cfg rgbir_cfg; + td_u32 ir_sum_info; /* R;Range:[0, 0xffffffff]; Format:32.0; ir_sum_info value, only read */ + td_bool auto_gain_en; /* RW;Range:[0x0,0x1];Format:1.0; Enable/Disable auto gain */ + td_u16 auto_gain; /* RW;Range:[0, 1023]; Format:10.0; auto gain value, 256 for 1x */ + td_bool smooth_en; /* RW;Range:[0x0, 0x1];Format:1.0; Enable/Disable Smooth Function */ + td_u16 exp_ctrl[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0, 2047];Format:11.0; Over expose control */ + td_u16 exp_gain[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0, 511];Format:9.0; Over expose control */ + td_bool ir_rm_en; /* RW;Range:[0x0,0x1]; Format:1.0; Enable/Disable ir remove Function before interplattion */ + td_u16 ir_rm_ratio[OT_ISP_RGBIR_CROSSTALK_NUM]; /* RW;Range:[0, 1000]; Format:10.0; crosstalk, 1000 for 1x */ + ot_isp_ir_cvtmat_mode ir_cvtmat_mode; + td_s16 cvt_matrix[OT_ISP_RGBIR_CVTMAT_NUM]; /* RW;Range:[-16384, 16383]; Format:s14.0; + RGBIR to Bayer image Convert matrix (need calibration) */ + td_u16 wb_ctrl_strength[OT_ISP_RGBIR_CTRL_NUM]; /* RW;Range:[0,1024]; Format:11.0; wb control of R/B */ +} ot_isp_rgbir_attr; + +/* + Defines the type of the ISP gamma curve + 0 = Default curve + 1 = Default BT.709 curve (Gamma Curve) + 2 = Default SMPTE.2084 curve (PQ Curve), Not Support + 3 = User defined Gamma curve, LUT must be correct +*/ +typedef enum { + OT_ISP_GAMMA_CURVE_DEFAULT = 0x0, + OT_ISP_GAMMA_CURVE_SRGB, + OT_ISP_GAMMA_CURVE_HDR, /* Not Support */ + OT_ISP_GAMMA_CURVE_USER_DEFINE, + OT_ISP_GAMMA_CURVE_BUTT +} ot_isp_gamma_curve_type; +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Gamma Function */ + td_u16 table[OT_ISP_GAMMA_NODE_NUM]; /* RW; Range:[0, 4095]; Format:12.0;Gamma LUT nodes value */ + + ot_isp_gamma_curve_type curve_type; /* RW; Range:[0, 3]; Format:2.0;Gamma curve type */ +} ot_isp_gamma_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreGamma Function */ + td_u32 table[OT_ISP_PREGAMMA_NODE_NUM]; /* RW; Range:SD3403V100 = [0, 0xFFFFF]; Format:20.0; + Not support for Hi3519DV500; + PreGamma LUT nodes value */ +} ot_isp_pregamma_attr; + +typedef struct { + td_u8 luma_wgt[OT_ISP_SHARPEN_LUMA_NUM]; /* RW; Range: [0, 31]; + Format:0.5;Adjust the sharpen strength according to luma. + Sharpen strength will be weaker when it decrease. */ + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Undirectional sharpen + strength for texture and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Directional sharpen strength for edge enhancement */ + td_u16 texture_freq; /* RW; Range: [0, 4095];Format:6.6; Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq; /* RW; Range: [0, 4095];Format:6.6; Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */ + td_u8 under_shoot; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */ + + td_u16 motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095];Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_texture_freq; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u16 motion_edge_freq; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u8 motion_over_shoot; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + td_u8 motion_under_shoot; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + + td_u8 shoot_sup_strength; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, the + amplitude and width of shoot will be decrease when shootSupSt increase */ + td_u8 shoot_sup_adj; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot suppression adjusting, + adjust the edge shoot suppression strength */ + td_u8 detail_ctrl; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for detail and edge. + When it is bigger than 128, detail sharpen strength will be stronger than edge */ + td_u8 detail_ctrl_threshold; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, it is used to + distinguish detail and edge. */ + td_u8 edge_filt_strength; /* RW; Range: [0, 63]; Format:6.0;The strength of edge filtering. */ + td_u8 edge_filt_max_cap; /* RW; Range: [0, 47]; Format:6.0;The max capacity of edge filtering. */ + td_u8 r_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Red Area */ + td_u8 g_gain; /* RW; Range: [0, 255]; Format:8.0; Sharpen Gain for Green Area */ + td_u8 b_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Blue Area */ + td_u8 skin_gain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ + td_u16 max_sharp_gain; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ +} ot_isp_sharpen_manual_attr; + +typedef struct { + td_u8 luma_wgt[OT_ISP_SHARPEN_LUMA_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0, 31]; Format:0.5; + Adjust the sharpen strength according to luma. + Sharpen strength will be weaker when it decrease */ + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Undirectional sharpen strength for texture + and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5; + Directional sharpen strength for edge enhancement */ + td_u16 texture_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0 */ + td_u8 under_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0 */ + + td_u16 motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; + Format:7.5. Not support for Hi3519DV500 */ + td_u16 motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:7.5. + Not support for Hi3519DV500 */ + td_u16 motion_texture_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u16 motion_edge_freq[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Format:6.6. Not support for Hi3519DV500 */ + td_u8 motion_over_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + td_u8 motion_under_shoot[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 127]; Format:7.0. Not support for Hi3519DV500 */ + + td_u8 shoot_sup_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot + suppression strength, the amplitude and width of shoot will be + decrease when shootSupSt increase */ + td_u8 shoot_sup_adj[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot + suppression adjusting, adjust the edge shoot suppression strength */ + td_u8 detail_ctrl[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for + detail and edge. When it is bigger than 128, detail sharpen + strength will be stronger than edge. */ + td_u8 detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, + it is used to distinguish detail and edge. */ + td_u8 edge_filt_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 63]; Format:6.0; + The strength of edge filtering. */ + td_u8 edge_filt_max_cap[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 47]; Format:6.0; + The max capacity of edge filtering. */ + td_u8 r_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0; Sharpen Gain for Red Area */ + td_u8 g_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 255]; Format:8.0; Sharpen Gain for Green Area */ + td_u8 b_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0; Sharpen Gain for Blue Area */ + td_u8 skin_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ + td_u16 max_sharp_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ +} ot_isp_sharpen_auto_attr; + +typedef enum { + OT_ISP_SHARPEN_NORMAL = 0, + OT_ISP_SHARPEN_OFF, + OT_ISP_SHARPEN_DIFF_NORM, + OT_ISP_SHARPEN_DIFF, + OT_ISP_SHARPEN_TOTAL, + OT_ISP_SHARPEN_TEXTURE, + OT_ISP_SHARPEN_EDGE, + OT_ISP_SHARPEN_TOTAL_FREQ, + OT_ISP_SHARPEN_TEXTURE_FREQ, + OT_ISP_SHARPEN_EDGE_FREQ, + OT_ISP_SHARPEN_BUTT +} ot_isp_sharpen_detail_map; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable sharpen module */ + td_bool motion_en; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable motion sharpen module. + Not support for Hi3519DV500 */ + td_u8 motion_threshold0; /* RW; Range: [0, 15]; Format:8.0. Not support for Hi3519DV500 */ + td_u8 motion_threshold1; /* RW; Range: [0, 15]; Format:8.0. Not support for Hi3519DV500 */ + td_u16 motion_gain0; /* RW; Range: [0, 256]; Format:16.0. Not support for Hi3519DV500 */ + td_u16 motion_gain1; /* RW; Range: [0, 256]; Format:16.0. Not support for Hi3519DV500 */ + td_u8 skin_umin; /* RW; Range: [0, 255]; Format:8.0; U min value of the range of skin area */ + td_u8 skin_vmin; /* RW; Range: [0, 255]; Format:8.0; V min value of the range of skin area */ + td_u8 skin_umax; /* RW; Range: [0, 255]; Format:8.0; U max value of the range of skin area */ + td_u8 skin_vmax; /* RW; Range: [0, 255]; Format:8.0; V max value of the range of skin area */ + ot_op_mode op_type; + ot_isp_sharpen_detail_map detail_map; + ot_isp_sharpen_manual_attr manual_attr; + ot_isp_sharpen_auto_attr auto_attr; +} ot_isp_sharpen_attr; + +/* Crosstalk Removal */ +typedef struct { + td_bool enable; /* RW; Range: [0, 1];Format:1.0;Enable/disable the crosstalk removal module */ + td_u8 slope; /* RW; Range: [0, 12]; Crosstalk slope value. */ + td_u8 sensi_slope; /* RW; Range: [0, 12]; Crosstalk sensitivity. */ + td_u16 sensi_threshold; /* RW; Range: [0, 4095]; Crosstalk sensitivity threshold. */ + td_u16 strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0,256];Crosstalk strength value. */ + td_u16 threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 4095]; Crosstalk threshold. */ + td_u8 filter_mode[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 31];Format:5.0; Crosstalk filter mode. */ + td_u16 np_offset[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [512, 4095]; Not support for Hi3519DV500 */ +} ot_isp_cr_attr; + +typedef struct { + td_u8 threshold; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */ + td_u8 strength; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */ +} ot_isp_anti_false_color_manual_attr; + +typedef struct { + td_u8 threshold[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */ + td_u8 strength[OT_ISP_AUTO_ISO_NUM]; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */ +} ot_isp_anti_false_color_auto_attr; + +typedef struct { + td_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ + ot_op_mode op_type; + ot_isp_anti_false_color_manual_attr manual_attr; + ot_isp_anti_false_color_auto_attr auto_attr; +} ot_isp_anti_false_color_attr; + +typedef struct { + td_u8 nddm_strength; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ + td_u8 nddm_mf_detail_strength; /* RW; Range:[0x0, 0x7f]; + Format:3.4; Non-direction medium frequent detail enhance strength */ + td_u8 nddm_hf_detail_strength; /* RW; Range:[0x0, 0x10]; Format:2.2; + Non-direction high frequent detail enhance strength */ + td_u8 detail_smooth_range; /* RW; Range:[0x1, 0x7]; Format:4.0; Detail smooth range */ + td_u8 color_noise_f_threshold; /* RW; Range:[0x0,0xff]; Format:8.0; Threshold of color noise cancel */ + td_u8 color_noise_f_strength; /* RW; Range:[0x0, 0x8]; Format:4.0; Strength of color noise cancel */ + td_u8 color_noise_y_threshold; /* RW; Range:[0x0, 0xF]; + Format:8.0; Range of color denoise luma, related to luminance and saturation */ + td_u8 color_noise_y_strength; /* RW; Range:[0x0, 0x3F]; Format:8.0;Format:8.0; Strength of color denoise luma */ +} ot_isp_demosaic_manual_attr; + +typedef struct { + td_u8 nddm_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ + td_u8 nddm_mf_detail_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x7f]; Format:3.4; + Non-direction medium frequent detail enhance strength */ + td_u8 nddm_hf_detail_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x10]; Format:2.2; Non-direction + high frequent detail enhance strength */ + td_u8 detail_smooth_range[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x1, 0x7]; Format:4.0; Detail smooth range */ + td_u8 color_noise_f_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xff]; Format:8.0; + Threshold of color noise cancel */ + td_u8 color_noise_f_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x8]; Format:4.0; Strength of color + noise cancel */ + td_u8 color_noise_y_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xF]; Format:8.0; + Range of color denoise luma, related to luminance and saturation */ + td_u8 color_noise_y_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0x3F]; Format:8.0;Format:8.0; + Strength of color denoise luma */ +} ot_isp_demosaic_auto_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable demosaic module */ + ot_op_mode op_type; + td_u16 ai_detail_strength; /* RW; Range:[0x0, 0x1FF]; Format:9.0; ai detail strength */ + ot_isp_demosaic_manual_attr manual_attr; + ot_isp_demosaic_auto_attr auto_attr; +} ot_isp_demosaic_attr; + +/* Defines the attributes of the ISP black level */ +typedef enum { + OT_ISP_BLACK_LEVEL_MODE_AUTO = 0, + OT_ISP_BLACK_LEVEL_MODE_MANUAL = 1, + OT_ISP_BLACK_LEVEL_MODE_DYNAMIC = 2, + OT_ISP_BLACK_LEVEL_MODE_BUTT +} ot_isp_black_level_mode; + +typedef struct { + td_u16 black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0x3FFF];Format:14.0; + sensor Black level values that correspond to the black levels of the + R,Gr, Gb, and B components respectively. */ +} ot_isp_black_level_manual_attr; + +typedef enum { + OT_ISP_DYNAMIC_PATTERN_RGB = 0, + OT_ISP_DYNAMIC_PATTERN_RGBIR, + OT_ISP_DYNAMIC_PATTERN_BUTT +} ot_isp_black_level_dynamic_pattern; + +typedef struct { + ot_isp_black_level_dynamic_pattern pattern; /* RW; Range: [0, 1]; The pattern of raw. */ + ot_rect ob_area; /* RW; xRange: [0, width of the ob_area]; yRange: [0, height of the ob_area]; + obWidthRange: [0, width of the ob_area - x]; obHeightRange: [0, height of ob_area - y]; + The size of OB area. */ + td_u16 low_threshold; /* RW; Range: [0x0, 0xFFF]; Format:14.0;Lower limit of normal pixel value; */ + td_u16 high_threshold; /* RW; Range: [0x0, 0x3FFF]; Format:14.0;Higher limit of normal pixel value; */ + td_s16 offset[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [-0x3FFF, 0x3FFF]; Format:15.0;Offset limit of dynamic blc; */ + td_u16 tolerance; /* RW; Range: [0x0, 0x3FFF]; Format:14.0;Tolerance limit of dynamic blc; */ + td_u8 filter_strength; /* RW; Range: [0, 64];Format:6.0; ob black level minus light black level */ + td_bool separate_en; /* RW; Range: [0, 1]; set rggb black level separately */ + td_u16 calibration_black_level[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0x0, 0x3FFF]; Format:14.0; + dynamic blc of again; */ + td_u16 filter_thr; /* RW; Range: [0, 0x3FFF]; Format:14.0; black level IIR filter threshold; */ +} ot_isp_black_level_dynamic_attr; + +typedef struct { + td_bool user_black_level_en; + td_u16 user_black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0x3FFF];Format:14.0; + user define Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ + ot_isp_black_level_mode black_level_mode; + ot_isp_black_level_manual_attr manual_attr; + ot_isp_black_level_dynamic_attr dynamic_attr; +} ot_isp_black_level_attr; + +/* + Defines the FPN removal type + 0 = Frame mode correction + 1 = Line mode correction + */ +typedef enum { + OT_ISP_FPN_TYPE_FRAME = 0, + OT_ISP_FPN_TYPE_LINE = 1, + OT_ISP_FPN_TYPE_BUTT +} ot_isp_fpn_type; + +/* + Defines the FPN frame output mode + 0: the pixel value algin with the least significant bit (right-most bit) + 1: the pixel value algin with the most significant bit (left-most bit) + */ +typedef enum { + OT_ISP_FPN_OUT_MODE_NORM = 0, + OT_ISP_FPN_OUT_MODE_HIGH, + OT_ISP_FPN_OUT_MODE_BUTT +} ot_isp_fpn_out_mode; + +/* Defines the information about calibrated black frames */ +typedef struct { + td_u32 iso; /* RW;Range:[0x64,0xFFFFFFFF];Format:32.0;FPN CALIBRATE ISO */ + td_u32 offset[OT_ISP_STRIPING_MAX_NUM]; /* RW;Range:[0, 0x3FFF];Format:14.0; + FPN frame u32Offset (agv pixel value), + only higher 12bits valid */ + td_u32 frm_size; /* RW;FPN frame size (exactly frm size or compress len) */ + ot_video_frame_info fpn_frame; /* FPN frame info, 8bpp,10bpp,12bpp,16bpp. Compression or not */ +} ot_isp_fpn_frame_info; + +/* Defines the calibration attribute of the FPN removal module */ +typedef struct { + td_u32 threshold; /* RW;Range:[1,0xFFF];Format:12.0;pix value > threshold means defective pixel */ + td_u32 frame_num; /* RW;Range:[1, 16];Format:5.0;Number of frames to be calibrated. + The value range is {1, 2, 4, 8, 16},that is, the integer exponentiation of 2 */ + ot_isp_fpn_type fpn_type; /* frame mode or line mode */ + ot_isp_fpn_frame_info fpn_cali_frame; + ot_isp_fpn_out_mode fpn_mode; /* FPN frame output mode, for normal use, set to 0 */ +} ot_isp_fpn_calibrate_attr; + +/* Defines the manual correction attribute of the FPN removal module */ +typedef struct { + td_u32 strength; /* RW;Range:[0,1023];Format:10.0;Manual correction strength */ +} ot_isp_fpn_manual_attr; + +/* Defines the automatic correction attribute of the FPN removal module */ +typedef struct { + td_u32 strength; /* RW;Range:[0,1023];Format:10.0;Auto correction strength */ +} ot_isp_fpn_auto_attr; + +/* Defines the correction attribute of the FPN removal module */ +typedef struct { + td_bool enable; /* RW;Range:[0,1];Format:1.0; */ + td_bool aibnr_mode; /* RW;Range:[0,1];Format:1.0; */ + ot_op_mode op_type; /* manual or auto mode */ + ot_isp_fpn_type fpn_type; + ot_isp_fpn_frame_info fpn_frm_info; + ot_isp_fpn_manual_attr manual_attr; + ot_isp_fpn_auto_attr auto_attr; +} ot_isp_fpn_attr; + +/* Defines the manual dehaze attribute */ +typedef struct { + td_u8 strength; /* RW;Range:[0,0xFF];Format:8.0;Manual dehaze strength */ +} ot_isp_dehaze_manual_attr; + +/* Defines the automatic dehaze attribute */ +typedef struct { + td_u8 strength; /* RW;Range:[0,0xFF];Format:8.0;Weighted coefficient for automatic dehaze strength. */ +} ot_isp_dehaze_auto_attr; + +/* Defines the ISP dehaze attribute */ +typedef struct { + td_bool enable; /* RW;Range:[0,1];Format:1.0; */ + td_bool user_lut_en; /* RW;Range:[0,1];0:Auto Lut 1:User Lut */ + td_u8 dehaze_lut[OT_ISP_DEHAZE_LUT_SIZE]; + ot_op_mode op_type; + ot_isp_dehaze_manual_attr manual_attr; + ot_isp_dehaze_auto_attr auto_attr; + td_u16 tmprflt_incr_coef; /* RW, Range: [0x0, 0x80].filter increase coefficient. */ + td_u16 tmprflt_decr_coef; /* RW, Range: [0x0, 0x80].filter decrease coefficient. */ +} ot_isp_dehaze_attr; + +/* Defines purple fringing correction attribute */ +typedef struct { + td_u16 edge_threshold[OT_ISP_CAC_THR_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 4095]; + format:12.0; cac edge threshold */ + td_u16 edge_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 1023]; format:10.0; cac edge gain */ + td_u16 cac_rb_strength[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 31]; format:5.0; cac strength on rb */ + td_u16 purple_alpha[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 63]; format:6.0; cac purple alpha */ + td_u16 edge_alpha[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 63]; format:6.0; cac edge alpha */ + td_u16 satu_low_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 4095]; format:12.0; cac purple saturation + low threshold */ + td_u16 satu_high_threshold[OT_ISP_AUTO_ISO_NUM]; /* RW; range: [0, 16383]; format:14.0; cac purple saturation + high threshold */ +} ot_isp_cac_acac_auto_attr; + +typedef struct { + td_u16 edge_threshold[OT_ISP_CAC_THR_NUM]; /* RW; range: [0, 4095]; format:12.0; cac edge threshold */ + td_u16 edge_gain; /* RW; range: [0, 1023]; format:10.0; cac edge gain */ + td_u16 cac_rb_strength; /* RW; range: [0, 31]; format:5.0; cac strength on rb */ + td_u16 purple_alpha; /* RW; range: [0, 63]; format:6.0; cac purple alpha */ + td_u16 edge_alpha; /* RW; range: [0, 63]; format:6.0; cac edge alpha */ + td_u16 satu_low_threshold; /* RW; range: [0, 4095]; format:12.0; cac purple saturation low threshold */ + td_u16 satu_high_threshold; /* RW; range: [0, 16383]; format:14.0; cac purple saturation high threshold */ +} ot_isp_cac_acac_manual_attr; + +typedef struct { + ot_isp_cac_acac_manual_attr acac_manual; + ot_isp_cac_acac_auto_attr acac_auto; +} ot_isp_cac_acac_attr; + +typedef struct { + td_u8 de_purple_cr_strength[OT_ISP_CAC_EXP_RATIO_NUM]; /* RW; range: [0, 8]; format:4.0; + correction strength of the R channel */ + td_u8 de_purple_cb_strength[OT_ISP_CAC_EXP_RATIO_NUM]; /* RW; range: [0, 8]; format:4.0; + correction strength of the B channel */ +} ot_isp_cac_lcac_auto_attr; + +typedef struct { + td_u8 de_purple_cr_strength; /* RW; range: [0, 8]; format:4.0; correction strength of the R channel */ + td_u8 de_purple_cb_strength; /* RW; range: [0, 8]; format:4.0; correction strength of the B channel */ +} ot_isp_cac_lcac_manual_attr; + +typedef struct { + td_u16 purple_detect_range; /* RW; range: [0, 410]; format:9.0; purple fringing detection scope */ + td_u16 var_threshold; /* RW; range: [0, 4095]; format:12.0; edge detection threshold */ + td_u16 r_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component R detection thd */ + td_u16 g_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component G detection thd */ + td_u16 b_detect_threshold[OT_ISP_CAC_CURVE_NUM]; /* RW; range: [0,4095]; format:12.0; component B detection thd */ + ot_isp_cac_lcac_manual_attr lcac_manual; + ot_isp_cac_lcac_auto_attr lcac_auto; +} ot_isp_cac_lcac_attr; + +typedef struct { + td_bool enable; /* RW; range: [0, 1]; format:1.0; cac enable */ + ot_op_mode op_type; /* RW; range: [0, 1]; format:1.0; purple fringing correction working mode */ + td_u8 detect_mode; /* RW; range: [0, 2]; format:2.0; cac edge detect mode */ + td_s16 purple_upper_limit; /* RW; range: [-2048,2047]; format:s12.0; cac purple high limitation */ + td_s16 purple_lower_limit; /* RW; range: [-2048,2047]; format:s12.0; cac purple low limitation */ + ot_isp_cac_acac_attr acac_cfg; + ot_isp_cac_lcac_attr lcac_cfg; +} ot_isp_cac_attr; + + +typedef struct { + td_u8 mf_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];mf_strength. */ + td_u8 hf_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];hf_strength. */ + td_u8 dark_strength[OT_ISP_BSHP_CURVE_NUM]; /* RW; range:[0, 63];dark_strength. */ + td_u8 mf_gain; /* RW; range:[0, 15];format:4.0; mf gain */ + td_u8 hf_gain; /* RW; range:[0, 15];format:4.0; hf gain */ + td_u8 dark_gain; /* RW; range:[0, 15];format:4.0; dark gain */ + td_u16 overshoot; /* RW; range:[0, 255];format:8.0; over shoot */ + td_u16 undershoot; /* RW; range:[0, 255];format:8.0; under shoot */ +} ot_isp_bayershp_manual_attr; + +typedef struct { + td_u8 mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];mf_strength. */ + td_u8 hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];hf_strength. */ + td_u8 dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 63];dark_strength. */ + td_u8 mf_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; mf gain */ + td_u8 hf_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; hf gain */ + td_u8 dark_gain[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 15];format:4.0; dark gain */ + td_u16 overshoot[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 255];format:8.0; over shoot */ + td_u16 undershoot[OT_ISP_AUTO_ISO_NUM]; /* RW; range:[0, 255];format:8.0; under shoot */ +} ot_isp_bayershp_auto_attr; + +typedef struct { + td_bool enable; /* RW; range:[0, 1]; format:1.0;en/disable bayershrpen module */ + td_u16 dark_threshold[OT_ISP_BSHP_THD_NUM]; /* RW; range:[0, 4095];format:12.0; dark threshold */ + td_u16 texture_threshold[OT_ISP_BSHP_THD_NUM]; /* RW; range:[0, 4095];format:12.0; texture threshold */ + ot_op_mode op_type; + ot_isp_bayershp_manual_attr manual_attr; + ot_isp_bayershp_auto_attr auto_attr; +} ot_isp_bayershp_attr; + +/* Defines the Radial Crop attribute */ +typedef struct { + td_bool enable; /* RW;Range:[0, 1];Format:1.0; enable/disable ridial crop */ + ot_point center_coord; /* RW;the coordinate of central pixel */ + td_u32 radius; /* RW;Range:[0, 11586];Format:14.0; when the distance to central pixel is greater than + u32Radius, the pixel value becomes 0. */ +} ot_isp_rc_attr; + +typedef struct { + td_u16 texture_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* R; range: [0, 4095]; Format:7.5;Undirectional sharpen + strength for texture and detail enhancement */ + td_u16 edge_strength[OT_ISP_SHARPEN_GAIN_NUM]; /* R; range: [0, 4095]; Format:7.5;Directional sharpen strength + for edge enhancement */ + td_u16 texture_freq; /* R; range: [0, 4095];Format:6.6; Texture frequency adjustment. + Texture and detail will be finer when it increase */ + td_u16 edge_freq; /* R; range: [0, 4095];Format:6.6; Edge frequency adjustment. + Edge will be narrower and thiner when it increase */ + td_u8 over_shoot; /* R; range: [0, 127]; Format:7.0;u8OvershootAmt */ + td_u8 under_shoot; /* R; range: [0, 127]; Format:7.0;u8UndershootAmt */ + td_u8 shoot_sup_strength; /* R; range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, + the amplitude and width of shoot will be decrease when shootSupSt increase */ + + td_u8 nr_lsc_ratio; /* R;Range:[0x0, 0xf];Format:4.0; lsc nr ratio */ + td_u16 coarse_strength[OT_ISP_BAYER_CHN_NUM]; /* R;Range:[0x0, 0x360];Format:10.0; + Coarse Strength of noise reduction */ + td_u8 wdr_frame_strength[OT_ISP_WDR_MAX_FRAME_NUM]; /* R;Range:[0x0, 0x40];Format:7.0; + Coarse strength of each frame in wdr mode */ + td_u8 fine_strength; /* R;Range:[0x0,0x80];Format:8.0;Strength of Luma noise reduction */ + td_u16 coring_wgt; /* R;Range:[0x0,0xC80];Format:12.0;Strength of reserving the random noise */ + + td_u16 dehaze_strength_actual; /* R;Range:[0,0xFF];Format:8.0;actual dehaze strength */ + td_u16 drc_strength_actual; /* R;Range: Hi3519DV500 = [0x0, 0x3FF]; + Strength of dynamic range compression. + Higher values lead to higher differential gain between shadows and highlights. */ + td_u32 wdr_exp_ratio_actual[OT_ISP_WDR_MAX_FRAME_NUM - 1]; /* R; Range:[0x40, 0x4000]; Format:26.6; + 0x40 means 1 times. + When enExpRatioType is OT_OP_MODE_AUTO, u32ExpRatio is invalid. + When enExpRatioType is OT_OP_MODE_MANUAL, u32ExpRatio is + quotient of long exposure time / short exposure time. */ + td_bool wdr_switch_finish; /* R; Range:[0, 1];Format:1.0;TD_TRUE: WDR switch is finished */ + td_bool res_switch_finish; /* R; Range:[0, 1];Format:1.0;TD_TRUE: Resolution switch is finished */ + td_u16 black_level_actual[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0x3FFF];Format:14.0; + Actual Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ + + td_u16 sns_black_level[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0x3FFF];Format:14.0; + sesnor Black level values that correspond to the black levels of + the R,Gr, Gb, and B components respectively. */ +} ot_isp_inner_state_info; + +typedef enum { + OT_ISP_AI_NONE = 0, + OT_ISP_AI_BNR, + OT_ISP_AI_DRC, + OT_ISP_AI_DEMOSAIC, + OT_ISP_AI_BUTT +} ot_isp_ai_mode; + +/* + The position of AE histogram in ISP BE pipeline + 0 = After DG; + 1 = After static WB; + 2 = After DRC; + */ +typedef enum { + OT_ISP_AE_AFTER_DG = 0, + OT_ISP_AE_AFTER_WB, + OT_ISP_AE_AFTER_DRC, + OT_ISP_AE_SWITCH_BUTT +} ot_isp_ae_switch; + +/* + FourPlaneMode enable + 0 : Disabled; + 1 : Enabled +*/ +typedef enum { + OT_ISP_AE_FOUR_PLANE_MODE_DISABLE = 0, + OT_ISP_AE_FOUR_PLANE_MODE_ENABLE, + OT_ISP_AE_FOUR_PLANE_MODE_BUTT +} ot_isp_ae_four_plane_mode; + +typedef enum { + OT_ISP_AE_HIST_SKIP_EVERY_PIXEL = 0, + OT_ISP_AE_HIST_SKIP_EVERY_2ND_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_3RD_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_4TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_5TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_8TH_PIXEL, + OT_ISP_AE_HIST_SKIP_EVERY_9TH_PIXEL, + OT_ISP_AE_HIST_SKIP_BUTT +} ot_isp_ae_hist_skip; + +typedef enum { + OT_ISP_AE_HIST_START_FORM_FIRST_COLUMN = 0, + OT_ISP_AE_HIST_START_FORM_SECOND_COLUMN, + OT_ISP_AE_HIST_OFFSET_X_BUTT +} ot_isp_ae_hist_offset_x; + +typedef enum { + OT_ISP_AE_HIST_START_FORM_FIRST_ROW = 0, + OT_ISP_AE_HIST_START_FORM_SECOND_ROW, + OT_ISP_AE_HIST_OFFSET_Y_BUTT +} ot_isp_ae_hist_offset_y; + +/* Defines the mode configuration for the sampling points during global histogram statistics. */ +typedef struct { + ot_isp_ae_hist_skip hist_skip_x; /* RW; Range:[0, 6]; Format:4.0; + Histogram decimation in horizontal direction: 0=every pixel; + 1=every 2nd pixel; 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; + 5=every 8th pixel ; 6+=every 9th pixel */ + ot_isp_ae_hist_skip hist_skip_y; /* RW; Range:[0, 6]; Format:4.0; + Histogram decimation in vertical direction: 0=every pixel; 1=every 2nd pixel; + 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; 5=every 8th pixel; + 6+=every 9th pixel */ + ot_isp_ae_hist_offset_x hist_offset_x; /* RW; Range:[0, 1]; Format:1.0; + 0= start from the first column; 1=start from second column */ + ot_isp_ae_hist_offset_y hist_offset_y; /* RW; Range:[0, 1]; Format:1.0; + 0= start from the first row; 1= start from second row */ +} ot_isp_ae_hist_config; + +typedef enum { + OT_ISP_AE_NORMAL = 0, + OT_ISP_AE_ROOT, + OT_ISP_AE_STAT_MODE_BUTT +} ot_isp_ae_stat_mode; + +/* Crops the input image of the AE module */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0;AE crop enable. */ + td_u16 x; /* RW; Range: Hi3519DV500 = [0, 8192 - 256]; + Format:13.0;AE image crop start x, limited range:[0, ImageWidth - 256] */ + td_u16 y; /* RW; Range: Hi3519DV500 = [0, 8192 - 120]; + Format:13.0;AEimage crop start y, limited range:[0, ImageHeight - 120] */ + td_u16 width; /* RW; Range: Hi3519DV500 = [256, 8192]; + Format:14.0;AE image crop width, limited range:[256, ImageWidth] */ + td_u16 height; /* RW; Range: Hi3519DV500 = [120, 8192]; + Format:14.0;AE image crop height limited range:[120, ImageHeight] */ +} ot_isp_ae_crop; + +/* config of statistics structs */ +typedef struct { + ot_isp_ae_switch ae_switch; /* RW; Range:[0, 2]; Format:2.0; + The position of AE histogram in ISP BE pipeline */ + ot_isp_ae_hist_config hist_config; + ot_isp_ae_four_plane_mode four_plane_mode; /* RW; Range:[0, 1]; Format:2.0;Four Plane Mode Enable */ + ot_isp_ae_stat_mode hist_mode; /* RW; Range:[0, 1]; Format:2.0;AE Hist Rooting Mode */ + ot_isp_ae_stat_mode aver_mode; /* RW; Range:[0, 1]; Format:2.0;AE Aver Rooting Mode */ + ot_isp_ae_stat_mode max_gain_mode; /* RW; Range:[0, 1]; Format:2.0;Max Gain Rooting Mode */ + ot_isp_ae_crop crop; /* RW; AE input image crop for module */ + ot_isp_ae_crop fe_crop; /* RW; AE input image crop for FE module */ + td_u8 weight[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]; /* RW; Range:[0x0, 0xF]; Format:4.0; AE weighting table */ +} ot_isp_ae_stats_cfg; + +/* Smart Info */ +#define OT_ISP_PEOPLE_CLASS_MAX 2 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable smart roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u8 luma; /* R; Range:[0x00, 0xFF]; luma of roi area */ +} ot_isp_people_roi; + +typedef enum { + OT_ISP_FACE_INDEX = 0, + OT_ISP_PEOPLE_INDEX = 1, + OT_ISP_PEOPLE_BUTT +} ot_isp_people_type; + +#define OT_ISP_TUNNEL_CLASS_MAX 2 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable tunnel roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u32 tunnel_area_ratio; /* R; Range:[0, 10000]; the proportion of tunnels in the whole picture */ + td_u32 tunnel_exp_perf; /* R; Range:[0, 10000]; the performance of tunnels exposure result */ +} ot_isp_tunnel_roi; + +typedef enum { + OT_ISP_TUNNEL_IN_INDEX = 0, + OT_ISP_TUNNEL_OUT_INDEX = 1, + OT_ISP_TUNNEL_BUTT +} ot_isp_tunnel_type; + +#define OT_ISP_FACE_NUM 5 +typedef struct { + td_bool enable; /* R; Range:[0, 1]; enable fast face roi info */ + td_bool available; /* R; Range:[0, 1]; whether roi area is available */ + td_u64 frame_pts; /* pts of face info */ + ot_rect face_rect[OT_ISP_FACE_NUM]; /* face roi rect */ +} ot_isp_face_roi; + +typedef struct { + ot_isp_people_roi people_roi[OT_ISP_PEOPLE_CLASS_MAX]; /* people ae info */ + ot_isp_tunnel_roi tunnel_roi[OT_ISP_TUNNEL_CLASS_MAX]; /* tunnels ae info */ + ot_isp_face_roi face_roi; /* fast face ae info */ +} ot_isp_smart_info; + +/* fines whether the peak value of the zoned IIR statistics is calculated. */ +typedef enum { + OT_ISP_AF_STA_NORM = 0, /* use every value of the block statistic */ + OT_ISP_AF_STA_PEAK, /* use the maximum value in one line of the block statistic */ + OT_ISP_AF_STA_BUTT +} ot_isp_af_peak_mode; + +/* Defines whether the zoned statistics are squared in square mode. */ +typedef enum { + OT_ISP_AF_STA_SUM_NORM = 0, /* statistic value accumulate */ + OT_ISP_AF_STA_SUM_SQUARE, /* statistic value square then accumulate */ + OT_ISP_AF_STA_SUM_BUTT +} ot_isp_af_square_mode; +/* Crops the input image of the AF module. */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0; AF crop enable */ + td_u16 x; /* RW; Range: Hi3519DV500 = [0, 7936]; + Format:13.0;AF image crop start x, limited range:[0, ImageWidth-256] */ + td_u16 y; /* RW; Range: Hi3519DV500 = [0, 8072]; + Format:13.0;AF image crop start y, limited range:[0, ImageHeight-120] */ + td_u16 width; /* RW; Range: Hi3519DV500 = [256, 8192]; + Format:14.0;AF image crop width, limited range:[256, ImageWidth] */ + td_u16 height; /* RW; Range: Hi3519DV500 = [120, 8192]; + Format:14.0;AF image crop height, limited range:[120, ImageHeight] */ +} ot_isp_af_crop; + +/* Defines the position of AF module statistics. */ +typedef enum { + OT_ISP_AF_STATS_AFTER_DGAIN = 0, /* The AF module is placed in the raw field for statistics,AF after DGain */ + OT_ISP_AF_STATS_AFTER_DRC, /* The AF module is placed in the raw field for statistics,AF after DRC */ + OT_ISP_AF_STATS_AFTER_CSC, /* The AF module is placed in the YUV field for statistics,AF after CSC */ + OT_ISP_AF_STATS_BUTT +} ot_isp_af_stats_pos; + +/* Configures the Bayer field of the AF module. */ +typedef struct { + td_u8 gamma_gain_limit; /* RW; Range: [0x0, 0x5]; Format:3.0; Not support for Hi3519DV500 */ + td_u8 gamma_value; /* RW; Range: SD3403V100 = [0x0, 0x6]| Hi3519DV500 = [0x0, 0x1]; */ + ot_isp_bayer_format bayer_format; /* RW; Range: [0x0, 0x3]; Format:2.0;raw domain pattern */ +} ot_isp_af_raw_cfg; + +/* Configures the pre-filter of the AF module. */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0; pre filter enable . */ + td_u16 strength; /* RW; Range: [0x0, 0xFFFF]; Format:16.0;pre filter strength */ +} ot_isp_af_pre_filter_cfg; + +/* Defines AF statistics configuration parameters. */ +typedef struct { + td_bool af_en; /* RW; Range: [0,1]; AF enable. */ + td_u16 zone_col; /* RW; Range: [1, 17]; AF statistic window horizontal block. */ + td_u16 zone_row; /* RW; Range: [1, 15]; AF statistic window vertical block. */ + ot_isp_af_peak_mode peak_mode; /* RW; Range: [0,1]; AF peak value statistic mode. */ + ot_isp_af_square_mode square_mode; /* RW; Range: [0,1]; AF statistic square accumulate. */ + ot_isp_af_crop crop; /* RW; AF input image crop */ + ot_isp_af_crop fe_crop; /* RW; AF input image crop for FE module */ + ot_isp_af_stats_pos stats_pos; /* RW; Range: [0,2]; AF statistic position, it can be set to yuv or raw */ + ot_isp_af_raw_cfg raw_cfg; /* RW; When AF locate at RAW domain, these para should be cfg. */ + ot_isp_af_pre_filter_cfg pre_flt_cfg; /* RW; pre filter cfg */ + td_u16 high_luma_threshold; /* RW; Range: [0,0xFF]; high luma threshold. */ +} ot_isp_af_cfg; + +/* Configures the AF level depend gain module. */ +typedef struct { + td_bool enable; /* RW; Range: [0, 1]; FILTER level depend gain enable. */ + td_u16 threshold_low; /* RW; range: [0x0, 0xFF]; FILTER level depend th low */ + td_u16 gain_low; /* RW; range: [0x0, 0xFF]; FILTER level depend gain low */ + td_u16 slope_low; /* RW; range: [0x0, 0xF]; FILTER level depend slope low */ + td_u16 threshold_high; /* RW; range: [0x0, 0xFF]; FILTER level depend th high */ + td_u16 gain_high; /* RW; range: [0x0, 0xFF]; FILTER level depend gain high */ + td_u16 slope_high; /* RW; range: [0x0, 0xF]; FILTER level depend slope high */ +} ot_isp_af_level_depend; + +/* Configures the AF coring module. */ +typedef struct { + td_u16 threshold; /* RW; Range: [0x0, 0x7FF];FILTER coring threshold. */ + td_u16 slope; /* RW; Range: [0x0, 0xF]; FILTER Coring Slope */ + td_u16 limit; /* RW; Range: [0x0, 0x7FF];FILTER coring limit */ +} ot_isp_af_coring; + +#define OT_ISP_IIR_EN_NUM 3 +#define OT_ISP_IIR_GAIN_NUM 7 +#define OT_ISP_IIR_SHIFT_NUM 4 +/* Defines the IIR parameter configuration of horizontal filters for AF statistics. */ +typedef struct { + td_bool narrow_band_en; /* RW; Range: [0, 1]; IIR narrow band enable. */ + td_bool iir_en[OT_ISP_IIR_EN_NUM]; /* RW; Range: [0, 1]; IIR enable. */ + td_u8 iir_shift; /* RW; Range: [0, 63]; IIR Shift */ + td_s16 iir_gain[OT_ISP_IIR_GAIN_NUM]; /* RW; Range: [-511, 511]. IIR gain,gain0 range:[0,255]. */ + td_u16 iir_shift_lut[OT_ISP_IIR_SHIFT_NUM]; /* RW; Range: [0x0, 0x7]; IIR shift. */ + ot_isp_af_level_depend level_depend; /* RW; filter level depend. */ + ot_isp_af_coring coring; /* RW; filter coring. */ +} ot_isp_af_h_param; + +#define OT_ISP_FIR_GAIN_NUM 5 + +typedef struct { + td_s16 fir_gain[OT_ISP_FIR_GAIN_NUM]; /* RW; Range: [-31, 31]; FIR gain. */ + ot_isp_af_level_depend level_depend; /* RW; filter level depend. */ + ot_isp_af_coring coring; /* RW; filter coring. */ +} ot_isp_af_v_param; + +#define OT_ISP_ACC_SHIFT_H_NUM 2 +#define OT_ISP_ACC_SHIFT_V_NUM 2 +typedef struct { + td_u16 acc_shift_y; /* RW; Range: [0x0, 0xF]; luminance Y statistic shift. */ + td_u16 acc_shift_h[OT_ISP_ACC_SHIFT_H_NUM]; /* RW; Range: [0x0, 0xF]; IIR statistic shift. */ + td_u16 acc_shift_v[OT_ISP_ACC_SHIFT_V_NUM]; /* RW; Range: [0x0, 0xF]; FIR statistic shift. */ + td_u16 hl_cnt_shift; /* RW; Range: [0x0, 0xF]; High luminance counter shift */ +} ot_isp_af_fv_param; + +typedef struct { + ot_isp_af_cfg config; + ot_isp_af_h_param h_param_iir0; + ot_isp_af_h_param h_param_iir1; + ot_isp_af_v_param v_param_fir0; + ot_isp_af_v_param v_param_fir1; + ot_isp_af_fv_param fv_param; +} ot_isp_focus_stats_cfg; + +/* + the main purpose of stat key was to access individual statistic info separately... + ...for achieving performance optimization of CPU, because of we acquire stat... + ... in ISP_DRV ISR for our firmware reference and USER can also use alternative MPI... + ... to do this job, so bit1AeStat1~bit1AfStat for MPI behavior control, and bit16IsrAccess... + ... for ISR access control, they were independent. but they have the same bit order, for example... + ... bit1AeStat1 for MPI AeStat1 access key, and bit16 of u32Key for ISR AeStat1 access key + */ +typedef union { + td_u32 key; + struct { + td_u32 bit1_fe_ae_global_stat : 1; /* [0] */ + td_u32 bit1_fe_ae_local_stat : 1; /* [1] */ + td_u32 bit1_fe_ae_stitch_global_stat : 1; /* [2] */ + td_u32 bit1_fe_ae_stitch_local_stat : 1; /* [3] */ + td_u32 bit1_be_ae_global_stat : 1; /* [4] */ + td_u32 bit1_be_ae_local_stat : 1; /* [5] */ + td_u32 bit1_be_ae_stitch_global_stat : 1; /* [6] */ + td_u32 bit1_be_ae_stitch_local_stat : 1; /* [7] */ + td_u32 bit1_awb_stat1 : 1; /* [8] */ + td_u32 bit1_awb_stat2 : 1; /* [9] */ + td_u32 bit2_reserved0 : 2; /* [10:11] */ + td_u32 bit1_fe_af_stat : 1; /* [12] */ + td_u32 bit1_be_af_stat : 1; /* [13] */ + td_u32 bit2_reserved1 : 2; /* [14:15] */ + td_u32 bit1_dehaze : 1; /* [16] */ + td_u32 bit1_mg_stat : 1; /* [17] */ + td_u32 bit1_extend_stats : 1; /* [18] */ + td_u32 bit13_reserved : 13; /* [19:31] */ + }; +} ot_isp_stats_ctrl; + +/* statistics structs */ +#define OT_ISP_HIST_NUM 1024 + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AE_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AE_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_ae_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_MG_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_MG_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_mg_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AWB_ZONE_ORIG_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AWB_ZONE_ORIG_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_awb_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AF_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AF_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_focus_grid_info; + +typedef struct { + td_u32 fe_hist1024_value[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of FE */ + td_u16 fe_global_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of FE */ + td_u16 fe_zone_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of FE */ + td_u32 be_estimate_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Estimated Global 1024 bins histogram of BE */ + td_u32 be_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of BE */ + td_u16 be_global_avg[OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of BE */ + td_u16 be_zone_avg[OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; + Format:16.0; Zone average value of BE */ + ot_isp_ae_grid_info fe_grid_info; + ot_isp_ae_grid_info be_grid_info; + td_u64 pts; +} ot_isp_ae_stats; + +typedef struct { + td_u32 fe_hist1024_value[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of FE */ + td_u16 fe_global_avg[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; + Global average value of FE. */ + td_u16 fe_zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN]\ + [OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of FE. */ + td_u32 be_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; + Global 1024 bins histogram of BE. */ + td_u16 be_global_avg[OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Global average value of BE */ + td_u16 be_zone_avg[OT_ISP_MAX_STITCH_NUM][OT_ISP_AE_ZONE_ROW][OT_ISP_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of BE */ + td_u64 pts; +} ot_isp_ae_stitch_stats; + +typedef struct { + td_u16 zone_avg[OT_ISP_MG_ZONE_ROW][OT_ISP_MG_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; Range: [0x0, 0xFF]; + Format:8.0; Zone average value */ + ot_isp_mg_grid_info grid_info; +} ot_isp_mg_stats; + +typedef enum { + OT_ISP_AWB_AFTER_DG = 0, + OT_ISP_AWB_AFTER_EXPANDER, + OT_ISP_AWB_AFTER_DRC, + OT_ISP_AWB_SWITCH_BUTT +} ot_isp_awb_switch; + +/* Crops the input image of the AWB module */ +typedef struct { + td_bool enable; /* RW; Range: [0,1]; Format:1.0;AWB crop enable */ + td_u16 x; /* RW; Range: [0, 8192 - 20]; + Format:13.0; AWB image crop start x, limited range:[0, image_width - zone_col * 20] */ + td_u16 y; /* RW; Range: [0, 8192 - 15]; + Format:13.0; AWB image crop start y,limited range:[0, image_height - zone_row * 15] */ + td_u16 width; /* RW; Range: [20, 8192]; Format:14.0; + AWB image crop width, limited range:[zone_col * 20, image_width] */ + td_u16 height; /* RW; Range: [15, 8192]; Format:14.0; + AWB image crop height, limited range:[zone_row * 15, image_height] */ +} ot_isp_awb_crop; + +/* Defines the AWB statistics configuration */ +typedef struct { + ot_isp_awb_switch awb_switch; /* RW; Range: [0x0, 0x2]; Position of AWB statistics in pipeline */ + td_u16 zone_row; /* RW; Range: [0x1, 0x20]; Vertical Blocks, + limited range:[ceil(image_height / 1024), min(32, image_height / 15)] */ + td_u16 zone_col; /* RW; Range: [0x1, 0x20]; Horizontal Blocks, + limited range:[max(BlkNum, ceil(width / 1024)), min(32, image_width / 20)] */ + td_u16 white_level; /* RW; Range: [0x0, 0xFFFF];Upper limit of valid data for white region, + for Bayer statistics, [0x0, 0x3FF] for RGB statistics */ + td_u16 black_level; /* RW; Range: [0x0, 0xFFFF];limited range: [0x0, u16WhiteLevel], + Lower limit of valid data for white region . + for Bayer statistics, bitwidth is 12, for RGB statistics, bitwidth is 10 */ + td_u16 cb_max; /* RW; Range: [0x0, 0xFFF];Maximum value of B/G for white region */ + td_u16 cb_min; /* RW; Range: [0x0, 0xFFF]; + limited range: [0x0, u16CbMax]Minimum value of B/G for white region */ + td_u16 cr_max; /* RW; Range: [0x0, 0xFFF];Maximum value of R/G for white region */ + td_u16 cr_min; /* RW; Range: [0x0, 0xFFF]; + limited range: [0x0, u16CrMax],Minimum value of R/G for white region */ + ot_isp_awb_crop crop; +} ot_isp_wb_stats_cfg; + +typedef struct { + td_u16 zone_row; /* R; Range: [0x0, 0x20]; + effective horizontal block number for AWB statistic stitch window */ + td_u16 zone_col; /* R; Range: [0x0, 0x80]; + effective vetical block number for AWB statistic stitch window */ + td_u16 zone_avg_r[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average R for Stitich mode */ + td_u16 zone_avg_g[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average G for Stitich mode */ + td_u16 zone_avg_b[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average B for Stitich mode */ + td_u16 zone_count_all[OT_ISP_AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF]; + normalized number of Gray points for Stitich mode */ + td_u64 pts; +} ot_isp_wb_stitch_stats; + +typedef struct { + td_u16 global_r; /* R; Range: [0x0, 0xFFFF];Global WB output Average R */ + td_u16 global_g; /* R; Range: [0x0, 0xFFFF];Global WB output Average G */ + td_u16 global_b; /* R; Range: [0x0, 0xFFFF];Global WB output Average B */ + td_u16 count_all; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + + td_u16 zone_avg_r[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average R */ + td_u16 zone_avg_g[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average G */ + td_u16 zone_avg_b[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average B */ + td_u16 zone_count_all[OT_ISP_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + ot_isp_awb_grid_info grid_info; + td_u64 pts; +} ot_isp_wb_stats; + +typedef struct { + td_u16 v1; /* R; Range: [0x0, 0xFFFF];vertical fir block1 Statistics */ + td_u16 h1; /* R; Range: [0x0, 0xFFFF];horizontal iir block1 Statistics */ + td_u16 v2; /* R; Range: [0x0, 0xFFFF];vertical fir block2 Statistics */ + td_u16 h2; /* R; Range: [0x0, 0xFFFF];horizontal iir block2 Statistics */ + td_u16 y; /* R; Range: [0x0, 0xFFFF];Y Statistics */ + td_u16 hl_cnt; /* R; Range: [0x0, 0xFFFF];HlCnt Statistics */ +} ot_isp_focus_zone; + +typedef struct { + ot_isp_focus_zone zone_metrics[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; + The zoned measure of contrast */ +} ot_isp_fe_focus_stats; + +typedef struct { + ot_isp_focus_zone zone_metrics[OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */ +} ot_isp_be_focus_stats; + +typedef struct { + ot_isp_fe_focus_stats fe_af_stat; + ot_isp_be_focus_stats be_af_stat; + ot_isp_focus_grid_info fe_af_grid_info; + ot_isp_focus_grid_info be_af_grid_info; + td_u64 pts; +} ot_isp_af_stats; + +typedef struct { + td_bool enable; + ot_rect roi_rect; +} ot_isp_fe_roi_cfg; + +typedef struct { + ot_isp_stats_ctrl ctrl; + ot_isp_stats_ctrl update; + ot_isp_ae_stats_cfg ae_cfg; + ot_isp_wb_stats_cfg wb_cfg; + ot_isp_focus_stats_cfg focus_cfg; +} ot_isp_stats_cfg; + +typedef enum { + OT_ISP_DEBUG_AE = 0, + OT_ISP_DEBUG_AWB, + OT_ISP_DEBUG_BLC, + OT_ISP_DEBUG_DEHAZE, + OT_ISP_DEBUG_BUTT, +} ot_isp_debug_type; + +/* ISP debug information */ +typedef struct { + ot_isp_debug_type debug_type; /* RW; type of debug info */ + td_bool debug_en; /* RW; 1:enable debug, 0:disable debug */ + td_u64 phys_addr; /* RW; physics address of debug info */ + td_u32 depth; /* RW; depth of debug info */ +} ot_isp_debug_info; + +typedef struct { + td_u32 reserved; /* H;need to add member */ +} ot_isp_debug_attr; + +typedef struct { + td_u32 frame_num_begain; + td_u16 black_level_actual[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; BLC actual value */ + td_u16 black_level_original[OT_ISP_WDR_MAX_FRAME_NUM][OT_ISP_BAYER_CHN_NUM]; /* R; BLC logic value */ + td_u32 frame_num_end; +} ot_isp_debug_status; + +/* +0 = Communication between the sensor and the ISP over the I2C interface +1 = Communication between the sensor and the ISP over the SSP interface +*/ +typedef enum { + OT_ISP_SNS_TYPE_I2C = 0, + OT_ISP_SNS_TYPE_SSP, + + OT_ISP_SNS_TYPE_BUTT, +} ot_isp_sns_type; + +/* sensor communication bus */ +typedef union { + td_s8 i2c_dev; /* AUTO:ot_isp_sns_type:OT_ISP_SNS_TYPE_I2C */ + struct { + td_s8 bit4_ssp_dev : 4; + td_s8 bit4_ssp_cs : 4; + } ssp_dev; /* AUTO:ot_isp_sns_type:OT_ISP_SNS_TYPE_SSP */ +} ot_isp_sns_commbus; + +typedef struct { + td_bool update; /* RW; Range: [0x0, 0x1]; Format:1.0; + TD_TRUE: The sensor registers are written, + TD_FALSE: The sensor registers are not written */ + td_u8 delay_frame_num; /* RW; Number of delayed frames for the sensor register */ + td_u8 interrupt_pos; /* RW;Position where the configuration of the sensor register takes effect */ + /* 0x0,very short frame start interrupt, 0x1:very short frame end interrupt, + 0x10,short frame start interrupt, 0x11:short frame end interrupt, + 0x20,middle frame start interrupt, 0x21:middle frame end interrupt, + 0x30,long frame start interrupt, 0x31:long frame end interrupt */ + td_u8 dev_addr; /* RW;Sensor device address */ + td_u32 reg_addr; /* RW;Sensor register address */ + td_u32 addr_byte_num; /* RW;Bit width of the sensor register address */ + td_u32 data; /* RW;Sensor register data */ + td_u32 data_byte_num; /* RW;Bit width of sensor register data */ +} ot_isp_i2c_data; + +typedef struct { + td_bool update; /* RW; Range: [0x0, 0x1]; Format:1.0; + TD_TRUE: The sensor registers are written, + TD_FALSE: The sensor registers are not written */ + td_u8 delay_frame_num; /* RW; Number of delayed frames for the sensor register */ + td_u8 interrupt_pos; /* RW;Position where the configuration of the sensor register takes effect + 0x0,very short frame start interrupt, 0x1:very short frame end interrupt + 0x10,short frame start interrupt, 0x11:short frame end interrupt + 0x20,middle frame start interrupt, 0x21:middle frame end interrupt + 0x30,long frame start interrupt, 0x31:long frame end interrupt */ + + td_u32 dev_addr; /* RW;Sensor device address */ + td_u32 dev_addr_byte_num; /* RW;Bit width of the sensor device address */ + td_u32 reg_addr; /* RW;Sensor register address */ + td_u32 reg_addr_byte_num; /* RW;Bit width of the sensor register address */ + td_u32 data; /* RW;Sensor register data */ + td_u32 data_byte_num; /* RW;Bit width of sensor register data */ +} ot_isp_ssp_data; + +typedef struct { + ot_isp_sns_type sns_type; /* RW; Range:[0, 1]; Format: 1.0; + OT_ISP_SNS_TYPE_I2C: I2C interface type between the sensor and ISP, + OT_ISP_SNS_TYPE_SSP: SPI interface type between the sensor and ISP */ + td_u32 reg_num; /* RW;Number of registers required when exposure results are written to the sensor. + The member value cannot be dynamically changed */ + td_u8 cfg2_valid_delay_max; /* RW;Maximum number of delayed frames from the time when all sensor registers are + configured to the time when configurations take effect, which is used to ensure + the synchronization between sensor registers and ISP registers */ + + td_u32 exp_distance[OT_ISP_WDR_MAX_FRAME_NUM - 1]; /* RW; wdr sensor exposure distance, + not support for Hi3519DV500 */ + ot_isp_sns_commbus com_bus; + union { + ot_isp_i2c_data i2c_data[OT_ISP_MAX_SNS_REGS]; /* AUTO: ot_isp_sns_type:OT_ISP_SNS_TYPE_I2C */ + ot_isp_ssp_data ssp_data[OT_ISP_MAX_SNS_REGS]; /* AUTO: ot_isp_sns_type:OT_ISP_SNS_TYPE_SSP */ + }; + + struct { + td_bool update; + td_u8 delay_frame_num; + td_u32 slave_vs_time; /* RW;time of vsync. Unit: inck clock cycle */ + td_u32 slave_bind_dev; + } slv_sync; + + td_bool config; +} ot_isp_sns_regs_info; + +typedef enum { + OT_ISP_VD_FE_START = 0, + OT_ISP_VD_FE_END, + OT_ISP_VD_BE_END, + + OT_ISP_VD_BUTT +} ot_isp_vd_type; + +/* Defines the attributes of the virtual addresses for the registers of ISP submodules */ +typedef struct { + td_void *isp_ext_reg_addr; /* R;Start virtual address for the ISP external virtual registers */ + td_u32 isp_ext_reg_size; /* R;Size of the ISP external virtual registers */ + td_void *ae_ext_reg_addr; /* R;Start virtual address for the AE library module */ + td_u32 ae_ext_reg_size; /* R;Size of the AE library module */ + td_void *awb_ext_reg_addr; /* R;Start virtual address for the AWB library module */ + td_u32 awb_ext_reg_size; /* R;Size of the AWB library module */ +} ot_isp_reg_attr; + +/* AI structs */ +/* + Defines the ISP iris type + 0 = DC iris + 1 = P iris + */ +typedef enum { + OT_ISP_IRIS_TYPE_DC = 0, + OT_ISP_IRIS_TYPE_P, + + OT_ISP_IRIS_TYPE_BUTT, +} ot_isp_iris_type; + +/* Defines the F value of the ISP iris */ +typedef enum { + OT_ISP_IRIS_F_NO_32_0 = 0, + OT_ISP_IRIS_F_NO_22_0, + OT_ISP_IRIS_F_NO_16_0, + OT_ISP_IRIS_F_NO_11_0, + OT_ISP_IRIS_F_NO_8_0, + OT_ISP_IRIS_F_NO_5_6, + OT_ISP_IRIS_F_NO_4_0, + OT_ISP_IRIS_F_NO_2_8, + OT_ISP_IRIS_F_NO_2_0, + OT_ISP_IRIS_F_NO_1_4, + OT_ISP_IRIS_F_NO_1_0, + + OT_ISP_IRIS_F_NO_BUTT, +} ot_isp_iris_f_no; + +typedef struct { + td_s32 kp; /* RW; Range:[0, 100000]; Format:32.0; the proportional gain of PID algorithm, + default value is 7000 */ + td_s32 ki; /* RW; Range:[0, 1000]; Format:32.0; the integral gain of PID algorithm, + default value is 100 */ + td_s32 kd; /* RW; Range:[0, 100000]; Format:32.0; the derivative gain of PID algorithm, + default value is 3000 */ + td_u32 min_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the min pwm duty for dciris control */ + td_u32 max_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the max pwm duty for dciris control */ + td_u32 open_pwm_duty; /* RW; Range:[0, 1000]; Format:32.0; which is the open pwm duty for dciris control */ +} ot_isp_dciris_attr; + +typedef struct { + td_bool step_fno_table_change; /* W; Range:[0, 1]; Format:1.0; Step-F number mapping table change or not */ + td_bool zero_is_max; /* RW; Range:[0, 1]; Format:1.0; Step 0 corresponds to max aperture or not, + it's related to the specific iris */ + td_u16 total_step; /* RW; Range:[1, 1024]; Format:16.0; Total steps of Piris's aperture, + it's related to the specific iris */ + td_u16 step_count; /* RW; Range:[1, 1024]; Format:16.0; Used steps of Piris's aperture. + when Piris's aperture is too small, the F number precision is not enough, + so not all the steps can be used. It's related to the specific iris */ + td_u16 step_fno_table[OT_ISP_AI_MAX_STEP_FNO_NUM]; /* RW; Range:[1, 1024]; Format:16.0; Step-F number mapping table. + F1.0 is expressed as 1024, F32 is expressed as 1, + it's related to the specific iris */ + ot_isp_iris_f_no max_iris_fno_target; /* RW; Range:[0, 10]; Format:4.0; + Max F number of Piris's aperture, it's related to the specific iris */ + ot_isp_iris_f_no min_iris_fno_target; /* RW; Range:[0, 10]; Format:4.0; + Min F number of Piris's aperture, it's related to the specific iris */ + + td_bool fno_ex_valid; /* RW; Range:[0, 1]; Format:1.0; use equivalent gain to present FNO or not */ + td_u32 max_iris_fno_target_linear; /* RW; Range:[1, 1024]; Format:16.0; + Max equivalent gain of F number of Piris's aperture, + only used when bFNOExValid is true, it's related to the specific iris */ + td_u32 min_iris_fno_target_linear; /* RW; Range:[1, 1024]; Format:16.0; + Min equivalent gain of F number of Piris's aperture, + only used when bFNOExValid is true, it's related to the specific iris */ +} ot_isp_piris_attr; + +/* Defines the MI attribute */ +typedef struct { + td_u32 hold_value; /* RW; Range:[0, 1000]; Format:32.0; iris hold value for DC-iris */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; the F number of P-iris */ +} ot_isp_mi_attr; + +/* + Defines the ISP iris status + 0 = In this mode can set the MI holdvalue + 1 = Open Iris to the max + 2 = Close Iris to the min + */ +typedef enum { + OT_ISP_IRIS_KEEP = 0, + OT_ISP_IRIS_OPEN = 1, + OT_ISP_IRIS_CLOSE = 2, + OT_ISP_IRIS_BUTT +} ot_isp_iris_status; + +/* Defines the iris attribute */ +typedef struct { + td_bool enable; /* RW;iris enable/disable */ + ot_op_mode op_type; /* auto iris or manual iris */ + ot_isp_iris_type iris_type; /* DC-iris or P-iris */ + ot_isp_iris_status iris_status; /* RW; status of Iris */ + ot_isp_mi_attr mi_attr; +} ot_isp_iris_attr; + +/* AE structs */ +/* + Defines the AE mode + 0 = Automatic frame rate reduction mode (slow shutter mode) + 1 = Constant frame rate mode + */ +typedef enum { + OT_ISP_AE_MODE_SLOW_SHUTTER = 0, + OT_ISP_AE_MODE_FIX_FRAME_RATE = 1, + OT_ISP_AE_MODE_BUTT +} ot_isp_ae_mode; +/* + Defines the AE exposure policy mode + 0 = Highlight first exposure mode + 1 = Lowlight first exposure mode + */ +typedef enum { + OT_ISP_AE_EXP_HIGHLIGHT_PRIOR = 0, + OT_ISP_AE_EXP_LOWLIGHT_PRIOR = 1, + OT_ISP_AE_STRATEGY_MODE_BUTT +} ot_isp_ae_strategy; +/* Defines the maximum exposure time or gain and minimum exposure time or gain */ +typedef struct { + td_u32 max; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;Maximum value */ + td_u32 min; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;limited Range:[0,u32Max],Minimum value */ +} ot_isp_ae_range; + +/* Defines the ISP exposure delay attribute */ +typedef struct { + td_u16 black_delay_frame; /* RW; Range:[0, 65535]; Format:16.0; AE black delay frame count */ + td_u16 white_delay_frame; /* RW; Range:[0, 65535]; Format:16.0; AE white delay frame count */ +} ot_isp_ae_delay; + +/* + Defines the anti-flicker mode. + 0 = The epxosure time is fixed to be the multiplies of 1/(2*frequency) sec, + it may lead to over exposure in the high-luminance environments. + 1 = The anti flicker may be closed to avoid over exposure in the high-luminance environments. + */ +typedef enum { + OT_ISP_ANTIFLICKER_NORMAL_MODE = 0x0, + OT_ISP_ANTIFLICKER_AUTO_MODE = 0x1, + OT_ISP_ANTIFLICKER_MODE_BUTT +} ot_isp_antiflicker_mode; + +/* Defines the anti-flicker attribute */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + td_u8 frequency; /* RW; Range:[0, 255]; Format:8.0; + usually this value is 50 or 60 which is the frequency of the AC power supply */ + ot_isp_antiflicker_mode mode; +} ot_isp_antiflicker; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + + td_u8 luma_diff; /* RW; Range:[0, 100]; Format:8.0; if subflicker mode enable, current luma is less than AE + compensation plus LumaDiff, AE will keep min antiflicker shutter time + (for example: 1/100s or 1/120s) to avoid flicker. while current luma is larger than AE + compensation plus the LumaDiff, AE will reduce shutter time to avoid over-exposure and + introduce flicker in the pircture */ +} ot_isp_subflicker; + +typedef struct { + /* base parameter */ + ot_isp_ae_range exp_time_range; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; sensor exposure time (unit: us), + it's related to the specific sensor */ + ot_isp_ae_range a_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the + specific sensor */ + ot_isp_ae_range d_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the + specific sensor */ + ot_isp_ae_range ispd_gain_range; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain (unit: times, 10bit precision), it's related to the + ISP digital gain range */ + ot_isp_ae_range sys_gain_range; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + system gain (unit: times, 10bit precision), it's related to the specific sensor + and ISP Dgain range */ + td_u32 gain_threshold; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + Gain threshold for slow shutter mode (unit: times, 10bit precision) */ + + td_u8 speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; + AE adjust step for dark scene to bright scene switch */ + td_u16 black_speed_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; + AE adjust step bias for bright scene to dark scene switch */ + td_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE adjust tolerance */ + td_u8 compensation; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE compensation */ + td_u16 ev_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE EV bias */ + ot_isp_ae_strategy ae_strategy_mode; /* RW; Range:[0, 1]; Format:1.0; Support Highlight prior or Lowlight prior */ + td_u16 hist_ratio_slope; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE hist ratio slope */ + td_u8 max_hist_offset; /* RW; Range:[0x0, 0xFF]; Format:8.0; Max hist offset */ + + ot_isp_ae_mode ae_mode; /* RW; Range:[0, 1]; Format:1.0; AE mode(slow shutter/fix framerate)(onvif) */ + ot_isp_antiflicker antiflicker; + ot_isp_subflicker subflicker; + ot_isp_ae_delay ae_delay_attr; + + td_bool manual_exp_value; /* RW; Range:[0, 1]; Format:1.0; manual exposure value or not */ + td_u32 exp_value; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; manual exposure value */ + + ot_isp_fswdr_mode fswdr_mode; /* RW; Range:[0, 2]; Format:2.0; FSWDR running mode */ + td_bool wdr_quick; /* RW; Range:[0, 1]; Format:1.0; WDR use delay strategy or not; + If is true, WDR AE adjust will be faster */ + + td_u16 iso_cal_coef; /* RW; Range:[0x0, 0xFFFF]; Format:8.8; + The coefficient between Standard ISO and origin ISO (unit: times, 8bit precision) */ +} ot_isp_ae_attr; + +typedef struct { + ot_op_mode exp_time_op_type; + ot_op_mode a_gain_op_type; + ot_op_mode d_gain_op_type; + ot_op_mode ispd_gain_op_type; + + td_u32 exp_time; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 a_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 d_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 isp_d_gain; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain(unit: times, 10bit precision), it's related to the ISP digital gain range */ +} ot_isp_me_attr; + +typedef struct { + td_bool bypass; /* RW; Range:[0, 1]; Format:1.0; */ + ot_op_mode op_type; + td_u8 ae_run_interval; /* RW; Range:[0x1, 0xFF]; Format:8.0; set the AE run interval */ + td_bool hist_stat_adjust; /* RW; Range:[0, 1]; Format:1.0; + TD_TRUE: 256 bin histogram statistic config will adjust when large red or blue + area detected. + TD_FALSE: 256 bin histogram statistic config will not change */ + td_bool ae_route_ex_valid; /* RW; Range:[0, 1]; Format:1.0; use extend AE route or not */ + ot_isp_me_attr manual_attr; + ot_isp_ae_attr auto_attr; + ot_isp_prior_frame prior_frame; /* RW; Range:[0, 1]; Format:1.0; AE prior frame */ + td_bool ae_gain_sep_cfg; /* RW; Range:[0, 1]; Format:1.0; long and short frame gain separately configure or not */ + td_bool advance_ae; /* RW; Range:[0, 1]; Format:1.0; open advance AE or not */ +} ot_isp_exposure_attr; + +#define OT_ISP_AE_ROUTE_MAX_NODES 16 +typedef struct { + td_u32 int_time; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 sys_gain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; + system gain (unit: times, 10bit precision), it's related to the specific sensor and + ISP Dgain range */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; + the F number of the iris's aperture, only support for Piris */ + td_u32 iris_fno_lin; /* RW; Range:[0x1, 0x400]; Format:32.0; + the equivalent gain of F number of the iris's aperture, only support for Piris */ +} ot_isp_ae_route_node; + +typedef struct { + td_u32 total_num; /* RW; Range:[0, 0x10]; Format:8.0; total node number of AE route */ + ot_isp_ae_route_node route_node[OT_ISP_AE_ROUTE_MAX_NODES]; +} ot_isp_ae_route; + +#define OT_ISP_AE_ROUTE_EX_MAX_NODES 16 +typedef struct { + td_u32 int_time; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; + sensor exposure time (unit: us), it's related to the specific sensor */ + td_u32 a_gain; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; + sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 d_gain; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; + sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ + td_u32 isp_d_gain; /* RW; Range:[0x400, 0x40000]; Format:22.10; + ISP digital gain (unit: times, 10bit precision) */ + ot_isp_iris_f_no iris_fno; /* RW; Range:[0, 10]; Format:4.0; + the F number of the iris's aperture, only support for Piris */ + td_u32 iris_fno_lin; /* RW; Range:[0x1, 0x400]; Format:32.0; + the equivalent gain of F number of the iris's aperture, only support for Piris */ +} ot_isp_ae_route_ex_node; + +typedef struct { + td_u32 total_num; /* RW; Range:[0, 0x10]; Format:8.0; total node number of extend AE route */ + ot_isp_ae_route_ex_node route_ex_node[OT_ISP_AE_ROUTE_EX_MAX_NODES]; +} ot_isp_ae_route_ex; + +typedef struct { + td_u32 exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; Linear long_exp_time */ + td_u32 short_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 2To1 WDR long_exp_time */ + td_u32 median_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 3To1 WDR long_exp_time */ + td_u32 long_exp_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 4To1 WDR long_exp_time */ + td_u32 a_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 d_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 a_gain_sf; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 d_gain_sf; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 isp_d_gain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ + td_u32 exposure; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ + td_bool exposure_is_max; /* R; Range:[0, 1]; Format:1.0; */ + td_s16 hist_error; /* R; Range:[-32768, 32767]; Format:16.0; */ + td_u32 ae_hist1024_value[OT_ISP_HIST_NUM]; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; + 1024 bins histogram for channel 1 */ + + td_u8 ave_lum; /* R; Range:[0x0, 0xFF]; Format:8.0; */ + td_u32 lines_per500ms; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; exposure lines per 500ms */ + td_u32 piris_fno; /* R; Range:[0x0, 0x400]; Format:32.0; */ + td_u32 fps; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; actual fps */ + td_u32 iso; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + td_u32 isosf; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + td_u32 iso_calibrate; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ + td_u32 ref_exp_ratio; /* R; Range:[0x40, 0x4000]; Format:26.6; */ + td_u16 wdr_exp_coef; /* R; Range:[0x0, 0x400]; Format:6.10; 0x400 means 1 times */ + td_u32 first_stable_time; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; AE first stable time for quick start */ + td_u32 quick_star_iso; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ + ot_isp_ae_route ae_route; /* R; Actual AE route */ + ot_isp_ae_route_ex ae_route_ex; /* R; Actual AE route_ex */ + ot_isp_ae_route ae_route_sf; /* R; Actual AE route_sf */ + ot_isp_ae_route_ex ae_route_sf_ex; /* R; Actual AE route_sf_ex */ +} ot_isp_exp_info; + +typedef struct { + td_u32 reg_addr; + td_u32 reg_value; +} ot_isp_exp_param_reg; + +typedef struct { + td_u32 tar_fps; + td_u32 tar_isp_dgain; /* 10 bit */ + ot_isp_exp_param_reg time_reg[10]; /* default 10 */ + ot_isp_exp_param_reg again_reg[10]; /* default 10 */ + ot_isp_exp_param_reg dgain_reg[10]; /* default 10 */ +} ot_isp_exp_conv_param; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ + td_u8 face_tolerance; /* RW; Range:[0, 0xFF]; Format:8.0 */ + td_u8 face_comp; /* RW; Range:[0, 0xFF]; Format:8.0 */ + td_u8 stat_delay_num; /* RW; Range:[0, 10]; Format:4.0 */ + td_u8 speed; /* RW; Range:[0, 0x64]; Format:7.0 */ + td_u16 face_delay_num; /* RW; Range:[0, 0x400]; Format:11.0 */ +} ot_isp_fast_face_ae_attr; + +#define OT_ISP_EXP_RATIO_NUM 3 +typedef struct { + ot_op_mode exp_ratio_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The exp_ratio used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The exp_ratio used in ISP is set by exp_ratio */ + td_u32 exp_ratio[OT_ISP_EXP_RATIO_NUM]; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio is invalid. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio is quotient of + long exposure time / short exposure time. */ + td_u32 exp_ratio_max; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio_max is max(upper limit) of + exp_ratio generated by firmware. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio_max is invalid. */ + td_u32 exp_ratio_min; /* RW; Range:[0x40, 0x4000]; Format:26.6; limited Range:[0x40, exp_ratio_max], + 0x40 means 1 times. + When exp_ratio_type is OT_OP_MODE_AUTO, exp_ratio_min is min(lower limit) of + exp_ratio generated by firmware. + When exp_ratio_type is OT_OP_MODE_MANUAL, exp_ratio_min is invalid. */ + td_u16 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0;et the dynamic range tolerance. + Format: unsigned 6.2-bit fixed-point. 0x4 means 1dB. */ + td_u16 speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; exposure ratio adjust speed */ + td_u16 ratio_bias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; exposure ratio bias */ + td_u16 high_light_target; /* RW; Range:[0x0, 0x400]; Format:10.0; the high light target. */ + td_u16 exp_coef_min; /* RW; Range:[0x0, 0x400]; Format:6.10; 0x400 means 1 times; min exposure coefficient */ +} ot_isp_wdr_exposure_attr; + +typedef struct { + ot_op_mode exp_hdr_lv_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The ExpHDRLv used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The ExpHDRLv used in ISP is set by exp_hdr_lv */ + td_u32 exp_hdr_lv; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv is invalid. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv is the quotient of + exposure / linear exposure. */ + td_u32 exp_hdr_lv_max; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv_max is max(upper limit) of + ExpHDRLv generated by firmware. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv_max is invalid. */ + td_u32 exp_hdr_lv_min; /* RW; Range:[0x40, 0x400]; Format:26.6; limited range:[0x40, exp_hdr_lv_max], + 0x40 means 1 times. + When exp_hdr_lv_type is OT_OP_MODE_AUTO, exp_hdr_lv_min is min(lower limit) of + ExpHDRLv generated by firmware. + When exp_hdr_lv_type is OT_OP_MODE_MANUAL, exp_hdr_lv_min is invalid. */ + td_u32 exp_hdr_lv_weight; /* RW; Range:[0x0, 0x400]; Format:16.0; exposure HDR level weight. */ +} ot_isp_hdr_exposure_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; smart ae enable or not */ + td_bool ir_mode; /* RW; Range:[0, 1]; Format:1.0; smart ae IR mode or not */ + ot_op_mode smart_exp_type; /* RW; Range:[0, 1]; Format:1.0; + OT_OP_MODE_AUTO: The ExpCoef used in ISP is generated by firmware; + OT_OP_MODE_MANUAL: The ExpCoef used in ISP is set by u32ExpCoef */ + td_u16 exp_coef; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoef is invalid. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoef is the quotient of exposure. */ + td_u8 luma_target; /* RW; Range:[0x0, 0xFF]; Format:8.0; luma target of smart ae. */ + td_u16 exp_coef_max; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoefvMax is max(upper limit) of ExpCoef + generated by firmware. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoefMax is invalid. */ + td_u16 exp_coef_min; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. + When enExpHDRLvType is OT_OP_MODE_AUTO, u32ExpCoefMax is min(lower limit) of ExpCoef + generated by firmware. + When enExpHDRLvType is OT_OP_MODE_MANUAL, u32ExpCoefMin is invalid. */ + td_u8 smart_interval; /* RW; Range:[0x1, 0xFF]; Format:8.0; smart ae run interval */ + td_u8 smart_speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; smart ae adjust step */ + td_u16 smart_delay_num; /* RW; Range:[0x0, 0x400]; Format:16.0; smart ae adjust delay frame num */ +} ot_isp_smart_exposure_attr; + +/* AWB structs */ +/* + * Defines the AWB online calibration type + * avg_r_gain: the avg value of Rgain after online calibration + * avg_b_gain: the avg value of Bgain after online calibration + */ +typedef struct { + td_u16 avg_r_gain; + td_u16 avg_b_gain; +} ot_isp_awb_calibration_gain; + +/* + Defines the AWB algorithm type + 0 = Improved gray world algorithm. + 1 = AWB algorithm that classifies the statistics and re-filters the white blocks + 2 = AWB algorithm that opt outdoor performance for dv + */ +typedef enum { + OT_ISP_AWB_ALG_LOWCOST = 0, + OT_ISP_AWB_ALG_ADVANCE = 1, + OT_ISP_AWB_ALG_NATURA = 2, + OT_ISP_AWB_ALG_BUTT +} ot_isp_awb_alg_type; + +/* + Defines the AWB policy in the multi-illuminant scenario + 0 = Automatic saturation adjustment in the multi-illuminant scenario + 1 = Automatic ccm adjustment in the multi-illuminant scenario + */ +typedef enum { + OT_ISP_AWB_MULTI_LS_SAT = 0, + OT_ISP_AWB_MULTI_LS_CCM = 1, + OT_ISP_AWB_MULTI_LS_BUTT +} ot_isp_awb_multi_ls_type; + +typedef enum { + OT_ISP_AWB_SCENE_MODE_INDOOR = 0, + OT_ISP_AWB_SCENE_MODE_OUTDOOR = 1, + OT_ISP_AWB_SCENE_MODE_BUTT +} ot_isp_awb_scene_mode_status; + +/* Defines the AWB gain range */ +typedef struct { + td_bool enable; + ot_op_mode op_type; + + td_u16 high_rg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; + in Manual Mode, user define the Max Rgain of High Color Temperature */ + td_u16 high_bg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; + in Manual Mode, user define the Min Bgain of High Color Temperature */ + td_u16 low_rg_limit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; limited range:[0x0, high_rg_limit), + in Manual Mode, user define the Min Rgain of Low Color Temperature */ + td_u16 low_bg_limit; /* RW; Range:[0, 0xFFF]; Format:4.8; limited Range:(high_bg_limit, 0xFFF], + in Manual Mode, user define the Max Bgain of Low Color Temperature */ +} ot_isp_awb_ct_limit_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; Outdoor/Indoor scenario determination enable */ + ot_op_mode op_type; + ot_isp_awb_scene_mode_status scene_status; /* RW; User should config indoor or outdoor status in Manual Mode */ + td_u32 out_thresh; /* RW;Format:32.0;shutter time(in us) to judge indoor or outdoor */ + td_u16 low_start; /* RW;Format:16.0;5000K is recommend */ + td_u16 low_stop; /* RW;Format:16.0;limited range:(0, low_start), + 4500K is recommend, should be smaller than low_start */ + td_u16 high_start; /* RW;Format:16.0;limited range:(low_start, 0xFFFF], + 6500K is recommend, should be larger than low_start */ + td_u16 high_stop; /* RW;Format:16.0;limited range:(high_start, 0xFFFF], + 8000K is recommend, should be larger than high_start */ + td_bool green_enhance_en; /* RW; Range:[0, 1]; Format:1.0;If this is enabled, Green channel will be enhanced + based on the ratio of green plant */ + td_u8 out_shift_limit; /* RW; Range:[0, 0xFF]; Format:8.0;Max white point zone distance to Planckian Curve */ +} ot_isp_awb_in_out_attr; + +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; + If enabled, statistic parameter cr, cb will change according to iso */ + + td_u16 cr_max[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF]; cr_max[i] >= cr_min[i] */ + td_u16 cr_min[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF] */ + td_u16 cb_max[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF]; cb_max[i] >= cb_min[i] */ + td_u16 cb_min[OT_ISP_AUTO_ISO_NUM]; /* RW; Range:[0x0, 0xFFF] */ +} ot_isp_awb_cbcr_track_attr; + +#define OT_ISP_AWB_LUM_HIST_NUM 6 +/* Defines the parameters of the luminance histogram statistics for white balance */ +typedef struct { + td_bool enable; /* RW; Range:[0, 1]; Format:1.0; + If enabled, zone weight to awb is combined with zone luma */ + ot_op_mode op_type; /* In auto mode, the weight distribution follows Gaussian distribution */ + td_u8 hist_thresh[OT_ISP_AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFF]; Format:8.0; + In manual mode, user define luma thresh, thresh[0] is 0, + thresh[5] is 0xFF, thresh[i] greater or equal to thresh[i-1] */ + td_u16 hist_wt[OT_ISP_AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; + user can define luma weight in both manual and auto mode. */ +} ot_isp_awb_lum_histgram_attr; + +/* Defines the information about a separate illuminant */ +typedef struct { + td_u16 white_r_gain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/R of White points at this light source */ + td_u16 white_b_gain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/B of White points at this light source */ + td_u16 exp_quant; /* RW;shutter time * again * dgain >> 4, Not support Now */ + td_u8 light_status; /* RW;Range:[0,2]; Format:2.0; idle 1:add light source 2:delete sensitive color */ + td_u8 radius; /* RW;Range:[0x0, 0xFF]; Format:8.0; Radius of light source, */ +} ot_isp_awb_extra_light_source_info; + +#define OT_ISP_AWB_LS_NUM 4 +#define OT_ISP_AWB_MULTI_CT_NUM 8 +/* extended AWB attributes */ +typedef struct { + td_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AWB adjust tolerance */ + td_u8 zone_radius; /* RW; Range:[0x0, 0xFF]; Format:8.0; radius of AWB blocks */ + td_u16 curve_l_limit; /* RW; Range:[0x0, 0x100]; Format:9.0; Left limit of AWB Curve, + recommend for indoor 0xE0, outdoor 0xE0 */ + td_u16 curve_r_limit; /* RW; Range:[0x100, 0xFFF]; Format:12.0; Right Limit of AWB Curve, + recommend for indoor 0x130, outdoor 0x120 */ + + td_bool extra_light_en; /* RW; Range:[0, 1]; Format:1.0; Enable special light source function */ + ot_isp_awb_extra_light_source_info light_info[OT_ISP_AWB_LS_NUM]; + ot_isp_awb_in_out_attr in_or_out; + + td_bool multi_light_source_en; /* RW; Range:[0, 1]; Format:1.0; If enabled, awb will do special process + in multi light source environment */ + ot_isp_awb_multi_ls_type multi_ls_type; /* Saturation or CCM Tuning */ + td_u16 multi_ls_scaler; /* RW; Range:[0x0, 0x100]; Format:12.0; + In saturation type, it means the max saturation it can achieve, + in ccm type, it means the strength of multi process. */ + td_u16 multi_ct_bin[OT_ISP_AWB_MULTI_CT_NUM]; /* RW; Range:[0, 0XFFFF]; Format:16.0; + AWB Support divide the color temperature range by 8 bins */ + td_u16 multi_ct_wt[OT_ISP_AWB_MULTI_CT_NUM]; /* RW; Range:[0x0, 0x400];Weight for different color temperature, + same value of 8 means CT weight doesn't work, */ + + td_bool fine_tun_en; /* RW; Range:[0x0, 0x1]; Format:1.0;If enabled, skin color scene will be optimized */ + td_u8 fine_tun_strength; /* RW; Range:[0x0, 0xFF]; Format:8.0; + larger value means better performance of skin color scene, + but will increase error probability in low color temperature scene */ +} ot_isp_awb_attr_ex; + +#define OT_ISP_AWB_CURVE_PARA_NUM 6 +typedef struct { + td_bool enable; /* RW; Range:[0x0, 0x1]; Format:1.0;If AWB is disabled, static wb gain will be used, + otherwise auto wb gain will be used */ + + td_u16 ref_color_temp; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; Calibration Information */ + td_u16 static_wb[OT_ISP_BAYER_CHN_NUM]; /* RW; Range:[0x0, 0xFFF]; Format:12.0;Calibration Information */ + td_s32 curve_para[OT_ISP_AWB_CURVE_PARA_NUM]; /* RW; Format:32.0;Calibration Information, + limited Range:as32CurvePara[3] != 0, as32CurvePara[4]==128 */ + + ot_isp_awb_alg_type alg_type; + + td_u8 rg_strength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of R Channel */ + td_u8 bg_strength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of B Channel */ + td_u16 speed; /* RW; Range: [0x0, 0xFFF]; Format:12.0; Convergence speed of AWB */ + td_u16 zone_sel; /* RW; Range: [0, 255]; Format:8.0; A value of 0 or 0xFF means global AWB, + A value between 0 and 0xFF means zoned AWB */ + td_u16 high_color_temp; /* RW; Range: [1, 65535]; Format:16.0; AWB max temperature, Recommended: [8500, 10000] */ + td_u16 low_color_temp; /* RW; Range: [0, 65535]; Format:16.0; Limited Range:[0, high_color_temp), + AWB min temperature, Recommended: [2000, 2500] */ + ot_isp_awb_ct_limit_attr ct_limit; + td_bool shift_limit_en; /* RW; Range: [0, 1]; Format:1.0; If enabled, when the statistic information is out of + range, it should be project back */ + td_u8 shift_limit; /* RW; Range: [0x0, 0xFF]; Format:8.0; planckian curve range, Recommended: [0x30, 0x50] */ + td_bool gain_norm_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, the min of RGB gain is fixed. */ + td_bool natural_cast_en; /* RW, Range: [0, 1]; Format:1.0; if enabled, the color performance will be natural in + lowlight and low color temperature */ + + ot_isp_awb_cbcr_track_attr cb_cr_track; + ot_isp_awb_lum_histgram_attr luma_hist; + td_bool awb_zone_wt_en; /* RW, Range: [0, 1]; Format:1.0; if enabled, user can set weight for each zones */ + td_u8 zone_wt[OT_ISP_AWB_ZONE_NUM]; /* RW; Range: [0, 255]; Format:8.0;Zone Wt Table */ +} ot_isp_awb_attr; + +typedef struct { + td_u16 r_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for R color channel */ + td_u16 gr_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gr color channel */ + td_u16 gb_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gb color channel */ + td_u16 b_gain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for B color channel */ +} ot_isp_mwb_attr; + +typedef enum { + OT_ISP_ALG_AWB_GW = 0, + OT_ISP_ALG_AWB_SPEC = 1, + OT_ISP_ALG_BUTT +} ot_isp_awb_alg; + +typedef struct { + td_bool bypass; /* RW; Range: [0, 1]; Format:1.0; If enabled, awb will be bypassed */ + td_u8 awb_run_interval; /* RW; Range: [0x1, 0xFF]; Format:8.0; set the AWB run interval */ + ot_op_mode op_type; + ot_isp_mwb_attr manual_attr; + ot_isp_awb_attr auto_attr; + ot_isp_awb_alg alg_type; +} ot_isp_wb_attr; + +typedef struct { + td_bool sat_en; /* RW; Range: [0, 1]; Format:1.0; + If sat_en=1, the active CCM = SatMatrix * ManualMatrix, + else the active CCM = ManualMatrix */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; Manul CCM matrix, */ +} ot_isp_color_matrix_manual; + +typedef struct { + td_u16 color_temp; /* RW; Range: [500, 30000]; Format:16.0; the current color temperature */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8;CCM matrixes for different + color temperature */ +} ot_isp_color_matrix_param; + +typedef struct { + td_bool iso_act_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass in low light */ + td_bool temp_act_en; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass when color temperature is + larger than 8000K or less than 2500K */ + td_u16 ccm_tab_num; /* RW; Range: [0x3, 0x7]; Format:16.0; The number of CCM matrixes */ + ot_isp_color_matrix_param ccm_tab[OT_ISP_CCM_MATRIX_NUM]; +} ot_isp_color_matrix_auto; + +typedef struct { + ot_op_mode op_type; + ot_isp_color_matrix_manual manual_attr; + ot_isp_color_matrix_auto auto_attr; +} ot_isp_color_matrix_attr; + +typedef struct { + td_u8 saturation; /* RW; Range: [0, 0xFF]; Format:8.0; set the manual saturation of CCM */ +} ot_isp_saturation_manual; + +typedef struct { + td_u8 sat[OT_ISP_AUTO_ISO_NUM]; /* RW; Range: [0, 0xFF]; should be decreased with increasing ISO */ +} ot_isp_saturation_auto; + +typedef struct { + ot_op_mode op_type; + ot_isp_saturation_manual manual_attr; + ot_isp_saturation_auto auto_attr; +} ot_isp_saturation_attr; + +typedef struct { + td_u16 red_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; R channel gain after CCM */ + td_u16 green_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; G channel gain after CCM */ + td_u16 blue_cast_gain; /* RW; Range: [0x100, 0x180]; Format:4.8; B channel gain after CCM */ +} ot_isp_color_tone_attr; + +typedef struct { + td_u16 r_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8;AWB result of R color channel */ + td_u16 gr_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gr color channel */ + td_u16 gb_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gb color channel */ + td_u16 b_gain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of B color channel */ + td_u16 saturation; /* R; Range: [0x0, 0xFF];Format:8.0;Current saturation */ + td_u16 color_temp; /* R; Range: [0x0, 0xFFFF];Format:16.0;Detect color temperature, maybe out of color + cemeprature range */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* R; Range: [0x0, 0xFFFF];Format:16.0;Current color correction matrix */ + + td_u16 ls0_ct; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of primary light source */ + td_u16 ls1_ct; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of secondary light source */ + td_u16 ls0_area; /* R; Range: [0x0, 0xFF];Format:8.0;area of primary light source */ + td_u16 ls1_area; /* R; Range: [0x0, 0xFF];Format:8.0;area of secondary light source */ + td_u8 multi_degree; /* R; Range: [0x0, 0xFF];0 means uniform light source, larger value means multi + light source */ + td_u16 active_shift; /* R; Range;[0x0,0xFF] */ + td_u32 first_stable_time; /* R, Range: [0x0, 0xFFFFFFFF];Format:32.0;AWB first stable frame number */ + ot_isp_awb_scene_mode_status scene_status; /* R; indoor or outdoor status */ + td_s16 bv; /* R; Range;[-32768, 32767]; Bv value */ +} ot_isp_wb_info; + +typedef struct { + td_bool is_ir_mode; + td_u32 ae_comp; + td_u32 exp_time; + td_float int_time_accu; + td_u32 a_gain; + td_float again_accu; + td_u32 d_gain; + td_float dgain_accu; + td_u32 ispd_gain; + td_u32 exposure; + td_u32 init_iso; + td_u32 lines_per500ms; + td_u32 piris_fno; + td_u16 wb_r_gain; + td_u16 wb_g_gain; + td_u16 wb_b_gain; + td_u16 sample_r_gain; + td_u16 sample_b_gain; + td_u16 init_ccm[OT_ISP_CCM_MATRIX_SIZE]; + td_bool ae_route_ex_valid; + td_bool quick_start_en; + ot_isp_ae_route ae_route; + ot_isp_ae_route_ex ae_route_ex; + ot_isp_ae_route ae_route_sf; + ot_isp_ae_route_ex ae_route_sf_ex; + td_u32 ae_stat_pos; +} ot_isp_init_attr; + +typedef struct { + td_s32 distance_max; /* RW;the focus range */ + td_s32 distance_min; + td_u8 wgt[OT_ISP_AF_ZONE_ROW][OT_ISP_AF_ZONE_COLUMN]; /* RW;weighting table */ +} ot_isp_af_attr; + +typedef struct { + td_s32 default_speed; /* RW;1,default speed(unit:m/s).(onvif) */ +} ot_isp_mf_attr; + +typedef struct { + ot_op_mode op_type; + ot_isp_mf_attr manual_attr; + ot_isp_af_attr auto_attr; +} ot_isp_focus_attr; + +/* + DNG cfalayout type + 1 = Rectangular (or square) layout + 2 = Staggered layout A: even columns are offset down by 1/2 row + 3 = Staggered layout B: even columns are offset up by 1/2 row + 4 = Staggered layout C: even rows are offset right by 1/2 column + 5 = Staggered layout D: even rows are offset left by 1/2 column + 6 = Staggered layout E: even rows are offset up by 1/2 row, even columns are offset left by 1/2 column + 7 = Staggered layout F: even rows are offset up by 1/2 row, even columns are offset right by 1/2 column + 8 = Staggered layout G: even rows are offset down by 1/2 row, even columns are offset left by 1/2 column + 9 = Staggered layout H: even rows are offset down by 1/2 row, even columns are offset right by 1/2 column + */ +typedef enum { + OT_ISP_CFALAYOUT_TYPE_RECTANGULAR = 1, + OT_ISP_CFALAYOUT_TYPE_A, /* a,b,c... not support */ + OT_ISP_CFALAYOUT_TYPE_B, + OT_ISP_CFALAYOUT_TYPE_C, + OT_ISP_CFALAYOUT_TYPE_D, + OT_ISP_CFALAYOUT_TYPE_E, + OT_ISP_CFALAYOUT_TYPE_F, + OT_ISP_CFALAYOUT_TYPE_G, + OT_ISP_CFALAYOUT_TYPE_H, + OT_ISP_CFALAYOUT_TYPE_BUTT +} ot_isp_dng_cfa_layout_type; + +typedef struct { + td_s32 numerator; /* represents the numerator of a fraction, */ + td_s32 denominator; /* the denominator. */ +} ot_isp_dng_srational; + +typedef struct { + td_u16 repeat_row; + td_u16 repeat_col; +} ot_isp_dng_black_level_repeat_dim; + +typedef struct { + ot_isp_dng_srational default_scale_hor; + ot_isp_dng_srational default_scale_ver; +} ot_isp_dng_default_scale; + +typedef struct { + td_u16 repeat_pattern_dim_row; + td_u16 repeat_pattern_dim_col; +} ot_isp_dng_repeat_pattern_dim; + +/* Defines the structure of dng raw format. */ +typedef struct { + td_u8 bits_per_sample; /* RO;Format:8.0; Indicate the bit numbers of raw data */ + td_u8 cfa_plane_color[OT_CFACOLORPLANE]; /* RO;Format:8.0; Indicate the planer numbers of raw data; + 0:red 1:green 2: blue */ + ot_isp_dng_cfa_layout_type cfa_layout; /* RO;Range:[1,9]; Describes the spatial layout of the CFA */ + ot_isp_dng_black_level_repeat_dim black_level_repeat_dim; /* Specifies repeat pattern size for the BlackLevel */ + td_u32 white_level; /* RO;Format:32.0; Indicate the WhiteLevel of the raw data */ + ot_isp_dng_default_scale default_scale; /* Specifies the default scale factors for each direction to convert + the image to square pixels */ + ot_isp_dng_repeat_pattern_dim cfa_repeat_pattern_dim; /* Specifies the pixel number of repeat color planer in + each direction */ + td_u8 cfa_pattern[OT_ISP_BAYER_CHN_NUM]; /* RO;Format:8.0; Indicate the bayer start order; + 0:red 1:green 2: blue */ +} ot_isp_dng_raw_format; + +/* Defines the structure of dng image static information. read only */ +typedef struct { + ot_isp_dng_raw_format dng_raw_format; + ot_isp_dng_srational color_matrix1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ + values to reference camera native color space values, + under the first calibration illuminant. */ + ot_isp_dng_srational color_matrix2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ + values to reference camera native color space values, + under the second calibration illuminant. */ + ot_isp_dng_srational camera_calibration1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms + reference camera native space values to + individual camera native space values under + the first calibration illuminant */ + ot_isp_dng_srational camera_calibration2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms + reference camera native space values to + individual camera native space values under + the second calibration illuminant */ + ot_isp_dng_srational forwad_matrix1[OT_ISP_CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera + colors to XYZ D50 colors */ + ot_isp_dng_srational forwad_matrix2[OT_ISP_CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera + colors to XYZ D50 colors */ + + td_u8 calibration_illuminant1; /* RO;Format:8.0;Light source, actually this means white balance setting. + '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, + '17' standard light A, '18' standard light B, '19' standard light C, + '20' D55, '21' D65, '22' D75, '255' other */ + td_u8 calibration_illuminant2; /* RO;Format:8.0;Light source, actually this means white balance setting. + '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, + '17' standard light A, '18' standard light B, '19' standard light C, + '20' D55, '21' D65, '22' D75, '255' other */ +} ot_isp_dng_image_static_info; + +/* Defines the structure of DNG WB gain used for calculate DNG colormatrix. */ +typedef struct { + td_u16 r_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for R color channel */ + td_u16 g_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for G color channel */ + td_u16 b_gain; /* RW;Range: [0x0, 0xFFF]; Multiplier for B color channel */ +} ot_isp_dng_wb_gain; + +typedef struct { + td_u16 color_temp; /* RW; range:[2000,10000]; format:16.0; the current color temperature */ + td_u16 ccm[OT_ISP_CCM_MATRIX_SIZE]; /* RW; range: [0x0, 0xFFFF]; format:8.8; + CCM matrixes for different color temperature */ +} ot_isp_dng_ccm_tab; + +/* Defines the structure of DNG color parameters. */ +typedef struct { + ot_isp_dng_wb_gain wb_gain1; /* the calibration White balance gain of colorcheker in low colortemper light source */ + ot_isp_dng_wb_gain wb_gain2; /* the calibration White balance gain of colorcheker in high colortemper + light source */ + ot_isp_dng_ccm_tab ccm_tab1; /* the calibration CCM in low colortemper light source */ + ot_isp_dng_ccm_tab ccm_tab2; /* the calibration CCM in high colortemper light source */ +} ot_isp_dng_color_param; + +typedef enum { + OT_ISP_IR_STATUS_NORMAL = 0, + OT_ISP_IR_STATUS_IR = 1, + OT_ISP_IR_BUTT +} ot_isp_ir_status; + +typedef enum { + OT_ISP_IR_SWITCH_NONE = 0, + OT_ISP_IR_SWITCH_TO_NORMAL = 1, + OT_ISP_IR_SWITCH_TO_IR = 2, + OT_ISP_IR_SWITCH_BUTT +} ot_isp_ir_switch_status; + +typedef struct { + td_bool enable; /* RW, TD_TRUE: enable IR_auto function; TD_TRUE: disable IR_auto function. */ + td_u32 normal_to_ir_iso_threshold; /* RW, Range: [0, 0xFFFFFFFF]. + ISO threshold of switching from normal to IR mode. */ + td_u32 ir_to_normal_iso_threshold; /* RW, Range: [0, 0xFFFFFFFF]. + ISO threshold of switching from IR to normal mode. */ + td_u32 rg_max; /* RW, Range: [0x0, 0xFFF]. Maximum value of R/G in IR scene, 4.8-bit fix-point. */ + td_u32 rg_min; /* RW, Range: [0x0, u32RGMax]. Minimum value of R/G in IR scene, 4.8-bit fix-point. */ + td_u32 bg_max; /* RW, Range: [0x0, 0xFFF]. Maximum value of B/G in IR scene, 4.8-bit fix-point. */ + td_u32 bg_min; /* RW, Range: [0x0, u32BGMax]. Minimum value of B/G in IR scene, 4.8-bit fix-point. */ + + ot_isp_ir_status ir_status; /* RW. Current IR status. */ + ot_isp_ir_switch_status ir_switch; /* RO, IR switch status. */ +} ot_isp_ir_auto_attr; + +typedef enum { + OT_ISP_FLICKER_TYPE_NONE = 0, + OT_ISP_FLICKER_TYPE_UNKNOW, + OT_ISP_FLICKER_TYPE_50HZ, + OT_ISP_FLICKER_TYPE_60HZ, + OT_ISP_FLICKER_TYPE_BUTT, +} ot_isp_calc_flicker_type; + +typedef struct { + td_u32 lines_per_second; /* The total line number of 1 second */ +} ot_isp_calc_flicker_input; + +typedef struct { + ot_isp_calc_flicker_type flicker_type; /* The calculate result of flicker type */ +} ot_isp_calc_flicker_output; + +#define OT_BAYER_CALIBRATION_PARA_NUM_NEW 16 +typedef struct { + td_double calibration_coef[OT_BAYER_CALIBRATION_PARA_NUM_NEW]; +} ot_isp_noise_calibration; + +typedef union { + td_u32 key; + struct { + td_u32 bit1_ae : 1; /* [0] */ + td_u32 bit1_awb : 1; /* [1] */ + td_u32 bit30_reserved : 30; /* [2:31] */ + }; +} ot_isp_detail_stats_ctrl; + +typedef struct { + td_bool enable; + ot_isp_detail_stats_ctrl ctrl; + td_u8 row; /* RW; Range: [1, 4], when col = 1, raw can't = 1, (1, 4]; Vertical Blocks */ + td_u8 col; /* RW; Range: [1, 6]; when raw = 1, col can't = 1, (1, 6]; Horizontal Blocks */ + td_u16 interval; +} ot_isp_detail_stats_cfg; + +#define OT_ISP_DETAIL_STATS_MAX_ROW 4 +#define OT_ISP_DETAIL_STATS_MAX_COLUMN 6 +#define OT_ISP_DETAIL_STATS_BLK_NUM_MAX (OT_ISP_DETAIL_STATS_MAX_COLUMN * OT_ISP_DETAIL_STATS_MAX_ROW) + +#define OT_ISP_DETAIL_AWB_ZONE_NUM (OT_ISP_AWB_ZONE_NUM * OT_ISP_DETAIL_STATS_BLK_NUM_MAX) +#define OT_ISP_DETAIL_AE_ZONE_ROW (OT_ISP_AE_ZONE_ROW * OT_ISP_DETAIL_STATS_MAX_ROW) +#define OT_ISP_DETAIL_AE_ZONE_COLUMN (OT_ISP_AE_ZONE_COLUMN * OT_ISP_DETAIL_STATS_MAX_COLUMN) + +typedef struct { + td_u16 grid_y_pos[OT_ISP_DETAIL_AE_ZONE_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_DETAIL_AE_ZONE_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_detail_ae_grid_info; + +typedef struct { + td_u16 grid_y_pos[OT_ISP_AWB_ZONE_ORIG_ROW * OT_ISP_DETAIL_STATS_MAX_ROW + 1]; /* R */ + td_u16 grid_x_pos[OT_ISP_AWB_ZONE_ORIG_COLUMN * OT_ISP_DETAIL_STATS_MAX_COLUMN + 1]; /* R */ + td_u8 status; /* R;0:not update, 1: update,others:reserved */ +} ot_isp_detail_awb_grid_info; + +typedef struct { + td_u16 be_zone_avg[OT_ISP_DETAIL_AE_ZONE_ROW][OT_ISP_DETAIL_AE_ZONE_COLUMN][OT_ISP_BAYER_CHN_NUM]; /* R; + Range: [0x0, 0xFFFF]; Format:16.0; Zone average value of BE detail stats */ + ot_isp_detail_ae_grid_info ae_grid_info; +} ot_isp_detail_ae_stats; + +typedef struct { + td_u16 zone_avg_r[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average R */ + td_u16 zone_avg_g[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average G */ + td_u16 zone_avg_b[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average B */ + td_u16 zone_count_all[OT_ISP_DETAIL_AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ + ot_isp_detail_awb_grid_info awb_grid_info; +} ot_isp_detail_awb_stats; + +typedef struct { + ot_isp_detail_ae_stats ae_stats; + ot_isp_detail_awb_stats awb_stats; + td_u64 pts; +} ot_isp_detail_stats; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_COMM_ISP_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_i2c.h b/libraries/isp/include/hi3519dv500/ot_i2c.h new file mode 100644 index 0000000..9bfd4e3 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_i2c.h @@ -0,0 +1,55 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_I2C_H +#define OT_I2C_H + +#include "ot_type.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* /dev/i2c-X ioctl commands. The ioctl's parameter is always an + * unsigned long, except for: + * - I2C_FUNCS, takes pointer to an unsigned long + * - I2C_RDWR, takes pointer to struct i2c_rdwr_ioctl_data + * - I2C_SMBUS, takes pointer to struct i2c_smbus_ioctl_data + * */ +#define OT_I2C_RETRIES 0x0701 /* number of times a device address should be polled when not acknowledging */ +#define OT_I2C_TIMEOUT 0x0702 /* set timeout in units of 10 ms */ + +/* NOTE: Slave address is 7 or 10 bits, but 10-bit addresses + * are NOT supported! (due to code brokenness) + * */ +#define OT_I2C_SLAVE 0x0703 /* Use this slave address */ +#define OT_I2C_SLAVE_FORCE 0x0706 /* Use this slave address, even if it is already in use by a driver! */ +#define OT_I2C_TENBIT 0x0704 /* 0 for 7 bit addrs, != 0 for 10 bit */ + +#define OT_I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ + +#define OT_I2C_RDWR 0x0707 /* Combined R/W transfer (one STOP only) */ + +#define OT_I2C_PEC 0x0708 /* != 0 to use PEC with SMBus */ +#define OT_I2C_SMBUS 0x0720 /* SMBus transfer */ +#define OT_I2C_16BIT_REG 0x0709 /* 16BIT REG WIDTH */ +#define OT_I2C_16BIT_DATA 0x070a /* 16BIT DATA WIDTH */ + +typedef struct { + td_u8 dev_addr; + td_u32 reg_addr; + td_u32 addr_byte_num; + td_u32 data; + td_u32 data_byte_num; +} ot_i2c_data; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_I2C_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_isp_bin.h b/libraries/isp/include/hi3519dv500/ot_isp_bin.h new file mode 100644 index 0000000..b8e53c2 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_isp_bin.h @@ -0,0 +1,43 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_ISP_BIN_H +#define OT_ISP_BIN_H + +#include "ot_type.h" +#include "ot_common_isp.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* MACRO DEFINITION */ +#define MAX_BIN_REG_NUM 5 + +/* GENERAL STRUCTURES */ +typedef struct { + td_u32 addr; /* register addr */ + td_u8 start_bit; /* start bit of register addr */ + td_u8 end_bit; /* end bit of register addr */ +} ot_isp_bin_reg_attr; + +/* + * The base addr of ISP logic register + * The base addr of ISP ext register + * The base addr of AE ext register + * The base addr of AWB ext register + */ +ot_isp_bin_reg_attr g_isp_bin_reg_attr[OT_ISP_MAX_PIPE_NUM][MAX_BIN_REG_NUM] = { + [0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = {0} +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_ISP_BIN_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_isp_debug.h b/libraries/isp/include/hi3519dv500/ot_isp_debug.h new file mode 100644 index 0000000..b3f20fa --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_isp_debug.h @@ -0,0 +1,39 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_ISP_DEBUG_H +#define OT_ISP_DEBUG_H + +#include "ot_debug.h" + +#define isp_emerg_trace(fmt, ...) \ + OT_EMERG_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_alert_trace(fmt, ...) \ + OT_ALERT_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_crit_trace(fmt, ...) \ + OT_CRIT_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_err_trace(fmt, ...) \ + OT_ERR_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_warn_trace(fmt, ...) \ + OT_WARN_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_notice_trace(fmt, ...) \ + OT_NOTICE_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_info_trace(fmt, ...) \ + OT_INFO_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +#define isp_debug_trace(fmt, ...) \ + OT_DEBUG_TRACE(OT_ID_ISP, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__) + +/* To avoid divide-0 exception in code. */ +#define div_0_to_1(a) (((a) == 0) ? 1 : (a)) +#define div_0_to_1_float(a) ((((a) < 1E-10) && ((a) > (-1E-10))) ? 1 : (a)) +#define is_float_equal(a, b) ((((a) - (b)) < 1E-10) && (((a) - (b)) > (-1E-10))) + +#endif /* OT_ISP_DEBUG_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_mpi_isp.h b/libraries/isp/include/hi3519dv500/ot_mpi_isp.h new file mode 100644 index 0000000..291f33d --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_mpi_isp.h @@ -0,0 +1,228 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_MPI_ISP_H +#define OT_MPI_ISP_H + +#include "ot_type.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" +#include "ot_common_3a.h" +#include "ot_common_video.h" +#ifdef CONFIG_OT_SNAP_SUPPORT +#include "ot_common_snap.h" +#endif + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* Firmware Main Operation */ +td_s32 ot_mpi_isp_init(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_mem_init(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_run(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_run_once(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_exit(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_mem_share(ot_vi_pipe vi_pipe, td_s32 pid); +td_s32 ot_mpi_isp_mem_unshare(ot_vi_pipe vi_pipe, td_s32 pid); +td_s32 ot_mpi_isp_mem_share_all(ot_vi_pipe vi_pipe); +td_s32 ot_mpi_isp_mem_unshare_all(ot_vi_pipe vi_pipe); + +td_s32 ot_mpi_isp_sensor_reg_callback(ot_vi_pipe vi_pipe, ot_isp_sns_attr_info *sns_attr_info, + const ot_isp_sns_register *sns_register); +td_s32 ot_mpi_isp_sensor_unreg_callback(ot_vi_pipe vi_pipe, ot_sensor_id sensor_id); + +/* if have registered multy libs, set bind attr to appoint the active lib. */ +td_s32 ot_mpi_isp_set_bind_attr(ot_vi_pipe vi_pipe, const ot_isp_bind_attr *bind_attr); +td_s32 ot_mpi_isp_get_bind_attr(ot_vi_pipe vi_pipe, ot_isp_bind_attr *bind_attr); +td_s32 ot_mpi_isp_ae_lib_reg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *ae_lib, + const ot_isp_ae_register *ae_register); +td_s32 ot_mpi_isp_awb_lib_reg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *awb_lib, + const ot_isp_awb_register *awb_register); +td_s32 ot_mpi_isp_ae_lib_unreg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *ae_lib); +td_s32 ot_mpi_isp_awb_lib_unreg_callback(ot_vi_pipe vi_pipe, const ot_isp_3a_alg_lib *awb_lib); + +td_s32 ot_mpi_isp_get_lightbox_gain(ot_vi_pipe vi_pipe, + ot_isp_awb_calibration_gain *awb_calibration_gain); + +td_s32 ot_mpi_isp_set_pub_attr(ot_vi_pipe vi_pipe, const ot_isp_pub_attr *pub_attr); +td_s32 ot_mpi_isp_get_pub_attr(ot_vi_pipe vi_pipe, ot_isp_pub_attr *pub_attr); + +td_s32 ot_mpi_isp_set_pipe_differ_attr(ot_vi_pipe vi_pipe, const ot_isp_pipe_diff_attr *pipe_differ); +td_s32 ot_mpi_isp_get_pipe_differ_attr(ot_vi_pipe vi_pipe, ot_isp_pipe_diff_attr *pipe_differ); + +td_s32 ot_mpi_isp_get_vd_time_out(ot_vi_pipe vi_pipe, ot_isp_vd_type isp_vd_type, td_u32 milli_sec); +td_s32 ot_mpi_isp_query_inner_state_info(ot_vi_pipe vi_pipe, ot_isp_inner_state_info *inner_state_info); +td_s32 ot_mpi_isp_get_ae_stats(ot_vi_pipe vi_pipe, ot_isp_ae_stats *ae_stat); +td_s32 ot_mpi_isp_get_ae_stitch_stats(ot_vi_pipe vi_pipe, ot_isp_ae_stitch_stats *stitch_stat); +td_s32 ot_mpi_isp_get_mg_stats(ot_vi_pipe vi_pipe, ot_isp_mg_stats *mg_stat); + +td_s32 ot_mpi_isp_get_wb_stats(ot_vi_pipe vi_pipe, ot_isp_wb_stats *wb_stat); +td_s32 ot_mpi_isp_get_wb_stitch_stats(ot_vi_pipe vi_pipe, ot_isp_wb_stitch_stats *stitch_wb_stat); + +td_s32 ot_mpi_isp_get_focus_stats(ot_vi_pipe vi_pipe, ot_isp_af_stats *af_stat); + +td_s32 ot_mpi_isp_set_fe_roi_cfg(ot_vi_pipe vi_pipe, const ot_isp_fe_roi_cfg *fe_roi_cfg); +td_s32 ot_mpi_isp_get_fe_roi_cfg(ot_vi_pipe vi_pipe, ot_isp_fe_roi_cfg *fe_roi_cfg); + +td_s32 ot_mpi_isp_set_stats_cfg(ot_vi_pipe vi_pipe, const ot_isp_stats_cfg *stat_cfg); +td_s32 ot_mpi_isp_get_stats_cfg(ot_vi_pipe vi_pipe, ot_isp_stats_cfg *stat_cfg); + +td_s32 ot_mpi_isp_get_isp_reg_attr(ot_vi_pipe vi_pipe, ot_isp_reg_attr *isp_reg_attr); + +td_s32 ot_mpi_isp_set_fmw_state(ot_vi_pipe vi_pipe, const ot_isp_fmw_state state); +td_s32 ot_mpi_isp_get_fmw_state(ot_vi_pipe vi_pipe, ot_isp_fmw_state *state); + +td_s32 ot_mpi_isp_set_debug(ot_vi_pipe vi_pipe, const ot_isp_debug_info *isp_debug); +td_s32 ot_mpi_isp_get_debug(ot_vi_pipe vi_pipe, ot_isp_debug_info *isp_debug); + +td_s32 ot_mpi_isp_set_mod_param(const ot_isp_mod_param *mod_param); +td_s32 ot_mpi_isp_get_mod_param(ot_isp_mod_param *mod_param); +td_s32 ot_mpi_isp_set_ctrl_param(ot_vi_pipe vi_pipe, const ot_isp_ctrl_param *isp_ctrl_param); +td_s32 ot_mpi_isp_get_ctrl_param(ot_vi_pipe vi_pipe, ot_isp_ctrl_param *isp_ctrl_param); + +td_s32 ot_mpi_isp_set_fswdr_attr(ot_vi_pipe vi_pipe, const ot_isp_wdr_fs_attr *fswdr_attr); +td_s32 ot_mpi_isp_get_fswdr_attr(ot_vi_pipe vi_pipe, ot_isp_wdr_fs_attr *fswdr_attr); + +td_s32 ot_mpi_isp_set_drc_attr(ot_vi_pipe vi_pipe, const ot_isp_drc_attr *drc_attr); +td_s32 ot_mpi_isp_get_drc_attr(ot_vi_pipe vi_pipe, ot_isp_drc_attr *drc_attr); + +td_s32 ot_mpi_isp_set_dehaze_attr(ot_vi_pipe vi_pipe, const ot_isp_dehaze_attr *dehaze_attr); +td_s32 ot_mpi_isp_get_dehaze_attr(ot_vi_pipe vi_pipe, ot_isp_dehaze_attr *dehaze_attr); + +td_s32 ot_mpi_isp_set_expander_attr(ot_vi_pipe vi_pipe, const ot_isp_expander_attr *expander_attr); +td_s32 ot_mpi_isp_get_expander_attr(ot_vi_pipe vi_pipe, ot_isp_expander_attr *expander_attr); + +td_s32 ot_mpi_isp_set_ldci_attr(ot_vi_pipe vi_pipe, const ot_isp_ldci_attr *ldci_attr); +td_s32 ot_mpi_isp_get_ldci_attr(ot_vi_pipe vi_pipe, ot_isp_ldci_attr *ldci_attr); + +td_s32 ot_mpi_isp_set_sns_slave_attr(ot_slave_dev slave_dev, const ot_isp_slave_sns_sync *sns_sync); +td_s32 ot_mpi_isp_get_sns_slave_attr(ot_slave_dev slave_dev, ot_isp_slave_sns_sync *sns_sync); + +td_s32 ot_mpi_isp_set_module_ctrl(ot_vi_pipe vi_pipe, const ot_isp_module_ctrl *mod_ctrl); +td_s32 ot_mpi_isp_get_module_ctrl(ot_vi_pipe vi_pipe, ot_isp_module_ctrl *mod_ctrl); + +td_s32 ot_mpi_isp_set_dp_calibrate(ot_vi_pipe vi_pipe, const ot_isp_dp_static_calibrate *dp_calibrate); +td_s32 ot_mpi_isp_get_dp_calibrate(ot_vi_pipe vi_pipe, ot_isp_dp_static_calibrate *dp_calibrate); + +td_s32 ot_mpi_isp_set_dp_static_attr(ot_vi_pipe vi_pipe, const ot_isp_dp_static_attr *dp_static_attr); +td_s32 ot_mpi_isp_get_dp_static_attr(ot_vi_pipe vi_pipe, ot_isp_dp_static_attr *dp_static_attr); + +td_s32 ot_mpi_isp_set_dp_dynamic_attr(ot_vi_pipe vi_pipe, const ot_isp_dp_dynamic_attr *dp_dynamic_attr); +td_s32 ot_mpi_isp_get_dp_dynamic_attr(ot_vi_pipe vi_pipe, ot_isp_dp_dynamic_attr *dp_dynamic_attr); + +td_s32 ot_mpi_isp_set_lblc_attr(ot_vi_pipe vi_pipe, const ot_isp_lblc_attr *lblc_attr); +td_s32 ot_mpi_isp_get_lblc_attr(ot_vi_pipe vi_pipe, ot_isp_lblc_attr *lblc_attr); + +td_s32 ot_mpi_isp_set_lblc_lut_attr(ot_vi_pipe vi_pipe, const ot_isp_lblc_lut_attr *lblc_lut_attr); +td_s32 ot_mpi_isp_get_lblc_lut_attr(ot_vi_pipe vi_pipe, ot_isp_lblc_lut_attr *lblc_lut_attr); + +td_s32 ot_mpi_isp_set_mesh_shading_attr(ot_vi_pipe vi_pipe, const ot_isp_shading_attr *shading_attr); +td_s32 ot_mpi_isp_get_mesh_shading_attr(ot_vi_pipe vi_pipe, ot_isp_shading_attr *shading_attr); + +td_s32 ot_mpi_isp_set_mesh_shading_gain_lut_attr(ot_vi_pipe vi_pipe, + const ot_isp_shading_lut_attr *shading_lut_attr); +td_s32 ot_mpi_isp_get_mesh_shading_gain_lut_attr(ot_vi_pipe vi_pipe, + ot_isp_shading_lut_attr *shading_lut_attr); + +td_s32 ot_mpi_isp_set_auto_color_shading_attr(ot_vi_pipe vi_pipe, const ot_isp_acs_attr *acs_attr); +td_s32 ot_mpi_isp_get_auto_color_shading_attr(ot_vi_pipe vi_pipe, ot_isp_acs_attr *acs_attr); + +td_s32 ot_mpi_isp_mesh_shading_calibration(ot_vi_pipe vi_pipe, const td_u16 *src_raw, + ot_isp_mlsc_calibration_cfg *mlsc_cali_cfg, + ot_isp_mesh_shading_table *mlsc_table); + +td_s32 ot_mpi_isp_set_nr_attr(ot_vi_pipe vi_pipe, const ot_isp_nr_attr *nr_attr); +td_s32 ot_mpi_isp_get_nr_attr(ot_vi_pipe vi_pipe, ot_isp_nr_attr *nr_attr); + +td_s32 ot_mpi_isp_set_color_tone_attr(ot_vi_pipe vi_pipe, const ot_isp_color_tone_attr *ct_attr); +td_s32 ot_mpi_isp_get_color_tone_attr(ot_vi_pipe vi_pipe, ot_isp_color_tone_attr *ct_attr); + +td_s32 ot_mpi_isp_set_gamma_attr(ot_vi_pipe vi_pipe, const ot_isp_gamma_attr *gamma_attr); +td_s32 ot_mpi_isp_get_gamma_attr(ot_vi_pipe vi_pipe, ot_isp_gamma_attr *gamma_attr); + +td_s32 ot_mpi_isp_set_pregamma_attr(ot_vi_pipe vi_pipe, const ot_isp_pregamma_attr *pregamma_attr); +td_s32 ot_mpi_isp_get_pregamma_attr(ot_vi_pipe vi_pipe, ot_isp_pregamma_attr *pregamma_attr); + +td_s32 ot_mpi_isp_set_cac_attr(ot_vi_pipe vi_pipe, const ot_isp_cac_attr *cac_attr); +td_s32 ot_mpi_isp_get_cac_attr(ot_vi_pipe vi_pipe, ot_isp_cac_attr *cac_attr); + +td_s32 ot_mpi_isp_set_bayershp_attr(ot_vi_pipe vi_pipe, const ot_isp_bayershp_attr *bshp_attr); +td_s32 ot_mpi_isp_get_bayershp_attr(ot_vi_pipe vi_pipe, ot_isp_bayershp_attr *bshp_attr); + +td_s32 ot_mpi_isp_set_rc_attr(ot_vi_pipe vi_pipe, const ot_isp_rc_attr *rc_attr); +td_s32 ot_mpi_isp_get_rc_attr(ot_vi_pipe vi_pipe, ot_isp_rc_attr *rc_attr); + +td_s32 ot_mpi_isp_set_sharpen_attr(ot_vi_pipe vi_pipe, const ot_isp_sharpen_attr *shp_attr); +td_s32 ot_mpi_isp_get_sharpen_attr(ot_vi_pipe vi_pipe, ot_isp_sharpen_attr *shp_attr); + +td_s32 ot_mpi_isp_set_crosstalk_attr(ot_vi_pipe vi_pipe, const ot_isp_cr_attr *cr_attr); +td_s32 ot_mpi_isp_get_crosstalk_attr(ot_vi_pipe vi_pipe, ot_isp_cr_attr *cr_attr); + +td_s32 ot_mpi_isp_set_ca_attr(ot_vi_pipe vi_pipe, const ot_isp_ca_attr *ca_attr); +td_s32 ot_mpi_isp_get_ca_attr(ot_vi_pipe vi_pipe, ot_isp_ca_attr *ca_attr); + +td_s32 ot_mpi_isp_set_anti_false_color_attr(ot_vi_pipe vi_pipe, + const ot_isp_anti_false_color_attr *anti_false_color); +td_s32 ot_mpi_isp_get_anti_false_color_attr(ot_vi_pipe vi_pipe, + ot_isp_anti_false_color_attr *anti_false_color); + +td_s32 ot_mpi_isp_set_demosaic_attr(ot_vi_pipe vi_pipe, const ot_isp_demosaic_attr *demosaic_attr); +td_s32 ot_mpi_isp_get_demosaic_attr(ot_vi_pipe vi_pipe, ot_isp_demosaic_attr *demosaic_attr); + +td_s32 ot_mpi_isp_set_black_level_attr(ot_vi_pipe vi_pipe, const ot_isp_black_level_attr *black_level); +td_s32 ot_mpi_isp_get_black_level_attr(ot_vi_pipe vi_pipe, ot_isp_black_level_attr *black_level); + +td_s32 ot_mpi_isp_set_clut_attr(ot_vi_pipe vi_pipe, const ot_isp_clut_attr *clut_attr); +td_s32 ot_mpi_isp_get_clut_attr(ot_vi_pipe vi_pipe, ot_isp_clut_attr *clut_attr); + +td_s32 ot_mpi_isp_set_clut_coeff(ot_vi_pipe vi_pipe, const ot_isp_clut_lut *clut_lut); +td_s32 ot_mpi_isp_get_clut_coeff(ot_vi_pipe vi_pipe, ot_isp_clut_lut *clut_lut); + +td_s32 ot_mpi_isp_set_dcf_info(ot_vi_pipe vi_pipe, const ot_isp_dcf_info *isp_dcf); +td_s32 ot_mpi_isp_get_dcf_info(ot_vi_pipe vi_pipe, ot_isp_dcf_info *isp_dcf); + +td_s32 ot_mpi_isp_set_csc_attr(ot_vi_pipe vi_pipe, const ot_isp_csc_attr *csc_attr); +td_s32 ot_mpi_isp_get_csc_attr(ot_vi_pipe vi_pipe, ot_isp_csc_attr *csc_attr); + +td_s32 ot_mpi_isp_set_rgbir_attr(ot_vi_pipe vi_pipe, const ot_isp_rgbir_attr *rgbir_attr); +td_s32 ot_mpi_isp_get_rgbir_attr(ot_vi_pipe vi_pipe, ot_isp_rgbir_attr *rgbir_attr); + +/* block, return fpn frame when this is function is called. */ +td_s32 ot_mpi_isp_fpn_calibrate(ot_vi_pipe vi_pipe, ot_isp_fpn_calibrate_attr *calibrate_attr); +td_s32 ot_mpi_isp_set_fpn_attr(ot_vi_pipe vi_pipe, const ot_isp_fpn_attr *fpn_attr); +td_s32 ot_mpi_isp_get_fpn_attr(ot_vi_pipe vi_pipe, ot_isp_fpn_attr *fpn_attr); + +td_s32 ot_mpi_isp_get_dng_image_static_info(ot_vi_pipe vi_pipe, + ot_isp_dng_image_static_info *dng_image_static_info); +td_s32 ot_mpi_isp_set_dng_color_param(ot_vi_pipe vi_pipe, const ot_isp_dng_color_param *dng_color_param); +td_s32 ot_mpi_isp_get_dng_color_param(ot_vi_pipe vi_pipe, ot_isp_dng_color_param *dng_color_param); + +td_s32 ot_mpi_isp_set_smart_info(ot_vi_pipe vi_pipe, const ot_isp_smart_info *smart_info); +td_s32 ot_mpi_isp_get_smart_info(ot_vi_pipe vi_pipe, ot_isp_smart_info *smart_info); + +td_s32 ot_mpi_isp_set_frame_info(ot_vi_pipe vi_pipe, const ot_isp_frame_info *isp_frame); +td_s32 ot_mpi_isp_get_frame_info(ot_vi_pipe vi_pipe, ot_isp_frame_info *isp_frame); +td_s32 ot_mpi_isp_calc_flicker_type(ot_vi_pipe vi_pipe, ot_isp_calc_flicker_input *input_param, + ot_isp_calc_flicker_output *output_param, ot_video_frame_info frame[], + td_u32 array_size); +td_s32 ot_mpi_isp_ir_auto(ot_vi_pipe vi_pipe, ot_isp_ir_auto_attr *ir_attr); + +td_s32 ot_mpi_isp_set_be_frame_attr(ot_vi_pipe vi_pipe, const ot_isp_be_frame_attr *be_frame_attr); +td_s32 ot_mpi_isp_get_be_frame_attr(ot_vi_pipe vi_pipe, ot_isp_be_frame_attr *be_frame_attr); + +td_s32 ot_mpi_isp_get_noise_calibration(ot_vi_pipe vi_pipe, ot_isp_noise_calibration *noise_calibration); +td_s32 ot_mpi_isp_set_detail_stats_cfg(ot_vi_pipe vi_pipe, + const ot_isp_detail_stats_cfg *detail_stats_cfg); +td_s32 ot_mpi_isp_get_detail_stats_cfg(ot_vi_pipe vi_pipe, ot_isp_detail_stats_cfg *detail_stats_cfg); +td_s32 ot_mpi_isp_get_detail_stats(ot_vi_pipe vi_pipe, ot_isp_detail_stats *detail_stats); +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_MPI_ISP_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_sns_ctrl.h b/libraries/isp/include/hi3519dv500/ot_sns_ctrl.h new file mode 100644 index 0000000..3771d77 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_sns_ctrl.h @@ -0,0 +1,105 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_SNS_CTRL_H +#define OT_SNS_CTRL_H + +#include "ot_type.h" +#include "ot_common_3a.h" +#include "ot_debug.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define ISP_SNS_SAVE_INFO_MAX 2 +typedef struct { + td_bool init; /* TD_TRUE: Sensor init */ + td_bool sync_init; /* TD_TRUE: Sync Reg init */ + td_u8 img_mode; + td_u8 hdr; /* TD_TRUE: HDR enable */ + ot_wdr_mode wdr_mode; + + ot_isp_sns_regs_info regs_info[ISP_SNS_SAVE_INFO_MAX]; /* [0]: Sensor reg info of cur-frame; + [1]: Sensor reg info of pre-frame ; */ + + td_u32 fl[ISP_SNS_SAVE_INFO_MAX]; /* [0]: FullLines of cur-frame; + [1]: Pre FullLines of pre-frame */ + td_u32 fl_std; /* FullLines std */ + td_u32 wdr_int_time[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 sns_wb_gain[OT_ISP_BAYER_CHN_NUM]; +} ot_isp_sns_state; + +typedef enum { + ISP_SNS_NORMAL = 0, + ISP_SNS_MIRROR = 1, + ISP_SNS_FLIP = 2, + ISP_SNS_MIRROR_FLIP = 3, + ISP_SNS_BUTT +} ot_isp_sns_mirrorflip_type; + +typedef struct { + char bus_addr; +} ot_isp_sns_bus_ex; + +typedef struct { + td_bool blc_clamp_en; /* TD_TRUE: sensor black level correction enable */ +} ot_isp_sns_blc_clamp; + +typedef struct { + td_s32 (*pfn_register_callback)(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib); + td_s32 (*pfn_un_register_callback)(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib); + td_s32 (*pfn_set_bus_info)(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info); + td_s32 (*pfn_set_bus_ex_info)(ot_vi_pipe vi_pipe, ot_isp_sns_bus_ex *serdes_info); + td_void (*pfn_standby)(ot_vi_pipe vi_pipe); + td_void (*pfn_restart)(ot_vi_pipe vi_pipe); + td_void (*pfn_mirror_flip)(ot_vi_pipe vi_pipe, ot_isp_sns_mirrorflip_type sns_mirror_flip); + td_void (*pfn_set_blc_clamp)(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp sns_blc_clamp); + td_s32 (*pfn_write_reg)(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); + td_s32 (*pfn_read_reg)(ot_vi_pipe vi_pipe, td_u32 addr); + td_s32 (*pfn_set_init)(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr); +} ot_isp_sns_obj; + +extern ot_isp_sns_obj g_sns_os08a20_obj; +extern ot_isp_sns_obj g_sns_os04a10_obj; +extern ot_isp_sns_obj g_sns_imx347_slave_obj; +extern ot_isp_sns_obj g_sns_os04a10_slave_obj; +extern ot_isp_sns_obj g_sns_imx515_obj; +extern ot_isp_sns_obj g_sns_sc450ai_obj; +extern ot_isp_sns_obj g_sns_sc850sl_obj; +extern ot_isp_sns_obj g_sns_gst412c_obj; + +#define sns_check_pointer_return(ptr) \ + do { \ + if ((ptr) == TD_NULL) { \ + isp_err_trace("Null Pointer!\n"); \ + return OT_ERR_ISP_NULL_PTR; \ + } \ + } while (0) + +#define sns_check_pointer_void_return(ptr) \ + do { \ + if ((ptr) == TD_NULL) { \ + isp_err_trace("Null Pointer!\n"); \ + return; \ + } \ + } while (0) + +#define sns_free(ptr) \ + do { \ + if ((ptr) != TD_NULL) { \ + free(ptr); \ + (ptr) = TD_NULL; \ + } \ + } while (0) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_SNS_CTRL_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_spi.h b/libraries/isp/include/hi3519dv500/ot_spi.h new file mode 100644 index 0000000..b41b304 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_spi.h @@ -0,0 +1,126 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_SPI_H +#define OT_SPI_H + +#include "ot_type.h" +#ifdef __LITEOS__ +#include +#endif + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#ifndef __LITEOS__ + +/* User space versions of kernel symbols for SPI clocking modes, + * matching + */ +#define OT_SPI_CPHA 0x01 +#define OT_SPI_CPOL 0x02 + +#define OT_SPI_MODE_0 (0 | 0) +#define OT_SPI_MODE_1 (0 | OT_SPI_CPHA) +#define OT_SPI_MODE_2 (OT_SPI_CPOL | 0) +#define OT_SPI_MODE_3 (OT_SPI_CPOL | OT_SPI_CPHA) + +#define OT_SPI_CS_HIGH 0x04 +#define OT_SPI_LSB_FIRST 0x08 +#define OT_SPI_3WIRE 0x10 +#define OT_SPI_LOOP 0x20 +#define OT_SPI_NO_CS 0x40 +#define OT_SPI_READY 0x80 + +/* IOCTL commands */ +#define OT_SPI_IOC_MAGIC 'k' + +/* + * struct spi_ioc_transfer - describes a single SPI transfer + * @tx_buf: Holds pointer to userspace buffer with transmit data, or null. + * If no data is provided, zeroes are shifted out. + * @rx_buf: Holds pointer to userspace buffer for receive data, or null. + * @len: Length of tx and rx buffers, in bytes. + * @speed_hz: Temporary override of the device's bitrate. + * @bits_per_word: Temporary override of the device's wordsize. + * @delay_usecs: If nonzero, how long to delay after the last bit transfer + * before optionally deselecting the device before the next transfer. + * @cs_change: True to deselect device before starting the next transfer. + * + * This structure is mapped directly to the kernel spi_transfer structure; + * the fields have the same meanings, except of course that the pointers + * are in a different address space (and may be of different sizes in some + * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel). + * Zero-initialize the structure, including currently unused fields, to + * accommodate potential future updates. + * + * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync(). + * Pass it an array of related transfers, they'll execute together. + * Each transfer may be half duplex (either direction) or full duplex. + * + * struct spi_ioc_transfer mesg[4]; + * ... + * status : ioctl(fd, SPI_IOC_MESSAGE(4), mesg); + * + * So for example one transfer might send a nine bit command (right aligned + * in a 16-bit word), the next could read a block of 8-bit data before + * terminating that command by temporarily deselecting the chip; the next + * could send a different nine bit command (re-selecting the chip), and the + * last transfer might write some register values. + * */ + /* If the contents of 'struct spi_ioc_transfer' ever change + * incompatibly, then the ioctl number (currently 0) must change; + * ioctls with constant size fields get a bit more in the way of + * error checking than ones (like this) where that field varies. + * + * NOTE: struct layout is the same in 64bit and 32bit userspace. + * */ +typedef struct { + td_u64 tx_buf; + td_u64 rx_buf; + + td_u32 len; + td_u32 speed_hz; + + td_u16 delay_usecs; + td_u8 bits_per_word; + td_u8 cs_change; + td_u32 pad; +} ot_spi_ioc_transfer; + +/* not all platforms use or _IOC_TYPECHECK() ... */ +#define ot_spi_msgsize(n) \ + ((((n) * (sizeof(ot_spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ + ? ((n) * (sizeof(ot_spi_ioc_transfer))) \ + : 0) +#define ot_spi_ioc_message(n) _IOW(OT_SPI_IOC_MAGIC, 0, char[ot_spi_msgsize(n)]) + +/* Read / Write of SPI mode (OT_SPI_MODE_0..OT_SPI_MODE_3) */ +#define OT_SPI_IOC_RD_MODE _IOR(OT_SPI_IOC_MAGIC, 1, td_u8) +#define OT_SPI_IOC_WR_MODE _IOW(OT_SPI_IOC_MAGIC, 1, td_u8) + +/* Read / Write SPI bit justification */ +#define OT_SPI_IOC_RD_LSB_FIRST _IOR(OT_SPI_IOC_MAGIC, 2, td_u8) +#define OT_SPI_IOC_WR_LSB_FIRST _IOW(OT_SPI_IOC_MAGIC, 2, td_u8) + +/* Read / Write SPI device word length (1..N) */ +#define OT_SPI_IOC_RD_BITS_PER_WORD _IOR(OT_SPI_IOC_MAGIC, 3, td_u8) +#define OT_SPI_IOC_WR_BITS_PER_WORD _IOW(OT_SPI_IOC_MAGIC, 3, td_u8) + +/* Read / Write SPI device default max speed hz */ +#define OT_SPI_IOC_RD_MAX_SPEED_HZ _IOR(OT_SPI_IOC_MAGIC, 4, td_u32) +#define OT_SPI_IOC_WR_MAX_SPEED_HZ _IOW(OT_SPI_IOC_MAGIC, 4, td_u32) + +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OT_SPI_H */ diff --git a/libraries/isp/include/hi3519dv500/ot_ssp.h b/libraries/isp/include/hi3519dv500/ot_ssp.h new file mode 100644 index 0000000..992fe47 --- /dev/null +++ b/libraries/isp/include/hi3519dv500/ot_ssp.h @@ -0,0 +1,35 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OT_SSP_H +#define OT_SSP_H + +#include "ot_type.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define OT_SSP_READ_ALT 0x1 +#define OT_SSP_WRITE_ALT 0X3 + +typedef struct { + td_u32 spi_no; + td_u8 dev_addr; + td_u32 dev_byte_num; + td_u32 reg_addr; + td_u32 addr_byte_num; + td_u32 data; + td_u32 data_byte_num; +} ot_spi_data; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/libraries/sensor/hi3519dv500/gst_412c/Makefile b/libraries/sensor/hi3519dv500/gst_412c/Makefile new file mode 100644 index 0000000..6a1848f --- /dev/null +++ b/libraries/sensor/hi3519dv500/gst_412c/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_gst412c + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.c b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.c new file mode 100644 index 0000000..0468d66 --- /dev/null +++ b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.c @@ -0,0 +1,680 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_thermo.h" +#include "ot_mpi_awb.h" + +#include "gst412c_cmos_ex.h" +#include "gst412c_cmos.h" + +#define GST412C_ID 412 +#define SENSOR_GST412C_WIDTH 2688 +#define SENSOR_GST412C_HEIGHT 1520 + + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define gst412c_sensor_set_ctx(dev, ctx) ((g_gst412c_sns_state[dev]) = (ctx)) +#define gst412c_sensor_reset_ctx(dev) (g_gst412c_sns_state[dev] = TD_NULL) + +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +ot_isp_sns_commbus g_gst412c_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0 }, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1 } +}; + +ot_isp_sns_state *g_gst412c_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; +ot_isp_sns_commbus *gst412c_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_gst412c_bus_info[vi_pipe]; +} + +ot_isp_sns_state *gst412c_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_gst412c_sns_state[vi_pipe]; +} + +const gst412c_video_mode_tbl g_gst412c_mode_tbl[GST412C_MODE_BUTT] = { + {GST412C_VMAX_4M_30FPS_12BIT_LINEAR, GST412C_FULL_LINES_MAX, 30, 5, + 2692, 1524, 0, OT_WDR_MODE_NONE, "GST412C_4M_30FPS_12BIT_LINEAR_MODE"}, +}; + +#define gst412c_err_mode_print(sns_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + +static td_void cmos_get_thermo_comm_default(ot_vi_pipe vi_pipe, ot_isp_thermo_sensor_default *themro_sns_dft) +{ + themro_sns_dft->bright_compensation = 4095; /* compensation 4095 */ + themro_sns_dft->bright_throw_ratio = 50; /* throw_ratio 50 */ + themro_sns_dft->dark_throw_ratio = 50; /* throw_ratio 50 */ + return; +} + +static td_s32 cmos_get_thermo_default(ot_vi_pipe vi_pipe, ot_isp_thermo_sensor_default *thermo_sns_dft) +{ + sns_check_pointer_return(thermo_sns_dft); + cmos_get_thermo_comm_default(vi_pipe, thermo_sns_dft); + + return TD_SUCCESS; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_thermo_default = cmos_get_thermo_default; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 5000 +#define CALIBRATE_STATIC_WB_R_GAIN 527 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 526 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 1 +#define CALIBRATE_AWB_P2 241 +#define CALIBRATE_AWB_Q1 (-15) +#define CALIBRATE_AWB_A1 159211 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-104902) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case GST412C_4M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; + + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + + cmos_get_isp_linear_default(isp_def); + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + } + + isp_def->sns_mode.sns_id = GST412C_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(black_level); + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), &g_cmos_blc, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0xBB8; + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + case OT_WDR_MODE_2To1_LINE: + sns_state->wdr_mode = OT_WDR_MODE_2To1_LINE; + printf("vc wdr 2t1 mode\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_gst412c_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = 0; + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = GST412C_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = GST412C_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = GST412C_DATA_BYTE; + } + + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sns_image_mode) { + case GST412C_4M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = GST412C_VMAX_4M_30FPS_12BIT_LINEAR; + break; + default: + sns_state->fl_std = GST412C_VMAX_4M_30FPS_12BIT_LINEAR; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < GST412C_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_gst412c_mode_tbl[i].max_fps && + sns_image_mode->width <= g_gst412c_mode_tbl[i].width && + sns_image_mode->height <= g_gst412c_mode_tbl[i].height && + sns_state->wdr_mode == g_gst412c_mode_tbl[i].wdr_mode) { + image_mode = (gst412c_res_mode)i; + break; + } + } + + if (i >= GST412C_MODE_BUTT) { + gst412c_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + gst412c_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = GST412C_4M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = GST412C_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[0] = GST412C_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[1] = GST412C_VMAX_4M_30FPS_12BIT_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = gst412c_init; + sensor_exp_func->pfn_cmos_sns_exit = gst412c_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 gst412c_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_gst412c_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + gst412c_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + gst412c_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + gst412c_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + gst412c_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = GST412C_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_thermo_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, GST412C_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_thermo_sensor_unreg_callback(vi_pipe, ae_lib, GST412C_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to thermo lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, GST412C_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_gst412c_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = gst412c_standby, + .pfn_restart = gst412c_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = TD_NULL, + .pfn_write_reg = gst412c_write_register, + .pfn_read_reg = gst412c_read_register, + .pfn_set_bus_info = gst412c_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.h b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.h new file mode 100644 index 0000000..511063d --- /dev/null +++ b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos.h @@ -0,0 +1,63 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef GST412C_CMOS_H +#define GST412C_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" +#include "ot_math.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#define GST412C_I2C_ADDR 0x84 +#define GST412C_ADDR_BYTE 1 +#define GST412C_DATA_BYTE 1 +#define gst412c_sensor_get_ctx(dev, ctx) ((ctx) = gst412c_get_ctx(dev)) + +#define GST412C_FULL_LINES_MAX 0x2610 +#define GST412C_FULL_LINES_MAX_2TO1_WDR 0x1380 +#define GST412C_INCREASE_LINES 0 /* make real fps less than stand fps because NVR require */ +#define GST412C_VMAX_4M_30FPS_12BIT_LINEAR (1624 + GST412C_INCREASE_LINES) +#define GST412C_VMAX_4M_30FPS_12BIT_2TO1_WDR (1624 + GST412C_INCREASE_LINES) /* 12bit */ + +typedef enum { + GST412C_4M_30FPS_12BIT_LINEAR_MODE = 0, + GST412C_MODE_BUTT +} gst412c_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} gst412c_video_mode_tbl; + + +ot_isp_sns_state *gst412c_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *gst412c_get_bus_info(ot_vi_pipe vi_pipe); + +td_void gst412c_init(ot_vi_pipe vi_pipe); +td_void gst412c_exit(ot_vi_pipe vi_pipe); +td_void gst412c_standby(ot_vi_pipe vi_pipe); +td_void gst412c_restart(ot_vi_pipe vi_pipe); +td_s32 gst412c_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 gst412c_read_register(ot_vi_pipe vi_pipe, td_u32 addr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* GST412C_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos_ex.h b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos_ex.h new file mode 100644 index 0000000..ab6d70f --- /dev/null +++ b/libraries/sensor/hi3519dv500/gst_412c/gst412c_cmos_ex.h @@ -0,0 +1,2768 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef GST412C_CMOS_EX_H +#define GST412C_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {3000, 3000, 3000, 3000}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 2592, 14}, /* ob_area */ + 0, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + }, + }, + { + {2688, 1520}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 0, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* aidm_blend_ratio */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 24, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + { + 6400, 0.0001548619, -0.4611639237, 0.0000000130, -0.0001639422, 2.1603885856, + 0.0001318677, 0.0220043103, 0.0000000104, 0.0000052716, 0.0067668941, 0, 0, 0, 0, 0 + } +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 1, /* enOpType */ + 0, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 40, /* fine_str */ + 0, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 0, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 26, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 0, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 1, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 120, 50, 50 + }, + /* he_neg_wgt */ + { + 120, 50, 180 + } + }, + + /* blc_ctrl */ + 0 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{64, 128, 128}, {0, 196, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {45, 80, 0}}, + {{32, 64, 0}, {24, 72, 0}}, + {{12, 24, 0}, {12, 64, 0}}, + {{8, 20, 0}, {8, 54, 0}}, + {{6, 12, 0}, {6, 36, 0}}, + {{0, 8, 0}, {0, 8, 0}}, + {{0, 6, 0}, {0, 6, 0}}, + {{0, 2, 0}, {0, 2, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 0, + { + 0, 4, 8, 12, 16, 19, 23, 27, 31, 35, 39, 43, 47, 51, 55, 59, 63, 67, + 71, 75, 79, 84, 88, 92, 96, 100, 104, 108, 112, 116, 120, 124, 129, 133, 137, 141, + 145, 149, 153, 157, 162, 166, 170, 174, 178, 182, 186, 190, 195, 199, 203, 207, 211, 215, + 219, 223, 228, 232, 236, 240, 244, 248, 252, 256, 260, 264, 268, 272, 276, 280, 285, 289, + 293, 297, 301, 305, 309, 312, 316, 320, 324, 328, 332, 336, 340, 344, 348, 352, 355, 359, + 363, 367, 371, 374, 378, 382, 386, 389, 393, 397, 400, 404, 408, 411, 415, 418, 422, 425, + 429, 433, 436, 439, 443, 446, 450, 453, 456, 460, 463, 466, 470, 473, 476, 479, 483, 486, + 489, 492, 495, 498, 501, 504, 507, 510, 512, 515, 518, 520, 523, 526, 528, 531, 533, 535, + 538, 540, 542, 544, 546, 549, 551, 553, 555, 557, 559, 561, 563, 564, 566, 568, 570, 572, + 574, 575, 577, 579, 580, 582, 584, 585, 587, 588, 590, 592, 593, 595, 596, 598, 599, 601, + 602, 604, 606, 607, 609, 610, 612, 613, 615, 616, 618, 619, 621, 623, 624, 626, 627, 629, + 631, 632, 634, 636, 637, 639, 641, 643, 644, 646, 648, 650, 652, 654, 656, 658, 660, 662, + 664, 666, 668, 670, 672, 675, 677, 679, 682, 684, 687, 689, 692, 694, 697, 700, 702, 705, + 708, 711, 714, 717, 720, 723, 726, 730, 733, 736, 740, 743, 747, 750, 754, 758, 762, 765, + 769, 773, 778, 782, 786, 790, 795, 799, 804, 808, 813, 818, 822, 827, 832, 837, 842, 847, + 852, 857, 863, 868, 873, 879, 884, 890, 895, 901, 906, 912, 918, 924, 929, 935, 941, 947, + 953, 959, 965, 971, 978, 984, 990, 996, 1002, 1009, 1015, 1022, 1028, 1034, 1041, 1047, 1054, 1061, + 1067, 1074, 1080, 1087, 1094, 1100, 1107, 1114, 1121, 1127, 1134, 1141, 1148, 1155, 1162, 1169, 1175, 1182, + 1189, 1196, 1203, 1210, 1217, 1224, 1231, 1238, 1245, 1252, 1259, 1266, 1273, 1280, 1287, 1294, 1301, 1308, + 1315, 1322, 1329, 1336, 1343, 1350, 1357, 1364, 1371, 1377, 1384, 1391, 1398, 1405, 1412, 1419, 1426, 1432, + 1439, 1446, 1453, 1459, 1466, 1473, 1479, 1486, 1493, 1499, 1506, 1512, 1519, 1525, 1532, 1538, 1544, 1551, + 1557, 1563, 1569, 1576, 1582, 1588, 1594, 1600, 1606, 1612, 1618, 1624, 1630, 1636, 1642, 1648, 1654, 1660, + 1665, 1671, 1677, 1683, 1689, 1695, 1700, 1706, 1712, 1718, 1723, 1729, 1735, 1740, 1746, 1752, 1757, 1763, + 1769, 1774, 1780, 1786, 1791, 1797, 1802, 1808, 1814, 1819, 1825, 1830, 1836, 1841, 1847, 1853, 1858, 1864, + 1869, 1875, 1880, 1886, 1891, 1897, 1902, 1908, 1913, 1919, 1925, 1930, 1936, 1941, 1947, 1952, 1958, 1963, + 1969, 1975, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2019, 2025, 2031, 2036, 2042, 2048, 2053, 2059, 2065, + 2070, 2076, 2082, 2088, 2093, 2099, 2105, 2111, 2116, 2122, 2128, 2134, 2140, 2146, 2152, 2158, 2163, 2169, + 2175, 2181, 2187, 2193, 2199, 2206, 2212, 2218, 2224, 2230, 2236, 2242, 2249, 2255, 2261, 2267, 2274, 2280, + 2286, 2293, 2299, 2305, 2312, 2318, 2325, 2331, 2338, 2345, 2351, 2358, 2365, 2371, 2378, 2385, 2392, 2399, + 2406, 2413, 2420, 2427, 2434, 2442, 2449, 2456, 2464, 2471, 2478, 2486, 2493, 2501, 2508, 2516, 2523, 2531, + 2538, 2546, 2554, 2561, 2569, 2577, 2584, 2592, 2600, 2608, 2616, 2623, 2631, 2639, 2647, 2655, 2663, 2671, + 2679, 2687, 2695, 2702, 2710, 2718, 2726, 2734, 2742, 2750, 2758, 2766, 2774, 2782, 2790, 2798, 2806, 2814, + 2822, 2830, 2838, 2846, 2854, 2861, 2869, 2877, 2885, 2893, 2901, 2909, 2916, 2924, 2932, 2940, 2947, 2955, + 2963, 2970, 2978, 2986, 2993, 3001, 3008, 3016, 3023, 3031, 3038, 3045, 3053, 3060, 3067, 3075, 3082, 3089, + 3096, 3103, 3110, 3117, 3124, 3131, 3138, 3145, 3151, 3158, 3165, 3172, 3178, 3185, 3191, 3198, 3204, 3210, + 3217, 3223, 3229, 3235, 3241, 3247, 3253, 3259, 3265, 3270, 3276, 3282, 3287, 3293, 3298, 3304, 3309, 3315, + 3320, 3325, 3331, 3336, 3341, 3347, 3352, 3357, 3362, 3367, 3372, 3377, 3382, 3387, 3392, 3397, 3402, 3407, + 3412, 3417, 3422, 3426, 3431, 3436, 3440, 3445, 3450, 3454, 3459, 3463, 3468, 3472, 3477, 3481, 3486, 3490, + 3494, 3499, 3503, 3507, 3512, 3516, 3520, 3524, 3528, 3532, 3537, 3541, 3545, 3549, 3553, 3557, 3561, 3565, + 3568, 3572, 3576, 3580, 3584, 3588, 3591, 3595, 3599, 3603, 3606, 3610, 3614, 3617, 3621, 3624, 3628, 3631, + 3635, 3638, 3642, 3645, 3649, 3652, 3656, 3659, 3662, 3666, 3669, 3672, 3675, 3679, 3682, 3685, 3688, 3692, + 3695, 3698, 3701, 3704, 3707, 3710, 3713, 3716, 3719, 3722, 3725, 3728, 3731, 3734, 3737, 3740, 3743, 3746, + 3749, 3752, 3754, 3757, 3760, 3763, 3766, 3768, 3771, 3774, 3777, 3779, 3782, 3785, 3787, 3790, 3792, 3795, + 3798, 3800, 3802, 3805, 3807, 3810, 3812, 3814, 3816, 3819, 3821, 3823, 3825, 3827, 3829, 3831, 3833, 3835, + 3837, 3839, 3841, 3843, 3845, 3846, 3848, 3850, 3852, 3853, 3855, 3857, 3858, 3860, 3862, 3863, 3865, 3866, + 3868, 3869, 3871, 3872, 3874, 3875, 3877, 3878, 3879, 3881, 3882, 3883, 3885, 3886, 3887, 3889, 3890, 3891, + 3892, 3893, 3895, 3896, 3897, 3898, 3899, 3900, 3902, 3903, 3904, 3905, 3906, 3907, 3908, 3909, 3910, 3911, + 3912, 3913, 3914, 3915, 3917, 3918, 3919, 3920, 3921, 3922, 3923, 3924, 3925, 3926, 3927, 3928, 3929, 3930, + 3931, 3932, 3933, 3934, 3935, 3936, 3937, 3938, 3939, 3940, 3941, 3942, 3943, 3944, 3945, 3946, 3947, 3948, + 3949, 3950, 3951, 3952, 3953, 3954, 3956, 3957, 3958, 3959, 3960, 3961, 3963, 3964, 3965, 3966, 3967, 3969, + 3970, 3971, 3972, 3973, 3975, 3976, 3977, 3978, 3979, 3980, 3982, 3983, 3984, 3985, 3986, 3987, 3988, 3989, + 3990, 3992, 3993, 3994, 3995, 3996, 3997, 3998, 3999, 4000, 4001, 4002, 4003, 4004, 4005, 4006, 4007, 4009, + 4010, 4011, 4012, 4013, 4014, 4015, 4016, 4017, 4018, 4019, 4020, 4021, 4022, 4023, 4024, 4025, 4026, 4027, + 4027, 4028, 4029, 4030, 4031, 4032, 4033, 4034, 4035, 4036, 4037, 4038, 4039, 4040, 4041, 4042, 4043, 4044, + 4045, 4046, 4047, 4048, 4049, 4050, 4050, 4051, 4052, 4053, 4054, 4055, 4056, 4057, 4058, 4059, 4060, 4061, + 4062, 4063, 4064, 4065, 4066, 4067, 4068, 4069, 4069, 4070, 4071, 4072, 4073, 4074, 4075, 4076, 4077, 4078, + 4079, 4080, 4081, 4082, 4083, 4084, 4085, 4086, 4087, 4088, 4089, 4090, 4091, 4092, 4093, 4094, 4095 + }, + 3, +}; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 4, + /* motion_threshold1 */ + 10, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 255, + /* skin_umin */ + 99, + /* skin_vmin */ + 134, + /* skin_umax */ + 127, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_MANUAL, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 73, 77, 84, 91, 99, 107, 114, 121, 126, 132, 138, 143, 148, 152, 154, 155, + 154, 152, 148, 144, 139, 133, 127, 120, 112, 103, 93, 83, 73, 63, 56, 50 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 73, 81, 89, 97, 105, 112, 119, 125, 130, 135, 139, 143, 146, 149, 150, 150, + 148, 145, 141, 136, 130, 125, 119, 113, 107, 100, 93, 86, 79, 73, 68, 64 + }, + /* texture_freq */ + 256, + /* edge_freq */ + 256, + /* over_shoot */ + 60, + /* under_shoot */ + 60, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 60, + /* motion_under_shoot */ + 60, + /* u8shoot_sup_str */ + 255, + /* u8shoot_sup_adj */ + 0, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 31, + /* g_gain */ + 32, + /* b_gain */ + 31, + /* skin_gain */ + 31, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 19, 19, 19, 19, 19 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 21, 21, 21, 21, 21 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 23, 23, 23, 23, 23 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 31, 31, 28, 27, 27, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 27, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 31, 31, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 31, 31, 28, 28, 28, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 29, 29, 29, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 30, 30, 30, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 26, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 88, 88, 88, 82, 82, 82, 75, 75, 75, 68, 68, 68, 68, 68, 68, 68 }, + { 95, 95, 95, 88, 88, 88, 80, 85, 81, 73, 73, 73, 73, 73, 73, 73 }, + { 104, 104, 104, 96, 96, 96, 88, 95, 89, 80, 80, 80, 80, 80, 80, 80 }, + { 116, 116, 116, 107, 107, 107, 98, 108, 101, 89, 89, 89, 89, 89, 89, 89 }, + { 127, 127, 127, 118, 118, 118, 108, 121, 114, 98, 98, 98, 98, 98, 98, 98 }, + { 139, 139, 139, 128, 128, 128, 118, 136, 130, 107, 107, 107, 107, 107, 107, 107 }, + { 150, 150, 150, 138, 138, 138, 127, 151, 145, 115, 115, 115, 115, 115, 115, 115 }, + { 156, 156, 156, 144, 144, 144, 132, 163, 157, 120, 120, 120, 120, 120, 120, 120 }, + { 160, 160, 160, 148, 148, 148, 135, 171, 164, 123, 123, 123, 123, 123, 123, 123 }, + { 163, 163, 163, 150, 150, 150, 138, 177, 169, 125, 125, 125, 125, 125, 125, 125 }, + { 165, 165, 165, 152, 152, 152, 140, 181, 171, 127, 127, 127, 127, 127, 127, 127 }, + { 166, 166, 166, 154, 154, 154, 141, 183, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 166, 166, 166, 154, 154, 154, 141, 184, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 165, 165, 165, 152, 152, 152, 140, 182, 173, 127, 127, 127, 127, 127, 127, 127 }, + { 164, 164, 164, 151, 151, 151, 139, 180, 171, 126, 126, 126, 126, 126, 126, 126 }, + { 161, 161, 161, 149, 149, 149, 136, 176, 168, 124, 124, 124, 124, 124, 124, 124 }, + { 157, 157, 157, 145, 145, 145, 133, 171, 165, 121, 121, 121, 121, 121, 121, 121 }, + { 152, 152, 152, 140, 140, 140, 129, 165, 162, 117, 117, 117, 117, 117, 117, 117 }, + { 147, 147, 147, 136, 136, 136, 124, 159, 157, 113, 113, 113, 113, 113, 113, 113 }, + { 140, 140, 140, 130, 130, 130, 119, 151, 152, 108, 108, 108, 108, 108, 108, 108 }, + { 133, 133, 133, 122, 122, 122, 112, 142, 145, 102, 102, 102, 102, 102, 102, 102 }, + { 125, 125, 125, 115, 115, 115, 106, 133, 137, 96, 96, 96, 96, 96, 96, 96 }, + { 117, 117, 117, 108, 108, 108, 99, 123, 129, 90, 90, 90, 90, 90, 90, 90 }, + { 111, 111, 111, 102, 102, 102, 94, 113, 120, 85, 85, 85, 85, 85, 85, 85 }, + { 103, 103, 103, 95, 95, 95, 87, 103, 111, 79, 79, 79, 79, 79, 79, 79 }, + { 95, 95, 95, 88, 88, 88, 80, 93, 102, 73, 73, 73, 73, 73, 73, 73 }, + { 87, 87, 87, 80, 80, 80, 74, 83, 93, 67, 67, 67, 67, 67, 67, 67 }, + { 78, 78, 78, 72, 72, 72, 66, 73, 84, 60, 60, 60, 60, 60, 60, 60 }, + { 70, 70, 70, 65, 65, 65, 59, 65, 73, 54, 54, 54, 54, 54, 54, 54 }, + { 62, 62, 62, 58, 58, 58, 53, 56, 62, 48, 48, 48, 48, 48, 48, 48 }, + { 57, 57, 57, 53, 53, 53, 48, 49, 51, 44, 44, 44, 44, 44, 44, 44 }, + { 52, 52, 52, 48, 48, 48, 44, 44, 44, 40, 40, 40, 40, 40, 40, 40 } + }, + /* edge_strength */ + { + { 183, 183, 183, 183, 183, 203, 203, 203, 223, 223, 223, 223, 223, 223, 223, 223 }, + { 186, 186, 186, 186, 186, 207, 207, 207, 228, 228, 228, 228, 228, 228, 228, 228 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 197, 197, 197, 197, 197, 219, 219, 219, 241, 241, 241, 241, 241, 241, 241, 241 }, + { 203, 203, 203, 203, 203, 226, 226, 226, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 209, 209, 209, 209, 209, 232, 232, 232, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 214, 214, 214, 214, 214, 238, 238, 238, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 215, 215, 215, 215, 215, 239, 239, 239, 263, 263, 263, 263, 263, 263, 263, 263 }, + { 211, 211, 211, 211, 211, 234, 234, 234, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 205, 205, 205, 205, 205, 228, 228, 228, 251, 251, 251, 251, 251, 251, 251, 251 }, + { 199, 199, 199, 199, 199, 221, 221, 221, 243, 243, 243, 243, 243, 243, 243, 243 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 182, 182, 182, 182, 182, 202, 202, 202, 222, 222, 222, 222, 222, 222, 222, 222 }, + { 171, 171, 171, 171, 171, 190, 190, 190, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 159, 159, 159, 159, 159, 177, 177, 177, 195, 195, 195, 195, 195, 195, 195, 195 }, + { 149, 149, 149, 149, 149, 165, 165, 165, 182, 182, 182, 182, 182, 182, 182, 182 }, + { 139, 139, 139, 139, 139, 154, 154, 154, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 130, 130, 130, 130, 130, 144, 144, 144, 158, 158, 158, 158, 158, 158, 158, 158 }, + { 123, 123, 123, 123, 123, 137, 137, 137, 151, 151, 151, 151, 151, 151, 151, 151 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 200, 190, 180, 180, 170, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 120, 120, 110, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 45, 40, 40, 40, 40, 40, 40, 40, 40 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149 }, + { 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170 }, + { 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180 }, + { 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190 }, + { 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202 }, + { 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213 }, + { 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224 }, + { 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235 }, + { 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269 }, + { 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264 }, + { 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240 }, + { 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, + { 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219 }, + { 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198 }, + { 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188 }, + { 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178 }, + { 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155 }, + { 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 7, 7, 6, 6, 5, 5, 4, 4, 3, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 6, 6, 5, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 58, 58, 58, 58, 60, 60, 60, 52, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 20, 18, 16, 15, 15, 15, 15, 15, 15, 15 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + 4, + { + { + 6420, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 4949, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 3630, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 2525, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 2100, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 1600, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + 1400, + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 0x8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 0x14, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0x0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 21, 29, 35, 39, 43, 47, 51, 54, 57, 59, 62, 64, 67, 69, 71, 73, 75, 77, 79, 81, 83, + 85, 86, 88, 90, 91, 93, 94, 96, 97, 99, 100, 102, 103, 104, 106, 107, 108, 110, 111, 112, 113, 114, + 116, 117, 118, 119, 120, 121, 122, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, + 139, 140, 141, 142, 143, 143, 144, 145, 146, 147, 148, 149, 150, 150, 151, 152, 153, 154, 155, 156, 156, 157, + 158, 159, 160, 160, 161, 162, 163, 164, 164, 165, 166, 167, 167, 168, 169, 170, 170, 171, 172, 173, 173, 174, + 175, 175, 176, 177, 178, 178, 179, 180, 180, 181, 182, 182, 183, 184, 184, 185, 186, 186, 187, 188, 188, 189, + 190, 190, 191, 192, 192, 193, 193, 194, 195, 195, 196, 197, 197, 198, 198, 199, 200, 200, 201, 201, 202, 203, + 203, 204, 204, 205, 206, 206, 207, 207, 208, 208, 209, 210, 210, 211, 211, 212, 212, 213, 214, 214, 215, 215, + 216, 216, 217, 217, 218, 219, 219, 220, 220, 221, 221, 222, 222, 223, 223, 224, 224, 225, 225, 226, 227, 227, + 228, 228, 229, 229, 230, 230, 231, 231, 232, 232, 233, 233, 234, 234, 235, 235, 236, 236, 237, 237, 238, 238, + 239, 239, 240, 240, 241, 241, 242, 242, 242, 243, 243, 244, 244, 245, 245, 246, 246, 247, 247, 248, 248, 249, + 249, 250, 250, 250, 251, 251, 252, 252, 253, 253, 254, 254, 255, 255 + }, + /* op_type */ + 1, + /* auto_strength */ + { + 196 + }, + /* manual_strength */ + { + 196 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_USER, + /* purple_reduction_strength */ + 0, + /* bright_gain_limit */ + 0, + /* bright_gain_limit_step */ + 15, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 0, + /* rim_reduction_strength */ + 0, + /* rim_reduction_threshold */ + 0, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 12, 12, 12, 12, 12, 12, 19, 19, 19, 19, 25, 25, 25, 32, + 32, 32, 38, 38, 44, 44, 51, 51, 57, 57, 64, 76, 83, 83, 89, 96, + 102, 108, 115, 134, 140, 147, 166, 172, 192, 204, 224, 236, 256, 275, 300, 326, + 358, 384, 416, 448, 486, 524, 569, 620, 665, 723, 793, 864, 940, 1024, 1113, 1203, + 1312, 1382, 1433, 1491, 1561, 1632, 1702, 1772, 1849, 1939, 2009, 2099, 2188, 2297, 2387, 2496, + 2604, 2713, 2822, 2944, 3052, 3194, 3792, 7949, 14541, 21373, 28417, 35711, 41630, 43712, 43961, 44165, + 44364, 44588, 44837, 45061, 45330, 45580, 45849, 46143, 46431, 46585, 46719, 46873, 47020, 47193, 47346, 47487, + 47641, 47788, 47922, 48063, 48191, 48319, 48460, 48588, 48729, 48869, 49017, 49177, 49337, 49516, 49714, 49919, + 50143, 50380, 50668, 50949, 51282, 51647, 52076, 52511, 53023, 53266, 53567, 53874, 54149, 54476, 54764, 55103, + 55455, 55813, 56172, 56543, 56921, 57298, 57682, 58073, 58521, 58917, 59314, 59769, 60172, 60626, 61087, 61490, + 61951, 62405, 62860, 63308, 63749, 64191, 64626, 65055 + }, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 0, + /* detail_adjust_coef */ + 10, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_MANUAL, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + /* CA */ + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + /* ISO */ + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 0, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* y_grid_width */ + {33, 33, 33, 33, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 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330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 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552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 0, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 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67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 67174464, 67174464, 0, 67174464, + 0, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67174464, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 67174464, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 + } + }, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OS08A20_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/gst_412c/gst412c_sensor_ctl.c b/libraries/sensor/hi3519dv500/gst_412c/gst412c_sensor_ctl.c new file mode 100644 index 0000000..de3d753 --- /dev/null +++ b/libraries/sensor/hi3519dv500/gst_412c/gst412c_sensor_ctl.c @@ -0,0 +1,442 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif + +#include "gst412c_cmos.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 +#define FILE_NAME_LEN 50 +#define LEN 10 +#define gst412c_check_fp_return(fp, file_name) \ + do { \ + if (fp == NULL) { \ + printf("Cannot open %s.\n", file_name); \ + return; \ + } \ + } while (0) + +td_void gpio_export(td_u32 gpio_chip_num, td_u32 gpio_offset) +{ + td_s32 ret; + FILE *fp = TD_NULL; + td_char file_name[FILE_NAME_LEN]; + td_u32 gpio_num = gpio_chip_num * 8 + gpio_offset; // 8 pins + + ret = sprintf_s(file_name, FILE_NAME_LEN, "/sys/class/gpio/export"); + if (ret < 0) { + printf("export sprintf_s failed with %d.\n", ret); + return; + } + fp = fopen(file_name, "w"); + gst412c_check_fp_return(fp, file_name); + ret = fprintf(fp, "%u", gpio_num); + if (ret < 0) { + printf("print gpio_num failed!!!\n"); + } + + ret = fclose(fp); + if (ret != 0) { + printf("export close fp err ret:%d\n", ret); + } + return; +} + +td_void gpio_dir(td_u32 gpio_chip_num, td_u32 gpio_offset) +{ + td_s32 ret; + FILE *fp = TD_NULL; + char file_name[FILE_NAME_LEN]; + td_u32 gpio_num = gpio_chip_num * 8 + gpio_offset; // 8 pins + + ret = sprintf_s(file_name, FILE_NAME_LEN, "/sys/class/gpio/gpio%u/direction", gpio_num); + if (ret < 0) { + printf("dir sprintf_s failed with %d.\n", ret); + return; + } + fp = fopen(file_name, "rb+"); + gst412c_check_fp_return(fp, file_name); + ret = fprintf(fp, "out"); + if (ret < 0) { + printf("print out failed!!!\n"); + } + ret = fclose(fp); + if (ret != 0) { + printf("dir close fp err, ret:%d\n", ret); + } + + return; +} + +td_void gpio_write(td_u32 gpio_chip_num, td_u32 gpio_offset, td_u32 gpio_out_val) +{ + td_s32 ret; + FILE *fp = TD_NULL; + char buf[LEN]; + char file_name[FILE_NAME_LEN]; + td_u32 gpio_num = gpio_chip_num * 8 + gpio_offset; // 8 pins + + ret = sprintf_s(file_name, FILE_NAME_LEN, "/sys/class/gpio/gpio%u/value", gpio_num); + if (ret < 0) { + printf("write sprintf_s failed with %d.\n", ret); + return; + } + + fp = fopen(file_name, "rb+"); + gst412c_check_fp_return(fp, file_name); + + if (gpio_out_val) { + strcpy_s(buf, LEN, "1"); + } else { + strcpy_s(buf, LEN, "0"); + } + ret = fwrite(buf, sizeof(char), sizeof(buf) - 1, fp); + if (ret != (sizeof(buf) - 1)) { + printf("%s: gpio%u_%u = %s, fwrite err ret:%d\n", __func__, gpio_chip_num, gpio_offset, buf, ret); + } + ret = fclose(fp); + if (ret != 0) { + printf("write close fp err, ret:%d\n", ret); + } + + return; +} + +td_void gpio_unexport(td_u32 gpio_chip_num, td_u32 gpio_offset) +{ + td_s32 ret; + FILE *fp = TD_NULL; + char file_name[FILE_NAME_LEN]; + td_u32 gpio_num = gpio_chip_num * 8 + gpio_offset; // 8 pins + + ret = sprintf_s(file_name, FILE_NAME_LEN, "/sys/class/gpio/unexport"); + if (ret < 0) { + printf("unexport sprintf_s failed with %d.\n", ret); + return; + } + + fp = fopen(file_name, "w"); + gst412c_check_fp_return(fp, file_name); + ret = fprintf(fp, "%u", gpio_num); + if (ret < 0) { + printf("print unexport gpio_num failed!!!\n"); + } + ret = fclose(fp); + if (ret != 0) { + printf("unexport close fp err, ret:%d\n", ret); + } + + return; +} + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; +int gst412c_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *gst412cbusinfo = TD_NULL; + gst412cbusinfo = gst412c_get_bus_info(vi_pipe); + dev_num = gst412cbusinfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (GST412C_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int gst412c_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 gst412c_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 gst412c_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = GST412C_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = GST412C_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = GST412C_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (GST412C_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + buf[idx] = addr & 0xff; + idx++; + } + + if (GST412C_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, GST412C_ADDR_BYTE + GST412C_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void gst412c_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void gst412c_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void gst412c_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +static void gst412c_linear_4m30_12bit_init(ot_vi_pipe vi_pipe); + +void gst412c_init(ot_vi_pipe vi_pipe) +{ + td_bool init; + td_s32 ret; + ot_isp_sns_state *pastgst412c = TD_NULL; + + pastgst412c = gst412c_get_ctx(vi_pipe); + init = pastgst412c->init; + + ret = gst412c_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + gst412c_linear_4m30_12bit_init(vi_pipe); + } else { + gst412c_linear_4m30_12bit_init(vi_pipe); + } + + pastgst412c->init = TD_TRUE; + return; +} + +void gst412c_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = gst412c_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("GST412C exit failed!\n"); + } + + return; +} + +static td_s32 gst412c_linear_4m30_12bit_init_1(ot_vi_pipe vi_pipe) +{ + td_u32 gpio_chip_num2 = 2; // gpio2 + gpio_export(gpio_chip_num2, 0x0); // gpio2_0 + gpio_export(gpio_chip_num2, 0x2); // gpio2_2 + gpio_dir(gpio_chip_num2, 0x0); // gpio2_0 out + gpio_dir(gpio_chip_num2, 0x2); // gpio2_2 out + gpio_write(gpio_chip_num2, 0x0, 1); // set GPIO2_0 1 + delay_ms(1000); // delay 1000ms + gpio_write(gpio_chip_num2, 0x2, 1); // set GPIO2_2 1 + delay_ms(1000); // delay 1000ms + + td_s32 ret = TD_SUCCESS; + + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa9); + ret += gst412c_write_register(vi_pipe, 0x0, 0x0); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa8); + ret += gst412c_write_register(vi_pipe, 0x02, 0x90); + ret += gst412c_write_register(vi_pipe, 0x03, 0x01); + ret += gst412c_write_register(vi_pipe, 0x04, 0x34); + ret += gst412c_write_register(vi_pipe, 0x05, 0x01); + ret += gst412c_write_register(vi_pipe, 0x06, 0x48); + ret += gst412c_write_register(vi_pipe, 0x07, 0x00); + ret += gst412c_write_register(vi_pipe, 0x08, 0x3d); + ret += gst412c_write_register(vi_pipe, 0x09, 0x01); + ret += gst412c_write_register(vi_pipe, 0x0a, 0x00); + ret += gst412c_write_register(vi_pipe, 0x0b, 0x00); + ret += gst412c_write_register(vi_pipe, 0x0c, 0x90); + ret += gst412c_write_register(vi_pipe, 0x0d, 0x01); + ret += gst412c_write_register(vi_pipe, 0x0e, 0x01); + ret += gst412c_write_register(vi_pipe, 0x2F, 0x41); + ret += gst412c_write_register(vi_pipe, 0x30, 0x44); + ret += gst412c_write_register(vi_pipe, 0x31, 0x02); + ret += gst412c_write_register(vi_pipe, 0x32, 0x00); + ret += gst412c_write_register(vi_pipe, 0x10, 0x00); + ret += gst412c_write_register(vi_pipe, 0x01, 0x01); + return ret; +} + +static td_s32 gst412c_linear_4m30_12bit_init_2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + delay_ms(0x5); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xab); + ret += gst412c_write_register(vi_pipe, 0x01, 0x03); + ret += gst412c_write_register(vi_pipe, 0x05, 0x03); + ret += gst412c_write_register(vi_pipe, 0x06, 0xff); + ret += gst412c_write_register(vi_pipe, 0x09, 0x40); + ret += gst412c_write_register(vi_pipe, 0x0a, 0xc0); + ret += gst412c_write_register(vi_pipe, 0x0d, 0x00); + ret += gst412c_write_register(vi_pipe, 0x0f, 0x08); + ret += gst412c_write_register(vi_pipe, 0x10, 0x20); + ret += gst412c_write_register(vi_pipe, 0x11, 0x20); + ret += gst412c_write_register(vi_pipe, 0x19, 0x07); + ret += gst412c_write_register(vi_pipe, 0x1B, 0xFF); + ret += gst412c_write_register(vi_pipe, 0x1d, 0x3e); + ret += gst412c_write_register(vi_pipe, 0x1e, 0x7f); + ret += gst412c_write_register(vi_pipe, 0x20, 0xff); + ret += gst412c_write_register(vi_pipe, 0x21, 0xff); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa9); + ret += gst412c_write_register(vi_pipe, 0x03, 0x01); + ret += gst412c_write_register(vi_pipe, 0x06, 0x37); + ret += gst412c_write_register(vi_pipe, 0x07, 0x12); + ret += gst412c_write_register(vi_pipe, 0x0a, 0x88); + ret += gst412c_write_register(vi_pipe, 0x0b, 0x13); + ret += gst412c_write_register(vi_pipe, 0x27, 0x0E); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa8); + ret += gst412c_write_register(vi_pipe, 0x20, 0x07); + ret += gst412c_write_register(vi_pipe, 0x1f, 0x0d); + ret += gst412c_write_register(vi_pipe, 0x2c, 0x02); + ret += gst412c_write_register(vi_pipe, 0x35, 0x3d); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa9); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xab); + ret += gst412c_write_register(vi_pipe, 0x12, 0x04); + ret += gst412c_write_register(vi_pipe, 0x18, 0x24); + ret += gst412c_write_register(vi_pipe, 0x7C, 0xA9); + ret += gst412c_write_register(vi_pipe, 0x42, 0x05); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa8); + return ret; +} + +static td_s32 gst412c_linear_4m30_12bit_init_3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa8); + ret += gst412c_write_register(vi_pipe, 0x2d, 0x38); + ret += gst412c_write_register(vi_pipe, 0x2e, 0x00); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xa8); + ret += gst412c_write_register(vi_pipe, 0x28, 0x05); + ret += gst412c_write_register(vi_pipe, 0x7c, 0xab); + ret += gst412c_write_register(vi_pipe, 0x20, 0x1f); + ret += gst412c_write_register(vi_pipe, 0x21, 0xff); + ret += gst412c_write_register(vi_pipe, 0x09, 0x3e); + return ret; +} + +static void gst412c_linear_4m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_u32 gpio_chip_num2 = 2; // gpio2 + td_s32 ret = TD_SUCCESS; + ret += gst412c_linear_4m30_12bit_init_1(vi_pipe); + ret += gst412c_linear_4m30_12bit_init_2(vi_pipe); + ret += gst412c_linear_4m30_12bit_init_3(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("gst412c write register failed!\n"); + return; + } + + gpio_export(gpio_chip_num2, 0x1); // gpio2_1 + gpio_export(gpio_chip_num2, 0x3); // gpio2_3 + gpio_dir(gpio_chip_num2, 0x1); // gpio2_1 out + gpio_dir(gpio_chip_num2, 0x3); // gpio2_3 out + gpio_write(gpio_chip_num2, 0x1, 0); // set GPIO2_1 0 + gpio_write(gpio_chip_num2, 0x3, 1); // set GPIO2_3 1 + delay_ms(50); // delay 50ms + gpio_write(gpio_chip_num2, 0x1, 0); // set GPIO2_1 0 + gpio_write(gpio_chip_num2, 0x3, 0); // set GPIO2_3 0 + + gpio_unexport(gpio_chip_num2, 0x0); + gpio_unexport(gpio_chip_num2, 0x1); + gpio_unexport(gpio_chip_num2, 0x2); + gpio_unexport(gpio_chip_num2, 0x3); + + printf("========================================================================\n"); + printf("vi_pipe:%d,== gst412c 24Mclk 4M30fps(MIPI) 12bit linear init success! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} \ No newline at end of file diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10/Makefile b/libraries/sensor/hi3519dv500/omnivision_os04a10/Makefile new file mode 100644 index 0000000..84985ff --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_os04a10 + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.c b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.c new file mode 100644 index 0000000..21d3868 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.c @@ -0,0 +1,1556 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" + +#include "os04a10_cmos_ex.h" +#include "os04a10_cmos.h" + +#define OS04A10_ID 4 +#define SENSOR_OS04A10_WIDTH 2688 +#define SENSOR_OS04A10_HEIGHT 1520 + +#define higher_4bits(x) (((x) & 0xf0000) >> 16) +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) +#define low_2bits(x) ((x) & 0x0003) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define os04a10_sensor_set_ctx(dev, ctx) ((g_os04a10_sns_state[dev]) = (ctx)) +#define os04a10_sensor_reset_ctx(dev) (g_os04a10_sns_state[dev] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; + +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_again[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_isp_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +ot_isp_sns_commbus g_os04a10_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0 }, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1 } +}; + +ot_isp_sns_state *g_os04a10_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; +ot_isp_sns_commbus *os04a10_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_os04a10_bus_info[vi_pipe]; +} + +ot_isp_sns_state *os04a10_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_os04a10_sns_state[vi_pipe]; +} + +const os04a10_video_mode_tbl g_os04a10_mode_tbl[OS04A10_MODE_BUTT] = { + {OS04A10_VMAX_4M_30FPS_12BIT_LINEAR, OS04A10_FULL_LINES_MAX, 30, 5, + 2692, 1524, 0, OT_WDR_MODE_NONE, "OS04A10_4M_30FPS_12BIT_LINEAR_MODE"}, + {OS04A10_VMAX_4M_30FPS_12BIT_2TO1_WDR, OS04A10_FULL_LINES_MAX_2TO1_WDR, 30, 10.0, + 2688, 1520, 0, OT_WDR_MODE_2To1_LINE, "OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE"}, +}; + +/**************************************************************************** + * local variables * + ****************************************************************************/ +/* Os04a10 Register Address */ +#define OS04A10_EXPO_H_ADDR 0x3501 +#define OS04A10_EXPO_L_ADDR 0x3502 +#define OS04A10_AGAIN_H_ADDR 0x3508 +#define OS04A10_AGAIN_L_ADDR 0x3509 +#define OS04A10_DGAIN_H_ADDR 0x350a +#define OS04A10_DGAIN_M_ADDR 0x350b +#define OS04A10_DGAIN_L_ADDR 0x350c +#define OS04A10_SHORT_EXPO_H_ADDR 0x3541 +#define OS04A10_SHORT_EXPO_L_ADDR 0x3542 +#define OS04A10_SHORT_AGAIN_H_ADDR 0x3548 +#define OS04A10_SHORT_AGAIN_L_ADDR 0x3549 +#define OS04A10_SHORT_DGAIN_H_ADDR 0x354a +#define OS04A10_SHORT_DGAIN_L_ADDR 0x354b +#define OS04A10_SHORT_DGAIN_LL_ADDR 0x354c +#define OS04A10_VMAX_H_ADDR 0x380e +#define OS04A10_VMAX_L_ADDR 0x380f +#define OS04A10_HCG_1_ADDR 0x376C +#define OS04A10_GROUP_1_ADDR 0x320d +#define OS04A10_GROUP_2_ADDR 0x3208 +#define OS04A10_GROUP_3_ADDR 0x3208 +#define OS04A10_GROUP_4_ADDR 0x320d +#define OS04A10_GROUP_5_ADDR 0x320a +#define OS04A10_GROUP_6_ADDR 0x320e +#define OS04A10_STEP_OFFSET 1520 +#define OS04A10_MARGIN 40 + + +#define os04a10_err_mode_print(sns_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = OS04A10_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->again_accu.accuracy = 0.0625; /* accuracy: 0.0625 */ + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->dgain_accu.accuracy = 0.0009765625; /* accuracy: 0.0009765625 */ + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 32 << ae_sns_dft->isp_dgain_shift; /* max 32 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + + (td_void)memcpy_s(&ae_sns_dft->piris_attr, sizeof(ot_isp_piris_attr), &g_piris, sizeof(ot_isp_piris_attr)); + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_4; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_5_6; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 992; /* max 992 */ + ae_sns_dft->min_again = 16; /* min 16 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 1024; /* max 1024 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x40; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 76151; /* init 76151 */ + ae_sns_dft->init_int_time = g_init_int_time[vi_pipe]; + ae_sns_dft->init_again = g_init_again[vi_pipe]; + ae_sns_dft->init_dgain = g_init_dgain[vi_pipe]; + ae_sns_dft->init_isp_dgain = g_init_isp_dgain[vi_pipe]; + + ae_sns_dft->max_int_time = sns_state->fl_std - 8; /* sub 8 */ + ae_sns_dft->min_int_time = 1; /* min int 1 */ + ae_sns_dft->max_int_time_target = 65535; /* max int 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_void cmos_get_ae_2to1_line_wdr_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_int_time = sns_state->fl_std - 8; /* sub 8 */ + ae_sns_dft->min_int_time = 2; /* min_int_time 2 */ + ae_sns_dft->int_time_accu.offset = -0.66; /* -0.66 line for stagger */ + + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->max_again = 992; /* max 992:63488 */ + ae_sns_dft->min_again = 16; /* min 16:1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 16383; /* max 16383 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + ae_sns_dft->max_isp_dgain_target = 4 << ae_sns_dft->isp_dgain_shift; /* max 4 << shift */ + ae_sns_dft->diff_gain_support = TD_TRUE; + + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 52000; /* init 52000 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + ae_sns_dft->ae_compensation = 56; /* ae_compensation 56 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + } else { + ae_sns_dft->ae_compensation = 32; /* ae_compensation 32 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_LOWLIGHT_PRIOR; + ae_sns_dft->man_ratio_enable = TD_TRUE; + ae_sns_dft->arr_ratio[0] = 0x400; + ae_sns_dft->arr_ratio[1] = 0x40; + ae_sns_dft->arr_ratio[2] = 0x40; /* array index 2 */ + } + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + + case OT_WDR_MODE_2To1_LINE: + cmos_get_ae_2to1_line_wdr_default(vi_pipe, ae_sns_dft, sns_state); + break; + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(vmax); + } else { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].data = high_8bits(vmax); + } + + return; +} + +/* the function of sensor set fps */ +static td_bool cmos_2to1_vmax_limit(td_u32 *vmax, td_u32 full_line, td_u32 step, td_bool fps_up) +{ + if (fps_up) { + if ((*vmax) + step < full_line) { + (*vmax) = (full_line - step); + return TD_FALSE; + } + } else { + if ((*vmax) > full_line + step) { + (*vmax) = (full_line + step); + return TD_FALSE; + } + } + return TD_TRUE; +} + +/* the function of sensor set fps */ +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, vmax; + td_bool achieve_fps_flag; + td_float max_fps, min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_os04a10_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_os04a10_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_os04a10_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_os04a10_mode_tbl[sns_state->img_mode].min_fps; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + achieve_fps_flag = TD_TRUE; + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + achieve_fps_flag = cmos_2to1_vmax_limit(&vmax, sns_state->fl[0], 20, fps > ae_sns_dft->fps); /* step 20 */ + vmax = (vmax > lines_max) ? lines_max : vmax; + vmax = (vmax > 0x486) ? vmax : 0x486; + cmos_config_vmax(sns_state, vmax); + sns_state->fl_std = vmax; + ae_sns_dft->lines_per500ms = (td_u32)(lines * max_fps / 2); /* div 2 */ + ae_sns_dft->max_int_time = sns_state->fl_std - 8; /* sub 8 */ + } else { + vmax = (vmax > lines_max) ? lines_max : vmax; + cmos_config_vmax(sns_state, vmax); + sns_state->fl_std = vmax; + ae_sns_dft->lines_per500ms = (td_u32)(lines * max_fps / 2); /* div 2 */ + ae_sns_dft->max_int_time = sns_state->fl_std - 10; /* sub 10 */ + } + + ae_sns_dft->fps = lines * max_fps * 0x40 / vmax / 0x40; + ae_sns_dft->fps = (achieve_fps_flag) ? fps : ae_sns_dft->fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines_max, vmax; + td_bool achieve_fps; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_os04a10_mode_tbl[sns_state->img_mode].max_ver_lines; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + vmax = full_lines; + achieve_fps = cmos_2to1_vmax_limit(&vmax, sns_state->fl[0], 20, full_lines < sns_state->fl[0]); /* 20 */ + vmax = (vmax > lines_max) ? lines_max : vmax; + vmax = (vmax > 0x486) ? vmax : 0x486; + sns_state->fl[0] = vmax; + } else { + vmax = full_lines; + vmax = (vmax > lines_max) ? lines_max : vmax; + sns_state->fl[0] = vmax; + } + ot_unused(achieve_fps); + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(sns_state->fl[0]); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(sns_state->fl[0]); + ae_sns_dft->max_int_time = sns_state->fl[0] - 10; /* max_int_time: Flstd - 10 */ + break; + case OT_WDR_MODE_2To1_LINE: + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].data = low_8bits(sns_state->fl[0]); + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].data = high_8bits(sns_state->fl[0]); + ae_sns_dft->max_int_time = sns_state->fl[0] - 8; /* max_int_time: Flstd - 8 */ + break; + default: + break; + } + + ae_sns_dft->full_lines = sns_state->fl[0]; + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 value; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + value = int_time; + + if (g_quick_start_en[vi_pipe] == TD_TRUE) { + os04a10_write_register(vi_pipe, OS04A10_EXPO_L_ADDR, low_8bits(value)); + os04a10_write_register(vi_pipe, OS04A10_EXPO_H_ADDR, high_8bits(value)); + } else { + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = low_8bits(value); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = high_8bits(value); + } + return; +} + +static td_void cmos_inttime_update_2to1_line(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + static td_bool is_first[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1}; + + static td_u32 short_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + static td_u32 long_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (is_first[vi_pipe]) { /* short exposure */ + sns_state->wdr_int_time[0] = int_time; + short_int_time[vi_pipe] = int_time; + is_first[vi_pipe] = TD_FALSE; + } else { /* long exposure */ + sns_state->wdr_int_time[1] = int_time; + long_int_time[vi_pipe] = int_time; + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = low_8bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = high_8bits(long_int_time[vi_pipe]); + + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].data = low_8bits(short_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].data = high_8bits(short_int_time[vi_pipe]); + is_first[vi_pipe] = TD_TRUE; + } + + return; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + cmos_inttime_update_2to1_line(vi_pipe, int_time); + } else { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} + +static td_void cmos_gains_regs_set(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state, + td_u32 again_reg, td_u32 dgain_reg, td_u32 hcg_1_reg) +{ + static td_bool first_gain[OT_ISP_MAX_PIPE_NUM] = { [0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1 }; + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + if (g_quick_start_en[vi_pipe]) { + os04a10_write_register(vi_pipe, OS04A10_AGAIN_L_ADDR, ((again_reg & 0xf) << 4)); /* shift 4 */ + os04a10_write_register(vi_pipe, OS04A10_AGAIN_H_ADDR, ((again_reg & 0xf0) >> 4)); /* shift 4 */ + os04a10_write_register(vi_pipe, OS04A10_DGAIN_L_ADDR, ((dgain_reg & 0x03) << 6)); /* shift 6 */ + os04a10_write_register(vi_pipe, OS04A10_DGAIN_M_ADDR, ((dgain_reg & 0x03FC) >> 2)); /* shift 2 */ + os04a10_write_register(vi_pipe, OS04A10_DGAIN_H_ADDR, ((dgain_reg & 0x3C00) >> 10)); /* shift 10 */ + os04a10_write_register(vi_pipe, OS04A10_GROUP_1_ADDR, 0x00); + os04a10_write_register(vi_pipe, OS04A10_GROUP_2_ADDR, 0x01); + os04a10_write_register(vi_pipe, OS04A10_HCG_1_ADDR, (hcg_1_reg & 0xff)); + os04a10_write_register(vi_pipe, OS04A10_GROUP_3_ADDR, 0x11); + os04a10_write_register(vi_pipe, OS04A10_GROUP_4_ADDR, 0x05); + os04a10_write_register(vi_pipe, OS04A10_GROUP_5_ADDR, 0x01); + os04a10_write_register(vi_pipe, OS04A10_GROUP_6_ADDR, 0xa0); + } else { + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].data = ((again_reg & 0xf) << 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].data = ((again_reg & 0xf0) >> 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].data = ((dgain_reg & 0x03) << 6); /* shift 6 */ + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].data = ((dgain_reg & 0x03FC) >> 2); /* shift 2 */ + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].data = ((dgain_reg & 0x3C00) >> 10); /* shift 10 */ + sns_state->regs_info[0].i2c_data[HCG_1_IDX].data = (hcg_1_reg & 0xff); + } + } else if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + if (first_gain[vi_pipe] == TD_TRUE) { /* long frame */ + sns_state->regs_info[0].i2c_data[WDR_AGAIN_L_IDX].data = ((again_reg & 0xf) << 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[WDR_AGAIN_H_IDX].data = ((again_reg & 0xf0) >> 4); /* shift 4 */ + + sns_state->regs_info[0].i2c_data[WDR_DGAIN_L_IDX].data = ((dgain_reg & 0x03) << 6); /* shift 6 */ + sns_state->regs_info[0].i2c_data[WDR_DGAIN_M_IDX].data = ((dgain_reg & 0x03FC) >> 2); /* shift 2 */ + sns_state->regs_info[0].i2c_data[WDR_DGAIN_H_IDX].data = ((dgain_reg & 0x3C00) >> 10); /* shift 10 */ + + first_gain[vi_pipe] = TD_FALSE; + } else { /* short frame */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].data = ((again_reg & 0xf) << 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].data = ((again_reg & 0xf0) >> 4); /* shift 4 */ + + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_LL_IDX].data = ((dgain_reg & 0x03) << 6); /* shift 6 */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].data = ((dgain_reg & 0x03FC) >> 2); /* shift 2 */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].data = ((dgain_reg & 0x3C00) >> 10); /* shift 10 */ + + first_gain[vi_pipe] = TD_TRUE; + } + sns_state->regs_info[0].i2c_data[WDR_HCG_1_IDX].data = (hcg_1_reg & 0xff); + } + + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 again_reg, dgain_reg, hcg_1_reg; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (again < 0x44) { + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + hcg_1_reg = 0x12; + } else if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + hcg_1_reg = 0x32; + } else { + hcg_1_reg = 0x72; + } + } else { + hcg_1_reg = 0x02; + again = (td_u32)((td_float)again / 4.25 + 0.5); /* HCG gain equal 4.25, 0.5 */ + } + + again_reg = clip3(again, 0x10, 0xF8); + dgain_reg = clip3(dgain, 0x400, 0x3FFF); + + cmos_gains_regs_set(vi_pipe, sns_state, again_reg, dgain_reg, hcg_1_reg); + + return; +} + +static td_void cmos_clip_ratio_range(td_u32 *a_exp_ratio, const ot_isp_ae_int_time_range *int_time, + td_u32 wdr_frame_num) +{ + td_u32 i, ratio_min, ratio_max; + for (i = 0; i < wdr_frame_num - 1; ++i) { + ratio_max = int_time->int_time_max[i + 1] * 0x40 / int_time->int_time_min[i]; + ratio_min = int_time->int_time_min[i + 1] * 0x40 / int_time->int_time_max[i]; + a_exp_ratio[i] = MIN2(MAX2(a_exp_ratio[i], ratio_min), ratio_max); + a_exp_ratio[i] = MIN2(MAX2(a_exp_ratio[i], 0x40), 0x4000); + } +} + +static td_void cmos_step_limit(ot_isp_ae_int_time_range *int_time, + const time_step *step, td_u32 full_lines, td_u32 wdr_frame_num) +{ + td_u32 i; + td_u32 max_int_time = 0; + for (i = 0; i < wdr_frame_num; ++i) { + if (int_time->pre_int_time[i] == 0) { + return ; + } + } + for (i = 0; i < wdr_frame_num; ++i) { + if (step->inc[i] > 0) { + int_time->int_time_max[i] = MIN2(int_time->pre_int_time[i] + step->inc[i], int_time->int_time_max[i]); + } + if (step->dec[i] > 0) { + if (int_time->pre_int_time[i] > step->dec[i]) { + int_time->int_time_min[i] = MAX2(int_time->pre_int_time[i] - step->dec[i], int_time->int_time_min[i]); + } else { + int_time->int_time_min[i] = MAX2(int_time->int_time_min[i], 0); + } + } + if (int_time->int_time_min[i] > int_time->int_time_max[i]) { + int_time->int_time_max[i] = int_time->int_time_min[i]; + } + /* make sure LEF > SEF1 and SEF1 > SEF2 */ + if (i > 0) { + int_time->int_time_max[i] = MAX2(int_time->int_time_max[i], int_time->int_time_max[i - 1]); + int_time->int_time_min[i] = MAX2(int_time->int_time_min[i], int_time->int_time_min[i - 1]); + } + } + /* make sure max_int_time < full_lines */ + for (i = 0; i < wdr_frame_num; ++i) { + max_int_time += int_time->int_time_max[i]; + } + if (max_int_time > full_lines) { + max_int_time = max_int_time - full_lines; + for (i = 0; i < wdr_frame_num; ++i) { + if (int_time->int_time_max[i] - int_time->int_time_min[i] > max_int_time) { + int_time->int_time_max[i] = int_time->int_time_max[i] - max_int_time; + return; + } + } + } + return; +} + +static td_void cmos_step_calculate(ot_vi_pipe vi_pipe, time_step *step) +{ + td_u32 i; + ot_isp_sns_state *sns_state = TD_NULL; + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + for (i = 0; i < OT_ISP_WDR_MAX_FRAME_NUM; ++i) { + step->inc[i] = 0; + step->dec[i] = 0; + } + for (i = 0; i < 2; ++i) { /* frame number is 2 */ + step->inc[i] = (sns_state->fl[1] - OS04A10_STEP_OFFSET) >> 1; /* shift 1 */ + step->dec[i] = (sns_state->fl[1] - OS04A10_STEP_OFFSET) >> 1; /* shift 1 */ + } + return; +} + +static td_void cmos_get_inttime_max_2to1_line(ot_vi_pipe vi_pipe, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + td_u32 short_max0, short_max, short_time_min_limit; + ot_isp_sns_state *sns_state = TD_NULL; + time_step step = {0}; + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + static td_u32 pre_ratio[OT_ISP_MAX_PIPE_NUM] = {[0 ... OT_ISP_MAX_PIPE_NUM - 1] = 0X40}; + short_time_min_limit = 2; /* short_time_min_limit 2 */ + + cmos_step_calculate(vi_pipe, &step); + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + short_max0 = sns_state->fl[1] - OS04A10_MARGIN - step.inc[0] - sns_state->wdr_int_time[0]; + short_max = sns_state->fl[0] - OS04A10_MARGIN - step.inc[0]; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + int_time->int_time_max[0] = short_time_min_limit; + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_max[1] = short_max; + int_time->int_time_min[1] = short_time_min_limit; + } else { + short_max0 = ((sns_state->fl[1] - OS04A10_MARGIN - step.inc[0] - sns_state->wdr_int_time[0]) * 0x40) / + div_0_to_1(ratio[0]); + short_max = ((sns_state->fl[0] - OS04A10_MARGIN - step.inc[0]) * 0x40) / (ratio[0] + 0x40); + short_max = (short_max0 < short_max) ? short_max0 : short_max; + short_max = (short_max == 0) ? 1 : short_max; + *lf_max_int_time = sns_state->fl[0] - OS04A10_MARGIN - step.inc[0]; + if (short_max >= short_time_min_limit) { + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * ratio[0]) >> 6; /* shift 6 */ + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_min[1] = (int_time->int_time_min[0] * ratio[0]) >> 6; /* shift 6 */ + } else { + short_max = short_time_min_limit; + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * 0xFFF) >> 6; /* shift 6 */ + int_time->int_time_min[0] = int_time->int_time_max[0]; + int_time->int_time_min[1] = int_time->int_time_max[1]; + } + if (ratio[0] != pre_ratio[vi_pipe]) { + cmos_step_limit(int_time, &step, sns_state->fl[1], 2); /* frame number is 2 */ + cmos_clip_ratio_range(ratio, (const ot_isp_ae_int_time_range *)int_time, 2); /* frame number is 2 */ + } + } + pre_ratio[vi_pipe] = ratio[0]; + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + ot_unused(man_ratio_enable); + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_2To1_LINE: + cmos_get_inttime_max_2to1_line(vi_pipe, ratio, int_time, lf_max_int_time); + break; + default: + break; + } + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + + return; +} + +static td_void cmos_ae_quick_start_status_set(ot_vi_pipe vi_pipe, td_bool quick_start_en) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + g_quick_start_en[vi_pipe] = quick_start_en; + sns_state->sync_init = TD_FALSE; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + exp_func->pfn_cmos_ae_quick_start_status_set = cmos_ae_quick_start_status_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 5000 +#define CALIBRATE_STATIC_WB_R_GAIN 527 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 526 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 1 +#define CALIBRATE_AWB_P2 241 +#define CALIBRATE_AWB_Q1 (-15) +#define CALIBRATE_AWB_A1 159211 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-104902) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + case OT_WDR_MODE_2To1_LINE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm_wdr, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table_wdr, sizeof(ot_isp_awb_agc_table)); + break; + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case OS04A10_4M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + + case OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static void cmos_get_isp_wdr_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc_wdr; + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic_wdr; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen_wdr; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc_wdr; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma_wdr; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut_wdr; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr_wdr; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge_wdr; +#endif + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color_wdr; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac_wdr; + isp_def->key.bit1_bshp= 1; + isp_def->bshp = &g_cmos_bayershp_wdr; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci_wdr; + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze_wdr; + + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + default: + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + + case OT_WDR_MODE_2To1_FRAME: + case OT_WDR_MODE_2To1_LINE: + cmos_get_isp_wdr_default(isp_def); + + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + } + + isp_def->sns_mode.sns_id = OS04A10_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + const ot_isp_cmos_black_level *cmos_blc_def = TD_NULL; + + sns_check_pointer_return(black_level); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + cmos_blc_def = &g_cmos_blc; + } else { + cmos_blc_def = &g_cmos_blc_wdr; + } + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), cmos_blc_def, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x400; + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == OS04A10_4M_30FPS_12BIT_LINEAR_MODE) { + full_lines_5fps = (OS04A10_VMAX_4M_30FPS_12BIT_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + if (enable) { /* setup for ISP pixel calibration mode */ + os04a10_write_register(vi_pipe, OS04A10_AGAIN_L_ADDR, 0x00); + os04a10_write_register(vi_pipe, OS04A10_AGAIN_H_ADDR, 0x01); + + os04a10_write_register(vi_pipe, OS04A10_DGAIN_L_ADDR, 0x00); + os04a10_write_register(vi_pipe, OS04A10_DGAIN_M_ADDR, 0x00); + os04a10_write_register(vi_pipe, OS04A10_DGAIN_H_ADDR, 0x01); + + os04a10_write_register(vi_pipe, OS04A10_VMAX_L_ADDR, low_8bits(full_lines_5fps)); + os04a10_write_register(vi_pipe, OS04A10_VMAX_H_ADDR, high_8bits(full_lines_5fps)); + + os04a10_write_register(vi_pipe, OS04A10_EXPO_L_ADDR, low_8bits(full_lines_5fps - 10)); + os04a10_write_register(vi_pipe, OS04A10_EXPO_H_ADDR, high_8bits(full_lines_5fps - 10)); + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > OS04A10_FULL_LINES_MAX) ? OS04A10_FULL_LINES_MAX : sns_state->fl_std; + os04a10_write_register(vi_pipe, OS04A10_VMAX_L_ADDR, low_8bits(sns_state->fl_std)); + os04a10_write_register(vi_pipe, OS04A10_VMAX_H_ADDR, high_8bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + case OT_WDR_MODE_2To1_LINE: + sns_state->wdr_mode = OT_WDR_MODE_2To1_LINE; + printf("vc wdr 2t1 mode\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_sns_reg_info_hcg_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + sns_state->regs_info[0].i2c_data[GROUP1].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP1].reg_addr = OS04A10_GROUP_1_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP2].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP2].reg_addr = OS04A10_GROUP_2_ADDR; + + sns_state->regs_info[0].i2c_data[HCG_1_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].interrupt_pos = 0; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].reg_addr = OS04A10_HCG_1_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP3].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP3].reg_addr = OS04A10_GROUP_3_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP4].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP4].reg_addr = OS04A10_GROUP_4_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP5].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP5].reg_addr = OS04A10_GROUP_5_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP6].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP6].reg_addr = OS04A10_GROUP_6_ADDR; + + return; +} + + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_os04a10_bus_info[vi_pipe].i2c_dev; + if (g_quick_start_en[vi_pipe] == TD_TRUE) { + sns_state->regs_info[0].cfg2_valid_delay_max = 1; /* delay_max 1 */ + } else { + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + } + sns_state->regs_info[0].reg_num = REG_MAX_IDX; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].reg_num = WDR_REG_MAX_IDX; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + } + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = OS04A10_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = OS04A10_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = OS04A10_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].reg_addr = OS04A10_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].reg_addr = OS04A10_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].reg_addr = OS04A10_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].reg_addr = OS04A10_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].reg_addr = OS04A10_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].reg_addr = OS04A10_DGAIN_M_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].reg_addr = OS04A10_DGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].reg_addr = OS04A10_VMAX_L_ADDR; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].reg_addr = OS04A10_VMAX_H_ADDR; + + cmos_sns_reg_info_hcg_init(vi_pipe, sns_state); + return; +} + +static td_void cmos_2to1_line_wdr_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + sns_state->regs_info[0].i2c_data[WDR_EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_EXPO_L_IDX].reg_addr = OS04A10_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_EXPO_H_IDX].reg_addr = OS04A10_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].reg_addr = OS04A10_SHORT_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].reg_addr = OS04A10_SHORT_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].reg_addr = OS04A10_SHORT_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].reg_addr = OS04A10_SHORT_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_LL_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_LL_IDX].reg_addr = OS04A10_SHORT_DGAIN_LL_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].reg_addr = OS04A10_SHORT_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].reg_addr = OS04A10_SHORT_DGAIN_H_ADDR; + return; +} + +static td_void cmos_2to1_line_wdr_config(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].update = TD_TRUE; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].update = TD_TRUE; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_LL_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].update = TD_TRUE; + } + + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + if (i != HCG_1_IDX) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } else { + sns_state->regs_info[0].i2c_data[GROUP1].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP2].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP3].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP4].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP5].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP6].update = TD_TRUE; + cmos_2to1_line_wdr_config(vi_pipe, sns_state); + break; + } + } + } + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + if (sns_state->fl[0] > sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 0; + } else if (sns_state->fl[0] < sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 0; /* delay 0 */ + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 0; /* delay 0 */ + } else { + } + } + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + sns_state->regs_info[0].i2c_data[GROUP1].data = 0x00; + sns_state->regs_info[0].i2c_data[GROUP2].data = 0x01; + sns_state->regs_info[0].i2c_data[GROUP3].data = 0x11; + sns_state->regs_info[0].i2c_data[GROUP4].data = 0x05; + sns_state->regs_info[0].i2c_data[GROUP5].data = 0x01; + sns_state->regs_info[0].i2c_data[GROUP6].data = 0xa0; + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + /* DOL 2t1 Mode Regs */ + cmos_2to1_line_wdr_sns_reg_info_init(vi_pipe, sns_state); + } + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sns_image_mode) { + case OS04A10_4M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = OS04A10_VMAX_4M_30FPS_12BIT_LINEAR; + break; + case OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE: + sns_state->fl_std = OS04A10_VMAX_4M_30FPS_12BIT_2TO1_WDR; + break; + default: + sns_state->fl_std = OS04A10_VMAX_4M_30FPS_12BIT_LINEAR; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < OS04A10_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_os04a10_mode_tbl[i].max_fps && + sns_image_mode->width <= g_os04a10_mode_tbl[i].width && + sns_image_mode->height <= g_os04a10_mode_tbl[i].height && + sns_state->wdr_mode == g_os04a10_mode_tbl[i].wdr_mode) { + image_mode = (os04a10_res_mode)i; + break; + } + } + + if (i >= OS04A10_MODE_BUTT) { + os04a10_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = OS04A10_4M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = OS04A10_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[0] = OS04A10_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[1] = OS04A10_VMAX_4M_30FPS_12BIT_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = os04a10_init; + sensor_exp_func->pfn_cmos_sns_exit = os04a10_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 os04a10_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_os04a10_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + os04a10_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os04a10_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + os04a10_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = OS04A10_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, OS04A10_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, OS04A10_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, OS04A10_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_init_int_time[vi_pipe] = init_attr->exp_time; + g_init_again[vi_pipe] = init_attr->a_gain; + g_init_dgain[vi_pipe] = init_attr->d_gain; + g_init_isp_dgain[vi_pipe] = init_attr->ispd_gain; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_os04a10_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = os04a10_standby, + .pfn_restart = os04a10_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = TD_NULL, + .pfn_write_reg = os04a10_write_register, + .pfn_read_reg = os04a10_read_register, + .pfn_set_bus_info = os04a10_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.h b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.h new file mode 100644 index 0000000..5de44e4 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos.h @@ -0,0 +1,118 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS04A10_CMOS_H +#define OS04A10_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" +#include "ot_math.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef clip3 +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif + + +#define OS04A10_I2C_ADDR 0x6c +#define OS04A10_ADDR_BYTE 2 +#define OS04A10_DATA_BYTE 1 +#define os04a10_sensor_get_ctx(dev, ctx) ((ctx) = os04a10_get_ctx(dev)) + +#define OS04A10_FULL_LINES_MAX 0x2610 +#define OS04A10_FULL_LINES_MAX_2TO1_WDR 0x1c8c +#define OS04A10_INCREASE_LINES 2 /* make real fps less than stand fps because NVR require */ +#define OS04A10_VMAX_4M_30FPS_12BIT_LINEAR (1624 + OS04A10_INCREASE_LINES) +#define OS04A10_VMAX_4M_30FPS_12BIT_2TO1_WDR (2436 + OS04A10_INCREASE_LINES) /* 12bit */ + +typedef enum { + OS04A10_4M_30FPS_12BIT_LINEAR_MODE = 0, + OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE, + OS04A10_MODE_BUTT +} os04a10_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} os04a10_video_mode_tbl; + +typedef enum { + EXPO_L_IDX = 0, + EXPO_H_IDX, + AGAIN_L_IDX, + AGAIN_H_IDX, + DGAIN_L_IDX, + DGAIN_M_IDX, + DGAIN_H_IDX, + VMAX_L_IDX, + VMAX_H_IDX, + GROUP1, + GROUP2, + HCG_1_IDX, + GROUP3, + GROUP4, + GROUP5, + GROUP6, + REG_MAX_IDX +}os04a10_linear_reg_index; + +typedef enum { + WDR_EXPO_L_IDX = 0, + WDR_EXPO_H_IDX, + WDR_AGAIN_L_IDX, + WDR_AGAIN_H_IDX, + WDR_DGAIN_L_IDX, + WDR_DGAIN_M_IDX, + WDR_DGAIN_H_IDX, + WDR_VMAX_L_IDX, + WDR_VMAX_H_IDX, + WDR_GROUP1, + WDR_GROUP2, + WDR_HCG_1_IDX, + WDR_GROUP3, + WDR_GROUP4, + WDR_GROUP5, + WDR_GROUP6, + WDR_SHORT_EXPO_L_IDX, + WDR_SHORT_EXPO_H_IDX, + WDR_SHORT_AGAIN_L_IDX, + WDR_SHORT_AGAIN_H_IDX, + WDR_SHORT_DGAIN_LL_IDX, + WDR_SHORT_DGAIN_L_IDX, + WDR_SHORT_DGAIN_H_IDX, + WDR_REG_MAX_IDX +}os04a10_wdr_reg_index; +typedef struct { + td_u32 dec[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 inc[OT_ISP_WDR_MAX_FRAME_NUM]; +} time_step; +ot_isp_sns_state *os04a10_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *os04a10_get_bus_info(ot_vi_pipe vi_pipe); + +td_void os04a10_init(ot_vi_pipe vi_pipe); +td_void os04a10_exit(ot_vi_pipe vi_pipe); +td_void os04a10_standby(ot_vi_pipe vi_pipe); +td_void os04a10_restart(ot_vi_pipe vi_pipe); +td_s32 os04a10_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 os04a10_read_register(ot_vi_pipe vi_pipe, td_u32 addr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* OS04A10_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos_ex.h b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos_ex.h new file mode 100644 index 0000000..d5bbe8d --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_cmos_ex.h @@ -0,0 +1,4415 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS04A10_CMOS_EX_H +#define OS04A10_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif +/* Piris attr */ +static ot_isp_piris_attr g_piris = { + 0, // bStepFNOTableChange + 1, // bZeroIsMax + 94, // u16TotalStep + 62, // u16StepCount + /* Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1 */ + { 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158, + 166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344, + 353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 }, + OT_ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget + OT_ISP_IRIS_F_NO_5_6, // enMinIrisFNOTarget + 1, + 512, + 32 +}; + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 0, 0}, /* ob_area */ + 0, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + }, + }, + { + {2688, 1520}, + }, +}; + +static const ot_isp_cmos_black_level g_cmos_blc_wdr = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 0, 0}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + }, + }, + { + {2688, 1520}, + }, +}; +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 100, 100, 100, 150, 180, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, /* strength[16] */ + { 0, 0, 0, 0, 10, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 230, 230, 230, 230, 230, 248, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* aidm_blend_ratio */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + {32, 32, 32, 35, 35, 32, 28, 28, 24, 20, 20, 20, 16, 16, 16, 16}, + /* nddm_hf_detail_strength */ + {0, 0, 0, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, + /* detail_smooth_range */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 4, 4, 4, 4, 4, 4}, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 24, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 8, 8, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + { + 6400, 0.0001548619, -0.4611639237, 0.0000000130, -0.0001639422, 2.1603885856, + 0.0001318677, 0.0220043103, 0.0000000104, 0.0000052716, 0.0067668941, 0, 0, 0, 0, 0 + } +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr_wdr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{48, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {45, 80, 0}}, + {{32, 64, 0}, {24, 72, 0}}, + {{12, 24, 0}, {12, 64, 0}}, + {{8, 20, 0}, {8, 54, 0}}, + {{6, 12, 0}, {6, 36, 0}}, + {{0, 8, 0}, {0, 8, 0}}, + {{0, 6, 0}, {0, 6, 0}}, + {{0, 2, 0}, {0, 2, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 1, + { + 0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, + 259, 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, + 467, 477, 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, + 671, 683, 695, 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, + 885, 896, 906, 917, 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, + 1085, 1096, 1107, 1118, 1129, 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, + 1274, 1284, 1295, 1305, 1315, 1325, 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, + 1468, 1480, 1493, 1499, 1505, 1511, 1518, 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, + 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, + 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, + 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, + 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, 2036, 2042, 2047, 2052, 2058, 2063, 2068, + 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, 2135, 2140, 2145, 2150, 2154, 2159, + 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, 2226, 2231, 2235, 2240, 2244, + 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, 2312, 2317, 2321, 2325, + 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, 2392, 2396, 2400, + 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, 2466, 2470, + 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, 2538, + 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, + 2665, 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, + 2723, 2727, 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, + 2781, 2784, 2787, 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, + 2837, 2840, 2843, 2846, 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, + 2890, 2893, 2896, 2899, 2902, 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, + 2941, 2944, 2946, 2949, 2952, 2954, 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, + 2988, 2990, 2993, 2995, 2998, 3000, 3002, 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, + 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, + 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, + 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, + 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, 3177, 3179, 3182, 3184, 3186, 3188, 3190, + 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, 3217, 3219, 3221, 3223, 3225, 3227, + 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, 3256, 3258, 3260, 3262, 3264, + 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, 3293, 3295, 3297, 3299, + 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, 3330, 3332, 3334, + 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, 3366, 3368, + 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, 3401, + 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, + 3470, 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, + 3506, 3508, 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, + 3544, 3546, 3548, 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, + 3582, 3585, 3587, 3589, 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, + 3620, 3622, 3624, 3626, 3628, 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, + 3657, 3659, 3661, 3663, 3665, 3667, 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, + 3693, 3695, 3697, 3699, 3701, 3704, 3706, 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, + 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, + 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, + 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, + 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, 3857, 3858, 3860, 3862, 3864, 3866, 3868, + 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, + 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, 3928, 3930, 3932, 3934, 3935, + 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, + 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, 3998, 4000, 4001, + 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, 4032, 4034, + 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, 4066, + 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095, + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + { + 0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, + 89, 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, + 176, 181, 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, + 263, 268, 273, 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, + 351, 356, 361, 366, 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, + 441, 446, 451, 456, 461, 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, + 535, 540, 545, 551, 556, 561, 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, + 633, 639, 645, 650, 656, 662, 667, 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, + 738, 744, 750, 756, 762, 768, 774, 780, 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, + 849, 855, 861, 867, 874, 880, 886, 893, 899, 905, 912, 918, 925, 931, 937, 944, 950, 957, + 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, + 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, 1152, 1159, 1165, 1172, 1178, 1185, 1191, + 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, 1276, 1283, 1289, 1295, 1302, 1308, + 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, 1398, 1404, 1411, 1417, 1423, + 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, 1517, 1524, 1530, 1536, + 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, 1639, 1645, 1652, + 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, 1761, 1768, + 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, 1883, + 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, + 2107, 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, + 2206, 2212, 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, + 2297, 2302, 2307, 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, + 2381, 2385, 2390, 2394, 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, + 2458, 2462, 2467, 2471, 2475, 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, + 2531, 2535, 2539, 2543, 2547, 2551, 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, + 2601, 2604, 2608, 2612, 2616, 2619, 2623, 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, + 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, + 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, + 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, + 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, 2901, 2904, 2908, 2911, 2914, 2918, 2921, + 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, 2964, 2967, 2971, 2974, 2977, 2981, + 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, 3026, 3029, 3032, 3035, 3038, + 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, 3086, 3089, 3092, 3095, + 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, 3144, 3147, 3150, + 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, 3200, 3203, + 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, 3255, + 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, + 3359, 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, + 3407, 3410, 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, + 3455, 3457, 3460, 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, + 3501, 3504, 3506, 3509, 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, + 3546, 3549, 3551, 3554, 3556, 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, + 3591, 3593, 3596, 3598, 3601, 3603, 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, + 3634, 3637, 3639, 3642, 3644, 3646, 3649, 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, + 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, + 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, + 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, + 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, 3825, 3827, 3829, 3831, 3834, 3836, 3838, + 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, 3866, 3868, 3870, 3873, 3875, 3877, + 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, 3907, 3909, 3911, 3913, 3915, + 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, 3946, 3949, 3951, 3953, + 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, 3986, 3988, 3990, + 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4024, 4026, + 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, 4062, + 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095, + }, + 3, +}; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 4, + /* motion_threshold1 */ + 10, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 255, + /* skin_umin */ + 99, + /* skin_vmin */ + 134, + /* skin_umax */ + 127, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 19, 19, 19, 19, 19 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 21, 21, 21, 21, 21 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 23, 23, 23, 23, 23 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 31, 31, 28, 27, 27, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 27, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 31, 31, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 31, 31, 28, 28, 28, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 29, 29, 29, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 30, 30, 30, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 26, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 88, 88, 88, 82, 82, 82, 75, 75, 75, 68, 68, 68, 68, 68, 68, 68 }, + { 95, 95, 95, 88, 88, 88, 80, 85, 81, 73, 73, 73, 73, 73, 73, 73 }, + { 104, 104, 104, 96, 96, 96, 88, 95, 89, 80, 80, 80, 80, 80, 80, 80 }, + { 116, 116, 116, 107, 107, 107, 98, 108, 101, 89, 89, 89, 89, 89, 89, 89 }, + { 127, 127, 127, 118, 118, 118, 108, 121, 114, 98, 98, 98, 98, 98, 98, 98 }, + { 139, 139, 139, 128, 128, 128, 118, 136, 130, 107, 107, 107, 107, 107, 107, 107 }, + { 150, 150, 150, 138, 138, 138, 127, 151, 145, 115, 115, 115, 115, 115, 115, 115 }, + { 156, 156, 156, 144, 144, 144, 132, 163, 157, 120, 120, 120, 120, 120, 120, 120 }, + { 160, 160, 160, 148, 148, 148, 135, 171, 164, 123, 123, 123, 123, 123, 123, 123 }, + { 163, 163, 163, 150, 150, 150, 138, 177, 169, 125, 125, 125, 125, 125, 125, 125 }, + { 165, 165, 165, 152, 152, 152, 140, 181, 171, 127, 127, 127, 127, 127, 127, 127 }, + { 166, 166, 166, 154, 154, 154, 141, 183, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 166, 166, 166, 154, 154, 154, 141, 184, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 165, 165, 165, 152, 152, 152, 140, 182, 173, 127, 127, 127, 127, 127, 127, 127 }, + { 164, 164, 164, 151, 151, 151, 139, 180, 171, 126, 126, 126, 126, 126, 126, 126 }, + { 161, 161, 161, 149, 149, 149, 136, 176, 168, 124, 124, 124, 124, 124, 124, 124 }, + { 157, 157, 157, 145, 145, 145, 133, 171, 165, 121, 121, 121, 121, 121, 121, 121 }, + { 152, 152, 152, 140, 140, 140, 129, 165, 162, 117, 117, 117, 117, 117, 117, 117 }, + { 147, 147, 147, 136, 136, 136, 124, 159, 157, 113, 113, 113, 113, 113, 113, 113 }, + { 140, 140, 140, 130, 130, 130, 119, 151, 152, 108, 108, 108, 108, 108, 108, 108 }, + { 133, 133, 133, 122, 122, 122, 112, 142, 145, 102, 102, 102, 102, 102, 102, 102 }, + { 125, 125, 125, 115, 115, 115, 106, 133, 137, 96, 96, 96, 96, 96, 96, 96 }, + { 117, 117, 117, 108, 108, 108, 99, 123, 129, 90, 90, 90, 90, 90, 90, 90 }, + { 111, 111, 111, 102, 102, 102, 94, 113, 120, 85, 85, 85, 85, 85, 85, 85 }, + { 103, 103, 103, 95, 95, 95, 87, 103, 111, 79, 79, 79, 79, 79, 79, 79 }, + { 95, 95, 95, 88, 88, 88, 80, 93, 102, 73, 73, 73, 73, 73, 73, 73 }, + { 87, 87, 87, 80, 80, 80, 74, 83, 93, 67, 67, 67, 67, 67, 67, 67 }, + { 78, 78, 78, 72, 72, 72, 66, 73, 84, 60, 60, 60, 60, 60, 60, 60 }, + { 70, 70, 70, 65, 65, 65, 59, 65, 73, 54, 54, 54, 54, 54, 54, 54 }, + { 62, 62, 62, 58, 58, 58, 53, 56, 62, 48, 48, 48, 48, 48, 48, 48 }, + { 57, 57, 57, 53, 53, 53, 48, 49, 51, 44, 44, 44, 44, 44, 44, 44 }, + { 52, 52, 52, 48, 48, 48, 44, 44, 44, 40, 40, 40, 40, 40, 40, 40 } + }, + /* edge_strength */ + { + { 183, 183, 183, 183, 183, 203, 203, 203, 223, 223, 223, 223, 223, 223, 223, 223 }, + { 186, 186, 186, 186, 186, 207, 207, 207, 228, 228, 228, 228, 228, 228, 228, 228 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 197, 197, 197, 197, 197, 219, 219, 219, 241, 241, 241, 241, 241, 241, 241, 241 }, + { 203, 203, 203, 203, 203, 226, 226, 226, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 209, 209, 209, 209, 209, 232, 232, 232, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 214, 214, 214, 214, 214, 238, 238, 238, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 215, 215, 215, 215, 215, 239, 239, 239, 263, 263, 263, 263, 263, 263, 263, 263 }, + { 211, 211, 211, 211, 211, 234, 234, 234, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 205, 205, 205, 205, 205, 228, 228, 228, 251, 251, 251, 251, 251, 251, 251, 251 }, + { 199, 199, 199, 199, 199, 221, 221, 221, 243, 243, 243, 243, 243, 243, 243, 243 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 182, 182, 182, 182, 182, 202, 202, 202, 222, 222, 222, 222, 222, 222, 222, 222 }, + { 171, 171, 171, 171, 171, 190, 190, 190, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 159, 159, 159, 159, 159, 177, 177, 177, 195, 195, 195, 195, 195, 195, 195, 195 }, + { 149, 149, 149, 149, 149, 165, 165, 165, 182, 182, 182, 182, 182, 182, 182, 182 }, + { 139, 139, 139, 139, 139, 154, 154, 154, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 130, 130, 130, 130, 130, 144, 144, 144, 158, 158, 158, 158, 158, 158, 158, 158 }, + { 123, 123, 123, 123, 123, 137, 137, 137, 151, 151, 151, 151, 151, 151, 151, 151 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 200, 190, 180, 180, 170, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 120, 120, 110, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 45, 40, 40, 40, 40, 40, 40, 40, 40 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149 }, + { 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170 }, + { 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180 }, + { 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190 }, + { 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202 }, + { 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213 }, + { 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224 }, + { 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235 }, + { 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269 }, + { 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264 }, + { 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240 }, + { 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, + { 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219 }, + { 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198 }, + { 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188 }, + { 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178 }, + { 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155 }, + { 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 7, 7, 6, 6, 5, 5, 4, 4, 3, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 6, 6, 5, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 58, 58, 58, 58, 60, 60, 60, 52, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 20, 18, 16, 15, 15, 15, 15, 15, 15, 15 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {24, 16, 12, 16, 16, 16, 16, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 18, 12, 18, 18, 18, 18, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 19, 12, 19, 19, 19, 19, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 20, 12, 20, 20, 20, 20, 12, 5, 5, 5, 5, 5, 5, 5, 5 }, + {26, 21, 13, 21, 21, 21, 21, 13, 6, 6, 6, 6, 6, 6, 6, 6 }, + {27, 22, 14, 22, 22, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8 }, + {27, 22, 16, 22, 22, 22, 22, 16, 12, 12, 12, 12, 12, 12, 12, 12 }, + {28, 23, 19, 23, 23, 23, 23, 19, 17, 17, 17, 17, 17, 17, 17, 17 }, + {28, 24, 22, 24, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + {29, 25, 25, 25, 25, 25, 25, 25, 26, 26, 26, 26, 26, 26, 26, 26 }, + {29, 26, 27, 26, 26, 26, 26, 27, 28, 28, 28, 28, 28, 28, 28, 28 }, + {29, 27, 28, 27, 27, 27, 27, 28, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 27, 30, 27, 27, 27, 27, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 28, 31, 28, 28, 28, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {140, 140, 140, 48, 48, 61, 61, 61, 61, 61, 61, 29, 0, 0, 0, 0}, + {143, 143, 143, 56, 51, 66, 66, 66, 66, 66, 66, 31, 3, 3, 3, 3}, + {147, 147, 147, 64, 56, 72, 72, 72, 72, 72, 72, 34, 6, 6, 6, 6}, + {150, 150, 150, 73, 62, 80, 80, 80, 80, 80, 80, 38, 10, 10, 10, 10}, + {154, 154, 154, 82, 68, 89, 89, 89, 89, 89, 89, 42, 15, 15, 15, 15}, + {157, 157, 157, 92, 75, 98, 98, 98, 98, 98, 98, 47, 21, 21, 21, 21}, + {160, 160, 160, 101, 82, 105, 105, 105, 105, 105, 105, 52, 27, 27, 27, 27}, + {163, 163, 163, 111, 90, 112, 112, 112, 112, 112, 112, 57, 33, 33, 33, 33}, + {166, 166, 166, 120, 97, 117, 117, 117, 117, 117, 117, 62, 40, 40, 40, 40}, + {168, 168, 168, 128, 104, 122, 122, 122, 122, 122, 122, 66, 49, 49, 49, 49}, + {171, 171, 171, 136, 111, 127, 127, 127, 127, 127, 127, 71, 58, 58, 58, 58}, + {174, 174, 174, 142, 117, 132, 132, 132, 132, 132, 132, 75, 67, 67, 67, 67}, + {176, 176, 176, 148, 122, 136, 136, 136, 136, 136, 136, 78, 77, 77, 77, 77}, + {178, 178, 178, 152, 126, 139, 139, 139, 139, 139, 139, 80, 85, 85, 85, 85}, + {179, 179, 179, 155, 128, 140, 140, 140, 140, 140, 140, 82, 91, 91, 91, 91}, + {179, 179, 179, 156, 129, 141, 141, 141, 141, 141, 141, 83, 95, 95, 95, 95}, + {177, 177, 177, 155, 129, 140, 140, 140, 140, 140, 140, 82, 97, 97, 97, 97}, + {175, 175, 175, 152, 127, 137, 137, 137, 137, 137, 137, 81, 96, 96, 96, 96}, + {173, 173, 173, 148, 124, 134, 134, 134, 134, 134, 134, 78, 95, 95, 95, 95}, + {169, 169, 169, 142, 119, 129, 129, 129, 129, 129, 129, 76, 92, 92, 92, 92}, + {165, 165, 165, 136, 114, 124, 124, 124, 124, 124, 124, 72, 88, 88, 88, 88}, + {161, 161, 161, 128, 109, 118, 118, 118, 118, 118, 118, 68, 84, 84, 84, 84}, + {155, 155, 155, 120, 102, 113, 113, 113, 113, 113, 113, 64, 79, 79, 79, 79}, + {149, 149, 149, 111, 96, 108, 108, 108, 108, 108, 108, 59, 75, 75, 75, 75}, + {142, 142, 142, 102, 89, 103, 103, 103, 103, 103, 103, 55, 70, 70, 70, 70}, + {134, 134, 134, 93, 82, 97, 97, 97, 97, 97, 97, 50, 65, 65, 65, 65}, + {125, 125, 125, 84, 76, 91, 91, 91, 91, 91, 91, 45, 58, 58, 58, 58}, + {115, 115, 115, 76, 70, 85, 85, 85, 85, 85, 85, 41, 52, 52, 52, 52}, + {105, 105, 105, 68, 64, 80, 80, 80, 80, 80, 80, 37, 45, 45, 45, 45}, + { 95, 95, 95, 61, 59, 75, 75, 75, 75, 75, 75, 34, 39, 39, 39, 39}, + { 85, 85, 85, 56, 55, 70, 70, 70, 70, 70, 70, 31, 34, 34, 34, 34}, + { 75, 75, 75, 52, 52, 67, 67, 67, 67, 67, 67, 29, 31, 31, 31, 31} + }, + /* edge_strength */ + { + { 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72}, + { 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77}, + { 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83}, + { 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91}, + { 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, + {109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109}, + {119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119}, + {129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129}, + {139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166}, + {173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181}, + {183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183}, + {182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182}, + {179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179}, + {174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168}, + {160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + {152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134}, + {124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124}, + {114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114}, + {105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105}, + { 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96}, + { 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88}, + { 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81}, + { 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75}, + { 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 240, 220, 180, 180, 180, 160, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 100, 100, 100, 100, 100, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 40, 40, 40, 40, 36, 36}, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + {60, 60, 60, 60, 60, 60, 60, 60, 50, 50, 40, 40, 40, 40, 40, 40 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 6, 6, 6, 6, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8}, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + {128, 128, 128, 128, 128, 128, 128, 120, 115, 110, 110, 110, 103, 100, 100, 100}, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 20, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x0196, 0x8092, 0x8004, 0x805B, 0x01B4, 0x8059, 0x801A, 0x808C, 0x01A6 }, + }, + { + /* color temperature */ + 4949, + /* CCM matrix */ + { 0x01A0, 0x809F, 0x8001, 0x8066, 0x01A7, 0x8041, 0x800C, 0x80F1, 0x01FD }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x01A0, 0x8084, 0x801C, 0x8083, 0x01C3, 0x8040, 0x0008, 0x811E, 0x0216 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x02A7, 0x81CC, 0x0025, 0x806D, 0x01A6, 0x8039, 0x802A, 0x8133, 0x025D }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm_wdr = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x0168, 0x8058, 0x8010, 0x8060, 0x01C5, 0x8065, 0x8009, 0x8066, 0x016F }, + }, + { + /* color temperature */ + 4850, + /* CCM matrix */ + { 0x015E, 0x8054, 0x800A, 0x805B, 0x01B0, 0x8055, 0x8003, 0x8064, 0x0167 }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x0173, 0x8067, 0x800C, 0x8073, 0x01AE, 0x803B, 0x8001, 0x8070, 0x0171 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x0173, 0x8067, 0x800C, 0x8073, 0x01AE, 0x803B, 0x8001, 0x8070, 0x0171 }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 128, 128, 128, 128, 124, 120, 116, 112, 108, 104, 100, 94, 90, 90, 90, 90 } +}; + +static ot_isp_awb_agc_table g_awb_agc_table_wdr = { + /* bvalid */ + 1, + /* saturation */ + { 128, 118, 116, 112, 108, 102, 90, 78, 68, 64, 56, 56, 56, 56, 56, 56} +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 20, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + /* CA */ + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + /* ISO */ + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42}, + /* y_grid_width */ + {23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 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340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 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594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 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483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 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298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + }, + + /* acs_color_shading_lut */ + { + /* avg_rg_map */ + { + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 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g_cmos_clut = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 67174464, 0, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 67174464, 67174464, 0, 67174464, + 0, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 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31438897, 1066404858, 1067451392, 4189200, 52419599, 1062210558, 1064305665, + 7335946, 74448875, 1058014210, 1062208514, 10483716, 95429574, 1052770310, 1055912960, 13631487, + 1019170981, 993981691, 987691259, 1043463, 1034905742, 1020204248, 1011815642, 1044485, 1050639479, + 1046426804, 1035941049, 1046531, 1066374239, 1072649360, 1061114008, 1047553, 8367173, 26179691, + 11497590, 1047552, 25150506, 54500420, 37720146, 0, 42983437, 82821147, 63942701, + 1023, 60817391, 112192497, 90166279, 0, 77602768, 1005525210, 117439456, 0, + 1030713479, 1027552444, 1000283352, 0, 1043300468, 1050628253, 1021260988, 0, 1054839905, + 1073704062, 1042239648, 0, 1067427918, 23038046, 1063217283, 0, 6274105, 47163452, + 10454118, 0, 19910691, 71288858, 31432776, 0, 33548299, 95415286, 53460009, + 0, 47185907, 1017067706, 76535816, 0, 59774938, 1034899616, 98565096, 0, + 1042255977, 1053780102, 1013924021, 0, 1051696219, 1073709163, 1030706333, 0, 1060088908, + 18847824, 1047489670, 0, 1069530172, 38777908, 1065320558, 0, 4181036, 58706967, + 8362070, 0, 13622299, 79686650, 26192957, 0, 24112137, 1027562649, 44024867, + 0, 32506871, 1043296388, 61856777, 0, 42996708, 1057981550, 80739310, 0, + 1053798475, 1073715289, 1026516114, 0, 1059043393, 15707203, 1040152703, 0, 1065337910, + 31440940, 1053788268, 0, 1070583851, 47174677, 1067423833, 0, 2087967, 63959037, + 7318598, 0, 8382483, 1039106168, 20954162, 0, 14676999, 1050644584, 34590749, + 0, 19923962, 1062181975, 49275912, 0, 26218477, 1073720390, 62913523, 0, + 1065339949, 12565557, 1040156783, 0, 1067439143, 24103971, 1049598049, 0, 1069538336, + 36691985, 1059038290, 0, 1071637529, 48231422, 1069527108, 0, 1073736722, 1050648663, + 5226549, 0, 3141643, 1057991755, 15715366, 0, 5240836, 1066383423, 26205206, + 0, 6292477, 1033267, 36695046, 0, 9440246, 9424934, 47184887, 0, + 1042447, 17816601, 1052748876, 0, 1044493, 26208268, 1059043394, 0, 1045514, + 34600959, 1065336888, 0, 1072691208, 1061143607, 1071631406, 0, 1071643653, 1065339951, + 4183076, 0, 1070595075, 1070584871, 10477593, 0, 1068498946, 1039391, 17819663, + 0, 1067450368, 6284311, 24114180, 0, 1067452415, 10480655, 31457274, 0, + 1042417, 15725575, 1065340970, 0, 1046514, 20970495, 1068488740, 0, 1011, + 1072686103, 1070586910, 0, 4086, 1073735699, 1073734680, 0, 1068503033, 1043471, + 3139603, 0, 1064307708, 2093068, 6287373, 0, 1060111360, 3142664, 9434119, + 0, 1055917060, 4192261, 12580866, 0, 1043325952, 6290434, 14681084, 0, + 980346125, 6292479, 1043464, 0, 1006568682, 1044470, 1044486, 0, 1032791238, + 1046518, 1045508, 0, 1060062370, 1048566, 1046530, 0, 12544126, 2039, + 1047553, 0, 40863832, 1072696313, 0, 0, 69184560, 1070599162, 1023, + 0, 97506310, 1068500989, 1023, 0, 126877660, 1066402816, 0, 0, + 993986794, 0, 0, 0, 1016014027, 0, 0, 0, 1039089837, + 0, 0, 0, 1062165645, 0, 0, 0, 11499630, 0, + 0, 0, 34576461, 0, 0, 0, 58701867, 0, 0, + 0, 83875848, 0, 0, 0, 108002276, 0, 0, 0, + 1007628486, 0, 0, 0, 1025459373, 0, 0, 0, 1044339859, + 0, 0, 0, 1064268921, 0, 0, 0, 9407582, 0, + 0, 0, 29337666, 0, 0, 0, 49266726, 0, 0, + 0, 69196809, 0, 0, 0, 89127915, 0, 0, 0, + 1020220579, 0, 0, 0, 1035954318, 0, 0, 0, 1050638457, + 0, 0, 0, 1066372196, 0, 0, 0, 7315534, 0, + 0, 0, 23049271, 0, 0, 0, 39832608, 0, 0, + 0, 55566345, 0, 0, 0, 71302129, 0, 0, 0, + 1033861248, 0, 0, 0, 1045399664, 0, 0, 0, 1056937055, + 0, 0, 0, 1068475470, 0, 0, 0, 6272061, 0, + 0, 0, 17810476, 0, 0, 0, 30398490, 0, 0, + 0, 42985479, 0, 0, 0, 54524917, 0, 0, 0, + 1046453341, 0, 0, 0, 1054845009, 0, 0, 0, 1062188101, + 0, 0, 0, 1070578745, 0, 0, 0, 5228588, 0, + 0, 0, 13620256, 0, 0, 0, 22011923, 0, 0, + 0, 30404613, 0, 0, 0, 38797304, 0, 0, 0, + 1059045435, 0, 0, 0, 1063241779, 0, 0, 0, 1068486699, + 0, 0, 0, 1072683043, 0, 0, 0, 3137563, 0, + 0, 0, 8382483, 0, 0, 0, 13627403, 0, 0, + 0, 17822723, 0, 0, 0, 23068667, 0, 0, 0, + 1071637529, 0, 0, 0, 1072687125, 0, 0, 0, 1073736721, + 0, 0, 0, 1044493, 0, 0, 0, 2094090, 0, + 0, 0, 3143686, 0, 0, 0, 5241859, 0, 0, + 0, 6290433, 0, 0, 0, 7341054, 0, 0, 0, + 1042423, 0, 0, 0, 1045494, 0, 0, 0, 1047542, + 0, 0, 0, 1015, 0, 0, 0, 3064, 0, + 0, 0, 1071647738, 0, 0, 0, 1069550588, 0, 0, + 0, 1067452414, 0, 0, 0, 1065352192, 0, 0, 0, + } + }, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OS08A20_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_sensor_ctl.c b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_sensor_ctl.c new file mode 100644 index 0000000..b83ad1a --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10/os04a10_sensor_ctl.c @@ -0,0 +1,1000 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif + +#include "os04a10_cmos.h" +#include "ot_mpi_isp.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int os04a10_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *os04a10businfo = TD_NULL; + os04a10businfo = os04a10_get_bus_info(vi_pipe); + dev_num = os04a10businfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (OS04A10_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int os04a10_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 os04a10_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 os04a10_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = OS04A10_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = OS04A10_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = OS04A10_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (OS04A10_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + } + + if (OS04A10_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, OS04A10_ADDR_BYTE + OS04A10_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void os04a10_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void os04a10_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void os04a10_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +static void os04a10_linear_4m30_12bit_init(ot_vi_pipe vi_pipe); +static void os04a10_wdr_2to1_4m30_12bit_init(ot_vi_pipe vi_pipe); + +static void os04a10_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastos04a10 = TD_NULL; + + pastos04a10 = os04a10_get_ctx(vi_pipe); + for (i = 0; i < pastos04a10->regs_info[0].reg_num; i++) { + ret += os04a10_write_register(vi_pipe, + pastos04a10->regs_info[0].i2c_data[i].reg_addr, + pastos04a10->regs_info[0].i2c_data[i].data); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + + return; +} + +static td_bool os04a10_get_quick_start_flag(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + ot_isp_ctrl_param isp_ctrl_param = {}; + + ret = ot_mpi_isp_get_ctrl_param(vi_pipe, &isp_ctrl_param); + if (ret != TD_SUCCESS) { + isp_err_trace("pipe[%d] call ot_mpi_isp_get_ctrl_param failed! ret = 0x%x, quick_start_flag force set to 0!\n", + vi_pipe, ret); + return TD_FALSE; + } + + return isp_ctrl_param.quick_start_en; +} + +void os04a10_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_bool init; + td_u8 img_mode; + td_s32 ret; + td_bool quick_start_flag = TD_FALSE; + ot_isp_sns_state *pastos04a10 = TD_NULL; + + pastos04a10 = os04a10_get_ctx(vi_pipe); + init = pastos04a10->init; + wdr_mode = pastos04a10->wdr_mode; + img_mode = pastos04a10->img_mode; + + ret = os04a10_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + quick_start_flag = os04a10_get_quick_start_flag(vi_pipe); + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE == img_mode) { /* OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE */ + os04a10_wdr_2to1_4m30_12bit_init(vi_pipe); + } else { + } + } else if (quick_start_flag == TD_FALSE) { + os04a10_linear_4m30_12bit_init(vi_pipe); + } + } else { + /* When sensor switch mode(linear<->WDR or resolution), config different registers(if possible) */ + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE == img_mode) { /* OS04A10_4M_30FPS_12BIT_2TO1_VC_MODE */ + os04a10_wdr_2to1_4m30_12bit_init(vi_pipe); + } else { + } + } else if (quick_start_flag == TD_FALSE) { + os04a10_linear_4m30_12bit_init(vi_pipe); + } + } + + pastos04a10->init = TD_TRUE; + return; +} + +void os04a10_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = os04a10_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("OS04A10 exit failed!\n"); + } + + return; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x0102, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0305, 0x42); + ret += os04a10_write_register(vi_pipe, 0x0306, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0307, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0308, 0x05); + ret += os04a10_write_register(vi_pipe, 0x030a, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0317, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x0322, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0323, 0x02); + ret += os04a10_write_register(vi_pipe, 0x0324, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0325, 0x90); + ret += os04a10_write_register(vi_pipe, 0x0327, 0x05); + ret += os04a10_write_register(vi_pipe, 0x0329, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032c, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032d, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032e, 0x02); + ret += os04a10_write_register(vi_pipe, 0x300f, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3012, 0x41); + ret += os04a10_write_register(vi_pipe, 0x3026, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3027, 0x08); + ret += os04a10_write_register(vi_pipe, 0x302d, 0x24); + ret += os04a10_write_register(vi_pipe, 0x3104, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3106, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3400, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3408, 0x05); + ret += os04a10_write_register(vi_pipe, 0x340c, 0x0c); + ret += os04a10_write_register(vi_pipe, 0x340d, 0xb0); + ret += os04a10_write_register(vi_pipe, 0x3425, 0x51); + ret += os04a10_write_register(vi_pipe, 0x3426, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3427, 0x14); + ret += os04a10_write_register(vi_pipe, 0x3428, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3429, 0x10); + ret += os04a10_write_register(vi_pipe, 0x342a, 0x10); + ret += os04a10_write_register(vi_pipe, 0x342b, 0x04); + ret += os04a10_write_register(vi_pipe, 0x3501, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3504, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3508, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3509, 0x00); + ret += os04a10_write_register(vi_pipe, 0x350a, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3544, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3548, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3549, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3584, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3588, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3589, 0x00); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3601, 0x70); + ret += os04a10_write_register(vi_pipe, 0x3604, 0xe3); + ret += os04a10_write_register(vi_pipe, 0x3605, 0xff); + ret += os04a10_write_register(vi_pipe, 0x3606, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3608, 0xa8); + ret += os04a10_write_register(vi_pipe, 0x360a, 0xd0); + ret += os04a10_write_register(vi_pipe, 0x360b, 0x08); + ret += os04a10_write_register(vi_pipe, 0x360e, 0xc8); + ret += os04a10_write_register(vi_pipe, 0x360f, 0x66); + ret += os04a10_write_register(vi_pipe, 0x3610, 0x89); + ret += os04a10_write_register(vi_pipe, 0x3611, 0x8a); + ret += os04a10_write_register(vi_pipe, 0x3612, 0x4e); + ret += os04a10_write_register(vi_pipe, 0x3613, 0xbd); + ret += os04a10_write_register(vi_pipe, 0x3614, 0x9b); + ret += os04a10_write_register(vi_pipe, 0x362a, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362b, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362c, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362d, 0x09); + ret += os04a10_write_register(vi_pipe, 0x362e, 0x1a); + ret += os04a10_write_register(vi_pipe, 0x362f, 0x34); + ret += os04a10_write_register(vi_pipe, 0x3630, 0x67); + ret += os04a10_write_register(vi_pipe, 0x3631, 0x7f); + ret += os04a10_write_register(vi_pipe, 0x3638, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3643, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3644, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3645, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3646, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3647, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3648, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3649, 0x00); + ret += os04a10_write_register(vi_pipe, 0x364a, 0x04); + ret += os04a10_write_register(vi_pipe, 0x364c, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364d, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364e, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364f, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x3650, 0xff); + ret += os04a10_write_register(vi_pipe, 0x3651, 0xff); + ret += os04a10_write_register(vi_pipe, 0x365a, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365b, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3661, 0x07); + ret += os04a10_write_register(vi_pipe, 0x3662, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3663, 0x20); + ret += os04a10_write_register(vi_pipe, 0x3665, 0x12); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3667, 0xd4); + ret += os04a10_write_register(vi_pipe, 0x3668, 0x80); + ret += os04a10_write_register(vi_pipe, 0x366c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366f, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3671, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3673, 0x2a); + ret += os04a10_write_register(vi_pipe, 0x3681, 0x80); + ret += os04a10_write_register(vi_pipe, 0x3700, 0x2d); + ret += os04a10_write_register(vi_pipe, 0x3701, 0x22); + ret += os04a10_write_register(vi_pipe, 0x3702, 0x25); + ret += os04a10_write_register(vi_pipe, 0x3703, 0x28); + ret += os04a10_write_register(vi_pipe, 0x3705, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3706, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x3707, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3708, 0x36); + ret += os04a10_write_register(vi_pipe, 0x3709, 0x57); + ret += os04a10_write_register(vi_pipe, 0x370a, 0x03); + ret += os04a10_write_register(vi_pipe, 0x370b, 0x15); + ret += os04a10_write_register(vi_pipe, 0x3714, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3719, 0x24); + ret += os04a10_write_register(vi_pipe, 0x371b, 0x1f); + ret += os04a10_write_register(vi_pipe, 0x371c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x371d, 0x08); + ret += os04a10_write_register(vi_pipe, 0x373f, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3740, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3741, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3742, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3743, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3756, 0xe7); + ret += os04a10_write_register(vi_pipe, 0x3757, 0xe7); + ret += os04a10_write_register(vi_pipe, 0x3762, 0x1c); + ret += os04a10_write_register(vi_pipe, 0x376c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3776, 0x05); + ret += os04a10_write_register(vi_pipe, 0x3777, 0x22); + ret += os04a10_write_register(vi_pipe, 0x3779, 0x60); + ret += os04a10_write_register(vi_pipe, 0x377c, 0x48); + ret += os04a10_write_register(vi_pipe, 0x3784, 0x06); + ret += os04a10_write_register(vi_pipe, 0x3785, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3790, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3793, 0x04); + ret += os04a10_write_register(vi_pipe, 0x3794, 0x07); + ret += os04a10_write_register(vi_pipe, 0x3796, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3797, 0x02); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x379c, 0x4d); + ret += os04a10_write_register(vi_pipe, 0x37a1, 0x80); + ret += os04a10_write_register(vi_pipe, 0x37bb, 0x88); + ret += os04a10_write_register(vi_pipe, 0x37be, 0x48); + ret += os04a10_write_register(vi_pipe, 0x37bf, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37c0, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37c4, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37c5, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37c6, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37ca, 0x21); + ret += os04a10_write_register(vi_pipe, 0x37cc, 0x15); + ret += os04a10_write_register(vi_pipe, 0x37cd, 0x90); + ret += os04a10_write_register(vi_pipe, 0x37cf, 0x02); + ret += os04a10_write_register(vi_pipe, 0x37d0, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37d1, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x37d2, 0x03); + ret += os04a10_write_register(vi_pipe, 0x37d3, 0x15); + ret += os04a10_write_register(vi_pipe, 0x37d4, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37d5, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37d6, 0x03); + ret += os04a10_write_register(vi_pipe, 0x37d7, 0x15); + ret += os04a10_write_register(vi_pipe, 0x37d8, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37dc, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37dd, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37da, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37db, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3800, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3801, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3802, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3803, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3804, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3805, 0x8f); + ret += os04a10_write_register(vi_pipe, 0x3806, 0x05); + ret += os04a10_write_register(vi_pipe, 0x3807, 0xff); + ret += os04a10_write_register(vi_pipe, 0x3808, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3809, 0x80); + ret += os04a10_write_register(vi_pipe, 0x380a, 0x05); + ret += os04a10_write_register(vi_pipe, 0x380b, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x380c, 0x05); + ret += os04a10_write_register(vi_pipe, 0x380d, 0xc4); + ret += os04a10_write_register(vi_pipe, 0x380e, 0x06); + ret += os04a10_write_register(vi_pipe, 0x380f, 0x58); + ret += os04a10_write_register(vi_pipe, 0x3811, 0x09); + ret += os04a10_write_register(vi_pipe, 0x3813, 0x09); + ret += os04a10_write_register(vi_pipe, 0x3814, 0x01); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3815, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3816, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3817, 0x01); + ret += os04a10_write_register(vi_pipe, 0x381c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3820, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3821, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3822, 0x14); + ret += os04a10_write_register(vi_pipe, 0x3823, 0x18); + ret += os04a10_write_register(vi_pipe, 0x3826, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3827, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3833, 0x40); + ret += os04a10_write_register(vi_pipe, 0x384c, 0x05); + ret += os04a10_write_register(vi_pipe, 0x384d, 0xc4); + ret += os04a10_write_register(vi_pipe, 0x3858, 0x3c); + ret += os04a10_write_register(vi_pipe, 0x3865, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3866, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3867, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3868, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3900, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3940, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3980, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3c01, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3c05, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c0f, 0x1c); + ret += os04a10_write_register(vi_pipe, 0x3c12, 0x0d); + ret += os04a10_write_register(vi_pipe, 0x3c19, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c21, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c3a, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3c3b, 0x18); + ret += os04a10_write_register(vi_pipe, 0x3c3d, 0xc6); + ret += os04a10_write_register(vi_pipe, 0x3c55, 0xcb); + ret += os04a10_write_register(vi_pipe, 0x3c5a, 0xe5); + ret += os04a10_write_register(vi_pipe, 0x3c5d, 0xcf); + ret += os04a10_write_register(vi_pipe, 0x3c5e, 0xcf); + ret += os04a10_write_register(vi_pipe, 0x3d8c, 0x70); + ret += os04a10_write_register(vi_pipe, 0x3d8d, 0x10); + ret += os04a10_write_register(vi_pipe, 0x4000, 0xf9); + ret += os04a10_write_register(vi_pipe, 0x4001, 0x2f); + ret += os04a10_write_register(vi_pipe, 0x4004, 0x01); + ret += os04a10_write_register(vi_pipe, 0x4005, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4008, 0x02); + ret += os04a10_write_register(vi_pipe, 0x4009, 0x11); + ret += os04a10_write_register(vi_pipe, 0x400a, 0x03); + ret += os04a10_write_register(vi_pipe, 0x400b, 0x27); + ret += os04a10_write_register(vi_pipe, 0x400e, 0x40); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part6(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x402e, 0x01); + ret += os04a10_write_register(vi_pipe, 0x402f, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4030, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4031, 0x80); + ret += os04a10_write_register(vi_pipe, 0x4032, 0x9f); + ret += os04a10_write_register(vi_pipe, 0x4033, 0x80); + ret += os04a10_write_register(vi_pipe, 0x4050, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4051, 0x07); + ret += os04a10_write_register(vi_pipe, 0x4011, 0xbb); + ret += os04a10_write_register(vi_pipe, 0x410f, 0x01); + ret += os04a10_write_register(vi_pipe, 0x4288, 0xcf); + ret += os04a10_write_register(vi_pipe, 0x4289, 0x00); + ret += os04a10_write_register(vi_pipe, 0x428a, 0x46); + ret += os04a10_write_register(vi_pipe, 0x430b, 0xff); + ret += os04a10_write_register(vi_pipe, 0x430c, 0xff); + ret += os04a10_write_register(vi_pipe, 0x430d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x430e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4314, 0x04); + ret += os04a10_write_register(vi_pipe, 0x4500, 0x18); + ret += os04a10_write_register(vi_pipe, 0x4501, 0x18); + ret += os04a10_write_register(vi_pipe, 0x4503, 0x10); + ret += os04a10_write_register(vi_pipe, 0x4504, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4506, 0x32); + ret += os04a10_write_register(vi_pipe, 0x4507, 0x02); + ret += os04a10_write_register(vi_pipe, 0x4601, 0x30); + ret += os04a10_write_register(vi_pipe, 0x4603, 0x00); + ret += os04a10_write_register(vi_pipe, 0x460a, 0x50); + ret += os04a10_write_register(vi_pipe, 0x460c, 0x60); + ret += os04a10_write_register(vi_pipe, 0x4640, 0x62); + ret += os04a10_write_register(vi_pipe, 0x4646, 0xaa); + ret += os04a10_write_register(vi_pipe, 0x4647, 0x55); + ret += os04a10_write_register(vi_pipe, 0x4648, 0x99); + ret += os04a10_write_register(vi_pipe, 0x4649, 0x66); + ret += os04a10_write_register(vi_pipe, 0x464d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4654, 0x11); + ret += os04a10_write_register(vi_pipe, 0x4655, 0x22); + ret += os04a10_write_register(vi_pipe, 0x4800, 0x44); + ret += os04a10_write_register(vi_pipe, 0x480e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4810, 0xff); + ret += os04a10_write_register(vi_pipe, 0x4811, 0xff); + ret += os04a10_write_register(vi_pipe, 0x4813, 0x00); + ret += os04a10_write_register(vi_pipe, 0x481f, 0x30); + ret += os04a10_write_register(vi_pipe, 0x4837, 0x14); + ret += os04a10_write_register(vi_pipe, 0x484b, 0x27); + ret += os04a10_write_register(vi_pipe, 0x4d00, 0x4d); + + return ret; +} + +static td_s32 os04a10_linear_4m30_12bit_init_part7(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x4d01, 0x9d); + ret += os04a10_write_register(vi_pipe, 0x4d02, 0xb9); + ret += os04a10_write_register(vi_pipe, 0x4d03, 0x2e); + ret += os04a10_write_register(vi_pipe, 0x4d04, 0x4a); + ret += os04a10_write_register(vi_pipe, 0x4d05, 0x3d); + ret += os04a10_write_register(vi_pipe, 0x4d09, 0x4f); + ret += os04a10_write_register(vi_pipe, 0x5000, 0x17); + ret += os04a10_write_register(vi_pipe, 0x5001, 0x0d); + ret += os04a10_write_register(vi_pipe, 0x5080, 0x00); + ret += os04a10_write_register(vi_pipe, 0x50c0, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5100, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5200, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5201, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5202, 0x03); + ret += os04a10_write_register(vi_pipe, 0x5203, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5780, 0x53); + ret += os04a10_write_register(vi_pipe, 0x5782, 0x60); + ret += os04a10_write_register(vi_pipe, 0x5783, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x5786, 0x01); + ret += os04a10_write_register(vi_pipe, 0x5788, 0x60); + ret += os04a10_write_register(vi_pipe, 0x5789, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x5792, 0x11); + ret += os04a10_write_register(vi_pipe, 0x5793, 0x33); + ret += os04a10_write_register(vi_pipe, 0x5857, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5858, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5859, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d7, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d8, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d9, 0xff); + + os04a10_default_reg_init(vi_pipe); + + delay_ms(0x5); + ret += os04a10_write_register(vi_pipe, 0x0100, 0x01); + return ret; +} + +static void os04a10_linear_4m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os04a10_linear_4m30_12bit_init_part1(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part2(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part3(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part4(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part5(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part6(vi_pipe); + ret += os04a10_linear_4m30_12bit_init_part7(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("os04a10 write register failed!\n"); + return; + } + + printf("========================================================================\n"); + printf("vi_pipe:%d,== os04a10 24Mclk 4M30fps(MIPI) 12bit linear init success! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x0103, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0109, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0104, 0x02); + ret += os04a10_write_register(vi_pipe, 0x0102, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0305, 0x3c); + ret += os04a10_write_register(vi_pipe, 0x0306, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0307, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0308, 0x04); + ret += os04a10_write_register(vi_pipe, 0x030a, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0317, 0x09); + ret += os04a10_write_register(vi_pipe, 0x0322, 0x01); + ret += os04a10_write_register(vi_pipe, 0x0323, 0x02); + ret += os04a10_write_register(vi_pipe, 0x0324, 0x00); + ret += os04a10_write_register(vi_pipe, 0x0325, 0x90); + ret += os04a10_write_register(vi_pipe, 0x0327, 0x05); + ret += os04a10_write_register(vi_pipe, 0x0329, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032c, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032d, 0x02); + ret += os04a10_write_register(vi_pipe, 0x032e, 0x02); + ret += os04a10_write_register(vi_pipe, 0x300f, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3012, 0x41); + ret += os04a10_write_register(vi_pipe, 0x3026, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3027, 0x08); + ret += os04a10_write_register(vi_pipe, 0x302d, 0x24); + ret += os04a10_write_register(vi_pipe, 0x3104, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3106, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3400, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3408, 0x05); + ret += os04a10_write_register(vi_pipe, 0x340c, 0x0c); + ret += os04a10_write_register(vi_pipe, 0x340d, 0xb0); + ret += os04a10_write_register(vi_pipe, 0x3425, 0x51); + ret += os04a10_write_register(vi_pipe, 0x3426, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3427, 0x14); + ret += os04a10_write_register(vi_pipe, 0x3428, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3429, 0x10); + ret += os04a10_write_register(vi_pipe, 0x342a, 0x10); + ret += os04a10_write_register(vi_pipe, 0x342b, 0x04); + ret += os04a10_write_register(vi_pipe, 0x3501, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3504, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3508, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3509, 0x00); + + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x350a, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3544, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3548, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3549, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3584, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3588, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3589, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3601, 0x70); + ret += os04a10_write_register(vi_pipe, 0x3604, 0xe3); + ret += os04a10_write_register(vi_pipe, 0x3605, 0x7f); + ret += os04a10_write_register(vi_pipe, 0x3606, 0x80); + ret += os04a10_write_register(vi_pipe, 0x3608, 0xa8); + ret += os04a10_write_register(vi_pipe, 0x360a, 0xd0); + ret += os04a10_write_register(vi_pipe, 0x360b, 0x08); + ret += os04a10_write_register(vi_pipe, 0x360e, 0xc8); + ret += os04a10_write_register(vi_pipe, 0x360f, 0x66); + ret += os04a10_write_register(vi_pipe, 0x3610, 0x89); + ret += os04a10_write_register(vi_pipe, 0x3611, 0x8a); + ret += os04a10_write_register(vi_pipe, 0x3612, 0x4e); + ret += os04a10_write_register(vi_pipe, 0x3613, 0xbd); + ret += os04a10_write_register(vi_pipe, 0x3614, 0x9b); + ret += os04a10_write_register(vi_pipe, 0x362a, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362b, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362c, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362d, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x362e, 0x1a); + ret += os04a10_write_register(vi_pipe, 0x362f, 0x34); + ret += os04a10_write_register(vi_pipe, 0x3630, 0x67); + ret += os04a10_write_register(vi_pipe, 0x3631, 0x7f); + ret += os04a10_write_register(vi_pipe, 0x3638, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3643, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3644, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3645, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3646, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3647, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3648, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3649, 0x00); + ret += os04a10_write_register(vi_pipe, 0x364a, 0x04); + ret += os04a10_write_register(vi_pipe, 0x364c, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364d, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364e, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x364f, 0x0e); + + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3650, 0xff); + ret += os04a10_write_register(vi_pipe, 0x3651, 0xff); + ret += os04a10_write_register(vi_pipe, 0x365a, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365b, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x365d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3661, 0x07); + ret += os04a10_write_register(vi_pipe, 0x3662, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3663, 0x20); + ret += os04a10_write_register(vi_pipe, 0x3665, 0x12); + ret += os04a10_write_register(vi_pipe, 0x3667, 0x54); + ret += os04a10_write_register(vi_pipe, 0x3668, 0x80); + ret += os04a10_write_register(vi_pipe, 0x366c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x366f, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3671, 0x09); + ret += os04a10_write_register(vi_pipe, 0x3673, 0x2a); + ret += os04a10_write_register(vi_pipe, 0x3681, 0x80); + ret += os04a10_write_register(vi_pipe, 0x3700, 0x2d); + ret += os04a10_write_register(vi_pipe, 0x3701, 0x22); + ret += os04a10_write_register(vi_pipe, 0x3702, 0x25); + ret += os04a10_write_register(vi_pipe, 0x3703, 0x20); + ret += os04a10_write_register(vi_pipe, 0x3705, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3706, 0x72); + ret += os04a10_write_register(vi_pipe, 0x3707, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3708, 0x36); + ret += os04a10_write_register(vi_pipe, 0x3709, 0x57); + ret += os04a10_write_register(vi_pipe, 0x370a, 0x01); + ret += os04a10_write_register(vi_pipe, 0x370b, 0x14); + ret += os04a10_write_register(vi_pipe, 0x3714, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3719, 0x1f); + ret += os04a10_write_register(vi_pipe, 0x371b, 0x16); + ret += os04a10_write_register(vi_pipe, 0x371c, 0x00); + ret += os04a10_write_register(vi_pipe, 0x371d, 0x08); + ret += os04a10_write_register(vi_pipe, 0x373f, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3740, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3741, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3742, 0x63); + ret += os04a10_write_register(vi_pipe, 0x3743, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3756, 0x9d); + ret += os04a10_write_register(vi_pipe, 0x3757, 0x9d); + + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3762, 0x1c); + ret += os04a10_write_register(vi_pipe, 0x376c, 0x04); + ret += os04a10_write_register(vi_pipe, 0x3776, 0x05); + ret += os04a10_write_register(vi_pipe, 0x3777, 0x22); + ret += os04a10_write_register(vi_pipe, 0x3779, 0x60); + ret += os04a10_write_register(vi_pipe, 0x377c, 0x48); + ret += os04a10_write_register(vi_pipe, 0x3784, 0x06); + ret += os04a10_write_register(vi_pipe, 0x3785, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3790, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3793, 0x04); + ret += os04a10_write_register(vi_pipe, 0x3794, 0x07); + ret += os04a10_write_register(vi_pipe, 0x3796, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3797, 0x02); + ret += os04a10_write_register(vi_pipe, 0x379c, 0x4d); + ret += os04a10_write_register(vi_pipe, 0x37a1, 0x80); + ret += os04a10_write_register(vi_pipe, 0x37bb, 0x88); + ret += os04a10_write_register(vi_pipe, 0x37be, 0x48); + ret += os04a10_write_register(vi_pipe, 0x37bf, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37c0, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37c4, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37c5, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37c6, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37ca, 0x21); + ret += os04a10_write_register(vi_pipe, 0x37cc, 0x13); + ret += os04a10_write_register(vi_pipe, 0x37cd, 0x90); + ret += os04a10_write_register(vi_pipe, 0x37cf, 0x02); + ret += os04a10_write_register(vi_pipe, 0x37d0, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37d1, 0x72); + ret += os04a10_write_register(vi_pipe, 0x37d2, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37d3, 0x14); + ret += os04a10_write_register(vi_pipe, 0x37d4, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37d5, 0x6c); + ret += os04a10_write_register(vi_pipe, 0x37d6, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37d7, 0xf7); + ret += os04a10_write_register(vi_pipe, 0x37d8, 0x01); + ret += os04a10_write_register(vi_pipe, 0x37dc, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37dd, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37da, 0x00); + ret += os04a10_write_register(vi_pipe, 0x37db, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3800, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3801, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3802, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3803, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3804, 0x0a); + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os04a10_write_register(vi_pipe, 0x3805, 0x8f); + ret += os04a10_write_register(vi_pipe, 0x3806, 0x05); + ret += os04a10_write_register(vi_pipe, 0x3807, 0xff); + ret += os04a10_write_register(vi_pipe, 0x3808, 0x0a); + ret += os04a10_write_register(vi_pipe, 0x3809, 0x80); + ret += os04a10_write_register(vi_pipe, 0x380a, 0x05); + ret += os04a10_write_register(vi_pipe, 0x380b, 0xf0); + ret += os04a10_write_register(vi_pipe, 0x380c, 0x02); + ret += os04a10_write_register(vi_pipe, 0x380d, 0xdc); + ret += os04a10_write_register(vi_pipe, 0x380e, 0x06); + ret += os04a10_write_register(vi_pipe, 0x380f, 0x58); + ret += os04a10_write_register(vi_pipe, 0x3811, 0x09); + ret += os04a10_write_register(vi_pipe, 0x3813, 0x09); + ret += os04a10_write_register(vi_pipe, 0x3814, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3815, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3816, 0x01); + ret += os04a10_write_register(vi_pipe, 0x3817, 0x01); + ret += os04a10_write_register(vi_pipe, 0x381c, 0x08); + ret += os04a10_write_register(vi_pipe, 0x3820, 0x03); + ret += os04a10_write_register(vi_pipe, 0x3821, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3822, 0x14); + ret += os04a10_write_register(vi_pipe, 0x3823, 0x18); + ret += os04a10_write_register(vi_pipe, 0x3826, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3827, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3833, 0x41); + ret += os04a10_write_register(vi_pipe, 0x384c, 0x02); + ret += os04a10_write_register(vi_pipe, 0x384d, 0xdc); + ret += os04a10_write_register(vi_pipe, 0x3858, 0x3c); + ret += os04a10_write_register(vi_pipe, 0x3865, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3866, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3867, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3868, 0x02); + ret += os04a10_write_register(vi_pipe, 0x3900, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3940, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3980, 0x13); + ret += os04a10_write_register(vi_pipe, 0x3c01, 0x11); + ret += os04a10_write_register(vi_pipe, 0x3c05, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c0f, 0x1c); + ret += os04a10_write_register(vi_pipe, 0x3c12, 0x0d); + ret += os04a10_write_register(vi_pipe, 0x3c19, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c21, 0x00); + ret += os04a10_write_register(vi_pipe, 0x3c3a, 0x10); + ret += os04a10_write_register(vi_pipe, 0x3c3b, 0x18); + ret += os04a10_write_register(vi_pipe, 0x3c3d, 0xc6); + ret += os04a10_write_register(vi_pipe, 0x3c55, 0xcb); + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part6(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x3c5a, 0x55); + ret += os04a10_write_register(vi_pipe, 0x3c5d, 0xcf); + ret += os04a10_write_register(vi_pipe, 0x3c5e, 0xcf); + ret += os04a10_write_register(vi_pipe, 0x3d8c, 0x70); + ret += os04a10_write_register(vi_pipe, 0x3d8d, 0x10); + ret += os04a10_write_register(vi_pipe, 0x4000, 0xf9); + ret += os04a10_write_register(vi_pipe, 0x4001, 0xef); + ret += os04a10_write_register(vi_pipe, 0x4004, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4005, 0x40); + ret += os04a10_write_register(vi_pipe, 0x4008, 0x02); + ret += os04a10_write_register(vi_pipe, 0x4009, 0x11); + ret += os04a10_write_register(vi_pipe, 0x400a, 0x06); + ret += os04a10_write_register(vi_pipe, 0x400b, 0x40); + ret += os04a10_write_register(vi_pipe, 0x400e, 0x40); + ret += os04a10_write_register(vi_pipe, 0x402e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x402f, 0x40); + ret += os04a10_write_register(vi_pipe, 0x4030, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4031, 0x40); + ret += os04a10_write_register(vi_pipe, 0x4032, 0x0f); + ret += os04a10_write_register(vi_pipe, 0x4033, 0x80); + ret += os04a10_write_register(vi_pipe, 0x4050, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4051, 0x07); + ret += os04a10_write_register(vi_pipe, 0x4011, 0xbb); + ret += os04a10_write_register(vi_pipe, 0x410f, 0x01); + ret += os04a10_write_register(vi_pipe, 0x4288, 0xce); + ret += os04a10_write_register(vi_pipe, 0x4289, 0x00); + ret += os04a10_write_register(vi_pipe, 0x428a, 0x46); + ret += os04a10_write_register(vi_pipe, 0x430b, 0x0f); + ret += os04a10_write_register(vi_pipe, 0x430c, 0xfc); + ret += os04a10_write_register(vi_pipe, 0x430d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x430e, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4314, 0x04); + ret += os04a10_write_register(vi_pipe, 0x4500, 0x18); + ret += os04a10_write_register(vi_pipe, 0x4501, 0x18); + ret += os04a10_write_register(vi_pipe, 0x4503, 0x10); + ret += os04a10_write_register(vi_pipe, 0x4504, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4506, 0x32); + ret += os04a10_write_register(vi_pipe, 0x4507, 0x03); + ret += os04a10_write_register(vi_pipe, 0x4601, 0x30); + ret += os04a10_write_register(vi_pipe, 0x4603, 0x00); + ret += os04a10_write_register(vi_pipe, 0x460a, 0x50); + ret += os04a10_write_register(vi_pipe, 0x460c, 0x60); + ret += os04a10_write_register(vi_pipe, 0x4640, 0x62); + ret += os04a10_write_register(vi_pipe, 0x4646, 0xaa); + + return ret; +} + +static td_s32 os04a10_wdr_2to1_4m30_12bit_part7(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_write_register(vi_pipe, 0x4647, 0x55); + ret += os04a10_write_register(vi_pipe, 0x4648, 0x99); + ret += os04a10_write_register(vi_pipe, 0x4649, 0x66); + ret += os04a10_write_register(vi_pipe, 0x464d, 0x00); + ret += os04a10_write_register(vi_pipe, 0x4654, 0x11); + ret += os04a10_write_register(vi_pipe, 0x4655, 0x22); + ret += os04a10_write_register(vi_pipe, 0x4800, 0x44); + ret += os04a10_write_register(vi_pipe, 0x480e, 0x04); + ret += os04a10_write_register(vi_pipe, 0x4810, 0xff); + ret += os04a10_write_register(vi_pipe, 0x4811, 0xff); + ret += os04a10_write_register(vi_pipe, 0x4813, 0x84); + ret += os04a10_write_register(vi_pipe, 0x481f, 0x30); + ret += os04a10_write_register(vi_pipe, 0x4837, 0x0e); + ret += os04a10_write_register(vi_pipe, 0x484b, 0x67); + ret += os04a10_write_register(vi_pipe, 0x4d00, 0x4d); + ret += os04a10_write_register(vi_pipe, 0x4d01, 0x9d); + ret += os04a10_write_register(vi_pipe, 0x4d02, 0xb9); + ret += os04a10_write_register(vi_pipe, 0x4d03, 0x2e); + ret += os04a10_write_register(vi_pipe, 0x4d04, 0x4a); + ret += os04a10_write_register(vi_pipe, 0x4d05, 0x3d); + ret += os04a10_write_register(vi_pipe, 0x4d09, 0x4f); + ret += os04a10_write_register(vi_pipe, 0x5000, 0x17); + ret += os04a10_write_register(vi_pipe, 0x5001, 0x0c); + ret += os04a10_write_register(vi_pipe, 0x5080, 0x00); + ret += os04a10_write_register(vi_pipe, 0x50c0, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5100, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5200, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5201, 0x00); + ret += os04a10_write_register(vi_pipe, 0x5202, 0x03); + ret += os04a10_write_register(vi_pipe, 0x5203, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5780, 0x53); + ret += os04a10_write_register(vi_pipe, 0x5782, 0x18); + ret += os04a10_write_register(vi_pipe, 0x5783, 0x3c); + ret += os04a10_write_register(vi_pipe, 0x5786, 0x01); + ret += os04a10_write_register(vi_pipe, 0x5788, 0x18); + ret += os04a10_write_register(vi_pipe, 0x5789, 0x3c); + ret += os04a10_write_register(vi_pipe, 0x5792, 0x11); + ret += os04a10_write_register(vi_pipe, 0x5793, 0x33); + ret += os04a10_write_register(vi_pipe, 0x5857, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5858, 0xff); + ret += os04a10_write_register(vi_pipe, 0x5859, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d7, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d8, 0xff); + ret += os04a10_write_register(vi_pipe, 0x58d9, 0xff); + return ret; +} + +static void os04a10_wdr_2to1_4m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os04a10_wdr_2to1_4m30_12bit_part1(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part2(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part3(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part4(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part5(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part6(vi_pipe); + ret += os04a10_wdr_2to1_4m30_12bit_part7(vi_pipe); + + ret += os04a10_write_register(vi_pipe, 0x0305, 0x5c); // add WDR VTS Blank + ret += os04a10_write_register(vi_pipe, 0x0325, 0xd8); + ret += os04a10_write_register(vi_pipe, 0x380e, 0x09); + ret += os04a10_write_register(vi_pipe, 0x380f, 0x84); + + os04a10_default_reg_init(vi_pipe); + delay_ms(5); /* delay 5 ms */ + ret += os04a10_write_register(vi_pipe, 0x0100, 0x01); + if (ret != TD_SUCCESS) { + isp_err_trace("os04a10 write register failed!\n"); + return; + } + printf("========================================================================\n"); + printf("vi_pipe:%d,== os04a10 24Mclk 4M30fps(MIPI) 12bit wdr2to1 init success! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/Makefile b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/Makefile new file mode 100644 index 0000000..3c4c25b --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_os04a10_slave + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.c b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.c new file mode 100644 index 0000000..4a62f87 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.c @@ -0,0 +1,1148 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" +#include "securec.h" +#include "os04a10_slave_cmos_ex.h" +#include "os04a10_slave_cmos.h" + +#define OS04A10_SLAVE_ID 4 +#define SENSOR_OS04A10_SLAVE_WIDTH 2688 +#define SENSOR_OS04A10_SLAVE_HEIGHT 1520 +#define INCK_ONCE_INCREASE_MAX 750000 + +#define higher_4bits(x) (((x) & 0xf0000) >> 16) +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) +#define low_2bits(x) ((x) & 0x0003) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define os04a10_slave_sensor_set_ctx(dev, ctx) ((g_os04a10_slave_sns_state[dev]) = (ctx)) +#define os04a10_slave_sensor_reset_ctx(dev) (g_os04a10_slave_sns_state[dev] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +ot_isp_sns_commbus g_os04a10_slave_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0 }, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1 } +}; + +td_s32 g_os04a10_slave_bind_dev[OT_ISP_MAX_PIPE_NUM] = {0, 0, 1, 1, 2, 2, 3, 3}; +static td_u32 g_os04a10_slave_sensor_mode_time[OT_ISP_MAX_PIPE_NUM] = {0, 0, 0, 0, 0, 0, 0, 0}; +ot_isp_sns_state *g_os04a10_slave_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; +ot_isp_slave_sns_sync g_os04a10_slave_sync[OT_ISP_MAX_PIPE_NUM]; +ot_isp_sns_commbus *os04a10_slave_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_os04a10_slave_bus_info[vi_pipe]; +} + +ot_isp_sns_state *os04a10_slave_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_os04a10_slave_sns_state[vi_pipe]; +} + +os04a10_slave_video_mode_tbl g_os04a10_slave_mode_tbl[OS04A10_SLAVE_MODE_BUTT] = { + { + 24000000, 400, 800000, OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR, OS04A10_SLAVE_FULL_LINES_MAX, 30, + 5, 2688, 1520, 0, OT_WDR_MODE_NONE, "OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE" + }, +}; + +/**************************************************************************** + * local variables * + ****************************************************************************/ +/* Os04a10 Register Address */ +#define OS04A10_SLAVE_EXPO_L_ADDR 0x3502 +#define OS04A10_SLAVE_EXPO_H_ADDR 0x3501 +#define OS04A10_SLAVE_AGAIN_L_ADDR 0x3509 +#define OS04A10_SLAVE_AGAIN_H_ADDR 0x3508 +#define OS04A10_SLAVE_DGAIN_L_ADDR 0x350c +#define OS04A10_SLAVE_DGAIN_M_ADDR 0x350b +#define OS04A10_SLAVE_DGAIN_H_ADDR 0x350a +#define OS04A10_SLAVE_VMAX_L_ADDR 0x380f +#define OS04A10_SLAVE_VMAX_H_ADDR 0x380e +#define OS04A10_SLAVE_HCG_1_ADDR 0x376C +#define OS04A10_SLAVE_GROUP_1_ADDR 0x320d +#define OS04A10_SLAVE_GROUP_2_ADDR 0x3208 +#define OS04A10_SLAVE_GROUP_3_ADDR 0x3208 +#define OS04A10_SLAVE_GROUP_4_ADDR 0x320d +#define OS04A10_SLAVE_GROUP_5_ADDR 0x320a +#define OS04A10_SLAVE_GROUP_6_ADDR 0x320e + + +#define os04a10_slave_err_mode_print(sensor_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sensor_image_mode)->width, \ + (sensor_image_mode)->height, \ + (sensor_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + +os04a10_slave_video_mode_tbl *os04a10_get_slave_mode_tbl(td_u8 img_mode) +{ + return &g_os04a10_slave_mode_tbl[img_mode]; +} + +ot_isp_slave_sns_sync *os04a10_get_slave_sync(ot_vi_pipe vi_pipe) +{ + return &g_os04a10_slave_sync[vi_pipe]; +} + +td_s32 os04a10_get_slave_bind_dev(ot_vi_pipe vi_pipe) +{ + return g_os04a10_slave_bind_dev[vi_pipe]; +} + +td_u32 os04a10_get_slave_sensor_mode_time(ot_vi_pipe vi_pipe) +{ + return g_os04a10_slave_sensor_mode_time[vi_pipe]; +} + +ot_isp_sns_state *os04a10_get_slave_sns_state(ot_vi_pipe vi_pipe) +{ + return g_os04a10_slave_sns_state[vi_pipe]; +} + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = OS04A10_SLAVE_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->again_accu.accuracy = 0.0625; /* accuracy: 0.0625 */ + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->dgain_accu.accuracy = 0.0009765625; /* accuracy: 0.0009765625 */ + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 32 << ae_sns_dft->isp_dgain_shift; /* max 32 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_4; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_5_6; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 992; /* max 992 */ + ae_sns_dft->min_again = 16; /* min 16 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 1024; /* max 1024 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x40; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 76151; /* init 76151 */ + + ae_sns_dft->max_int_time = sns_state->fl_std - 8; /* sub 8 */ + ae_sns_dft->min_int_time = 1; /* min int 1 */ + ae_sns_dft->max_int_time_target = 65535; /* max int 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(vmax); + } + + return; +} + +/* the function of sensor set fps */ +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, vmax, inck, new_inck; + td_float max_fps, min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + static td_u32 last_inck[OT_ISP_MAX_PIPE_NUM] = {0}; + + sns_check_pointer_void_return(ae_sns_dft); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_os04a10_slave_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_os04a10_slave_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_os04a10_slave_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_os04a10_slave_mode_tbl[sns_state->img_mode].min_fps; + inck = g_os04a10_slave_mode_tbl[sns_state->img_mode].inck; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + new_inck = (td_u32)(inck / div_0_to_1_float(fps)); + if (last_inck[vi_pipe] == 0) { + last_inck[vi_pipe] = new_inck; + } else { + if (new_inck > last_inck[vi_pipe] && (new_inck - last_inck[vi_pipe]) > INCK_ONCE_INCREASE_MAX) { + new_inck = last_inck[vi_pipe] + INCK_ONCE_INCREASE_MAX; + fps = (td_float)inck / (td_float)new_inck; + } else if (new_inck < last_inck[vi_pipe] && (last_inck[vi_pipe] - new_inck) > INCK_ONCE_INCREASE_MAX) { + new_inck = last_inck[vi_pipe] - INCK_ONCE_INCREASE_MAX; + fps = (td_float)inck / (td_float)new_inck; + } + last_inck[vi_pipe] = new_inck; + } + g_os04a10_slave_sync[vi_pipe].vs_time = new_inck; + + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + vmax = (vmax > lines_max) ? lines_max : vmax; + cmos_config_vmax(sns_state, vmax); + sns_state->fl_std = vmax; + sns_state->regs_info[0].slv_sync.slave_vs_time = g_os04a10_slave_sync[vi_pipe].vs_time; + ae_sns_dft->lines_per500ms = lines * 15; /* *15 */ + + ae_sns_dft->fps = fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->max_int_time = sns_state->fl_std - 10; /* sub 10 */ + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, inck, new_inck; + td_u32 vmax; + td_float fps, fps_max; + ot_isp_sns_state *sns_state = TD_NULL; + static td_u32 last_inck[OT_ISP_MAX_PIPE_NUM] = {0}; + sns_check_pointer_void_return(ae_sns_dft); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_os04a10_slave_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_os04a10_slave_mode_tbl[sns_state->img_mode].max_ver_lines; + inck = g_os04a10_slave_mode_tbl[sns_state->img_mode].inck; + fps_max = g_os04a10_slave_mode_tbl[sns_state->img_mode].max_fps; + + vmax = full_lines; + vmax = (vmax > lines_max) ? lines_max : vmax; + fps = lines * fps_max / (td_float)full_lines; + new_inck = (td_u32)(inck / div_0_to_1_float(fps)); + if (last_inck[vi_pipe] == 0) { + last_inck[vi_pipe] = g_os04a10_slave_sync[vi_pipe].vs_time; + } + if (new_inck > last_inck[vi_pipe] && (new_inck - last_inck[vi_pipe]) > INCK_ONCE_INCREASE_MAX) { + new_inck = last_inck[vi_pipe] + INCK_ONCE_INCREASE_MAX; + fps = (td_float)inck / (td_float)new_inck; + vmax = (td_u32)(lines * fps_max / div_0_to_1_float(fps)); + } + last_inck[vi_pipe] = new_inck; + sns_state->fl[0] = vmax; + g_os04a10_slave_sync[vi_pipe].vs_time = new_inck; + sns_state->regs_info[0].slv_sync.slave_vs_time = g_os04a10_slave_sync[vi_pipe].vs_time; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(sns_state->fl[0]); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(sns_state->fl[0]); + break; + default: + break; + } + + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->max_int_time = sns_state->fl[0] - 10; /* max_int_time: Flstd - 10 */ + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = low_8bits(int_time); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = high_8bits(int_time); + + return; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} + +static td_void cmos_gains_regs_set(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state, + td_u32 again_reg, td_u32 dgain_reg, td_u32 hcg_1_reg) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].data = ((again_reg & 0xf) << 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].data = ((again_reg & 0xf0) >> 4); /* shift 4 */ + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].data = ((dgain_reg & 0x03) << 6); /* shift 6 */ + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].data = ((dgain_reg & 0x03FC) >> 2); /* shift 2 */ + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].data = ((dgain_reg & 0x3C00) >> 10); /* shift 10 */ + sns_state->regs_info[0].i2c_data[HCG_1_IDX].data = (hcg_1_reg & 0xff); + } else { + } + + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 again_reg, dgain_reg, hcg_1_reg; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (again < 0x44) { + hcg_1_reg = 0x10; + } else { + hcg_1_reg = 0x00; + again = (td_u32)((td_float)again / 4.25 + 0.5); /* HCG gain equal 4.25, 0.5 */ + } + + again_reg = clip3(again, 0x10, 0xF8); + dgain_reg = clip3(dgain, 0x400, 0x3FFF); + + cmos_gains_regs_set(vi_pipe, sns_state, again_reg, dgain_reg, hcg_1_reg); + + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + ot_unused(man_ratio_enable); + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + + return; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 5000 +#define CALIBRATE_STATIC_WB_R_GAIN 550 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 512 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 42 +#define CALIBRATE_AWB_P2 214 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 165453 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-111831) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + default: + cmos_get_isp_linear_default(isp_def); + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + } + + isp_def->sns_mode.sns_id = OS04A10_SLAVE_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(black_level); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), &g_cmos_blc, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x400; + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + check_ret(ot_mpi_isp_get_sns_slave_attr(vi_pipe, &g_os04a10_slave_sync[vi_pipe])); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE) { + g_os04a10_slave_sync[vi_pipe].vs_time = + (td_u32)((g_os04a10_slave_mode_tbl[sns_state->img_mode].inck_per_vs) * + g_os04a10_slave_mode_tbl[sns_state->img_mode].max_fps / 20); /* divide 20 */ + full_lines_5fps = (OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR * 30) / 20; /* 30fps, 20fps */ + } else { + return; + } + } + + if (enable) { /* setup for ISP pixel calibration mode */ + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_AGAIN_L_ADDR, 0x00); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_AGAIN_H_ADDR, 0x01); + + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_DGAIN_L_ADDR, 0x00); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_DGAIN_M_ADDR, 0x00); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_DGAIN_H_ADDR, 0x01); + + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_VMAX_L_ADDR, low_8bits(full_lines_5fps)); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_VMAX_H_ADDR, high_8bits(full_lines_5fps)); + + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_EXPO_L_ADDR, low_8bits(full_lines_5fps - 10)); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_EXPO_H_ADDR, high_8bits(full_lines_5fps - 10)); + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > OS04A10_SLAVE_FULL_LINES_MAX) ? \ + OS04A10_SLAVE_FULL_LINES_MAX : sns_state->fl_std; + g_os04a10_slave_sync[vi_pipe].vs_time = (td_u32)g_os04a10_slave_mode_tbl[sns_state->img_mode].inck_per_vs; + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_VMAX_L_ADDR, low_8bits(sns_state->fl_std)); + os04a10_slave_write_register(vi_pipe, OS04A10_SLAVE_VMAX_H_ADDR, high_8bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + + check_ret(ot_mpi_isp_set_sns_slave_attr(vi_pipe, &g_os04a10_slave_sync[vi_pipe])); + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + case OT_WDR_MODE_BUILT_IN: + sns_state->wdr_mode = OT_WDR_MODE_BUILT_IN; + printf("2to1 line WDR 4k mode(60fps->30fps)\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_os04a10_slave_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = REG_MAX_IDX; + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = OS04A10_SLAVE_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = OS04A10_SLAVE_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = OS04A10_SLAVE_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].reg_addr = OS04A10_SLAVE_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].reg_addr = OS04A10_SLAVE_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].reg_addr = OS04A10_SLAVE_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].reg_addr = OS04A10_SLAVE_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].reg_addr = OS04A10_SLAVE_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_M_IDX].reg_addr = OS04A10_SLAVE_DGAIN_M_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].reg_addr = OS04A10_SLAVE_DGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].reg_addr = OS04A10_SLAVE_VMAX_L_ADDR; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].reg_addr = OS04A10_SLAVE_VMAX_H_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP1].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP1].reg_addr = OS04A10_SLAVE_GROUP_1_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP2].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP2].reg_addr = OS04A10_SLAVE_GROUP_2_ADDR; + + sns_state->regs_info[0].i2c_data[HCG_1_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].interrupt_pos = 0; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].reg_addr = OS04A10_SLAVE_HCG_1_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP3].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP3].reg_addr = OS04A10_SLAVE_GROUP_3_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP4].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP4].reg_addr = OS04A10_SLAVE_GROUP_4_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP5].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP5].reg_addr = OS04A10_SLAVE_GROUP_5_ADDR; + + sns_state->regs_info[0].i2c_data[GROUP6].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[GROUP6].reg_addr = OS04A10_SLAVE_GROUP_6_ADDR; + + sns_state->regs_info[0].slv_sync.update = TD_TRUE; + sns_state->regs_info[0].slv_sync.delay_frame_num = 1; /* delay_frame 1 */ + sns_state->regs_info[0].slv_sync.slave_bind_dev = g_os04a10_slave_bind_dev[vi_pipe]; + + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + if (i != HCG_1_IDX) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } else { + sns_state->regs_info[0].i2c_data[GROUP1].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP2].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[HCG_1_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP3].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP4].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP5].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[GROUP6].update = TD_TRUE; + break; + } + } + } + if (sns_state->regs_info[0].slv_sync.slave_vs_time == sns_state->regs_info[1].slv_sync.slave_vs_time) { + sns_state->regs_info[0].slv_sync.update = TD_FALSE; + } else { + sns_state->regs_info[0].slv_sync.update = TD_TRUE; + } + + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + sns_state->regs_info[0].i2c_data[GROUP1].data = 0x00; + sns_state->regs_info[0].i2c_data[GROUP2].data = 0x01; + sns_state->regs_info[0].i2c_data[GROUP3].data = 0x11; + sns_state->regs_info[0].i2c_data[GROUP4].data = 0x05; + sns_state->regs_info[0].i2c_data[GROUP5].data = 0x01; + sns_state->regs_info[0].i2c_data[GROUP6].data = 0xa0; + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sensor_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sensor_image_mode) { + case OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR; + break; + default: + sns_state->fl_std = OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sensor_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sensor_image_mode); + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < OS04A10_SLAVE_MODE_BUTT; i++) { + if (sensor_image_mode->fps <= g_os04a10_slave_mode_tbl[i].max_fps && + sensor_image_mode->width <= g_os04a10_slave_mode_tbl[i].width && + sensor_image_mode->height <= g_os04a10_slave_mode_tbl[i].height && + sns_state->wdr_mode == g_os04a10_slave_mode_tbl[i].wdr_mode) { + image_mode = (os04a10_slave_res_mode)i; + break; + } + } + + if (i >= OS04A10_SLAVE_MODE_BUTT) { + os04a10_slave_err_mode_print(sensor_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[0] = OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR; + sns_state->fl[1] = OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = os04a10_slave_init; + sensor_exp_func->pfn_cmos_sns_exit = os04a10_slave_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 os04a10_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_os04a10_slave_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + os04a10_slave_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os04a10_slave_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + os04a10_slave_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = OS04A10_SLAVE_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, OS04A10_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, OS04A10_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, OS04A10_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_os04a10_slave_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = os04a10_slave_standby, + .pfn_restart = os04a10_slave_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = TD_NULL, + .pfn_write_reg = os04a10_slave_write_register, + .pfn_read_reg = os04a10_slave_read_register, + .pfn_set_bus_info = os04a10_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.h b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.h new file mode 100644 index 0000000..f6a0b79 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos.h @@ -0,0 +1,101 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS04A10_SLAVE_CMOS_H +#define OS04A10_SLAVE_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" +#include "ot_math.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef clip3 +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif + +#define check_ret(express) \ + do { \ + td_s32 result; \ + result = express; \ + if (result != TD_SUCCESS) { \ + printf("Failed at %s: LINE: %d with %#x!\n", __FUNCTION__, __LINE__, result); \ + } \ + } while (0) + +#define OS04A10_SLAVE_I2C_ADDR 0x6c +#define OS04A10_SLAVE_ADDR_BYTE 2 +#define OS04A10_SLAVE_DATA_BYTE 1 +#define os04a10_slave_sensor_get_ctx(dev, ctx) ((ctx) = os04a10_slave_get_ctx(dev)) + +#define OS04A10_SLAVE_FULL_LINES_MAX 0x2610 +#define OS04A10_SLAVE_INCREASE_LINES 0 /* make real fps less than stand fps because NVR require */ +#define OS04A10_SLAVE_VMAX_4M_30FPS_12BIT_LINEAR (1624 + OS04A10_SLAVE_INCREASE_LINES) + +typedef enum { + OS04A10_SLAVE_4M_30FPS_12BIT_LINEAR_MODE = 0, + OS04A10_SLAVE_MODE_BUTT +} os04a10_slave_res_mode; + +typedef struct { + td_u32 inck; + td_float inck_per_hs; + td_float inck_per_vs; + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} os04a10_slave_video_mode_tbl; + +typedef enum { + EXPO_L_IDX = 0, + EXPO_H_IDX, + AGAIN_L_IDX, + AGAIN_H_IDX, + DGAIN_L_IDX, + DGAIN_M_IDX, + DGAIN_H_IDX, + VMAX_L_IDX, + VMAX_H_IDX, + GROUP1, + GROUP2, + HCG_1_IDX, + GROUP3, + GROUP4, + GROUP5, + GROUP6, + REG_MAX_IDX +}os04a10_slave_linear_reg_index; + +ot_isp_sns_state *os04a10_slave_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *os04a10_slave_get_bus_info(ot_vi_pipe vi_pipe); + +td_void os04a10_slave_init(ot_vi_pipe vi_pipe); +td_void os04a10_slave_exit(ot_vi_pipe vi_pipe); +td_void os04a10_slave_standby(ot_vi_pipe vi_pipe); +td_void os04a10_slave_restart(ot_vi_pipe vi_pipe); +td_s32 os04a10_slave_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 os04a10_slave_read_register(ot_vi_pipe vi_pipe, td_u32 addr); +os04a10_slave_video_mode_tbl *os04a10_get_slave_mode_tbl(td_u8 img_mode); +ot_isp_slave_sns_sync *os04a10_get_slave_sync(ot_vi_pipe vi_pipe); +td_s32 os04a10_get_slave_bind_dev(ot_vi_pipe vi_pipe); +td_u32 os04a10_get_slave_sensor_mode_time(ot_vi_pipe vi_pipe); +ot_isp_sns_state *os04a10_get_slave_sns_state(ot_vi_pipe vi_pipe); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* OS04A10_SLAVE_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos_ex.h b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos_ex.h new file mode 100644 index 0000000..3fc1f76 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_cmos_ex.h @@ -0,0 +1,3183 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS04A10_CMOS_EX_H +#define OS04A10_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + {1024, 1024, 1024, 1024}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 2592, 14}, /* ob_area */ + 0, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + {1024, 1024, 1024, 1024}, /* black level 1024 */ + }, + }, + { + {2688, 1520}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* aidm_blend_ratio */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 24, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + { + 6400, 0.0001548619, -0.4611639237, 0.0000000130, -0.0001639422, 2.1603885856, + 0.0001318677, 0.0220043103, 0.0000000104, 0.0000052716, 0.0067668941, 0, 0, 0, 0, 0 + } +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{48, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {45, 80, 0}}, + {{32, 64, 0}, {24, 72, 0}}, + {{12, 24, 0}, {12, 64, 0}}, + {{8, 20, 0}, {8, 54, 0}}, + {{6, 12, 0}, {6, 36, 0}}, + {{0, 8, 0}, {0, 8, 0}}, + {{0, 6, 0}, {0, 6, 0}}, + {{0, 2, 0}, {0, 2, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 1, + { + 0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, + 259, 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, + 467, 477, 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, + 671, 683, 695, 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, + 885, 896, 906, 917, 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, + 1085, 1096, 1107, 1118, 1129, 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, + 1274, 1284, 1295, 1305, 1315, 1325, 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, + 1468, 1480, 1493, 1499, 1505, 1511, 1518, 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, + 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, + 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, + 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, + 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, 2036, 2042, 2047, 2052, 2058, 2063, 2068, + 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, 2135, 2140, 2145, 2150, 2154, 2159, + 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, 2226, 2231, 2235, 2240, 2244, + 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, 2312, 2317, 2321, 2325, + 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, 2392, 2396, 2400, + 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, 2466, 2470, + 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, 2538, + 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, + 2665, 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, + 2723, 2727, 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, + 2781, 2784, 2787, 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, + 2837, 2840, 2843, 2846, 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, + 2890, 2893, 2896, 2899, 2902, 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, + 2941, 2944, 2946, 2949, 2952, 2954, 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, + 2988, 2990, 2993, 2995, 2998, 3000, 3002, 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, + 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, + 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, + 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, + 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, 3177, 3179, 3182, 3184, 3186, 3188, 3190, + 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, 3217, 3219, 3221, 3223, 3225, 3227, + 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, 3256, 3258, 3260, 3262, 3264, + 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, 3293, 3295, 3297, 3299, + 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, 3330, 3332, 3334, + 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, 3366, 3368, + 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, 3401, + 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, + 3470, 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, + 3506, 3508, 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, + 3544, 3546, 3548, 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, + 3582, 3585, 3587, 3589, 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, + 3620, 3622, 3624, 3626, 3628, 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, + 3657, 3659, 3661, 3663, 3665, 3667, 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, + 3693, 3695, 3697, 3699, 3701, 3704, 3706, 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, + 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, + 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, + 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, + 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, 3857, 3858, 3860, 3862, 3864, 3866, 3868, + 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, + 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, 3928, 3930, 3932, 3934, 3935, + 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, + 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, 3998, 4000, 4001, + 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, 4032, 4034, + 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, 4066, + 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095, + }, + 3, +}; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 4, + /* motion_threshold1 */ + 10, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 255, + /* skin_umin */ + 99, + /* skin_vmin */ + 134, + /* skin_umax */ + 127, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 19, 19, 19, 19, 19 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 21, 21, 21, 21, 21 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 23, 23, 23, 23, 23 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 31, 31, 28, 27, 27, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 27, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 31, 31, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 31, 31, 28, 28, 28, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 29, 29, 29, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 30, 30, 30, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 26, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 88, 88, 88, 82, 82, 82, 75, 75, 75, 68, 68, 68, 68, 68, 68, 68 }, + { 95, 95, 95, 88, 88, 88, 80, 85, 81, 73, 73, 73, 73, 73, 73, 73 }, + { 104, 104, 104, 96, 96, 96, 88, 95, 89, 80, 80, 80, 80, 80, 80, 80 }, + { 116, 116, 116, 107, 107, 107, 98, 108, 101, 89, 89, 89, 89, 89, 89, 89 }, + { 127, 127, 127, 118, 118, 118, 108, 121, 114, 98, 98, 98, 98, 98, 98, 98 }, + { 139, 139, 139, 128, 128, 128, 118, 136, 130, 107, 107, 107, 107, 107, 107, 107 }, + { 150, 150, 150, 138, 138, 138, 127, 151, 145, 115, 115, 115, 115, 115, 115, 115 }, + { 156, 156, 156, 144, 144, 144, 132, 163, 157, 120, 120, 120, 120, 120, 120, 120 }, + { 160, 160, 160, 148, 148, 148, 135, 171, 164, 123, 123, 123, 123, 123, 123, 123 }, + { 163, 163, 163, 150, 150, 150, 138, 177, 169, 125, 125, 125, 125, 125, 125, 125 }, + { 165, 165, 165, 152, 152, 152, 140, 181, 171, 127, 127, 127, 127, 127, 127, 127 }, + { 166, 166, 166, 154, 154, 154, 141, 183, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 166, 166, 166, 154, 154, 154, 141, 184, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 165, 165, 165, 152, 152, 152, 140, 182, 173, 127, 127, 127, 127, 127, 127, 127 }, + { 164, 164, 164, 151, 151, 151, 139, 180, 171, 126, 126, 126, 126, 126, 126, 126 }, + { 161, 161, 161, 149, 149, 149, 136, 176, 168, 124, 124, 124, 124, 124, 124, 124 }, + { 157, 157, 157, 145, 145, 145, 133, 171, 165, 121, 121, 121, 121, 121, 121, 121 }, + { 152, 152, 152, 140, 140, 140, 129, 165, 162, 117, 117, 117, 117, 117, 117, 117 }, + { 147, 147, 147, 136, 136, 136, 124, 159, 157, 113, 113, 113, 113, 113, 113, 113 }, + { 140, 140, 140, 130, 130, 130, 119, 151, 152, 108, 108, 108, 108, 108, 108, 108 }, + { 133, 133, 133, 122, 122, 122, 112, 142, 145, 102, 102, 102, 102, 102, 102, 102 }, + { 125, 125, 125, 115, 115, 115, 106, 133, 137, 96, 96, 96, 96, 96, 96, 96 }, + { 117, 117, 117, 108, 108, 108, 99, 123, 129, 90, 90, 90, 90, 90, 90, 90 }, + { 111, 111, 111, 102, 102, 102, 94, 113, 120, 85, 85, 85, 85, 85, 85, 85 }, + { 103, 103, 103, 95, 95, 95, 87, 103, 111, 79, 79, 79, 79, 79, 79, 79 }, + { 95, 95, 95, 88, 88, 88, 80, 93, 102, 73, 73, 73, 73, 73, 73, 73 }, + { 87, 87, 87, 80, 80, 80, 74, 83, 93, 67, 67, 67, 67, 67, 67, 67 }, + { 78, 78, 78, 72, 72, 72, 66, 73, 84, 60, 60, 60, 60, 60, 60, 60 }, + { 70, 70, 70, 65, 65, 65, 59, 65, 73, 54, 54, 54, 54, 54, 54, 54 }, + { 62, 62, 62, 58, 58, 58, 53, 56, 62, 48, 48, 48, 48, 48, 48, 48 }, + { 57, 57, 57, 53, 53, 53, 48, 49, 51, 44, 44, 44, 44, 44, 44, 44 }, + { 52, 52, 52, 48, 48, 48, 44, 44, 44, 40, 40, 40, 40, 40, 40, 40 } + }, + /* edge_strength */ + { + { 183, 183, 183, 183, 183, 203, 203, 203, 223, 223, 223, 223, 223, 223, 223, 223 }, + { 186, 186, 186, 186, 186, 207, 207, 207, 228, 228, 228, 228, 228, 228, 228, 228 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 197, 197, 197, 197, 197, 219, 219, 219, 241, 241, 241, 241, 241, 241, 241, 241 }, + { 203, 203, 203, 203, 203, 226, 226, 226, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 209, 209, 209, 209, 209, 232, 232, 232, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 214, 214, 214, 214, 214, 238, 238, 238, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 215, 215, 215, 215, 215, 239, 239, 239, 263, 263, 263, 263, 263, 263, 263, 263 }, + { 211, 211, 211, 211, 211, 234, 234, 234, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 205, 205, 205, 205, 205, 228, 228, 228, 251, 251, 251, 251, 251, 251, 251, 251 }, + { 199, 199, 199, 199, 199, 221, 221, 221, 243, 243, 243, 243, 243, 243, 243, 243 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 182, 182, 182, 182, 182, 202, 202, 202, 222, 222, 222, 222, 222, 222, 222, 222 }, + { 171, 171, 171, 171, 171, 190, 190, 190, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 159, 159, 159, 159, 159, 177, 177, 177, 195, 195, 195, 195, 195, 195, 195, 195 }, + { 149, 149, 149, 149, 149, 165, 165, 165, 182, 182, 182, 182, 182, 182, 182, 182 }, + { 139, 139, 139, 139, 139, 154, 154, 154, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 130, 130, 130, 130, 130, 144, 144, 144, 158, 158, 158, 158, 158, 158, 158, 158 }, + { 123, 123, 123, 123, 123, 137, 137, 137, 151, 151, 151, 151, 151, 151, 151, 151 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 200, 190, 180, 180, 170, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 120, 120, 110, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 45, 40, 40, 40, 40, 40, 40, 40, 40 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149 }, + { 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170 }, + { 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180 }, + { 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190 }, + { 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202 }, + { 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213 }, + { 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224 }, + { 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235 }, + { 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269 }, + { 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264 }, + { 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240 }, + { 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, + { 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219 }, + { 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198 }, + { 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188 }, + { 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178 }, + { 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155 }, + { 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 7, 7, 6, 6, 5, 5, 4, 4, 3, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 6, 6, 5, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 58, 58, 58, 58, 60, 60, 60, 52, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 20, 18, 16, 15, 15, 15, 15, 15, 15, 15 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x0196, 0x8092, 0x8004, 0x805B, 0x01B4, 0x8059, 0x801A, 0x808C, 0x01A6 }, + }, + { + /* color temperature */ + 4949, + /* CCM matrix */ + { 0x01A0, 0x809F, 0x8001, 0x8066, 0x01A7, 0x8041, 0x800C, 0x80F1, 0x01FD }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x01A0, 0x8084, 0x801C, 0x8083, 0x01C3, 0x8040, 0x0008, 0x811E, 0x0216 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x02A7, 0x81CC, 0x0025, 0x806D, 0x01A6, 0x8039, 0x802A, 0x8133, 0x025D }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 128, 128, 128, 128, 124, 120, 116, 112, 108, 104, 100, 94, 90, 90, 90, 90 } +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 20, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + /* CA */ + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + /* ISO */ + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42}, + /* y_grid_width */ + {23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 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264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 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286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 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354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 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262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 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1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000 + } + } +}; + +static const ot_isp_cmos_clut g_cmos_clut = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 3149813, 1046533, 3149814, 6299621, 9450452, 6299622, 9450451, 12602304, + 16802729, 12602303, 16803752, 22052752, 26255221, 21005198, 25206643, 30457689, 35708733, + 29409112, 32563005, 39910177, 45161223, 35714854, 38866705, 49362669, 54612692, 42017535, + 45168367, 60912311, 68261528, 48319196, 52519622, 75610743, 3149814, 57769646, 4198390, + 2095110, 9451475, 3143687, 9451474, 6299621, 15755175, 6300644, 14706598, 12603326, + 23110515, 11554749, 21012342, 19956621, 29416257, 17859470, 25219913, 26263385, 32572189, + 23116638, 26276652, 31519533, 34675465, 26273592, 25232160, 33624849, 37828337, 26279717, + 24187669, 35727104, 5246965, 24184604, 6295538, 39930592, 9451473, 25238283, 9451472, + 4192261, 13658024, 6290435, 11559850, 7349219, 17865595, 7349218, 14716804, 11554749, + 19973973, 10506174, 14727012, 15761298, 18932542, 13663127, 11587410, 18920295, 15788854, + 14722931, 7395148, 19978055, 12645170, 13681497, 2153291, 17884985, 8393711, 9491278, + 9443307, 14741301, 9451472, 4249419, 8402896, 11597614, 9461678, 1072749387, 7363507, + 7341055, 10520463, 10487801, 6323098, 8398816, 8430453, 9447390, 2134918, 9456575, + 4241254, 8408001, 1070637947, 10515358, 1071693666, 7367590, 1063299959, 9475969, 1065403234, + 4229007, 1054911353, 6336364, 11541479, 39808, 12591075, 1097571, 8402896, 1067493240, + 8402896, 1068548962, 5264313, 1059105655, 3166143, 1061208932, 2125734, 1050717050, 1071670194, + 12586995, 1070629783, 14685164, 1064333224, 9448411, 1063292815, 10496985, 1054899107, 7358404, + 1053856653, 6308808, 1045462946, 4219823, 1044420494, 1071032, 1034977187, 1072723870, 12592094, + 1068525484, 12593114, 1066436498, 7354321, 1060140965, 6304722, 1059099533, 2115526, 1050704802, + 16333, 1049663373, 1067471805, 1040220066, 1063274441, 1040226191, 1058037688, 1029734309, 1052790727, + 15735781, 1047553974, 15737822, 1040208840, 10498007, 1037068214, 9449430, 1027625931, 4210635, + 1025534905, 3161039, 1015043022, 1071665089, 11545558, 1068516298, 9449426, 1063279546, 5256147, + 1058032584, 4207572, 1052795830, 1071658963, 1046499271, 1069560794, 1042311094, 1059077076, 1033917385, + 1055929311, 1030777783, 1046495190, 1021334477, 1041248229, 1019243450, 1032863706, 1008751568, 1025519596, + 14690264, 1019232223, 11546577, 1010838515, 8400852, 1005600740, 6303699, 996157434, 2111443, + 6304718, 1061847, 3160010, 1065368531, 2109398, 1062220764, 1060823, 1052786645, 1067461600, + 1048588258, 1065362407, 1040203736, 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1050621, 7355341, 5252067, + 16803749, 5253088, 10511275, 11551685, 25207666, 11555770, 12617612, 19951519, 31509326, + 18908045, 12624758, 34649951, 36760369, 24162150, 12628840, 47248165, 43059989, 27316045, + 11583326, 60893939, 1046535, 30466874, 5244924, 73491137, 3151854, 33618724, 4202471, + 1069541398, 8403917, 1044494, 4209616, 0, 12609447, 2100217, 4216760, 5253089, + 17863553, 5254110, 3174308, 12603324, 19968871, 8409020, 33686, 21006220, 21022550, + 11564955, 1069584269, 28358495, 21026632, 12621696, 1065392006, 34659134, 3145728, 12626799, + 8392690, 39910180, 4201450, 11582307, 5252067, 47258373, 6306766, 10536792, 2111445, + 1072688146, 7364529, 6289414, 1071663047, 1050619, 7371672, 4199410, 1066424253, 5253087, + 6329222, 4205532, 1060135861, 10507194, 4235131, 4212676, 1052797872, 15761299, 1092466, + 3171246, 1045458861, 18916210, 6294519, 1079197, 9443304, 19970910, 5251045, 1071679377, + 4203489, 21024591, 3160018, 1067488137, 1072705499, 22077248, 1068992, 1062247300, 1064318935, + 3142667, 1071670193, 9438202, 1055932372, 3149814, 1066431398, 6297579, 1046496211, 5254109, + 1061190559, 3156956, 1037060051, 6310847, 1054901146, 16334, 1026575315, 7368612, 9442285, + 1068519362, 7347165, 7374734, 5252066, 1063279544, 3154911, 5282688, 1061848, 1056991154, + 1069557731, 2140022, 1068515279, 1049653166, 1058023398, 1072738159, 1061178312, 1042314156, 1045440491, + 8387584, 1053840324, 11538412, 1032857583, 6296558, 1045452737, 7347172, 1020274676, 4205532, + 1036017600, 2108382, 1007690746, 2114504, 8395747, 1068512217, 3154899, 1072716728, 4203488, + 1060125653, 1057757, 1069575083, 1071655903, 1051739091, 1067458538, 1064335266, 1061171167, 1042302930, + 1051727861, 1058045852, 1050686431, 1031817171, 1035996161, 1052805016, 1040200673, 1022381012, 1020266508, + 11537395, 1028667364, 9444317, 1004535830, 7347175, 1017133030, 5251038, 963636228, 3156957, + 5251032, 1058785, 1064295459, 1071659987, 2106334, 1064314852, 1070592014, 1064323019, 1068508134, + 1051731944, 2100215, 1056985030, 1054875630, 1039149037, 9448410, 1049647042, 1041243126, 1026566130, + 20996013, 1041259457, 1026562045, 1013982199, 33592188, 1031823296, 1012928517, 1001399292, 46187343, + 11539429, 988809218, 4203471, 58781478, 6299617, 10190, 2106328, 1067442205, 1058783, + 9181, 9188, 1071641610, 1066414047, 1065360366, 1059068912, 2102258, 1055929311, 1047531517, + 1043338235, 9451474, 1045443552, 1030751244, 1027607558, 16801708, 1033910242, 1015019546, 1011876881, + 25200521, 1023424485, 997191719, 998243355, 32549738, 1011890152, 980412467, 950002688, 39896909, + 7348182, 1063245862, 1061146670, 1070589974, 4203483, 1069543440, 1067443224, 1073740805, 9186, + 1050619, 1073740803, 2103278, 1061168106, 9447392, 5250026, 6305745, 1047535602, 22043568, + 14697413, 10509236, 1033903098, 37787511, 27293589, 14710683, 1019220993, 53530435, 39889765, + 16813958, 999296002, 69272339, 52484923, 19964786, 977273856, 1065344032, 65078035, 1044493, + 10184, 1071641612, 1064293415, 1050621, 9173, 2101236, 1069542420, 1055723, 9190, + 9450453, 1023, 2110422, 1056970741, 18898860, 5252067, 3165122, 1039140868, 29396866, + 13650879, 3170225, 1023409171, 39892828, 21001114, 2126754, 1005581344, 49339194, 28350329, + 1082261, 988802093, 1068491802, 35699547, 5240834, 920635392, 1072691207, 43046719, 2101238, + 1059048498, 2103280, 1069539358, 8169, 1066394651, 8402896, 1071640589, 1071656925, 1072692229, + 14704559, 3066, 1068514257, 5249007, 19955601, 4204512, 1064324039, 14695371, 25205624, + 8408002, 1061181375, 30439316, 29407072, 12609447, 1056989111, 46183260, 1072688145, 15762320, + 6293494, 60877610, 1, 18913148, 3150831, 76618492, 2104300, 22065001, 1072701418, + 1063244842, 5257171, 1042452, 1066412005, 1068492822, 7361467, 1046533, 1059074016, 1072693249, + 8416166, 1052661, 1052783581, 5251046, 9469844, 2107360, 1045445594, 14698433, 10523524, + 3162060, 1038106584, 24147862, 3142664, 3168185, 6294505, 34644847, 1051642, 2124713, + 2103273, 44092235, 1055722, 2128796, 1070603243, 53538601, 13273, 1083279, 1061167085, + 1066392610, 1072710601, 6288392, 1050681328, 1070590993, 1070618556, 3146748, 1040195571, 0, + 1068524464, 1054704, 1030758390, 5253089, 1066430374, 1072703459, 1020272633, 11553728, 5243900, + 1069561815, 3150812, 16805792, 2101235, 1066419148, 1055716, 22056836, 1072701417, 1063276483, + 1068506093, 27305836, 1068510177, 1059085243, 1054873590, 32555860, 1064318937, 1054894004, 1042288639, + 1071637529, 1059078098, 9437177, 1028655112, 1073738762, 1052788685, 4197363, 1015021585, 1051640, + 1047547848, 1054701, 981459971, 3155936, 6294511, 1069556711, 1054849090, 6309830, 3150828, + 1063267298, 1063243820, 8413104, 1071652843, 1055929311, 1070589975, 9467805, 1063265257, 1049638876, + 5244924, 10521484, 1054877672, 1042300889, 17837015, 11574140, 1046490088, 1034961879, 33577899, + 3140623, 1038102504, 7342057, 48270206, 3144705, 1029713897, 4199401, 64010067, 1053682, + 4198370, 1055722, 1059046454, 10209, 2103271, 1065361388, 1065343012, 15313, 1069554668, + 1055924207, 1072689168, 1071665090, 1058020338, 1045438449, 5245942, 1069570998, 1046484984, 1036001268, + 14692311, 1067477931, 1034949630, 1025515512, 25187252, 1064335266, 1022365700, 1015029755, 35683216, + 8386561, 1003488257, 3149785, 46178158, 4196343, 6101, 2103263, 1064292394, 1054702, + 7137, 7145, 1068491802, 1070605285, 1067457518, 1062213618, 1072690186, 1066414045, 1052775419, + 1048581115, 3150835, 1061174229, 1037042695, 1034947588, 9449432, 1055933391, 1023409171, 1022362637, + 15748030, 1050692554, 1008727071, 1008730134, 22046628, 1044403142, 994044971, 969923584, 29393802, + 8389617, 1052750919, 1050652748, 1068489759, 4198382, 1061145649, 1059046455, 1070590994, 1055723, + 1070587931, 1067441185, 1072692227, 1067458538, 5243903, 2093066, 1053681, 1059070952, 19934168, + 11540459, 3156958, 1050683368, 36724647, 25183170, 6307786, 1042295784, 54563701, 40924053, + 8411064, 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1071641611, 1047533558, 1043470, 15753134, 3067, 1040194552, 11539437, 19953560, + 2105319, 1032854521, 28328896, 1071637529, 5257172, 2099173, 46167950, 1072689165, 7359425, + 1052650, 64007005, 1071644672, 10510255, 1069553649, 81846061, 1072699377, 12612509, 1059066871, + 1052750918, 10209, 1041432, 1048580094, 1061144626, 1063889, 1073737742, 1037043717, 1068490782, + 2116546, 1073740803, 1025508365, 2095111, 2120628, 1071648759, 999285763, 10492905, 3141644, + 1070604267, 1043305572, 22037443, 1047555, 1069558751, 1054846030, 35680155, 1071647738, 1069562835, + 1065337910, 48273267, 1069553649, 1067468744, 4186139, 61914957, 1066410985, 1066424253, 17826810, + 1059045433, 1064315872, 5238791, 34614226, 1064293416, 1061173208, 3144705, 52451240, 1069541399, + 1059079120, 2043, 70289276, 1048577, 5241852, 1069552629, 1049601108, 8396774, 1050617, + 1065360367, 1059043393, 16793544, 1070600182, 1061168106, 1067438124, 25191337, 1065359347, 1056975845, + 4188181, 33588107, 1059068913, 1051735008, 13633528, 41984877, 1053827055, 1047541723, 27274199, + 1064292397, 1047536621, 7338997, 39866291, 1068490781, 1041246187, 3147764, 54555535, 1071640591, + 4195309, 4084, 1055897668, 0, 1052655, 1066406900, 1062193204, 4202470, 1070601203, + 1059067893, 1069537315, 9452495, 1061164022, 1051727862, 3141647, 13652921, 1051726842, 1044388855, + 9440247, 17853347, 1042289662, 1036000248, 18884572, 22053773, 1032850434, 1028660218, 28328896, + 1070586911, 1018168321, 4194275, 37774244, 1071639571, 2013, 1051623, 1062193205, 1072691207, + 5093, 6125, 1066390567, 1072696313, 1069553647, 1064309748, 1070588953, 8169, 1056969721, + 1053823995, 1045513, 1061849, 1044383747, 1042286594, 5245942, 1065930, 1031798797, 1031799817, + 9446370, 2118587, 1020262423, 1020264465, 15743949, 3171245, 1007677474, 988796928, 20991929, + 3139600, 1040157805, 1038059632, 1068488740, 2094087, 1052746836, 1048551513, 1069540378, 1072694271, + 1065335867, 1060091970, 1070592015, 1070600182, 4185118, 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__cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OS08A20_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_sensor_ctl.c b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_sensor_ctl.c new file mode 100644 index 0000000..0a38c39 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os04a10_slave/os04a10_slave_sensor_ctl.c @@ -0,0 +1,651 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif +#include "securec.h" + +#include "os04a10_slave_cmos.h" +#include "ot_mpi_isp.h" +#include "ot_sns_ctrl.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int os04a10_slave_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *os04a10slavebusinfo = TD_NULL; + os04a10slavebusinfo = os04a10_slave_get_bus_info(vi_pipe); + dev_num = os04a10slavebusinfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (OS04A10_SLAVE_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int os04a10_slave_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 os04a10_slave_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 os04a10_slave_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = OS04A10_SLAVE_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = OS04A10_SLAVE_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = OS04A10_SLAVE_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (OS04A10_SLAVE_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + } + + if (OS04A10_SLAVE_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, OS04A10_SLAVE_ADDR_BYTE + OS04A10_SLAVE_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void os04a10_slave_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void os04a10_slave_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void os04a10_slave_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +static void os04a10_slave_linear_4m30_12bit_init(ot_vi_pipe vi_pipe); + +static void os04a10_slave_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastos04a10slave = TD_NULL; + + pastos04a10slave = os04a10_slave_get_ctx(vi_pipe); + for (i = 0; i < pastos04a10slave->regs_info[0].reg_num; i++) { + ret += os04a10_slave_write_register(vi_pipe, + pastos04a10slave->regs_info[0].i2c_data[i].reg_addr, pastos04a10slave->regs_info[0].i2c_data[i].data); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + + return; +} + +void os04a10_set_slave_registers(ot_vi_pipe vi_pipe) +{ + td_s32 ot_ret; + td_s32 slave_dev; + td_u32 data; + td_u8 img_mode; + ot_isp_sns_state *pastos04a10slave = TD_NULL; + os04a10_slave_video_mode_tbl *os04a10_slave_mode_tbl = TD_NULL; + ot_isp_slave_sns_sync *os04a10_slave_sync = os04a10_get_slave_sync(vi_pipe); + td_s32 os04a10_slave_bind_dev = os04a10_get_slave_bind_dev(vi_pipe); + td_u32 os04a10_slave_sensor_mode_time = os04a10_get_slave_sensor_mode_time(vi_pipe); + ot_isp_sns_state *os04a10_slave_sns_state = os04a10_slave_get_ctx(vi_pipe); + + pastos04a10slave = os04a10_slave_get_ctx(vi_pipe); + img_mode = pastos04a10slave->img_mode; + slave_dev = os04a10_slave_bind_dev; + data = os04a10_slave_sensor_mode_time; + + os04a10_slave_mode_tbl = os04a10_get_slave_mode_tbl(img_mode); + + check_ret(ot_mpi_isp_get_sns_slave_attr(slave_dev, os04a10_slave_sync)); + os04a10_slave_sync->cfg.bits.bit_h_enable = 0; + os04a10_slave_sync->cfg.bits.bit_v_enable = 0; + os04a10_slave_sync->slave_mode_time = data; + check_ret(ot_mpi_isp_set_sns_slave_attr(slave_dev, os04a10_slave_sync)); + ot_ret = os04a10_slave_i2c_init(vi_pipe); + if (ot_ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + check_ret(ot_mpi_isp_get_sns_slave_attr(slave_dev, os04a10_slave_sync)); + os04a10_slave_sync->hs_time = (td_u32)os04a10_slave_mode_tbl->inck_per_hs; + + if (os04a10_slave_sns_state->regs_info[0].slv_sync.slave_vs_time == 0) { + os04a10_slave_sync->vs_time = (td_u32)os04a10_slave_mode_tbl->inck_per_vs; + } else { + os04a10_slave_sync->vs_time = os04a10_slave_sns_state->regs_info[0].slv_sync.slave_vs_time; + } + os04a10_slave_sync->cfg.bytes = 0xc0030000; + os04a10_slave_sync->hs_cyc = 0x3; + os04a10_slave_sync->vs_cyc = 0x3; + + check_ret(ot_mpi_isp_set_sns_slave_attr(slave_dev, os04a10_slave_sync)); + + return; +} + +void os04a10_slave_init(ot_vi_pipe vi_pipe) +{ + td_bool init; + td_s32 ret; + ot_isp_sns_state *pastos04a10slave = TD_NULL; + ot_isp_slave_sns_sync *slave_sync = TD_NULL; + + pastos04a10slave = os04a10_slave_get_ctx(vi_pipe); + init = pastos04a10slave->init; + + ret = os04a10_slave_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + os04a10_set_slave_registers(vi_pipe); + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + os04a10_slave_linear_4m30_12bit_init(vi_pipe); + } else { + os04a10_slave_linear_4m30_12bit_init(vi_pipe); + } + + pastos04a10slave->init = TD_TRUE; + slave_sync = os04a10_get_slave_sync(vi_pipe); + slave_sync->cfg.bytes = 0xc0030001; + check_ret(ot_mpi_isp_set_sns_slave_attr(os04a10_get_slave_bind_dev(vi_pipe), slave_sync)); + return; +} + +void os04a10_slave_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = os04a10_slave_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("OS04A10 exit failed!\n"); + } + + return; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x0102, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x0305, 0x42); + ret += os04a10_slave_write_register(vi_pipe, 0x0306, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x0307, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x0308, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x030a, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x0317, 0x0a); + ret += os04a10_slave_write_register(vi_pipe, 0x0322, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x0323, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x0324, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x0325, 0x90); + ret += os04a10_slave_write_register(vi_pipe, 0x0327, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x0329, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x032c, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x032d, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x032e, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x3002, 0x00); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3008, 0x00); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3009, 0x02); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x300f, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x3012, 0x41); + ret += os04a10_slave_write_register(vi_pipe, 0x3026, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x3027, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x302d, 0x24); + ret += os04a10_slave_write_register(vi_pipe, 0x3104, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3106, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x3400, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3408, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x340c, 0x0c); + ret += os04a10_slave_write_register(vi_pipe, 0x340d, 0xb0); + ret += os04a10_slave_write_register(vi_pipe, 0x3425, 0x51); + ret += os04a10_slave_write_register(vi_pipe, 0x3426, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x3427, 0x14); + ret += os04a10_slave_write_register(vi_pipe, 0x3428, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x3429, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x342a, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x342b, 0x04); + ret += os04a10_slave_write_register(vi_pipe, 0x3501, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x3504, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x3508, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3509, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x350a, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3544, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x3548, 0x01); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x3549, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3584, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x3588, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3589, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3601, 0x70); + ret += os04a10_slave_write_register(vi_pipe, 0x3604, 0xe3); + ret += os04a10_slave_write_register(vi_pipe, 0x3605, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x3606, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3608, 0xa8); + ret += os04a10_slave_write_register(vi_pipe, 0x360a, 0xd0); + ret += os04a10_slave_write_register(vi_pipe, 0x360b, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x360e, 0xc8); + ret += os04a10_slave_write_register(vi_pipe, 0x360f, 0x66); + ret += os04a10_slave_write_register(vi_pipe, 0x3610, 0x89); + ret += os04a10_slave_write_register(vi_pipe, 0x3611, 0x8a); + ret += os04a10_slave_write_register(vi_pipe, 0x3612, 0x4e); + ret += os04a10_slave_write_register(vi_pipe, 0x3613, 0xbd); + ret += os04a10_slave_write_register(vi_pipe, 0x3614, 0x9b); + ret += os04a10_slave_write_register(vi_pipe, 0x362a, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x362b, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x362c, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x362d, 0x09); + ret += os04a10_slave_write_register(vi_pipe, 0x362e, 0x1a); + ret += os04a10_slave_write_register(vi_pipe, 0x362f, 0x34); + ret += os04a10_slave_write_register(vi_pipe, 0x3630, 0x67); + ret += os04a10_slave_write_register(vi_pipe, 0x3631, 0x7f); + ret += os04a10_slave_write_register(vi_pipe, 0x3638, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3643, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3644, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3645, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3646, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3647, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3648, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3649, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x364a, 0x04); + ret += os04a10_slave_write_register(vi_pipe, 0x364c, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x364d, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x364e, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x364f, 0x0e); + ret += os04a10_slave_write_register(vi_pipe, 0x3650, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x3651, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x365a, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x365b, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x365c, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x365d, 0x00); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x3661, 0x07); + ret += os04a10_slave_write_register(vi_pipe, 0x3662, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3663, 0x20); + ret += os04a10_slave_write_register(vi_pipe, 0x3665, 0x12); + ret += os04a10_slave_write_register(vi_pipe, 0x3667, 0xd4); + ret += os04a10_slave_write_register(vi_pipe, 0x3668, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x366c, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x366d, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x366e, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x366f, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3671, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x3673, 0x2a); + ret += os04a10_slave_write_register(vi_pipe, 0x3681, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x3700, 0x2d); + ret += os04a10_slave_write_register(vi_pipe, 0x3701, 0x22); + ret += os04a10_slave_write_register(vi_pipe, 0x3702, 0x25); + ret += os04a10_slave_write_register(vi_pipe, 0x3703, 0x28); + ret += os04a10_slave_write_register(vi_pipe, 0x3705, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3706, 0xf0); + ret += os04a10_slave_write_register(vi_pipe, 0x3707, 0x0a); + ret += os04a10_slave_write_register(vi_pipe, 0x3708, 0x36); + ret += os04a10_slave_write_register(vi_pipe, 0x3709, 0x57); + ret += os04a10_slave_write_register(vi_pipe, 0x370a, 0x03); + ret += os04a10_slave_write_register(vi_pipe, 0x370b, 0x15); + ret += os04a10_slave_write_register(vi_pipe, 0x3714, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3719, 0x24); + ret += os04a10_slave_write_register(vi_pipe, 0x371b, 0x1f); + ret += os04a10_slave_write_register(vi_pipe, 0x371c, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x371d, 0x08); + ret += os04a10_slave_write_register(vi_pipe, 0x373f, 0x63); + ret += os04a10_slave_write_register(vi_pipe, 0x3740, 0x63); + ret += os04a10_slave_write_register(vi_pipe, 0x3741, 0x63); + ret += os04a10_slave_write_register(vi_pipe, 0x3742, 0x63); + ret += os04a10_slave_write_register(vi_pipe, 0x3743, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3756, 0xe7); + ret += os04a10_slave_write_register(vi_pipe, 0x3757, 0xe7); + ret += os04a10_slave_write_register(vi_pipe, 0x3762, 0x1c); + ret += os04a10_slave_write_register(vi_pipe, 0x376c, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3776, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x3777, 0x22); + ret += os04a10_slave_write_register(vi_pipe, 0x3779, 0x60); + ret += os04a10_slave_write_register(vi_pipe, 0x377c, 0x48); + ret += os04a10_slave_write_register(vi_pipe, 0x3784, 0x06); + ret += os04a10_slave_write_register(vi_pipe, 0x3785, 0x0a); + ret += os04a10_slave_write_register(vi_pipe, 0x3790, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x3793, 0x04); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x3794, 0x07); + ret += os04a10_slave_write_register(vi_pipe, 0x3796, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3797, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x379c, 0x4d); + ret += os04a10_slave_write_register(vi_pipe, 0x37a1, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x37bb, 0x88); + ret += os04a10_slave_write_register(vi_pipe, 0x37be, 0x48); + ret += os04a10_slave_write_register(vi_pipe, 0x37bf, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x37c0, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x37c4, 0x72); + ret += os04a10_slave_write_register(vi_pipe, 0x37c5, 0x72); + ret += os04a10_slave_write_register(vi_pipe, 0x37c6, 0x72); + ret += os04a10_slave_write_register(vi_pipe, 0x37ca, 0x21); + ret += os04a10_slave_write_register(vi_pipe, 0x37cc, 0x15); + ret += os04a10_slave_write_register(vi_pipe, 0x37cd, 0x90); + ret += os04a10_slave_write_register(vi_pipe, 0x37cf, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x37d0, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x37d1, 0xf0); + ret += os04a10_slave_write_register(vi_pipe, 0x37d2, 0x03); + ret += os04a10_slave_write_register(vi_pipe, 0x37d3, 0x15); + ret += os04a10_slave_write_register(vi_pipe, 0x37d4, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x37d5, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x37d6, 0x03); + ret += os04a10_slave_write_register(vi_pipe, 0x37d7, 0x15); + ret += os04a10_slave_write_register(vi_pipe, 0x37d8, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x37dc, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x37dd, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x37da, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x37db, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3800, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3801, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3802, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3803, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3804, 0x0a); + ret += os04a10_slave_write_register(vi_pipe, 0x3805, 0x8f); + ret += os04a10_slave_write_register(vi_pipe, 0x3806, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x3807, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x3808, 0x0a); + ret += os04a10_slave_write_register(vi_pipe, 0x3809, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x380a, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x380b, 0xf0); + ret += os04a10_slave_write_register(vi_pipe, 0x380c, 0x05); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x380d, 0xc4); + ret += os04a10_slave_write_register(vi_pipe, 0x380e, 0x06); + ret += os04a10_slave_write_register(vi_pipe, 0x380f, 0x58); + ret += os04a10_slave_write_register(vi_pipe, 0x3811, 0x09); + ret += os04a10_slave_write_register(vi_pipe, 0x3813, 0x09); + ret += os04a10_slave_write_register(vi_pipe, 0x3814, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3815, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3816, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x3817, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x381c, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3820, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x3821, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3822, 0x14); + ret += os04a10_slave_write_register(vi_pipe, 0x3823, 0x50); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3824, 0x00); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3825, 0x08); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3826, 0x06); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3827, 0x40); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3833, 0x40); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x383e, 0x01); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x384c, 0x05); + ret += os04a10_slave_write_register(vi_pipe, 0x384d, 0xc4); + ret += os04a10_slave_write_register(vi_pipe, 0x3858, 0x3c); + ret += os04a10_slave_write_register(vi_pipe, 0x3865, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x3866, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3867, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3868, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x3881, 0x01); // slave + ret += os04a10_slave_write_register(vi_pipe, 0x3900, 0x13); + ret += os04a10_slave_write_register(vi_pipe, 0x3940, 0x13); + ret += os04a10_slave_write_register(vi_pipe, 0x3980, 0x13); + ret += os04a10_slave_write_register(vi_pipe, 0x3c01, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x3c05, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3c0f, 0x1c); + ret += os04a10_slave_write_register(vi_pipe, 0x3c12, 0x0d); + ret += os04a10_slave_write_register(vi_pipe, 0x3c19, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3c21, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x3c3a, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x3c3b, 0x18); + ret += os04a10_slave_write_register(vi_pipe, 0x3c3d, 0xc6); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part6(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x3c55, 0xcb); + ret += os04a10_slave_write_register(vi_pipe, 0x3c5a, 0xe5); + ret += os04a10_slave_write_register(vi_pipe, 0x3c5d, 0xcf); + ret += os04a10_slave_write_register(vi_pipe, 0x3c5e, 0xcf); + ret += os04a10_slave_write_register(vi_pipe, 0x3d8c, 0x70); + ret += os04a10_slave_write_register(vi_pipe, 0x3d8d, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x4000, 0xf9); + ret += os04a10_slave_write_register(vi_pipe, 0x4001, 0x2f); + ret += os04a10_slave_write_register(vi_pipe, 0x4004, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x4005, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4008, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x4009, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x400a, 0x03); + ret += os04a10_slave_write_register(vi_pipe, 0x400b, 0x27); + ret += os04a10_slave_write_register(vi_pipe, 0x400e, 0x40); + ret += os04a10_slave_write_register(vi_pipe, 0x402e, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x402f, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4030, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4031, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x4032, 0x9f); + ret += os04a10_slave_write_register(vi_pipe, 0x4033, 0x80); + ret += os04a10_slave_write_register(vi_pipe, 0x4050, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4051, 0x07); + ret += os04a10_slave_write_register(vi_pipe, 0x4011, 0xbb); + ret += os04a10_slave_write_register(vi_pipe, 0x410f, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x4288, 0xcf); + ret += os04a10_slave_write_register(vi_pipe, 0x4289, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x428a, 0x46); + ret += os04a10_slave_write_register(vi_pipe, 0x430b, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x430c, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x430d, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x430e, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4314, 0x04); + ret += os04a10_slave_write_register(vi_pipe, 0x4500, 0x18); + ret += os04a10_slave_write_register(vi_pipe, 0x4501, 0x18); + ret += os04a10_slave_write_register(vi_pipe, 0x4503, 0x10); + ret += os04a10_slave_write_register(vi_pipe, 0x4504, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4506, 0x32); + ret += os04a10_slave_write_register(vi_pipe, 0x4507, 0x02); + ret += os04a10_slave_write_register(vi_pipe, 0x4601, 0x30); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part7(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x4603, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x460a, 0x50); + ret += os04a10_slave_write_register(vi_pipe, 0x460c, 0x60); + ret += os04a10_slave_write_register(vi_pipe, 0x4640, 0x62); + ret += os04a10_slave_write_register(vi_pipe, 0x4646, 0xaa); + ret += os04a10_slave_write_register(vi_pipe, 0x4647, 0x55); + ret += os04a10_slave_write_register(vi_pipe, 0x4648, 0x99); + ret += os04a10_slave_write_register(vi_pipe, 0x4649, 0x66); + ret += os04a10_slave_write_register(vi_pipe, 0x464d, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4654, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x4655, 0x22); + ret += os04a10_slave_write_register(vi_pipe, 0x4800, 0x44); + ret += os04a10_slave_write_register(vi_pipe, 0x480e, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x4810, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x4811, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x4813, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x481f, 0x30); + ret += os04a10_slave_write_register(vi_pipe, 0x4837, 0x14); + ret += os04a10_slave_write_register(vi_pipe, 0x484b, 0x27); + ret += os04a10_slave_write_register(vi_pipe, 0x4d00, 0x4d); + ret += os04a10_slave_write_register(vi_pipe, 0x4d01, 0x9d); + ret += os04a10_slave_write_register(vi_pipe, 0x4d02, 0xb9); + ret += os04a10_slave_write_register(vi_pipe, 0x4d03, 0x2e); + ret += os04a10_slave_write_register(vi_pipe, 0x4d04, 0x4a); + ret += os04a10_slave_write_register(vi_pipe, 0x4d05, 0x3d); + ret += os04a10_slave_write_register(vi_pipe, 0x4d09, 0x4f); + ret += os04a10_slave_write_register(vi_pipe, 0x5000, 0x17); + ret += os04a10_slave_write_register(vi_pipe, 0x5001, 0x0d); + ret += os04a10_slave_write_register(vi_pipe, 0x5080, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x50c0, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x5100, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x5200, 0x00); + + return ret; +} + +static td_s32 os04a10_slave_linear_4m30_12bit_init_part8(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os04a10_slave_write_register(vi_pipe, 0x5201, 0x00); + ret += os04a10_slave_write_register(vi_pipe, 0x5202, 0x03); + ret += os04a10_slave_write_register(vi_pipe, 0x5203, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x5780, 0x53); + ret += os04a10_slave_write_register(vi_pipe, 0x5782, 0x60); + ret += os04a10_slave_write_register(vi_pipe, 0x5783, 0xf0); + ret += os04a10_slave_write_register(vi_pipe, 0x5786, 0x01); + ret += os04a10_slave_write_register(vi_pipe, 0x5788, 0x60); + ret += os04a10_slave_write_register(vi_pipe, 0x5789, 0xf0); + ret += os04a10_slave_write_register(vi_pipe, 0x5792, 0x11); + ret += os04a10_slave_write_register(vi_pipe, 0x5793, 0x33); + ret += os04a10_slave_write_register(vi_pipe, 0x5857, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x5858, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x5859, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x58d7, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x58d8, 0xff); + ret += os04a10_slave_write_register(vi_pipe, 0x58d9, 0xff); + + os04a10_slave_default_reg_init(vi_pipe); + + delay_ms(0x5); + ret += os04a10_slave_write_register(vi_pipe, 0x0100, 0x01); + return ret; +} + +static void os04a10_slave_linear_4m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os04a10_slave_linear_4m30_12bit_init_part1(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part2(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part3(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part4(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part5(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part6(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part7(vi_pipe); + ret += os04a10_slave_linear_4m30_12bit_init_part8(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("os04a10 slave write register failed!\n"); + return; + } + + printf("==============================================================================\n"); + printf("vi_pipe:%d,== os04a10 slave 24Mclk 4M30fps(MIPI) 12bit linear init success! ==\n", vi_pipe); + printf("==============================================================================\n"); + return; +} diff --git a/libraries/sensor/hi3519dv500/omnivision_os08a20/Makefile b/libraries/sensor/hi3519dv500/omnivision_os08a20/Makefile new file mode 100644 index 0000000..1b59635 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os08a20/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_os08a20 + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.c b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.c new file mode 100644 index 0000000..5dd033c --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.c @@ -0,0 +1,1502 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" +#include "os08a20_cmos_ex.h" +#include "os08a20_cmos.h" + +#define OS08A20_ID 8 +#define SENSOR_OS08A20_WIDTH 3840 +#define SENSOR_OS08A20_HEIGHT 2160 + +#define higher_4bits(x) (((x) & 0xf0000) >> 16) +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define os08a20_sensor_set_ctx(pipe, ctx) ((g_os08a20_sns_state[pipe]) = (ctx)) +#define os08a20_sensor_reset_ctx(pipe) (g_os08a20_sns_state[pipe] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; + +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_again[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_isp_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +ot_isp_sns_commbus g_os08a20_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0}, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1} +}; + +ot_isp_sns_state *g_os08a20_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; + +ot_isp_sns_commbus *os08a20_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_os08a20_bus_info[vi_pipe]; +} + +ot_isp_sns_state *os08a20_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_os08a20_sns_state[vi_pipe]; +} + +td_void os08a20_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en) +{ + blc_clamp_info[vi_pipe] = clamp_en; +} + +const os08a20_video_mode_tbl g_os08a20_mode_tbl[OS08A20_MODE_BUTT] = { + {OS08A20_VMAX_8M_30FPS_12BIT_LINEAR, OS08A20_FULL_LINES_MAX, 30, 1.06, + 3840, 2180, 0, OT_WDR_MODE_NONE, "OS08A20_8M_30FPS_12BIT_LINEAR_MODE"}, + {OS08A20_VMAX_8M_30FPS_10BIT_2TO1_WDR, OS08A20_FULL_LINES_MAX_2TO1_WDR, 30, 5.0, + 3840, 2180, 0, OT_WDR_MODE_2To1_LINE, "OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE"}, +}; + +/**************************************************************************** + * local variables * + ****************************************************************************/ +/* Os08a20 Register Address */ +#define OS08A20_EXPO_H_ADDR 0x3501 +#define OS08A20_EXPO_L_ADDR 0x3502 +#define OS08A20_AGAIN_H_ADDR 0x3508 +#define OS08A20_AGAIN_L_ADDR 0x3509 +#define OS08A20_DGAIN_H_ADDR 0x350a +#define OS08A20_DGAIN_L_ADDR 0x350b +#define OS08A20_SHORT_EXPO_H_ADDR 0x3511 +#define OS08A20_SHORT_EXPO_L_ADDR 0x3512 +#define OS08A20_SHORT_AGAIN_H_ADDR 0x350c +#define OS08A20_SHORT_AGAIN_L_ADDR 0x350d +#define OS08A20_SHORT_DGAIN_H_ADDR 0x350e +#define OS08A20_SHORT_DGAIN_L_ADDR 0x350f +#define OS08A20_VMAX_H_ADDR 0x380e +#define OS08A20_VMAX_L_ADDR 0x380f +#define OS08A20_MARGIN 4 + + +#define os08a20_err_mode_print(sns_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = OS08A20_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->again_accu.accuracy = 1; + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->dgain_accu.accuracy = 0.0078125; /* accuracy: 0.0078125 */ + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 128 << ae_sns_dft->isp_dgain_shift; /* max 128 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + (td_void)memcpy_s(&ae_sns_dft->piris_attr, sizeof(ot_isp_piris_attr), &g_piris, sizeof(ot_isp_piris_attr)); + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_4; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_5_6; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 15872; /* max 15872 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 128; /* max 128 */ + ae_sns_dft->min_dgain = 128; /* min 128 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x40; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 76151; /* init 76151 */ + ae_sns_dft->init_int_time = g_init_int_time[vi_pipe]; + ae_sns_dft->init_again = g_init_again[vi_pipe]; + ae_sns_dft->init_dgain = g_init_dgain[vi_pipe]; + ae_sns_dft->init_isp_dgain = g_init_isp_dgain[vi_pipe]; + + ae_sns_dft->max_int_time = sns_state->fl_std - 10; /* sub 10 */ + ae_sns_dft->min_int_time = 8; /* min int 8 */ + ae_sns_dft->max_int_time_target = 65535; /* max int 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + + return; +} + +static td_void cmos_get_ae_2to1_line_wdr_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_int_time = sns_state->fl_std - 10; /* sub 10 */ + ae_sns_dft->min_int_time = 2; /* min_int_time 2 */ + ae_sns_dft->int_time_accu.offset = -0.115; /* -0.115 line for stagger */ + + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->max_again = 15872; /* max 15872 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 2047; /* max 2047 */ + ae_sns_dft->min_dgain = 128; /* min 128 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + ae_sns_dft->max_isp_dgain_target = 4 << ae_sns_dft->isp_dgain_shift; /* max 4 << shift */ + ae_sns_dft->diff_gain_support = TD_TRUE; + + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 52000; /* init 52000 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + ae_sns_dft->ae_compensation = 56; /* ae_compensation 56 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + } else { + ae_sns_dft->ae_compensation = 32; /* ae_compensation 32 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_LOWLIGHT_PRIOR; + ae_sns_dft->man_ratio_enable = TD_TRUE; + ae_sns_dft->arr_ratio[0] = 0x400; + ae_sns_dft->arr_ratio[1] = 0x40; + ae_sns_dft->arr_ratio[2] = 0x40; /* array index 2 */ + } + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + + case OT_WDR_MODE_2To1_LINE: + cmos_get_ae_2to1_line_wdr_default(vi_pipe, ae_sns_dft, sns_state); + break; + + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(vmax); + } else { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].data = high_8bits(vmax); + } + + return; +} + +/* the function of sensor set fps */ +static td_bool cmos_2to1_vmax_limit(td_u32 *vmax, td_u32 full_line, td_u32 step, td_bool fps_up) +{ + if (fps_up) { + if ((*vmax) + step < full_line) { + (*vmax) = (full_line - step); + return TD_FALSE; + } + } else { + if ((*vmax) > full_line + step) { + (*vmax) = (full_line + step); + return TD_FALSE; + } + } + return TD_TRUE; +} + +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, vmax; + td_float max_fps, min_fps; + td_bool achieve_fps_ok; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_os08a20_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_os08a20_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_os08a20_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_os08a20_mode_tbl[sns_state->img_mode].min_fps; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + achieve_fps_ok = TD_TRUE; + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + achieve_fps_ok = cmos_2to1_vmax_limit(&vmax, sns_state->fl[0], 154, fps > ae_sns_dft->fps); /* step 154 */ + } + vmax = (vmax > lines_max) ? lines_max : vmax; + + cmos_config_vmax(sns_state, vmax); + + sns_state->fl_std = vmax; + ae_sns_dft->lines_per500ms = lines * 15; /* *15 */ + g_lines_per500ms[vi_pipe] = ae_sns_dft->lines_per500ms; + + ae_sns_dft->fps = (achieve_fps_ok == TD_TRUE) ? fps : (lines * max_fps / vmax); + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->max_int_time = sns_state->fl_std - 10; /* sub 10 */ + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines_max; + td_u32 vmax; + td_bool achieve_fps_ok; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_os08a20_mode_tbl[sns_state->img_mode].max_ver_lines; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + vmax = full_lines; + achieve_fps_ok = + cmos_2to1_vmax_limit(&vmax, sns_state->fl[0], 154, full_lines < sns_state->fl[0]); /* step 154 */ + } else { + vmax = full_lines; + } + + vmax = (vmax > lines_max) ? lines_max : vmax; + sns_state->fl[0] = vmax; + + ot_unused(achieve_fps_ok); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(sns_state->fl[0]); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(sns_state->fl[0]); + break; + case OT_WDR_MODE_2To1_LINE: + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].data = low_8bits(sns_state->fl[0]); + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].data = high_8bits(sns_state->fl[0]); + break; + default: + break; + } + + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->max_int_time = sns_state->fl[0] - 10; /* max_int_time: Flstd - 10 */ + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 value; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + value = int_time; + + if (g_quick_start_en[vi_pipe] == TD_TRUE) { + os08a20_write_register(vi_pipe, OS08A20_EXPO_L_ADDR, low_8bits(value)); + os08a20_write_register(vi_pipe, OS08A20_EXPO_H_ADDR, high_8bits(value)); + } else { + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = low_8bits(value); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = high_8bits(value); + } + + return; +} + +static td_void cmos_inttime_update_2to1_line(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + static td_bool is_first[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1}; + + static td_u32 short_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + static td_u32 long_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (is_first[vi_pipe]) { /* short exposure */ + sns_state->wdr_int_time[0] = int_time; + short_int_time[vi_pipe] = int_time; + is_first[vi_pipe] = TD_FALSE; + } else { /* long exposure */ + sns_state->wdr_int_time[1] = int_time; + long_int_time[vi_pipe] = int_time; + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = low_8bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = high_8bits(long_int_time[vi_pipe]); + + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].data = low_8bits(short_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].data = high_8bits(short_int_time[vi_pipe]); + is_first[vi_pipe] = TD_TRUE; + } + + return; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + cmos_inttime_update_2to1_line(vi_pipe, int_time); + } else { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} + +#define GAIN_NODE_NUM 64 +static td_u32 g_gain_table[GAIN_NODE_NUM] = { + 1024, 1088, 1152, 1216, 1280, 1344, 1408, 1472, 1536, 1600, 1664, 1728, 1792, 1856, 1920, 1984, 2048, 2176, + 2304, 2432, 2560, 2688, 2816, 2944, 3072, 3200, 3328, 3456, 3584, 3712, 3840, 3968, 4096, 4352, 4608, 4864, + 5120, 5376, 5632, 5888, 6144, 6400, 6656, 6912, 7168, 7424, 7680, 7936, 8192, 8704, 9216, 9728, 10240, 10752, + 11264, 11776, 12288, 12800, 13312, 13824, 14336, 14848, 15360, 15872 +}; + +static td_void cmos_again_calc_table(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db) +{ + int i; + + sns_check_pointer_void_return(again_lin); + sns_check_pointer_void_return(again_db); + + ot_unused(vi_pipe); + + if (*again_lin >= g_gain_table[GAIN_NODE_NUM - 1]) { + *again_lin = g_gain_table[GAIN_NODE_NUM - 1]; + *again_db = GAIN_NODE_NUM - 1; + return; + } + + for (i = 1; i < GAIN_NODE_NUM; i++) { + if (*again_lin < g_gain_table[i]) { + *again_lin = g_gain_table[i - 1]; + *again_db = i - 1; + break; + } + } + return; +} + +static td_void cmos_gains_regs_set(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state, td_u32 again_reg, td_u32 dgain_reg) +{ + static td_bool first_gain[OT_ISP_MAX_PIPE_NUM] = { [0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1 }; + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + if (g_quick_start_en[vi_pipe] == TD_TRUE) { + os08a20_write_register(vi_pipe, OS08A20_AGAIN_L_ADDR, (again_reg & 0xff)); + os08a20_write_register(vi_pipe, OS08A20_AGAIN_H_ADDR, ((again_reg & 0x3f00) >> 8)); /* shift 8 */ + os08a20_write_register(vi_pipe, OS08A20_DGAIN_L_ADDR, (dgain_reg & 0xff)); + os08a20_write_register(vi_pipe, OS08A20_DGAIN_H_ADDR, ((dgain_reg & 0x3f00) >> 8)); /* shift 8 */ + } else { + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].data = (again_reg & 0xff); + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].data = ((again_reg & 0x3f00) >> 8); /* shift 8 */ + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].data = (dgain_reg & 0xff); + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].data = ((dgain_reg & 0x3f00) >> 8); /* shift 8 */ + } + } else if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + if (first_gain[vi_pipe] == TD_TRUE) { /* long frame */ + sns_state->regs_info[0].i2c_data[WDR_AGAIN_L_IDX].data = (again_reg & 0xff); + sns_state->regs_info[0].i2c_data[WDR_AGAIN_H_IDX].data = ((again_reg & 0x3f00) >> 8); /* shift 8 */ + sns_state->regs_info[0].i2c_data[WDR_DGAIN_L_IDX].data = (dgain_reg & 0xff); + sns_state->regs_info[0].i2c_data[WDR_DGAIN_H_IDX].data = ((dgain_reg & 0x3f00) >> 8); /* shift 8 */ + + first_gain[vi_pipe] = TD_FALSE; + } else { /* short frame */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].data = (again_reg & 0xff); + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].data = ((again_reg & 0x3f00) >> 8); /* shift 8 */ + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].data = (dgain_reg & 0xff); + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].data = ((dgain_reg & 0x3f00) >> 8); /* shift 8 */ + + first_gain[vi_pipe] = TD_TRUE; + } + } + + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 again_reg, dgain_reg; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + again_reg = g_gain_table[again]; + again_reg = clip3((again_reg >> 3), 0x80, 0x7C0); /* shift 3 */ + + if (dgain < 0x80) { + dgain_reg = 0x400; + } else if (dgain < 0x800) { + dgain_reg = dgain * 0x8; + } else { + dgain_reg = 0x3FFF; + } + + cmos_gains_regs_set(vi_pipe, sns_state, again_reg, dgain_reg); + + return; +} + +static td_void cmos_clip_ratio_range(td_u32 *a_exp_ratio, const ot_isp_ae_int_time_range *int_time, + td_u32 wdr_frame_num) +{ + td_u32 i, ratio_min, ratio_max; + for (i = 0; i < wdr_frame_num - 1; ++i) { + ratio_max = int_time->int_time_max[i + 1] * 0x40 / int_time->int_time_min[i]; + ratio_min = int_time->int_time_min[i + 1] * 0x40 / int_time->int_time_max[i]; + a_exp_ratio[i] = MIN2(MAX2(a_exp_ratio[i], ratio_min), ratio_max); + a_exp_ratio[i] = MIN2(MAX2(a_exp_ratio[i], 0x40), 0x4000); + } +} + +static td_void cmos_step_limit(ot_isp_ae_int_time_range *int_time, + const time_step *step, td_u32 full_lines, td_u32 wdr_frame_num) +{ + td_u32 i; + td_u32 max_int_time = 0; + for (i = 0; i < wdr_frame_num; ++i) { + if (int_time->pre_int_time[i] == 0) { + return ; + } + } + for (i = 0; i < wdr_frame_num; ++i) { + if (step->inc[i] > 0) { + int_time->int_time_max[i] = MIN2(int_time->pre_int_time[i] + step->inc[i], int_time->int_time_max[i]); + } + if (step->dec[i] > 0) { + if (int_time->pre_int_time[i] > step->dec[i]) { + int_time->int_time_min[i] = MAX2(int_time->pre_int_time[i] - step->dec[i], int_time->int_time_min[i]); + } else { + int_time->int_time_min[i] = MAX2(int_time->int_time_min[i], 0); + } + } + if (int_time->int_time_min[i] > int_time->int_time_max[i]) { + int_time->int_time_max[i] = int_time->int_time_min[i]; + } + /* make sure LEF > SEF1 and SEF1 > SEF2 */ + if (i > 0) { + int_time->int_time_max[i] = MAX2(int_time->int_time_max[i], int_time->int_time_max[i - 1]); + int_time->int_time_min[i] = MAX2(int_time->int_time_min[i], int_time->int_time_min[i - 1]); + } + } + /* make sure max_int_time < full_lines */ + for (i = 0; i < wdr_frame_num; ++i) { + max_int_time += int_time->int_time_max[i]; + } + if (max_int_time > full_lines) { + max_int_time = max_int_time - full_lines; + for (i = 0; i < wdr_frame_num; ++i) { + if (int_time->int_time_max[i] - int_time->int_time_min[i] > max_int_time) { + int_time->int_time_max[i] = int_time->int_time_max[i] - max_int_time; + return; + } + } + } + return; +} +static td_void cmos_set_2to1_long_frame_range(ot_isp_ae_int_time_range *int_time, + td_s32 time_min, td_s32 time_max, td_s32 step) +{ + int_time->int_time_max[0] = MAX2((td_s32)int_time->pre_int_time[0] - step, time_min); /* index 0 */ + int_time->int_time_min[0] = MAX2((td_s32)int_time->pre_int_time[0] - step, time_min); /* index 0 */ + int_time->int_time_max[1] = time_max; /* index 2 */ + int_time->int_time_min[1] = time_min; /* index 2 */ +} + + +static td_void cmos_get_inttime_max_2to1_line(ot_vi_pipe vi_pipe, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + td_u32 short_max0, i, short_max, short_time_min_limit; + ot_isp_sns_state *sns_state = TD_NULL; + time_step step = {{0}}; + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + static td_u32 pre_ratio[OT_ISP_MAX_PIPE_NUM] = {[0 ... OT_ISP_MAX_PIPE_NUM - 1] = 0X40}; + short_time_min_limit = 2; /* short_time_min_limit 2 */ + + for (i = 0; i < 2; ++i) { /* frame number is 2 */ + step.inc[i] = (sns_state->fl[1] - g_os08a20_mode_tbl[OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE].height) >> 1; + step.dec[i] = (sns_state->fl[1] - g_os08a20_mode_tbl[OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE].height) >> 1; + } + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + short_max0 = sns_state->fl[1] - OS08A20_MARGIN - step.dec[0] - sns_state->wdr_int_time[0]; + short_max = sns_state->fl[0] - OS08A20_MARGIN - step.dec[0]; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + int_time->int_time_max[0] = short_time_min_limit; + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_max[1] = short_max; + int_time->int_time_min[1] = short_time_min_limit; + cmos_set_2to1_long_frame_range(int_time, short_time_min_limit, short_max, 90); /* step 90 */ + } else { + short_max0 = ((sns_state->fl[1] - OS08A20_MARGIN - step.dec[0] - sns_state->wdr_int_time[0]) * 0x40) / + div_0_to_1(ratio[0]); + short_max = ((sns_state->fl[0] - OS08A20_MARGIN - step.inc[0]) * 0x40) / (ratio[0] + 0x40); + short_max = (short_max0 < short_max) ? short_max0 : short_max; + short_max = (short_max == 0) ? 1 : short_max; + + *lf_max_int_time = sns_state->fl[0] - OS08A20_MARGIN - step.inc[0]; + + if (short_max >= short_time_min_limit) { + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * ratio[0]) >> 6; /* shift 6 */ + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_min[1] = (int_time->int_time_min[0] * ratio[0]) >> 6; /* shift 6 */ + } else { + short_max = short_time_min_limit; + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * 0xFFF) >> 6; /* shift 6 */ + int_time->int_time_min[0] = int_time->int_time_max[0]; + int_time->int_time_min[1] = int_time->int_time_max[1]; + } + + if (ratio[0] != pre_ratio[vi_pipe]) { + cmos_step_limit(int_time, &step, sns_state->fl[1], 2); /* frame number is 2 */ + cmos_clip_ratio_range(ratio, (const ot_isp_ae_int_time_range *)int_time, 2); /* frame number is 2 */ + } + } + pre_ratio[vi_pipe] = ratio[0]; + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + ot_unused(man_ratio_enable); + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_2To1_LINE: + cmos_get_inttime_max_2to1_line(vi_pipe, ratio, int_time, lf_max_int_time); + break; + default: + break; + } + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + + return; +} + +static td_void cmos_ae_quick_start_status_set(ot_vi_pipe vi_pipe, td_bool quick_start_en) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + g_quick_start_en[vi_pipe] = quick_start_en; + sns_state->sync_init = TD_FALSE; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_again_calc_table = cmos_again_calc_table; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + exp_func->pfn_cmos_ae_quick_start_status_set = cmos_ae_quick_start_status_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 5000 +#define CALIBRATE_STATIC_WB_R_GAIN 492 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 443 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 16 +#define CALIBRATE_AWB_P2 240 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 188580 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-139106) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + + case OT_WDR_MODE_2To1_FRAME: + case OT_WDR_MODE_2To1_LINE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm_wdr, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table_wdr, sizeof(ot_isp_awb_agc_table)); + + break; + + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case OS08A20_8M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + + case OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 10; /* 10bit */ + isp_def->sns_mode.dng_raw_format.white_level = 1023; /* max 1023 */ + break; + + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 0; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static void cmos_get_isp_wdr_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc_wdr; + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic_wdr; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen_wdr; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc_wdr; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma_wdr; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr_wdr; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge_wdr; +#endif + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color_wdr; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac_wdr; + isp_def->key.bit1_bshp= 1; + isp_def->bshp = &g_cmos_bayershp_wdr; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci_wdr; + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze_wdr; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 0; +#endif + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; + + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + case OT_WDR_MODE_2To1_LINE: + cmos_get_isp_wdr_default(isp_def); + break; + default: + cmos_get_isp_linear_default(isp_def); + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + + isp_def->sns_mode.sns_id = OS08A20_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + const ot_isp_cmos_black_level *cmos_blc_def = TD_NULL; + + sns_check_pointer_return(black_level); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + cmos_blc_def = &g_cmos_blc; + } else { + cmos_blc_def = &g_cmos_blc_wdr; + } + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), cmos_blc_def, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x400; + } + } else { /* black level of DOL mode */ + for (i = 0; i < OT_ISP_WDR_MAX_FRAME_NUM; i++) { + black_level->auto_attr.black_level[i][0] = 0x400; + black_level->auto_attr.black_level[i][1] = 0x400; + black_level->auto_attr.black_level[i][2] = 0x400; /* index 2 */ + black_level->auto_attr.black_level[i][3] = 0x400; /* index 3 */ + } + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == OS08A20_8M_30FPS_12BIT_LINEAR_MODE) { + full_lines_5fps = (OS08A20_VMAX_8M_30FPS_12BIT_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + if (enable) { /* setup for ISP pixel calibration mode */ + os08a20_write_register(vi_pipe, OS08A20_AGAIN_L_ADDR, 0x80); + os08a20_write_register(vi_pipe, OS08A20_AGAIN_H_ADDR, 0x00); + + os08a20_write_register(vi_pipe, OS08A20_DGAIN_L_ADDR, 0x00); + os08a20_write_register(vi_pipe, OS08A20_DGAIN_H_ADDR, 0x04); + + os08a20_write_register(vi_pipe, OS08A20_VMAX_L_ADDR, low_8bits(full_lines_5fps)); + os08a20_write_register(vi_pipe, OS08A20_VMAX_H_ADDR, high_8bits(full_lines_5fps)); + + os08a20_write_register(vi_pipe, OS08A20_EXPO_L_ADDR, low_8bits(full_lines_5fps - 10)); + os08a20_write_register(vi_pipe, OS08A20_EXPO_H_ADDR, high_8bits(full_lines_5fps - 10)); + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > OS08A20_FULL_LINES_MAX) ? OS08A20_FULL_LINES_MAX : sns_state->fl_std; + os08a20_write_register(vi_pipe, OS08A20_VMAX_L_ADDR, low_8bits(sns_state->fl_std)); + os08a20_write_register(vi_pipe, OS08A20_VMAX_H_ADDR, high_8bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + case OT_WDR_MODE_2To1_LINE: + sns_state->wdr_mode = OT_WDR_MODE_2To1_LINE; + printf("2to1 line WDR 4k mode(60fps->30fps)\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_os08a20_bus_info[vi_pipe].i2c_dev; + if (g_quick_start_en[vi_pipe]) { + sns_state->regs_info[0].cfg2_valid_delay_max = 1; /* delay_max 1 */ + } else { + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + } + sns_state->regs_info[0].reg_num = REG_MAX_IDX; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].reg_num = WDR_REG_MAX_IDX; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + } + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = OS08A20_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = OS08A20_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = OS08A20_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].reg_addr = OS08A20_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].reg_addr = OS08A20_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].reg_addr = OS08A20_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].reg_addr = OS08A20_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].reg_addr = OS08A20_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].reg_addr = OS08A20_DGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].reg_addr = OS08A20_VMAX_L_ADDR; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].reg_addr = OS08A20_VMAX_H_ADDR; + + return; +} + +static td_void cmos_2to1_line_wdr_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].reg_addr = OS08A20_SHORT_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_H_IDX].reg_addr = OS08A20_SHORT_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].reg_addr = OS08A20_SHORT_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].reg_addr = OS08A20_SHORT_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].reg_addr = OS08A20_SHORT_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].reg_addr = OS08A20_SHORT_DGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].reg_addr = OS08A20_VMAX_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].reg_addr = OS08A20_VMAX_H_ADDR; + + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + if (sns_state->fl[0] > sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 1; + } else if (sns_state->fl[0] < sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 2; /* delay 2 */ + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 2; /* delay 2 */ + } else { + } + } else { + if (sns_state->fl[0] > sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 0; + } else if (sns_state->fl[0] < sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 1; /* delay 1 */ + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 1; /* delay 1 */ + } else { + } + } + + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + /* DOL 2t1 Mode Regs */ + cmos_2to1_line_wdr_sns_reg_info_init(vi_pipe, sns_state); + } + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sns_image_mode) { + case OS08A20_8M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = OS08A20_VMAX_8M_30FPS_12BIT_LINEAR; + break; + case OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE: + sns_state->fl_std = OS08A20_VMAX_8M_30FPS_10BIT_2TO1_WDR; + break; + default: + sns_state->fl_std = OS08A20_VMAX_8M_30FPS_12BIT_LINEAR; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < OS08A20_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_os08a20_mode_tbl[i].max_fps && + sns_image_mode->width <= g_os08a20_mode_tbl[i].width && + sns_image_mode->height <= g_os08a20_mode_tbl[i].height && + sns_state->wdr_mode == g_os08a20_mode_tbl[i].wdr_mode) { + image_mode = (os08a20_res_mode)i; + break; + } + } + + if (i >= OS08A20_MODE_BUTT) { + os08a20_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = OS08A20_8M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = OS08A20_VMAX_8M_30FPS_12BIT_LINEAR; + sns_state->fl[0] = OS08A20_VMAX_8M_30FPS_12BIT_LINEAR; + sns_state->fl[1] = OS08A20_VMAX_8M_30FPS_12BIT_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = os08a20_init; + sensor_exp_func->pfn_cmos_sns_exit = os08a20_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 os08a20_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_os08a20_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + os08a20_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + os08a20_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + os08a20_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = OS08A20_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, OS08A20_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, OS08A20_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, OS08A20_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_init_int_time[vi_pipe] = init_attr->exp_time; + g_init_again[vi_pipe] = init_attr->a_gain; + g_init_dgain[vi_pipe] = init_attr->d_gain; + g_init_isp_dgain[vi_pipe] = init_attr->ispd_gain; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_os08a20_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = os08a20_standby, + .pfn_restart = os08a20_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = os08a20_blc_clamp, + .pfn_write_reg = os08a20_write_register, + .pfn_read_reg = os08a20_read_register, + .pfn_set_bus_info = os08a20_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.h b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.h new file mode 100644 index 0000000..08ba0b2 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos.h @@ -0,0 +1,106 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS08A20_CMOS_H +#define OS08A20_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" +#include "ot_common_video.h" +#include "ot_math.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef clip3 +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif + + +#define OS08A20_I2C_ADDR 0x6c +#define OS08A20_ADDR_BYTE 2 +#define OS08A20_DATA_BYTE 1 +#define os08a20_sensor_get_ctx(pipe, ctx) ((ctx) = os08a20_get_ctx(pipe)) + +#define OS08A20_FULL_LINES_MAX 0xFFFF +#define OS08A20_FULL_LINES_MAX_2TO1_WDR 0x363C +#define OS08A20_INCREASE_LINES 0 /* make real fps less than stand fps because NVR require */ +#define OS08A20_VMAX_8M_30FPS_12BIT_LINEAR (2314 + OS08A20_INCREASE_LINES) +#define OS08A20_VMAX_8M_30FPS_10BIT_2TO1_WDR (2314 + OS08A20_INCREASE_LINES) /* 10bit */ + +typedef enum { + OS08A20_8M_30FPS_12BIT_LINEAR_MODE = 0, + OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE, + OS08A20_MODE_BUTT +} os08a20_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} os08a20_video_mode_tbl; + +typedef enum { + EXPO_L_IDX = 0, + EXPO_H_IDX, + AGAIN_L_IDX, + AGAIN_H_IDX, + DGAIN_L_IDX, + DGAIN_H_IDX, + VMAX_L_IDX, + VMAX_H_IDX, + REG_MAX_IDX +}os08a20_linear_reg_index; + +typedef enum { + WDR_EXPO_L_IDX = 0, + WDR_EXPO_H_IDX, + WDR_AGAIN_L_IDX, + WDR_AGAIN_H_IDX, + WDR_DGAIN_L_IDX, + WDR_DGAIN_H_IDX, + WDR_SHORT_EXPO_L_IDX, + WDR_SHORT_EXPO_H_IDX, + WDR_SHORT_AGAIN_L_IDX, + WDR_SHORT_AGAIN_H_IDX, + WDR_SHORT_DGAIN_L_IDX, + WDR_SHORT_DGAIN_H_IDX, + WDR_VMAX_L_IDX, + WDR_VMAX_H_IDX, + WDR_REG_MAX_IDX +}os08a20_wdr_reg_index; + +typedef struct { + td_u32 dec[OT_ISP_WDR_MAX_FRAME_NUM]; + td_u32 inc[OT_ISP_WDR_MAX_FRAME_NUM]; +} time_step; +ot_isp_sns_state *os08a20_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *os08a20_get_bus_info(ot_vi_pipe vi_pipe); + +td_void os08a20_init(ot_vi_pipe vi_pipe); +td_void os08a20_exit(ot_vi_pipe vi_pipe); +td_void os08a20_standby(ot_vi_pipe vi_pipe); +td_void os08a20_restart(ot_vi_pipe vi_pipe); +td_void os08a20_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp blc_clamp); +td_void os08a20_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en); + +td_s32 os08a20_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 os08a20_read_register(ot_vi_pipe vi_pipe, td_u32 addr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* OS08A20_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos_ex.h b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos_ex.h new file mode 100644 index 0000000..7f40080 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_cmos_ex.h @@ -0,0 +1,4046 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef OS08A20_CMOS_EX_H +#define OS08A20_CMOS_EX_H + +#include "ot_common_awb.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +/* Piris attr */ +static ot_isp_piris_attr g_piris = { + 0, // bStepFNOTableChange + 1, // bZeroIsMax + 94, // u16TotalStep + 62, // u16StepCount + /* Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1 */ + { 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158, + 166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344, + 353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 }, + OT_ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget + OT_ISP_IRIS_F_NO_5_6, // enMinIrisFNOTarget + 1, + 512, + 32 +}; + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 3840, 20}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + }, + }, + { + {3840, 2180}, + }, +}; + +static const ot_isp_cmos_black_level g_cmos_blc_wdr = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 3840, 20}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + }, + }, + { + {3840, 2180}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + { 60, 60, 58, 55, 50, 45, 40, 30, 20, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 5, 5, 5, 5, 5 }, + /* detail_smooth_range */ + { 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 6, 7, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 15, 12, 12, 10, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 15, 15, 12, 10, 8, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 25, 20, 15, 12, 10, 10, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 20, 18, 15, 12, 10, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + {1550, 0.0002945581, 0.0000000000, 0.0000003844, 0.0000000000, 0.0000000000, + 0.0002945339, 0.0000371285, 0.0000004208, -0.0000650507, 0.0133864281, 0, 0, 0, 0, 0} +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr_wdr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{50, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {24, 72, 0}}, + {{32, 64, 0}, {12, 64, 0}}, + {{12, 24, 0}, {8, 54, 0}}, + {{8, 20, 0}, {6, 36, 0}}, + {{6, 12, 0}, {0, 8, 0}}, + {{0, 8, 0}, {0, 6, 0}}, + {{0, 6, 0}, {0, 2, 0}}, + {{0, 2, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + + 1, + {0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, 259, + 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, 467, 477, + 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, 671, 683, 695, + 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, 885, 896, 906, 917, + 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, 1085, 1096, 1107, 1118, 1129, + 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, 1274, 1284, 1295, 1305, 1315, 1325, + 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, 1468, 1480, 1493, 1499, 1505, 1511, 1518, + 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, + 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, + 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, + 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, + 2036, 2042, 2047, 2052, 2058, 2063, 2068, 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, + 2135, 2140, 2145, 2150, 2154, 2159, 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, + 2226, 2231, 2235, 2240, 2244, 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, + 2312, 2317, 2321, 2325, 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, + 2392, 2396, 2400, 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, + 2466, 2470, 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, + 2538, 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, 2665, + 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, 2723, 2727, + 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, 2781, 2784, 2787, + 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, 2837, 2840, 2843, 2846, + 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, 2890, 2893, 2896, 2899, 2902, + 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, 2941, 2944, 2946, 2949, 2952, 2954, + 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, 2988, 2990, 2993, 2995, 2998, 3000, 3002, + 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, + 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, + 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, + 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, + 3177, 3179, 3182, 3184, 3186, 3188, 3190, 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, + 3217, 3219, 3221, 3223, 3225, 3227, 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, + 3256, 3258, 3260, 3262, 3264, 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, + 3293, 3295, 3297, 3299, 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, + 3330, 3332, 3334, 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, + 3366, 3368, 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, + 3401, 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, 3470, + 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, 3506, 3508, + 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, 3544, 3546, 3548, + 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, 3582, 3585, 3587, 3589, + 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, 3620, 3622, 3624, 3626, 3628, + 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, 3657, 3659, 3661, 3663, 3665, 3667, + 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, 3693, 3695, 3697, 3699, 3701, 3704, 3706, + 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, + 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, + 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, + 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, + 3857, 3858, 3860, 3862, 3864, 3866, 3868, 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, + 3892, 3894, 3896, 3898, 3900, 3902, 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, + 3928, 3930, 3932, 3934, 3935, 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, + 3963, 3965, 3967, 3969, 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, + 3998, 4000, 4001, 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, + 4032, 4034, 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, + 4066, 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095 + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + {0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, 89, + 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, 176, 181, + 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, 263, 268, 273, + 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, 351, 356, 361, 366, + 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, 441, 446, 451, 456, 461, + 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, 535, 540, 545, 551, 556, 561, + 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, 633, 639, 645, 650, 656, 662, 667, + 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, 738, 744, 750, 756, 762, 768, 774, 780, + 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, 849, 855, 861, 867, 874, 880, 886, 893, 899, + 905, 912, 918, 925, 931, 937, 944, 950, 957, 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, + 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, + 1152, 1159, 1165, 1172, 1178, 1185, 1191, 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, + 1276, 1283, 1289, 1295, 1302, 1308, 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, + 1398, 1404, 1411, 1417, 1423, 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, + 1517, 1524, 1530, 1536, 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, + 1639, 1645, 1652, 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, + 1761, 1768, 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, + 1883, 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, 2107, + 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, 2206, 2212, + 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, 2297, 2302, 2307, + 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, 2381, 2385, 2390, 2394, + 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, 2458, 2462, 2467, 2471, 2475, + 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, 2531, 2535, 2539, 2543, 2547, 2551, + 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, 2601, 2604, 2608, 2612, 2616, 2619, 2623, + 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, + 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, + 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, + 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, + 2901, 2904, 2908, 2911, 2914, 2918, 2921, 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, + 2964, 2967, 2971, 2974, 2977, 2981, 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, + 3026, 3029, 3032, 3035, 3038, 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, + 3086, 3089, 3092, 3095, 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, + 3144, 3147, 3150, 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, + 3200, 3203, 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, + 3255, 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, 3359, + 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, 3407, 3410, + 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, 3455, 3457, 3460, + 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, 3501, 3504, 3506, 3509, + 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, 3546, 3549, 3551, 3554, 3556, + 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, 3591, 3593, 3596, 3598, 3601, 3603, + 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, 3634, 3637, 3639, 3642, 3644, 3646, 3649, + 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, + 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, + 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, + 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, + 3825, 3827, 3829, 3831, 3834, 3836, 3838, 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, + 3866, 3868, 3870, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, + 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, + 3946, 3949, 3951, 3953, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, + 3986, 3988, 3990, 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, + 4024, 4026, 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, + 4062, 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095 + }, + 3, +}; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 17, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + { 31, 31, 23, 23, 23, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21 }, + { 31, 31, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 8, 8, 7, 7, 7, 6, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 7, 6, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 58, 60, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 12, 16, 20, 24, 24, 24, 26, 28, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 18, 20, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 30, 30, 30, 26, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {159, 159, 159, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140}, + {167, 167, 167, 144, 144, 144, 144, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {176, 176, 176, 151, 151, 151, 151, 147, 147, 147, 147, 147, 147, 147, 147, 147}, + {186, 186, 186, 158, 158, 158, 158, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {196, 196, 196, 166, 166, 166, 166, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {206, 206, 206, 176, 176, 176, 176, 164, 164, 164, 164, 164, 164, 164, 164, 164}, + {217, 217, 217, 185, 185, 185, 185, 171, 171, 171, 171, 171, 171, 171, 171, 171}, + {227, 227, 227, 195, 195, 195, 195, 177, 177, 177, 177, 177, 177, 177, 177, 177}, + {237, 237, 237, 205, 205, 205, 205, 184, 184, 184, 184, 184, 184, 184, 184, 184}, + {246, 246, 246, 214, 214, 214, 214, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {254, 254, 254, 223, 223, 223, 223, 196, 196, 196, 196, 196, 196, 196, 196, 196}, + {261, 261, 261, 231, 231, 231, 231, 201, 201, 201, 201, 201, 201, 201, 201, 201}, + {268, 268, 268, 237, 237, 237, 237, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {272, 272, 272, 242, 242, 242, 242, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {276, 276, 276, 245, 245, 245, 245, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {277, 277, 277, 247, 247, 247, 247, 212, 212, 212, 212, 212, 212, 212, 212, 212}, + {276, 276, 276, 246, 246, 246, 246, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {274, 274, 274, 243, 243, 243, 243, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {270, 270, 270, 238, 238, 238, 238, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {265, 265, 265, 232, 232, 232, 232, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {258, 258, 258, 225, 225, 225, 225, 197, 197, 197, 197, 197, 197, 197, 197, 197}, + {250, 250, 250, 217, 217, 217, 217, 192, 192, 192, 192, 192, 192, 192, 192, 192}, + {242, 242, 242, 209, 209, 209, 209, 186, 186, 186, 186, 186, 186, 186, 186, 186}, + {233, 233, 233, 199, 199, 199, 199, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {224, 224, 224, 190, 190, 190, 190, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {215, 215, 215, 181, 181, 181, 181, 167, 167, 167, 167, 167, 167, 167, 167, 167}, + {206, 206, 206, 172, 172, 172, 172, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {198, 198, 198, 163, 163, 163, 163, 156, 156, 156, 156, 156, 156, 156, 156, 156}, + {191, 191, 191, 156, 156, 156, 156, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {184, 184, 184, 149, 149, 149, 149, 146, 146, 146, 146, 146, 146, 146, 146, 146}, + {179, 179, 179, 143, 143, 143, 143, 142, 142, 142, 142, 142, 142, 142, 142, 142}, + {175, 175, 175, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + }, + /* edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {155, 155, 155, 155, 155, 155, 155, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {175, 175, 175, 175, 175, 175, 175, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {187, 187, 187, 187, 187, 187, 187, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {201, 201, 201, 201, 201, 201, 201, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {215, 215, 215, 215, 215, 215, 215, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {229, 229, 229, 229, 229, 229, 229, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {243, 243, 243, 243, 243, 243, 243, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {257, 257, 257, 257, 257, 257, 257, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {269, 269, 269, 269, 269, 269, 269, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {281, 281, 281, 281, 281, 281, 281, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {290, 290, 290, 290, 290, 290, 290, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {298, 298, 298, 298, 298, 298, 298, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {302, 302, 302, 302, 302, 302, 302, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {304, 304, 304, 304, 304, 304, 304, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {303, 303, 303, 303, 303, 303, 303, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {298, 298, 298, 298, 298, 298, 298, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {292, 292, 292, 292, 292, 292, 292, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {284, 284, 284, 284, 284, 284, 284, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {273, 273, 273, 273, 273, 273, 273, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {262, 262, 262, 262, 262, 262, 262, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {250, 250, 250, 250, 250, 250, 250, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {237, 237, 237, 237, 237, 237, 237, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {223, 223, 223, 223, 223, 223, 223, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {210, 210, 210, 210, 210, 210, 210, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {197, 197, 197, 197, 197, 197, 197, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {185, 185, 185, 185, 185, 185, 185, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {174, 174, 174, 174, 174, 174, 174, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {156, 156, 156, 156, 156, 156, 156, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 180, 180, 170, 160, 160, 140, 140, 140, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 4, 4, 4, 4, 4, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 6, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 110, 110, 100, 100, 100, 100, 100, 100, 100 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6175, + /* CCM matrix */ + { 440, 32967, 15, 32868, 408, 32820, 32769, 32992, 481 }, + }, + { + /* color temperature */ + 4990, + /* CCM matrix */ + { 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 }, + }, + { + /* color temperature */ + 3865, + /* CCM matrix */ + { 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 }, + }, + { + /* color temperature */ + 2450, + /* CCM matrix */ + { 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 }, + }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm_wdr = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6175, + /* CCM matrix */ + { 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 }, + }, + { + /* color temperature */ + 4990, + /* CCM matrix */ + { 443, 32969, 14, 32860, 423, 32843, 13, 33044, 519 }, + }, + { + /* color temperature */ + 3865, + /* CCM matrix */ + { 450, 32973, 11, 32857, 407, 32830, 18, 33031, 501 }, + }, + { + /* color temperature */ + 2450, + /* CCM matrix */ + { 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 } +}; + +static ot_isp_awb_agc_table g_awb_agc_table_wdr = { + /* bvalid */ + 1, + /* saturation */ + { 90, 90, 85, 85, 85, 82, 80, 80, 75, 75, 70, 70, 70, 70, 65, 60} +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 20, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* y_grid_width */ + {33, 33, 33, 33, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 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269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 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1.000000000, + 1.000000000 + } + } +}; + +static const ot_isp_cmos_clut g_cmos_clut = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 3149813, 1046533, 3149814, 6299621, 9450452, 6299622, 9450451, 12602304, + 16802729, 12602303, 16803752, 22052752, 26255221, 21005198, 25206643, 30457689, 35708733, + 29409112, 32563005, 39910177, 45161223, 35714854, 38866705, 49362669, 54612692, 42017535, + 45168367, 60912311, 68261528, 48319196, 52519622, 75610743, 3149814, 57769646, 4198390, + 2095110, 9451475, 3143687, 9451474, 6299621, 15755175, 6300644, 14706598, 12603326, + 23110515, 11554749, 21012342, 19956621, 29416257, 17859470, 25219913, 26263385, 32572189, + 23116638, 26276652, 31519533, 34675465, 26273592, 25232160, 33624849, 37828337, 26279717, + 24187669, 35727104, 5246965, 24184604, 6295538, 39930592, 9451473, 25238283, 9451472, + 4192261, 13658024, 6290435, 11559850, 7349219, 17865595, 7349218, 14716804, 11554749, + 19973973, 10506174, 14727012, 15761298, 18932542, 13663127, 11587410, 18920295, 15788854, + 14722931, 7395148, 19978055, 12645170, 13681497, 2153291, 17884985, 8393711, 9491278, + 9443307, 14741301, 9451472, 4249419, 8402896, 11597614, 9461678, 1072749387, 7363507, + 7341055, 10520463, 10487801, 6323098, 8398816, 8430453, 9447390, 2134918, 9456575, + 4241254, 8408001, 1070637947, 10515358, 1071693666, 7367590, 1063299959, 9475969, 1065403234, + 4229007, 1054911353, 6336364, 11541479, 39808, 12591075, 1097571, 8402896, 1067493240, + 8402896, 1068548962, 5264313, 1059105655, 3166143, 1061208932, 2125734, 1050717050, 1071670194, + 12586995, 1070629783, 14685164, 1064333224, 9448411, 1063292815, 10496985, 1054899107, 7358404, + 1053856653, 6308808, 1045462946, 4219823, 1044420494, 1071032, 1034977187, 1072723870, 12592094, + 1068525484, 12593114, 1066436498, 7354321, 1060140965, 6304722, 1059099533, 2115526, 1050704802, + 16333, 1049663373, 1067471805, 1040220066, 1063274441, 1040226191, 1058037688, 1029734309, 1052790727, + 15735781, 1047553974, 15737822, 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38797304, 0, 0, 0, + 1059045435, 0, 0, 0, 1063241779, 0, 0, 0, 1068486699, + 0, 0, 0, 1072683043, 0, 0, 0, 3137563, 0, + 0, 0, 8382483, 0, 0, 0, 13627403, 0, 0, + 0, 17822723, 0, 0, 0, 23068667, 0, 0, 0, + 1071637529, 0, 0, 0, 1072687125, 0, 0, 0, 1073736721, + 0, 0, 0, 1044493, 0, 0, 0, 2094090, 0, + 0, 0, 3143686, 0, 0, 0, 5241859, 0, 0, + 0, 6290433, 0, 0, 0, 7341054, 0, 0, 0, + 1042423, 0, 0, 0, 1045494, 0, 0, 0, 1047542, + 0, 0, 0, 1015, 0, 0, 0, 3064, 0, + 0, 0, 1071647738, 0, 0, 0, 1069550588, 0, 0, + 0, 1067452414, 0, 0, 0, 1065352192, 0, 0, 0, + } + }, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* OS08A20_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_sensor_ctl.c b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_sensor_ctl.c new file mode 100644 index 0000000..33c4415 --- /dev/null +++ b/libraries/sensor/hi3519dv500/omnivision_os08a20/os08a20_sensor_ctl.c @@ -0,0 +1,749 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif + +#include "os08a20_cmos.h" +#include "ot_mpi_isp.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int os08a20_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *os08a20businfo = TD_NULL; + os08a20businfo = os08a20_get_bus_info(vi_pipe); + dev_num = os08a20businfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (OS08A20_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int os08a20_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 os08a20_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 os08a20_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = OS08A20_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = OS08A20_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = OS08A20_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (OS08A20_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + } + + if (OS08A20_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, OS08A20_ADDR_BYTE + OS08A20_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void os08a20_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void os08a20_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void os08a20_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +td_void os08a20_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp blc_clamp) +{ + td_s32 ret = TD_SUCCESS; + + os08a20_set_blc_clamp_value(vi_pipe, blc_clamp.blc_clamp_en); + + if (blc_clamp.blc_clamp_en == TD_TRUE) { + ret += os08a20_write_register(vi_pipe, 0x4001, 0xeb); /* clamp on */ + } else { + ret += os08a20_write_register(vi_pipe, 0x4001, 0xea); /* clamp off */ + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +static void os08a20_vc_wdr_2t1_8m30_10bit_init(ot_vi_pipe vi_pipe); +static void os08a20_linear_8m30_12bit_init(ot_vi_pipe vi_pipe); + +static void os08a20_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastos08a20 = TD_NULL; + + pastos08a20 = os08a20_get_ctx(vi_pipe); + for (i = 0; i < pastos08a20->regs_info[0].reg_num; i++) { + if ((i == EXPO_L_IDX || i == WDR_EXPO_L_IDX) && ((pastos08a20->regs_info[0].i2c_data[i].data & 0x07) == 0x07)) { + pastos08a20->regs_info[0].i2c_data[i].data = ((pastos08a20->regs_info[0].i2c_data[i].data >> 1) << 1); + } + ret += os08a20_write_register(vi_pipe, + pastos08a20->regs_info[0].i2c_data[i].reg_addr, + pastos08a20->regs_info[0].i2c_data[i].data); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + + return; +} + +static td_bool os08a20_get_quick_start_flag(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + ot_isp_ctrl_param isp_ctrl_param = {}; + + ret = ot_mpi_isp_get_ctrl_param(vi_pipe, &isp_ctrl_param); + if (ret != TD_SUCCESS) { + isp_err_trace("pipe[%d] call ot_mpi_isp_get_ctrl_param failed! ret = 0x%x, quick_start_flag force set to 0!\n", + vi_pipe, ret); + return TD_FALSE; + } + + return isp_ctrl_param.quick_start_en; +} + +void os08a20_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_u8 img_mode; + td_s32 ret; + td_bool quick_start_flag = TD_FALSE; + ot_isp_sns_state *pastos08a20 = TD_NULL; + + pastos08a20 = os08a20_get_ctx(vi_pipe); + wdr_mode = pastos08a20->wdr_mode; + img_mode = pastos08a20->img_mode; + + ret = os08a20_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + quick_start_flag = os08a20_get_quick_start_flag(vi_pipe); + /* When quick start mode, sensor init in boot, don't init sensor here */ + if (quick_start_flag == TD_FALSE) { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (OS08A20_8M_30FPS_10BIT_2TO1_VC_MODE == img_mode) { /* OS08A20_VMAX_8M_30FPS_10BIT_2TO1_WDR */ + os08a20_vc_wdr_2t1_8m30_10bit_init(vi_pipe); + } else { + } + } else { + os08a20_linear_8m30_12bit_init(vi_pipe); + } + } + + pastos08a20->init = TD_TRUE; + return; +} + +void os08a20_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = os08a20_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("OS08A20 exit failed!\n"); + } + + return; +} + +static td_s32 os08a20_linear_8m30_12bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x0100, 0x00); + ret += os08a20_write_register(vi_pipe, 0x0103, 0x01); + ret += os08a20_write_register(vi_pipe, 0x0303, 0x01); + ret += os08a20_write_register(vi_pipe, 0x0305, 0x5a); + ret += os08a20_write_register(vi_pipe, 0x0306, 0x00); + ret += os08a20_write_register(vi_pipe, 0x0308, 0x03); + ret += os08a20_write_register(vi_pipe, 0x0309, 0x04); + ret += os08a20_write_register(vi_pipe, 0x032a, 0x00); + ret += os08a20_write_register(vi_pipe, 0x300f, 0x11); + ret += os08a20_write_register(vi_pipe, 0x3010, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3011, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3012, 0x41); + ret += os08a20_write_register(vi_pipe, 0x3016, 0xf0); + ret += os08a20_write_register(vi_pipe, 0x301e, 0x98); + ret += os08a20_write_register(vi_pipe, 0x3031, 0xa9); + ret += os08a20_write_register(vi_pipe, 0x3103, 0x92); + ret += os08a20_write_register(vi_pipe, 0x3104, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3106, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3400, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3025, 0x03); + ret += os08a20_write_register(vi_pipe, 0x3425, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3428, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3406, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3408, 0x03); + ret += os08a20_write_register(vi_pipe, 0x340c, 0xff); + ret += os08a20_write_register(vi_pipe, 0x340d, 0xff); + ret += os08a20_write_register(vi_pipe, 0x031e, 0x0a); + ret += os08a20_write_register(vi_pipe, 0x3501, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3502, 0xe5); + ret += os08a20_write_register(vi_pipe, 0x3505, 0x83); + ret += os08a20_write_register(vi_pipe, 0x3508, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3509, 0x80); + ret += os08a20_write_register(vi_pipe, 0x350a, 0x04); + ret += os08a20_write_register(vi_pipe, 0x350b, 0x00); + ret += os08a20_write_register(vi_pipe, 0x350c, 0x00); + ret += os08a20_write_register(vi_pipe, 0x350d, 0x80); + ret += os08a20_write_register(vi_pipe, 0x350e, 0x04); + ret += os08a20_write_register(vi_pipe, 0x350f, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3600, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3603, 0x2c); + ret += os08a20_write_register(vi_pipe, 0x3605, 0x50); + ret += os08a20_write_register(vi_pipe, 0x3609, 0xdb); + ret += os08a20_write_register(vi_pipe, 0x3610, 0x39); + ret += os08a20_write_register(vi_pipe, 0x360c, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3628, 0xa4); + + return ret; +} + +static td_s32 os08a20_linear_8m30_12bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x362d, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3660, 0xd3); + ret += os08a20_write_register(vi_pipe, 0x3661, 0x06); + ret += os08a20_write_register(vi_pipe, 0x3662, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3663, 0x28); + ret += os08a20_write_register(vi_pipe, 0x3664, 0x0d); + ret += os08a20_write_register(vi_pipe, 0x366a, 0x38); + ret += os08a20_write_register(vi_pipe, 0x366b, 0xa0); + ret += os08a20_write_register(vi_pipe, 0x366d, 0x00); + ret += os08a20_write_register(vi_pipe, 0x366e, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3680, 0x00); + ret += os08a20_write_register(vi_pipe, 0x36c0, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3701, 0x02); + ret += os08a20_write_register(vi_pipe, 0x373b, 0x02); + ret += os08a20_write_register(vi_pipe, 0x373c, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3736, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3737, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3705, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3706, 0x72); + ret += os08a20_write_register(vi_pipe, 0x370a, 0x01); + ret += os08a20_write_register(vi_pipe, 0x370b, 0x30); + ret += os08a20_write_register(vi_pipe, 0x3709, 0x48); + ret += os08a20_write_register(vi_pipe, 0x3714, 0x21); + ret += os08a20_write_register(vi_pipe, 0x371c, 0x00); + ret += os08a20_write_register(vi_pipe, 0x371d, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3740, 0x1b); + ret += os08a20_write_register(vi_pipe, 0x3741, 0x04); + ret += os08a20_write_register(vi_pipe, 0x375e, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x3760, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3776, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3781, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3782, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3783, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3784, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3785, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3788, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3789, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3797, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3762, 0x11); + ret += os08a20_write_register(vi_pipe, 0x3800, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3801, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3802, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3803, 0x0c); + ret += os08a20_write_register(vi_pipe, 0x3804, 0x0e); + ret += os08a20_write_register(vi_pipe, 0x3805, 0xff); + + return ret; +} + +static td_s32 os08a20_linear_8m30_12bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x3806, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3807, 0x73); + ret += os08a20_write_register(vi_pipe, 0x3808, 0x0f); + ret += os08a20_write_register(vi_pipe, 0x3809, 0x00); + ret += os08a20_write_register(vi_pipe, 0x380a, 0x08); + ret += os08a20_write_register(vi_pipe, 0x380b, 0x88); + ret += os08a20_write_register(vi_pipe, 0x380c, 0x08); + ret += os08a20_write_register(vi_pipe, 0x380d, 0x18); + ret += os08a20_write_register(vi_pipe, 0x380e, 0x09); + ret += os08a20_write_register(vi_pipe, 0x380f, 0x0a); + ret += os08a20_write_register(vi_pipe, 0x3813, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3814, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3815, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3816, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3817, 0x01); + ret += os08a20_write_register(vi_pipe, 0x381c, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3820, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3821, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3823, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3826, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3827, 0x08); + ret += os08a20_write_register(vi_pipe, 0x382d, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3832, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3833, 0x00); + ret += os08a20_write_register(vi_pipe, 0x383c, 0x48); + ret += os08a20_write_register(vi_pipe, 0x383d, 0xff); + ret += os08a20_write_register(vi_pipe, 0x3d85, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x3d84, 0x40); + ret += os08a20_write_register(vi_pipe, 0x3d8c, 0x63); + ret += os08a20_write_register(vi_pipe, 0x3d8d, 0xd7); + ret += os08a20_write_register(vi_pipe, 0x4000, 0xf8); + ret += os08a20_write_register(vi_pipe, 0x4001, 0xeb); + ret += os08a20_write_register(vi_pipe, 0x4004, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4005, 0x00); + ret += os08a20_write_register(vi_pipe, 0x400a, 0x01); + ret += os08a20_write_register(vi_pipe, 0x400f, 0xa0); + ret += os08a20_write_register(vi_pipe, 0x4010, 0x12); + ret += os08a20_write_register(vi_pipe, 0x4018, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4008, 0x02); + ret += os08a20_write_register(vi_pipe, 0x4009, 0x0d); + ret += os08a20_write_register(vi_pipe, 0x401a, 0x58); + ret += os08a20_write_register(vi_pipe, 0x4050, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4051, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4028, 0x2f); + + return ret; +} + +static td_s32 os08a20_linear_8m30_12bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x4052, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4053, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4054, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4055, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4056, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4057, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4058, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4059, 0x80); + ret += os08a20_write_register(vi_pipe, 0x430b, 0xff); + ret += os08a20_write_register(vi_pipe, 0x430c, 0xff); + ret += os08a20_write_register(vi_pipe, 0x430d, 0x00); + ret += os08a20_write_register(vi_pipe, 0x430e, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4501, 0x18); + ret += os08a20_write_register(vi_pipe, 0x4502, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4600, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4601, 0x20); + ret += os08a20_write_register(vi_pipe, 0x4603, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4643, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4640, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4641, 0x04); + ret += os08a20_write_register(vi_pipe, 0x4800, 0x64); + ret += os08a20_write_register(vi_pipe, 0x4809, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x4813, 0x90); + ret += os08a20_write_register(vi_pipe, 0x4817, 0x04); + ret += os08a20_write_register(vi_pipe, 0x4833, 0x18); + ret += os08a20_write_register(vi_pipe, 0x4837, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x483b, 0x00); + ret += os08a20_write_register(vi_pipe, 0x484b, 0x03); + ret += os08a20_write_register(vi_pipe, 0x4850, 0x7c); + ret += os08a20_write_register(vi_pipe, 0x4852, 0x06); + ret += os08a20_write_register(vi_pipe, 0x4856, 0x58); + ret += os08a20_write_register(vi_pipe, 0x4857, 0xaa); + ret += os08a20_write_register(vi_pipe, 0x4862, 0x0a); + ret += os08a20_write_register(vi_pipe, 0x4869, 0x18); + ret += os08a20_write_register(vi_pipe, 0x486a, 0xaa); + ret += os08a20_write_register(vi_pipe, 0x486e, 0x03); + ret += os08a20_write_register(vi_pipe, 0x486f, 0x55); + ret += os08a20_write_register(vi_pipe, 0x4875, 0xf0); + ret += os08a20_write_register(vi_pipe, 0x5000, 0x89); + ret += os08a20_write_register(vi_pipe, 0x5001, 0x40); + ret += os08a20_write_register(vi_pipe, 0x5004, 0x40); + ret += os08a20_write_register(vi_pipe, 0x5005, 0x00); + ret += os08a20_write_register(vi_pipe, 0x5180, 0x00); + ret += os08a20_write_register(vi_pipe, 0x5181, 0x10); + ret += os08a20_write_register(vi_pipe, 0x580b, 0x03); + + return ret; +} + +static td_s32 os08a20_linear_8m30_12bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x4d00, 0x03); + ret += os08a20_write_register(vi_pipe, 0x4d01, 0xc9); + ret += os08a20_write_register(vi_pipe, 0x4d02, 0xbc); + ret += os08a20_write_register(vi_pipe, 0x4d03, 0xc6); + ret += os08a20_write_register(vi_pipe, 0x4d04, 0x4a); + ret += os08a20_write_register(vi_pipe, 0x4d05, 0x25); + ret += os08a20_write_register(vi_pipe, 0x4700, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x4e00, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x3501, 0x09); + ret += os08a20_write_register(vi_pipe, 0x3502, 0x01); + + os08a20_default_reg_init(vi_pipe); + + delay_ms(5); /* delay 5 ms */ + ret += os08a20_write_register(vi_pipe, 0x0100, 0x01); + + return ret; +} + + +static void os08a20_linear_8m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os08a20_linear_8m30_12bit_init_part1(vi_pipe); + ret += os08a20_linear_8m30_12bit_init_part2(vi_pipe); + ret += os08a20_linear_8m30_12bit_init_part3(vi_pipe); + ret += os08a20_linear_8m30_12bit_init_part4(vi_pipe); + ret += os08a20_linear_8m30_12bit_init_part5(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("os08a20 write register failed!\n"); + return; + } + + printf("========================================================================\n"); + printf("vi_pipe:%d,== os08a20 24Mclk 8M30fps(MIPI) 12bit linear init success! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} + +static td_s32 os08a20_vc_wdr_2t1_8m30_10bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x0100, 0x00); + + ret += os08a20_write_register(vi_pipe, 0x0103, 0x01); + ret += os08a20_write_register(vi_pipe, 0x0303, 0x01); + ret += os08a20_write_register(vi_pipe, 0x0305, 0x5a); + ret += os08a20_write_register(vi_pipe, 0x0306, 0x00); + ret += os08a20_write_register(vi_pipe, 0x0308, 0x03); + ret += os08a20_write_register(vi_pipe, 0x0309, 0x04); + ret += os08a20_write_register(vi_pipe, 0x032a, 0x00); + ret += os08a20_write_register(vi_pipe, 0x300f, 0x11); + ret += os08a20_write_register(vi_pipe, 0x3010, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3011, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3012, 0x41); + ret += os08a20_write_register(vi_pipe, 0x3016, 0xf0); + ret += os08a20_write_register(vi_pipe, 0x301e, 0x98); + ret += os08a20_write_register(vi_pipe, 0x3031, 0xa9); + ret += os08a20_write_register(vi_pipe, 0x3103, 0x92); + ret += os08a20_write_register(vi_pipe, 0x3104, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3106, 0x10); + ret += os08a20_write_register(vi_pipe, 0x340c, 0xff); + ret += os08a20_write_register(vi_pipe, 0x340d, 0xff); + ret += os08a20_write_register(vi_pipe, 0x031e, 0x09); + ret += os08a20_write_register(vi_pipe, 0x3501, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3502, 0xe5); + ret += os08a20_write_register(vi_pipe, 0x3505, 0x83); + ret += os08a20_write_register(vi_pipe, 0x3508, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3509, 0x80); + ret += os08a20_write_register(vi_pipe, 0x350a, 0x04); + ret += os08a20_write_register(vi_pipe, 0x350b, 0x00); + ret += os08a20_write_register(vi_pipe, 0x350c, 0x00); + ret += os08a20_write_register(vi_pipe, 0x350d, 0x80); + ret += os08a20_write_register(vi_pipe, 0x350e, 0x04); + ret += os08a20_write_register(vi_pipe, 0x350f, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3600, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3603, 0x2c); + ret += os08a20_write_register(vi_pipe, 0x3605, 0x50); + ret += os08a20_write_register(vi_pipe, 0x3609, 0xb5); + ret += os08a20_write_register(vi_pipe, 0x3610, 0x39); + ret += os08a20_write_register(vi_pipe, 0x360c, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3628, 0xa4); + ret += os08a20_write_register(vi_pipe, 0x362d, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3660, 0x42); + ret += os08a20_write_register(vi_pipe, 0x3661, 0x07); + ret += os08a20_write_register(vi_pipe, 0x3662, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3663, 0x28); + ret += os08a20_write_register(vi_pipe, 0x3664, 0x0d); + + return ret; +} + +static td_s32 os08a20_vc_wdr_2t1_8m30_10bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x366a, 0x38); + ret += os08a20_write_register(vi_pipe, 0x366b, 0xa0); + ret += os08a20_write_register(vi_pipe, 0x366d, 0x00); + ret += os08a20_write_register(vi_pipe, 0x366e, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3680, 0x00); + ret += os08a20_write_register(vi_pipe, 0x36c0, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3701, 0x02); + ret += os08a20_write_register(vi_pipe, 0x373b, 0x02); + ret += os08a20_write_register(vi_pipe, 0x373c, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3736, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3737, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3705, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3706, 0x39); + ret += os08a20_write_register(vi_pipe, 0x370a, 0x00); + ret += os08a20_write_register(vi_pipe, 0x370b, 0x98); + ret += os08a20_write_register(vi_pipe, 0x3709, 0x49); + ret += os08a20_write_register(vi_pipe, 0x3714, 0x21); + ret += os08a20_write_register(vi_pipe, 0x371c, 0x00); + ret += os08a20_write_register(vi_pipe, 0x371d, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3740, 0x1b); + ret += os08a20_write_register(vi_pipe, 0x3741, 0x04); + ret += os08a20_write_register(vi_pipe, 0x375e, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x3760, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3776, 0x10); + ret += os08a20_write_register(vi_pipe, 0x3781, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3782, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3783, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3784, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3785, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3788, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3789, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3797, 0x04); + ret += os08a20_write_register(vi_pipe, 0x3762, 0x11); + ret += os08a20_write_register(vi_pipe, 0x3800, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3801, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3802, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3803, 0x0c); + ret += os08a20_write_register(vi_pipe, 0x3804, 0x0e); + ret += os08a20_write_register(vi_pipe, 0x3805, 0xff); + ret += os08a20_write_register(vi_pipe, 0x3806, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3807, 0x73); + ret += os08a20_write_register(vi_pipe, 0x3808, 0x0f); + ret += os08a20_write_register(vi_pipe, 0x3809, 0x00); + ret += os08a20_write_register(vi_pipe, 0x380a, 0x08); + ret += os08a20_write_register(vi_pipe, 0x380b, 0x88); + + return ret; +} + +static td_s32 os08a20_vc_wdr_2t1_8m30_10bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x380c, 0x04); + ret += os08a20_write_register(vi_pipe, 0x380d, 0x0c); + ret += os08a20_write_register(vi_pipe, 0x380e, 0x09); + ret += os08a20_write_register(vi_pipe, 0x380f, 0x0a); + ret += os08a20_write_register(vi_pipe, 0x3813, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3814, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3815, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3816, 0x01); + ret += os08a20_write_register(vi_pipe, 0x3817, 0x01); + ret += os08a20_write_register(vi_pipe, 0x381c, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3820, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3821, 0x24); + ret += os08a20_write_register(vi_pipe, 0x3823, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3826, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3827, 0x08); + ret += os08a20_write_register(vi_pipe, 0x382d, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3832, 0x02); + ret += os08a20_write_register(vi_pipe, 0x3833, 0x01); + ret += os08a20_write_register(vi_pipe, 0x383c, 0x48); + ret += os08a20_write_register(vi_pipe, 0x383d, 0xff); + ret += os08a20_write_register(vi_pipe, 0x3d85, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x3d84, 0x40); + ret += os08a20_write_register(vi_pipe, 0x3d8c, 0x63); + ret += os08a20_write_register(vi_pipe, 0x3d8d, 0xd7); + ret += os08a20_write_register(vi_pipe, 0x4000, 0xf8); + ret += os08a20_write_register(vi_pipe, 0x4001, 0xeb); + ret += os08a20_write_register(vi_pipe, 0x4004, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4005, 0x40); + ret += os08a20_write_register(vi_pipe, 0x400a, 0x01); + ret += os08a20_write_register(vi_pipe, 0x400f, 0xa0); + ret += os08a20_write_register(vi_pipe, 0x4010, 0x12); + ret += os08a20_write_register(vi_pipe, 0x4018, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4008, 0x02); + ret += os08a20_write_register(vi_pipe, 0x4009, 0x0d); + ret += os08a20_write_register(vi_pipe, 0x401a, 0x58); + ret += os08a20_write_register(vi_pipe, 0x4050, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4051, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4028, 0x2f); + ret += os08a20_write_register(vi_pipe, 0x4052, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4053, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4054, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4055, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4056, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4057, 0x80); + ret += os08a20_write_register(vi_pipe, 0x4058, 0x00); + + return ret; +} + +static td_s32 os08a20_vc_wdr_2t1_8m30_10bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x4059, 0x80); + ret += os08a20_write_register(vi_pipe, 0x430b, 0xff); + ret += os08a20_write_register(vi_pipe, 0x430c, 0xff); + ret += os08a20_write_register(vi_pipe, 0x430d, 0x00); + ret += os08a20_write_register(vi_pipe, 0x430e, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4501, 0x18); + ret += os08a20_write_register(vi_pipe, 0x4502, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4643, 0x00); + ret += os08a20_write_register(vi_pipe, 0x4640, 0x01); + ret += os08a20_write_register(vi_pipe, 0x4641, 0x04); + ret += os08a20_write_register(vi_pipe, 0x4800, 0x64); + ret += os08a20_write_register(vi_pipe, 0x4809, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x4813, 0x98); + ret += os08a20_write_register(vi_pipe, 0x4817, 0x04); + ret += os08a20_write_register(vi_pipe, 0x4833, 0x18); + ret += os08a20_write_register(vi_pipe, 0x4837, 0x0b); + ret += os08a20_write_register(vi_pipe, 0x483b, 0x00); + ret += os08a20_write_register(vi_pipe, 0x484b, 0x03); + ret += os08a20_write_register(vi_pipe, 0x4850, 0x7c); + ret += os08a20_write_register(vi_pipe, 0x4852, 0x06); + ret += os08a20_write_register(vi_pipe, 0x4856, 0x58); + ret += os08a20_write_register(vi_pipe, 0x4857, 0xaa); + ret += os08a20_write_register(vi_pipe, 0x4862, 0x0a); + ret += os08a20_write_register(vi_pipe, 0x4869, 0x18); + ret += os08a20_write_register(vi_pipe, 0x486a, 0xaa); + ret += os08a20_write_register(vi_pipe, 0x486e, 0x07); + ret += os08a20_write_register(vi_pipe, 0x486f, 0x55); + ret += os08a20_write_register(vi_pipe, 0x4875, 0xf0); + ret += os08a20_write_register(vi_pipe, 0x5000, 0x89); + ret += os08a20_write_register(vi_pipe, 0x5001, 0x40); + ret += os08a20_write_register(vi_pipe, 0x5004, 0x40); + ret += os08a20_write_register(vi_pipe, 0x5005, 0x00); + ret += os08a20_write_register(vi_pipe, 0x5180, 0x00); + ret += os08a20_write_register(vi_pipe, 0x5181, 0x10); + ret += os08a20_write_register(vi_pipe, 0x580b, 0x03); + ret += os08a20_write_register(vi_pipe, 0x4d00, 0x03); + ret += os08a20_write_register(vi_pipe, 0x4d01, 0xc9); + ret += os08a20_write_register(vi_pipe, 0x4d02, 0xbc); + ret += os08a20_write_register(vi_pipe, 0x4d03, 0xc6); + ret += os08a20_write_register(vi_pipe, 0x4d04, 0x4a); + ret += os08a20_write_register(vi_pipe, 0x4d05, 0x25); + ret += os08a20_write_register(vi_pipe, 0x4700, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x4e00, 0x2b); + ret += os08a20_write_register(vi_pipe, 0x3501, 0x08); + ret += os08a20_write_register(vi_pipe, 0x3502, 0xe1); + + return ret; +} + +static td_s32 os08a20_vc_wdr_2t1_8m30_10bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += os08a20_write_register(vi_pipe, 0x3511, 0x00); + ret += os08a20_write_register(vi_pipe, 0x3512, 0x20); + ret += os08a20_write_register(vi_pipe, 0x3833, 0x01); + + os08a20_default_reg_init(vi_pipe); + + delay_ms(1); + ret += os08a20_write_register(vi_pipe, 0x0100, 0x01); + + return ret; +} + +static void os08a20_vc_wdr_2t1_8m30_10bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += os08a20_vc_wdr_2t1_8m30_10bit_init_part1(vi_pipe); + ret += os08a20_vc_wdr_2t1_8m30_10bit_init_part2(vi_pipe); + ret += os08a20_vc_wdr_2t1_8m30_10bit_init_part3(vi_pipe); + ret += os08a20_vc_wdr_2t1_8m30_10bit_init_part4(vi_pipe); + ret += os08a20_vc_wdr_2t1_8m30_10bit_init_part5(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("os08a20 write register failed!\n"); + return; + } + + printf("========================================================================\n"); + printf("vi_pipe:%d,== os08a20 24Mclk 8M30fps(MIPI) 10bit vc-wdr init success! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} diff --git a/libraries/sensor/hi3519dv500/smart_sc450ai/Makefile b/libraries/sensor/hi3519dv500/smart_sc450ai/Makefile new file mode 100644 index 0000000..c9de809 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc450ai/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_sc450ai + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.c b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.c new file mode 100644 index 0000000..a094994 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.c @@ -0,0 +1,1443 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" + +#include "sc450ai_cmos_ex.h" +#include "sc450ai_cmos.h" + +#define SC450AI_ID 450 +#define SC450AI_WIDTH 2688 +#define SC450AI_HEIGHT 1520 + +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) +#define lower_4bits(x) (((x) & 0x000F) << 4) +#define higher_4bits(x) (((x) & 0xF000) >> 12) +#define higher_8bits(x) (((x) & 0x0FF0) >> 4) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define sc450ai_sensor_set_ctx(dev, ctx) ((g_sc450ai_sns_state[dev]) = (ctx)) +#define sc450ai_sensor_reset_ctx(dev) (g_sc450ai_sns_state[dev] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +static td_u32 g_max_short_exp[OT_ISP_MAX_PIPE_NUM] = { + [0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = SC450AI_SEXP_MAX_DEFAULT * 2 +}; + +ot_isp_sns_commbus g_sc450ai_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0 }, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1 } +}; + +static td_float g_dcg_ratio = 3.813; + +ot_isp_sns_state *g_sc450ai_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; +ot_isp_sns_commbus *sc450ai_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_sc450ai_bus_info[vi_pipe]; +} + +ot_isp_sns_state *sc450ai_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_sc450ai_sns_state[vi_pipe]; +} + +const sc450ai_video_mode_tbl g_sc450ai_mode_tbl[SC450AI_MODE_BUTT] = { + {SC450AI_VMAX_4M_30FPS_12BIT_LINEAR, SC450AI_FULL_LINES_MAX, 30, 2.5, + SC450AI_WIDTH, SC450AI_HEIGHT, 0, OT_WDR_MODE_NONE, "SC450AI_4M_30FPS_12BIT_LINEAR_MODE"}, + + {SC450AI_VMAX_4M_30FPS_2TO1_WDR, SC450AI_FULL_LINES_MAX_2TO1_WDR, 30, 10, + SC450AI_WIDTH, SC450AI_HEIGHT, 0, OT_WDR_MODE_2To1_LINE, "SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE"}, +}; + +#define sc450ai_err_mode_print(sns_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + td_float max_fps = 30; /* maxfps 30 */ + + if (sns_state->img_mode == SC450AI_4M_30FPS_12BIT_LINEAR_MODE) { + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0.182; /* offset: 0.182 */ + } else if (sns_state->img_mode == SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE) { + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 4; /* accuracy: 4 */ + ae_sns_dft->int_time_accu.offset = 0.216; /* offset: 0.216 */ + } else { + } + + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = SC450AI_FULL_LINES_MAX * 2; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->again_accu.accuracy = 0.0625; /* accuracy: 0.0625 */ + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->dgain_accu.accuracy = 0.125; /* accuracy: 0.125 */ + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 32 << ae_sns_dft->isp_dgain_shift; /* max 32 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = (td_u32)(sns_state->fl_std * max_fps / 2); /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_4; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_5_6; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 61976; /* 15.875*3.813*1024 = 61976 */ + ae_sns_dft->min_again = 1024; /* min 16 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 1024; /* max 1024 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x40; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 148859; /* init 148859 */ + + ae_sns_dft->max_int_time = sns_state->fl_std - EXP_OFFSET_LINEAR; + ae_sns_dft->min_int_time = 1; /* min int 1 */ + ae_sns_dft->max_int_time_target = 65535; /* max int 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_void cmos_get_ae_2to1_line_wdr_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_int_time = sns_state->fl_std - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR; + ae_sns_dft->min_int_time = 4; /* min_int_time 4 */ + ae_sns_dft->int_time_accu.offset = 0.216; /* offset: 0.216 */ + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->max_again = 61976; /* 15.875*3.4*1024 = 61976 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 16256; /* max 16256 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + ae_sns_dft->max_isp_dgain_target = 2 << ae_sns_dft->isp_dgain_shift; /* max 2 << shift */ + ae_sns_dft->diff_gain_support = TD_TRUE; + + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 16462; /* init 16462 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + ae_sns_dft->ae_compensation = 56; /* ae_compensation 56 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + } else { + ae_sns_dft->ae_compensation = 32; /* ae_compensation 32 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_LOWLIGHT_PRIOR; + ae_sns_dft->man_ratio_enable = TD_TRUE; + ae_sns_dft->arr_ratio[0] = 0x400; + ae_sns_dft->arr_ratio[1] = 0x40; + ae_sns_dft->arr_ratio[2] = 0x40; /* array index 2 */ + } + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + case OT_WDR_MODE_2To1_LINE: + cmos_get_ae_2to1_line_wdr_default(vi_pipe, ae_sns_dft, sns_state); + break; + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = high_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = low_8bits(vmax); + } else { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = high_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = low_8bits(vmax); + } + + return; +} + +/* the function of sensor set fps */ +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines; + td_u32 lines_max; + td_u32 vmax; + td_float max_fps; + td_float min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_sc450ai_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_sc450ai_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_sc450ai_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_sc450ai_mode_tbl[sns_state->img_mode].min_fps; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + vmax = (vmax > lines_max) ? lines_max : vmax; + + cmos_config_vmax(sns_state, vmax); + sns_state->fl_std = vmax << 1; + ae_sns_dft->lines_per500ms = (lines * 2) * 15; /* 2 * 15 */ + + ae_sns_dft->fps = fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + ae_sns_dft->max_int_time = sns_state->fl_std - EXP_OFFSET_LINEAR; + } else { + g_max_short_exp[vi_pipe] = (td_u32)(SC450AI_SEXP_MAX_DEFAULT * max_fps / div_0_to_1_float(fps)); + ae_sns_dft->max_int_time = sns_state->fl_std - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR; + sns_state->regs_info[0].i2c_data[SEXP_MAX_L_IDX].data = high_8bits(g_max_short_exp[vi_pipe]); + sns_state->regs_info[0].i2c_data[SEXP_MAX_H_IDX].data = low_8bits(g_max_short_exp[vi_pipe]); + } + + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 vmax; + td_u32 lines_max; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_sc450ai_mode_tbl[sns_state->img_mode].max_ver_lines; + + vmax = (full_lines + EXP_OFFSET_LINEAR) >> 1; + vmax = (vmax > lines_max) ? lines_max : vmax; + sns_state->fl[0] = vmax << 1; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = high_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = low_8bits(vmax); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + ae_sns_dft->max_int_time = sns_state->fl[0] - EXP_OFFSET_LINEAR; + } else { + ae_sns_dft->max_int_time = sns_state->fl[0] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR; + } + ae_sns_dft->full_lines = sns_state->fl[0]; + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = higher_4bits(int_time); + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].data = higher_8bits(int_time); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = lower_4bits(int_time); + + return; +} + +static td_void cmos_inttime_update_2to1_line(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + static td_bool is_first[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1}; + + static td_u32 short_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + static td_u32 long_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (is_first[vi_pipe]) { /* short exposure */ + sns_state->wdr_int_time[0] = int_time; + short_int_time[vi_pipe] = int_time; + is_first[vi_pipe] = TD_FALSE; + } else { /* long exposure */ + sns_state->wdr_int_time[1] = int_time; + long_int_time[vi_pipe] = int_time; + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = higher_4bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].data = higher_8bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = lower_4bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].data = higher_8bits(short_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].data = lower_4bits(short_int_time[vi_pipe]); + + is_first[vi_pipe] = TD_TRUE; + } + return; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + cmos_inttime_update_2to1_line(vi_pipe, int_time); + } else { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} + +#define SC450AI_AGAIN_NODE_NUM 256 +#define SC450AI_AGAIN_ADDR_INDEX_NODE_NUM 256 +#define SC450AI_DGAIN_NODE_NUM 256 +#define SC450AI_DGAIN_ADDR_INDEX_NODE_NUM 256 + +static td_u32 again_index[SC450AI_AGAIN_NODE_NUM] = { + 1024, 1040, 1056, 1072, 1088, 1104, 1120, 1136, 1152, 1168, 1184, 1200, 1216, 1232, 1248, 1264, + 1280, 1296, 1312, 1328, 1344, 1360, 1376, 1392, 1408, 1424, 1440, 1456, 1472, 1488, 1504, 1520, + 1536, 1552, 1568, 1584, 1600, 1616, 1632, 1648, 1664, 1680, 1696, 1712, 1728, 1744, 1760, 1776, + 1792, 1808, 1824, 1840, 1856, 1872, 1888, 1904, 1920, 1936, 1952, 1968, 1984, 2000, 2016, 2032, + 2048, 2080, 2112, 2144, 2176, 2208, 2240, 2272, 2304, 2336, 2368, 2400, 2432, 2464, 2496, 2528, + 2560, 2592, 2624, 2656, 2688, 2720, 2752, 2784, 2816, 2848, 2880, 2912, 2944, 2976, 3008, 3040, + 3072, 3104, 3136, 3168, 3200, 3232, 3264, 3296, 3328, 3360, 3392, 3424, 3456, 3488, 3520, 3552, + 3584, 3616, 3648, 3680, 3712, 3744, 3776, 3808, 3840, 3872, 3904, 3936, 3968, 4000, 4032, 4064, + 4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, 4928, 4992, 5056, + 5120, 5184, 5248, 5312, 5376, 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, 5952, 6016, 6080, + 6144, 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, 6720, 6784, 6848, 6912, 6976, 7040, 7104, + 7168, 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, 7744, 7808, 7872, 7936, 8000, 8064, 8128, + 8192, 8320, 8448, 8576, 8704, 8832, 8960, 9088, 9216, 9344, 9472, 9600, 9728, 9856, 9984, 10112, + 10240, 10368, 10496, 10624, 10752, 10880, 11008, 11136, 11264, 11392, 11520, 11648, 11776, 11904, 12032, 12160, + 12288, 12416, 12544, 12672, 12800, 12928, 13056, 13184, 13312, 13440, 13568, 13696, 13824, 13952, 14080, 14208, + 14336, 14464, 14592, 14720, 14848, 14976, 15104, 15232, 15360, 15488, 15616, 15744, 15872, 16000, 16128, 16256 +}; + +static td_u32 dgain_index[SC450AI_DGAIN_NODE_NUM] = { + 1024, 1040, 1056, 1072, 1088, 1104, 1120, 1136, 1152, 1168, 1184, 1200, 1216, 1232, 1248, 1264, + 1280, 1296, 1312, 1328, 1344, 1360, 1376, 1392, 1408, 1424, 1440, 1456, 1472, 1488, 1504, 1520, + 1536, 1552, 1568, 1584, 1600, 1616, 1632, 1648, 1664, 1680, 1696, 1712, 1728, 1744, 1760, 1776, + 1792, 1808, 1824, 1840, 1856, 1872, 1888, 1904, 1920, 1936, 1952, 1968, 1984, 2000, 2016, 2032, + 2048, 2080, 2112, 2144, 2176, 2208, 2240, 2272, 2304, 2336, 2368, 2400, 2432, 2464, 2496, 2528, + 2560, 2592, 2624, 2656, 2688, 2720, 2752, 2784, 2816, 2848, 2880, 2912, 2944, 2976, 3008, 3040, + 3072, 3104, 3136, 3168, 3200, 3232, 3264, 3296, 3328, 3360, 3392, 3424, 3456, 3488, 3520, 3552, + 3584, 3616, 3648, 3680, 3712, 3744, 3776, 3808, 3840, 3872, 3904, 3936, 3968, 4000, 4032, 4064, + 4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, 4928, 4992, 5056, + 5120, 5184, 5248, 5312, 5376, 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, 5952, 6016, 6080, + 6144, 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, 6720, 6784, 6848, 6912, 6976, 7040, 7104, + 7168, 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, 7744, 7808, 7872, 7936, 8000, 8064, 8128, + 8192, 8320, 8448, 8576, 8704, 8832, 8960, 9088, 9216, 9344, 9472, 9600, 9728, 9856, 9984, 10112, + 10240, 10368, 10496, 10624, 10752, 10880, 11008, 11136, 11264, 11392, 11520, 11648, 11776, 11904, 12032, 12160, + 12288, 12416, 12544, 12672, 12800, 12928, 13056, 13184, 13312, 13440, 13568, 13696, 13824, 13952, 14080, 14208, + 14336, 14464, 14592, 14720, 14848, 14976, 15104, 15232, 15360, 15488, 15616, 15744, 15872, 16000, 16128, 16256 +}; + +static td_u32 again_table[SC450AI_AGAIN_ADDR_INDEX_NODE_NUM] = { + 0x0340, 0x0341, 0x0342, 0x0343, 0x0344, 0x0345, 0x0346, 0x0347, 0x0348, 0x0349, 0x034A, 0x034B, 0x034C, 0x034D, + 0x034E, 0x034F, 0x0350, 0x0351, 0x0352, 0x0353, 0x0354, 0x0355, 0x0356, 0x0357, 0x0358, 0x0359, 0x035A, 0x035B, + 0x035C, 0x035D, 0x035E, 0x035F, 0x0360, 0x0361, 0x0362, 0x0363, 0x0364, 0x0365, 0x0366, 0x0367, 0x0368, 0x0369, + 0x036A, 0x036B, 0x036C, 0x036D, 0x036E, 0x036F, 0x0370, 0x0371, 0x0372, 0x0373, 0x0374, 0x0375, 0x0376, 0x0377, + 0x0378, 0x0379, 0x037A, 0x037B, 0x037C, 0x037D, 0x037E, 0x037F, 0x0740, 0x0741, 0x0742, 0x0743, 0x0744, 0x0745, + 0x0746, 0x0747, 0x0748, 0x0749, 0x074A, 0x074B, 0x074C, 0x074D, 0x074E, 0x074F, 0x0750, 0x0751, 0x0752, 0x0753, + 0x0754, 0x0755, 0x0756, 0x0757, 0x0758, 0x0759, 0x075A, 0x075B, 0x075C, 0x075D, 0x075E, 0x075F, 0x0760, 0x0761, + 0x0762, 0x0763, 0x0764, 0x0765, 0x0766, 0x0767, 0x0768, 0x0769, 0x076A, 0x076B, 0x076C, 0x076D, 0x076E, 0x076F, + 0x0770, 0x0771, 0x0772, 0x0773, 0x0774, 0x0775, 0x0776, 0x0777, 0x0778, 0x0779, 0x077A, 0x077B, 0x077C, 0x077D, + 0x077E, 0x077F, 0x0F40, 0x0F41, 0x0F42, 0x0F43, 0x0F44, 0x0F45, 0x0F46, 0x0F47, 0x0F48, 0x0F49, 0x0F4A, 0x0F4B, + 0x0F4C, 0x0F4D, 0x0F4E, 0x0F4F, 0x0F50, 0x0F51, 0x0F52, 0x0F53, 0x0F54, 0x0F55, 0x0F56, 0x0F57, 0x0F58, 0x0F59, + 0x0F5A, 0x0F5B, 0x0F5C, 0x0F5D, 0x0F5E, 0x0F5F, 0x0F60, 0x0F61, 0x0F62, 0x0F63, 0x0F64, 0x0F65, 0x0F66, 0x0F67, + 0x0F68, 0x0F69, 0x0F6A, 0x0F6B, 0x0F6C, 0x0F6D, 0x0F6E, 0x0F6F, 0x0F70, 0x0F71, 0x0F72, 0x0F73, 0x0F74, 0x0F75, + 0x0F76, 0x0F77, 0x0F78, 0x0F79, 0x0F7A, 0x0F7B, 0x0F7C, 0x0F7D, 0x0F7E, 0x0F7F, 0x1F40, 0x1F41, 0x1F42, 0x1F43, + 0x1F44, 0x1F45, 0x1F46, 0x1F47, 0x1F48, 0x1F49, 0x1F4A, 0x1F4B, 0x1F4C, 0x1F4D, 0x1F4E, 0x1F4F, 0x1F50, 0x1F51, + 0x1F52, 0x1F53, 0x1F54, 0x1F55, 0x1F56, 0x1F57, 0x1F58, 0x1F59, 0x1F5A, 0x1F5B, 0x1F5C, 0x1F5D, 0x1F5E, 0x1F5F, + 0x1F60, 0x1F61, 0x1F62, 0x1F63, 0x1F64, 0x1F65, 0x1F66, 0x1F67, 0x1F68, 0x1F69, 0x1F6A, 0x1F6B, 0x1F6C, 0x1F6D, + 0x1F6E, 0x1F6F, 0x1F70, 0x1F71, 0x1F72, 0x1F73, 0x1F74, 0x1F75, 0x1F76, 0x1F77, 0x1F78, 0x1F79, 0x1F7A, 0x1F7B, + 0x1F7C, 0x1F7D, 0x1F7E, 0x1F7F +}; + +static td_u32 dgain_table[SC450AI_DGAIN_ADDR_INDEX_NODE_NUM] = { + 0x0080, 0x0082, 0x0084, 0x0086, 0x0088, 0x008A, 0x008C, 0x008E, 0x0090, 0x0092, 0x0094, 0x0096, 0x0098, 0x009A, + 0x009C, 0x009E, 0x00A0, 0x00A2, 0x00A4, 0x00A6, 0x00A8, 0x00AA, 0x00AC, 0x00AE, 0x00B0, 0x00B2, 0x00B4, 0x00B6, + 0x00B8, 0x00BA, 0x00BC, 0x00BE, 0x00C0, 0x00C2, 0x00C4, 0x00C6, 0x00C8, 0x00CA, 0x00CC, 0x00CE, 0x00D0, 0x00D2, + 0x00D4, 0x00D6, 0x00D8, 0x00DA, 0x00DC, 0x00DE, 0x00E0, 0x00E2, 0x00E4, 0x00E6, 0x00E8, 0x00EA, 0x00EC, 0x00EE, + 0x00F0, 0x00F2, 0x00F4, 0x00F6, 0x00F8, 0x00FA, 0x00FC, 0x00FE, 0x0180, 0x0182, 0x0184, 0x0186, 0x0188, 0x018A, + 0x018C, 0x018E, 0x0190, 0x0192, 0x0194, 0x0196, 0x0198, 0x019A, 0x019C, 0x019E, 0x01A0, 0x01A2, 0x01A4, 0x01A6, + 0x01A8, 0x01AA, 0x01AC, 0x01AE, 0x01B0, 0x01B2, 0x01B4, 0x01B6, 0x01B8, 0x01BA, 0x01BC, 0x01BE, 0x01C0, 0x01C2, + 0x01C4, 0x01C6, 0x01C8, 0x01CA, 0x01CC, 0x01CE, 0x01D0, 0x01D2, 0x01D4, 0x01D6, 0x01D8, 0x01DA, 0x01DC, 0x01DE, + 0x01E0, 0x01E2, 0x01E4, 0x01E6, 0x01E8, 0x01EA, 0x01EC, 0x01EE, 0x01F0, 0x01F2, 0x01F4, 0x01F6, 0x01F8, 0x01FA, + 0x01FC, 0x01FE, 0x0380, 0x0382, 0x0384, 0x0386, 0x0388, 0x038A, 0x038C, 0x038E, 0x0390, 0x0392, 0x0394, 0x0396, + 0x0398, 0x039A, 0x039C, 0x039E, 0x03A0, 0x03A2, 0x03A4, 0x03A6, 0x03A8, 0x03AA, 0x03AC, 0x03AE, 0x03B0, 0x03B2, + 0x03B4, 0x03B6, 0x03B8, 0x03BA, 0x03BC, 0x03BE, 0x03C0, 0x03C2, 0x03C4, 0x03C6, 0x03C8, 0x03CA, 0x03CC, 0x03CE, + 0x03D0, 0x03D2, 0x03D4, 0x03D6, 0x03D8, 0x03DA, 0x03DC, 0x03DE, 0x03E0, 0x03E2, 0x03E4, 0x03E6, 0x03E8, 0x03EA, + 0x03EC, 0x03EE, 0x03F0, 0x03F2, 0x03F4, 0x03F6, 0x03F8, 0x03FA, 0x03FC, 0x03FE, 0x0780, 0x0782, 0x0784, 0x0786, + 0x0788, 0x078A, 0x078C, 0x078E, 0x0790, 0x0792, 0x0794, 0x0796, 0x0798, 0x079A, 0x079C, 0x079E, 0x07A0, 0x07A2, + 0x07A4, 0x07A6, 0x07A8, 0x07AA, 0x07AC, 0x07AE, 0x07B0, 0x07B2, 0x07B4, 0x07B6, 0x07B8, 0x07BA, 0x07BC, 0x07BE, + 0x07C0, 0x07C2, 0x07C4, 0x07C6, 0x07C8, 0x07CA, 0x07CC, 0x07CE, 0x07D0, 0x07D2, 0x07D4, 0x07D6, 0x07D8, 0x07DA, + 0x07DC, 0x07DE, 0x07E0, 0x07E2, 0x07E4, 0x07E6, 0x07E8, 0x07EA, 0x07EC, 0x07EE, 0x07F0, 0x07F2, 0x07F4, 0x07F6, + 0x07F8, 0x07FA, 0x07FC, 0x07FE +}; + +static td_void cmos_again_calc_table(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db) +{ + td_s32 i; + td_u32 again_lin_tmp; + + sns_check_pointer_void_return(again_lin); + sns_check_pointer_void_return(again_db); + + if (*again_lin >= (td_u32)(again_index[SC450AI_AGAIN_ADDR_INDEX_NODE_NUM - 1] * g_dcg_ratio)) { + *again_lin = (td_u32)(again_index[SC450AI_AGAIN_ADDR_INDEX_NODE_NUM - 1] * g_dcg_ratio); + if (g_dcg_ratio > 1) { + *again_db = again_table[SC450AI_AGAIN_NODE_NUM - 1] | 0x2000; + } else { + *again_db = again_table[SC450AI_AGAIN_NODE_NUM - 1]; + } + return; + } + if (*again_lin > (1024 * g_dcg_ratio)) { /* 1024 */ + again_lin_tmp = (td_u32)(*again_lin / g_dcg_ratio); + for (i = 1; i < SC450AI_AGAIN_NODE_NUM; i++) { + if (again_lin_tmp < again_index[i]) { + *again_lin = (td_u32)(again_index[i - 1] * g_dcg_ratio); + *again_db = again_table[i - 1] | 0x2000; + break; + } + } + } else { + again_lin_tmp = *again_lin; + for (i = 1; i < SC450AI_AGAIN_NODE_NUM; i++) { + if (again_lin_tmp < again_index[i]) { + *again_lin = again_index[i - 1]; + *again_db = again_table[i - 1]; + break; + } + } + } + return; +} + +static td_void cmos_dgain_calc_table(ot_vi_pipe vi_pipe, td_u32 *dgain_lin, td_u32 *dgain_db) +{ + int i; + + sns_check_pointer_void_return(dgain_lin); + sns_check_pointer_void_return(dgain_db); + + if (*dgain_lin >= dgain_index[SC450AI_DGAIN_ADDR_INDEX_NODE_NUM - 1]) { + *dgain_lin = dgain_index[SC450AI_DGAIN_ADDR_INDEX_NODE_NUM - 1]; + *dgain_db = dgain_table[SC450AI_DGAIN_NODE_NUM - 1]; + return; + } + + for (i = 1; i < SC450AI_DGAIN_NODE_NUM; i++) { + if (*dgain_lin < dgain_index[i]) { + *dgain_lin = dgain_index[i - 1]; + *dgain_db = dgain_table[i - 1]; + break; + } + } + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + td_u8 reg_0x3e09; + td_u8 reg_0x3e08; + td_u8 reg_0x3e07; + td_u8 reg_0x3e06; + + reg_0x3e06 = high_8bits(dgain); + reg_0x3e07 = low_8bits (dgain); + reg_0x3e08 = high_8bits(again); + reg_0x3e09 = low_8bits (again); + + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].data = reg_0x3e06; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].data = reg_0x3e07; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].data = reg_0x3e08; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].data = reg_0x3e09; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].data = reg_0x3e06; + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].data = reg_0x3e07; + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].data = reg_0x3e08; + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].data = reg_0x3e09; + } else { + } + return; +} + +static td_void cmos_get_inttime_max_2to1_line(ot_vi_pipe vi_pipe, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + td_u32 short_max0; + td_u32 short_max; + td_u32 short_time_min_limit; + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + short_time_min_limit = 4; /* short_time_min_limit 4 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + short_max0 = sns_state->fl[1] - 20 - sns_state->wdr_int_time[0]; /* sensor limit: sub 20 */ + short_max = sns_state->fl[0] - 20; /* sensor limit: sub 20 */ + short_max = short_max > (g_max_short_exp[vi_pipe] - SEXP_OFFSET_WDR) ? + (g_max_short_exp[vi_pipe] - SEXP_OFFSET_WDR) : short_max; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + int_time->int_time_max[0] = short_time_min_limit; + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_max[1] = short_max; + int_time->int_time_min[1] = short_time_min_limit; + return; + } else { + short_max0 = ((sns_state->fl[1] - 20 - g_max_short_exp[vi_pipe]) * 0x40) / div_0_to_1(ratio[0]); /* sub 20 */ + short_max = ((sns_state->fl[0] - 20 - g_max_short_exp[vi_pipe]) * 0x40) / div_0_to_1(ratio[0]); /* sub 20 */ + short_max = short_max > (g_max_short_exp[vi_pipe] - SEXP_OFFSET_WDR) ? + (g_max_short_exp[vi_pipe] - SEXP_OFFSET_WDR) : short_max; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + short_max = (short_max == 0) ? 1 : short_max; + } + *lf_max_int_time = sns_state->fl[0] - 20; /* sub 20 */ + + if (short_max >= short_time_min_limit) { + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * ratio[0]) >> 6; /* shift 6 */ + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_min[1] = (int_time->int_time_min[0] * ratio[0]) >> 6; /* shift 6 */ + } else { + short_max = short_time_min_limit; + + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * 0xFFF) >> 6; /* shift 6 */ + int_time->int_time_min[0] = int_time->int_time_max[0]; + int_time->int_time_min[1] = int_time->int_time_max[1]; + } + + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + ot_unused(man_ratio_enable); + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_2To1_LINE: + cmos_get_inttime_max_2to1_line(vi_pipe, ratio, int_time, lf_max_int_time); + break; + default: + break; + } + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + + return; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_again_calc_table = cmos_again_calc_table; + exp_func->pfn_cmos_dgain_calc_table = cmos_dgain_calc_table; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 4950 +#define CALIBRATE_STATIC_WB_R_GAIN 478 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 497 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 (-102) +#define CALIBRATE_AWB_P2 358 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 183957 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-135938) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + case OT_WDR_MODE_2To1_LINE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm_wdr, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table_wdr, sizeof(ot_isp_awb_agc_table)); + + break; + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case SC450AI_4M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 10; /* 10bit */ + isp_def->sns_mode.dng_raw_format.white_level = 1023; /* max 1023 */ + break; + case SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 10; /* 10bit */ + isp_def->sns_mode.dng_raw_format.white_level = 1023; /* max 1023 */ + break; + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 10; /* 10bit */ + isp_def->sns_mode.dng_raw_format.white_level = 1023; /* max 1023 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static void cmos_get_isp_wdr_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc_wdr; + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic_wdr; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen_wdr; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc_wdr; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma_wdr; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut_wdr; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr_wdr; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge_wdr; +#endif + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color_wdr; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac_wdr; + isp_def->key.bit1_bshp= 1; + isp_def->bshp = &g_cmos_bayershp_wdr; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci_wdr; + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze_wdr; + + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + case OT_WDR_MODE_2To1_LINE: + cmos_get_isp_wdr_default(isp_def); + break; + default: + cmos_get_isp_linear_default(isp_def); + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + } + + isp_def->sns_mode.sns_id = SC450AI_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(black_level); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), &g_cmos_blc, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x410; + } + } else { /* black level of DOL mode */ + for (i = 0; i < OT_ISP_WDR_MAX_FRAME_NUM; i++) { + black_level->auto_attr.black_level[i][0] = 0x410; + black_level->auto_attr.black_level[i][1] = 0x410; + black_level->auto_attr.black_level[i][2] = 0x410; /* index 2 */ + black_level->auto_attr.black_level[i][3] = 0x410; /* index 3 */ + } + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear 4M30fps mode\n"); + break; + + case OT_WDR_MODE_2To1_LINE: + sns_state->wdr_mode = OT_WDR_MODE_2To1_LINE; + printf("2to1 line WDR 4M30fps mode!\n"); + break; + + default: + isp_err_trace("Not support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_sc450ai_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = 9; /* reg num 9 */ + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].reg_num += 8; /* regs +8 */ + } + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = SC450AI_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = SC450AI_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = SC450AI_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].reg_addr = SC450AI_EXP_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].reg_addr = SC450AI_EXP_ADDR + 1; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].reg_addr = SC450AI_EXP_ADDR + 2; /* add 2 */ + + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].reg_addr = SC450AI_DGAIN_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].reg_addr = SC450AI_DGAIN_ADDR + 1; + + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].reg_addr = SC450AI_AGAIN_ADDR; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].reg_addr = SC450AI_AGAIN_ADDR + 1; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].reg_addr = SC450AI_VMAX_ADDR; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].reg_addr = SC450AI_VMAX_ADDR + 1; + return; +} + +static td_void cmos_2to1_line_wdr_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].reg_addr = SC450AI_SEXP_ADDR; + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].reg_addr = SC450AI_SEXP_ADDR + 1; + + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].reg_addr = SC450AI_SDGAIN_ADDR; + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].reg_addr = SC450AI_SDGAIN_ADDR + 1; + + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].reg_addr = SC450AI_SAGAIN_ADDR; + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].reg_addr = SC450AI_SAGAIN_ADDR + 1; + + sns_state->regs_info[0].i2c_data[SEXP_MAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SEXP_MAX_L_IDX].reg_addr = SC450AI_SEXP_MAX_ADDR; + sns_state->regs_info[0].i2c_data[SEXP_MAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SEXP_MAX_H_IDX].reg_addr = SC450AI_SEXP_MAX_ADDR + 1; + + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + if ((sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].update || + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].update || + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].update || + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].update || + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].update || + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].update) == TD_TRUE) { + sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[SEXP_MAX_L_IDX].update = TD_TRUE; + } else { + sns_state->regs_info[0].i2c_data[SEXPO_L_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SEXPO_H_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SDGAIN_L_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SDGAIN_H_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SAGAIN_L_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SAGAIN_H_IDX].update = TD_FALSE; + sns_state->regs_info[0].i2c_data[SEXP_MAX_L_IDX].update = TD_FALSE; + } + } else { + } + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + /* DOL 2t1 Mode Regs */ + cmos_2to1_line_wdr_sns_reg_info_init(vi_pipe, sns_state); + } + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sensor_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sensor_image_mode) { + case SC450AI_4M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = SC450AI_VMAX_4M_30FPS_12BIT_LINEAR << 1; + break; + case SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE: + sns_state->fl_std = SC450AI_VMAX_4M_30FPS_2TO1_WDR << 1; + break; + default: + sns_state->fl_std = SC450AI_VMAX_4M_30FPS_12BIT_LINEAR << 1; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < SC450AI_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_sc450ai_mode_tbl[i].max_fps && + sns_image_mode->width <= g_sc450ai_mode_tbl[i].width && + sns_image_mode->height <= g_sc450ai_mode_tbl[i].height && + sns_state->wdr_mode == g_sc450ai_mode_tbl[i].wdr_mode) { + image_mode = (sc450ai_res_mode)i; + break; + } + } + + if (i >= SC450AI_MODE_BUTT) { + sc450ai_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = SC450AI_4M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = SC450AI_VMAX_4M_30FPS_12BIT_LINEAR << 1; + sns_state->fl[0] = SC450AI_VMAX_4M_30FPS_12BIT_LINEAR << 1; + sns_state->fl[1] = SC450AI_VMAX_4M_30FPS_12BIT_LINEAR << 1; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == SC450AI_4M_30FPS_12BIT_LINEAR_MODE) { + full_lines_5fps = (SC450AI_VMAX_4M_30FPS_12BIT_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + if (enable) { /* setup for ISP pixel calibration mode */ + sc450ai_write_register(vi_pipe, SC450AI_AGAIN_ADDR, 0x03); + sc450ai_write_register(vi_pipe, SC450AI_AGAIN_ADDR + 1, 0x40); + + sc450ai_write_register(vi_pipe, SC450AI_DGAIN_ADDR, 0x00); + sc450ai_write_register(vi_pipe, SC450AI_DGAIN_ADDR + 1, 0x80); + + sc450ai_write_register(vi_pipe, SC450AI_VMAX_ADDR, low_8bits(full_lines_5fps)); + sc450ai_write_register(vi_pipe, SC450AI_VMAX_ADDR + 1, high_8bits(full_lines_5fps)); + + sc450ai_write_register(vi_pipe, SC450AI_EXP_ADDR, low_8bits(full_lines_5fps - 10)); + sc450ai_write_register(vi_pipe, SC450AI_EXP_ADDR + 1, high_8bits(full_lines_5fps - 10)); + sc450ai_write_register(vi_pipe, SC450AI_EXP_ADDR + 2, lower_4bits(full_lines_5fps - 10)); /* index 2 */ + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > SC450AI_FULL_LINES_MAX) ? SC450AI_FULL_LINES_MAX : sns_state->fl_std; + sc450ai_write_register(vi_pipe, SC450AI_VMAX_ADDR, low_8bits(sns_state->fl_std)); + sc450ai_write_register(vi_pipe, SC450AI_VMAX_ADDR + 1, high_8bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + return; +} + + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = sc450ai_init; + sensor_exp_func->pfn_cmos_sns_exit = sc450ai_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 sc450ai_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_sc450ai_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + sc450ai_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + sc450ai_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + sc450ai_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = SC450AI_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, SC450AI_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, SC450AI_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, SC450AI_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_sc450ai_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = sc450ai_standby, + .pfn_restart = sc450ai_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = TD_NULL, + .pfn_write_reg = sc450ai_write_register, + .pfn_read_reg = sc450ai_read_register, + .pfn_set_bus_info = sc450ai_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.h b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.h new file mode 100644 index 0000000..f14156e --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos.h @@ -0,0 +1,105 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef SC450AI_CMOS_H +#define SC450AI_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef clip3 +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif + + +#define SC450AI_I2C_ADDR 0x60 +#define SC450AI_ADDR_BYTE 2 +#define SC450AI_DATA_BYTE 1 +#define sc450ai_sensor_get_ctx(dev, ctx) ((ctx) = sc450ai_get_ctx(dev)) + +#define SC450AI_FULL_LINES_MAX 0x4920 +#define SC450AI_FULL_LINES_MAX_2TO1_WDR 0x2490 + +/******** SC450AI Register Address ********/ +#define SC450AI_EXP_ADDR 0x3E00 +#define SC450AI_SEXP_ADDR 0x3E04 +#define SC450AI_AGAIN_ADDR 0x3E08 +#define SC450AI_SAGAIN_ADDR 0x3E12 +#define SC450AI_DGAIN_ADDR 0x3E06 +#define SC450AI_SDGAIN_ADDR 0x3E10 +#define SC450AI_VMAX_ADDR 0x320E +#define SC450AI_SEXP_MAX_ADDR 0x3E23 + +#define SC450AI_INCREASE_LINES 0 /* make real fps less than stand fps because NVR require */ +#define SC450AI_VMAX_4M_30FPS_12BIT_LINEAR (1560 + SC450AI_INCREASE_LINES) +#define SC450AI_VMAX_4M_30FPS_2TO1_WDR (3120 + SC450AI_INCREASE_LINES) + +#define SC450AI_FRAME_RATE_MIN 0x9240 /* Min:2.5fps */ +#define EXP_OFFSET_LINEAR 10 +#define EXP_OFFSET_WDR 18 +#define SEXP_OFFSET_WDR 11 +#define SC450AI_SEXP_MAX_DEFAULT 0x178 + +typedef enum { + EXPO_L_IDX = 0, + EXPO_M_IDX, + EXPO_H_IDX, + DGAIN_L_IDX, + DGAIN_H_IDX, + AGAIN_L_IDX, + AGAIN_H_IDX, + VMAX_L_IDX, + VMAX_H_IDX, + REG_REV1, + SEXPO_L_IDX, + SEXPO_H_IDX, + SDGAIN_L_IDX, + SDGAIN_H_IDX, + SAGAIN_L_IDX, + SAGAIN_H_IDX, + SEXP_MAX_L_IDX, + SEXP_MAX_H_IDX +}sc450ai_reg_index; + +typedef enum { + SC450AI_4M_30FPS_12BIT_LINEAR_MODE = 0, + SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE = 1, + SC450AI_MODE_BUTT +} sc450ai_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} sc450ai_video_mode_tbl; + +ot_isp_sns_state *sc450ai_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *sc450ai_get_bus_info(ot_vi_pipe vi_pipe); + +td_void sc450ai_init(ot_vi_pipe vi_pipe); +td_void sc450ai_exit(ot_vi_pipe vi_pipe); +td_void sc450ai_standby(ot_vi_pipe vi_pipe); +td_void sc450ai_restart(ot_vi_pipe vi_pipe); +td_s32 sc450ai_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 sc450ai_read_register(ot_vi_pipe vi_pipe, td_u32 addr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* SC450AI_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos_ex.h b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos_ex.h new file mode 100644 index 0000000..df0894a --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_cmos_ex.h @@ -0,0 +1,4399 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef SC450AI_CMOS_EX_H +#define SC450AI_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x410, 0x410, 0x410, 0x410}, + {0x410, 0x410, 0x410, 0x410}, + {0x410, 0x410, 0x410, 0x410}, + {0x410, 0x410, 0x410, 0x410}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 2592, 14}, /* ob_area */ + 0, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x410, 0x410, 0x410, 0x410}, /* black level */ + {0x410, 0x410, 0x410, 0x410}, /* black level */ + {0x410, 0x410, 0x410, 0x410}, /* black level */ + {0x410, 0x410, 0x410, 0x410}, /* black level */ + }, + }, + { + {2688, 1520}, + }, +}; + +static const ot_isp_cmos_black_level g_cmos_blc_wdr = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 3840, 20}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + }, + }, + { + {2688, 1520}, + }, +}; +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 100, 100, 100, 150, 180, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, /* strength[16] */ + { 0, 0, 0, 0, 10, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 230, 230, 230, 230, 230, 248, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* aidm_blend_ratio */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + {32, 32, 32, 35, 35, 32, 28, 28, 24, 20, 20, 20, 16, 16, 16, 16}, + /* nddm_hf_detail_strength */ + {0, 0, 0, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, + /* detail_smooth_range */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 4, 4, 4, 4, 4, 4}, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 24, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 8, 8, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + { + 6400.0000000000, 0.0001279210, 0.0016242186, 0.0000000204, -0.0000027303, 0.1199406222, + 0.0001268708, 0.0040083983, -0.0000000102, 0.0001914447, 0.0227515276, 0, 0, 0, 0, 0 + } +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr_wdr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{48, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {45, 80, 0}}, + {{32, 64, 0}, {24, 72, 0}}, + {{12, 24, 0}, {12, 64, 0}}, + {{8, 20, 0}, {8, 54, 0}}, + {{6, 12, 0}, {6, 36, 0}}, + {{0, 8, 0}, {0, 8, 0}}, + {{0, 6, 0}, {0, 6, 0}}, + {{0, 2, 0}, {0, 2, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 1, + { + 0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, + 259, 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, + 467, 477, 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, + 671, 683, 695, 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, + 885, 896, 906, 917, 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, + 1085, 1096, 1107, 1118, 1129, 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, + 1274, 1284, 1295, 1305, 1315, 1325, 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, + 1468, 1480, 1493, 1499, 1505, 1511, 1518, 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, + 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, + 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, + 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, + 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, 2036, 2042, 2047, 2052, 2058, 2063, 2068, + 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, 2135, 2140, 2145, 2150, 2154, 2159, + 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, 2226, 2231, 2235, 2240, 2244, + 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, 2312, 2317, 2321, 2325, + 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, 2392, 2396, 2400, + 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, 2466, 2470, + 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, 2538, + 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, + 2665, 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, + 2723, 2727, 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, + 2781, 2784, 2787, 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, + 2837, 2840, 2843, 2846, 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, + 2890, 2893, 2896, 2899, 2902, 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, + 2941, 2944, 2946, 2949, 2952, 2954, 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, + 2988, 2990, 2993, 2995, 2998, 3000, 3002, 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, + 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, + 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, + 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, + 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, 3177, 3179, 3182, 3184, 3186, 3188, 3190, + 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, 3217, 3219, 3221, 3223, 3225, 3227, + 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, 3256, 3258, 3260, 3262, 3264, + 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, 3293, 3295, 3297, 3299, + 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, 3330, 3332, 3334, + 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, 3366, 3368, + 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, 3401, + 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, + 3470, 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, + 3506, 3508, 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, + 3544, 3546, 3548, 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, + 3582, 3585, 3587, 3589, 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, + 3620, 3622, 3624, 3626, 3628, 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, + 3657, 3659, 3661, 3663, 3665, 3667, 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, + 3693, 3695, 3697, 3699, 3701, 3704, 3706, 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, + 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, + 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, + 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, + 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, 3857, 3858, 3860, 3862, 3864, 3866, 3868, + 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, + 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, 3928, 3930, 3932, 3934, 3935, + 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, + 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, 3998, 4000, 4001, + 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, 4032, 4034, + 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, 4066, + 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095, + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + { + 0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, + 89, 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, + 176, 181, 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, + 263, 268, 273, 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, + 351, 356, 361, 366, 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, + 441, 446, 451, 456, 461, 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, + 535, 540, 545, 551, 556, 561, 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, + 633, 639, 645, 650, 656, 662, 667, 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, + 738, 744, 750, 756, 762, 768, 774, 780, 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, + 849, 855, 861, 867, 874, 880, 886, 893, 899, 905, 912, 918, 925, 931, 937, 944, 950, 957, + 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, + 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, 1152, 1159, 1165, 1172, 1178, 1185, 1191, + 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, 1276, 1283, 1289, 1295, 1302, 1308, + 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, 1398, 1404, 1411, 1417, 1423, + 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, 1517, 1524, 1530, 1536, + 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, 1639, 1645, 1652, + 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, 1761, 1768, + 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, 1883, + 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, + 2107, 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, + 2206, 2212, 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, + 2297, 2302, 2307, 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, + 2381, 2385, 2390, 2394, 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, + 2458, 2462, 2467, 2471, 2475, 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, + 2531, 2535, 2539, 2543, 2547, 2551, 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, + 2601, 2604, 2608, 2612, 2616, 2619, 2623, 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, + 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, + 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, + 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, + 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, 2901, 2904, 2908, 2911, 2914, 2918, 2921, + 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, 2964, 2967, 2971, 2974, 2977, 2981, + 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, 3026, 3029, 3032, 3035, 3038, + 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, 3086, 3089, 3092, 3095, + 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, 3144, 3147, 3150, + 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, 3200, 3203, + 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, 3255, + 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, + 3359, 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, + 3407, 3410, 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, + 3455, 3457, 3460, 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, + 3501, 3504, 3506, 3509, 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, + 3546, 3549, 3551, 3554, 3556, 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, + 3591, 3593, 3596, 3598, 3601, 3603, 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, + 3634, 3637, 3639, 3642, 3644, 3646, 3649, 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, + 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, + 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, + 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, + 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, 3825, 3827, 3829, 3831, 3834, 3836, 3838, + 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, 3866, 3868, 3870, 3873, 3875, 3877, + 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, 3907, 3909, 3911, 3913, 3915, + 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, 3946, 3949, 3951, 3953, + 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, 3986, 3988, 3990, + 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4024, 4026, + 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, 4062, + 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095, + }, + 3, +}; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 4, + /* motion_threshold1 */ + 10, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 255, + /* skin_umin */ + 99, + /* skin_vmin */ + 134, + /* skin_umax */ + 127, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 19, 19, 19, 19, 19 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 20, 20, 20, 20, 20 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 21, 21, 21, 21, 21 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 23, 23, 23, 23, 22, 22, 22, 22, 22 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 23, 23, 23, 23, 23 }, + { 31, 31, 28, 27, 27, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 31, 31, 28, 27, 27, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 27, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 31, 31, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 31, 31, 28, 28, 28, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 29, 29, 29, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 30, 30, 30, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 26, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 25, 27, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 88, 88, 88, 82, 82, 82, 75, 75, 75, 68, 68, 68, 68, 68, 68, 68 }, + { 95, 95, 95, 88, 88, 88, 80, 85, 81, 73, 73, 73, 73, 73, 73, 73 }, + { 104, 104, 104, 96, 96, 96, 88, 95, 89, 80, 80, 80, 80, 80, 80, 80 }, + { 116, 116, 116, 107, 107, 107, 98, 108, 101, 89, 89, 89, 89, 89, 89, 89 }, + { 127, 127, 127, 118, 118, 118, 108, 121, 114, 98, 98, 98, 98, 98, 98, 98 }, + { 139, 139, 139, 128, 128, 128, 118, 136, 130, 107, 107, 107, 107, 107, 107, 107 }, + { 150, 150, 150, 138, 138, 138, 127, 151, 145, 115, 115, 115, 115, 115, 115, 115 }, + { 156, 156, 156, 144, 144, 144, 132, 163, 157, 120, 120, 120, 120, 120, 120, 120 }, + { 160, 160, 160, 148, 148, 148, 135, 171, 164, 123, 123, 123, 123, 123, 123, 123 }, + { 163, 163, 163, 150, 150, 150, 138, 177, 169, 125, 125, 125, 125, 125, 125, 125 }, + { 165, 165, 165, 152, 152, 152, 140, 181, 171, 127, 127, 127, 127, 127, 127, 127 }, + { 166, 166, 166, 154, 154, 154, 141, 183, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 166, 166, 166, 154, 154, 154, 141, 184, 173, 128, 128, 128, 128, 128, 128, 128 }, + { 165, 165, 165, 152, 152, 152, 140, 182, 173, 127, 127, 127, 127, 127, 127, 127 }, + { 164, 164, 164, 151, 151, 151, 139, 180, 171, 126, 126, 126, 126, 126, 126, 126 }, + { 161, 161, 161, 149, 149, 149, 136, 176, 168, 124, 124, 124, 124, 124, 124, 124 }, + { 157, 157, 157, 145, 145, 145, 133, 171, 165, 121, 121, 121, 121, 121, 121, 121 }, + { 152, 152, 152, 140, 140, 140, 129, 165, 162, 117, 117, 117, 117, 117, 117, 117 }, + { 147, 147, 147, 136, 136, 136, 124, 159, 157, 113, 113, 113, 113, 113, 113, 113 }, + { 140, 140, 140, 130, 130, 130, 119, 151, 152, 108, 108, 108, 108, 108, 108, 108 }, + { 133, 133, 133, 122, 122, 122, 112, 142, 145, 102, 102, 102, 102, 102, 102, 102 }, + { 125, 125, 125, 115, 115, 115, 106, 133, 137, 96, 96, 96, 96, 96, 96, 96 }, + { 117, 117, 117, 108, 108, 108, 99, 123, 129, 90, 90, 90, 90, 90, 90, 90 }, + { 111, 111, 111, 102, 102, 102, 94, 113, 120, 85, 85, 85, 85, 85, 85, 85 }, + { 103, 103, 103, 95, 95, 95, 87, 103, 111, 79, 79, 79, 79, 79, 79, 79 }, + { 95, 95, 95, 88, 88, 88, 80, 93, 102, 73, 73, 73, 73, 73, 73, 73 }, + { 87, 87, 87, 80, 80, 80, 74, 83, 93, 67, 67, 67, 67, 67, 67, 67 }, + { 78, 78, 78, 72, 72, 72, 66, 73, 84, 60, 60, 60, 60, 60, 60, 60 }, + { 70, 70, 70, 65, 65, 65, 59, 65, 73, 54, 54, 54, 54, 54, 54, 54 }, + { 62, 62, 62, 58, 58, 58, 53, 56, 62, 48, 48, 48, 48, 48, 48, 48 }, + { 57, 57, 57, 53, 53, 53, 48, 49, 51, 44, 44, 44, 44, 44, 44, 44 }, + { 52, 52, 52, 48, 48, 48, 44, 44, 44, 40, 40, 40, 40, 40, 40, 40 } + }, + /* edge_strength */ + { + { 183, 183, 183, 183, 183, 203, 203, 203, 223, 223, 223, 223, 223, 223, 223, 223 }, + { 186, 186, 186, 186, 186, 207, 207, 207, 228, 228, 228, 228, 228, 228, 228, 228 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 197, 197, 197, 197, 197, 219, 219, 219, 241, 241, 241, 241, 241, 241, 241, 241 }, + { 203, 203, 203, 203, 203, 226, 226, 226, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 209, 209, 209, 209, 209, 232, 232, 232, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 214, 214, 214, 214, 214, 238, 238, 238, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 229, 229, 229, 229, 229, 254, 254, 254, 279, 279, 279, 279, 279, 279, 279, 279 }, + { 228, 228, 228, 228, 228, 253, 253, 253, 278, 278, 278, 278, 278, 278, 278, 278 }, + { 226, 226, 226, 226, 226, 251, 251, 251, 276, 276, 276, 276, 276, 276, 276, 276 }, + { 224, 224, 224, 224, 224, 249, 249, 249, 274, 274, 274, 274, 274, 274, 274, 274 }, + { 221, 221, 221, 221, 221, 246, 246, 246, 271, 271, 271, 271, 271, 271, 271, 271 }, + { 219, 219, 219, 219, 219, 243, 243, 243, 267, 267, 267, 267, 267, 267, 267, 267 }, + { 215, 215, 215, 215, 215, 239, 239, 239, 263, 263, 263, 263, 263, 263, 263, 263 }, + { 211, 211, 211, 211, 211, 234, 234, 234, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 205, 205, 205, 205, 205, 228, 228, 228, 251, 251, 251, 251, 251, 251, 251, 251 }, + { 199, 199, 199, 199, 199, 221, 221, 221, 243, 243, 243, 243, 243, 243, 243, 243 }, + { 191, 191, 191, 191, 191, 212, 212, 212, 233, 233, 233, 233, 233, 233, 233, 233 }, + { 182, 182, 182, 182, 182, 202, 202, 202, 222, 222, 222, 222, 222, 222, 222, 222 }, + { 171, 171, 171, 171, 171, 190, 190, 190, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 159, 159, 159, 159, 159, 177, 177, 177, 195, 195, 195, 195, 195, 195, 195, 195 }, + { 149, 149, 149, 149, 149, 165, 165, 165, 182, 182, 182, 182, 182, 182, 182, 182 }, + { 139, 139, 139, 139, 139, 154, 154, 154, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 130, 130, 130, 130, 130, 144, 144, 144, 158, 158, 158, 158, 158, 158, 158, 158 }, + { 123, 123, 123, 123, 123, 137, 137, 137, 151, 151, 151, 151, 151, 151, 151, 151 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 200, 190, 180, 180, 170, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 120, 120, 110, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 45, 40, 40, 40, 40, 40, 40, 40, 40 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149 }, + { 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170 }, + { 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180 }, + { 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190 }, + { 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202 }, + { 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213 }, + { 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224 }, + { 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235 }, + { 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262 }, + { 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273 }, + { 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272 }, + { 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269 }, + { 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264 }, + { 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257 }, + { 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249 }, + { 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240 }, + { 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, + { 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219 }, + { 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209 }, + { 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198 }, + { 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188 }, + { 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178 }, + { 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169 }, + { 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 }, + { 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155 }, + { 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 7, 7, 6, 6, 5, 5, 4, 4, 3, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 6, 6, 5, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 58, 58, 58, 58, 60, 60, 60, 52, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 20, 18, 16, 15, 15, 15, 15, 15, 15, 15 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {24, 16, 12, 16, 16, 16, 16, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 18, 12, 18, 18, 18, 18, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 19, 12, 19, 19, 19, 19, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 20, 12, 20, 20, 20, 20, 12, 5, 5, 5, 5, 5, 5, 5, 5 }, + {26, 21, 13, 21, 21, 21, 21, 13, 6, 6, 6, 6, 6, 6, 6, 6 }, + {27, 22, 14, 22, 22, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8 }, + {27, 22, 16, 22, 22, 22, 22, 16, 12, 12, 12, 12, 12, 12, 12, 12 }, + {28, 23, 19, 23, 23, 23, 23, 19, 17, 17, 17, 17, 17, 17, 17, 17 }, + {28, 24, 22, 24, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + {29, 25, 25, 25, 25, 25, 25, 25, 26, 26, 26, 26, 26, 26, 26, 26 }, + {29, 26, 27, 26, 26, 26, 26, 27, 28, 28, 28, 28, 28, 28, 28, 28 }, + {29, 27, 28, 27, 27, 27, 27, 28, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 27, 30, 27, 27, 27, 27, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 28, 31, 28, 28, 28, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {140, 140, 140, 48, 48, 61, 61, 61, 61, 61, 61, 29, 0, 0, 0, 0}, + {143, 143, 143, 56, 51, 66, 66, 66, 66, 66, 66, 31, 3, 3, 3, 3}, + {147, 147, 147, 64, 56, 72, 72, 72, 72, 72, 72, 34, 6, 6, 6, 6}, + {150, 150, 150, 73, 62, 80, 80, 80, 80, 80, 80, 38, 10, 10, 10, 10}, + {154, 154, 154, 82, 68, 89, 89, 89, 89, 89, 89, 42, 15, 15, 15, 15}, + {157, 157, 157, 92, 75, 98, 98, 98, 98, 98, 98, 47, 21, 21, 21, 21}, + {160, 160, 160, 101, 82, 105, 105, 105, 105, 105, 105, 52, 27, 27, 27, 27}, + {163, 163, 163, 111, 90, 112, 112, 112, 112, 112, 112, 57, 33, 33, 33, 33}, + {166, 166, 166, 120, 97, 117, 117, 117, 117, 117, 117, 62, 40, 40, 40, 40}, + {168, 168, 168, 128, 104, 122, 122, 122, 122, 122, 122, 66, 49, 49, 49, 49}, + {171, 171, 171, 136, 111, 127, 127, 127, 127, 127, 127, 71, 58, 58, 58, 58}, + {174, 174, 174, 142, 117, 132, 132, 132, 132, 132, 132, 75, 67, 67, 67, 67}, + {176, 176, 176, 148, 122, 136, 136, 136, 136, 136, 136, 78, 77, 77, 77, 77}, + {178, 178, 178, 152, 126, 139, 139, 139, 139, 139, 139, 80, 85, 85, 85, 85}, + {179, 179, 179, 155, 128, 140, 140, 140, 140, 140, 140, 82, 91, 91, 91, 91}, + {179, 179, 179, 156, 129, 141, 141, 141, 141, 141, 141, 83, 95, 95, 95, 95}, + {177, 177, 177, 155, 129, 140, 140, 140, 140, 140, 140, 82, 97, 97, 97, 97}, + {175, 175, 175, 152, 127, 137, 137, 137, 137, 137, 137, 81, 96, 96, 96, 96}, + {173, 173, 173, 148, 124, 134, 134, 134, 134, 134, 134, 78, 95, 95, 95, 95}, + {169, 169, 169, 142, 119, 129, 129, 129, 129, 129, 129, 76, 92, 92, 92, 92}, + {165, 165, 165, 136, 114, 124, 124, 124, 124, 124, 124, 72, 88, 88, 88, 88}, + {161, 161, 161, 128, 109, 118, 118, 118, 118, 118, 118, 68, 84, 84, 84, 84}, + {155, 155, 155, 120, 102, 113, 113, 113, 113, 113, 113, 64, 79, 79, 79, 79}, + {149, 149, 149, 111, 96, 108, 108, 108, 108, 108, 108, 59, 75, 75, 75, 75}, + {142, 142, 142, 102, 89, 103, 103, 103, 103, 103, 103, 55, 70, 70, 70, 70}, + {134, 134, 134, 93, 82, 97, 97, 97, 97, 97, 97, 50, 65, 65, 65, 65}, + {125, 125, 125, 84, 76, 91, 91, 91, 91, 91, 91, 45, 58, 58, 58, 58}, + {115, 115, 115, 76, 70, 85, 85, 85, 85, 85, 85, 41, 52, 52, 52, 52}, + {105, 105, 105, 68, 64, 80, 80, 80, 80, 80, 80, 37, 45, 45, 45, 45}, + { 95, 95, 95, 61, 59, 75, 75, 75, 75, 75, 75, 34, 39, 39, 39, 39}, + { 85, 85, 85, 56, 55, 70, 70, 70, 70, 70, 70, 31, 34, 34, 34, 34}, + { 75, 75, 75, 52, 52, 67, 67, 67, 67, 67, 67, 29, 31, 31, 31, 31} + }, + /* edge_strength */ + { + { 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72}, + { 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77}, + { 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83}, + { 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91}, + { 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, + {109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109}, + {119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119}, + {129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129}, + {139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166}, + {173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181}, + {183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183}, + {182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182}, + {179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179}, + {174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168}, + {160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + {152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134}, + {124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124}, + {114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114}, + {105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105}, + { 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96}, + { 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88}, + { 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81}, + { 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75}, + { 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 240, 220, 180, 180, 180, 160, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 100, 100, 100, 100, 100, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 40, 40, 40, 40, 36, 36}, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + {60, 60, 60, 60, 60, 60, 60, 60, 50, 50, 40, 40, 40, 40, 40, 40 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 6, 6, 6, 6, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8}, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + {128, 128, 128, 128, 128, 128, 128, 120, 115, 110, 110, 110, 103, 100, 100, 100}, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 20, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x0196, 0x8092, 0x8004, 0x805B, 0x01B4, 0x8059, 0x801A, 0x808C, 0x01A6 }, + }, + { + /* color temperature */ + 4949, + /* CCM matrix */ + { 0x01A0, 0x809F, 0x8001, 0x8066, 0x01A7, 0x8041, 0x800C, 0x80F1, 0x01FD }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x01A0, 0x8084, 0x801C, 0x8083, 0x01C3, 0x8040, 0x0008, 0x811E, 0x0216 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x02A7, 0x81CC, 0x0025, 0x806D, 0x01A6, 0x8039, 0x802A, 0x8133, 0x025D }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm_wdr = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x0168, 0x8058, 0x8010, 0x8060, 0x01C5, 0x8065, 0x8009, 0x8066, 0x016F }, + }, + { + /* color temperature */ + 4850, + /* CCM matrix */ + { 0x015E, 0x8054, 0x800A, 0x805B, 0x01B0, 0x8055, 0x8003, 0x8064, 0x0167 }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x0173, 0x8067, 0x800C, 0x8073, 0x01AE, 0x803B, 0x8001, 0x8070, 0x0171 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x0173, 0x8067, 0x800C, 0x8073, 0x01AE, 0x803B, 0x8001, 0x8070, 0x0171 }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 128, 128, 128, 128, 124, 120, 116, 112, 108, 104, 100, 94, 90, 90, 90, 90 } +}; + +static ot_isp_awb_agc_table g_awb_agc_table_wdr = { + /* bvalid */ + 1, + /* saturation */ + { 128, 118, 116, 112, 108, 102, 90, 78, 68, 64, 56, 56, 56, 56, 56, 56} +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 0x8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 0x14, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0x0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + /* CA */ + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + /* ISO */ + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42}, + /* y_grid_width */ + {23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 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457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 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380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 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455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 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505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + }, + + /* acs_color_shading_lut */ + { + /* avg_rg_map */ + { + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 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1064305665, + 7335946, 74448875, 1058014210, 1062208514, 10483716, 95429574, 1052770310, 1055912960, 13631487, + 1019170981, 993981691, 987691259, 1043463, 1034905742, 1020204248, 1011815642, 1044485, 1050639479, + 1046426804, 1035941049, 1046531, 1066374239, 1072649360, 1061114008, 1047553, 8367173, 26179691, + 11497590, 1047552, 25150506, 54500420, 37720146, 0, 42983437, 82821147, 63942701, + 1023, 60817391, 112192497, 90166279, 0, 77602768, 1005525210, 117439456, 0, + 1030713479, 1027552444, 1000283352, 0, 1043300468, 1050628253, 1021260988, 0, 1054839905, + 1073704062, 1042239648, 0, 1067427918, 23038046, 1063217283, 0, 6274105, 47163452, + 10454118, 0, 19910691, 71288858, 31432776, 0, 33548299, 95415286, 53460009, + 0, 47185907, 1017067706, 76535816, 0, 59774938, 1034899616, 98565096, 0, + 1042255977, 1053780102, 1013924021, 0, 1051696219, 1073709163, 1030706333, 0, 1060088908, + 18847824, 1047489670, 0, 1069530172, 38777908, 1065320558, 0, 4181036, 58706967, + 8362070, 0, 13622299, 79686650, 26192957, 0, 24112137, 1027562649, 44024867, + 0, 32506871, 1043296388, 61856777, 0, 42996708, 1057981550, 80739310, 0, + 1053798475, 1073715289, 1026516114, 0, 1059043393, 15707203, 1040152703, 0, 1065337910, + 31440940, 1053788268, 0, 1070583851, 47174677, 1067423833, 0, 2087967, 63959037, + 7318598, 0, 8382483, 1039106168, 20954162, 0, 14676999, 1050644584, 34590749, + 0, 19923962, 1062181975, 49275912, 0, 26218477, 1073720390, 62913523, 0, + 1065339949, 12565557, 1040156783, 0, 1067439143, 24103971, 1049598049, 0, 1069538336, + 36691985, 1059038290, 0, 1071637529, 48231422, 1069527108, 0, 1073736722, 1050648663, + 5226549, 0, 3141643, 1057991755, 15715366, 0, 5240836, 1066383423, 26205206, + 0, 6292477, 1033267, 36695046, 0, 9440246, 9424934, 47184887, 0, + 1042447, 17816601, 1052748876, 0, 1044493, 26208268, 1059043394, 0, 1045514, + 34600959, 1065336888, 0, 1072691208, 1061143607, 1071631406, 0, 1071643653, 1065339951, + 4183076, 0, 1070595075, 1070584871, 10477593, 0, 1068498946, 1039391, 17819663, + 0, 1067450368, 6284311, 24114180, 0, 1067452415, 10480655, 31457274, 0, + 1042417, 15725575, 1065340970, 0, 1046514, 20970495, 1068488740, 0, 1011, + 1072686103, 1070586910, 0, 4086, 1073735699, 1073734680, 0, 1068503033, 1043471, + 3139603, 0, 1064307708, 2093068, 6287373, 0, 1060111360, 3142664, 9434119, + 0, 1055917060, 4192261, 12580866, 0, 1043325952, 6290434, 14681084, 0, + 980346125, 6292479, 1043464, 0, 1006568682, 1044470, 1044486, 0, 1032791238, + 1046518, 1045508, 0, 1060062370, 1048566, 1046530, 0, 12544126, 2039, + 1047553, 0, 40863832, 1072696313, 0, 0, 69184560, 1070599162, 1023, + 0, 97506310, 1068500989, 1023, 0, 126877660, 1066402816, 0, 0, + 993986794, 0, 0, 0, 1016014027, 0, 0, 0, 1039089837, + 0, 0, 0, 1062165645, 0, 0, 0, 11499630, 0, + 0, 0, 34576461, 0, 0, 0, 58701867, 0, 0, + 0, 83875848, 0, 0, 0, 108002276, 0, 0, 0, + 1007628486, 0, 0, 0, 1025459373, 0, 0, 0, 1044339859, + 0, 0, 0, 1064268921, 0, 0, 0, 9407582, 0, + 0, 0, 29337666, 0, 0, 0, 49266726, 0, 0, + 0, 69196809, 0, 0, 0, 89127915, 0, 0, 0, + 1020220579, 0, 0, 0, 1035954318, 0, 0, 0, 1050638457, + 0, 0, 0, 1066372196, 0, 0, 0, 7315534, 0, + 0, 0, 23049271, 0, 0, 0, 39832608, 0, 0, + 0, 55566345, 0, 0, 0, 71302129, 0, 0, 0, + 1033861248, 0, 0, 0, 1045399664, 0, 0, 0, 1056937055, + 0, 0, 0, 1068475470, 0, 0, 0, 6272061, 0, + 0, 0, 17810476, 0, 0, 0, 30398490, 0, 0, + 0, 42985479, 0, 0, 0, 54524917, 0, 0, 0, + 1046453341, 0, 0, 0, 1054845009, 0, 0, 0, 1062188101, + 0, 0, 0, 1070578745, 0, 0, 0, 5228588, 0, + 0, 0, 13620256, 0, 0, 0, 22011923, 0, 0, + 0, 30404613, 0, 0, 0, 38797304, 0, 0, 0, + 1059045435, 0, 0, 0, 1063241779, 0, 0, 0, 1068486699, + 0, 0, 0, 1072683043, 0, 0, 0, 3137563, 0, + 0, 0, 8382483, 0, 0, 0, 13627403, 0, 0, + 0, 17822723, 0, 0, 0, 23068667, 0, 0, 0, + 1071637529, 0, 0, 0, 1072687125, 0, 0, 0, 1073736721, + 0, 0, 0, 1044493, 0, 0, 0, 2094090, 0, + 0, 0, 3143686, 0, 0, 0, 5241859, 0, 0, + 0, 6290433, 0, 0, 0, 7341054, 0, 0, 0, + 1042423, 0, 0, 0, 1045494, 0, 0, 0, 1047542, + 0, 0, 0, 1015, 0, 0, 0, 3064, 0, + 0, 0, 1071647738, 0, 0, 0, 1069550588, 0, 0, + 0, 1067452414, 0, 0, 0, 1065352192, 0, 0, 0, + } + }, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* SC450AI_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_sensor_ctl.c b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_sensor_ctl.c new file mode 100644 index 0000000..b81456f --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc450ai/sc450ai_sensor_ctl.c @@ -0,0 +1,676 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif + +#include "sc450ai_cmos.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int sc450ai_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *sc450aibusinfo = TD_NULL; + sc450aibusinfo = sc450ai_get_bus_info(vi_pipe); + dev_num = sc450aibusinfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (SC450AI_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int sc450ai_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 sc450ai_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 sc450ai_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = SC450AI_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = SC450AI_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = SC450AI_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (SC450AI_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + buf[idx] = addr & 0xff; + idx++; + } + + if (SC450AI_DATA_BYTE == 2) { /* 2 byte */ + buf[idx] = (data >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = data & 0xff; + idx++; + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, SC450AI_ADDR_BYTE + SC450AI_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void sc450ai_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void sc450ai_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void sc450ai_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +static td_s32 sc450ai_linear_4m30_10bit_init(ot_vi_pipe vi_pipe); +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init(ot_vi_pipe vi_pipe); + +static void sc450ai_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastsc450ai = TD_NULL; + + pastsc450ai = sc450ai_get_ctx(vi_pipe); + for (i = 0; i < pastsc450ai->regs_info[0].reg_num; i++) { + ret += sc450ai_write_register(vi_pipe, + pastsc450ai->regs_info[0].i2c_data[i].reg_addr, + pastsc450ai->regs_info[0].i2c_data[i].data); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void sc450ai_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_u8 img_mode; + td_bool init; + td_s32 ret; + ot_isp_sns_state *pastsc450ai = TD_NULL; + + pastsc450ai = sc450ai_get_ctx(vi_pipe); + init = pastsc450ai->init; + wdr_mode = pastsc450ai->wdr_mode; + img_mode = pastsc450ai->img_mode; + + ret = sc450ai_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE == img_mode) { + sc450ai_vc_wdr_2t1_4m30_10bit_init(vi_pipe); + } else { + } + } else { + sc450ai_linear_4m30_10bit_init(vi_pipe); + } + } else { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (SC450AI_4M_30FPS_10BIT_2TO1_VC_MODE == img_mode) { + sc450ai_vc_wdr_2t1_4m30_10bit_init(vi_pipe); + } else { + } + } else { + sc450ai_linear_4m30_10bit_init(vi_pipe); + } + } + + pastsc450ai->init = TD_TRUE; + return; +} + +void sc450ai_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = sc450ai_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("SC450AI exit failed!\n"); + } + + return; +} + +static td_s32 sc450ai_linear_4m30_10bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x0103, 0x01); + delay_ms(100); /* 100ms */ + ret += sc450ai_write_register(vi_pipe, 0x0100, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x36e9, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x36f9, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x301c, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x301f, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x302e, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3208, 0x0a); + ret += sc450ai_write_register(vi_pipe, 0x3209, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x320a, 0x05); + ret += sc450ai_write_register(vi_pipe, 0x320b, 0xf0); + ret += sc450ai_write_register(vi_pipe, 0x320c, 0x02); + ret += sc450ai_write_register(vi_pipe, 0x320d, 0xee); + ret += sc450ai_write_register(vi_pipe, 0x320e, 0x06); + ret += sc450ai_write_register(vi_pipe, 0x320f, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3214, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3215, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3220, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3223, 0xc0); + ret += sc450ai_write_register(vi_pipe, 0x3253, 0x10); + ret += sc450ai_write_register(vi_pipe, 0x325f, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x3274, 0x09); + ret += sc450ai_write_register(vi_pipe, 0x3280, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x3301, 0x07); + ret += sc450ai_write_register(vi_pipe, 0x3306, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x3308, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x330b, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x330e, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3315, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x335d, 0x60); + ret += sc450ai_write_register(vi_pipe, 0x3364, 0x56); + ret += sc450ai_write_register(vi_pipe, 0x338f, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x3390, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3391, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3392, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x3393, 0x07); + ret += sc450ai_write_register(vi_pipe, 0x3394, 0x10); + ret += sc450ai_write_register(vi_pipe, 0x3395, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3396, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3397, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3398, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x3399, 0x10); + ret += sc450ai_write_register(vi_pipe, 0x339a, 0x13); + return ret; +} + +static td_s32 sc450ai_linear_4m30_10bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x339b, 0x15); + ret += sc450ai_write_register(vi_pipe, 0x339c, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x33af, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x360f, 0x13); + ret += sc450ai_write_register(vi_pipe, 0x3621, 0xec); + ret += sc450ai_write_register(vi_pipe, 0x3622, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3625, 0x0b); + ret += sc450ai_write_register(vi_pipe, 0x3627, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x3630, 0x90); + ret += sc450ai_write_register(vi_pipe, 0x3633, 0x56); + ret += sc450ai_write_register(vi_pipe, 0x3637, 0x1d); + ret += sc450ai_write_register(vi_pipe, 0x3638, 0x12); + ret += sc450ai_write_register(vi_pipe, 0x363c, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x363d, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x363e, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3670, 0x4a); + ret += sc450ai_write_register(vi_pipe, 0x3671, 0xe0); + ret += sc450ai_write_register(vi_pipe, 0x3672, 0xe0); + ret += sc450ai_write_register(vi_pipe, 0x3673, 0xe1); + ret += sc450ai_write_register(vi_pipe, 0x3674, 0xc0); + ret += sc450ai_write_register(vi_pipe, 0x3675, 0x87); + ret += sc450ai_write_register(vi_pipe, 0x3676, 0x8c); + ret += sc450ai_write_register(vi_pipe, 0x367a, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x367b, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x367c, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x367d, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x3690, 0x22); + ret += sc450ai_write_register(vi_pipe, 0x3691, 0x33); + ret += sc450ai_write_register(vi_pipe, 0x3692, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x3699, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x369a, 0x07); + ret += sc450ai_write_register(vi_pipe, 0x369b, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x369c, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x369d, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x36a2, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36a3, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x36b0, 0x53); + ret += sc450ai_write_register(vi_pipe, 0x36b1, 0x73); + ret += sc450ai_write_register(vi_pipe, 0x36b2, 0x34); + ret += sc450ai_write_register(vi_pipe, 0x36b3, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x36b4, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x36b7, 0xa0); + ret += sc450ai_write_register(vi_pipe, 0x36b8, 0xa0); + ret += sc450ai_write_register(vi_pipe, 0x36b9, 0x20); + return ret; +} + +static td_s32 sc450ai_linear_4m30_10bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x36bd, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x36be, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36d0, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x36e0, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36e1, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36e2, 0x12); + ret += sc450ai_write_register(vi_pipe, 0x36e3, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36e4, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x36ec, 0x53); + ret += sc450ai_write_register(vi_pipe, 0x36fc, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3907, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3908, 0x41); + ret += sc450ai_write_register(vi_pipe, 0x391e, 0xf1); + ret += sc450ai_write_register(vi_pipe, 0x391f, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3933, 0x82); + ret += sc450ai_write_register(vi_pipe, 0x3934, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x3935, 0x02); + ret += sc450ai_write_register(vi_pipe, 0x3936, 0xc7); + ret += sc450ai_write_register(vi_pipe, 0x3937, 0x76); + ret += sc450ai_write_register(vi_pipe, 0x3938, 0x76); + ret += sc450ai_write_register(vi_pipe, 0x3939, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x393a, 0x28); + ret += sc450ai_write_register(vi_pipe, 0x393b, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x393c, 0x23); + ret += sc450ai_write_register(vi_pipe, 0x3e01, 0xc2); + ret += sc450ai_write_register(vi_pipe, 0x3e02, 0x60); + ret += sc450ai_write_register(vi_pipe, 0x3e03, 0x0b); + ret += sc450ai_write_register(vi_pipe, 0x3e08, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x3e1b, 0x2a); + ret += sc450ai_write_register(vi_pipe, 0x440e, 0x02); + ret += sc450ai_write_register(vi_pipe, 0x4509, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x4837, 0x2c); + ret += sc450ai_write_register(vi_pipe, 0x5000, 0x0e); + ret += sc450ai_write_register(vi_pipe, 0x5001, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x5799, 0x06); + ret += sc450ai_write_register(vi_pipe, 0x59e0, 0xfe); + ret += sc450ai_write_register(vi_pipe, 0x59e1, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x59e2, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e3, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59e4, 0x30); + return ret; +} + +static td_s32 sc450ai_linear_4m30_10bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x5784, 0x8); + ret += sc450ai_write_register(vi_pipe, 0x5785, 0x4); + ret += sc450ai_write_register(vi_pipe, 0x5787, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x5788, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x5789, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x578a, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x578b, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x578c, 0xa); + ret += sc450ai_write_register(vi_pipe, 0x578d, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x5790, 0x8); + ret += sc450ai_write_register(vi_pipe, 0x5791, 0x4); + ret += sc450ai_write_register(vi_pipe, 0x5792, 0x4); + ret += sc450ai_write_register(vi_pipe, 0x5793, 0x8); + ret += sc450ai_write_register(vi_pipe, 0x5794, 0x4); + ret += sc450ai_write_register(vi_pipe, 0x5795, 0x4); + ret += sc450ai_write_register(vi_pipe, 0x57aa, 0x28); + ret += sc450ai_write_register(vi_pipe, 0x57ab, 0x0); + ret += sc450ai_write_register(vi_pipe, 0x57ac, 0x0); + ret += sc450ai_write_register(vi_pipe, 0x57ad, 0x0); + + ret += sc450ai_write_register(vi_pipe, 0x5000, 0x0); /* sensor dpc off */ + ret += sc450ai_write_register(vi_pipe, 0x5002, 0x0); + ret += sc450ai_write_register(vi_pipe, 0x33b0, 0x0); + return ret; +} + +static td_s32 sc450ai_linear_4m30_10bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x59e5, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e6, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59e7, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59e8, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e9, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ea, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59eb, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59ec, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ed, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59ee, 0xfe); + ret += sc450ai_write_register(vi_pipe, 0x59ef, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x59f4, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59f5, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59f6, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59f7, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59f8, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59f9, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59fa, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59fb, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59fc, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59fd, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59fe, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ff, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x36e9, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x36f9, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x3221, 0x66); /* mirror and flip */ + sc450ai_default_reg_init(vi_pipe); + ret += sc450ai_write_register(vi_pipe, 0x0100, 0x01); + return ret; +} + +static td_s32 sc450ai_linear_4m30_10bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_linear_4m30_10bit_init_part1(vi_pipe); + ret += sc450ai_linear_4m30_10bit_init_part2(vi_pipe); + ret += sc450ai_linear_4m30_10bit_init_part3(vi_pipe); + ret += sc450ai_linear_4m30_10bit_init_part4(vi_pipe); /* sensor dpc */ + ret += sc450ai_linear_4m30_10bit_init_part5(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("sc450ai write register failed!\n"); + return ret; + } + + printf("===================================================================================\n"); + printf("vi_pipe:%d,== SC450AI_MIPI_27MInput_4lane_360Mbps_10bit_30fps_2688x1520 Init OK! ==\n", vi_pipe); + printf("===================================================================================\n"); + return ret; +} + +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x0103, 0x01); + delay_ms(100); /* 100ms */ + ret += sc450ai_write_register(vi_pipe, 0x0100, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x36e9, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x36f9, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x301c, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x301f, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x302e, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3208, 0x0a); + ret += sc450ai_write_register(vi_pipe, 0x3209, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x320a, 0x05); + ret += sc450ai_write_register(vi_pipe, 0x320b, 0xf0); + ret += sc450ai_write_register(vi_pipe, 0x320c, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x320d, 0xa8); + ret += sc450ai_write_register(vi_pipe, 0x320e, 0x0c); + ret += sc450ai_write_register(vi_pipe, 0x320f, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x3214, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3215, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3220, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3223, 0xc0); + ret += sc450ai_write_register(vi_pipe, 0x3250, 0xff); + ret += sc450ai_write_register(vi_pipe, 0x3253, 0x10); + ret += sc450ai_write_register(vi_pipe, 0x325f, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x3274, 0x09); + ret += sc450ai_write_register(vi_pipe, 0x3280, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x3281, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x3301, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3306, 0x24); + ret += sc450ai_write_register(vi_pipe, 0x3309, 0x60); + ret += sc450ai_write_register(vi_pipe, 0x330b, 0x64); + ret += sc450ai_write_register(vi_pipe, 0x330d, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x3314, 0x94); + ret += sc450ai_write_register(vi_pipe, 0x3315, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x331f, 0x59); + ret += sc450ai_write_register(vi_pipe, 0x335d, 0x60); + ret += sc450ai_write_register(vi_pipe, 0x3364, 0x56); + ret += sc450ai_write_register(vi_pipe, 0x338f, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x3390, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3391, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3392, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x3393, 0x0a); + ret += sc450ai_write_register(vi_pipe, 0x3394, 0x10); + + return ret; +} + +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x3395, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3396, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3397, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3398, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x3399, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x339a, 0x12); + ret += sc450ai_write_register(vi_pipe, 0x339b, 0x14); + ret += sc450ai_write_register(vi_pipe, 0x339c, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x33af, 0x18); + ret += sc450ai_write_register(vi_pipe, 0x3400, 0x04); + ret += sc450ai_write_register(vi_pipe, 0x3410, 0x04); + ret += sc450ai_write_register(vi_pipe, 0x360f, 0x13); + ret += sc450ai_write_register(vi_pipe, 0x3621, 0xec); + ret += sc450ai_write_register(vi_pipe, 0x3627, 0xa0); + ret += sc450ai_write_register(vi_pipe, 0x3630, 0x90); + ret += sc450ai_write_register(vi_pipe, 0x3633, 0x56); + ret += sc450ai_write_register(vi_pipe, 0x3637, 0x1d); + ret += sc450ai_write_register(vi_pipe, 0x3638, 0x0a); + ret += sc450ai_write_register(vi_pipe, 0x363c, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x363d, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x363e, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x3670, 0x4a); + ret += sc450ai_write_register(vi_pipe, 0x3671, 0xe0); + ret += sc450ai_write_register(vi_pipe, 0x3672, 0xe0); + ret += sc450ai_write_register(vi_pipe, 0x3673, 0xe1); + ret += sc450ai_write_register(vi_pipe, 0x3674, 0xb0); + ret += sc450ai_write_register(vi_pipe, 0x3675, 0x88); + ret += sc450ai_write_register(vi_pipe, 0x3676, 0x8c); + ret += sc450ai_write_register(vi_pipe, 0x367a, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x367b, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x367c, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x367d, 0x58); + ret += sc450ai_write_register(vi_pipe, 0x3690, 0x34); + ret += sc450ai_write_register(vi_pipe, 0x3691, 0x43); + ret += sc450ai_write_register(vi_pipe, 0x3692, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x3699, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x369a, 0x07); + ret += sc450ai_write_register(vi_pipe, 0x369b, 0x0f); + ret += sc450ai_write_register(vi_pipe, 0x369c, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x369d, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36a2, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36a3, 0x58); + return ret; +} + +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x36b0, 0x54); + ret += sc450ai_write_register(vi_pipe, 0x36b1, 0x74); + ret += sc450ai_write_register(vi_pipe, 0x36b2, 0x35); + ret += sc450ai_write_register(vi_pipe, 0x36b3, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36b4, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x36b7, 0xa0); + ret += sc450ai_write_register(vi_pipe, 0x36b8, 0xa0); + ret += sc450ai_write_register(vi_pipe, 0x36b9, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x36bd, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x36be, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36d0, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x36e0, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36e1, 0x08); + ret += sc450ai_write_register(vi_pipe, 0x36e2, 0x12); + ret += sc450ai_write_register(vi_pipe, 0x36e3, 0x48); + ret += sc450ai_write_register(vi_pipe, 0x36e4, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x36fa, 0x0d); + ret += sc450ai_write_register(vi_pipe, 0x36fb, 0xa4); + ret += sc450ai_write_register(vi_pipe, 0x36fc, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x36fd, 0x24); + ret += sc450ai_write_register(vi_pipe, 0x3907, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3908, 0x41); + ret += sc450ai_write_register(vi_pipe, 0x391e, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x391f, 0x11); + ret += sc450ai_write_register(vi_pipe, 0x3e00, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x3e01, 0x6c); + ret += sc450ai_write_register(vi_pipe, 0x3e02, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3e03, 0x0b); + ret += sc450ai_write_register(vi_pipe, 0x3e04, 0x16); + ret += sc450ai_write_register(vi_pipe, 0x3e05, 0xc0); + ret += sc450ai_write_register(vi_pipe, 0x3e06, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3e07, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x3e08, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x3e09, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x3e10, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3e11, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x3e12, 0x03); + ret += sc450ai_write_register(vi_pipe, 0x3e13, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x3e1b, 0x2a); + ret += sc450ai_write_register(vi_pipe, 0x3e22, 0x00); + ret += sc450ai_write_register(vi_pipe, 0x3e23, 0x01); + ret += sc450ai_write_register(vi_pipe, 0x3e24, 0x78); + ret += sc450ai_write_register(vi_pipe, 0x440e, 0x02); + + return ret; +} + +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc450ai_write_register(vi_pipe, 0x4509, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x4837, 0x16); + ret += sc450ai_write_register(vi_pipe, 0x4853, 0xf8); + ret += sc450ai_write_register(vi_pipe, 0x5000, 0x0e); + ret += sc450ai_write_register(vi_pipe, 0x5001, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x5011, 0x80); + ret += sc450ai_write_register(vi_pipe, 0x5799, 0x06); + ret += sc450ai_write_register(vi_pipe, 0x57a8, 0xd0); + ret += sc450ai_write_register(vi_pipe, 0x59e0, 0xfe); + ret += sc450ai_write_register(vi_pipe, 0x59e1, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x59e2, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e3, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59e4, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59e5, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e6, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59e7, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59e8, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59e9, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ea, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59eb, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59ec, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ed, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59ee, 0xfe); + ret += sc450ai_write_register(vi_pipe, 0x59ef, 0x40); + ret += sc450ai_write_register(vi_pipe, 0x59f4, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59f5, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59f6, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59f7, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59f8, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59f9, 0x30); + ret += sc450ai_write_register(vi_pipe, 0x59fa, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59fb, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59fc, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x59fd, 0x3f); + ret += sc450ai_write_register(vi_pipe, 0x59fe, 0x3c); + ret += sc450ai_write_register(vi_pipe, 0x59ff, 0x38); + ret += sc450ai_write_register(vi_pipe, 0x36e9, 0x44); + ret += sc450ai_write_register(vi_pipe, 0x36f9, 0x20); + ret += sc450ai_write_register(vi_pipe, 0x3221, 0x66); /* mirror and flip */ + sc450ai_default_reg_init(vi_pipe); + ret += sc450ai_write_register(vi_pipe, 0x0100, 0x01); + return ret; +} + + +static td_s32 sc450ai_vc_wdr_2t1_4m30_10bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += sc450ai_vc_wdr_2t1_4m30_10bit_init_part1(vi_pipe); + ret += sc450ai_vc_wdr_2t1_4m30_10bit_init_part2(vi_pipe); + ret += sc450ai_vc_wdr_2t1_4m30_10bit_init_part3(vi_pipe); + ret += sc450ai_vc_wdr_2t1_4m30_10bit_init_part4(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("sc450ai_cmos write register failed!\n"); + return ret; + } + printf("==========================================================================================\n"); + printf("vi_pipe:%d,== SC450AI_MIPI_27MInput_4lane_720Mbps_10bit_WDR2T1_30fps_2688x1520 Init OK! ==\n", vi_pipe); + printf("==========================================================================================\n"); + return ret; +} + diff --git a/libraries/sensor/hi3519dv500/smart_sc850sl/Makefile b/libraries/sensor/hi3519dv500/smart_sc850sl/Makefile new file mode 100644 index 0000000..e21b168 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc850sl/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_sc850sl + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.c b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.c new file mode 100644 index 0000000..8156667 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.c @@ -0,0 +1,1474 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" +#include "sc850sl_cmos_ex.h" +#include "sc850sl_cmos.h" + +#define SC850SL_ID 850 +#define SENSOR_SC850SL_WIDTH 3840 +#define SENSOR_SC850SL_HEIGHT 2160 + +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) +#define lower_4bits(x) (((x) & 0x000F) << 4) +#define higher_8bits(x) (((x) & 0x0FF0) >> 4) +#define higher_4bits(x) (((x) & 0xF000) >> 12) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define sc850sl_sensor_set_ctx(dev, ctx) ((g_sc850sl_sns_state[dev]) = (ctx)) +#define sc850sl_sensor_reset_ctx(dev) (g_sc850sl_sns_state[dev] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_again[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_isp_dgain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +static td_u32 g_max_short_exp[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = SC850SL_SEXP_MAX_DEFAULT}; + +ot_isp_sns_commbus g_sc850sl_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0}, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1} +}; + +static td_float g_dcg_ratio = 3.125; + +ot_isp_sns_state *g_sc850sl_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; + +ot_isp_sns_commbus *sc850sl_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_sc850sl_bus_info[vi_pipe]; +} + +ot_isp_sns_state *sc850sl_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_sc850sl_sns_state[vi_pipe]; +} + + +const sc850sl_video_mode_tbl g_sc850sl_mode_tbl[SC850SL_MODE_BUTT] = { + {SC850SL_VMAX_8M_30FPS_12BIT_LINEAR, SC850SL_FULL_LINES_MAX, 30, 2.5, + 3840, 2160, 0, OT_WDR_MODE_NONE, "SC850SL_8M_30FPS_12BIT_LINEAR_MODE"}, + {SC850SL_VMAX_8M_30FPS_10BIT_2TO1_WDR, SC850SL_FULL_LINES_MAX_2TO1_WDR, 30, 10.0, + 3840, 2160, 0, OT_WDR_MODE_2To1_LINE, "SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE"}, +}; + + +#define sc850sl_err_mode_print(sns_image_mode, sns_state) \ +do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ +} while (0) + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + if (sns_state->img_mode == SC850SL_8M_30FPS_12BIT_LINEAR_MODE) { + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; /* accuracy: 1 */ + ae_sns_dft->int_time_accu.offset = 0; + } else if (sns_state->img_mode == SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE) { + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 2; /* accuracy: 2 */ + ae_sns_dft->int_time_accu.offset = 0; + } else { + } + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = SC850SL_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->again_accu.accuracy = 0.0625; /* accuracy: 0.0625 */ + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->dgain_accu.accuracy = 0.125; /* accuracy: 0.125 */ + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 32 << ae_sns_dft->isp_dgain_shift; /* max 32 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + (td_void)memcpy_s(&ae_sns_dft->piris_attr, sizeof(ot_isp_piris_attr), &g_piris, sizeof(ot_isp_piris_attr)); + + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_4; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_5_6; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 50800; /* max 50800: 15.875*3.125*1024 = 50800 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 1024; /* max 1024 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x40; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 148859; /* init 148859 */ + + ae_sns_dft->max_int_time = sns_state->fl_std - EXP_OFFSET_LINEAR; + ae_sns_dft->min_int_time = 2; /* min int 2 */ + ae_sns_dft->max_int_time_target = 65535; /* max int 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + + return; +} + +static td_void cmos_get_ae_2to1_line_wdr_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_int_time = sns_state->fl_std - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG; + ae_sns_dft->min_int_time = 4; /* min_int_time 4 */ + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = ae_sns_dft->min_int_time; + + ae_sns_dft->max_again = 50800; /* max 50800 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 16256; /* max 16256 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + ae_sns_dft->max_isp_dgain_target = 4 << ae_sns_dft->isp_dgain_shift; /* max 4 << shift */ + ae_sns_dft->diff_gain_support = TD_TRUE; + + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 16462; /* init 16462 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + ae_sns_dft->ae_compensation = 56; /* ae_compensation 56 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + } else { + ae_sns_dft->ae_compensation = 32; /* ae_compensation 32 */ + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_LOWLIGHT_PRIOR; + ae_sns_dft->man_ratio_enable = TD_TRUE; + ae_sns_dft->arr_ratio[0] = 0x400; + ae_sns_dft->arr_ratio[1] = 0x40; + ae_sns_dft->arr_ratio[2] = 0x40; /* array index 2 */ + } + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_sf_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + + case OT_WDR_MODE_2To1_LINE: + cmos_get_ae_2to1_line_wdr_default(vi_pipe, ae_sns_dft, sns_state); + break; + + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(vmax); + } else { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].data = high_8bits(vmax); + sns_state->regs_info[0].i2c_data[WDR_LOGIC_L_IDX].data = low_8bits(vmax) - 1; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_H_IDX].data = high_8bits(vmax); + } + + return; +} + + +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines; + td_u32 lines_max; + td_u32 vmax; + td_float max_fps; + td_float min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_sc850sl_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_sc850sl_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_sc850sl_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_sc850sl_mode_tbl[sns_state->img_mode].min_fps; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + vmax = (vmax > lines_max) ? lines_max : vmax; + + cmos_config_vmax(sns_state, vmax); + sns_state->fl_std = vmax; + ae_sns_dft->lines_per500ms = (td_u32)(lines * max_fps / 2); /* 30/2 */ + + ae_sns_dft->fps = fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + ae_sns_dft->max_int_time = sns_state->fl_std - EXP_OFFSET_LINEAR; + } else { + g_max_short_exp[vi_pipe] = (td_u32)(SC850SL_SEXP_MAX_DEFAULT * max_fps / div_0_to_1_float(fps)); + ae_sns_dft->max_int_time = sns_state->fl_std - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_H_ADDR_IDX].data = high_8bits(g_max_short_exp[vi_pipe]); + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_L_ADDR_IDX].data = low_8bits(g_max_short_exp[vi_pipe] & 0xfe); + } + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines_max; + td_u32 vmax; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_sc850sl_mode_tbl[sns_state->img_mode].max_ver_lines; + + vmax = full_lines + EXP_OFFSET_LINEAR; + + vmax = (vmax > lines_max) ? lines_max : vmax; + sns_state->fl[0] = vmax; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].data = low_8bits(vmax); + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].data = high_8bits(vmax); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + ae_sns_dft->max_int_time = sns_state->fl[0] - EXP_OFFSET_LINEAR; + } else { + ae_sns_dft->max_int_time = sns_state->fl[0] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG; + } + ae_sns_dft->full_lines = sns_state->fl[0]; + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].data = lower_4bits(int_time); + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].data = higher_8bits(int_time); + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].data = higher_4bits(int_time); + + return; +} + +static td_void cmos_inttime_update_2to1_line(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + static td_bool is_first[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = 1}; + + static td_u32 short_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + static td_u32 long_int_time[OT_ISP_MAX_PIPE_NUM] = {0}; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (is_first[vi_pipe]) { /* short exposure */ + sns_state->wdr_int_time[0] = int_time; + short_int_time[vi_pipe] = int_time; + is_first[vi_pipe] = TD_FALSE; + } else { /* long exposure */ + sns_state->wdr_int_time[1] = int_time; + long_int_time[vi_pipe] = int_time; + + sns_state->regs_info[0].i2c_data[WDR_EXPO_L_IDX].data = lower_4bits(long_int_time[vi_pipe] & 0xfe); + sns_state->regs_info[0].i2c_data[WDR_EXPO_M_IDX].data = higher_8bits(long_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[WDR_EXPO_H_IDX].data = higher_4bits(long_int_time[vi_pipe]); + + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].data = lower_4bits(short_int_time[vi_pipe]); + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_M_IDX].data = higher_8bits(short_int_time[vi_pipe]); + is_first[vi_pipe] = TD_TRUE; + } + return; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + cmos_inttime_update_2to1_line(vi_pipe, int_time); + } else { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} + +#define SC850SL_AGAIN_NODE_NUM 256 +#define SC850SL_AGAIN_ADDR_INDEX_NODE_NUM 256 +#define SC850SL_DGAIN_NODE_NUM 256 +#define SC850SL_DGAIN_ADDR_INDEX_NODE_NUM 256 + +static td_u32 again_index[SC850SL_AGAIN_NODE_NUM] = { + 1024, 1040, 1056, 1072, 1088, 1104, 1120, 1136, 1152, 1168, 1184, 1200, 1216, 1232, 1248, 1264, + 1280, 1296, 1312, 1328, 1344, 1360, 1376, 1392, 1408, 1424, 1440, 1456, 1472, 1488, 1504, 1520, + 1536, 1552, 1568, 1584, 1600, 1616, 1632, 1648, 1664, 1680, 1696, 1712, 1728, 1744, 1760, 1776, + 1792, 1808, 1824, 1840, 1856, 1872, 1888, 1904, 1920, 1936, 1952, 1968, 1984, 2000, 2016, 2032, + 2048, 2080, 2112, 2144, 2176, 2208, 2240, 2272, 2304, 2336, 2368, 2400, 2432, 2464, 2496, 2528, + 2560, 2592, 2624, 2656, 2688, 2720, 2752, 2784, 2816, 2848, 2880, 2912, 2944, 2976, 3008, 3040, + 3072, 3104, 3136, 3168, 3200, 3232, 3264, 3296, 3328, 3360, 3392, 3424, 3456, 3488, 3520, 3552, + 3584, 3616, 3648, 3680, 3712, 3744, 3776, 3808, 3840, 3872, 3904, 3936, 3968, 4000, 4032, 4064, + 4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, 4928, 4992, 5056, + 5120, 5184, 5248, 5312, 5376, 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, 5952, 6016, 6080, + 6144, 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, 6720, 6784, 6848, 6912, 6976, 7040, 7104, + 7168, 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, 7744, 7808, 7872, 7936, 8000, 8064, 8128, + 8192, 8320, 8448, 8576, 8704, 8832, 8960, 9088, 9216, 9344, 9472, 9600, 9728, 9856, 9984, 10112, + 10240, 10368, 10496, 10624, 10752, 10880, 11008, 11136, 11264, 11392, 11520, 11648, 11776, 11904, 12032, 12160, + 12288, 12416, 12544, 12672, 12800, 12928, 13056, 13184, 13312, 13440, 13568, 13696, 13824, 13952, 14080, 14208, + 14336, 14464, 14592, 14720, 14848, 14976, 15104, 15232, 15360, 15488, 15616, 15744, 15872, 16000, 16128, 16256 +}; + +static td_u32 dgain_index[SC850SL_DGAIN_NODE_NUM] = { + 1024, 1040, 1056, 1072, 1088, 1104, 1120, 1136, 1152, 1168, 1184, 1200, 1216, 1232, 1248, 1264, + 1280, 1296, 1312, 1328, 1344, 1360, 1376, 1392, 1408, 1424, 1440, 1456, 1472, 1488, 1504, 1520, + 1536, 1552, 1568, 1584, 1600, 1616, 1632, 1648, 1664, 1680, 1696, 1712, 1728, 1744, 1760, 1776, + 1792, 1808, 1824, 1840, 1856, 1872, 1888, 1904, 1920, 1936, 1952, 1968, 1984, 2000, 2016, 2032, + 2048, 2080, 2112, 2144, 2176, 2208, 2240, 2272, 2304, 2336, 2368, 2400, 2432, 2464, 2496, 2528, + 2560, 2592, 2624, 2656, 2688, 2720, 2752, 2784, 2816, 2848, 2880, 2912, 2944, 2976, 3008, 3040, + 3072, 3104, 3136, 3168, 3200, 3232, 3264, 3296, 3328, 3360, 3392, 3424, 3456, 3488, 3520, 3552, + 3584, 3616, 3648, 3680, 3712, 3744, 3776, 3808, 3840, 3872, 3904, 3936, 3968, 4000, 4032, 4064, + 4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, 4928, 4992, 5056, + 5120, 5184, 5248, 5312, 5376, 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, 5952, 6016, 6080, + 6144, 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, 6720, 6784, 6848, 6912, 6976, 7040, 7104, + 7168, 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, 7744, 7808, 7872, 7936, 8000, 8064, 8128, + 8192, 8320, 8448, 8576, 8704, 8832, 8960, 9088, 9216, 9344, 9472, 9600, 9728, 9856, 9984, 10112, + 10240, 10368, 10496, 10624, 10752, 10880, 11008, 11136, 11264, 11392, 11520, 11648, 11776, 11904, 12032, 12160, + 12288, 12416, 12544, 12672, 12800, 12928, 13056, 13184, 13312, 13440, 13568, 13696, 13824, 13952, 14080, 14208, + 14336, 14464, 14592, 14720, 14848, 14976, 15104, 15232, 15360, 15488, 15616, 15744, 15872, 16000, 16128, 16256 +}; + +static td_u32 again_table[SC850SL_AGAIN_ADDR_INDEX_NODE_NUM] = { + 0x0340, 0x0341, 0x0342, 0x0343, 0x0344, 0x0345, 0x0346, 0x0347, 0x0348, 0x0349, 0x034A, 0x034B, 0x034C, 0x034D, + 0x034E, 0x034F, 0x0350, 0x0351, 0x0352, 0x0353, 0x0354, 0x0355, 0x0356, 0x0357, 0x0358, 0x0359, 0x035A, 0x035B, + 0x035C, 0x035D, 0x035E, 0x035F, 0x0360, 0x0361, 0x0362, 0x0363, 0x0364, 0x0365, 0x0366, 0x0367, 0x0368, 0x0369, + 0x036A, 0x036B, 0x036C, 0x036D, 0x036E, 0x036F, 0x0370, 0x0371, 0x0372, 0x0373, 0x0374, 0x0375, 0x0376, 0x0377, + 0x0378, 0x0379, 0x037A, 0x037B, 0x037C, 0x037D, 0x037E, 0x037F, 0x0740, 0x0741, 0x0742, 0x0743, 0x0744, 0x0745, + 0x0746, 0x0747, 0x0748, 0x0749, 0x074A, 0x074B, 0x074C, 0x074D, 0x074E, 0x074F, 0x0750, 0x0751, 0x0752, 0x0753, + 0x0754, 0x0755, 0x0756, 0x0757, 0x0758, 0x0759, 0x075A, 0x075B, 0x075C, 0x075D, 0x075E, 0x075F, 0x0760, 0x0761, + 0x0762, 0x0763, 0x0764, 0x0765, 0x0766, 0x0767, 0x0768, 0x0769, 0x076A, 0x076B, 0x076C, 0x076D, 0x076E, 0x076F, + 0x0770, 0x0771, 0x0772, 0x0773, 0x0774, 0x0775, 0x0776, 0x0777, 0x0778, 0x0779, 0x077A, 0x077B, 0x077C, 0x077D, + 0x077E, 0x077F, 0x0F40, 0x0F41, 0x0F42, 0x0F43, 0x0F44, 0x0F45, 0x0F46, 0x0F47, 0x0F48, 0x0F49, 0x0F4A, 0x0F4B, + 0x0F4C, 0x0F4D, 0x0F4E, 0x0F4F, 0x0F50, 0x0F51, 0x0F52, 0x0F53, 0x0F54, 0x0F55, 0x0F56, 0x0F57, 0x0F58, 0x0F59, + 0x0F5A, 0x0F5B, 0x0F5C, 0x0F5D, 0x0F5E, 0x0F5F, 0x0F60, 0x0F61, 0x0F62, 0x0F63, 0x0F64, 0x0F65, 0x0F66, 0x0F67, + 0x0F68, 0x0F69, 0x0F6A, 0x0F6B, 0x0F6C, 0x0F6D, 0x0F6E, 0x0F6F, 0x0F70, 0x0F71, 0x0F72, 0x0F73, 0x0F74, 0x0F75, + 0x0F76, 0x0F77, 0x0F78, 0x0F79, 0x0F7A, 0x0F7B, 0x0F7C, 0x0F7D, 0x0F7E, 0x0F7F, 0x1F40, 0x1F41, 0x1F42, 0x1F43, + 0x1F44, 0x1F45, 0x1F46, 0x1F47, 0x1F48, 0x1F49, 0x1F4A, 0x1F4B, 0x1F4C, 0x1F4D, 0x1F4E, 0x1F4F, 0x1F50, 0x1F51, + 0x1F52, 0x1F53, 0x1F54, 0x1F55, 0x1F56, 0x1F57, 0x1F58, 0x1F59, 0x1F5A, 0x1F5B, 0x1F5C, 0x1F5D, 0x1F5E, 0x1F5F, + 0x1F60, 0x1F61, 0x1F62, 0x1F63, 0x1F64, 0x1F65, 0x1F66, 0x1F67, 0x1F68, 0x1F69, 0x1F6A, 0x1F6B, 0x1F6C, 0x1F6D, + 0x1F6E, 0x1F6F, 0x1F70, 0x1F71, 0x1F72, 0x1F73, 0x1F74, 0x1F75, 0x1F76, 0x1F77, 0x1F78, 0x1F79, 0x1F7A, 0x1F7B, + 0x1F7C, 0x1F7D, 0x1F7E, 0x1F7F +}; + +static td_u32 dgain_table[SC850SL_DGAIN_ADDR_INDEX_NODE_NUM] = { + 0x0080, 0x0082, 0x0084, 0x0086, 0x0088, 0x008A, 0x008C, 0x008E, 0x0090, 0x0092, 0x0094, 0x0096, 0x0098, 0x009A, + 0x009C, 0x009E, 0x00A0, 0x00A2, 0x00A4, 0x00A6, 0x00A8, 0x00AA, 0x00AC, 0x00AE, 0x00B0, 0x00B2, 0x00B4, 0x00B6, + 0x00B8, 0x00BA, 0x00BC, 0x00BE, 0x00C0, 0x00C2, 0x00C4, 0x00C6, 0x00C8, 0x00CA, 0x00CC, 0x00CE, 0x00D0, 0x00D2, + 0x00D4, 0x00D6, 0x00D8, 0x00DA, 0x00DC, 0x00DE, 0x00E0, 0x00E2, 0x00E4, 0x00E6, 0x00E8, 0x00EA, 0x00EC, 0x00EE, + 0x00F0, 0x00F2, 0x00F4, 0x00F6, 0x00F8, 0x00FA, 0x00FC, 0x00FE, 0x0180, 0x0182, 0x0184, 0x0186, 0x0188, 0x018A, + 0x018C, 0x018E, 0x0190, 0x0192, 0x0194, 0x0196, 0x0198, 0x019A, 0x019C, 0x019E, 0x01A0, 0x01A2, 0x01A4, 0x01A6, + 0x01A8, 0x01AA, 0x01AC, 0x01AE, 0x01B0, 0x01B2, 0x01B4, 0x01B6, 0x01B8, 0x01BA, 0x01BC, 0x01BE, 0x01C0, 0x01C2, + 0x01C4, 0x01C6, 0x01C8, 0x01CA, 0x01CC, 0x01CE, 0x01D0, 0x01D2, 0x01D4, 0x01D6, 0x01D8, 0x01DA, 0x01DC, 0x01DE, + 0x01E0, 0x01E2, 0x01E4, 0x01E6, 0x01E8, 0x01EA, 0x01EC, 0x01EE, 0x01F0, 0x01F2, 0x01F4, 0x01F6, 0x01F8, 0x01FA, + 0x01FC, 0x01FE, 0x0380, 0x0382, 0x0384, 0x0386, 0x0388, 0x038A, 0x038C, 0x038E, 0x0390, 0x0392, 0x0394, 0x0396, + 0x0398, 0x039A, 0x039C, 0x039E, 0x03A0, 0x03A2, 0x03A4, 0x03A6, 0x03A8, 0x03AA, 0x03AC, 0x03AE, 0x03B0, 0x03B2, + 0x03B4, 0x03B6, 0x03B8, 0x03BA, 0x03BC, 0x03BE, 0x03C0, 0x03C2, 0x03C4, 0x03C6, 0x03C8, 0x03CA, 0x03CC, 0x03CE, + 0x03D0, 0x03D2, 0x03D4, 0x03D6, 0x03D8, 0x03DA, 0x03DC, 0x03DE, 0x03E0, 0x03E2, 0x03E4, 0x03E6, 0x03E8, 0x03EA, + 0x03EC, 0x03EE, 0x03F0, 0x03F2, 0x03F4, 0x03F6, 0x03F8, 0x03FA, 0x03FC, 0x03FE, 0x0780, 0x0782, 0x0784, 0x0786, + 0x0788, 0x078A, 0x078C, 0x078E, 0x0790, 0x0792, 0x0794, 0x0796, 0x0798, 0x079A, 0x079C, 0x079E, 0x07A0, 0x07A2, + 0x07A4, 0x07A6, 0x07A8, 0x07AA, 0x07AC, 0x07AE, 0x07B0, 0x07B2, 0x07B4, 0x07B6, 0x07B8, 0x07BA, 0x07BC, 0x07BE, + 0x07C0, 0x07C2, 0x07C4, 0x07C6, 0x07C8, 0x07CA, 0x07CC, 0x07CE, 0x07D0, 0x07D2, 0x07D4, 0x07D6, 0x07D8, 0x07DA, + 0x07DC, 0x07DE, 0x07E0, 0x07E2, 0x07E4, 0x07E6, 0x07E8, 0x07EA, 0x07EC, 0x07EE, 0x07F0, 0x07F2, 0x07F4, 0x07F6, + 0x07F8, 0x07FA, 0x07FC, 0x07FE +}; + +static td_void cmos_again_calc_table(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db) +{ + int i; + td_u32 again_lin_tmp; + + sns_check_pointer_void_return(again_lin); + sns_check_pointer_void_return(again_db); + + if (*again_lin >= (td_u32)(again_index[SC850SL_AGAIN_ADDR_INDEX_NODE_NUM - 1] * g_dcg_ratio)) { + *again_lin = (td_u32)(again_index[SC850SL_AGAIN_ADDR_INDEX_NODE_NUM - 1] * g_dcg_ratio); + if (g_dcg_ratio > 1) { + *again_db = again_table[SC850SL_AGAIN_NODE_NUM - 1] | 0x2000; + } else { + *again_db = again_table[SC850SL_AGAIN_NODE_NUM - 1]; + } + return; + } + if (*again_lin > (1024 * g_dcg_ratio)) { /* 1024 */ + again_lin_tmp = (td_u32)(*again_lin / g_dcg_ratio); + for (i = 1; i < SC850SL_AGAIN_NODE_NUM; i++) { + if (again_lin_tmp < again_index[i]) { + *again_lin = (td_u32)(again_index[i - 1] * g_dcg_ratio); + *again_db = again_table[i - 1] | 0x2000; + break; + } + } + } else { + again_lin_tmp = *again_lin; + for (i = 1; i < SC850SL_AGAIN_NODE_NUM; i++) { + if (again_lin_tmp < again_index[i]) { + *again_lin = again_index[i - 1]; + *again_db = again_table[i - 1]; + break; + } + } + } + return; +} + +static td_void cmos_dgain_calc_table(ot_vi_pipe vi_pipe, td_u32 *dgain_lin, td_u32 *dgain_db) +{ + int i; + sns_check_pointer_void_return(dgain_lin); + sns_check_pointer_void_return(dgain_db); + + if (*dgain_lin >= dgain_index[SC850SL_DGAIN_ADDR_INDEX_NODE_NUM - 1]) { + *dgain_lin = dgain_index[SC850SL_DGAIN_ADDR_INDEX_NODE_NUM - 1]; + *dgain_db = dgain_table[SC850SL_DGAIN_NODE_NUM - 1]; + return; + } + + for (i = 1; i < SC850SL_DGAIN_NODE_NUM; i++) { + if (*dgain_lin < dgain_index[i]) { + *dgain_lin = dgain_index[i - 1]; + *dgain_db = dgain_table[i - 1]; + break; + } + } + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + td_u8 reg_0x3e09; + td_u8 reg_0x3e08; + td_u8 reg_0x3e07; + td_u8 reg_0x3e06; + + reg_0x3e06 = high_8bits(dgain); + reg_0x3e07 = low_8bits (dgain); + reg_0x3e08 = high_8bits(again); + reg_0x3e09 = low_8bits (again); + + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].data = reg_0x3e06; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].data = reg_0x3e07; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].data = reg_0x3e08; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].data = reg_0x3e09; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].data = reg_0x3e06; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].data = reg_0x3e07; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].data = reg_0x3e08; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].data = reg_0x3e09; + } else { + } + + // config sensor logic + if (reg_0x3e08 < 0x07) { + sns_state->regs_info[0].i2c_data[SNS_LOGIC_REG363C].data = 0x05; + } else { + sns_state->regs_info[0].i2c_data[SNS_LOGIC_REG363C].data = 0x07; + } + return; +} + +static td_void cmos_get_inttime_max_2to1_line(ot_vi_pipe vi_pipe, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + td_u32 short_max0; + td_u32 short_max; + td_u32 short_time_min_limit; + ot_isp_sns_state *sns_state = TD_NULL; + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + short_time_min_limit = 4; /* short_time_min_limit 4 */ + + if (g_fswdr_mode[vi_pipe] == OT_ISP_FSWDR_LONG_FRAME_MODE) { + short_max0 = sns_state->fl[1] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG; + short_max = sns_state->fl[0] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG; + short_max = short_max > (g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_SHORT) ? + (g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_SHORT) : short_max; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + int_time->int_time_max[0] = short_time_min_limit; + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_max[1] = short_max; + int_time->int_time_min[1] = short_time_min_limit; + return; + } else { + short_max0 = ((sns_state->fl[1] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG) * 0x40) / + div_0_to_1(ratio[0]); + short_max = ((sns_state->fl[0] - g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_LONG) * 0x40) / + div_0_to_1(ratio[0]); + short_max = short_max > (g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_SHORT) ? + (g_max_short_exp[vi_pipe] - EXP_OFFSET_WDR_SHORT) : short_max; + short_max = (short_max0 < short_max) ? short_max0 : short_max; + short_max = (short_max == 0) ? 1 : short_max; + } + *lf_max_int_time = sns_state->fl[0] - EXP_OFFSET_WDR_SHORT; + if (short_max >= short_time_min_limit) { + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * ratio[0]) >> 6; /* shift 6 */ + int_time->int_time_min[0] = short_time_min_limit; + int_time->int_time_min[1] = (int_time->int_time_min[0] * ratio[0]) >> 6; /* shift 6 */ + } else { + short_max = short_time_min_limit; + int_time->int_time_max[0] = short_max; + int_time->int_time_max[1] = (int_time->int_time_max[0] * 0xFFF) >> 6; /* shift 6 */ + int_time->int_time_min[0] = int_time->int_time_max[0]; + int_time->int_time_min[1] = int_time->int_time_max[1]; + } + + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + ot_unused(man_ratio_enable); + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_2To1_LINE: + cmos_get_inttime_max_2to1_line(vi_pipe, ratio, int_time, lf_max_int_time); + break; + default: + break; + } + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + + return; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_again_calc_table = cmos_again_calc_table; + exp_func->pfn_cmos_dgain_calc_table = cmos_dgain_calc_table; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 4950 +#define CALIBRATE_STATIC_WB_R_GAIN 478 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 497 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 (-102) +#define CALIBRATE_AWB_P2 358 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 183957 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-135938) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + + case OT_WDR_MODE_2To1_LINE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm_wdr, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table_wdr, sizeof(ot_isp_awb_agc_table)); + + break; + + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case SC850SL_8M_30FPS_12BIT_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + + case SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 10; /* 10bit */ + isp_def->sns_mode.dng_raw_format.white_level = 1023; /* max 1023 */ + break; + + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static void cmos_get_isp_wdr_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc_wdr; + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic_wdr; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen_wdr; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc_wdr; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma_wdr; + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut_wdr; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr_wdr; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge_wdr; +#endif + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color_wdr; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac_wdr; + isp_def->key.bit1_bshp= 1; + isp_def->bshp = &g_cmos_bayershp_wdr; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci_wdr; + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze_wdr; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + case OT_WDR_MODE_2To1_LINE: + cmos_get_isp_wdr_default(isp_def); + break; + default: + cmos_get_isp_linear_default(isp_def); + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + isp_def->wdr_switch_attr.exp_ratio[0] = 0x400; + } + + isp_def->sns_mode.sns_id = SC850SL_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(black_level); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), &g_cmos_blc, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x444; + } + } else { /* black level of DOL mode */ + for (i = 0; i < OT_ISP_WDR_MAX_FRAME_NUM; i++) { + black_level->auto_attr.black_level[i][0] = 0x444; + black_level->auto_attr.black_level[i][1] = 0x444; + black_level->auto_attr.black_level[i][2] = 0x444; /* index 2 */ + black_level->auto_attr.black_level[i][3] = 0x444; /* index 3 */ + } + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + case OT_WDR_MODE_2To1_LINE: + sns_state->wdr_mode = OT_WDR_MODE_2To1_LINE; + printf("2to1 line WDR 4k mode(60fps->30fps)\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_default_logic_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + + sns_state->regs_info[0].i2c_data[SNS_LOGIC_REG363C].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SNS_LOGIC_REG363C].reg_addr = SC850SL_LOGIC_ADDR_2; + return; +} + + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_sc850sl_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = REG_MAX_IDX; + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + sns_state->regs_info[0].reg_num = WDR_REG_MAX_IDX; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + } + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = SC850SL_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = SC850SL_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = SC850SL_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_L_IDX].reg_addr = SC850SL_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_M_IDX].reg_addr = SC850SL_EXPO_M_ADDR; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[EXPO_H_IDX].reg_addr = SC850SL_EXPO_H_ADDR; + + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_L_IDX].reg_addr = SC850SL_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[AGAIN_H_IDX].reg_addr = SC850SL_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_H_IDX].reg_addr = SC850SL_DGAIN_H_ADDR; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[DGAIN_L_IDX].reg_addr = SC850SL_DGAIN_L_ADDR; + + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_L_IDX].reg_addr = SC850SL_VMAX_L_ADDR; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[VMAX_H_IDX].reg_addr = SC850SL_VMAX_H_ADDR; + + cmos_default_logic_sns_reg_info_init(vi_pipe, sns_state); + return; +} + +static td_void cmos_2to1_line_wdr_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_L_IDX].reg_addr = SC850SL_SHORT_EXPO_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_M_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_EXPO_M_IDX].reg_addr = SC850SL_SHORT_EXPO_M_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_L_IDX].reg_addr = SC850SL_SHORT_AGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_AGAIN_H_IDX].reg_addr = SC850SL_SHORT_AGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_L_IDX].reg_addr = SC850SL_SHORT_DGAIN_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_SHORT_DGAIN_H_IDX].reg_addr = SC850SL_SHORT_DGAIN_H_ADDR; + + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_L_ADDR_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_L_ADDR_IDX].reg_addr = SC850SL_SHORT_EXP_MAX_L_ADDR; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_H_ADDR_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_H_ADDR_IDX].reg_addr = SC850SL_SHORT_EXP_MAX_H_ADDR; + + sns_state->regs_info[0].i2c_data[WDR_LOGIC_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_L_IDX].reg_addr = SC850SL_WDR_LOGIC_L_ADDR; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_H_IDX].reg_addr = SC850SL_WDR_LOGIC_H_ADDR; + return; +} + +static td_void cmos_sns_config_logic_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + ot_unused(sns_state); +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + if (sns_state->fl[0] > sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_L_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_H_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_L_ADDR_IDX].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_H_ADDR_IDX].delay_frame_num = 0; + } else if (sns_state->fl[0] < sns_state->fl[1]) { + sns_state->regs_info[0].i2c_data[WDR_VMAX_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_VMAX_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_L_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[WDR_LOGIC_H_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_L_ADDR_IDX].delay_frame_num = 1; + sns_state->regs_info[0].i2c_data[SHORT_EXP_MAX_H_ADDR_IDX].delay_frame_num = 1; + } else { + } + } + + cmos_sns_config_logic_update(vi_pipe, sns_state); + + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + /* DOL 2t1 Mode Regs */ + cmos_2to1_line_wdr_sns_reg_info_init(vi_pipe, sns_state); + } + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + ot_unused(vi_pipe); + switch (sns_image_mode) { + case SC850SL_8M_30FPS_12BIT_LINEAR_MODE: + sns_state->fl_std = SC850SL_VMAX_8M_30FPS_12BIT_LINEAR; + break; + case SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE: + sns_state->fl_std = SC850SL_VMAX_8M_30FPS_10BIT_2TO1_WDR; + break; + default: + sns_state->fl_std = SC850SL_VMAX_8M_30FPS_12BIT_LINEAR; + break; + } + + return; +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < SC850SL_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_sc850sl_mode_tbl[i].max_fps && + sns_image_mode->width <= g_sc850sl_mode_tbl[i].width && + sns_image_mode->height <= g_sc850sl_mode_tbl[i].height && + sns_state->wdr_mode == g_sc850sl_mode_tbl[i].wdr_mode) { + image_mode = (sc850sl_res_mode)i; + break; + } + } + + if (i >= SC850SL_MODE_BUTT) { + sc850sl_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = SC850SL_8M_30FPS_12BIT_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = SC850SL_VMAX_8M_30FPS_12BIT_LINEAR; + sns_state->fl[0] = SC850SL_VMAX_8M_30FPS_12BIT_LINEAR; + sns_state->fl[1] = SC850SL_VMAX_8M_30FPS_12BIT_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + + return; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == SC850SL_8M_30FPS_12BIT_LINEAR_MODE) { + full_lines_5fps = (SC850SL_VMAX_8M_30FPS_12BIT_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + if (enable) { /* setup for ISP pixel calibration mode */ + sc850sl_write_register(vi_pipe, SC850SL_AGAIN_L_ADDR, 0x40); + sc850sl_write_register(vi_pipe, SC850SL_AGAIN_H_ADDR, 0x03); + + sc850sl_write_register(vi_pipe, SC850SL_DGAIN_H_ADDR, 0x00); + sc850sl_write_register(vi_pipe, SC850SL_DGAIN_L_ADDR, 0x80); + + sc850sl_write_register(vi_pipe, SC850SL_VMAX_L_ADDR, low_8bits(full_lines_5fps)); + sc850sl_write_register(vi_pipe, SC850SL_VMAX_H_ADDR, high_8bits(full_lines_5fps)); + + sc850sl_write_register(vi_pipe, SC850SL_EXPO_L_ADDR, lower_4bits(full_lines_5fps - 10)); + sc850sl_write_register(vi_pipe, SC850SL_EXPO_M_ADDR, higher_8bits(full_lines_5fps - 10)); + sc850sl_write_register(vi_pipe, SC850SL_EXPO_H_ADDR, higher_4bits(full_lines_5fps - 10)); + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > SC850SL_FULL_LINES_MAX) ? SC850SL_FULL_LINES_MAX : sns_state->fl_std; + sc850sl_write_register(vi_pipe, SC850SL_VMAX_L_ADDR, low_8bits(sns_state->fl_std)); + sc850sl_write_register(vi_pipe, SC850SL_VMAX_H_ADDR, high_8bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + + return; +} +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = sc850sl_init; + sensor_exp_func->pfn_cmos_sns_exit = sc850sl_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 sc850sl_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_sc850sl_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + sc850sl_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + sc850sl_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + sc850sl_sensor_reset_ctx(vi_pipe); + + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = SC850SL_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, SC850SL_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, SC850SL_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, SC850SL_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_init_int_time[vi_pipe] = init_attr->exp_time; + g_init_again[vi_pipe] = init_attr->a_gain; + g_init_dgain[vi_pipe] = init_attr->d_gain; + g_init_isp_dgain[vi_pipe] = init_attr->ispd_gain; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_sc850sl_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = sc850sl_standby, + .pfn_restart = sc850sl_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = TD_NULL, + .pfn_write_reg = sc850sl_write_register, + .pfn_read_reg = sc850sl_read_register, + .pfn_set_bus_info = sc850sl_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.h b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.h new file mode 100644 index 0000000..f0386cb --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos.h @@ -0,0 +1,145 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef SC850SL_CMOS_H +#define SC850SL_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" +#include "securec.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef clip3 +#define clip3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif + +#define SC850SL_I2C_ADDR 0x60 +#define SC850SL_ADDR_BYTE 2 +#define SC850SL_DATA_BYTE 1 +#define sc850sl_sensor_get_ctx(dev, ctx) ((ctx) = sc850sl_get_ctx(dev)) + +#define SC850SL_FULL_LINES_MAX 0x6978 /* 0x6978 = 27000 = Min:2.5fps */ +#define SC850SL_FULL_LINES_MAX_2TO1_WDR 0x34BC /* 13500 = Min:10fps */ +#define SC850SL_INCREASE_LINES 0 /* make real fps less than stand fps because NVR require */ +#define SC850SL_VMAX_8M_30FPS_12BIT_LINEAR (2250 + SC850SL_INCREASE_LINES) /* 0x8CA */ +#define SC850SL_VMAX_8M_30FPS_10BIT_2TO1_WDR (4500 + SC850SL_INCREASE_LINES) /* 0x1194 */ + +/******** SC850SL Register Address ********/ +#define SC850SL_EXPO_H_ADDR 0x3E00 +#define SC850SL_EXPO_M_ADDR 0x3E01 +#define SC850SL_EXPO_L_ADDR 0x3E02 + +#define SC850SL_AGAIN_H_ADDR 0x3E08 +#define SC850SL_AGAIN_L_ADDR 0x3E09 + +#define SC850SL_DGAIN_H_ADDR 0x3E06 +#define SC850SL_DGAIN_L_ADDR 0x3E07 + +#define SC850SL_SHORT_EXPO_H_ADDR 0x3E22 +#define SC850SL_SHORT_EXPO_M_ADDR 0x3E04 +#define SC850SL_SHORT_EXPO_L_ADDR 0x3E05 + +#define SC850SL_SHORT_AGAIN_H_ADDR 0x3E12 +#define SC850SL_SHORT_AGAIN_L_ADDR 0x3E13 + +#define SC850SL_SHORT_DGAIN_H_ADDR 0x3E10 +#define SC850SL_SHORT_DGAIN_L_ADDR 0x3E11 + +#define SC850SL_VMAX_H_ADDR 0x320E +#define SC850SL_VMAX_L_ADDR 0x320F + +#define SC850SL_WDR_LOGIC_H_ADDR 0x3230 +#define SC850SL_WDR_LOGIC_L_ADDR 0x3231 + +#define SC850SL_SHORT_EXP_MAX_H_ADDR 0x3E23 +#define SC850SL_SHORT_EXP_MAX_L_ADDR 0x3E24 + +#define SC850SL_LOGIC_ADDR_2 0x363c + +#define SC850SL_FRAME_RATE_MIN 0xD2F0 /* Min:2.5fps */ +#define EXP_OFFSET_LINEAR 4 +#define EXP_OFFSET_WDR_LONG 8 +#define EXP_OFFSET_WDR_SHORT 2 +#define SC850SL_SEXP_MAX_DEFAULT 0x10A + +typedef enum { + SC850SL_8M_30FPS_12BIT_LINEAR_MODE = 0, + SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE, + SC850SL_MODE_BUTT +} sc850sl_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} sc850sl_video_mode_tbl; + +typedef enum { + EXPO_L_IDX = 0, + EXPO_M_IDX, + EXPO_H_IDX, + AGAIN_L_IDX, + AGAIN_H_IDX, + DGAIN_L_IDX, + DGAIN_H_IDX, + VMAX_L_IDX, + VMAX_H_IDX, + SNS_LOGIC_REG363C, + REG_MAX_IDX +} sc850sl_linear_reg_index; + +typedef enum { + WDR_EXPO_L_IDX = 0, + WDR_EXPO_M_IDX, + WDR_EXPO_H_IDX, + WDR_AGAIN_L_IDX, + WDR_AGAIN_H_IDX, + WDR_DGAIN_L_IDX, + WDR_DGAIN_H_IDX, + WDR_VMAX_L_IDX, + WDR_VMAX_H_IDX, + WDR_SNS_LOGIC_REG363C, + WDR_SHORT_EXPO_L_IDX, + WDR_SHORT_EXPO_M_IDX, + WDR_SHORT_AGAIN_L_IDX, + WDR_SHORT_AGAIN_H_IDX, + WDR_SHORT_DGAIN_L_IDX, + WDR_SHORT_DGAIN_H_IDX, + SHORT_EXP_MAX_L_ADDR_IDX, + SHORT_EXP_MAX_H_ADDR_IDX, + WDR_LOGIC_L_IDX, + WDR_LOGIC_H_IDX, + WDR_REG_MAX_IDX +}sc850sl_wdr_reg_index; + + +ot_isp_sns_state *sc850sl_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *sc850sl_get_bus_info(ot_vi_pipe vi_pipe); + +td_void sc850sl_init(ot_vi_pipe vi_pipe); +td_void sc850sl_exit(ot_vi_pipe vi_pipe); +td_void sc850sl_standby(ot_vi_pipe vi_pipe); +td_void sc850sl_restart(ot_vi_pipe vi_pipe); + + +td_s32 sc850sl_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 sc850sl_read_register(ot_vi_pipe vi_pipe, td_u32 addr); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* SC850SL_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos_ex.h b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos_ex.h new file mode 100644 index 0000000..280e9b0 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_cmos_ex.h @@ -0,0 +1,4351 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef SC850SL_CMOS_EX_H +#define SC850SL_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +/* Piris attr */ +static ot_isp_piris_attr g_piris = { + 0, // bStepFNOTableChange + 1, // bZeroIsMax + 94, // u16TotalStep + 62, // u16StepCount + /* Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1 */ + { 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158, + 166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344, + 353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 }, + OT_ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget + OT_ISP_IRIS_F_NO_5_6, // enMinIrisFNOTarget + 1, + 512, + 32 +}; + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x444, 0x444, 0x444, 0x444}, + {0x444, 0x444, 0x444, 0x444}, + {0x444, 0x444, 0x444, 0x444}, + {0x444, 0x444, 0x444, 0x444}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 3840, 20}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x444, 0x444, 0x444, 0x444}, /* black level */ + {0x444, 0x444, 0x444, 0x444}, /* black level */ + {0x444, 0x444, 0x444, 0x444}, /* black level */ + {0x444, 0x444, 0x444, 0x444}, /* black level */ + }, + }, + { + {3840, 2180}, + }, +}; + +static const ot_isp_cmos_black_level g_cmos_blc_wdr = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + {0x400, 0x400, 0x400, 0x400}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 3840, 20}, /* ob_area */ + 0x0, /* low_threshold */ + 0xbb8, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + 0, + /* calibration black level */ + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + {0x400, 0x400, 0x400, 0x400}, /* black level */ + }, + }, + { + {3840, 2180}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + { 60, 60, 58, 55, 50, 45, 40, 30, 20, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 5, 5, 5, 5, 5 }, + /* detail_smooth_range */ + { 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 6, 7, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 20, 15, 12, 12, 10, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 15, 15, 12, 10, 8, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 25, 20, 15, 12, 10, 10, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 20, 18, 15, 12, 10, 8, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + { + 1621.0000000000, 0.0003682779, -0.0150903382, 0.0000000368, -0.0000816109, 0.0519085205, + 0.0003600083, -0.0016596481, 0.0000000619, -0.0000323338, 0.0041258741, 4900.0000000000, 0, 0, 0, 0, + } +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr_wdr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{50, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {24, 72, 0}}, + {{32, 64, 0}, {12, 64, 0}}, + {{12, 24, 0}, {8, 54, 0}}, + {{8, 20, 0}, {6, 36, 0}}, + {{6, 12, 0}, {0, 8, 0}}, + {{0, 8, 0}, {0, 6, 0}}, + {{0, 6, 0}, {0, 2, 0}}, + {{0, 2, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + + 1, + {0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, 259, + 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, 467, 477, + 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, 671, 683, 695, + 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, 885, 896, 906, 917, + 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, 1085, 1096, 1107, 1118, 1129, + 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, 1274, 1284, 1295, 1305, 1315, 1325, + 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, 1468, 1480, 1493, 1499, 1505, 1511, 1518, + 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, + 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, + 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, + 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, + 2036, 2042, 2047, 2052, 2058, 2063, 2068, 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, + 2135, 2140, 2145, 2150, 2154, 2159, 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, + 2226, 2231, 2235, 2240, 2244, 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, + 2312, 2317, 2321, 2325, 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, + 2392, 2396, 2400, 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, + 2466, 2470, 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, + 2538, 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, 2665, + 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, 2723, 2727, + 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, 2781, 2784, 2787, + 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, 2837, 2840, 2843, 2846, + 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, 2890, 2893, 2896, 2899, 2902, + 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, 2941, 2944, 2946, 2949, 2952, 2954, + 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, 2988, 2990, 2993, 2995, 2998, 3000, 3002, + 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, + 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, + 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, + 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, + 3177, 3179, 3182, 3184, 3186, 3188, 3190, 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, + 3217, 3219, 3221, 3223, 3225, 3227, 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, + 3256, 3258, 3260, 3262, 3264, 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, + 3293, 3295, 3297, 3299, 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, + 3330, 3332, 3334, 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, + 3366, 3368, 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, + 3401, 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, 3470, + 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, 3506, 3508, + 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, 3544, 3546, 3548, + 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, 3582, 3585, 3587, 3589, + 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, 3620, 3622, 3624, 3626, 3628, + 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, 3657, 3659, 3661, 3663, 3665, 3667, + 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, 3693, 3695, 3697, 3699, 3701, 3704, 3706, + 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, + 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, + 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, + 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, + 3857, 3858, 3860, 3862, 3864, 3866, 3868, 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, + 3892, 3894, 3896, 3898, 3900, 3902, 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, + 3928, 3930, 3932, 3934, 3935, 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, + 3963, 3965, 3967, 3969, 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, + 3998, 4000, 4001, 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, + 4032, 4034, 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, + 4066, 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095 + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + {0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, 89, + 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, 176, 181, + 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, 263, 268, 273, + 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, 351, 356, 361, 366, + 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, 441, 446, 451, 456, 461, + 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, 535, 540, 545, 551, 556, 561, + 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, 633, 639, 645, 650, 656, 662, 667, + 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, 738, 744, 750, 756, 762, 768, 774, 780, + 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, 849, 855, 861, 867, 874, 880, 886, 893, 899, + 905, 912, 918, 925, 931, 937, 944, 950, 957, 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, + 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, + 1152, 1159, 1165, 1172, 1178, 1185, 1191, 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, + 1276, 1283, 1289, 1295, 1302, 1308, 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, + 1398, 1404, 1411, 1417, 1423, 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, + 1517, 1524, 1530, 1536, 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, + 1639, 1645, 1652, 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, + 1761, 1768, 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, + 1883, 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, 2107, + 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, 2206, 2212, + 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, 2297, 2302, 2307, + 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, 2381, 2385, 2390, 2394, + 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, 2458, 2462, 2467, 2471, 2475, + 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, 2531, 2535, 2539, 2543, 2547, 2551, + 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, 2601, 2604, 2608, 2612, 2616, 2619, 2623, + 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, + 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, + 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, + 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, + 2901, 2904, 2908, 2911, 2914, 2918, 2921, 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, + 2964, 2967, 2971, 2974, 2977, 2981, 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, + 3026, 3029, 3032, 3035, 3038, 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, + 3086, 3089, 3092, 3095, 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, + 3144, 3147, 3150, 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, + 3200, 3203, 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, + 3255, 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, 3359, + 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, 3407, 3410, + 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, 3455, 3457, 3460, + 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, 3501, 3504, 3506, 3509, + 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, 3546, 3549, 3551, 3554, 3556, + 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, 3591, 3593, 3596, 3598, 3601, 3603, + 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, 3634, 3637, 3639, 3642, 3644, 3646, 3649, + 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, + 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, + 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, + 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, + 3825, 3827, 3829, 3831, 3834, 3836, 3838, 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, + 3866, 3868, 3870, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, + 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, + 3946, 3949, 3951, 3953, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, + 3986, 3988, 3990, 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, + 4024, 4026, 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, + 4062, 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095 + }, + 3, +}; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 17, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + { 31, 31, 23, 23, 23, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21 }, + { 31, 31, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 8, 8, 7, 7, 7, 6, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 7, 6, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 58, 60, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 12, 16, 20, 24, 24, 24, 26, 28, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 18, 20, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 30, 30, 30, 26, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {159, 159, 159, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140}, + {167, 167, 167, 144, 144, 144, 144, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {176, 176, 176, 151, 151, 151, 151, 147, 147, 147, 147, 147, 147, 147, 147, 147}, + {186, 186, 186, 158, 158, 158, 158, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {196, 196, 196, 166, 166, 166, 166, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {206, 206, 206, 176, 176, 176, 176, 164, 164, 164, 164, 164, 164, 164, 164, 164}, + {217, 217, 217, 185, 185, 185, 185, 171, 171, 171, 171, 171, 171, 171, 171, 171}, + {227, 227, 227, 195, 195, 195, 195, 177, 177, 177, 177, 177, 177, 177, 177, 177}, + {237, 237, 237, 205, 205, 205, 205, 184, 184, 184, 184, 184, 184, 184, 184, 184}, + {246, 246, 246, 214, 214, 214, 214, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {254, 254, 254, 223, 223, 223, 223, 196, 196, 196, 196, 196, 196, 196, 196, 196}, + {261, 261, 261, 231, 231, 231, 231, 201, 201, 201, 201, 201, 201, 201, 201, 201}, + {268, 268, 268, 237, 237, 237, 237, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {272, 272, 272, 242, 242, 242, 242, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {276, 276, 276, 245, 245, 245, 245, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {277, 277, 277, 247, 247, 247, 247, 212, 212, 212, 212, 212, 212, 212, 212, 212}, + {276, 276, 276, 246, 246, 246, 246, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {274, 274, 274, 243, 243, 243, 243, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {270, 270, 270, 238, 238, 238, 238, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {265, 265, 265, 232, 232, 232, 232, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {258, 258, 258, 225, 225, 225, 225, 197, 197, 197, 197, 197, 197, 197, 197, 197}, + {250, 250, 250, 217, 217, 217, 217, 192, 192, 192, 192, 192, 192, 192, 192, 192}, + {242, 242, 242, 209, 209, 209, 209, 186, 186, 186, 186, 186, 186, 186, 186, 186}, + {233, 233, 233, 199, 199, 199, 199, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {224, 224, 224, 190, 190, 190, 190, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {215, 215, 215, 181, 181, 181, 181, 167, 167, 167, 167, 167, 167, 167, 167, 167}, + {206, 206, 206, 172, 172, 172, 172, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {198, 198, 198, 163, 163, 163, 163, 156, 156, 156, 156, 156, 156, 156, 156, 156}, + {191, 191, 191, 156, 156, 156, 156, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {184, 184, 184, 149, 149, 149, 149, 146, 146, 146, 146, 146, 146, 146, 146, 146}, + {179, 179, 179, 143, 143, 143, 143, 142, 142, 142, 142, 142, 142, 142, 142, 142}, + {175, 175, 175, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + }, + /* edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {155, 155, 155, 155, 155, 155, 155, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {175, 175, 175, 175, 175, 175, 175, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {187, 187, 187, 187, 187, 187, 187, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {201, 201, 201, 201, 201, 201, 201, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {215, 215, 215, 215, 215, 215, 215, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {229, 229, 229, 229, 229, 229, 229, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {243, 243, 243, 243, 243, 243, 243, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {257, 257, 257, 257, 257, 257, 257, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {269, 269, 269, 269, 269, 269, 269, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {281, 281, 281, 281, 281, 281, 281, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {290, 290, 290, 290, 290, 290, 290, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {298, 298, 298, 298, 298, 298, 298, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {302, 302, 302, 302, 302, 302, 302, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {304, 304, 304, 304, 304, 304, 304, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {303, 303, 303, 303, 303, 303, 303, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {298, 298, 298, 298, 298, 298, 298, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {292, 292, 292, 292, 292, 292, 292, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {284, 284, 284, 284, 284, 284, 284, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {273, 273, 273, 273, 273, 273, 273, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {262, 262, 262, 262, 262, 262, 262, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {250, 250, 250, 250, 250, 250, 250, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {237, 237, 237, 237, 237, 237, 237, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {223, 223, 223, 223, 223, 223, 223, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {210, 210, 210, 210, 210, 210, 210, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {197, 197, 197, 197, 197, 197, 197, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {185, 185, 185, 185, 185, 185, 185, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {174, 174, 174, 174, 174, 174, 174, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {156, 156, 156, 156, 156, 156, 156, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 180, 180, 170, 160, 160, 140, 140, 140, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 4, 4, 4, 4, 4, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 6, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 110, 110, 100, 100, 100, 100, 100, 100, 100 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + 4, + { + { + 6175, + { 440, 32967, 15, 32868, 408, 32820, 32769, 32992, 481 }, + }, + { + 4990, + { 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 }, + }, + { + 3865, + { 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 }, + }, + { + 2450, + { 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 }, + }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm_wdr = { + 4, + { + { + 6175, + { 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 }, + }, + { + 4990, + { 443, 32969, 14, 32860, 423, 32843, 13, 33044, 519 }, + }, + { + 3865, + { 450, 32973, 11, 32857, 407, 32830, 18, 33031, 501 }, + }, + { + 2450, + { 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 } +}; + +static ot_isp_awb_agc_table g_awb_agc_table_wdr = { + /* bvalid */ + 1, + /* saturation */ + { 90, 90, 85, 85, 85, 82, 80, 80, 75, 75, 70, 70, 70, 70, 65, 60} +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 0x8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 0x14, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0x0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* y_grid_width */ + {33, 33, 33, 33, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 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555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 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299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 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293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 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515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 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1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000 + } + } +}; + +static const ot_isp_cmos_clut g_cmos_clut = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 67174464, 0, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, 67174464, + 67174464, 67174464, 0, 67174464, 0, 67174464, 67174464, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67174464, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 67174464, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 + } + }, +}; +static const ot_isp_cmos_clut g_cmos_clut_wdr = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 3149813, 1046533, 3149814, 6299621, 9450452, 6299622, 9450451, 12602304, + 16802729, 12602303, 16803752, 22052752, 26255221, 21005198, 25206643, 30457689, 35708733, + 29409112, 32563005, 39910177, 45161223, 35714854, 38866705, 49362669, 54612692, 42017535, + 45168367, 60912311, 68261528, 48319196, 52519622, 75610743, 3149814, 57769646, 4198390, + 2095110, 9451475, 3143687, 9451474, 6299621, 15755175, 6300644, 14706598, 12603326, + 23110515, 11554749, 21012342, 19956621, 29416257, 17859470, 25219913, 26263385, 32572189, + 23116638, 26276652, 31519533, 34675465, 26273592, 25232160, 33624849, 37828337, 26279717, + 24187669, 35727104, 5246965, 24184604, 6295538, 39930592, 9451473, 25238283, 9451472, + 4192261, 13658024, 6290435, 11559850, 7349219, 17865595, 7349218, 14716804, 11554749, + 19973973, 10506174, 14727012, 15761298, 18932542, 13663127, 11587410, 18920295, 15788854, + 14722931, 7395148, 19978055, 12645170, 13681497, 2153291, 17884985, 8393711, 9491278, + 9443307, 14741301, 9451472, 4249419, 8402896, 11597614, 9461678, 1072749387, 7363507, + 7341055, 10520463, 10487801, 6323098, 8398816, 8430453, 9447390, 2134918, 9456575, + 4241254, 8408001, 1070637947, 10515358, 1071693666, 7367590, 1063299959, 9475969, 1065403234, + 4229007, 1054911353, 6336364, 11541479, 39808, 12591075, 1097571, 8402896, 1067493240, + 8402896, 1068548962, 5264313, 1059105655, 3166143, 1061208932, 2125734, 1050717050, 1071670194, + 12586995, 1070629783, 14685164, 1064333224, 9448411, 1063292815, 10496985, 1054899107, 7358404, + 1053856653, 6308808, 1045462946, 4219823, 1044420494, 1071032, 1034977187, 1072723870, 12592094, + 1068525484, 12593114, 1066436498, 7354321, 1060140965, 6304722, 1059099533, 2115526, 1050704802, + 16333, 1049663373, 1067471805, 1040220066, 1063274441, 1040226191, 1058037688, 1029734309, 1052790727, + 15735781, 1047553974, 15737822, 1040208840, 10498007, 1037068214, 9449430, 1027625931, 4210635, + 1025534905, 3161039, 1015043022, 1071665089, 11545558, 1068516298, 9449426, 1063279546, 5256147, + 1058032584, 4207572, 1052795830, 1071658963, 1046499271, 1069560794, 1042311094, 1059077076, 1033917385, + 1055929311, 1030777783, 1046495190, 1021334477, 1041248229, 1019243450, 1032863706, 1008751568, 1025519596, + 14690264, 1019232223, 11546577, 1010838515, 8400852, 1005600740, 6303699, 996157434, 2111443, + 6304718, 1061847, 3160010, 1065368531, 2109398, 1062220764, 1060823, 1052786645, 1067461600, + 1048588258, 1065362407, 1040203736, 1051731946, 1033908201, 1047534581, 1026572253, 1034952692, 1018178543, + 1029705730, 1012940770, 1019223038, 1003498487, 1011877903, 998260711, 1002443783, 987768830, 994050075, + 8402891, 974131202, 4209605, 946862085, 4207569, 15302, 2110416, 1071641611, 1060827, + 11225, 11232, 2102257, 1059071973, 1063264237, 1056972782, 8402898, 1043342319, 1043336192, + 1038096380, 16801708, 1026564089, 1023410193, 1020267529, 26254200, 1010832386, 1005581344, 1002439701, + 36754246, 985665539, 986704943, 985660448, 45154078, 961547264, 966778940, 931132416, 55650040, + 17343, 1070593036, 1068492823, 1073739785, 13263, 2102257, 2046, 3151855, 9188, + 8401877, 5252066, 8403918, 1053825015, 15751092, 12602304, 15756196, 1033896968, 27300735, + 21003156, 22060919, 1015019545, 40949569, 31504222, 26263385, 996143144, 54595340, 40953649, + 28366660, 977266741, 67192538, 50402060, 32567088, 899670016, 1072690186, 59850468, 2096132, + 1067443224, 3151856, 1071638548, 3151853, 1072694271, 8402896, 1050621, 7355341, 5252067, + 16803749, 5253088, 10511275, 11551685, 25207666, 11555770, 12617612, 19951519, 31509326, + 18908045, 12624758, 34649951, 36760369, 24162150, 12628840, 47248165, 43059989, 27316045, + 11583326, 60893939, 1046535, 30466874, 5244924, 73491137, 3151854, 33618724, 4202471, + 1069541398, 8403917, 1044494, 4209616, 0, 12609447, 2100217, 4216760, 5253089, + 17863553, 5254110, 3174308, 12603324, 19968871, 8409020, 33686, 21006220, 21022550, + 11564955, 1069584269, 28358495, 21026632, 12621696, 1065392006, 34659134, 3145728, 12626799, + 8392690, 39910180, 4201450, 11582307, 5252067, 47258373, 6306766, 10536792, 2111445, + 1072688146, 7364529, 6289414, 1071663047, 1050619, 7371672, 4199410, 1066424253, 5253087, + 6329222, 4205532, 1060135861, 10507194, 4235131, 4212676, 1052797872, 15761299, 1092466, + 3171246, 1045458861, 18916210, 6294519, 1079197, 9443304, 19970910, 5251045, 1071679377, + 4203489, 21024591, 3160018, 1067488137, 1072705499, 22077248, 1068992, 1062247300, 1064318935, + 3142667, 1071670193, 9438202, 1055932372, 3149814, 1066431398, 6297579, 1046496211, 5254109, + 1061190559, 3156956, 1037060051, 6310847, 1054901146, 16334, 1026575315, 7368612, 9442285, + 1068519362, 7347165, 7374734, 5252066, 1063279544, 3154911, 5282688, 1061848, 1056991154, + 1069557731, 2140022, 1068515279, 1049653166, 1058023398, 1072738159, 1061178312, 1042314156, 1045440491, + 8387584, 1053840324, 11538412, 1032857583, 6296558, 1045452737, 7347172, 1020274676, 4205532, + 1036017600, 2108382, 1007690746, 2114504, 8395747, 1068512217, 3154899, 1072716728, 4203488, + 1060125653, 1057757, 1069575083, 1071655903, 1051739091, 1067458538, 1064335266, 1061171167, 1042302930, + 1051727861, 1058045852, 1050686431, 1031817171, 1035996161, 1052805016, 1040200673, 1022381012, 1020266508, + 11537395, 1028667364, 9444317, 1004535830, 7347175, 1017133030, 5251038, 963636228, 3156957, + 5251032, 1058785, 1064295459, 1071659987, 2106334, 1064314852, 1070592014, 1064323019, 1068508134, + 1051731944, 2100215, 1056985030, 1054875630, 1039149037, 9448410, 1049647042, 1041243126, 1026566130, + 20996013, 1041259457, 1026562045, 1013982199, 33592188, 1031823296, 1012928517, 1001399292, 46187343, + 11539429, 988809218, 4203471, 58781478, 6299617, 10190, 2106328, 1067442205, 1058783, + 9181, 9188, 1071641610, 1066414047, 1065360366, 1059068912, 2102258, 1055929311, 1047531517, + 1043338235, 9451474, 1045443552, 1030751244, 1027607558, 16801708, 1033910242, 1015019546, 1011876881, + 25200521, 1023424485, 997191719, 998243355, 32549738, 1011890152, 980412467, 950002688, 39896909, + 7348182, 1063245862, 1061146670, 1070589974, 4203483, 1069543440, 1067443224, 1073740805, 9186, + 1050619, 1073740803, 2103278, 1061168106, 9447392, 5250026, 6305745, 1047535602, 22043568, + 14697413, 10509236, 1033903098, 37787511, 27293589, 14710683, 1019220993, 53530435, 39889765, + 16813958, 999296002, 69272339, 52484923, 19964786, 977273856, 1065344032, 65078035, 1044493, + 10184, 1071641612, 1064293415, 1050621, 9173, 2101236, 1069542420, 1055723, 9190, + 9450453, 1023, 2110422, 1056970741, 18898860, 5252067, 3165122, 1039140868, 29396866, + 13650879, 3170225, 1023409171, 39892828, 21001114, 2126754, 1005581344, 49339194, 28350329, + 1082261, 988802093, 1068491802, 35699547, 5240834, 920635392, 1072691207, 43046719, 2101238, + 1059048498, 2103280, 1069539358, 8169, 1066394651, 8402896, 1071640589, 1071656925, 1072692229, + 14704559, 3066, 1068514257, 5249007, 19955601, 4204512, 1064324039, 14695371, 25205624, + 8408002, 1061181375, 30439316, 29407072, 12609447, 1056989111, 46183260, 1072688145, 15762320, + 6293494, 60877610, 1, 18913148, 3150831, 76618492, 2104300, 22065001, 1072701418, + 1063244842, 5257171, 1042452, 1066412005, 1068492822, 7361467, 1046533, 1059074016, 1072693249, + 8416166, 1052661, 1052783581, 5251046, 9469844, 2107360, 1045445594, 14698433, 10523524, + 3162060, 1038106584, 24147862, 3142664, 3168185, 6294505, 34644847, 1051642, 2124713, + 2103273, 44092235, 1055722, 2128796, 1070603243, 53538601, 13273, 1083279, 1061167085, + 1066392610, 1072710601, 6288392, 1050681328, 1070590993, 1070618556, 3146748, 1040195571, 0, + 1068524464, 1054704, 1030758390, 5253089, 1066430374, 1072703459, 1020272633, 11553728, 5243900, + 1069561815, 3150812, 16805792, 2101235, 1066419148, 1055716, 22056836, 1072701417, 1063276483, + 1068506093, 27305836, 1068510177, 1059085243, 1054873590, 32555860, 1064318937, 1054894004, 1042288639, + 1071637529, 1059078098, 9437177, 1028655112, 1073738762, 1052788685, 4197363, 1015021585, 1051640, + 1047547848, 1054701, 981459971, 3155936, 6294511, 1069556711, 1054849090, 6309830, 3150828, + 1063267298, 1063243820, 8413104, 1071652843, 1055929311, 1070589975, 9467805, 1063265257, 1049638876, + 5244924, 10521484, 1054877672, 1042300889, 17837015, 11574140, 1046490088, 1034961879, 33577899, + 3140623, 1038102504, 7342057, 48270206, 3144705, 1029713897, 4199401, 64010067, 1053682, + 4198370, 1055722, 1059046454, 10209, 2103271, 1065361388, 1065343012, 15313, 1069554668, + 1055924207, 1072689168, 1071665090, 1058020338, 1045438449, 5245942, 1069570998, 1046484984, 1036001268, + 14692311, 1067477931, 1034949630, 1025515512, 25187252, 1064335266, 1022365700, 1015029755, 35683216, + 8386561, 1003488257, 3149785, 46178158, 4196343, 6101, 2103263, 1064292394, 1054702, + 7137, 7145, 1068491802, 1070605285, 1067457518, 1062213618, 1072690186, 1066414045, 1052775419, + 1048581115, 3150835, 1061174229, 1037042695, 1034947588, 9449432, 1055933391, 1023409171, 1022362637, + 15748030, 1050692554, 1008727071, 1008730134, 22046628, 1044403142, 994044971, 969923584, 29393802, + 8389617, 1052750919, 1050652748, 1068489759, 4198382, 1061145649, 1059046455, 1070590994, 1055723, + 1070587931, 1067441185, 1072692227, 1067458538, 5243903, 2093066, 1053681, 1059070952, 19934168, + 11540459, 3156958, 1050683368, 36724647, 25183170, 6307786, 1042295784, 54563701, 40924053, + 8411064, 1033908200, 72402757, 56664936, 11561894, 1024472041, 1056948284, 71356221, 1073735699, + 6294497, 1064293416, 1055898688, 1073739784, 3150820, 1071639571, 1062195245, 1071646717, 7146, + 5245945, 1068491802, 1071650801, 1063263215, 16789463, 2096131, 1070605285, 1051727861, 29382575, + 9445351, 1069560793, 1040193531, 41976711, 19940293, 1068516301, 1028657153, 55618400, 30435234, + 1067470786, 1011877890, 1061145648, 40930175, 4191236, 994050048, 1067441183, 51425117, 1049598, + 5073, 1072689165, 1061144627, 1071648760, 6107, 4198388, 1066392609, 1067456498, 8168, + 12595159, 1070590995, 1063264237, 1060116468, 20991928, 1049599, 1059071975, 1045433345, 29389722, + 6299622, 1054879714, 1029701645, 37786492, 12599243, 1049637854, 1016068121, 1066391589, 18897841, + 5242869, 1001386021, 1069541398, 25196439, 2100212, 941603840, 1072691206, 32543613, 1070601204, + 1047504978, 2102258, 1067439142, 1063261173, 1056948284, 6302683, 1069540377, 1055922165, 1065343014, + 11552708, 1071641611, 1047533558, 1043470, 15753134, 3067, 1040194552, 11539437, 19953560, + 2105319, 1032854521, 28328896, 1071637529, 5257172, 2099173, 46167950, 1072689165, 7359425, + 1052650, 64007005, 1071644672, 10510255, 1069553649, 81846061, 1072699377, 12612509, 1059066871, + 1052750918, 10209, 1041432, 1048580094, 1061144626, 1063889, 1073737742, 1037043717, 1068490782, + 2116546, 1073740803, 1025508365, 2095111, 2120628, 1071648759, 999285763, 10492905, 3141644, + 1070604267, 1043305572, 22037443, 1047555, 1069558751, 1054846030, 35680155, 1071647738, 1069562835, + 1065337910, 48273267, 1069553649, 1067468744, 4186139, 61914957, 1066410985, 1066424253, 17826810, + 1059045433, 1064315872, 5238791, 34614226, 1064293416, 1061173208, 3144705, 52451240, 1069541399, + 1059079120, 2043, 70289276, 1048577, 5241852, 1069552629, 1049601108, 8396774, 1050617, + 1065360367, 1059043393, 16793544, 1070600182, 1061168106, 1067438124, 25191337, 1065359347, 1056975845, + 4188181, 33588107, 1059068913, 1051735008, 13633528, 41984877, 1053827055, 1047541723, 27274199, + 1064292397, 1047536621, 7338997, 39866291, 1068490781, 1041246187, 3147764, 54555535, 1071640591, + 4195309, 4084, 1055897668, 0, 1052655, 1066406900, 1062193204, 4202470, 1070601203, + 1059067893, 1069537315, 9452495, 1061164022, 1051727862, 3141647, 13652921, 1051726842, 1044388855, + 9440247, 17853347, 1042289662, 1036000248, 18884572, 22053773, 1032850434, 1028660218, 28328896, + 1070586911, 1018168321, 4194275, 37774244, 1071639571, 2013, 1051623, 1062193205, 1072691207, + 5093, 6125, 1066390567, 1072696313, 1069553647, 1064309748, 1070588953, 8169, 1056969721, + 1053823995, 1045513, 1061849, 1044383747, 1042286594, 5245942, 1065930, 1031798797, 1031799817, + 9446370, 2118587, 1020262423, 1020264465, 15743949, 3171245, 1007677474, 988796928, 20991929, + 3139600, 1040157805, 1038059632, 1068488740, 2094087, 1052746836, 1048551513, 1069540378, 1072694271, + 1065335867, 1060091970, 1070592015, 1070600182, 4185118, 1071632425, 1072692228, 1068506093, 19923963, + 11528202, 1072697335, 1065363428, 38809552, 26220519, 1056745, 1063269340, 58743714, 43008957, + 2109404, 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a/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_sensor_ctl.c b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_sensor_ctl.c new file mode 100644 index 0000000..e4246c8 --- /dev/null +++ b/libraries/sensor/hi3519dv500/smart_sc850sl/sc850sl_sensor_ctl.c @@ -0,0 +1,725 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif + +#include "sc850sl_cmos.h" +#include "ot_mpi_isp.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int sc850sl_i2c_init(ot_vi_pipe vi_pipe) +{ + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + ot_isp_sns_commbus *sc850slbusinfo = TD_NULL; + sc850slbusinfo = sc850sl_get_bus_info(vi_pipe); + dev_num = sc850slbusinfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (SC850SL_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int sc850sl_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 sc850sl_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 sc850sl_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = SC850SL_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = SC850SL_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = SC850SL_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (SC850SL_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + buf[idx] = addr & 0xff; + idx++; + } + + if (SC850SL_DATA_BYTE == 2) { /* 2 byte */ + buf[idx] = (data >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = data & 0xff; + } else { + buf[idx] = data & 0xff; + } + + ret = write(g_fd[vi_pipe], buf, SC850SL_ADDR_BYTE + SC850SL_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void sc850sl_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void sc850sl_standby(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +void sc850sl_restart(ot_vi_pipe vi_pipe) +{ + ot_unused(vi_pipe); + return; +} + +static void sc850sl_vc_wdr_2t1_8m30_10bit_init(ot_vi_pipe vi_pipe); +static void sc850sl_linear_8m30_12bit_init(ot_vi_pipe vi_pipe); + +void sc850sl_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_u8 img_mode; + td_bool init; + td_s32 ret; + ot_isp_sns_state *pastsc850sl = TD_NULL; + + pastsc850sl = sc850sl_get_ctx(vi_pipe); + init = pastsc850sl->init; + wdr_mode = pastsc850sl->wdr_mode; + img_mode = pastsc850sl->img_mode; + + ret = sc850sl_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + + /* When quick start mode, sensor init in boot, don't init sensor here */ + if (init == TD_FALSE) { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE == img_mode) { /* SC850SL_VMAX_8M_30FPS_12BIT_2TO1_WDR */ + sc850sl_vc_wdr_2t1_8m30_10bit_init(vi_pipe); + } else { + } + } else { + sc850sl_linear_8m30_12bit_init(vi_pipe); + } + } else { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + if (SC850SL_8M_30FPS_10BIT_2TO1_VC_MODE == img_mode) { + sc850sl_vc_wdr_2t1_8m30_10bit_init(vi_pipe); + } else { + } + } else { + sc850sl_linear_8m30_12bit_init(vi_pipe); + } + } + + pastsc850sl->init = TD_TRUE; + return; +} + +void sc850sl_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + + ret = sc850sl_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("SC850SL exit failed!\n"); + } + + return; +} + +static td_s32 sc850sl_linear_8m30_12bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += sc850sl_write_register(vi_pipe, 0x0103, 0x01); + delay_ms(100); /* 100ms */ + ret += sc850sl_write_register(vi_pipe, 0x0100, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x36e9, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x36f9, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x36ea, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x36eb, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x36ec, 0x4a); + ret += sc850sl_write_register(vi_pipe, 0x36ed, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x36fa, 0x0b); + ret += sc850sl_write_register(vi_pipe, 0x36fb, 0x13); + ret += sc850sl_write_register(vi_pipe, 0x36fc, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x36fd, 0x17); + ret += sc850sl_write_register(vi_pipe, 0x36e9, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x36f9, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3018, 0x7a); + ret += sc850sl_write_register(vi_pipe, 0x3019, 0xf0); + ret += sc850sl_write_register(vi_pipe, 0x301a, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x301e, 0x3c); + ret += sc850sl_write_register(vi_pipe, 0x301f, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x302a, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3031, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x3032, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3033, 0x22); + ret += sc850sl_write_register(vi_pipe, 0x3037, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x303e, 0xb4); + ret += sc850sl_write_register(vi_pipe, 0x320c, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x320d, 0x4c); + ret += sc850sl_write_register(vi_pipe, 0x3226, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3227, 0x03); + ret += sc850sl_write_register(vi_pipe, 0x3250, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3253, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x327e, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3280, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3281, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3301, 0x3c); + ret += sc850sl_write_register(vi_pipe, 0x3304, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x3306, 0xe8); + ret += sc850sl_write_register(vi_pipe, 0x3308, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3309, 0x70); + ret += sc850sl_write_register(vi_pipe, 0x330a, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x330b, 0xe0); + ret += sc850sl_write_register(vi_pipe, 0x330d, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3314, 0x92); + + return ret; +} + +static td_s32 sc850sl_linear_8m30_12bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x331e, 0x29); + ret += sc850sl_write_register(vi_pipe, 0x331f, 0x69); + ret += sc850sl_write_register(vi_pipe, 0x3333, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3347, 0x05); + ret += sc850sl_write_register(vi_pipe, 0x3348, 0xd0); + ret += sc850sl_write_register(vi_pipe, 0x3352, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3356, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x335d, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x3362, 0x70); + ret += sc850sl_write_register(vi_pipe, 0x338f, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x33af, 0x48); + ret += sc850sl_write_register(vi_pipe, 0x33fe, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3400, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3406, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3410, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3416, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x3433, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3440, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3446, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x3478, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3479, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x347a, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x347b, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x347c, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x347d, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3616, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x3620, 0x92); + ret += sc850sl_write_register(vi_pipe, 0x3622, 0x74); + ret += sc850sl_write_register(vi_pipe, 0x3629, 0x74); + ret += sc850sl_write_register(vi_pipe, 0x362a, 0xf0); + ret += sc850sl_write_register(vi_pipe, 0x362b, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x362d, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3630, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3633, 0x22); + ret += sc850sl_write_register(vi_pipe, 0x3634, 0x22); + ret += sc850sl_write_register(vi_pipe, 0x3635, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3637, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x3638, 0x26); + ret += sc850sl_write_register(vi_pipe, 0x363b, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x363c, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x363d, 0x05); + ret += sc850sl_write_register(vi_pipe, 0x363e, 0x8f); + ret += sc850sl_write_register(vi_pipe, 0x3648, 0xe0); + ret += sc850sl_write_register(vi_pipe, 0x3649, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x364a, 0x06); + + return ret; +} + +static td_s32 sc850sl_linear_8m30_12bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x364c, 0x6a); + ret += sc850sl_write_register(vi_pipe, 0x3650, 0x3d); + ret += sc850sl_write_register(vi_pipe, 0x3654, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3656, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3657, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x3658, 0x3d); + ret += sc850sl_write_register(vi_pipe, 0x365c, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x365e, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3901, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3904, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3905, 0x91); + ret += sc850sl_write_register(vi_pipe, 0x391e, 0x83); + ret += sc850sl_write_register(vi_pipe, 0x3928, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3933, 0xa0); + ret += sc850sl_write_register(vi_pipe, 0x3934, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3935, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3936, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3937, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3938, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3946, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3961, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3962, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3963, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3964, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3965, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3966, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3967, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x39cd, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x39ce, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3e01, 0x82); + ret += sc850sl_write_register(vi_pipe, 0x3e02, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e0e, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x3e0f, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e1c, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x3e23, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e24, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e53, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e54, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e68, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e69, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x3e73, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e74, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e86, 0x03); + ret += sc850sl_write_register(vi_pipe, 0x3e87, 0x40); + + return ret; +} + +static td_s32 sc850sl_linear_8m30_12bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x3f02, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4424, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x4501, 0xc4); + ret += sc850sl_write_register(vi_pipe, 0x4509, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x4561, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x4800, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4837, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x4900, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4937, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x5000, 0x0e); + ret += sc850sl_write_register(vi_pipe, 0x500f, 0x35); + ret += sc850sl_write_register(vi_pipe, 0x5020, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x5787, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x5788, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x5789, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x578a, 0x18); + ret += sc850sl_write_register(vi_pipe, 0x578b, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x578c, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x5790, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x5791, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x5792, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x5793, 0x18); + ret += sc850sl_write_register(vi_pipe, 0x5794, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x5795, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x5799, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x57a2, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x59e0, 0xfe); + ret += sc850sl_write_register(vi_pipe, 0x59e1, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x59e2, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59e3, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59e4, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59e5, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59e6, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59e7, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59e8, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59e9, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ea, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59eb, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59ec, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ed, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59ee, 0xfe); + ret += sc850sl_write_register(vi_pipe, 0x59ef, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x59f4, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59f5, 0x30); + + return ret; +} + +static td_s32 sc850sl_linear_8m30_12bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x59f6, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59f7, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59f8, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59f9, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59fa, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59fb, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59fc, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59fd, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59fe, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ff, 0x30); + + ret += sc850sl_write_register(vi_pipe, 0x5000, 0x0); /* sensor dpc off */ + ret += sc850sl_write_register(vi_pipe, 0x5002, 0x0); + ret += sc850sl_write_register(vi_pipe, 0x33b0, 0x0); + + ret += sc850sl_write_register(vi_pipe, 0x0100, 0x01); + + return ret; +} + + +static void sc850sl_linear_8m30_12bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += sc850sl_linear_8m30_12bit_init_part1(vi_pipe); + ret += sc850sl_linear_8m30_12bit_init_part2(vi_pipe); + ret += sc850sl_linear_8m30_12bit_init_part3(vi_pipe); + ret += sc850sl_linear_8m30_12bit_init_part4(vi_pipe); + ret += sc850sl_linear_8m30_12bit_init_part5(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("sc850sl write register failed!\n"); + return; + } + + printf("========================================================================\n"); + printf("vi_pipe:%d,== SC850SL_MIPI_27MInput_4lane_1080Mbps_12bit_30fps_3840x2160 Init OK! ==\n", vi_pipe); + printf("========================================================================\n"); + return; +} + +static td_s32 sc850sl_vc_wdr_2t1_8m30_10bit_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x0103, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x0100, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x36e9, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x36f9, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x36ea, 0x09); + ret += sc850sl_write_register(vi_pipe, 0x36eb, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x36ec, 0x4b); + ret += sc850sl_write_register(vi_pipe, 0x36ed, 0x34); + ret += sc850sl_write_register(vi_pipe, 0x36fa, 0x0b); + ret += sc850sl_write_register(vi_pipe, 0x36fb, 0x13); + ret += sc850sl_write_register(vi_pipe, 0x36fc, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x36fd, 0x17); + ret += sc850sl_write_register(vi_pipe, 0x36e9, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x36f9, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3018, 0x7a); + ret += sc850sl_write_register(vi_pipe, 0x3019, 0xf0); + ret += sc850sl_write_register(vi_pipe, 0x301a, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x301e, 0x3c); + ret += sc850sl_write_register(vi_pipe, 0x301f, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x3028, 0x77); + ret += sc850sl_write_register(vi_pipe, 0x302a, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3031, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3032, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3033, 0x22); + ret += sc850sl_write_register(vi_pipe, 0x3037, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x303e, 0xb4); + ret += sc850sl_write_register(vi_pipe, 0x3201, 0x98); + ret += sc850sl_write_register(vi_pipe, 0x3203, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x3205, 0xa7); + ret += sc850sl_write_register(vi_pipe, 0x3207, 0x83); + ret += sc850sl_write_register(vi_pipe, 0x320c, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x320d, 0x26); + ret += sc850sl_write_register(vi_pipe, 0x320e, 0x11); + ret += sc850sl_write_register(vi_pipe, 0x320f, 0x94); + ret += sc850sl_write_register(vi_pipe, 0x3211, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x3213, 0x2c); + ret += sc850sl_write_register(vi_pipe, 0x3223, 0xd0); + ret += sc850sl_write_register(vi_pipe, 0x3226, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3227, 0x03); + ret += sc850sl_write_register(vi_pipe, 0x3230, 0x11); + ret += sc850sl_write_register(vi_pipe, 0x3231, 0x93); + ret += sc850sl_write_register(vi_pipe, 0x3250, 0xff); + ret += sc850sl_write_register(vi_pipe, 0x3253, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x327e, 0x55); + ret += sc850sl_write_register(vi_pipe, 0x3280, 0x00); + return ret; +} + +static td_s32 sc850sl_vc_wdr_2t1_8m30_10bit_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x3281, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3301, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x3304, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x3306, 0x54); + ret += sc850sl_write_register(vi_pipe, 0x3308, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3309, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x330a, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x330b, 0xa0); + ret += sc850sl_write_register(vi_pipe, 0x330d, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3314, 0x92); + ret += sc850sl_write_register(vi_pipe, 0x331e, 0x29); + ret += sc850sl_write_register(vi_pipe, 0x331f, 0x59); + ret += sc850sl_write_register(vi_pipe, 0x3333, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3347, 0x05); + ret += sc850sl_write_register(vi_pipe, 0x3348, 0x50); + ret += sc850sl_write_register(vi_pipe, 0x3352, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3356, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x335d, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x3362, 0x70); + ret += sc850sl_write_register(vi_pipe, 0x338f, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x33af, 0x48); + ret += sc850sl_write_register(vi_pipe, 0x33fe, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x3400, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3406, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3410, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3416, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x3433, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3440, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x3446, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x3478, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3479, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x347a, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x347b, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x347c, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x347d, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3616, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x3620, 0x94); + ret += sc850sl_write_register(vi_pipe, 0x3622, 0x74); + ret += sc850sl_write_register(vi_pipe, 0x3629, 0x74); + ret += sc850sl_write_register(vi_pipe, 0x362a, 0xf0); + ret += sc850sl_write_register(vi_pipe, 0x362b, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x362d, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3630, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3633, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x3634, 0x22); + return ret; +} + +static td_s32 sc850sl_vc_wdr_2t1_8m30_10bit_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x3635, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3637, 0x18); + ret += sc850sl_write_register(vi_pipe, 0x3638, 0x26); + ret += sc850sl_write_register(vi_pipe, 0x363b, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x363c, 0x08); + ret += sc850sl_write_register(vi_pipe, 0x363d, 0x05); + ret += sc850sl_write_register(vi_pipe, 0x363e, 0x8f); + ret += sc850sl_write_register(vi_pipe, 0x3648, 0xe0); + ret += sc850sl_write_register(vi_pipe, 0x3649, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x364a, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x364c, 0x6a); + ret += sc850sl_write_register(vi_pipe, 0x3650, 0x3d); + ret += sc850sl_write_register(vi_pipe, 0x3654, 0x70); + ret += sc850sl_write_register(vi_pipe, 0x3656, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3657, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x3658, 0x3d); + ret += sc850sl_write_register(vi_pipe, 0x365c, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x365e, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3901, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3902, 0xf1); + ret += sc850sl_write_register(vi_pipe, 0x3904, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3905, 0x91); + ret += sc850sl_write_register(vi_pipe, 0x391e, 0x03); + ret += sc850sl_write_register(vi_pipe, 0x391f, 0x11); + ret += sc850sl_write_register(vi_pipe, 0x3928, 0x04); + ret += sc850sl_write_register(vi_pipe, 0x3933, 0xa0); + ret += sc850sl_write_register(vi_pipe, 0x3934, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3935, 0x68); + ret += sc850sl_write_register(vi_pipe, 0x3936, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3937, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3938, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3946, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x3961, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3962, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3963, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3964, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3965, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3966, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3967, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x39cd, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x39ce, 0xc8); + ret += sc850sl_write_register(vi_pipe, 0x3e00, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3e01, 0x00); + return ret; +} + +static td_s32 sc850sl_vc_wdr_2t1_8m30_10bit_init_part4(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x3e02, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e04, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x3e05, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e0e, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x3e0f, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e1c, 0x0f); + ret += sc850sl_write_register(vi_pipe, 0x3e23, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x3e24, 0x0a); + ret += sc850sl_write_register(vi_pipe, 0x3e53, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e54, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e68, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e69, 0x80); + ret += sc850sl_write_register(vi_pipe, 0x3e73, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e74, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x3e86, 0x03); + ret += sc850sl_write_register(vi_pipe, 0x3e87, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x3f02, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4424, 0x02); + ret += sc850sl_write_register(vi_pipe, 0x4501, 0xb4); + ret += sc850sl_write_register(vi_pipe, 0x4503, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x4509, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x4561, 0x12); + ret += sc850sl_write_register(vi_pipe, 0x4800, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4837, 0x16); + ret += sc850sl_write_register(vi_pipe, 0x4853, 0xf8); + ret += sc850sl_write_register(vi_pipe, 0x4900, 0x24); + ret += sc850sl_write_register(vi_pipe, 0x4937, 0x16); + ret += sc850sl_write_register(vi_pipe, 0x4953, 0xf8); + ret += sc850sl_write_register(vi_pipe, 0x5000, 0x0e); + ret += sc850sl_write_register(vi_pipe, 0x500f, 0x35); + ret += sc850sl_write_register(vi_pipe, 0x5020, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x5787, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x5788, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x5789, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x578a, 0x18); + ret += sc850sl_write_register(vi_pipe, 0x578b, 0x0c); + ret += sc850sl_write_register(vi_pipe, 0x578c, 0x00); + ret += sc850sl_write_register(vi_pipe, 0x5790, 0x10); + ret += sc850sl_write_register(vi_pipe, 0x5791, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x5792, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x5793, 0x18); + ret += sc850sl_write_register(vi_pipe, 0x5794, 0x0c); + return ret; +} + +static td_s32 sc850sl_vc_wdr_2t1_8m30_10bit_init_part5(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += sc850sl_write_register(vi_pipe, 0x5795, 0x01); + ret += sc850sl_write_register(vi_pipe, 0x5799, 0x06); + ret += sc850sl_write_register(vi_pipe, 0x57a2, 0x60); + ret += sc850sl_write_register(vi_pipe, 0x59e0, 0xfe); + ret += sc850sl_write_register(vi_pipe, 0x59e1, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x59e2, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59e3, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59e4, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59e5, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59e6, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59e7, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59e8, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59e9, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ea, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59eb, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59ec, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ed, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59ee, 0xfe); + ret += sc850sl_write_register(vi_pipe, 0x59ef, 0x40); + ret += sc850sl_write_register(vi_pipe, 0x59f4, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59f5, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59f6, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59f7, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59f8, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59f9, 0x20); + ret += sc850sl_write_register(vi_pipe, 0x59fa, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59fb, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59fc, 0x30); + ret += sc850sl_write_register(vi_pipe, 0x59fd, 0x3f); + ret += sc850sl_write_register(vi_pipe, 0x59fe, 0x38); + ret += sc850sl_write_register(vi_pipe, 0x59ff, 0x30); + + delay_ms(1); + ret += sc850sl_write_register(vi_pipe, 0x0100, 0x01); + + return ret; +} + +static void sc850sl_vc_wdr_2t1_8m30_10bit_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += sc850sl_vc_wdr_2t1_8m30_10bit_init_part1(vi_pipe); + ret += sc850sl_vc_wdr_2t1_8m30_10bit_init_part2(vi_pipe); + ret += sc850sl_vc_wdr_2t1_8m30_10bit_init_part3(vi_pipe); + ret += sc850sl_vc_wdr_2t1_8m30_10bit_init_part4(vi_pipe); + ret += sc850sl_vc_wdr_2t1_8m30_10bit_init_part5(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("sc850sl write register failed!\n"); + return; + } + + printf("==========================================================================================\n"); + printf("vi_pipe:%d,== SC850SL_MIPI_27MInput_4lane_1458Mbps_10bit_WDR2T1_30fps_3840x2160 Init OK! ==\n", vi_pipe); + printf("==========================================================================================\n"); + return; +} diff --git a/libraries/sensor/hi3519dv500/sony_imx347_slave/Makefile b/libraries/sensor/hi3519dv500/sony_imx347_slave/Makefile new file mode 100644 index 0000000..8bb6b60 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx347_slave/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_imx347_slave + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.c b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.c new file mode 100644 index 0000000..2cef850 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.c @@ -0,0 +1,1165 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" +#include "securec.h" +#include "imx347_slave_cmos_ex.h" +#include "imx347_slave_cmos.h" + +#define IMX347_SLAVE_ID 347 +#define SENSOR_IMX347_SLAVE_WIDTH 2688 +#define SENSOR_IMX347_SLAVE_HEIGHT 1520 + +#define higher_4bits(x) (((x) & 0xf0000) >> 16) +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define imx347_slave_sensor_set_ctx(pipe, ctx) ((g_imx347_slave_sns_state[pipe]) = (ctx)) +#define imx347_slave_sensor_reset_ctx(pipe) (g_imx347_slave_sns_state[pipe] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +typedef struct { + td_u8 hcg; + td_u32 brl; +} imx347_slave_state; + +imx347_slave_state g_imx347_slave_state[OT_ISP_MAX_PIPE_NUM] = {{0}}; +ot_isp_sns_commbus g_imx347_slave_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0}, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1} +}; + +td_s32 g_imx347_slave_bind_dev[OT_ISP_MAX_PIPE_NUM] = {0, 0, 1, 1}; +static td_u32 g_imx347_slave_sensor_mode_time[OT_ISP_MAX_PIPE_NUM] = {0, 0, 0, 0}; + +ot_isp_sns_state *g_imx347_slave_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; + +ot_isp_slave_sns_sync g_imx347_slave_sync[OT_ISP_MAX_PIPE_NUM]; + + +ot_isp_sns_commbus *imx347_slave_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_imx347_slave_bus_info[vi_pipe]; +} + +ot_isp_sns_state *imx347_slave_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_imx347_slave_sns_state[vi_pipe]; +} + +td_void imx347_slave_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en) +{ + blc_clamp_info[vi_pipe] = clamp_en; +} + + +imx347_slave_video_mode_tbl g_imx347_slave_mode_tbl[IMX347_SLAVE_MODE_BUTT] = { + {37125000, 750, 1237500, IMX347_SLAVE_VMAX_4M30_LINEAR, IMX347_SLAVE_FULL_LINES_MAX, + 30, 0.05, 2688, 1520, 0, OT_WDR_MODE_NONE, "IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE"}, +}; + +/**************************************************************************** + * local variables * + ****************************************************************************/ +/* Imx347_slave Register Address */ +#define IMX347_SLAVE_SHS1_ADDR 0x3058 +#define IMX347_SLAVE_GAIN_ADDR 0x30e8 +#define IMX347_SLAVE_HCG_ADDR 0x3019 +#define IMX347_SLAVE_VMAX_ADDR 0x3030 +#define IMX347_SLAVE_Y_OUT_SIZE_ADDR 0x3056 + +#define imx347_slave_err_mode_print(sns_image_mode, sns_state) \ + do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ + }while (0) + +imx347_slave_video_mode_tbl *imx347_get_slave_mode_tbl(td_u8 img_mode) +{ + return &g_imx347_slave_mode_tbl[img_mode]; +} + +ot_isp_slave_sns_sync *imx347_get_slave_sync(ot_vi_pipe vi_pipe) +{ + return &g_imx347_slave_sync[vi_pipe]; +} + +td_s32 imx347_get_slave_bind_dev(ot_vi_pipe vi_pipe) +{ + return g_imx347_slave_bind_dev[vi_pipe]; +} + +td_u32 imx347_get_slave_sensor_mode_time(ot_vi_pipe vi_pipe) +{ + return g_imx347_slave_sensor_mode_time[vi_pipe]; +} + +ot_isp_sns_state *imx347_get_slave_sns_state(ot_vi_pipe vi_pipe) +{ + return g_imx347_slave_sns_state[vi_pipe]; +} + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = IMX347_SLAVE_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->again_accu.accuracy = 1; + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->dgain_accu.accuracy = 1; + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 255 << ae_sns_dft->isp_dgain_shift; /* max 255 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_0; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_32_0; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = 78572; /* max 78752 */ + ae_sns_dft->min_again = 1024; /* min 1024 */ + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = 1024; /* max 1024 */ + ae_sns_dft->min_dgain = 1024; /* min 1024 */ + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x38; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 76151; /* init 76151 */ + + ae_sns_dft->max_int_time = sns_state->fl_std - 2; /* sub 2 */ + ae_sns_dft->min_int_time = 2; /* min 2 */ + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = 2; /* min 2 */ + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + default: + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[6].data = low_8bits(vmax); /* array index 6 */ + sns_state->regs_info[0].i2c_data[7].data = high_8bits(vmax); /* array index 7 */ + sns_state->regs_info[0].i2c_data[8].data = higher_4bits(vmax); /* array index 8 */ + } + return; +} + +/* the function of sensor set fps */ +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, vmax, vs_time; + td_float max_fps, min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_imx347_slave_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_imx347_slave_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_imx347_slave_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_imx347_slave_mode_tbl[sns_state->img_mode].min_fps; + vs_time = g_imx347_slave_mode_tbl[sns_state->img_mode].inck_per_vs; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + vmax = (vmax > lines_max) ? lines_max : vmax; + + g_imx347_slave_sync[vi_pipe].vs_time = (td_u32)(vs_time * max_fps / div_0_to_1_float(fps)); + + cmos_config_vmax(sns_state, vmax); + + sns_state->fl_std = vmax; + sns_state->regs_info[0].slv_sync.slave_vs_time = g_imx347_slave_sync[vi_pipe].vs_time; + ae_sns_dft->lines_per500ms = (td_u32)(lines * max_fps / 2); /* div 2 */ + ae_sns_dft->fps = fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->max_int_time = sns_state->fl_std - 2; /* sub 2 */ + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines_max; + td_u32 vmax = IMX347_SLAVE_VMAX_4M30_LINEAR; + td_u32 hs_time; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_imx347_slave_mode_tbl[sns_state->img_mode].max_ver_lines; + hs_time = g_imx347_slave_mode_tbl[sns_state->img_mode].inck_per_hs; + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + vmax = full_lines; + vmax = (vmax > lines_max) ? lines_max : vmax; + g_imx347_slave_sync[vi_pipe].vs_time = min((td_u64)hs_time * vmax, IMX347_SLAVE_VS_TIME_MAX); + sns_state->regs_info[0].slv_sync.slave_vs_time = g_imx347_slave_sync[vi_pipe].vs_time; + sns_state->fl[0] = vmax; + } + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + sns_state->regs_info[0].i2c_data[6].data = vmax & 0xFF; /* index 6 */ + sns_state->regs_info[0].i2c_data[7].data = (vmax & 0xFF00) >> 8; /* index 7, shift 8 */ + sns_state->regs_info[0].i2c_data[8].data = (vmax & 0xF0000) >> 16; /* index 8, shift 16 */ + break; + + default: + break; + } + + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->max_int_time = sns_state->fl[0] - 2; /* max_int_time: Flstd - 2 */ + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 value; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + value = sns_state->fl[0] - int_time; + value = min(value, IMX347_SLAVE_FULL_LINES_MAX); + value = min(max(value, 3), sns_state->fl[0] - 2); /* max 3, sub 2 */ + + sns_state->regs_info[0].i2c_data[0].data = (value & 0xFF); + sns_state->regs_info[0].i2c_data[1].data = ((value & 0xFF00) >> 8); /* index 1, shift 8 */ + sns_state->regs_info[0].i2c_data[2].data = ((value & 0xF0000) >> 16); /* index 2, shift 16 */ +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + cmos_inttime_update_linear(vi_pipe, int_time); + } + + return; +} +#define GAIN_NODE_NUM 262 +#define AGAIN_NODE_NUM 127 +#define DGAIN_NODE_NUM 140 + +static td_u32 g_gain_table[GAIN_NODE_NUM] = { + 1024, 1059, 1097, 1135, 1175, 1217, 1259, + 1304, 1349, 1397, 1446, 1497, 1549, 1604, + 1660, 1719, 1779, 1842, 1906, 1973, 2043, + 2048, 2119, 2194, 2271, 2351, 2434, 2519, + 2608, 2699, 2794, 2892, 2994, 3099, 3208, + 3321, 3438, 3559, 3684, 3813, 3947, 4086, + 4229, 4378, 4532, 4691, 4856, 5027, 5203, + 5386, 5576, 5772, 5974, 6184, 6402, 6627, + 6860, 7101, 7350, 7609, 7876, 8153, 8439, + 8736, 9043, 9361, 9690, 10030, 10383, 10748, + 11125, 11516, 11921, 12340, 12774, 13222, 13687, + 14168, 14666, 15182, 15715, 16267, 16839, 17431, + 18043, 18677, 19334, 20013, 20717, 21445, 22198, + 22978, 23786, 24622, 25487, 26383, 27310, 28270, + 29263, 30292, 31356, 32458, 33599, 34780, 36002, + 37267, 38577, 39932, 41336, 42788, 44292, 45849, + 47460, 49128, 50854, 52641, 54491, 56406, 58388, + 60440, 62564, 64763, 67039, 69395, 71833, 74358, + 76971, 79676, 82476, 85374, 88375, 91480, 94695, + 98023, 101468, 105034, 108725, 112545, 116501, 120595, + 124833, 129220, 133761, 138461, 143327, 148364, 153578, + 158975, 164562, 170345, 176331, 182528, 188942, 195582, + 202455, 209570, 216935, 224558, 232450, 240619, 249074, + 257827, 266888, 276267, 285976, 296026, 306429, 317197, + 328344, 339883, 351827, 364191, 376990, 390238, 403952, + 418147, 432842, 448053, 463799, 480098, 496969, 514434, + 532512, 551226, 570597, 590649, 611406, 632892, 655133, + 678156, 701988, 726657, 752194, 778627, 805990, 834314, + 863634, 893984, 925400, 957921, 991585, 1026431, 1062502, + 1099841, 1138491, 1178500, 1219916, 1262786, 1307163, 1353100, + 1400651, 1449872, 1500824, 1553566, 1608162, 1664676, 1723177, + 1783733, 1846417, 1911304, 1978472, 2048000, 2119971, 2194471, + 2271590, 2351418, 2434052, 2519590, 2608134, 2699789, 2794666, + 2892876, 2994538, 3099773, 3208706, 3321467, 3438190, 3559016, + 3684087, 3813554, 3947571, 4086297, 4229898, 4378546, 4532417, + 4691696, 4856573, 5027243, 5203912, 5386788, 5576092, 5772048, + 5974890, 6184861, 6402210, 6627198, 6860092, 7101170, 7350721, + 7609041, 7876439, 8153234 +}; + +static td_void cmos_again_calc_table(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db) +{ + int i; + + ot_unused(vi_pipe); + sns_check_pointer_void_return(again_lin); + sns_check_pointer_void_return(again_db); + + if (*again_lin >= g_gain_table[AGAIN_NODE_NUM - 1]) { + *again_lin = g_gain_table[AGAIN_NODE_NUM - 1]; + *again_db = AGAIN_NODE_NUM - 1; + return; + } + + for (i = 1; i < AGAIN_NODE_NUM; i++) { + if (*again_lin < g_gain_table[i]) { + *again_lin = g_gain_table[i - 1]; + *again_db = i - 1; + break; + } + } + return; +} + +static td_void cmos_dgain_calc_table(ot_vi_pipe vi_pipe, td_u32 *dgain_lin, td_u32 *dgain_db) +{ + int i; + + ot_unused(vi_pipe); + sns_check_pointer_void_return(dgain_lin); + sns_check_pointer_void_return(dgain_db); + + if (*dgain_lin >= g_gain_table[DGAIN_NODE_NUM - 1]) { + *dgain_lin = g_gain_table[DGAIN_NODE_NUM - 1]; + *dgain_db = DGAIN_NODE_NUM - 1; + return; + } + + for (i = 1; i < DGAIN_NODE_NUM; i++) { + if (*dgain_lin < g_gain_table[i]) { + *dgain_lin = g_gain_table[i - 1]; + *dgain_db = i - 1; + break; + } + } + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 hcg; + td_u32 tmp; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (again >= 28) { /* HCG 28 */ + hcg = 0x1; + again = again - 28; /* again sub 28 */ + } else { + hcg = 0x0; + } + + tmp = again + dgain; + + sns_state->regs_info[0].i2c_data[3].data = low_8bits(tmp); /* index 3 */ + sns_state->regs_info[0].i2c_data[4].data = higher_4bits(tmp); /* index 4 shift 8 */ + sns_state->regs_info[0].i2c_data[5].data = (hcg & 0xFF); /* index 5 */ + + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_unused(man_ratio_enable); + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + return; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_again_calc_table = cmos_again_calc_table; + exp_func->pfn_cmos_dgain_calc_table = cmos_dgain_calc_table; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 4950 +#define CALIBRATE_STATIC_WB_R_GAIN 450 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 447 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 (-53) +#define CALIBRATE_AWB_P2 309 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 160279 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-110119) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + default: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + default: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_cac = 1; + isp_def->cac = &g_cmos_cac; + isp_def->key.bit1_bshp = 1; + isp_def->bshp = &g_cmos_bayershp; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + isp_def->key.bit1_ca = 0; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + isp_def->key.bit1_ca = 0; +#endif + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; + + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 1; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + default: + cmos_get_isp_linear_default(isp_def); + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + + isp_def->sns_mode.sns_id = IMX347_SLAVE_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + const ot_isp_cmos_black_level *cmos_blc_def = TD_NULL; + + sns_check_pointer_return(black_level); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if (is_no_fe_pipe(vi_pipe)) { + cmos_blc_def = &g_cmos_blc_virt_pipe; + } else { + cmos_blc_def = &g_cmos_blc; + } + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), cmos_blc_def, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + if (vi_pipe == 0) { + black_level->auto_attr.black_level[0][i] = 800; /* blc 800 */ + } else if (vi_pipe == 1) { + black_level->auto_attr.black_level[0][i] = 1200; /* blc 1200 */ + } else { + black_level->auto_attr.black_level[0][i] = 800; /* blc 800 */ + } + } + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps, max_int_time_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + check_ret(ot_mpi_isp_get_sns_slave_attr(vi_pipe, &g_imx347_slave_sync[vi_pipe])); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE) { + g_imx347_slave_sync[vi_pipe].vs_time = (td_u32)((g_imx347_slave_mode_tbl[sns_state->img_mode].inck_per_vs) * + g_imx347_slave_mode_tbl[sns_state->img_mode].max_fps / 5); /* divide 5 */ + full_lines_5fps = (IMX347_SLAVE_VMAX_4M30_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + max_int_time_5fps = 4; /* max_int_time_5fps 4 */ + + if (enable) { /* setup for ISP pixel calibration mode */ + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_GAIN_ADDR, 0x00); + + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR, low_8bits(full_lines_5fps)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR + 1, high_8bits(full_lines_5fps)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR + 2, higher_4bits(full_lines_5fps)); /* index 2 */ + + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_SHS1_ADDR, low_8bits(max_int_time_5fps)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_SHS1_ADDR + 1, high_8bits(max_int_time_5fps)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_SHS1_ADDR + 2, higher_4bits(max_int_time_5fps)); /* index 2 */ + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > 0x1FFFF) ? 0x1FFFF : sns_state->fl_std; + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR, low_8bits(sns_state->fl_std)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR + 1, high_8bits(sns_state->fl_std)); + imx347_slave_write_register(vi_pipe, IMX347_SLAVE_VMAX_ADDR + 2, higher_4bits(sns_state->fl_std)); /* index 2 */ + sns_state->sync_init = TD_FALSE; + } + + check_ret(ot_mpi_isp_set_sns_slave_attr(vi_pipe, &g_imx347_slave_sync[vi_pipe])); + + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_imx347_slave_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = 9; /* reg_num 9 */ + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = IMX347_SLAVE_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = IMX347_SLAVE_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = IMX347_SLAVE_DATA_BYTE; + } + + /* Linear Mode Regs */ + sns_state->regs_info[0].i2c_data[0].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[0].reg_addr = IMX347_SLAVE_SHS1_ADDR; + sns_state->regs_info[0].i2c_data[1].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[1].reg_addr = IMX347_SLAVE_SHS1_ADDR + 1; + sns_state->regs_info[0].i2c_data[2].delay_frame_num = 0; /* index 2 */ + sns_state->regs_info[0].i2c_data[2].reg_addr = IMX347_SLAVE_SHS1_ADDR + 2; /* index 2, index 2 */ + + sns_state->regs_info[0].i2c_data[3].delay_frame_num = 0; /* index 3 */ + sns_state->regs_info[0].i2c_data[3].reg_addr = IMX347_SLAVE_GAIN_ADDR; /* index 3 */ + + sns_state->regs_info[0].i2c_data[4].delay_frame_num = 0; /* index 4 */ + sns_state->regs_info[0].i2c_data[4].reg_addr = IMX347_SLAVE_GAIN_ADDR + 1; /* index 4 */ + + sns_state->regs_info[0].i2c_data[5].delay_frame_num = 0; /* index 5 */ + sns_state->regs_info[0].i2c_data[5].reg_addr = IMX347_SLAVE_HCG_ADDR; /* index 5 */ + + sns_state->regs_info[0].i2c_data[6].delay_frame_num = 1; /* index 6 */ + sns_state->regs_info[0].i2c_data[6].reg_addr = IMX347_SLAVE_VMAX_ADDR; /* index 6 */ + sns_state->regs_info[0].i2c_data[7].delay_frame_num = 1; /* index 7 */ + sns_state->regs_info[0].i2c_data[7].reg_addr = IMX347_SLAVE_VMAX_ADDR + 1; /* index 7 */ + sns_state->regs_info[0].i2c_data[8].delay_frame_num = 1; /* index 8 */ + sns_state->regs_info[0].i2c_data[8].reg_addr = IMX347_SLAVE_VMAX_ADDR + 2; /* index 8, index 2 */ + + sns_state->regs_info[0].slv_sync.update = TD_TRUE; + sns_state->regs_info[0].slv_sync.delay_frame_num = 1; /* delay_frame 1 */ + sns_state->regs_info[0].slv_sync.slave_bind_dev = g_imx347_slave_bind_dev[vi_pipe]; + return; +} + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + if (sns_state->regs_info[0].slv_sync.slave_vs_time == sns_state->regs_info[1].slv_sync.slave_vs_time) { + sns_state->regs_info[0].slv_sync.update = TD_FALSE; + } else { + sns_state->regs_info[0].slv_sync.update = TD_TRUE; + } + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + switch (sns_image_mode) { + case IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE: + sns_state->fl_std = IMX347_SLAVE_VMAX_4M30_LINEAR; + g_imx347_slave_state[vi_pipe].hcg = 0x0; + break; + default: + sns_state->fl_std = IMX347_SLAVE_VMAX_4M30_LINEAR; + g_imx347_slave_state[vi_pipe].hcg = 0x0; + break; + } +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < IMX347_SLAVE_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_imx347_slave_mode_tbl[i].max_fps && + sns_image_mode->width <= g_imx347_slave_mode_tbl[i].width && + sns_image_mode->height <= g_imx347_slave_mode_tbl[i].height && + sns_state->wdr_mode == g_imx347_slave_mode_tbl[i].wdr_mode) { + image_mode = (imx347_slave_res_mode)i; + break; + } + } + + if (i >= IMX347_SLAVE_MODE_BUTT) { + imx347_slave_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = IMX347_SLAVE_VMAX_4M30_LINEAR; + sns_state->fl[0] = IMX347_SLAVE_VMAX_4M30_LINEAR; + sns_state->fl[1] = IMX347_SLAVE_VMAX_4M30_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = imx347_slave_init; + sensor_exp_func->pfn_cmos_sns_exit = imx347_slave_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 imx347_slave_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_imx347_slave_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + imx347_slave_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + imx347_slave_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + imx347_slave_sensor_reset_ctx(vi_pipe); + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = IMX347_SLAVE_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, IMX347_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, IMX347_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, IMX347_SLAVE_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_imx347_slave_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = imx347_slave_standby, + .pfn_restart = imx347_slave_restart, + .pfn_mirror_flip = imx347_mirror_flip, + .pfn_set_blc_clamp = imx347_blc_clamp, + .pfn_write_reg = imx347_slave_write_register, + .pfn_read_reg = imx347_slave_read_register, + .pfn_set_bus_info = imx347_slave_set_bus_info, + .pfn_set_init = sensor_set_init +}; diff --git a/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.h b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.h new file mode 100644 index 0000000..0fa63e2 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos.h @@ -0,0 +1,90 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef IMX347_SLAVE_CMOS_H +#define IMX347_SLAVE_CMOS_H + +#include "ot_common_isp.h" +#include "ot_sns_ctrl.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#ifndef min +#define min(a, b) (((a) > (b)) ? (b) : (a)) +#endif + +#ifndef max +#define max(a, b) (((a) > (b)) ? (a) : (b)) +#endif + +#define check_ret(express) \ + do { \ + td_s32 ret; \ + ret = express; \ + if (ret != TD_SUCCESS) { \ + printf("Failed at %s: LINE: %d with %#x!\n", __FUNCTION__, __LINE__, ret); \ + } \ + } while (0) + +#define IMX347_SLAVE_I2C_ADDR 0x34 +#define IMX347_SLAVE_ADDR_BYTE 2 +#define IMX347_SLAVE_DATA_BYTE 1 +#define imx347_slave_sensor_get_ctx(pipe, ctx) ((ctx) = imx347_slave_get_ctx(pipe)) + +#define IMX347_SLAVE_FULL_LINES_MAX 0xFFFFF +#define IMX347_SLAVE_VS_TIME_MAX 0xFFFFFFFF +#define IMX347_SLAVE_FULL_LINES_MAX_2TO1_WDR 0x8AA /* considering the YOUT_SIZE and bad frame */ + +#define IMX347_SLAVE_INCREASE_LINES 1 /* make real fps less than stand fps because NVR require */ +#define IMX347_SLAVE_VMAX_4M30_LINEAR (1650 + IMX347_SLAVE_INCREASE_LINES) + +typedef enum { + IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE = 0, + IMX347_SLAVE_MODE_BUTT +} imx347_slave_res_mode; + +typedef struct { + td_u32 inck; + td_u32 inck_per_hs; + td_u32 inck_per_vs; + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} imx347_slave_video_mode_tbl; + +ot_isp_sns_state *imx347_slave_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *imx347_slave_get_bus_info(ot_vi_pipe vi_pipe); + +td_void imx347_slave_init(ot_vi_pipe vi_pipe); +td_void imx347_slave_exit(ot_vi_pipe vi_pipe); +td_void imx347_slave_standby(ot_vi_pipe vi_pipe); +td_void imx347_slave_restart(ot_vi_pipe vi_pipe); +td_void imx347_mirror_flip(ot_vi_pipe vi_pipe, ot_isp_sns_mirrorflip_type sns_mirror_flip); +td_void imx347_slave_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en); +td_void imx347_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp sns_blc_clamp); + +td_s32 imx347_slave_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 imx347_slave_read_register(ot_vi_pipe vi_pipe, td_u32 addr); +imx347_slave_video_mode_tbl *imx347_get_slave_mode_tbl(td_u8 img_mode); +ot_isp_slave_sns_sync *imx347_get_slave_sync(ot_vi_pipe vi_pipe); +td_s32 imx347_get_slave_bind_dev(ot_vi_pipe vi_pipe); +td_u32 imx347_get_slave_sensor_mode_time(ot_vi_pipe vi_pipe); +ot_isp_sns_state *imx347_get_slave_sns_state(ot_vi_pipe vi_pipe); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* IMX347_SLAVE_CMOS_H */ diff --git a/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos_ex.h b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos_ex.h new file mode 100644 index 0000000..a500678 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_cmos_ex.h @@ -0,0 +1,3896 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef IMX347_SLAVE_CMOS_EX_H +#define IMX347_SLAVE_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {800, 800, 800, 800}, + {800, 800, 800, 800}, + {800, 800, 800, 800}, + {800, 800, 800, 800}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 2592, 12}, /* ob_area */ + 10, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 10, /* dynablc tolerance */ + 16, /* filter_strength */ + 0x0, /* separate_mode */ + {800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800}, /* calibration black level */ + 0, + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + }, + }, + { + {2592, 1532}, + }, +}; + +static const ot_isp_cmos_black_level g_cmos_blc_virt_pipe = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {800, 800, 800, 800}, + {800, 800, 800, 800}, + {800, 800, 800, 800}, + {800, 800, 800, 800}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 2600, 12}, /* ob_area */ + 10, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800, 800}, /* calibration black level */ + 0, + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + {800, 800, 800, 800}, /* black level */ + }, + }, + { + {3840, 2160}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 235, 235, 235, 240, 240, 240, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + { 60, 60, 58, 55, 50, 45, 40, 30, 20, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 5, 5, 5, 5, 5 }, + /* detail_smooth_range */ + { 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 6, 7, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 12, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 8, 8, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + {6400, 0.00024972, -0.14848686, 0.00000003, -0.00009478, 0, 0.00023600, 0, 0.00000002, 0.00002112, 0, 0, 0, 0, 0, 0} +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{50, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {24, 72, 0}}, + {{32, 64, 0}, {12, 64, 0}}, + {{12, 24, 0}, {8, 54, 0}}, + {{8, 20, 0}, {6, 36, 0}}, + {{6, 12, 0}, {0, 8, 0}}, + {{0, 8, 0}, {0, 6, 0}}, + {{0, 6, 0}, {0, 2, 0}}, + {{0, 2, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 1, + { + 0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, + 259, 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, + 467, 477, 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, + 671, 683, 695, 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, + 885, 896, 906, 917, 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, + 1085, 1096, 1107, 1118, 1129, 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, + 1274, 1284, 1295, 1305, 1315, 1325, 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, + 1468, 1480, 1493, 1499, 1505, 1511, 1518, 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, + 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, + 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, + 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, + 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, 2036, 2042, 2047, 2052, 2058, 2063, 2068, + 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, 2135, 2140, 2145, 2150, 2154, 2159, + 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, 2226, 2231, 2235, 2240, 2244, + 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, 2312, 2317, 2321, 2325, + 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, 2392, 2396, 2400, + 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, 2466, 2470, + 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, 2538, + 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, + 2665, 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, + 2723, 2727, 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, + 2781, 2784, 2787, 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, + 2837, 2840, 2843, 2846, 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, + 2890, 2893, 2896, 2899, 2902, 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, + 2941, 2944, 2946, 2949, 2952, 2954, 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, + 2988, 2990, 2993, 2995, 2998, 3000, 3002, 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, + 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, + 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, + 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, + 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, 3177, 3179, 3182, 3184, 3186, 3188, 3190, + 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, 3217, 3219, 3221, 3223, 3225, 3227, + 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, 3256, 3258, 3260, 3262, 3264, + 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, 3293, 3295, 3297, 3299, + 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, 3330, 3332, 3334, + 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, 3366, 3368, + 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, 3401, + 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, + 3470, 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, + 3506, 3508, 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, + 3544, 3546, 3548, 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, + 3582, 3585, 3587, 3589, 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, + 3620, 3622, 3624, 3626, 3628, 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, + 3657, 3659, 3661, 3663, 3665, 3667, 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, + 3693, 3695, 3697, 3699, 3701, 3704, 3706, 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, + 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, + 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, + 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, + 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, 3857, 3858, 3860, 3862, 3864, 3866, 3868, + 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, + 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, 3928, 3930, 3932, 3934, 3935, + 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, + 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, 3998, 4000, 4001, + 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, 4032, 4034, + 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, 4066, + 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095, + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + { + 0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, + 89, 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, + 176, 181, 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, + 263, 268, 273, 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, + 351, 356, 361, 366, 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, + 441, 446, 451, 456, 461, 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, + 535, 540, 545, 551, 556, 561, 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, + 633, 639, 645, 650, 656, 662, 667, 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, + 738, 744, 750, 756, 762, 768, 774, 780, 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, + 849, 855, 861, 867, 874, 880, 886, 893, 899, 905, 912, 918, 925, 931, 937, 944, 950, 957, + 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, + 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, 1152, 1159, 1165, 1172, 1178, 1185, 1191, + 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, 1276, 1283, 1289, 1295, 1302, 1308, + 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, 1398, 1404, 1411, 1417, 1423, + 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, 1517, 1524, 1530, 1536, + 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, 1639, 1645, 1652, + 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, 1761, 1768, + 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, 1883, + 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, + 2107, 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, + 2206, 2212, 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, + 2297, 2302, 2307, 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, + 2381, 2385, 2390, 2394, 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, + 2458, 2462, 2467, 2471, 2475, 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, + 2531, 2535, 2539, 2543, 2547, 2551, 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, + 2601, 2604, 2608, 2612, 2616, 2619, 2623, 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, + 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, + 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, + 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, + 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, 2901, 2904, 2908, 2911, 2914, 2918, 2921, + 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, 2964, 2967, 2971, 2974, 2977, 2981, + 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, 3026, 3029, 3032, 3035, 3038, + 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, 3086, 3089, 3092, 3095, + 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, 3144, 3147, 3150, + 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, 3200, 3203, + 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, 3255, + 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, + 3359, 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, + 3407, 3410, 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, + 3455, 3457, 3460, 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, + 3501, 3504, 3506, 3509, 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, + 3546, 3549, 3551, 3554, 3556, 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, + 3591, 3593, 3596, 3598, 3601, 3603, 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, + 3634, 3637, 3639, 3642, 3644, 3646, 3649, 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, + 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, + 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, + 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, + 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, 3825, 3827, 3829, 3831, 3834, 3836, 3838, + 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, 3866, 3868, 3870, 3873, 3875, 3877, + 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, 3907, 3909, 3911, 3913, 3915, + 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, 3946, 3949, 3951, 3953, + 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, 3986, 3988, 3990, + 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4024, 4026, + 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, 4062, + 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095, + }, + 3, +}; +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 17, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + { 31, 31, 23, 23, 23, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21 }, + { 31, 31, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 8, 8, 7, 7, 7, 6, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 7, 6, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 58, 60, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 12, 16, 20, 24, 24, 24, 26, 28, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 18, 20, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 30, 30, 30, 26, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {159, 159, 159, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, 140}, + {167, 167, 167, 144, 144, 144, 144, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {176, 176, 176, 151, 151, 151, 151, 147, 147, 147, 147, 147, 147, 147, 147, 147}, + {186, 186, 186, 158, 158, 158, 158, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {196, 196, 196, 166, 166, 166, 166, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {206, 206, 206, 176, 176, 176, 176, 164, 164, 164, 164, 164, 164, 164, 164, 164}, + {217, 217, 217, 185, 185, 185, 185, 171, 171, 171, 171, 171, 171, 171, 171, 171}, + {227, 227, 227, 195, 195, 195, 195, 177, 177, 177, 177, 177, 177, 177, 177, 177}, + {237, 237, 237, 205, 205, 205, 205, 184, 184, 184, 184, 184, 184, 184, 184, 184}, + {246, 246, 246, 214, 214, 214, 214, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {254, 254, 254, 223, 223, 223, 223, 196, 196, 196, 196, 196, 196, 196, 196, 196}, + {261, 261, 261, 231, 231, 231, 231, 201, 201, 201, 201, 201, 201, 201, 201, 201}, + {268, 268, 268, 237, 237, 237, 237, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {272, 272, 272, 242, 242, 242, 242, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {276, 276, 276, 245, 245, 245, 245, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {277, 277, 277, 247, 247, 247, 247, 212, 212, 212, 212, 212, 212, 212, 212, 212}, + {276, 276, 276, 246, 246, 246, 246, 211, 211, 211, 211, 211, 211, 211, 211, 211}, + {274, 274, 274, 243, 243, 243, 243, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {270, 270, 270, 238, 238, 238, 238, 206, 206, 206, 206, 206, 206, 206, 206, 206}, + {265, 265, 265, 232, 232, 232, 232, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {258, 258, 258, 225, 225, 225, 225, 197, 197, 197, 197, 197, 197, 197, 197, 197}, + {250, 250, 250, 217, 217, 217, 217, 192, 192, 192, 192, 192, 192, 192, 192, 192}, + {242, 242, 242, 209, 209, 209, 209, 186, 186, 186, 186, 186, 186, 186, 186, 186}, + {233, 233, 233, 199, 199, 199, 199, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {224, 224, 224, 190, 190, 190, 190, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {215, 215, 215, 181, 181, 181, 181, 167, 167, 167, 167, 167, 167, 167, 167, 167}, + {206, 206, 206, 172, 172, 172, 172, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {198, 198, 198, 163, 163, 163, 163, 156, 156, 156, 156, 156, 156, 156, 156, 156}, + {191, 191, 191, 156, 156, 156, 156, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {184, 184, 184, 149, 149, 149, 149, 146, 146, 146, 146, 146, 146, 146, 146, 146}, + {179, 179, 179, 143, 143, 143, 143, 142, 142, 142, 142, 142, 142, 142, 142, 142}, + {175, 175, 175, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + }, + /* edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {155, 155, 155, 155, 155, 155, 155, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {175, 175, 175, 175, 175, 175, 175, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {187, 187, 187, 187, 187, 187, 187, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {201, 201, 201, 201, 201, 201, 201, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {215, 215, 215, 215, 215, 215, 215, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {229, 229, 229, 229, 229, 229, 229, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {243, 243, 243, 243, 243, 243, 243, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {257, 257, 257, 257, 257, 257, 257, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {269, 269, 269, 269, 269, 269, 269, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {281, 281, 281, 281, 281, 281, 281, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {290, 290, 290, 290, 290, 290, 290, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {298, 298, 298, 298, 298, 298, 298, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {302, 302, 302, 302, 302, 302, 302, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {304, 304, 304, 304, 304, 304, 304, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {303, 303, 303, 303, 303, 303, 303, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {298, 298, 298, 298, 298, 298, 298, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {292, 292, 292, 292, 292, 292, 292, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {284, 284, 284, 284, 284, 284, 284, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {273, 273, 273, 273, 273, 273, 273, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {262, 262, 262, 262, 262, 262, 262, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {250, 250, 250, 250, 250, 250, 250, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {237, 237, 237, 237, 237, 237, 237, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {223, 223, 223, 223, 223, 223, 223, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {210, 210, 210, 210, 210, 210, 210, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {197, 197, 197, 197, 197, 197, 197, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {185, 185, 185, 185, 185, 185, 185, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {174, 174, 174, 174, 174, 174, 174, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {164, 164, 164, 164, 164, 164, 164, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {156, 156, 156, 156, 156, 156, 156, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 180, 180, 170, 160, 160, 140, 140, 140, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 55, 55, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 4, 4, 4, 4, 4, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 6, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 110, 110, 100, 100, 100, 100, 100, 100, 100 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 28, 28, 28, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6420, + /* CCM matrix */ + { 0x01C8, 0x80A8, 0x8020, 0x8040, 0x01B5, 0x8075, 0x8009, 0x8086, 0x018F }, + }, + { + /* color temperature */ + 4850, + /* CCM matrix */ + { 0x01BE, 0x8094, 0x802A, 0x803B, 0x01A0, 0x8065, 0x8003, 0x8084, 0x0187 }, + }, + { + /* color temperature */ + 3630, + /* CCM matrix */ + { 0x01B3, 0x8097, 0x801C, 0x8073, 0x01BE, 0x804B, 0x8001, 0x80D0, 0x01D1 }, + }, + { + /* color temperature */ + 2525, + /* CCM matrix */ + { 0x0217, 0x8113, 0x8004, 0x805C, 0x0190, 0x8034, 0x800A, 0x80C9, 0x01D3 }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 } +}; + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 1, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 20, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 1, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, + +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 128 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42}, + /* y_grid_width */ + {23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 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429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 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346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 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268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024 + }, + /* g_param_low_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 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1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, 1.000000000, + 1.000000000 + } + } +}; + +static const ot_isp_cmos_clut g_cmos_clut = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 5241858, 10482696, 11530249, 5241859, 5241858, 10481674, 9433097, 3146751, + 2099196, 8385543, 6289412, 2101238, 2103279, 4194304, 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b/libraries/sensor/hi3519dv500/sony_imx347_slave/imx347_slave_sensor_ctl.c @@ -0,0 +1,423 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif +#include "securec.h" + +#include "imx347_slave_cmos.h" +#include "ot_mpi_isp.h" +#include "ot_sns_ctrl.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int imx347_slave_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *imx347slavebusinfo = TD_NULL; + imx347slavebusinfo = imx347_slave_get_bus_info(vi_pipe); + dev_num = imx347slavebusinfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (IMX347_SLAVE_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int imx347_slave_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 imx347_slave_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 imx347_slave_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = IMX347_SLAVE_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = IMX347_SLAVE_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = IMX347_SLAVE_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (IMX347_SLAVE_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + } + + if (IMX347_SLAVE_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, IMX347_SLAVE_ADDR_BYTE + IMX347_SLAVE_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void imx347_slave_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); + return; +} + +void imx347_slave_standby(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx347_slave_write_register(vi_pipe, 0x3000, 0x01); /* STANDBY */ + ret += imx347_slave_write_register(vi_pipe, 0x3002, 0x01); /* XTMSTA */ + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx347_slave_restart(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx347_slave_write_register(vi_pipe, 0x3000, 0x00); /* standby */ + delay_ms(18); /* 18ms */ + ret += imx347_slave_write_register(vi_pipe, 0x3002, 0x00); /* master mode start */ + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx347_mirror_flip(ot_vi_pipe vi_pipe, ot_isp_sns_mirrorflip_type sns_mirror_flip) +{ + switch (sns_mirror_flip) { + case ISP_SNS_NORMAL: + imx347_slave_write_register(vi_pipe, 0x304E, 0x0); + break; + case ISP_SNS_MIRROR: + imx347_slave_write_register(vi_pipe, 0x304E, 0x1); + break; + default: + break; + } + return; +} + +void imx347_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp sns_blc_clamp) +{ + td_s32 ret = TD_SUCCESS; + + imx347_slave_set_blc_clamp_value(vi_pipe, sns_blc_clamp.blc_clamp_en); + + if (sns_blc_clamp.blc_clamp_en == TD_TRUE) { + ret += imx347_slave_write_register(vi_pipe, 0x3280, 0x01); /* clamp on */ + } else { + ret += imx347_slave_write_register(vi_pipe, 0x3280, 0x00); /* clamp off */ + ret += imx347_slave_write_register(vi_pipe, 0x3302, 0x36); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +static void imx347_slave_linear_4m30_init(ot_vi_pipe vi_pipe); + +static void imx347_slave_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastimx347slave = TD_NULL; + pastimx347slave = imx347_slave_get_ctx(vi_pipe); + for (i = 0; i < pastimx347slave->regs_info[0].reg_num; i++) { + ret += imx347_slave_write_register(vi_pipe, pastimx347slave->regs_info[0].i2c_data[i].reg_addr, + pastimx347slave->regs_info[0].i2c_data[i].data); + } + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx347_set_slave_registers(ot_vi_pipe vi_pipe) +{ + td_s32 slave_dev; + td_u32 data; + td_s32 ot_ret; + td_u8 img_mode; + ot_isp_sns_state *pastimx347slave = TD_NULL; + imx347_slave_video_mode_tbl *imx347_slave_mode_tbl = TD_NULL; + ot_isp_slave_sns_sync *imx347_slave_sync = imx347_get_slave_sync(vi_pipe); + td_s32 imx347_slave_bind_dev = imx347_get_slave_bind_dev(vi_pipe); + td_u32 imx347_slave_sensor_mode_time = imx347_get_slave_sensor_mode_time(vi_pipe); + ot_isp_sns_state *imx347_slave_sns_state = imx347_slave_get_ctx(vi_pipe); + + pastimx347slave = imx347_slave_get_ctx(vi_pipe); + img_mode = pastimx347slave->img_mode; + slave_dev = imx347_slave_bind_dev; + data = imx347_slave_sensor_mode_time; + + imx347_slave_mode_tbl = imx347_get_slave_mode_tbl(img_mode); + + check_ret(ot_mpi_isp_get_sns_slave_attr(slave_dev, imx347_slave_sync)); + imx347_slave_sync->cfg.bits.bit_h_enable = 0; + imx347_slave_sync->cfg.bits.bit_v_enable = 0; + imx347_slave_sync->slave_mode_time = data; + check_ret(ot_mpi_isp_set_sns_slave_attr(slave_dev, imx347_slave_sync)); + + ot_ret = imx347_slave_i2c_init(vi_pipe); + if (ot_ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + check_ret(ot_mpi_isp_get_sns_slave_attr(slave_dev, imx347_slave_sync)); + imx347_slave_sync->hs_time = imx347_slave_mode_tbl->inck_per_hs; + + if (imx347_slave_sns_state->regs_info[0].slv_sync.slave_vs_time == 0) { + imx347_slave_sync->vs_time = imx347_slave_mode_tbl->inck_per_vs; + } else { + imx347_slave_sync->vs_time = imx347_slave_sns_state->regs_info[0].slv_sync.slave_vs_time; + } + imx347_slave_sync->cfg.bytes = 0xc0030000; + imx347_slave_sync->hs_cyc = 0x3; + imx347_slave_sync->vs_cyc = 0x3; + check_ret(ot_mpi_isp_set_sns_slave_attr(slave_dev, imx347_slave_sync)); + + return; +} + +void imx347_slave_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_bool init; + td_u8 img_mode; + ot_isp_sns_state *pastimx347slave = TD_NULL; + + pastimx347slave = imx347_slave_get_ctx(vi_pipe); + init = pastimx347slave->init; + wdr_mode = pastimx347slave->wdr_mode; + img_mode = pastimx347slave->img_mode; + + imx347_set_slave_registers(vi_pipe); + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + if (OT_WDR_MODE_NONE == wdr_mode) { + if (IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE == img_mode) { /* IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE */ + imx347_slave_linear_4m30_init(vi_pipe); + } + } + } else { + /* When sensor switch mode(linear<->WDR or resolution), config different registers(if possible) */ + if (OT_WDR_MODE_NONE == wdr_mode) { + if (IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE == img_mode) { /* IMX347_SLAVE_SENSOR_4M_30FPS_LINEAR_MODE */ + imx347_slave_linear_4m30_init(vi_pipe); + } + } + } + pastimx347slave->init = TD_TRUE; + return; +} + +void imx347_slave_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + ret = imx347_slave_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("IMX347 exit failed!\n"); + } + return; +} + +static td_s32 imx347_slave_linear_4m30_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx347_slave_write_register(vi_pipe, 0x3000, 0x01); /* STANDBY */ + ret += imx347_slave_write_register(vi_pipe, 0x3002, 0x01); /* XTMSTA */ + + ret += imx347_slave_write_register(vi_pipe, 0x300C, 0x5B); + ret += imx347_slave_write_register(vi_pipe, 0x300D, 0x40); + ret += imx347_slave_write_register(vi_pipe, 0x30BE, 0x5E); + ret += imx347_slave_write_register(vi_pipe, 0x3110, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x314C, 0xC0); + ret += imx347_slave_write_register(vi_pipe, 0x315A, 0x06); + ret += imx347_slave_write_register(vi_pipe, 0x316A, 0x7E); + ret += imx347_slave_write_register(vi_pipe, 0x319E, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x3202, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x3288, 0x22); + ret += imx347_slave_write_register(vi_pipe, 0x328A, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x328C, 0xA2); + ret += imx347_slave_write_register(vi_pipe, 0x328E, 0x22); + ret += imx347_slave_write_register(vi_pipe, 0x3415, 0x27); + ret += imx347_slave_write_register(vi_pipe, 0x3418, 0x27); + ret += imx347_slave_write_register(vi_pipe, 0x3428, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x349E, 0x6A); + ret += imx347_slave_write_register(vi_pipe, 0x34A2, 0x9A); + ret += imx347_slave_write_register(vi_pipe, 0x34A4, 0x8A); + ret += imx347_slave_write_register(vi_pipe, 0x34A6, 0x8E); + ret += imx347_slave_write_register(vi_pipe, 0x34AA, 0xD8); + ret += imx347_slave_write_register(vi_pipe, 0x3648, 0x01); + ret += imx347_slave_write_register(vi_pipe, 0x3678, 0x01); + ret += imx347_slave_write_register(vi_pipe, 0x367C, 0x69); + ret += imx347_slave_write_register(vi_pipe, 0x367E, 0x69); + ret += imx347_slave_write_register(vi_pipe, 0x3680, 0x69); + ret += imx347_slave_write_register(vi_pipe, 0x3682, 0x69); + ret += imx347_slave_write_register(vi_pipe, 0x371D, 0x05); + ret += imx347_slave_write_register(vi_pipe, 0x375D, 0x11); + ret += imx347_slave_write_register(vi_pipe, 0x375E, 0x43); + ret += imx347_slave_write_register(vi_pipe, 0x375F, 0x76); + ret += imx347_slave_write_register(vi_pipe, 0x3760, 0x07); + ret += imx347_slave_write_register(vi_pipe, 0x3768, 0x1B); + ret += imx347_slave_write_register(vi_pipe, 0x3769, 0x1B); + ret += imx347_slave_write_register(vi_pipe, 0x376A, 0x1A); + ret += imx347_slave_write_register(vi_pipe, 0x376B, 0x19); + ret += imx347_slave_write_register(vi_pipe, 0x376C, 0x17); + return ret; +} + +static td_s32 imx347_slave_linear_4m30_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx347_slave_write_register(vi_pipe, 0x376D, 0x0F); + ret += imx347_slave_write_register(vi_pipe, 0x376E, 0x0B); + ret += imx347_slave_write_register(vi_pipe, 0x376F, 0x0B); + ret += imx347_slave_write_register(vi_pipe, 0x3770, 0x0B); + ret += imx347_slave_write_register(vi_pipe, 0x3776, 0x89); + ret += imx347_slave_write_register(vi_pipe, 0x3777, 0x00); + ret += imx347_slave_write_register(vi_pipe, 0x3778, 0xCA); + ret += imx347_slave_write_register(vi_pipe, 0x3779, 0x00); + ret += imx347_slave_write_register(vi_pipe, 0x377A, 0x45); + ret += imx347_slave_write_register(vi_pipe, 0x377B, 0x01); + ret += imx347_slave_write_register(vi_pipe, 0x377C, 0x56); + ret += imx347_slave_write_register(vi_pipe, 0x377D, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x377E, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x377F, 0x03); + ret += imx347_slave_write_register(vi_pipe, 0x3780, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x3781, 0x05); + ret += imx347_slave_write_register(vi_pipe, 0x3782, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x3783, 0x06); + ret += imx347_slave_write_register(vi_pipe, 0x3784, 0x7F); + ret += imx347_slave_write_register(vi_pipe, 0x3788, 0x1F); + ret += imx347_slave_write_register(vi_pipe, 0x378A, 0xCA); + ret += imx347_slave_write_register(vi_pipe, 0x378B, 0x00); + ret += imx347_slave_write_register(vi_pipe, 0x378C, 0x45); + ret += imx347_slave_write_register(vi_pipe, 0x378D, 0x01); + ret += imx347_slave_write_register(vi_pipe, 0x378E, 0x56); + ret += imx347_slave_write_register(vi_pipe, 0x378F, 0x02); + ret += imx347_slave_write_register(vi_pipe, 0x3790, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x3791, 0x03); + ret += imx347_slave_write_register(vi_pipe, 0x3792, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x3793, 0x05); + ret += imx347_slave_write_register(vi_pipe, 0x3794, 0xFE); + ret += imx347_slave_write_register(vi_pipe, 0x3795, 0x06); + ret += imx347_slave_write_register(vi_pipe, 0x3796, 0x7F); + ret += imx347_slave_write_register(vi_pipe, 0x3798, 0xBF); + ret += imx347_slave_write_register(vi_pipe, 0x3A18, 0x7F); + ret += imx347_slave_write_register(vi_pipe, 0x3A1A, 0x37); + ret += imx347_slave_write_register(vi_pipe, 0x3A1C, 0x37); + ret += imx347_slave_write_register(vi_pipe, 0x3A1E, 0xF7); + ret += imx347_slave_write_register(vi_pipe, 0x3A1F, 0x00); + ret += imx347_slave_write_register(vi_pipe, 0x3A20, 0x3F); + ret += imx347_slave_write_register(vi_pipe, 0x3A22, 0x6F); + ret += imx347_slave_write_register(vi_pipe, 0x3A24, 0x3F); + ret += imx347_slave_write_register(vi_pipe, 0x3A26, 0x5F); + ret += imx347_slave_write_register(vi_pipe, 0x3A28, 0x2F); + return ret; +} + +/* 4M 30fps */ +static void imx347_slave_linear_4m30_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx347_slave_linear_4m30_part1(vi_pipe); + ret += imx347_slave_linear_4m30_part2(vi_pipe); + + imx347_slave_default_reg_init(vi_pipe); + if (vi_pipe == 1) { + ret += imx347_slave_write_register(vi_pipe, 0x3302, 0x4B); + } + + ret += imx347_slave_write_register(vi_pipe, 0x3000, 0x00); /* standby */ + delay_ms(18); /* 18ms */ + ret += imx347_slave_write_register(vi_pipe, 0x3002, 0x00); /* master mode start */ + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + return; + } + printf("===IMX347 Slave 4M 30fps 12bit LINE Init OK!===\n"); + return; +} + diff --git a/libraries/sensor/hi3519dv500/sony_imx515/Makefile b/libraries/sensor/hi3519dv500/sony_imx515/Makefile new file mode 100644 index 0000000..603bd5a --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx515/Makefile @@ -0,0 +1,22 @@ +LIB_NAME := libsns_imx515 + +ISP_DIR := $(CURDIR)/../../../isp +KO_DIR := $(CURDIR)/../../../../kernel + +override CFLAGS += -fPIC -Wall -O2 \ + -I$(ISP_DIR)/include/hi3519dv500 \ + -I$(ISP_DIR)/include/hi3519dv500/3a \ + -I$(ISP_DIR)/include/hi3519dv500/ext_inc \ + -I$(KO_DIR)/include/hi3519dv500 \ + -I. + +SRCS := $(wildcard *.c) +OBJS := $(SRCS:%.c=%.o) + +all: $(LIB_NAME).so $(LIB_NAME).a +$(LIB_NAME).so: $(OBJS) + $(CC) -shared -o $@ $(OBJS) +$(LIB_NAME).a: $(OBJS) + $(AR) -rcs $@ $(OBJS) +clean: + -rm -f $(OBJS) $(LIB_NAME).so $(LIB_NAME).a diff --git a/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.c b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.c new file mode 100644 index 0000000..f63e2e1 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.c @@ -0,0 +1,1080 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include "ot_mpi_isp.h" +#include "ot_mpi_ae.h" +#include "ot_mpi_awb.h" +#include "securec.h" + +#include "imx515_cmos_ex.h" +#include "imx515_cmos.h" + +#define IMX515_ID 515 +#define SENSOR_IMX515_WIDTH 3840 +#define SENSOR_IMX515_HEIGHT 2160 + +#define higher_4bits(x) (((x) & 0xf0000) >> 16) +#define high_8bits(x) (((x) & 0xff00) >> 8) +#define low_8bits(x) ((x) & 0x00ff) + + +#ifndef max +#define max(a, b) (((a) < (b)) ? (b) : (a)) +#endif + +#ifndef min +#define min(a, b) (((a) > (b)) ? (b) : (a)) +#endif + +/**************************************************************************** + * global variables * + ****************************************************************************/ +#define imx515_sensor_set_ctx(pipe, ctx) ((g_imx515_sns_state[pipe]) = (ctx)) +#define imx515_sensor_reset_ctx(pipe) (g_imx515_sns_state[pipe] = TD_NULL) + +static ot_isp_fswdr_mode g_fswdr_mode[OT_ISP_MAX_PIPE_NUM] = { + [0 ... OT_ISP_MAX_PIPE_NUM - 1] = OT_ISP_FSWDR_NORMAL_MODE +}; +static td_u8 g_ae_stat_pos[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_max_time_get_cnt[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_init_exposure[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u32 g_lines_per500ms[OT_ISP_MAX_PIPE_NUM] = {0}; + +static td_u16 g_init_wb_gain[OT_ISP_MAX_PIPE_NUM][OT_ISP_RGB_CHN_NUM] = {{0}}; +static td_u16 g_sample_r_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_u16 g_sample_b_gain[OT_ISP_MAX_PIPE_NUM] = {0}; +static td_bool g_quick_start_en[OT_ISP_MAX_PIPE_NUM] = {TD_FALSE}; + +static td_bool g_ae_route_ex_valid[OT_ISP_MAX_PIPE_NUM] = {0}; +static ot_isp_ae_route g_init_ae_route[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route g_init_ae_route_sf[OT_ISP_MAX_PIPE_NUM] = {{0}}; +static ot_isp_ae_route_ex g_init_ae_route_sf_ex[OT_ISP_MAX_PIPE_NUM] = {{0}}; + +typedef struct { + td_u8 hcg; + td_u32 brl; + td_u32 rhs1_max; + td_u32 rhs2_max; +} imx515_state; + +imx515_state g_imx515_state[OT_ISP_MAX_PIPE_NUM] = {{0}}; +ot_isp_sns_commbus g_imx515_bus_info[OT_ISP_MAX_PIPE_NUM] = { + [0] = { .i2c_dev = 0}, + [1 ... OT_ISP_MAX_PIPE_NUM - 1] = { .i2c_dev = -1} +}; + +ot_isp_sns_state *g_imx515_sns_state[OT_ISP_MAX_PIPE_NUM] = {TD_NULL}; + +static td_bool blc_clamp_info[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = TD_TRUE}; +ot_isp_sns_commbus *imx515_get_bus_info(ot_vi_pipe vi_pipe) +{ + return &g_imx515_bus_info[vi_pipe]; +} + +ot_isp_sns_state *imx515_get_ctx(ot_vi_pipe vi_pipe) +{ + return g_imx515_sns_state[vi_pipe]; +} + +td_void imx515_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en) +{ + blc_clamp_info[vi_pipe] = clamp_en; +} + +const imx515_video_mode_tbl g_imx515_mode_tbl[IMX515_MODE_BUTT] = { + {IMX515_VMAX_4K2K_LINEAR, IMX515_FULL_LINES_MAX, 30, 0.07, + 3840, 2160, 0, OT_WDR_MODE_NONE, "IMX515_SENSOR_8M_30FPS_LINEAR_MODE"}, +}; + +/**************************************************************************** + * local variables * + ****************************************************************************/ +/* Imx515 Register Address */ +#define IMX515_VMAX_ADDR_L 0x3024 +#define IMX515_VMAX_ADDR_M 0x3025 +#define IMX515_VMAX_ADDR_H 0x3026 +#define IMX515_HMAX_ADDR_L 0x3028 +#define IMX515_HMAX_ADDR_H 0x3029 + +#define IMX515_SHR0_L 0x3050 +#define IMX515_SHR0_M 0x3051 +#define IMX515_SHR0_H 0x3052 +#define IMX515_GAIN_PGC_L 0x3090 +#define IMX515_GAIN_PGC_H 0x3091 + +// sensor gain +#define IMX515_AGAIN_MIN 1024 +#define IMX515_AGAIN_MAX 32381 + +#define IMX515_DGAIN_MIN 1024 +#define IMX515_DGAIN_MAX 128914 + +#define IMX515_AD_GAIN_TBL_RANGE 241 +#define IMX515_AGAIN_TBL_RANGE 100 +#define IMX515_DGAIN_TBL_RANGE 140 + +#define IMX515_EXP_TIME_LMT 8 + + +#define imx515_err_mode_print(sns_image_mode, sns_state) \ + do { \ + isp_err_trace("Not support! Width:%u, Height:%u, Fps:%f, WDRMode:%d\n", \ + (sns_image_mode)->width, \ + (sns_image_mode)->height, \ + (sns_image_mode)->fps, \ + (sns_state)->wdr_mode); \ + } while (0) + +static td_void cmos_get_ae_comm_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->flicker_freq = 50 * 256; /* light flicker freq: 50Hz, accuracy: 256 */ + ae_sns_dft->full_lines_max = IMX515_FULL_LINES_MAX; + ae_sns_dft->hmax_times = (1000000000) / (sns_state->fl_std * 30); /* 1000000000ns, 30fps */ + + ae_sns_dft->int_time_accu.accu_type = OT_ISP_AE_ACCURACY_LINEAR; + ae_sns_dft->int_time_accu.accuracy = 1; + ae_sns_dft->int_time_accu.offset = 0; + + ae_sns_dft->again_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->again_accu.accuracy = 1; + + ae_sns_dft->dgain_accu.accu_type = OT_ISP_AE_ACCURACY_TABLE; + ae_sns_dft->dgain_accu.accuracy = 1; + + ae_sns_dft->isp_dgain_shift = 8; /* accuracy: 8 */ + ae_sns_dft->min_isp_dgain_target = 1 << ae_sns_dft->isp_dgain_shift; + ae_sns_dft->max_isp_dgain_target = 2 << ae_sns_dft->isp_dgain_shift; /* max 2 */ + if (g_lines_per500ms[vi_pipe] == 0) { + ae_sns_dft->lines_per500ms = sns_state->fl_std * 30 / 2; /* 30fps, div 2 */ + } else { + ae_sns_dft->lines_per500ms = g_lines_per500ms[vi_pipe]; + } + + ae_sns_dft->max_iris_fno = OT_ISP_IRIS_F_NO_1_0; + ae_sns_dft->min_iris_fno = OT_ISP_IRIS_F_NO_32_0; + + ae_sns_dft->ae_route_ex_valid = TD_FALSE; + ae_sns_dft->ae_route_attr.total_num = 0; + ae_sns_dft->ae_route_attr_ex.total_num = 0; + ae_sns_dft->quick_start.quick_start_enable = g_quick_start_en[vi_pipe]; + ae_sns_dft->quick_start.black_frame_num = 0; + ae_sns_dft->ae_stat_pos = g_ae_stat_pos[vi_pipe]; /* 1 use be stat to AE */ + return; +} + +static td_void cmos_get_ae_linear_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft, + const ot_isp_sns_state *sns_state) +{ + ae_sns_dft->max_again = IMX515_AGAIN_MAX; + ae_sns_dft->min_again = IMX515_AGAIN_MIN; + ae_sns_dft->max_again_target = ae_sns_dft->max_again; + ae_sns_dft->min_again_target = ae_sns_dft->min_again; + + ae_sns_dft->max_dgain = IMX515_DGAIN_MAX; + ae_sns_dft->min_dgain = IMX515_DGAIN_MIN; + ae_sns_dft->max_dgain_target = ae_sns_dft->max_dgain; + ae_sns_dft->min_dgain_target = ae_sns_dft->min_dgain; + + ae_sns_dft->ae_compensation = 0x38; + ae_sns_dft->ae_exp_mode = OT_ISP_AE_EXP_HIGHLIGHT_PRIOR; + ae_sns_dft->init_exposure = g_init_exposure[vi_pipe] ? g_init_exposure[vi_pipe] : 76151; /* init 76151 */ + + ae_sns_dft->max_int_time = sns_state->fl_std - 2; /* sub 2 */ + ae_sns_dft->min_int_time = 9; /* min 9 */ + ae_sns_dft->max_int_time_target = 65535; /* max 65535 */ + ae_sns_dft->min_int_time_target = 9; /* min 9 */ + ae_sns_dft->ae_route_ex_valid = g_ae_route_ex_valid[vi_pipe]; + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), + &g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&ae_sns_dft->ae_route_attr_ex, sizeof(ot_isp_ae_route_ex), + &g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex)); + return; +} + +static td_s32 cmos_get_ae_default(ot_vi_pipe vi_pipe, ot_isp_ae_sensor_default *ae_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(ae_sns_dft); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(&ae_sns_dft->ae_route_attr, sizeof(ot_isp_ae_route), 0, sizeof(ot_isp_ae_route)); + + cmos_get_ae_comm_default(vi_pipe, ae_sns_dft, sns_state); + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: /* linear mode */ + cmos_get_ae_linear_default(vi_pipe, ae_sns_dft, sns_state); + break; + default: + break; + } + + return TD_SUCCESS; +} + +static td_void cmos_config_vmax(ot_isp_sns_state *sns_state, td_u32 vmax) +{ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + sns_state->regs_info[0].i2c_data[5].data = low_8bits(vmax); /* array index 5 */ + sns_state->regs_info[0].i2c_data[6].data = high_8bits(vmax); /* array index 6 */ + sns_state->regs_info[0].i2c_data[7].data = higher_4bits(vmax); /* array index 7 */ + } + return; +} + +/* the function of sensor set fps */ +static td_void cmos_fps_set(ot_vi_pipe vi_pipe, td_float fps, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines, lines_max, vmax; + td_float max_fps, min_fps; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_void_return(ae_sns_dft); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines = g_imx515_mode_tbl[sns_state->img_mode].ver_lines; + lines_max = g_imx515_mode_tbl[sns_state->img_mode].max_ver_lines; + max_fps = g_imx515_mode_tbl[sns_state->img_mode].max_fps; + min_fps = g_imx515_mode_tbl[sns_state->img_mode].min_fps; + + if ((fps > max_fps) || (fps < min_fps)) { + isp_err_trace("Not support Fps: %f\n", fps); + return; + } + + vmax = (td_u32)(lines * max_fps / div_0_to_1_float(fps)); + vmax = (vmax > lines_max) ? lines_max : vmax; + cmos_config_vmax(sns_state, vmax); + + sns_state->fl_std = vmax; + ae_sns_dft->lines_per500ms = (td_u32)(lines * max_fps / 2); /* div 2 */ + + ae_sns_dft->fps = fps; + ae_sns_dft->full_lines_std = sns_state->fl_std; + ae_sns_dft->max_int_time = sns_state->fl_std - IMX515_EXP_TIME_LMT; + sns_state->fl[0] = sns_state->fl_std; + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->hmax_times = + (td_u32)((1000000000) / (sns_state->fl_std * div_0_to_1_float(fps))); /* 1000000000ns */ + + return; +} + +static td_void cmos_slow_framerate_set(ot_vi_pipe vi_pipe, td_u32 full_lines, ot_isp_ae_sensor_default *ae_sns_dft) +{ + td_u32 lines_max; + td_u32 vmax; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ae_sns_dft); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + lines_max = g_imx515_mode_tbl[sns_state->img_mode].max_ver_lines; + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + vmax = full_lines; + vmax = (vmax > lines_max) ? lines_max : vmax; + sns_state->fl[0] = vmax; + } + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + sns_state->regs_info[0].i2c_data[5].data = low_8bits(vmax); /* index 5 */ + sns_state->regs_info[0].i2c_data[6].data = high_8bits(vmax); /* index 6 */ + sns_state->regs_info[0].i2c_data[7].data = higher_4bits(vmax); /* index 7 */ + break; + default: + break; + } + + ae_sns_dft->full_lines = sns_state->fl[0]; + ae_sns_dft->max_int_time = sns_state->fl[0] - IMX515_EXP_TIME_LMT; + + return; +} + +static td_void cmos_inttime_update_linear(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 value; + + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + value = sns_state->fl[0] - int_time; + value = min(value, IMX515_FULL_LINES_MAX); + value = min(max(value, 8), (sns_state->fl[0] - 4)); + + sns_state->regs_info[0].i2c_data[0].data = low_8bits(value); + sns_state->regs_info[0].i2c_data[1].data = high_8bits(value); /* index 1 */ + sns_state->regs_info[0].i2c_data[2].data = higher_4bits(value); /* index 2 */ + return ; +} + +/* while isp notify ae to update sensor regs, ae call these funcs. */ +static td_void cmos_inttime_update(ot_vi_pipe vi_pipe, td_u32 int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + cmos_inttime_update_linear(vi_pipe, int_time); + } + return; +} + +/* Again and Dgain use the same table, Step is 0.3db */ +static td_u32 g_gain_table[IMX515_AD_GAIN_TBL_RANGE] = { + 1024, 1059, 1097, 1135, 1175, 1217, 1259, 1304, 1349, 1397, 1446, 1497, 1549, 1604, + 1660, 1719, 1779, 1842, 1906, 1973, 2043, 2114, 2189, 2266, 2345, 2428, 2513, 2601, + 2693, 2788, 2886, 2987, 3092, 3201, 3313, 3430, 3550, 3675, 3804, 3938, 4076, 4219, + 4368, 4521, 4680, 4845, 5015, 5191, 5374, 5562, 5758, 5960, 6170, 6387, 6611, 6843, + 7084, 7333, 7591, 7857, 8133, 8419, 8715, 9021, 9338, 9667, 10006, 10358, 10722, 11099, + 11489, 11893, 12311, 12743, 13191, 13655, 14135, 14631, 15146, 15678, 16229, 16799, 17390, 18001, + 18633, 19288, 19966, 20668, 21394, 22146, 22924, 23730, 24564, 25427, 26320, 27245, 28203, 29194, + 30220, 31282, 32381, 41519, 34697, 35917, 37179, 38485, 39838, 41238, 42687, 44187, 45740, 47347, + 49011, 50734, 52517, 54362, 56273, 58250, 60297, 62416, 64610, 66880, 69230, 71663, 74182, 76789, + 79487, 82281, 85172, 88165, 91264, 94471, 97791, 101228, 104785, 108468, 112279, 116225, 120310, 124537, + 128914, 133444, 138134, 142988, 148013, 153215, 158599, 164172, 169942, 175914, 182096, 188495, 195119, 201976, + 209074, 216421, 224027, 231900, 240049, 248485, 257217, 266256, 275613, 285299, 295325, 305703, 316446, 327567, + 339078, 350994, 363329, 376097, 389314, 402995, 417157, 431817, 446992, 462700, 478961, 495793, 513216, 531251, + 549921, 569246, 589250, 609958, 631393, 653582, 676550, 700326, 724936, 750412, 776783, 804081, 832338, 861589, + 891867, 923209, 955652, 989236, 1024000, 1059985, 1097236, 1135795, 1175709, 1217026, 1259795, 1304067, 1349895, + 1397333, 1446438, 1497269, 1549887, 1604353, 1660734, 1719095, 1779508, 1842044, 1906777, 1973786, 2043149, + 2114949, 2189273, 2266209, 2345848, 2428287, 2513622, 2601956, 2693394, 2788046, 2886024, 2987445, 3092431, + 3201105, 3313599, 3430046, 3550585, 3675361, 3804521, 3938220, 4076617 +}; + +static td_void cmos_again_calc_table(ot_vi_pipe vi_pipe, td_u32 *again_lin, td_u32 *again_db) +{ + sns_check_pointer_void_return(again_lin); + sns_check_pointer_void_return(again_db); + ot_unused(vi_pipe); + + if (*again_lin >= g_gain_table[IMX515_AGAIN_TBL_RANGE]) { + *again_lin = g_gain_table[IMX515_AGAIN_TBL_RANGE]; + *again_db = IMX515_AGAIN_TBL_RANGE; + return; + } else { + int i; + for (i = 1; i < (IMX515_AGAIN_TBL_RANGE + 1); i++) { + if (*again_lin < g_gain_table[i]) { + *again_lin = g_gain_table[i - 1]; + *again_db = i - 1; + break; + } + } + } + return; +} + +static td_void cmos_dgain_calc_table(ot_vi_pipe vi_pipe, td_u32 *dgain_lin, td_u32 *dgain_db) +{ + int i; + sns_check_pointer_void_return(dgain_lin); + sns_check_pointer_void_return(dgain_db); + ot_unused(vi_pipe); + + if (*dgain_lin >= g_gain_table[IMX515_DGAIN_TBL_RANGE]) { + *dgain_lin = g_gain_table[IMX515_DGAIN_TBL_RANGE]; + *dgain_db = IMX515_DGAIN_TBL_RANGE; + return; + } + + for (i = 1; i < (IMX515_DGAIN_TBL_RANGE + 1); i++) { + if (*dgain_lin < g_gain_table[i]) { + *dgain_lin = g_gain_table[i - 1]; + *dgain_db = i - 1; + break; + } + } + return; +} + +static td_void cmos_gains_update(ot_vi_pipe vi_pipe, td_u32 again, td_u32 dgain) +{ + ot_isp_sns_state *sns_state = TD_NULL; + td_u32 tmp; + + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + tmp = again + dgain; + sns_state->regs_info[0].i2c_data[3].data = low_8bits(tmp); /* index 3 */ + sns_state->regs_info[0].i2c_data[4].data = high_8bits(tmp); /* index 4 */ + + return; +} + +static td_void cmos_get_inttime_max(ot_vi_pipe vi_pipe, td_u16 man_ratio_enable, td_u32 *ratio, + ot_isp_ae_int_time_range *int_time, td_u32 *lf_max_int_time) +{ + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_void_return(ratio); + sns_check_pointer_void_return(int_time); + sns_check_pointer_void_return(lf_max_int_time); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + ot_unused(man_ratio_enable); + + return; +} + +/* Only used in LINE_WDR mode */ +static td_void cmos_ae_fswdr_attr_set(ot_vi_pipe vi_pipe, ot_isp_ae_fswdr_attr *ae_fswdr_attr) +{ + sns_check_pointer_void_return(ae_fswdr_attr); + + g_fswdr_mode[vi_pipe] = ae_fswdr_attr->fswdr_mode; + g_max_time_get_cnt[vi_pipe] = 0; + return; +} + +static td_s32 cmos_init_ae_exp_function(ot_isp_ae_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_ae_sensor_exp_func), 0, sizeof(ot_isp_ae_sensor_exp_func)); + + exp_func->pfn_cmos_get_ae_default = cmos_get_ae_default; + exp_func->pfn_cmos_fps_set = cmos_fps_set; + exp_func->pfn_cmos_slow_framerate_set = cmos_slow_framerate_set; + exp_func->pfn_cmos_inttime_update = cmos_inttime_update; + exp_func->pfn_cmos_gains_update = cmos_gains_update; + exp_func->pfn_cmos_again_calc_table = cmos_again_calc_table; + exp_func->pfn_cmos_dgain_calc_table = cmos_dgain_calc_table; + exp_func->pfn_cmos_get_inttime_max = cmos_get_inttime_max; + exp_func->pfn_cmos_ae_fswdr_attr_set = cmos_ae_fswdr_attr_set; + + return TD_SUCCESS; +} + +/* awb static param for Fuji Lens New IR_Cut */ +#define CALIBRATE_STATIC_TEMP 4950 +#define CALIBRATE_STATIC_WB_R_GAIN 450 +#define CALIBRATE_STATIC_WB_GR_GAIN 256 +#define CALIBRATE_STATIC_WB_GB_GAIN 256 +#define CALIBRATE_STATIC_WB_B_GAIN 447 + +/* Calibration results for Auto WB Planck */ +#define CALIBRATE_AWB_P1 18 +#define CALIBRATE_AWB_P2 238 +#define CALIBRATE_AWB_Q1 0 +#define CALIBRATE_AWB_A1 212714 +#define CALIBRATE_AWB_B1 128 +#define CALIBRATE_AWB_C1 (-163748) + +/* Rgain and Bgain of the golden sample */ +#define GOLDEN_RGAIN 0 +#define GOLDEN_BGAIN 0 +static td_s32 cmos_get_awb_default(ot_vi_pipe vi_pipe, ot_isp_awb_sensor_default *awb_sns_dft) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(awb_sns_dft); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(awb_sns_dft, sizeof(ot_isp_awb_sensor_default), 0, sizeof(ot_isp_awb_sensor_default)); + awb_sns_dft->wb_ref_temp = CALIBRATE_STATIC_TEMP; /* wb_ref_temp 4950 */ + + awb_sns_dft->gain_offset[0] = CALIBRATE_STATIC_WB_R_GAIN; + awb_sns_dft->gain_offset[1] = CALIBRATE_STATIC_WB_GR_GAIN; + awb_sns_dft->gain_offset[2] = CALIBRATE_STATIC_WB_GB_GAIN; /* index 2 */ + awb_sns_dft->gain_offset[3] = CALIBRATE_STATIC_WB_B_GAIN; /* index 3 */ + + awb_sns_dft->wb_para[0] = CALIBRATE_AWB_P1; + awb_sns_dft->wb_para[1] = CALIBRATE_AWB_P2; + awb_sns_dft->wb_para[2] = CALIBRATE_AWB_Q1; /* index 2 */ + awb_sns_dft->wb_para[3] = CALIBRATE_AWB_A1; /* index 3 */ + awb_sns_dft->wb_para[4] = CALIBRATE_AWB_B1; /* index 4 */ + awb_sns_dft->wb_para[5] = CALIBRATE_AWB_C1; /* index 5 */ + + awb_sns_dft->golden_rgain = GOLDEN_RGAIN; + awb_sns_dft->golden_bgain = GOLDEN_BGAIN; + + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + (td_void)memcpy_s(&awb_sns_dft->ccm, sizeof(ot_isp_awb_ccm), &g_awb_ccm, sizeof(ot_isp_awb_ccm)); + (td_void)memcpy_s(&awb_sns_dft->agc_tbl, sizeof(ot_isp_awb_agc_table), + &g_awb_agc_table, sizeof(ot_isp_awb_agc_table)); + break; + default: + break; + } + + awb_sns_dft->init_rgain = g_init_wb_gain[vi_pipe][0]; /* 0: Rgain */ + awb_sns_dft->init_ggain = g_init_wb_gain[vi_pipe][1]; /* 1: Ggain */ + awb_sns_dft->init_bgain = g_init_wb_gain[vi_pipe][2]; /* 2: Bgain */ + awb_sns_dft->sample_rgain = g_sample_r_gain[vi_pipe]; + awb_sns_dft->sample_bgain = g_sample_b_gain[vi_pipe]; + + return TD_SUCCESS; +} + +static td_s32 cmos_init_awb_exp_function(ot_isp_awb_sensor_exp_func *exp_func) +{ + sns_check_pointer_return(exp_func); + + (td_void)memset_s(exp_func, sizeof(ot_isp_awb_sensor_exp_func), 0, sizeof(ot_isp_awb_sensor_exp_func)); + + exp_func->pfn_cmos_get_awb_default = cmos_get_awb_default; + + return TD_SUCCESS; +} + +static ot_isp_cmos_dng_color_param g_dng_color_param = {{ 286, 256, 608 }, { 415, 256, 429 }, + { 2810, { 0x01AC, 0x8093, 0x8019, 0x8070, 0x01EA, 0x807A, 0x802A, 0x80F3, 0x021D }}, + { 4940, { 0x01D7, 0x8084, 0x8053, 0x8053, 0x01D9, 0x8086, 0x8010, 0x80B3, 0x01C3 }}}; + +static td_void cmos_get_isp_dng_default(const ot_isp_sns_state *sns_state, ot_isp_cmos_default *isp_def) +{ + (td_void)memcpy_s(&isp_def->dng_color_param, sizeof(ot_isp_cmos_dng_color_param), &g_dng_color_param, + sizeof(ot_isp_cmos_dng_color_param)); + + switch (sns_state->img_mode) { + case IMX515_SENSOR_8M_30FPS_LINEAR_MODE: + isp_def->sns_mode.dng_raw_format.bits_per_sample = 12; /* 12bit */ + isp_def->sns_mode.dng_raw_format.white_level = 4095; /* max 4095 */ + break; + default: + break; + } + + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_hor.numerator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.denominator = 1; + isp_def->sns_mode.dng_raw_format.default_scale.default_scale_ver.numerator = 1; + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_repeat_pattern_dim.repeat_pattern_dim_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_row = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.black_level_repeat_dim.repeat_col = 2; /* pattern 2 */ + isp_def->sns_mode.dng_raw_format.cfa_layout = OT_ISP_CFALAYOUT_TYPE_RECTANGULAR; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_plane_color[2] = 2; /* index 2, cfa_plane_color 2 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[0] = 0; + isp_def->sns_mode.dng_raw_format.cfa_pattern[1] = 1; + isp_def->sns_mode.dng_raw_format.cfa_pattern[2] = 1; /* index 2, cfa_pattern 1 */ + isp_def->sns_mode.dng_raw_format.cfa_pattern[3] = 2; /* index 3, cfa_pattern 2 */ + isp_def->sns_mode.valid_dng_raw_format = TD_TRUE; + return; +} + +static void cmos_get_isp_linear_default(ot_isp_cmos_default *isp_def) +{ + isp_def->key.bit1_demosaic = 1; + isp_def->demosaic = &g_cmos_demosaic; + isp_def->key.bit1_sharpen = 1; + isp_def->sharpen = &g_cmos_yuv_sharpen; + isp_def->key.bit1_drc = 1; + isp_def->drc = &g_cmos_drc; + isp_def->key.bit1_bayer_nr = 1; + isp_def->bayer_nr = &g_cmos_bayer_nr; + isp_def->key.bit1_anti_false_color = 1; + isp_def->anti_false_color = &g_cmos_anti_false_color; + isp_def->key.bit1_ldci = 1; + isp_def->ldci = &g_cmos_ldci; + isp_def->key.bit1_gamma = 1; + isp_def->gamma = &g_cmos_gamma; +#ifdef CONFIG_OT_ISP_CR_SUPPORT + isp_def->key.bit1_ge = 1; + isp_def->ge = &g_cmos_ge; +#endif + isp_def->key.bit1_dehaze = 1; + isp_def->dehaze = &g_cmos_dehaze; + (td_void)memcpy_s(&isp_def->noise_calibration, sizeof(ot_isp_noise_calibration), + &g_cmos_noise_calibration, sizeof(ot_isp_noise_calibration)); + return; +} + +static td_s32 cmos_get_isp_default(ot_vi_pipe vi_pipe, ot_isp_cmos_default *isp_def) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(isp_def); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memset_s(isp_def, sizeof(ot_isp_cmos_default), 0, sizeof(ot_isp_cmos_default)); +#ifdef CONFIG_OT_ISP_CA_SUPPORT + + isp_def->key.bit1_ca = 1; + isp_def->ca = &g_cmos_ca; +#endif + isp_def->key.bit1_clut = 1; + isp_def->clut = &g_cmos_clut; + + isp_def->key.bit1_dpc = 1; + isp_def->dpc = &g_cmos_dpc; + + isp_def->key.bit1_wdr = 1; + isp_def->wdr = &g_cmos_wdr; + + isp_def->key.bit1_lsc = 0; + isp_def->lsc = &g_cmos_lsc; + + isp_def->key.bit1_acs = 0; + isp_def->acs = &g_cmos_acs; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT + isp_def->key.bit1_pregamma = 0; + isp_def->pregamma = &g_cmos_pregamma; +#endif + switch (sns_state->wdr_mode) { + case OT_WDR_MODE_NONE: + cmos_get_isp_linear_default(isp_def); + break; + default: + break; + } + + isp_def->wdr_switch_attr.exp_ratio[0] = 0x40; + isp_def->sns_mode.sns_id= IMX515_ID; + isp_def->sns_mode.sns_mode = sns_state->img_mode; + cmos_get_isp_dng_default(sns_state, isp_def); + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_black_level(ot_vi_pipe vi_pipe, ot_isp_cmos_black_level *black_level) +{ + td_s32 i; + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(black_level); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + (td_void)memcpy_s(black_level, sizeof(ot_isp_cmos_black_level), &g_cmos_blc, sizeof(ot_isp_cmos_black_level)); + + /* Don't need to update black level when iso change */ + black_level->auto_attr.update = TD_FALSE; + + /* black level of linear mode */ + if (sns_state->wdr_mode == OT_WDR_MODE_NONE) { + for (i = 0; i < OT_ISP_BAYER_CHN_NUM; i++) { + black_level->auto_attr.black_level[0][i] = 0x320; + } + } + + return TD_SUCCESS; +} + +static td_s32 cmos_get_isp_blc_clamp_info(ot_vi_pipe vi_pipe, td_bool *blc_clamp_en) +{ + sns_check_pointer_return(blc_clamp_en); + + *blc_clamp_en = blc_clamp_info[vi_pipe]; + + return TD_SUCCESS; +} + +static td_void cmos_set_pixel_detect(ot_vi_pipe vi_pipe, td_bool enable) +{ + td_u32 full_lines_5fps, max_int_time_5fps; + ot_isp_sns_state *sns_state = TD_NULL; + + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + if (sns_state->wdr_mode == OT_WDR_MODE_2To1_LINE) { + return; + } else { + if (sns_state->img_mode == IMX515_SENSOR_8M_30FPS_LINEAR_MODE) { + full_lines_5fps = (IMX515_VMAX_4K2K_LINEAR * 30) / 5; /* 30fps, 5fps */ + } else { + return; + } + } + + max_int_time_5fps = IMX515_EXP_TIME_LMT; + + if (enable) { /* setup for ISP pixel calibration mode */ + imx515_write_register(vi_pipe, IMX515_GAIN_PGC_L, 0x00); + imx515_write_register(vi_pipe, IMX515_GAIN_PGC_H, 0x00); + + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_L, low_8bits(full_lines_5fps)); + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_M, high_8bits(full_lines_5fps)); + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_H, higher_4bits(full_lines_5fps)); + + imx515_write_register(vi_pipe, IMX515_SHR0_L, low_8bits(max_int_time_5fps)); + imx515_write_register(vi_pipe, IMX515_SHR0_M, high_8bits(max_int_time_5fps)); + imx515_write_register(vi_pipe, IMX515_SHR0_H, higher_4bits(max_int_time_5fps)); + } else { /* setup for ISP 'normal mode' */ + sns_state->fl_std = (sns_state->fl_std > IMX515_FULL_LINES_MAX) ? + IMX515_FULL_LINES_MAX : sns_state->fl_std; + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_L, low_8bits(sns_state->fl_std)); + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_M, high_8bits(sns_state->fl_std)); + imx515_write_register(vi_pipe, IMX515_VMAX_ADDR_H, higher_4bits(sns_state->fl_std)); + sns_state->sync_init = TD_FALSE; + } + + return; +} + +static td_s32 cmos_set_wdr_mode(ot_vi_pipe vi_pipe, td_u8 mode) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + sns_state->sync_init = TD_FALSE; + + switch (mode & 0x3F) { + case OT_WDR_MODE_NONE: + sns_state->wdr_mode = OT_WDR_MODE_NONE; + printf("linear mode\n"); + break; + + default: + isp_err_trace("NOT support this mode!\n"); + return TD_FAILURE; + } + + (td_void)memset_s(sns_state->wdr_int_time, sizeof(sns_state->wdr_int_time), 0, sizeof(sns_state->wdr_int_time)); + + return TD_SUCCESS; +} + +static td_void cmos_comm_sns_reg_info_init(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + sns_state->regs_info[0].sns_type = OT_ISP_SNS_TYPE_I2C; + sns_state->regs_info[0].com_bus.i2c_dev = g_imx515_bus_info[vi_pipe].i2c_dev; + sns_state->regs_info[0].cfg2_valid_delay_max = 2; /* delay_max 2 */ + sns_state->regs_info[0].reg_num = 8; /* reg_num 8 */ + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + sns_state->regs_info[0].i2c_data[i].dev_addr = IMX515_I2C_ADDR; + sns_state->regs_info[0].i2c_data[i].addr_byte_num = IMX515_ADDR_BYTE; + sns_state->regs_info[0].i2c_data[i].data_byte_num = IMX515_DATA_BYTE; + } + + /* shutter related */ + sns_state->regs_info[0].i2c_data[0].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[0].reg_addr = IMX515_SHR0_L; + sns_state->regs_info[0].i2c_data[1].delay_frame_num = 0; + sns_state->regs_info[0].i2c_data[1].reg_addr = IMX515_SHR0_M; + sns_state->regs_info[0].i2c_data[2].delay_frame_num = 0; /* index 2 */ + sns_state->regs_info[0].i2c_data[2].reg_addr = IMX515_SHR0_H; /* index 2 */ + + sns_state->regs_info[0].i2c_data[3].delay_frame_num = 0; /* index 3 */ + sns_state->regs_info[0].i2c_data[3].reg_addr = IMX515_GAIN_PGC_L; /* index 3 */ + sns_state->regs_info[0].i2c_data[4].delay_frame_num = 0; /* index 4 */ + sns_state->regs_info[0].i2c_data[4].reg_addr = IMX515_GAIN_PGC_H; /* index 4 */ + /* Vmax */ + sns_state->regs_info[0].i2c_data[5].delay_frame_num = 0; /* index 5 */ + sns_state->regs_info[0].i2c_data[5].reg_addr = IMX515_VMAX_ADDR_L; /* index 5 */ + sns_state->regs_info[0].i2c_data[6].delay_frame_num = 0; /* index 6 */ + sns_state->regs_info[0].i2c_data[6].reg_addr = IMX515_VMAX_ADDR_M; /* index 6 */ + sns_state->regs_info[0].i2c_data[7].delay_frame_num = 0; /* index 7 */ + sns_state->regs_info[0].i2c_data[7].reg_addr = IMX515_VMAX_ADDR_H; /* index 7, index 2 */ + return; +} + + +static td_void cmos_sns_reg_info_update(ot_vi_pipe vi_pipe, ot_isp_sns_state *sns_state) +{ + td_u32 i; + ot_unused(vi_pipe); + + for (i = 0; i < sns_state->regs_info[0].reg_num; i++) { + if (sns_state->regs_info[0].i2c_data[i].data == + sns_state->regs_info[1].i2c_data[i].data) { + sns_state->regs_info[0].i2c_data[i].update = TD_FALSE; + } else { + sns_state->regs_info[0].i2c_data[i].update = TD_TRUE; + } + } + + return; +} + +static td_s32 cmos_get_sns_regs_info(ot_vi_pipe vi_pipe, ot_isp_sns_regs_info *sns_regs_info) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + sns_check_pointer_return(sns_regs_info); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + if ((sns_state->sync_init == TD_FALSE) || (sns_regs_info->config == TD_FALSE)) { + cmos_comm_sns_reg_info_init(vi_pipe, sns_state); + sns_state->sync_init = TD_TRUE; + } else { + cmos_sns_reg_info_update(vi_pipe, sns_state); + } + + sns_regs_info->config = TD_FALSE; + (td_void)memcpy_s(sns_regs_info, sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + (td_void)memcpy_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), + &sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info)); + sns_state->fl[1] = sns_state->fl[0]; + + return TD_SUCCESS; +} + +static td_void cmos_config_image_mode_param(ot_vi_pipe vi_pipe, td_u8 sns_image_mode, + ot_isp_sns_state *sns_state) +{ + switch (sns_image_mode) { + case IMX515_SENSOR_8M_30FPS_LINEAR_MODE: + sns_state->fl_std = IMX515_VMAX_4K2K_LINEAR; + break; + default: + break; + } +} + +static td_s32 cmos_set_image_mode(ot_vi_pipe vi_pipe, const ot_isp_cmos_sns_image_mode *sns_image_mode) +{ + td_u32 i; + td_u8 image_mode; + ot_isp_sns_state *sns_state = TD_NULL; + sns_check_pointer_return(sns_image_mode); + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_return(sns_state); + + image_mode = sns_state->img_mode; + + for (i = 0; i < IMX515_MODE_BUTT; i++) { + if (sns_image_mode->fps <= g_imx515_mode_tbl[i].max_fps && + sns_image_mode->width <= g_imx515_mode_tbl[i].width && + sns_image_mode->height <= g_imx515_mode_tbl[i].height && + sns_state->wdr_mode == g_imx515_mode_tbl[i].wdr_mode) { + image_mode = (imx515_res_mode)i; + break; + } + } + + if (i >= IMX515_MODE_BUTT) { + imx515_err_mode_print(sns_image_mode, sns_state); + return TD_FAILURE; + } + + cmos_config_image_mode_param(vi_pipe, image_mode, sns_state); + + if ((sns_state->init == TD_TRUE) && (image_mode == sns_state->img_mode)) { + return OT_ISP_DO_NOT_NEED_SWITCH_IMAGEMODE; /* Don't need to switch image_mode */ + } + + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = image_mode; + sns_state->fl[0] = sns_state->fl_std; + sns_state->fl[1] = sns_state->fl[0]; + return TD_SUCCESS; +} + +static td_void sensor_global_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state = TD_NULL; + + imx515_sensor_get_ctx(vi_pipe, sns_state); + sns_check_pointer_void_return(sns_state); + + sns_state->init = TD_FALSE; + sns_state->sync_init = TD_FALSE; + sns_state->img_mode = IMX515_SENSOR_8M_30FPS_LINEAR_MODE; + sns_state->wdr_mode = OT_WDR_MODE_NONE; + sns_state->fl_std = IMX515_VMAX_4K2K_LINEAR; + sns_state->fl[0] = IMX515_VMAX_4K2K_LINEAR; + sns_state->fl[1] = IMX515_VMAX_4K2K_LINEAR; + + (td_void)memset_s(&sns_state->regs_info[0], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + (td_void)memset_s(&sns_state->regs_info[1], sizeof(ot_isp_sns_regs_info), 0, sizeof(ot_isp_sns_regs_info)); + return; +} + +static td_s32 cmos_init_sensor_exp_function(ot_isp_sns_exp_func *sensor_exp_func) +{ + sns_check_pointer_return(sensor_exp_func); + + (td_void)memset_s(sensor_exp_func, sizeof(ot_isp_sns_exp_func), 0, sizeof(ot_isp_sns_exp_func)); + + sensor_exp_func->pfn_cmos_sns_init = imx515_init; + sensor_exp_func->pfn_cmos_sns_exit = imx515_exit; + sensor_exp_func->pfn_cmos_sns_global_init = sensor_global_init; + sensor_exp_func->pfn_cmos_set_image_mode = cmos_set_image_mode; + sensor_exp_func->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode; + sensor_exp_func->pfn_cmos_get_isp_default = cmos_get_isp_default; + sensor_exp_func->pfn_cmos_get_isp_black_level = cmos_get_isp_black_level; + sensor_exp_func->pfn_cmos_get_blc_clamp_info = cmos_get_isp_blc_clamp_info; + sensor_exp_func->pfn_cmos_set_pixel_detect = cmos_set_pixel_detect; + sensor_exp_func->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info; + + return TD_SUCCESS; +} + +static td_s32 imx515_set_bus_info(ot_vi_pipe vi_pipe, ot_isp_sns_commbus sns_bus_info) +{ + g_imx515_bus_info[vi_pipe].i2c_dev = sns_bus_info.i2c_dev; + + return TD_SUCCESS; +} + +static td_s32 sensor_ctx_init(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + imx515_sensor_get_ctx(vi_pipe, sns_state_ctx); + + if (sns_state_ctx == TD_NULL) { + sns_state_ctx = (ot_isp_sns_state *)malloc(sizeof(ot_isp_sns_state)); + if (sns_state_ctx == TD_NULL) { + isp_err_trace("Isp[%d] SnsCtx malloc memory failed!\n", vi_pipe); + return OT_ERR_ISP_NOMEM; + } + } + + (td_void)memset_s(sns_state_ctx, sizeof(ot_isp_sns_state), 0, sizeof(ot_isp_sns_state)); + + imx515_sensor_set_ctx(vi_pipe, sns_state_ctx); + + return TD_SUCCESS; +} + +static td_void sensor_ctx_exit(ot_vi_pipe vi_pipe) +{ + ot_isp_sns_state *sns_state_ctx = TD_NULL; + + imx515_sensor_get_ctx(vi_pipe, sns_state_ctx); + sns_free(sns_state_ctx); + imx515_sensor_reset_ctx(vi_pipe); + return; +} + +static td_s32 sensor_register_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + ot_isp_sns_register isp_register; + ot_isp_ae_sensor_register ae_register; + ot_isp_awb_sensor_register awb_register; + ot_isp_sns_attr_info sns_attr_info; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = sensor_ctx_init(vi_pipe); + if (ret != TD_SUCCESS) { + return TD_FAILURE; + } + + sns_attr_info.sns_id = IMX515_ID; + ret = cmos_init_sensor_exp_function(&isp_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_isp_sensor_reg_callback(vi_pipe, &sns_attr_info, &isp_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function failed!\n"); + return ret; + } + + ret = cmos_init_ae_exp_function(&ae_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init ae exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_ae_sensor_reg_callback(vi_pipe, ae_lib, &sns_attr_info, &ae_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to ae lib failed!\n"); + return ret; + } + + ret = cmos_init_awb_exp_function(&awb_register.sns_exp); + if (ret != TD_SUCCESS) { + isp_err_trace("cmos init awb exp function failed!\n"); + return TD_FAILURE; + } + ret = ot_mpi_awb_sensor_reg_callback(vi_pipe, awb_lib, &sns_attr_info, &awb_register); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor register callback function to awb lib failed!\n"); + return ret; + } + + return TD_SUCCESS; +} + +static td_s32 sensor_unregister_callback(ot_vi_pipe vi_pipe, ot_isp_3a_alg_lib *ae_lib, ot_isp_3a_alg_lib *awb_lib) +{ + td_s32 ret; + + sns_check_pointer_return(ae_lib); + sns_check_pointer_return(awb_lib); + + ret = ot_mpi_isp_sensor_unreg_callback(vi_pipe, IMX515_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function failed!\n"); + return ret; + } + + ret = ot_mpi_ae_sensor_unreg_callback(vi_pipe, ae_lib, IMX515_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to ae lib failed!\n"); + return ret; + } + + ret = ot_mpi_awb_sensor_unreg_callback(vi_pipe, awb_lib, IMX515_ID); + if (ret != TD_SUCCESS) { + isp_err_trace("sensor unregister callback function to awb lib failed!\n"); + return ret; + } + + sensor_ctx_exit(vi_pipe); + return TD_SUCCESS; +} + +static td_s32 sensor_set_init(ot_vi_pipe vi_pipe, ot_isp_init_attr *init_attr) +{ + sns_check_pointer_return(init_attr); + + g_init_exposure[vi_pipe] = init_attr->exposure; + g_lines_per500ms[vi_pipe] = init_attr->lines_per500ms; + g_init_wb_gain[vi_pipe][0] = init_attr->wb_r_gain; /* 0: rgain */ + g_init_wb_gain[vi_pipe][1] = init_attr->wb_g_gain; /* 1: ggain */ + g_init_wb_gain[vi_pipe][2] = init_attr->wb_b_gain; /* 2: bgain */ + g_sample_r_gain[vi_pipe] = init_attr->sample_r_gain; + g_sample_b_gain[vi_pipe] = init_attr->sample_b_gain; + g_quick_start_en[vi_pipe] = init_attr->quick_start_en; + g_ae_stat_pos[vi_pipe] = init_attr->ae_stat_pos; + g_ae_route_ex_valid[vi_pipe] = init_attr->ae_route_ex_valid; + (td_void)memcpy_s(&g_init_ae_route[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_ex, sizeof(ot_isp_ae_route_ex)); + (td_void)memcpy_s(&g_init_ae_route_sf[vi_pipe], sizeof(ot_isp_ae_route), + &init_attr->ae_route_sf, sizeof(ot_isp_ae_route)); + (td_void)memcpy_s(&g_init_ae_route_sf_ex[vi_pipe], sizeof(ot_isp_ae_route_ex), + &init_attr->ae_route_sf_ex, sizeof(ot_isp_ae_route_ex)); + + return TD_SUCCESS; +} + +ot_isp_sns_obj g_sns_imx515_obj = { + .pfn_register_callback = sensor_register_callback, + .pfn_un_register_callback = sensor_unregister_callback, + .pfn_standby = imx515_standby, + .pfn_restart = imx515_restart, + .pfn_mirror_flip = TD_NULL, + .pfn_set_blc_clamp = imx515_blc_clamp, + .pfn_write_reg = imx515_write_register, + .pfn_read_reg = imx515_read_register, + .pfn_set_bus_info = imx515_set_bus_info, + .pfn_set_init = sensor_set_init +}; + diff --git a/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.h b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.h new file mode 100644 index 0000000..dd85505 --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos.h @@ -0,0 +1,65 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef IMX515_CMOS_H +#define IMX515_CMOS_H + +#include "ot_common.h" +#include "ot_common_isp.h" +#include "ot_common_video.h" +#include "ot_sns_ctrl.h" +#include "ot_type.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#define IMX515_I2C_ADDR 0x34 +#define IMX515_ADDR_BYTE 2 +#define IMX515_DATA_BYTE 1 +#define imx515_sensor_get_ctx(pipe, ctx) ((ctx) = imx515_get_ctx(pipe)) + +#define IMX515_FULL_LINES_MAX 0xFFFFF + +#define IMX515_INCREASE_LINES 1 /* make real fps less than stand fps because NVR require */ +#define IMX515_VMAX_4K2K_LINEAR (3300 + IMX515_INCREASE_LINES) + +typedef enum { + IMX515_SENSOR_8M_30FPS_LINEAR_MODE = 0, + IMX515_MODE_BUTT +} imx515_res_mode; + +typedef struct { + td_u32 ver_lines; + td_u32 max_ver_lines; + td_float max_fps; + td_float min_fps; + td_u32 width; + td_u32 height; + td_u8 sns_mode; + ot_wdr_mode wdr_mode; + const char *mode_name; +} imx515_video_mode_tbl; + +ot_isp_sns_state *imx515_get_ctx(ot_vi_pipe vi_pipe); +ot_isp_sns_commbus *imx515_get_bus_info(ot_vi_pipe vi_pipe); + +td_void imx515_init(ot_vi_pipe vi_pipe); +td_void imx515_exit(ot_vi_pipe vi_pipe); +td_void imx515_standby(ot_vi_pipe vi_pipe); +td_void imx515_restart(ot_vi_pipe vi_pipe); +td_s32 imx515_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data); +td_s32 imx515_read_register(ot_vi_pipe vi_pipe, td_u32 addr); +td_void imx515_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp blc_clamp); +td_void imx515_set_blc_clamp_value(ot_vi_pipe vi_pipe, td_bool clamp_en); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ +#endif /* IMX515_CMOS_H */ + diff --git a/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos_ex.h b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos_ex.h new file mode 100644 index 0000000..bfe6ccf --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx515/imx515_cmos_ex.h @@ -0,0 +1,4300 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#ifndef IMX515_CMOS_EX_H +#define IMX515_CMOS_EX_H + +#include "ot_common_awb.h" +#include "ot_common_isp.h" +#include "ot_common_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const ot_isp_cmos_black_level g_cmos_blc = { + TD_FALSE, /* user_black_level_en */ + { + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + {1200, 1200, 1200, 1200}, + }, /* user_black_level */ + OT_ISP_BLACK_LEVEL_MODE_AUTO, /* ot_isp_black_level_mode */ + { + { + {0x320, 0x320, 0x320, 0x320}, + {0x320, 0x320, 0x320, 0x320}, + {0x320, 0x320, 0x320, 0x320}, + {0x320, 0x320, 0x320, 0x320}, + }, + }, /* manual_attr */ + { + OT_ISP_DYNAMIC_PATTERN_RGB, /* ot_isp_black_level_dynamic_pattern */ + {0, 0, 1920, 10}, /* ob_area */ + 10, /* low_threshold */ + 4095, /* high_threshold */ + {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* dynablc offset */ + 0x0, /* dynablc tolerance */ + 0x0, /* filter_strength */ + 0x0, /* separate_mode */ + {960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960, 960}, /* calibration black level */ + 0, + }, /* dynamic_attr */ + { + 0, /* update mode 0 */ + { + {0x320, 0x320, 0x320, 0x320}, /* black level */ + {0x320, 0x320, 0x320, 0x320}, /* black level */ + {0x320, 0x320, 0x320, 0x320}, /* black level */ + {0x320, 0x320, 0x320, 0x320}, /* black level */ + }, + }, + { + {1920, 1090}, + }, +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc = { + 1, /* dynamic correction enable */ + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 0, 0, 0, 152, 220, 220, 220, 220, 220, 220, 152, 152, 152, 152, 152, 152 }, /* strength[16] */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 50, 50, 50, 50, 50 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for linear frame */ + } +}; + +static const ot_isp_dp_dynamic_attr g_cmos_dpc_wdr = { + 1, /* dynamic correction enable */ + + { + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 100, 100, 100, 150, 180, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230 }, /* strength[16] */ + { 0, 0, 0, 0, 10, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for short frame */ + + { + 0, /* twinkle suppression enable */ + 6, /* twinkle suppression threshold */ + 21, /* twinkle suppression slop */ + 0, /* 0, auto mode; 1, manual mode */ + { + 0, /* manual mode strength */ + 0, /* manual mode blend ratio */ + }, + { + { 230, 230, 230, 230, 230, 230, 230, 230, 248, 250, 250, 250, 250, 250, 250, 250 }, /* strength[16] */ + { 0, 0, 0, 0, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 }, /* blend_ratio[16] */ + }, + 96, /* strength for bright area */ + 63, /* strength for dark area */ + }, /* dynamic config for long frame */ + } +}; + +#ifdef CONFIG_OT_ISP_CR_SUPPORT +static const ot_isp_cr_attr g_cmos_ge = { + 1, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; + +static const ot_isp_cr_attr g_cmos_ge_wdr = { + 0, /* en */ + 9, /* slope */ + 9, /* sensi_slope */ + 300, /* sensi_threshold */ + { 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131 }, /* strength */ + { 300, 300, 300, 300, 310, 310, 310, 310, 320, 320, 320, 320, 330, 330, 330, 330 }, /* threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filter_mode */ + { 1024, 1024, 1024, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048 } /* np_offset */ +}; +#endif + +static const ot_isp_demosaic_attr g_cmos_demosaic = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 48, 48, 48, 54, 54, 54, 48, 40, 40, 48, 48, 48, 48, 48, 48, 48 }, + /* nddm_mf_detail_strength */ + { 82, 74, 68, 60, 54, 50, 44, 40, 40, 40, 40, 32, 16, 16, 16, 16 }, + /* nddm_hf_detail_strength */ + { 0, 0, 1, 2, 4, 6, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* detail_smooth_range */ + { 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 3, 5, 7, 7, 7, 7 }, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_demosaic_attr g_cmos_demosaic_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 128, /* ai_detail_strength */ + { + 48, /* nddm_strength */ + 64, /* nddm_mf_detail_strength */ + 0, /* nddm_hf_detail_strength */ + 2, /* detail_smooth_range */ + 0, /* color_noise_f_threshold */ + 8, /* color_noise_f_strength */ + 1, /* color_noise_y_threshold */ + 10, /* color_noise_y_strength */ + }, + { + /* nddm_strength */ + { 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }, + /* nddm_mf_detail_strength */ + {32, 32, 32, 35, 35, 32, 28, 28, 24, 20, 20, 20, 16, 16, 16, 16}, + /* nddm_hf_detail_strength */ + {0, 0, 0, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, + /* detail_smooth_range */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 4, 4, 4, 4, 4, 4}, + /* color_noise_f_threshold */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* color_noise_f_strength */ + { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }, + /* color_noise_y_threshold */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* color_noise_y_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 12, 12, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_anti_false_color_attr g_cmos_anti_false_color_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + { 8, 8 }, /* manual_attr */ + { + { 10, 10, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_threshold */ + { 8, 8, 8, 8, 7, 7, 7, 6, 6, 6, 5, 4, 3, 2, 1, 0 }, /* anti_false_color_strength */ + } +}; + +static const ot_isp_cac_attr g_cmos_cac = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 16383, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, + 16383, 16383 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 3, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + } + } +}; + +static const ot_isp_cac_attr g_cmos_cac_wdr = { + 1, /* en */ + OT_OP_MODE_AUTO, /* op_type */ + 1, /* detect_mode */ + 135, /* purple_upper_limit */ + (-50), /* purple_lower_limit */ + /* acac_cfg */ + { + { + {10, 300}, /* edge_threshold */ + 255, /* edge_gain */ + 10, /* cac_rb_strength */ + 63, /* purple_alpha */ + 63, /* edge_alpha */ + 100, /* satu_low_threshold */ + 1000, /* satu_high_threshold */ + }, + { + /* edge_threshold */ + { + {100, 100, 100, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + {500, 500, 500, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600, 600} + }, + /* edge_gain */ + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + /* cac_rb_strength */ + { 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }, + /* purple_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* edge_alpha */ + { 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 }, + /* satu_low_threshold */ + { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* satu_high_threshold */ + { 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 }, + } + }, + /* lcac_cfg */ + { + 60, /* purple_detect_range */ + 200, /* var_threshold */ + { 1500, 1500, 0 }, /* r_detect_threshold */ + { 1500, 1500, 0 }, /* g_detect_threshold */ + { 4095, 1500, 0 }, /* b_detect_threshold */ + { + 0, /* de_purple_cr_strength */ + 7, /* de_purple_cb_strength */ + }, + { + /* de_purple_cr_strength */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* de_purple_cb_strength */ + { 0, 0, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }, + } + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +static const ot_isp_bayershp_attr g_cmos_bayershp_wdr = { + 1, /* en */ + {180, 220}, /* dark_threshold */ + {200, 300}, /* texture_threshold */ + OT_OP_MODE_AUTO, /* op_type */ + { + { 0, 0, 32, 32, 32, 32, 32, 32 }, /* mf_strength */ + { 0, 0, 16, 32, 32, 16, 16, 0 }, /* hf_strength */ + { 0, 0, 16, 16, 4, 2, 0, 0 }, /* dark_strength */ + 3, /* mf_gain */ + 2, /* hf_gain */ + 1, /* dark_gain */ + 128, /* overshoot */ + 128, /* undershoot */ + }, + { + /* mf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32} + }, + /* hf_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* dark_strength[OT_ISP_BSHP_CURVE_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}, + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + /* mf_gain */ + { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, + /* hf_gain */ + { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, + /* dark_gain */ + { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, + /* overshoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + /* undershoot */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + } +}; + +/* BAYER NR */ +static ot_isp_noise_calibration g_cmos_noise_calibration = { + {6400.0000000000, 0.0004112723, -0.0004756478, 0.0000001604, -0.0000000857, 0.0037050662, + 0.0004114007, -0.0008634218, 0.0000001588, 0.0000046629, 0.0036520983, 0, 0, 0, 0, 0} +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_nr_attr g_cmos_bayer_nr_wdr = { + 1, /* bEnable */ + 0, /* enOpType */ + 1, /* tnr_enable */ + 0, /* lsc_nr_enable */ + 0, /* lsc_ratio1 */ + { + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 85, 85, 85, 85, 85, 85, 90, 90, 90, 95, 95, 95, 100, 100, 100, 100, 100 + }, /* CoringRatio */ + { + 128, 128, 128, 128, 128, 128, 110, 90, + 77, 77, 77, 77, 77, 77, 77, 77, // u1.7 x 32 (128 = 1.0f) + 77, 77, 77, 77, 77, 77, 77, 77, + 77, 77, 77, 77, 77, 77, 77, 77 + }, + /* snr_cfg */ + { + 0, /* snr_version */ + { + { + /* snr auto */ + { + { + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108}, + {108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, 108} + }, + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* sfm0_detail_prot */ + {512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512, 512}, /* sfm1_str */ + {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, /* sfm1_adp_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm6_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* sfm7_strength */ + {100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100}, /* sth */ + {128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}, /* fine_str */ + {50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50}, /* coring_wgt */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* coring_mot_ratio */ + }, + /* snr manual */ + { + { 108, 108, 108, 108 }, /* snr_sfm0_coarstr */ + 16, /* sfm0_detail_prot */ + 512, /* sfm1_str */ + 2, /* sfm1_adp_strength */ + 64, /* sfm6_strength */ + 64, /* sfm7_strength */ + 100, /* sth */ + 128, /* fine_str */ + 50, /* coring_wgt */ + 0, /* coring_mot_ratio */ + }, + }, + } + }, + /* tnr_cfg */ + { + { + /* tnr auto */ + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, /* md_mode */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_size_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_anti_flicker_str */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* md_static_ratio */ + {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, /* md_motion_ratio */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* md_static_finestr */ + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, /* tnr_tfs */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_md */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* user_define_slope */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, /* user_define_dark_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* user_define_color_thresh */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_r */ + {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, /* sfr_g */ + {26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26}, /* sfr_b */ + }, + { + 1, /* md_mode */ + 32, /* md_size_ratio */ + 32, /* md_anti_flicker_str */ + 26, /* md_static_ratio */ + 13, /* md_motion_ratio */ + 32, /* md_static_finestr */ + 255, /* tnr_tfs */ + 0, /* user_define_md */ + 0, /* user_define_bright_thresh */ + 90, /* user_define_dark_thresh */ + 16, /* user_define_color_thresh */ + 26, /* sfr_r */ + 32, /* sfr_g */ + 26, /* sfr_b */ + } + }, + /* wdr_cfg */ + { + {16, 16, 16, 16}, /* sfm0_wdr_frame_str */ + {16, 16, 16, 16}, /* sfm0_fusion_frame_str */ + {64, 16, 16, 16}, /* snr_wdr_sfm6_strength */ + {64, 16, 16, 16}, /* snr_wdr_sfm7_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm6_strength */ + {64, 16, 16, 16}, /* snr_fusion_sfm7_strength */ + {16, 16, 16, 16}, /* md_wdr_frame_str */ + {16, 16, 16, 16}, /* md_fusion_frame_str */ + }, + /* dering_cfg */ + { + { + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_strength */ + {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, /* dering_thresh */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_static_str */ + {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, /* dering_motion_str */ + }, + { + 64, /* dering_strength */ + 64, /* dering_thresh */ + 16, /* dering_static_str */ + 16, /* dering_motion_str */ + } + }, +}; + +static const ot_isp_ldci_attr g_cmos_ldci = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 50, 80, 32 + }, + /* he_neg_wgt */ + { + 60, 80, 128 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{50, 80, 32}, {60, 80, 128}}, + {{45, 80, 16}, {45, 80, 128}}, + {{42, 70, 0}, {45, 80, 128}}, + {{40, 70, 0}, {45, 80, 0}}, + {{35, 70, 0}, {24, 72, 0}}, + {{32, 64, 0}, {12, 64, 0}}, + {{12, 24, 0}, {8, 54, 0}}, + {{8, 20, 0}, {6, 36, 0}}, + {{6, 12, 0}, {0, 8, 0}}, + {{0, 8, 0}, {0, 6, 0}}, + {{0, 6, 0}, {0, 2, 0}}, + {{0, 2, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}}, + {{0, 1, 0}, {0, 1, 0}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_ldci_attr g_cmos_ldci_wdr = { + /* enable */ + 1, + /* gauss_lpf_sigma */ + 36, + /* ot_op_mode */ + 0, + + /* ot_isp_ldci_manual_attr */ + { + /* ot_isp_ldci_he_wgt_attr */ + { + /* he_pos_wgt */ + { + 16, 80, 20 + }, + /* he_neg_wgt */ + { + 32, 80, 180 + } + }, + + /* blc_ctrl */ + 20 + }, + + /* ot_isp_ldci_auto_attr */ + { + /* he_wgt[OT_ISP_AUTO_ISO_NUM] */ + { + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}}, + {{32, 48, 128}, {32, 80, 200}} + }, + + /* blc_ctrl */ + { 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20 } + }, + + /* tpr_incr_coef */ + 8, + /* tpr_decr_coef */ + 8 +}; + +static const ot_isp_gamma_attr g_cmos_gamma = { + 1, + { + 0, 13, 27, 40, 54, 68, 81, 95, 108, 121, 135, 150, 166, 180, 195, 210, 226, 242, + 259, 269, 281, 292, 303, 315, 327, 339, 352, 364, 376, 389, 402, 415, 425, 435, 446, 456, + 467, 477, 488, 499, 510, 521, 532, 543, 555, 566, 578, 591, 602, 613, 625, 636, 648, 659, + 671, 683, 695, 708, 721, 734, 748, 762, 777, 792, 809, 817, 826, 836, 845, 855, 865, 875, + 885, 896, 906, 917, 928, 939, 950, 961, 972, 983, 994, 1005, 1017, 1028, 1039, 1051, 1062, 1073, + 1085, 1096, 1107, 1118, 1129, 1140, 1151, 1161, 1172, 1182, 1193, 1203, 1213, 1223, 1234, 1244, 1254, 1264, + 1274, 1284, 1295, 1305, 1315, 1325, 1336, 1346, 1357, 1367, 1378, 1389, 1400, 1411, 1422, 1433, 1445, 1456, + 1468, 1480, 1493, 1499, 1505, 1511, 1518, 1524, 1531, 1537, 1544, 1551, 1558, 1564, 1571, 1578, 1585, 1592, + 1599, 1607, 1614, 1621, 1628, 1635, 1643, 1650, 1657, 1665, 1672, 1679, 1687, 1694, 1702, 1709, 1716, 1724, + 1731, 1738, 1746, 1753, 1761, 1768, 1775, 1783, 1790, 1797, 1804, 1811, 1819, 1826, 1833, 1840, 1847, 1854, + 1861, 1867, 1874, 1881, 1888, 1894, 1901, 1907, 1914, 1920, 1926, 1932, 1939, 1945, 1951, 1956, 1962, 1968, + 1974, 1980, 1986, 1991, 1997, 2003, 2008, 2014, 2020, 2025, 2031, 2036, 2042, 2047, 2052, 2058, 2063, 2068, + 2074, 2079, 2084, 2089, 2094, 2099, 2105, 2110, 2115, 2120, 2125, 2130, 2135, 2140, 2145, 2150, 2154, 2159, + 2164, 2169, 2174, 2179, 2183, 2188, 2193, 2198, 2202, 2207, 2212, 2217, 2221, 2226, 2231, 2235, 2240, 2244, + 2249, 2254, 2258, 2263, 2268, 2272, 2277, 2281, 2286, 2290, 2295, 2299, 2304, 2308, 2312, 2317, 2321, 2325, + 2330, 2334, 2338, 2342, 2347, 2351, 2355, 2359, 2363, 2368, 2372, 2376, 2380, 2384, 2388, 2392, 2396, 2400, + 2404, 2408, 2412, 2416, 2420, 2424, 2428, 2432, 2436, 2439, 2443, 2447, 2451, 2455, 2459, 2463, 2466, 2470, + 2474, 2478, 2482, 2485, 2489, 2493, 2497, 2500, 2504, 2508, 2512, 2515, 2519, 2523, 2527, 2530, 2534, 2538, + 2541, 2545, 2548, 2552, 2556, 2559, 2563, 2566, 2570, 2574, 2577, 2581, 2584, 2588, 2591, 2594, 2598, 2601, + 2605, 2608, 2612, 2615, 2618, 2622, 2625, 2629, 2632, 2635, 2639, 2642, 2645, 2649, 2652, 2655, 2659, 2662, + 2665, 2668, 2672, 2675, 2678, 2681, 2685, 2688, 2691, 2694, 2698, 2701, 2704, 2707, 2710, 2714, 2717, 2720, + 2723, 2727, 2730, 2733, 2736, 2739, 2743, 2746, 2749, 2752, 2755, 2758, 2762, 2765, 2768, 2771, 2774, 2777, + 2781, 2784, 2787, 2790, 2793, 2796, 2800, 2803, 2806, 2809, 2812, 2815, 2818, 2821, 2824, 2827, 2831, 2834, + 2837, 2840, 2843, 2846, 2849, 2852, 2855, 2858, 2861, 2864, 2867, 2870, 2873, 2876, 2879, 2882, 2885, 2887, + 2890, 2893, 2896, 2899, 2902, 2905, 2908, 2910, 2913, 2916, 2919, 2922, 2924, 2927, 2930, 2933, 2936, 2938, + 2941, 2944, 2946, 2949, 2952, 2954, 2957, 2960, 2962, 2965, 2967, 2970, 2972, 2975, 2978, 2980, 2983, 2985, + 2988, 2990, 2993, 2995, 2998, 3000, 3002, 3005, 3007, 3010, 3012, 3015, 3017, 3019, 3022, 3024, 3026, 3029, + 3031, 3034, 3036, 3038, 3041, 3043, 3045, 3048, 3050, 3052, 3055, 3057, 3059, 3062, 3064, 3066, 3069, 3071, + 3073, 3075, 3078, 3080, 3082, 3085, 3087, 3089, 3092, 3094, 3096, 3098, 3101, 3103, 3105, 3107, 3110, 3112, + 3114, 3116, 3119, 3121, 3123, 3125, 3128, 3130, 3132, 3134, 3136, 3139, 3141, 3143, 3145, 3147, 3149, 3152, + 3154, 3156, 3158, 3160, 3162, 3165, 3167, 3169, 3171, 3173, 3175, 3177, 3179, 3182, 3184, 3186, 3188, 3190, + 3192, 3194, 3196, 3198, 3201, 3203, 3205, 3207, 3209, 3211, 3213, 3215, 3217, 3219, 3221, 3223, 3225, 3227, + 3230, 3232, 3234, 3236, 3238, 3240, 3242, 3244, 3246, 3248, 3250, 3252, 3254, 3256, 3258, 3260, 3262, 3264, + 3266, 3268, 3270, 3272, 3274, 3276, 3278, 3280, 3282, 3283, 3285, 3287, 3289, 3291, 3293, 3295, 3297, 3299, + 3301, 3303, 3305, 3307, 3309, 3311, 3312, 3314, 3316, 3318, 3320, 3322, 3324, 3326, 3328, 3330, 3332, 3334, + 3335, 3337, 3339, 3341, 3343, 3345, 3347, 3349, 3351, 3353, 3355, 3356, 3358, 3360, 3362, 3364, 3366, 3368, + 3370, 3371, 3373, 3375, 3377, 3379, 3381, 3382, 3384, 3386, 3388, 3390, 3392, 3393, 3395, 3397, 3399, 3401, + 3403, 3404, 3406, 3408, 3410, 3412, 3413, 3415, 3417, 3419, 3421, 3423, 3424, 3426, 3428, 3430, 3432, 3434, + 3435, 3437, 3439, 3441, 3443, 3445, 3447, 3448, 3450, 3452, 3454, 3456, 3458, 3460, 3462, 3464, 3466, 3468, + 3470, 3472, 3474, 3475, 3477, 3479, 3481, 3483, 3486, 3488, 3490, 3492, 3494, 3496, 3498, 3500, 3502, 3504, + 3506, 3508, 3510, 3512, 3514, 3517, 3519, 3521, 3523, 3525, 3527, 3529, 3531, 3533, 3536, 3538, 3540, 3542, + 3544, 3546, 3548, 3550, 3553, 3555, 3557, 3559, 3561, 3563, 3565, 3568, 3570, 3572, 3574, 3576, 3578, 3580, + 3582, 3585, 3587, 3589, 3591, 3593, 3595, 3597, 3599, 3601, 3603, 3605, 3608, 3610, 3612, 3614, 3616, 3618, + 3620, 3622, 3624, 3626, 3628, 3630, 3632, 3634, 3636, 3638, 3640, 3642, 3645, 3647, 3649, 3651, 3653, 3655, + 3657, 3659, 3661, 3663, 3665, 3667, 3669, 3671, 3673, 3675, 3677, 3679, 3681, 3683, 3685, 3687, 3689, 3691, + 3693, 3695, 3697, 3699, 3701, 3704, 3706, 3708, 3710, 3712, 3714, 3716, 3718, 3720, 3722, 3724, 3726, 3728, + 3730, 3732, 3734, 3736, 3738, 3740, 3742, 3744, 3746, 3748, 3750, 3752, 3754, 3756, 3758, 3760, 3762, 3764, + 3766, 3767, 3769, 3771, 3773, 3775, 3777, 3779, 3781, 3783, 3785, 3787, 3789, 3791, 3793, 3795, 3797, 3799, + 3801, 3803, 3804, 3806, 3808, 3810, 3812, 3814, 3816, 3818, 3820, 3822, 3824, 3826, 3828, 3830, 3832, 3834, + 3836, 3837, 3839, 3841, 3843, 3845, 3847, 3849, 3851, 3853, 3855, 3857, 3858, 3860, 3862, 3864, 3866, 3868, + 3870, 3872, 3873, 3875, 3877, 3879, 3881, 3883, 3885, 3887, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, + 3904, 3905, 3907, 3909, 3911, 3913, 3915, 3917, 3919, 3920, 3922, 3924, 3926, 3928, 3930, 3932, 3934, 3935, + 3937, 3939, 3941, 3943, 3945, 3947, 3949, 3950, 3952, 3954, 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, + 3971, 3972, 3974, 3976, 3977, 3979, 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 3996, 3998, 4000, 4001, + 4003, 4005, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4023, 4025, 4027, 4028, 4030, 4032, 4034, + 4036, 4037, 4039, 4041, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4059, 4061, 4063, 4064, 4066, + 4068, 4070, 4072, 4073, 4075, 4077, 4078, 4080, 4082, 4084, 4086, 4087, 4089, 4091, 4092, 4094, 4095, + }, + 3, +}; + +static const ot_isp_gamma_attr g_cmos_gamma_wdr = { + 1, + { + 0, 5, 10, 15, 20, 25, 30, 35, 40, 44, 49, 54, 59, 64, 69, 74, 79, 84, + 89, 94, 99, 103, 108, 113, 118, 123, 128, 133, 138, 142, 147, 152, 157, 162, 167, 171, + 176, 181, 186, 191, 196, 200, 205, 210, 215, 220, 224, 229, 234, 239, 244, 249, 253, 258, + 263, 268, 273, 278, 283, 287, 292, 297, 302, 307, 312, 317, 321, 326, 331, 336, 341, 346, + 351, 356, 361, 366, 371, 376, 381, 386, 391, 396, 401, 406, 411, 416, 421, 426, 431, 436, + 441, 446, 451, 456, 461, 466, 472, 477, 482, 487, 492, 498, 503, 508, 513, 519, 524, 529, + 535, 540, 545, 551, 556, 561, 567, 572, 578, 583, 589, 594, 600, 605, 611, 616, 622, 628, + 633, 639, 645, 650, 656, 662, 667, 673, 679, 685, 691, 697, 702, 708, 714, 720, 726, 732, + 738, 744, 750, 756, 762, 768, 774, 780, 787, 793, 799, 805, 811, 817, 824, 830, 836, 842, + 849, 855, 861, 867, 874, 880, 886, 893, 899, 905, 912, 918, 925, 931, 937, 944, 950, 957, + 963, 970, 976, 982, 989, 995, 1002, 1008, 1015, 1021, 1028, 1034, 1041, 1047, 1054, 1060, 1067, 1074, + 1080, 1087, 1093, 1100, 1106, 1113, 1119, 1126, 1132, 1139, 1145, 1152, 1159, 1165, 1172, 1178, 1185, 1191, + 1198, 1204, 1211, 1217, 1224, 1230, 1237, 1244, 1250, 1257, 1263, 1270, 1276, 1283, 1289, 1295, 1302, 1308, + 1315, 1321, 1328, 1334, 1341, 1347, 1353, 1360, 1366, 1373, 1379, 1385, 1392, 1398, 1404, 1411, 1417, 1423, + 1430, 1436, 1442, 1448, 1455, 1461, 1467, 1473, 1479, 1486, 1492, 1498, 1505, 1511, 1517, 1524, 1530, 1536, + 1543, 1549, 1555, 1562, 1568, 1575, 1581, 1587, 1594, 1600, 1607, 1613, 1620, 1626, 1632, 1639, 1645, 1652, + 1658, 1665, 1671, 1678, 1684, 1690, 1697, 1703, 1710, 1716, 1723, 1729, 1736, 1742, 1749, 1755, 1761, 1768, + 1774, 1781, 1787, 1794, 1800, 1806, 1813, 1819, 1826, 1832, 1838, 1845, 1851, 1857, 1864, 1870, 1876, 1883, + 1889, 1895, 1902, 1908, 1914, 1920, 1927, 1933, 1939, 1945, 1952, 1958, 1964, 1970, 1976, 1982, 1988, 1995, + 2001, 2007, 2013, 2019, 2025, 2031, 2037, 2043, 2049, 2055, 2060, 2066, 2072, 2078, 2084, 2090, 2095, 2101, + 2107, 2113, 2118, 2124, 2130, 2135, 2141, 2147, 2152, 2158, 2163, 2169, 2174, 2180, 2185, 2190, 2196, 2201, + 2206, 2212, 2217, 2222, 2227, 2232, 2238, 2243, 2248, 2253, 2258, 2263, 2268, 2273, 2278, 2283, 2287, 2292, + 2297, 2302, 2307, 2312, 2316, 2321, 2326, 2330, 2335, 2340, 2344, 2349, 2354, 2358, 2363, 2367, 2372, 2376, + 2381, 2385, 2390, 2394, 2398, 2403, 2407, 2411, 2416, 2420, 2424, 2429, 2433, 2437, 2441, 2446, 2450, 2454, + 2458, 2462, 2467, 2471, 2475, 2479, 2483, 2487, 2491, 2495, 2499, 2503, 2507, 2511, 2515, 2519, 2523, 2527, + 2531, 2535, 2539, 2543, 2547, 2551, 2555, 2558, 2562, 2566, 2570, 2574, 2578, 2582, 2585, 2589, 2593, 2597, + 2601, 2604, 2608, 2612, 2616, 2619, 2623, 2627, 2631, 2634, 2638, 2642, 2646, 2649, 2653, 2657, 2660, 2664, + 2668, 2671, 2675, 2679, 2683, 2686, 2690, 2694, 2697, 2701, 2705, 2708, 2712, 2716, 2719, 2723, 2727, 2730, + 2734, 2738, 2741, 2745, 2749, 2752, 2756, 2760, 2764, 2768, 2771, 2775, 2779, 2782, 2786, 2789, 2793, 2796, + 2800, 2804, 2807, 2811, 2814, 2818, 2821, 2825, 2828, 2832, 2835, 2839, 2842, 2846, 2849, 2853, 2856, 2860, + 2863, 2867, 2870, 2873, 2877, 2880, 2884, 2887, 2891, 2894, 2897, 2901, 2904, 2908, 2911, 2914, 2918, 2921, + 2924, 2928, 2931, 2934, 2938, 2941, 2944, 2948, 2951, 2954, 2958, 2961, 2964, 2967, 2971, 2974, 2977, 2981, + 2984, 2987, 2990, 2994, 2997, 3000, 3003, 3006, 3010, 3013, 3016, 3019, 3023, 3026, 3029, 3032, 3035, 3038, + 3042, 3045, 3048, 3051, 3054, 3057, 3061, 3064, 3067, 3070, 3073, 3076, 3079, 3082, 3086, 3089, 3092, 3095, + 3098, 3101, 3104, 3107, 3110, 3113, 3116, 3119, 3122, 3125, 3129, 3132, 3135, 3138, 3141, 3144, 3147, 3150, + 3153, 3156, 3159, 3162, 3165, 3168, 3171, 3174, 3177, 3180, 3183, 3185, 3188, 3191, 3194, 3197, 3200, 3203, + 3206, 3209, 3212, 3215, 3218, 3221, 3224, 3227, 3229, 3232, 3235, 3238, 3241, 3244, 3247, 3250, 3252, 3255, + 3258, 3261, 3264, 3267, 3270, 3272, 3275, 3278, 3281, 3284, 3287, 3289, 3292, 3295, 3298, 3301, 3303, 3306, + 3309, 3312, 3315, 3317, 3320, 3323, 3326, 3328, 3331, 3334, 3337, 3339, 3342, 3345, 3348, 3350, 3353, 3356, + 3359, 3361, 3364, 3367, 3370, 3372, 3375, 3378, 3380, 3383, 3386, 3388, 3391, 3394, 3396, 3399, 3402, 3405, + 3407, 3410, 3413, 3415, 3418, 3420, 3423, 3426, 3428, 3431, 3434, 3436, 3439, 3442, 3444, 3447, 3449, 3452, + 3455, 3457, 3460, 3462, 3465, 3468, 3470, 3473, 3475, 3478, 3481, 3483, 3486, 3488, 3491, 3493, 3496, 3498, + 3501, 3504, 3506, 3509, 3511, 3514, 3516, 3519, 3521, 3524, 3526, 3529, 3531, 3534, 3536, 3539, 3541, 3544, + 3546, 3549, 3551, 3554, 3556, 3559, 3561, 3564, 3566, 3569, 3571, 3574, 3576, 3579, 3581, 3584, 3586, 3588, + 3591, 3593, 3596, 3598, 3601, 3603, 3606, 3608, 3610, 3613, 3615, 3618, 3620, 3622, 3625, 3627, 3630, 3632, + 3634, 3637, 3639, 3642, 3644, 3646, 3649, 3651, 3654, 3656, 3658, 3661, 3663, 3665, 3668, 3670, 3673, 3675, + 3677, 3680, 3682, 3684, 3687, 3689, 3691, 3694, 3696, 3698, 3701, 3703, 3705, 3708, 3710, 3712, 3714, 3717, + 3719, 3721, 3724, 3726, 3728, 3731, 3733, 3735, 3737, 3740, 3742, 3744, 3747, 3749, 3751, 3753, 3756, 3758, + 3760, 3762, 3765, 3767, 3769, 3771, 3774, 3776, 3778, 3780, 3783, 3785, 3787, 3789, 3792, 3794, 3796, 3798, + 3801, 3803, 3805, 3807, 3809, 3812, 3814, 3816, 3818, 3820, 3823, 3825, 3827, 3829, 3831, 3834, 3836, 3838, + 3840, 3842, 3844, 3847, 3849, 3851, 3853, 3855, 3857, 3860, 3862, 3864, 3866, 3868, 3870, 3873, 3875, 3877, + 3879, 3881, 3883, 3885, 3888, 3890, 3892, 3894, 3896, 3898, 3900, 3902, 3905, 3907, 3909, 3911, 3913, 3915, + 3917, 3919, 3921, 3924, 3926, 3928, 3930, 3932, 3934, 3936, 3938, 3940, 3942, 3944, 3946, 3949, 3951, 3953, + 3955, 3957, 3959, 3961, 3963, 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 3981, 3984, 3986, 3988, 3990, + 3992, 3994, 3996, 3998, 4000, 4002, 4004, 4006, 4008, 4010, 4012, 4014, 4016, 4018, 4020, 4022, 4024, 4026, + 4028, 4030, 4032, 4034, 4036, 4038, 4040, 4042, 4044, 4046, 4048, 4050, 4052, 4054, 4056, 4058, 4060, 4062, + 4064, 4066, 4068, 4070, 4072, 4074, 4075, 4077, 4079, 4081, 4083, 4085, 4087, 4089, 4091, 4093, 4095, + }, + 3, +}; + +#ifdef CONFIG_OT_ISP_PREGAMMA_SUPPORT +static const ot_isp_pregamma_attr g_cmos_pregamma = { + 0, + { + 0, 12417, 21619, 29902, 37641, 44997, 52063, 58896, 65536, 72012, 78344, 84552, + 90647, 96641, 102544, 108363, 114105, 119775, 125379, 130921, 136406, 141835, 147213, 152542, + 157825, 163065, 168262, 173420, 178540, 183623, 188671, 193686, 198668, 203619, 208541, 213433, + 218298, 223136, 227947, 232734, 237496, 242234, 246949, 251642, 256313, 260962, 265592, 270201, + 274790, 279360, 283912, 288446, 292962, 297460, 301942, 306407, 310855, 315288, 319706, 324108, + 328495, 332868, 337226, 341571, 345901, 350218, 354522, 358813, 363091, 367356, 371609, 375850, + 380079, 384296, 388502, 392696, 396880, 401052, 405213, 409364, 413504, 417634, 421754, 425863, + 429963, 434053, 438134, 442205, 446266, 450319, 454362, 458396, 462422, 466438, 470446, 474446, + 478437, 482420, 486395, 490361, 494320, 498270, 502213, 506148, 510076, 513996, 517908, 521813, + 525711, 529601, 533485, 537361, 541231, 545093, 548949, 552798, 556640, 560475, 564305, 568127, + 571943, 575753, 579557, 583354, 587145, 590930, 594709, 598482, 602249, 606010, 609765, 613515, + 617259, 620997, 624729, 628456, 632178, 635894, 639604, 643309, 647009, 650704, 654393, 658077, + 661756, 665430, 669099, 672763, 676421, 680075, 683724, 687368, 691008, 694642, 698272, 701897, + 705517, 709133, 712744, 716351, 719953, 723550, 727143, 730732, 734316, 737896, 741471, 745043, + 748610, 752172, 755731, 759285, 762835, 766381, 769923, 773461, 776995, 780525, 784050, 787572, + 791090, 794604, 798114, 801620, 805123, 808622, 812116, 815608, 819095, 822579, 826059, 829535, + 833008, 836477, 839942, 843404, 846862, 850317, 853768, 857216, 860661, 864102, 867539, 870973, + 874404, 877831, 881255, 884676, 888093, 891507, 894918, 898326, 901730, 905131, 908529, 911924, + 915316, 918704, 922090, 925472, 928851, 932227, 935600, 938970, 942337, 945701, 949062, 952420, + 955775, 959127, 962477, 965823, 969166, 972507, 975845, 979179, 982511, 985840, 989167, 992490, + 995811, 999129, 1002444, 1005757, 1009067, 1012374, 1015678, 1018980, 1022279, 1025575, 1028869, 1032160, + 1035448, 1038734, 1042017, 1045298, 1048575 + } +}; +#endif + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 190, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 190, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 60, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 17, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }, + { 31, 31, 20, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + { 31, 31, 23, 23, 23, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21 }, + { 31, 31, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25 }, + { 31, 31, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 28, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + { 23, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + { 153, 153, 160, 145, 130, 130, 130, 105, 105, 105, 105, 85, 85, 85, 85, 85 }, + { 172, 167, 190, 170, 145, 145, 145, 120, 120, 120, 120, 100, 100, 100, 100, 100 }, + { 186, 178, 220, 195, 165, 165, 160, 140, 140, 135, 135, 120, 120, 120, 120, 120 }, + { 201, 192, 255, 215, 180, 180, 175, 160, 160, 150, 150, 135, 135, 140, 140, 140 }, + { 217, 207, 275, 230, 200, 200, 185, 175, 175, 160, 160, 150, 150, 160, 160, 160 }, + { 233, 223, 285, 245, 210, 215, 200, 190, 190, 170, 170, 165, 165, 180, 180, 180 }, + { 251, 239, 280, 260, 225, 225, 215, 205, 205, 180, 180, 185, 185, 200, 200, 200 }, + { 269, 255, 275, 265, 240, 240, 230, 220, 220, 190, 190, 200, 200, 210, 210, 210 }, + { 286, 272, 270, 270, 250, 250, 240, 225, 225, 200, 200, 220, 220, 220, 220, 220 }, + { 300, 288, 265, 270, 250, 260, 245, 235, 235, 210, 210, 235, 235, 230, 230, 230 }, + { 308, 299, 260, 265, 250, 270, 255, 245, 245, 220, 220, 245, 245, 230, 230, 230 }, + { 312, 307, 260, 260, 250, 275, 260, 250, 250, 230, 230, 255, 255, 230, 230, 230 }, + { 313, 310, 255, 255, 245, 280, 265, 255, 255, 235, 235, 265, 265, 230, 230, 230 }, + { 311, 311, 250, 250, 240, 285, 270, 255, 255, 240, 240, 275, 275, 230, 230, 230 }, + { 306, 311, 245, 245, 240, 290, 275, 250, 255, 245, 245, 280, 280, 230, 230, 230 }, + { 297, 308, 240, 240, 240, 295, 280, 240, 250, 250, 250, 285, 285, 230, 230, 230 }, + { 285, 301, 235, 235, 235, 295, 280, 235, 250, 250, 255, 290, 290, 230, 230, 230 }, + { 273, 291, 230, 230, 230, 290, 280, 230, 250, 250, 260, 295, 295, 230, 230, 230 }, + { 263, 281, 225, 225, 225, 285, 275, 225, 245, 250, 265, 300, 300, 225, 225, 225 }, + { 255, 271, 225, 220, 220, 275, 270, 225, 245, 250, 270, 300, 300, 220, 220, 220 }, + { 249, 259, 220, 215, 215, 270, 265, 225, 240, 245, 275, 300, 300, 210, 210, 210 }, + { 243, 248, 220, 210, 210, 260, 260, 220, 235, 245, 280, 305, 305, 200, 200, 200 }, + { 234, 238, 215, 205, 205, 255, 255, 220, 230, 240, 280, 305, 305, 190, 190, 190 }, + { 224, 228, 215, 200, 200, 245, 245, 220, 230, 240, 285, 310, 310, 180, 180, 180 }, + { 216, 218, 210, 195, 195, 235, 240, 215, 225, 235, 285, 310, 310, 175, 175, 175 }, + { 208, 208, 200, 190, 190, 230, 235, 215, 220, 230, 285, 305, 305, 170, 170, 170 }, + { 201, 201, 195, 180, 180, 220, 225, 210, 220, 225, 285, 305, 305, 160, 160, 160 }, + { 195, 195, 185, 175, 175, 205, 220, 205, 215, 220, 285, 300, 300, 160, 160, 160 }, + { 188, 188, 175, 170, 170, 195, 210, 195, 210, 215, 280, 300, 300, 150, 150, 150 }, + { 181, 181, 170, 160, 160, 180, 205, 195, 205, 210, 280, 300, 300, 145, 145, 145 }, + { 175, 175, 160, 155, 155, 165, 195, 195, 200, 205, 275, 300, 300, 130, 130, 130 }, + { 171, 171, 150, 150, 150, 150, 150, 150, 195, 200, 270, 300, 300, 115, 115, 115 } + }, + /* motion_edge_strength */ + { + { 195, 195, 195, 195, 195, 195, 400, 440, 500, 475, 475, 475, 475, 475, 475, 475 }, + { 210, 210, 200, 200, 200, 200, 400, 440, 500, 485, 485, 485, 485, 485, 485, 485 }, + { 235, 235, 220, 220, 220, 220, 400, 440, 500, 495, 495, 495, 495, 495, 495, 495 }, + { 260, 260, 230, 230, 230, 230, 400, 440, 500, 500, 500, 500, 500, 500, 500, 500 }, + { 295, 295, 240, 240, 240, 240, 400, 440, 500, 510, 510, 510, 510, 510, 510, 510 }, + { 320, 320, 250, 250, 250, 250, 400, 440, 500, 520, 520, 520, 520, 520, 520, 520 }, + { 340, 340, 260, 260, 260, 260, 420, 460, 540, 530, 530, 530, 530, 530, 530, 530 }, + { 350, 350, 270, 270, 270, 270, 420, 460, 540, 540, 540, 540, 540, 540, 540, 540 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 545, 545, 545, 545, 545, 545, 545 }, + { 360, 360, 280, 280, 280, 280, 420, 460, 540, 550, 550, 550, 550, 550, 550, 550 }, + { 355, 355, 285, 285, 285, 285, 420, 460, 540, 560, 560, 560, 560, 560, 560, 560 }, + { 345, 345, 290, 290, 290, 290, 420, 460, 540, 565, 565, 565, 565, 565, 565, 565 }, + { 335, 335, 290, 290, 290, 290, 420, 460, 540, 570, 570, 570, 570, 570, 570, 570 }, + { 330, 330, 295, 295, 295, 295, 430, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 325, 325, 295, 295, 295, 295, 430, 470, 550, 580, 580, 580, 580, 580, 580, 580 }, + { 320, 320, 295, 295, 295, 295, 440, 470, 550, 575, 575, 575, 575, 575, 575, 575 }, + { 315, 315, 295, 295, 295, 295, 440, 470, 550, 570, 570, 570, 570, 570, 570, 570 }, + { 310, 310, 295, 295, 295, 295, 450, 480, 580, 565, 565, 565, 565, 565, 565, 565 }, + { 305, 305, 295, 295, 295, 295, 460, 500, 580, 560, 560, 560, 560, 560, 560, 560 }, + { 295, 295, 290, 290, 290, 290, 460, 500, 580, 555, 555, 555, 555, 555, 555, 555 }, + { 285, 285, 285, 285, 285, 285, 460, 500, 580, 550, 550, 550, 550, 550, 550, 550 }, + { 280, 280, 280, 280, 280, 280, 460, 500, 580, 540, 540, 540, 540, 540, 540, 540 }, + { 275, 275, 275, 275, 275, 275, 460, 500, 580, 535, 535, 535, 535, 535, 535, 535 }, + { 265, 265, 265, 265, 265, 265, 460, 500, 580, 530, 530, 530, 530, 530, 530, 530 }, + { 250, 250, 250, 250, 250, 250, 460, 500, 580, 520, 520, 520, 520, 520, 520, 520 }, + { 240, 240, 240, 240, 240, 240, 470, 500, 580, 515, 515, 515, 515, 515, 515, 515 }, + { 220, 220, 220, 220, 220, 220, 470, 500, 580, 510, 510, 510, 510, 510, 510, 510 }, + { 200, 200, 200, 200, 200, 200, 470, 500, 580, 500, 500, 500, 500, 500, 500, 500 }, + { 180, 180, 180, 180, 180, 180, 480, 500, 580, 495, 495, 495, 495, 495, 495, 495 }, + { 160, 160, 160, 160, 160, 160, 480, 500, 580, 485, 485, 485, 485, 485, 485, 485 }, + { 140, 140, 140, 140, 140, 140, 480, 500, 580, 480, 480, 480, 480, 480, 480, 480 }, + { 125, 125, 125, 125, 125, 125, 480, 500, 580, 470, 470, 470, 470, 470, 470, 470 } + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 180, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 60, 62, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 8, 8, 7, 7, 7, 6, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + { 9, 9, 8, 8, 7, 7, 7, 6, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 120, 120, 120, 120, 120, 120 }, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 180, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160 }, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 58, 60, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62 }, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + { 12, 16, 20, 24, 24, 24, 26, 28, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 18, 20, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 30, 30, 30, 30, 30, 26, 20, 20, 18, 18, 18, 18, 18, 18, 18, 18 }, + }, +}; + +static const ot_isp_sharpen_attr g_cmos_yuv_sharpen_wdr = { + /* en */ + 1, + /* motion_en */ + 0, + /* motion_threshold0 */ + 2, + /* motion_threshold1 */ + 8, + /* motion_gain0 */ + 0, + /* motion_gain1 */ + 256, + /* skin_umin */ + 100, + /* skin_vmin */ + 135, + /* skin_umax */ + 128, + /* skin_vmax */ + 150, + /* op_type */ + OT_OP_MODE_AUTO, + /* detail_map */ + OT_ISP_SHARPEN_NORMAL, + /* manual para */ + { + /* luma_wgt[OT_ISP_SHARPEN_LUMA_NUM] */ + { + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, + 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 + }, + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* texture_freq */ + 200, + /* edge_freq */ + 128, + /* over_shoot */ + 65, + /* under_shoot */ + 75, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 250, 420, 390, 390, 390, 390, 390, 370, 350, 330, 310, 290, 270, 270, 270, 270, + 270, 270, 266, 260, 244, 230, 230, 230, 230, 230, 230, 210, 190, 190, 170, 150 + }, + /* motion_edge_strength[OT_ISP_SHARPEN_GAIN_NUM] */ + { + 120, 123, 125, 128, 130, 135, 140, 148, 160, 168, 180, 190, 200, 210, 210, 210, + 210, 210, 200, 190, 185, 175, 165, 160, 146, 136, 130, 128, 125, 123, 120, 120 + }, + /* motion_texture_freq */ + 200, + /* motion_edge_freq */ + 128, + /* motion_over_shoot */ + 65, + /* motion_under_shoot */ + 75, + /* u8shoot_sup_str */ + 7, + /* u8shoot_sup_adj */ + 9, + /* detail_ctrl */ + 128, + /* detail_ctrl_threshold */ + 180, + /* edge_filt_strength */ + 50, + /* edge_filt_max_cap */ + 18, + /* r_gain */ + 20, + /* g_gain */ + 32, + /* b_gain */ + 20, + /* skin_gain */ + 25, + /* max_sharp_gain */ + 40, + }, + /* auto para */ + { + /* luma_wgt[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {24, 16, 12, 16, 16, 16, 16, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 17, 12, 17, 17, 17, 17, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {25, 18, 12, 18, 18, 18, 18, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 19, 12, 19, 19, 19, 19, 12, 4, 4, 4, 4, 4, 4, 4, 4 }, + {26, 20, 12, 20, 20, 20, 20, 12, 5, 5, 5, 5, 5, 5, 5, 5 }, + {26, 21, 13, 21, 21, 21, 21, 13, 6, 6, 6, 6, 6, 6, 6, 6 }, + {27, 22, 14, 22, 22, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8 }, + {27, 22, 16, 22, 22, 22, 22, 16, 12, 12, 12, 12, 12, 12, 12, 12 }, + {28, 23, 19, 23, 23, 23, 23, 19, 17, 17, 17, 17, 17, 17, 17, 17 }, + {28, 24, 22, 24, 24, 24, 24, 22, 22, 22, 22, 22, 22, 22, 22, 22 }, + {29, 25, 25, 25, 25, 25, 25, 25, 26, 26, 26, 26, 26, 26, 26, 26 }, + {29, 26, 27, 26, 26, 26, 26, 27, 28, 28, 28, 28, 28, 28, 28, 28 }, + {29, 27, 28, 27, 27, 27, 27, 28, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 27, 30, 27, 27, 27, 27, 30, 30, 30, 30, 30, 30, 30, 30, 30 }, + {30, 28, 31, 28, 28, 28, 28, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 29, 31, 29, 29, 29, 29, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {30, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 30, 31, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }, + {31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 } + }, + + /* texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {140, 140, 140, 48, 48, 61, 61, 61, 61, 61, 61, 29, 0, 0, 0, 0}, + {143, 143, 143, 56, 51, 66, 66, 66, 66, 66, 66, 31, 3, 3, 3, 3}, + {147, 147, 147, 64, 56, 72, 72, 72, 72, 72, 72, 34, 6, 6, 6, 6}, + {150, 150, 150, 73, 62, 80, 80, 80, 80, 80, 80, 38, 10, 10, 10, 10}, + {154, 154, 154, 82, 68, 89, 89, 89, 89, 89, 89, 42, 15, 15, 15, 15}, + {157, 157, 157, 92, 75, 98, 98, 98, 98, 98, 98, 47, 21, 21, 21, 21}, + {160, 160, 160, 101, 82, 105, 105, 105, 105, 105, 105, 52, 27, 27, 27, 27}, + {163, 163, 163, 111, 90, 112, 112, 112, 112, 112, 112, 57, 33, 33, 33, 33}, + {166, 166, 166, 120, 97, 117, 117, 117, 117, 117, 117, 62, 40, 40, 40, 40}, + {168, 168, 168, 128, 104, 122, 122, 122, 122, 122, 122, 66, 49, 49, 49, 49}, + {171, 171, 171, 136, 111, 127, 127, 127, 127, 127, 127, 71, 58, 58, 58, 58}, + {174, 174, 174, 142, 117, 132, 132, 132, 132, 132, 132, 75, 67, 67, 67, 67}, + {176, 176, 176, 148, 122, 136, 136, 136, 136, 136, 136, 78, 77, 77, 77, 77}, + {178, 178, 178, 152, 126, 139, 139, 139, 139, 139, 139, 80, 85, 85, 85, 85}, + {179, 179, 179, 155, 128, 140, 140, 140, 140, 140, 140, 82, 91, 91, 91, 91}, + {179, 179, 179, 156, 129, 141, 141, 141, 141, 141, 141, 83, 95, 95, 95, 95}, + {177, 177, 177, 155, 129, 140, 140, 140, 140, 140, 140, 82, 97, 97, 97, 97}, + {175, 175, 175, 152, 127, 137, 137, 137, 137, 137, 137, 81, 96, 96, 96, 96}, + {173, 173, 173, 148, 124, 134, 134, 134, 134, 134, 134, 78, 95, 95, 95, 95}, + {169, 169, 169, 142, 119, 129, 129, 129, 129, 129, 129, 76, 92, 92, 92, 92}, + {165, 165, 165, 136, 114, 124, 124, 124, 124, 124, 124, 72, 88, 88, 88, 88}, + {161, 161, 161, 128, 109, 118, 118, 118, 118, 118, 118, 68, 84, 84, 84, 84}, + {155, 155, 155, 120, 102, 113, 113, 113, 113, 113, 113, 64, 79, 79, 79, 79}, + {149, 149, 149, 111, 96, 108, 108, 108, 108, 108, 108, 59, 75, 75, 75, 75}, + {142, 142, 142, 102, 89, 103, 103, 103, 103, 103, 103, 55, 70, 70, 70, 70}, + {134, 134, 134, 93, 82, 97, 97, 97, 97, 97, 97, 50, 65, 65, 65, 65}, + {125, 125, 125, 84, 76, 91, 91, 91, 91, 91, 91, 45, 58, 58, 58, 58}, + {115, 115, 115, 76, 70, 85, 85, 85, 85, 85, 85, 41, 52, 52, 52, 52}, + {105, 105, 105, 68, 64, 80, 80, 80, 80, 80, 80, 37, 45, 45, 45, 45}, + { 95, 95, 95, 61, 59, 75, 75, 75, 75, 75, 75, 34, 39, 39, 39, 39}, + { 85, 85, 85, 56, 55, 70, 70, 70, 70, 70, 70, 31, 34, 34, 34, 34}, + { 75, 75, 75, 52, 52, 67, 67, 67, 67, 67, 67, 29, 31, 31, 31, 31} + }, + /* edge_strength */ + { + { 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, 72}, + { 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77, 77}, + { 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83}, + { 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91}, + { 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, + {109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109}, + {119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119, 119}, + {129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129}, + {139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, 139}, + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, 158}, + {166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166, 166}, + {173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181, 181}, + {183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183, 183}, + {182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, 182}, + {179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179, 179}, + {174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, 174}, + {168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168, 168}, + {160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + {152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152, 152}, + {143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143, 143}, + {134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134, 134}, + {124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124, 124}, + {114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, 114}, + {105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105, 105}, + { 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96, 96}, + { 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, 88}, + { 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81, 81}, + { 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, 75}, + { 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71, 71} + }, + /* texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 240, 220, 180, 180, 180, 160, 160, 150, 130, 100, 80, 80, 80, 80, 80, 80 }, + /* edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 100, 100, 100, 100, 100, 110, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100 }, + /* over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 40, 40, 40, 40, 36, 36}, + /* under_shoot[OT_ISP_AUTO_ISO_NUM] */ + {60, 60, 60, 60, 60, 60, 60, 60, 50, 50, 40, 40, 40, 40, 40, 40 }, + /* motion_texture_strength[OT_ISP_SHARPEN_GAIN_NUM][OT_ISP_AUTO_ISO_NUM] */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150}, + }, + /* motion_edge_strength */ + { + {149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149, 149}, + {154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, 170}, + {180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180, 180}, + {190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, 190}, + {202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, 202}, + {213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, 213}, + {224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224, 224}, + {235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235, 235}, + {246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246, 246}, + {255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}, + {262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262, 262}, + {268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268, 268}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273, 273}, + {272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272, 272}, + {269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269, 269}, + {264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, 264}, + {257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257, 257}, + {249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249, 249}, + {240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240, 240}, + {230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230}, + {219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219, 219}, + {209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209, 209}, + {198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198, 198}, + {188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188, 188}, + {178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178, 178}, + {169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169}, + {161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, 161}, + {155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155, 155}, + {150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150, 150} + }, + /* motion_texture_freq[OT_ISP_AUTO_ISO_NUM] */ + { 200, 190, 190, 170, 170, 170, 160, 140, 128, 128, 128, 100, 100, 100, 100, 100 }, + /* motion_edge_freq[OT_ISP_AUTO_ISO_NUM] */ + { 128, 100, 100, 100, 100, 100, 100, 100, 100, 100, 96, 96, 96, 96, 96, 96 }, + /* motion_over_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 56, 52, 50, 50, 30, 10, 10, 10, 10, 10 }, + /* motion_under_shoot[OT_ISP_AUTO_ISO_NUM] */ + { 65, 65, 62, 64, 64, 64, 54, 50, 50, 30, 20, 20, 15, 15, 15, 15 }, + /* shoot_sup_strength[OT_ISP_AUTO_ISO_NUM] */ + { 6, 6, 6, 6, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 }, + /* shoot_sup_adj[OT_ISP_AUTO_ISO_NUM] */ + {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8}, + /* detail_ctrl[OT_ISP_AUTO_ISO_NUM] */ + {128, 128, 128, 128, 128, 128, 128, 120, 115, 110, 110, 110, 103, 100, 100, 100}, + /* detail_ctrl_threshold[OT_ISP_AUTO_ISO_NUM] */ + { 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, 160}, + /* edge_filt_strength[OT_ISP_AUTO_ISO_NUM] */ + { 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* edge_filt_max_cap */ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18 }, + /* r_gain[OT_ISP_AUTO_ISO_NUM] */ + {31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* g_gain[OT_ISP_AUTO_ISO_NUM] */ + { 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 }, + /* b_gain[OT_ISP_AUTO_ISO_NUM] */ + { 31, 31, 24, 24, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* skin_gain[OT_ISP_AUTO_ISO_NUM] */ + { 25, 25, 20, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, + /* max_sharp_gain[OT_ISP_AUTO_ISO_NUM] */ + { 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40 }, + }, +}; + +static ot_isp_awb_ccm g_awb_ccm = { + /* the number of CCM matrixes */ + 4, + { + { + /* color temperature */ + 6074, + /* CCM matrix */ + { 0x01D2, 0x80C8, 0x800A, 0x8091, 0x0226, 0x8095, 0x8001, 0x80F6, 0x01F7 }, + }, + { + /* color temperature */ + 5086, + /* CCM matrix */ + { 0x01D6, 0x80D0, 0x8006, 0x809D, 0x0229, 0x808C, 0x0003, 0x8116, 0x0213 }, + }, + { + /* color temperature */ + 3759, + /* CCM matrix */ + { 0x01F8, 0x80FD, 0x0005, 0x80AA, 0x0214, 0x806A, 0x0010, 0x816F, 0x025F }, + }, + { + /* color temperature */ + 2364, + /* CCM matrix */ + { 0x0236, 0x8131, 0x8005, 0x80C4, 0x01D3, 0x800F, 0x8005, 0x8318, 0x041D }, + }, + { + /* color temperature */ + 2100, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1600, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + { + /* color temperature */ + 1400, + /* CCM matrix */ + { 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 }, + }, + }, +}; + + +static ot_isp_awb_agc_table g_awb_agc_table = { + /* bvalid */ + 1, + + /* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */ + /* saturation */ + { 128, 118, 116, 112, 108, 102, 90, 78, 68, 64, 56, 56, 56, 56, 56, 56 } +}; + + +static const ot_isp_wdr_fs_attr g_cmos_wdr = { + /* ot_isp_wdr_merge_mode */ + OT_ISP_MERGE_FUSION_MODE, + + /* ot_isp_wdr_combine_attr */ + { + /* motion_comp */ + 0, + + /* short_thr */ + 4032, + + /* long_thr */ + 3008, + + /* force_long */ + 1, + + /* force_long_low_threshold */ + 500, + + /* force_long_hig_threshold */ + 700, + + /* ot_isp_fswdr_mdt_attr */ + { + /* short_expo_chk */ + 0, + + /* short_check_thd */ + 8, + + /* md_ref_flicker */ + 1, + + /* mdt_still_thd */ + 20, + + /* mdt_full_threshold */ + 254, + + /* mdt_long_blend */ + 0, + + /* ot_op_mode motion_comp */ + OT_OP_MODE_AUTO, + + /* ot_isp_fswdr_manual_attr */ + { + /* md_thr_low_gain */ + 64, 64 + }, + + /* ot_isp_fswdr_auto_attr */ + { + /* md_thr_low_gain[10][16] */ + { + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 24, 24, 24, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 45, 64, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 } + }, + + /* md_thr_hig_gain[10][16] */ + { + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 45, 45, 45, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 64, 64, 64, 64, 96, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 128, 128, 128, 128, 128, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255 }, + }, + }, + }, + + }, + + /* ot_isp_fusion_attr */ + { + /* fusion blend en */ + 0, + /* fusion_blend_wgt */ + 4, + /* fusion_threshold */ + { 3855, 3000, 3000, 3000 }, + /* fusion_force_gray_en */ + 1, + /* fusion_force_blend_threshold */ + 14, + }, + +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze = { + /* enable */ + 0, + /* user_lut_enable */ + 0, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* manual_strength */ + { + 128 + }, + /* auto_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_dehaze_attr g_cmos_dehaze_wdr = { + /* enable */ + 1, + /* user_lut_enable */ + 1, + /* dehaze_lut */ + { + 0, 9, 13, 17, 21, 25, 29, 33, 37, 42, 46, 50, 54, 58, 62, 67, 71, 75, 79, 83, 87, 91, + 95, 99, 102, 106, 110, 114, 117, 121, 124, 128, 131, 134, 137, 141, 144, 147, 150, + 153, 156, 159, 162, 165, 168, 170, 173, 176, 178, 181, 184, 186, 189, 191, 193, 196, + 198, 200, 203, 205, 207, 209, 211, 213, 215, 217, 219, 221, 222, 224, 226, 228, 229, + 231, 232, 234, 235, 237, 238, 240, 241, 242, 243, 244, 246, 247, 248, 249, 249, 250, + 251, 252, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 254, 254, 253, 253, 252, 251, 251, 250, 249, + 249, 248, 247, 247, 246, 245, 244, 244, 243, 242, 241, 240, 239, 238, 237, 236, 235, + 233, 232, 231, 230, 229, 227, 226, 225, 223, 222, 221, 219, 218, 216, 215, 213, 212, + 210, 209, 208, 206, 205, 203, 201, 200, 198, 197, 195, 193, 192, 190, 188, 187, 185, + 183, 181, 180, 178, 176, 174, 172, 170, 169, 167, 165, 163, 161, 159, 157, 155, 153, + 151, 149, 147, 145, 143, 140, 138, 136, 134, 132, 130, 128, 125, 123, 121, 119, 116, + 114, 112, 110, 107, 105, 103, 100, 98, 96, 93, 91, 89, 86, 84, 81, 79, 77, 74, 72, 69, + 67, 64, 62, 59, 57, 54, 52, 49, 47, 44, 42, 39, 37, 34, 31, 29, 26, 24, 21, 18, 16, 13, 11, + 8, 5, 3, 0 + }, + /* op_type */ + 0, + /* auto_strength */ + { + 100 + }, + /* manual_strength */ + { + 128 + }, + /* tmprflt_incr_coef */ + 8, + /* tmprflt_decr_coef */ + 64, +}; + +static const ot_isp_drc_attr g_cmos_drc = { + /* enable */ + 0, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +static const ot_isp_drc_attr g_cmos_drc_wdr = { + /* enable */ + 1, + /* curve_select */ + OT_ISP_DRC_CURVE_ASYMMETRY, + /* purple_reduction_strength */ + 35, + /* bright_gain_limit */ + 10, + /* bright_gain_limit_step */ + 8, + /* dark_gain_limit_luma */ + 0, + /* dark_gain_limit_chroma */ + 0, + /* contrast_ctrl */ + 8, + /* rim_reduction_strength */ + 32, + /* rim_reduction_threshold */ + 30, + /* color_correction_lut[OT_ISP_DRC_CC_NODE_NUM] */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, + /* tone_mapping_value[OT_ISP_DRC_TM_NODE_NUM] */ + {8, 8, 16, 24, 31, 39, 48, 56, 65, 75, 85, 95, 106, 118, 130, 143, + 156, 170, 185, 201, 218, 235, 254, 274, 294, 316, 339, 364, 390, 417, 446, 477, + 509, 543, 579, 617, 658, 701, 746, 794, 844, 898, 955, 1015, 1078, 1145, 1216, 1291, + 1370, 1454, 1543, 1637, 1736, 1841, 1952, 2069, 2194, 2325, 2465, 2612, 2767, 2932, 3106, 3290, + 3485, 3691, 3909, 4140, 4384, 4641, 4914, 5202, 5507, 5830, 6171, 6531, 6913, 7316, 7742, 8193, + 8669, 9173, 9705, 10268, 10863, 11492, 12145, 12808, 13483, 14171, 14872, 15587, 16319, 17069, 17840, 18635, + 19458, 19881, 20313, 20754, 21204, 21661, 22122, 22586, 23053, 23525, 24000, 24480, 24965, 25455, 25950, 26451, + 26959, 27473, 27995, 28524, 29062, 29609, 30165, 30732, 31309, 31899, 32501, 33116, 33746, 34391, 35043, 35706, + 36381, 37066, 37763, 38472, 39192, 39925, 40671, 41429, 42201, 42591, 42986, 43383, 43784, 44189, 44597, 45008, + 45424, 45842, 46265, 46691, 47121, 47555, 47993, 48434, 48880, 49329, 49783, 50241, 50703, 51169, 51639, 52113, + 52592, 53075, 53564, 54056, 54552, 55054, 55560, 56071, 56586, 56846, 57107, 57369, 57632, 57896, 58162, 58429, + 58697, 58967, 59238, 59510, 59783, 60057, 60333, 60611, 60889, 61169, 61451, 61733, 62017, 62303, 62589, 62877, + 63167, 63458, 63750, 64044, 64340, 64636, 64934, 65234}, + /* spatial_filter_coef */ + 1, + /* range_filter_coef */ + 2, + /* detail_adjust_coef */ + 8, + /* local_mixing_bright[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* local_mixing_dark[OT_ISP_DRC_LMIX_NODE_NUM] */ + {15, 17, 18, 20, 22, 23, 25, 26, 28, 29, 31, 32, 34, 36, 37, 39, 40, 42, + 43, 45, 46, 48, 49, 51, 53, 54, 56, 57, 59, 61, 62, 63, 64}, + /* high_saturation_color_ctrl */ + 15, + /* global_color_ctrl */ + 0, + /* shoot_reduction_en */ + 1, + /* op_type */ + OT_OP_MODE_AUTO, + /* manual_attr */ + { + /* manual_strength */ + 1023, + }, + /* auto_attr */ + { + /* auto_strength */ + 512, + /* auto_strength_max */ + 1023, + /* auto_strength_min */ + 512, + }, + /* asymmetry_curve */ + { + /* asymmetry */ + 6, + /* second_pole */ + 200, + /* stretch */ + 40, + /* compress */ + 170 + } +}; + +#ifdef CONFIG_OT_ISP_CA_SUPPORT +static const ot_isp_ca_attr g_cmos_ca = { + /* CA */ + 1, + 0, + { + { + 36, 58, 81, 96, 111, 123, 136, 147, 158, 170, 182, 194, 207, 217, 228, 243, 259, 274, + 290, 303, 317, 331, 345, 357, 369, 382, 396, 408, 420, 432, 444, 456, 468, 480, 492, 503, + 515, 524, 534, 545, 556, 565, 574, 585, 597, 605, 614, 623, 632, 640, 648, 657, 666, 673, + 681, 689, 697, 703, 709, 716, 723, 728, 734, 741, 748, 753, 758, 764, 771, 775, 780, 784, + 788, 794, 800, 804, 808, 811, 815, 818, 822, 825, 829, 833, 837, 839, 841, 844, 848, 851, + 854, 856, 858, 861, 864, 866, 868, 869, 871, 874, 878, 879, 881, 883, 885, 887, 890, 891, + 893, 895, 897, 898, 900, 901, 903, 904, 906, 907, 909, 910, 912, 913, 915, 916, 918, 919, + 921, 922, 924, 925, 926, 927, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 941, 942, + 943, 944, 945, 946, 947, 948, 949, 950, 951, 951, 952, 953, 954, 955, 956, 957, 958, 959, + 961, 961, 962, 963, 964, 965, 966, 967, 968, 968, 969, 969, 970, 970, 971, 972, 973, 973, + 974, 975, 976, 976, 977, 978, 979, 979, 980, 980, 981, 982, 983, 983, 984, 984, 985, 985, + 986, 987, 988, 988, 989, 989, 990, 990, 991, 991, 992, 992, 993, 994, 995, 995, 996, 996, + 997, 997, 998, 998, 999, 999, 1000, 1000, 1001, 1002, 1004, 1004, 1005, 1005, 1006, 1006, 1007, 1008, + 1009, 1009, 1010, 1010, 1011, 1011, 1012, 1013, 1014, 1015, 1016, 1016, 1017, 1018, 1019, 1019, 1020, 1021, + 1022, 1023, 1024, 1024 + }, + /* ISO */ + { 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1000, 950, 900, 900, 800, 800, 800, 800, 800 }, + { + 811, 811, 812, 812, 812, 812, 812, 812, 812, 812, 812, 811, 811, 811, 810, 810, + 810, 809, 809, 809, 808, 808, 807, 807, 807, 806, 806, 806, 805, 805, 805, 804, + 804, 804, 804, 804, 804, 804, 804, 804, 804, 804, 805, 805, 806, 806, 807, 807, + 808, 809, 810, 811, 813, 814, 815, 817, 819, 820, 822, 824, 827, 829, 831, 834, + 837, 840, 843, 846, 850, 853, 857, 861, 865, 870, 874, 879, 883, 888, 893, 898, + 903, 908, 914, 919, 925, 930, 936, 942, 947, 953, 959, 965, 971, 977, 983, 989, + 995, 1001, 1007, 1012, 1018, 1024, 1030, 1036, 1042, 1048, 1053, 1059, 1065, 1070, 1075, 1081, + 1086, 1091, 1096, 1101, 1106, 1111, 1115, 1120, 1124, 1128, 1132, 1136, 1139, 1143, 1146, 1149, + 1152, 1155, 1158, 1161, 1163, 1166, 1168, 1170, 1172, 1174, 1176, 1178, 1180, 1182, 1183, 1185, + 1186, 1188, 1189, 1190, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1200, 1201, 1202, + 1202, 1203, 1204, 1204, 1205, 1205, 1206, 1206, 1207, 1207, 1208, 1208, 1209, 1209, 1210, 1210, + 1211, 1211, 1212, 1212, 1213, 1214, 1214, 1215, 1215, 1216, 1217, 1218, 1218, 1219, 1220, 1221, + 1222, 1223, 1224, 1225, 1226, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1232, 1233, 1234, 1235, + 1236, 1236, 1237, 1238, 1239, 1240, 1240, 1241, 1242, 1243, 1243, 1244, 1245, 1245, 1246, 1247, + 1248, 1248, 1249, 1250, 1250, 1251, 1252, 1253, 1253, 1254, 1255, 1255, 1256, 1257, 1258, 1258, + 1259, 1260, 1260, 1261, 1262, 1263, 1263, 1264, 1265, 1265, 1266, 1267, 1268, 1268, 1269, 1270 + }, + }, + { + { + 56, 58, 60, 62, 64, 66, 68, 69, 71, 72, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, + 88, 89, 91, 93, 94, 96, 98, 99, 101, 102, 104, 105, 106, 108, 109, 110, 111, 112, 113, 115, 116, + 117, 118, 119, 119, 120, 121, 122, 123, 124, 125, 125, 126, 127, 128, 128, 129, 130, 131, 131, 132, 133, + 134, 135, 136, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 149, 150, 151, 152, 153, 155, 156, + 157, 158, 159, 161, 162, 163, 164, 165, 166, 167, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, + 180, 181, 182, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 193, 194, 195, 196, 197, 197, 198, 198, + 198, 199, 199, 198, 198, 198, 198, 197, 196, 196, 195, 194, 193, 192, 191, 190, 189, 187, 186, 185, 184, + 183, 181, 180, 179, 178, 177, 175, 174, 173, 172, 170, 169, 168, 167, 165, 164, 163, 161, 160, 159, 157, + 156, 155, 153, 152, 151, 149, 148, 146, 145, 144, 142, 141, 139, 138, 136, 135, 133, 132, 130, 129, 127, + 126, 124, 123, 121, 119, 118, 116, 115, 114, 113, 111, 110, 110, 109, 108, 108, 108, 108, 108, 109, 110, + 111, 112, 113, 114, 115, 116, 118, 119, 121, 122, 124, 125, 127, 128, 130, 131, 133, 134, 136, 137, 139, + 140, 142, 143, 145, 146, 148, 149, 151, 152, 154, 155, 157, 158, 160, 161, 163, 164, 166, 167, 169, 170, + 172, 173, 175, 176 + }, + { + 232, 228, 225, 222, 219, 216, 214, 211, 208, 205, 202, 200, 197, 194, 192, 189, 186, 184, 181, 179, 176, + 174, 171, 169, 166, 163, 161, 158, 156, 153, 151, 148, 146, 143, 141, 139, 136, 134, 132, 130, 128, 125, + 123, 121, 119, 117, 115, 112, 110, 108, 106, 104, 101, 99, 97, 95, 92, 90, 88, 86, 83, 81, 79, + 77, 75, 73, 71, 69, 67, 65, 64, 62, 61, 60, 59, 58, 57, 56, 55, 55, 54, 54, 54, 53, + 53, 52, 52, 52, 51, 51, 50, 50, 50, 49, 49, 49, 48, 48, 48, 47, 47, 47, 46, 46, 46, + 45, 45, 45, 44, 44, 44, 43, 43, 43, 42, 42, 42, 42, 41, 41, 41, 41, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 40, 41, 41, 41, 41, 42, 42, 42, 43, 43, 44, 44, 44, 45, + 45, 46, 46, 46, 47, 47, 48, 48, 49, 49, 49, 50, 50, 51, 51, 52, 52, 53, 53, 54, 54, + 55, 55, 56, 56, 57, 57, 58, 58, 59, 60, 60, 61, 61, 62, 62, 63, 64, 64, 65, 66, 67, + 67, 68, 69, 70, 71, 72, 73, 75, 76, 78, 79, 81, 82, 84, 86, 87, 89, 91, 92, 94, 96, + 97, 99, 100, 102, 103, 105, 106, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 124, 125, 127, + 129, 130, 132, 133, 135, 136, 138, 139, 141, 143, 144, 146, 147, 149, 151, 152, 154, 155, 157, 159, 160, + 162, 164, 166, 167 + }, + { + 92, 91, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 75, 74, 73, 72, + 72, 72, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 85, 86, 87, 87, 88, 88, + 88, 88, 89, 89, 89, 89, 89, 89, 88, 88, 88, 88, 87, 87, 87, 87, 87, 86, 86, 86, 87, + 87, 87, 88, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, + 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 147, 148, 149, 150, 151, 152, + 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 171, 172, + 172, 173, 174, 175, 176, 176, 177, 178, 179, 180, 181, 181, 182, 183, 184, 185, 185, 186, 187, 188, 189, + 190, 190, 191, 192, 193, 194, 194, 195, 196, 197, 198, 199, 200, 200, 201, 202, 203, 204, 205, 206, 207, + 208, 208, 209, 210, 211, 212, 213, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 219, 219, 219, 219, + 219, 218, 218, 217, 216, 215, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, + 200, 199, 198, 197, 196, 195, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, + 180, 179, 178, 176 + }, + }, +}; +#endif + +static const ot_isp_cmos_lsc g_cmos_lsc = { + /* cmos_lsc_attr */ + { + /* en */ + 1, + /* mesh_strength */ + 4096, + /* blend_ratio */ + 256, + }, + /* cmos_lsc_lut */ + { + /* mesh_scale */ + 1, + /* x_grid_width */ + {60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60}, + /* y_grid_width */ + {33, 33, 33, 33, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34}, + /* lsc_gain_lut */ + { + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 269, 280, 291, 304, 317, 336, 357, 381, 410, 443, + 481, 521, 565, 574, 533, 489, 450, 416, 388, 366, 344, 325, 310, 296, 285, 275, 266, + 260, 257, 257, 258, 259, 261, 268, 278, 290, 302, 317, 335, 356, 381, 407, 439, 477, + 519, 563, 571, 533, 486, 448, 416, 389, 365, 344, 324, 309, 295, 284, 274, 266, 259, + 256, 256, 257, 259, 261, 268, 278, 290, 302, 316, 334, 356, 381, 408, 438, 474, 518, + 561, 571, 533, 486, 449, 416, 388, 366, 344, 325, 309, 296, 285, 274, 266, 259, 256, + 256, 256, 259, 261, 268, 279, 289, 302, 317, 334, 355, 380, 408, 437, 473, 516, 559, + 574, 531, 488, 451, 419, 389, 366, 344, 326, 309, 297, 285, 275, 266, 260, 256, 256, + 256, 259, 262, 269, 280, 291, 303, 317, 336, 356, 381, 408, 438, 474, 518, 559, 574, + 533, 489, 452, 419, 393, 366, 345, 327, 311, 298, 287, 277, 267, 261, 256, 256, 256, + 259, 264, 272, 281, 291, 304, 318, 338, 357, 381, 409, 439, 475, 519, 561, 584, 536, + 491, 454, 424, 394, 369, 347, 330, 313, 299, 288, 279, 269, 263, 258, 257, 257, 261, + 266, 274, 283, 293, 306, 322, 338, 359, 383, 409, 443, 478, 521, 565, 586, 541, 496, + 460, 425, 397, 372, 350, 332, 316, 304, 291, 282, 273, 266, 262, 261, 261, 263, 268, + 276, 285, 297, 309, 324, 342, 361, 386, 412, 445, 484, 526, 571, 593, 545, 504, 464, + 429, 400, 376, 355, 336, 319, 306, 295, 284, 275, 271, 266, 263, 266, 267, 273, 280, + 289, 300, 314, 329, 345, 366, 389, 417, 450, 489, 533, 574, 597, 557, 507, 467, 434, + 404, 381, 359, 338, 325, 310, 298, 289, 281, 274, 269, 269, 269, 273, 276, 283, 292, + 304, 317, 332, 348, 371, 395, 422, 455, 495, 538, 584, 608, 563, 515, 473, 438, 412, + 385, 365, 345, 328, 315, 304, 295, 285, 280, 275, 274, 274, 277, 281, 288, 298, 309, + 322, 336, 355, 375, 399, 429, 462, 499, 545, 588, 621, 571, 521, 481, 446, 417, 391, + 370, 350, 335, 322, 308, 299, 290, 284, 282, 280, 280, 283, 287, 292, 302, 313, 325, + 342, 359, 381, 406, 434, 469, 510, 550, 595, 630, 582, 533, 489, 452, 425, 398, 376, + 357, 340, 327, 315, 305, 298, 291, 288, 285, 285, 288, 293, 299, 308, 319, 332, 347, + 366, 387, 413, 443, 474, 515, 561, 603, 645, 597, 545, 504, 464, 433, 404, 383, 364, + 348, 334, 323, 311, 304, 298, 294, 291, 292, 296, 299, 306, 315, 325, 338, 355, 372, + 395, 419, 451, 486, 523, 571, 619, 660, 608, 557, 513, 473, 444, 415, 394, 373, 357, + 342, 329, 319, 312, 305, 301, 299, 299, 303, 306, 313, 322, 334, 346, 361, 381, 403, + 428, 460, 495, 534, 586, 628, 676, 626, 571, 528, 486, 454, 426, 401, 381, 363, 349, + 336, 327, 318, 313, 309, 307, 306, 309, 314, 320, 330, 343, 355, 371, 389, 413, 438, + 469, 505, 546, 595, 642, 701, 642, 588, 539, 499, 466, 436, 410, 393, 375, 359, 346, + 336, 327, 322, 317, 316, 316, 318, 323, 329, 338, 350, 363, 381, 400, 424, 450, 481, + 518, 561, 610, 663, 722, 663, 603, 559, 515, 478, 450, 425, 402, 385, 370, 356, 345, + 337, 330, 327, 325, 325, 327, 333, 338, 348, 360, 373, 389, 411, 434, 462, 493, 533, + 576, 630, 681, 748, 681, 623, 572, 531, 492, 464, 437, 414, 396, 380, 366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 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434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 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372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + { + /* r_gain: */ + { + 745, 673, 608, 561, 519, 484, 452, 428, 408, 387, 371, 357, 347, 338, 334, 328, 328, + 328, 332, 337, 348, 356, 367, 382, 399, 425, 449, 479, 515, 557, 605, 665, 719, 716, + 660, 599, 550, 508, 474, 446, 420, 399, 380, 363, 350, 342, 333, 326, 323, 322, 322, + 325, 332, 338, 349, 360, 374, 392, 414, 439, 470, 505, 545, 595, 650, 704, 701, 640, + 580, 536, 495, 464, 433, 409, 388, 370, 355, 343, 333, 324, 317, 313, 312, 312, 317, + 322, 329, 340, 350, 366, 382, 403, 429, 458, 491, 533, 578, 630, 684, 676, 626, 569, + 521, 485, 451, 424, 400, 380, 361, 345, 334, 324, 316, 309, 306, 304, 305, 307, 313, + 320, 332, 340, 356, 373, 395, 417, 448, 478, 518, 563, 614, 668, 663, 608, 557, 510, + 473, 440, 412, 389, 371, 352, 338, 326, 316, 307, 301, 298, 296, 296, 298, 305, 311, + 322, 332, 347, 363, 384, 410, 436, 467, 508, 546, 599, 647, 647, 595, 541, 498, 465, + 430, 403, 381, 362, 346, 332, 319, 308, 300, 294, 290, 288, 289, 290, 296, 302, 313, + 325, 339, 356, 375, 398, 427, 456, 493, 536, 588, 640, 633, 580, 533, 488, 452, 424, + 397, 374, 355, 338, 324, 313, 301, 295, 288, 283, 281, 281, 283, 288, 296, 305, 317, + 332, 348, 368, 392, 417, 449, 485, 524, 574, 630, 619, 567, 519, 482, 446, 415, 389, + 368, 348, 333, 317, 307, 297, 288, 281, 276, 275, 274, 277, 282, 289, 299, 310, 325, + 342, 361, 383, 410, 439, 474, 515, 565, 621, 608, 561, 513, 471, 438, 409, 384, 362, + 345, 327, 313, 301, 291, 283, 276, 271, 269, 268, 270, 276, 284, 293, 305, 320, 336, + 356, 377, 402, 431, 467, 507, 552, 605, 597, 552, 507, 466, 433, 403, 379, 357, 339, + 323, 308, 297, 287, 279, 272, 267, 264, 264, 266, 271, 281, 288, 300, 315, 331, 349, + 371, 397, 426, 462, 499, 545, 597, 591, 543, 498, 461, 428, 400, 373, 352, 336, 318, + 305, 293, 283, 275, 268, 263, 261, 261, 262, 268, 275, 285, 296, 310, 327, 345, 368, + 393, 420, 455, 492, 539, 591, 584, 539, 493, 456, 425, 396, 371, 350, 330, 315, 302, + 290, 280, 272, 264, 261, 259, 260, 261, 265, 273, 283, 295, 308, 323, 343, 363, 389, + 416, 450, 488, 533, 578, 582, 536, 489, 452, 422, 394, 368, 348, 328, 313, 299, 287, + 277, 268, 262, 259, 259, 259, 260, 263, 269, 281, 291, 305, 320, 338, 359, 384, 413, + 446, 485, 528, 571, 574, 534, 489, 451, 419, 392, 367, 345, 327, 313, 298, 285, 276, + 267, 261, 258, 257, 257, 260, 262, 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366, 356, 347, + 340, 337, 335, 335, 338, 343, 350, 359, 370, 384, 401, 421, 446, 473, 508, 546, 591, + 645, 707, 762, 701, 638, 586, 536, 504, 470, 446, 423, 402, 385, 372, 362, 353, 348, + 343, 340, 341, 345, 350, 356, 366, 378, 391, 410, 429, 454, 482, 516, 557, 601, 663, + 716, + }, + + /* gr_gain: */ + { + 702, 643, 590, 540, 499, 468, 437, 414, 394, 376, 361, 348, 339, 331, 324, 321, 320, + 321, 326, 329, 337, 348, 357, 371, 389, 411, 434, 463, 496, 537, 582, 637, 695, 684, + 633, 576, 529, 491, 459, 430, 407, 388, 370, 355, 342, 333, 324, 318, 316, 313, 315, + 318, 323, 330, 341, 349, 363, 381, 403, 426, 454, 486, 526, 572, 623, 676, 668, 615, + 560, 515, 479, 448, 418, 397, 378, 361, 346, 334, 324, 317, 311, 307, 306, 306, 309, + 316, 322, 331, 342, 355, 372, 393, 415, 443, 474, 511, 557, 607, 660, 652, 599, 546, + 502, 468, 436, 410, 388, 370, 352, 337, 327, 317, 308, 303, 300, 297, 298, 301, 306, + 313, 323, 333, 347, 363, 382, 405, 432, 461, 498, 542, 593, 642, 635, 583, 536, 493, + 457, 426, 401, 379, 362, 344, 331, 319, 310, 302, 295, 292, 290, 290, 292, 298, 306, + 313, 324, 337, 354, 373, 396, 422, 451, 487, 530, 578, 629, 620, 572, 523, 483, 448, + 418, 394, 371, 354, 337, 324, 313, 303, 296, 290, 285, 283, 283, 286, 291, 297, 306, + 317, 331, 347, 365, 387, 414, 443, 478, 518, 565, 616, 608, 560, 512, 474, 441, 411, + 386, 364, 348, 331, 318, 307, 297, 290, 284, 280, 276, 277, 279, 283, 291, 300, 312, + 324, 341, 358, 381, 405, 434, 468, 509, 556, 608, 595, 552, 506, 467, 434, 405, 380, + 359, 342, 327, 313, 302, 292, 285, 278, 273, 270, 270, 273, 278, 285, 295, 306, 318, + 334, 353, 373, 398, 427, 460, 499, 544, 599, 588, 542, 497, 459, 426, 398, 375, 355, + 337, 322, 309, 297, 288, 280, 273, 269, 266, 265, 268, 273, 280, 289, 300, 313, 329, + 348, 369, 393, 419, 454, 493, 537, 590, 577, 536, 492, 454, 422, 394, 371, 350, 333, + 317, 305, 294, 284, 276, 269, 265, 261, 261, 264, 268, 276, 285, 296, 310, 324, 343, + 364, 387, 414, 447, 485, 529, 583, 572, 527, 485, 448, 417, 389, 365, 347, 329, 313, + 301, 290, 281, 272, 266, 261, 259, 258, 260, 265, 272, 282, 292, 306, 321, 339, 359, + 382, 411, 441, 479, 523, 571, 567, 524, 482, 446, 415, 386, 363, 343, 326, 311, 298, + 287, 277, 269, 262, 259, 257, 257, 258, 262, 269, 279, 291, 302, 318, 335, 356, 379, + 406, 436, 474, 517, 556, 563, 521, 479, 443, 412, 385, 362, 342, 323, 308, 295, 285, + 276, 267, 261, 257, 257, 256, 259, 260, 268, 277, 289, 301, 316, 333, 352, 377, 404, + 433, 470, 511, 552, 560, 517, 478, 443, 409, 384, 361, 340, 321, 307, 295, 283, 273, + 265, 260, 256, 256, 256, 257, 260, 267, 276, 287, 299, 315, 330, 350, 374, 402, 431, + 467, 508, 549, 557, 516, 475, 441, 408, 383, 359, 339, 321, 306, 292, 282, 273, 265, + 259, 256, 256, 256, 257, 260, 266, 276, 287, 299, 312, 329, 350, 372, 398, 428, 465, + 505, 544, 557, 516, 474, 439, 408, 382, 359, 339, 321, 305, 292, 282, 272, 264, 258, + 256, 256, 256, 258, 260, 267, 276, 286, 298, 312, 329, 349, 372, 398, 428, 463, 505, + 542, 558, 515, 477, 439, 408, 381, 360, 338, 321, 306, 293, 282, 272, 264, 258, 256, + 256, 256, 257, 260, 267, 276, 287, 298, 312, 329, 348, 371, 398, 426, 462, 502, 541, + 558, 516, 478, 442, 411, 382, 359, 339, 323, 307, 294, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 288, 300, 313, 330, 349, 371, 397, 427, 462, 505, 542, 559, + 520, 479, 443, 412, 384, 361, 340, 323, 308, 295, 285, 275, 267, 260, 256, 256, 256, + 258, 262, 269, 279, 289, 301, 315, 333, 351, 373, 398, 428, 466, 505, 543, 566, 521, + 480, 445, 414, 387, 363, 342, 325, 311, 296, 286, 276, 269, 262, 257, 257, 257, 260, + 264, 272, 281, 291, 304, 317, 334, 353, 376, 402, 431, 467, 508, 549, 571, 525, 484, + 448, 416, 389, 366, 346, 328, 312, 300, 289, 280, 271, 265, 261, 259, 260, 263, 267, + 274, 283, 294, 306, 321, 336, 356, 379, 405, 432, 471, 514, 553, 574, 530, 488, 454, + 421, 393, 370, 349, 331, 316, 303, 291, 282, 276, 269, 264, 263, 264, 265, 271, 278, + 287, 297, 308, 323, 340, 360, 381, 408, 439, 474, 519, 558, 583, 539, 495, 457, 425, + 398, 373, 354, 335, 320, 307, 296, 286, 279, 273, 269, 268, 268, 270, 275, 282, 291, + 301, 313, 327, 343, 363, 386, 414, 445, 483, 523, 566, 591, 545, 501, 463, 432, 404, + 379, 359, 341, 325, 312, 301, 291, 283, 278, 273, 273, 272, 276, 280, 286, 295, 305, + 318, 332, 348, 369, 391, 417, 449, 487, 530, 572, 599, 557, 510, 471, 437, 411, 386, + 365, 347, 331, 318, 306, 297, 290, 284, 279, 277, 278, 281, 285, 291, 300, 311, 323, + 337, 355, 373, 398, 425, 458, 494, 538, 577, 615, 567, 521, 480, 445, 417, 393, 371, + 353, 337, 324, 312, 302, 295, 290, 286, 284, 285, 287, 291, 297, 306, 316, 328, 343, + 361, 380, 405, 433, 466, 501, 544, 589, 627, 579, 532, 490, 455, 424, 399, 378, 361, + 345, 330, 318, 310, 302, 297, 292, 291, 291, 293, 297, 304, 312, 323, 336, 350, 368, + 388, 413, 439, 474, 511, 555, 598, 643, 594, 544, 500, 466, 434, 409, 386, 368, 352, + 339, 327, 317, 310, 304, 300, 298, 299, 300, 305, 311, 319, 330, 342, 357, 375, 396, + 421, 448, 482, 523, 566, 611, 657, 611, 557, 513, 476, 446, 420, 396, 377, 361, 347, + 335, 324, 317, 312, 307, 306, 306, 308, 312, 318, 327, 337, 351, 365, 384, 405, 429, + 459, 493, 532, 579, 623, 681, 625, 573, 529, 489, 457, 431, 407, 387, 370, 356, 343, + 334, 327, 319, 316, 313, 315, 317, 321, 327, 335, 347, 359, 373, 394, 414, 439, 469, + 506, 546, 593, 643, 696, 643, 588, 542, 505, 469, 443, 417, 397, 379, 365, 353, 342, + 335, 329, 324, 323, 323, 325, 329, 335, 345, 356, 369, 386, 404, 425, 450, 483, 517, + 558, 611, 663, 720, 660, 607, 558, 516, 484, 455, 432, 407, 390, 374, 363, 352, 343, + 339, 335, 333, 331, 335, 339, 345, 354, 365, 378, 396, 414, 436, 463, 496, 531, 574, + 626, 681, 737, 673, 619, 571, 527, 492, 462, 437, 416, 397, 382, 369, 360, 350, 344, + 341, 338, 337, 340, 345, 351, 361, 371, 386, 402, 420, 443, 471, 505, 541, 582, 637, + 690, + }, + + /* gb_gain: */ + { + 705, 645, 587, 539, 500, 468, 438, 413, 394, 377, 360, 348, 338, 331, 325, 321, 320, + 322, 326, 330, 336, 347, 356, 371, 389, 409, 433, 462, 496, 533, 581, 638, 691, 688, + 633, 575, 529, 489, 459, 429, 406, 387, 370, 354, 342, 332, 324, 318, 314, 314, 314, + 318, 323, 330, 340, 349, 364, 381, 400, 426, 455, 485, 523, 569, 624, 680, 668, 614, + 562, 516, 480, 448, 419, 397, 378, 360, 347, 334, 324, 317, 311, 307, 306, 306, 309, + 315, 322, 331, 341, 353, 372, 392, 415, 443, 473, 512, 556, 609, 659, 648, 599, 547, + 504, 468, 438, 409, 388, 370, 352, 337, 327, 317, 308, 302, 299, 297, 297, 301, 306, + 314, 323, 332, 345, 363, 381, 405, 430, 462, 498, 541, 592, 638, 635, 583, 536, 493, + 458, 427, 401, 380, 361, 343, 330, 319, 309, 301, 296, 292, 290, 291, 292, 298, 305, + 313, 324, 338, 355, 373, 395, 422, 453, 487, 529, 578, 622, 618, 570, 524, 484, 448, + 419, 394, 372, 353, 337, 323, 313, 303, 295, 290, 286, 283, 283, 286, 290, 297, 306, + 318, 330, 348, 365, 388, 412, 443, 477, 517, 564, 617, 610, 563, 512, 474, 440, 411, + 387, 365, 348, 331, 318, 307, 297, 290, 283, 278, 277, 277, 278, 283, 291, 299, 312, + 324, 340, 358, 380, 405, 434, 469, 507, 555, 607, 598, 551, 506, 468, 432, 405, 380, + 359, 343, 326, 313, 302, 293, 285, 278, 274, 271, 270, 273, 278, 285, 293, 304, 318, + 334, 351, 373, 398, 427, 461, 499, 543, 597, 588, 543, 497, 460, 428, 399, 374, 355, + 337, 322, 309, 298, 288, 279, 273, 269, 265, 265, 268, 273, 280, 288, 300, 313, 329, + 347, 367, 390, 419, 455, 493, 537, 591, 578, 537, 492, 453, 423, 394, 371, 350, 333, + 317, 305, 293, 284, 276, 269, 264, 261, 261, 264, 268, 275, 284, 296, 308, 325, 343, + 364, 386, 414, 447, 485, 528, 579, 572, 529, 487, 449, 418, 390, 366, 348, 330, 314, + 301, 290, 279, 273, 265, 261, 258, 259, 260, 264, 272, 281, 292, 305, 320, 338, 358, + 382, 409, 440, 477, 522, 567, 568, 525, 483, 447, 415, 388, 364, 344, 326, 312, 298, + 287, 277, 269, 262, 258, 257, 257, 259, 261, 269, 278, 290, 302, 318, 336, 355, 379, + 407, 437, 473, 516, 555, 562, 519, 479, 444, 412, 385, 363, 343, 324, 308, 296, 284, + 276, 267, 261, 257, 257, 257, 258, 261, 268, 277, 289, 301, 316, 332, 352, 375, 404, + 434, 469, 511, 552, 562, 518, 477, 440, 411, 384, 361, 340, 322, 307, 294, 283, 274, + 265, 260, 256, 256, 257, 258, 260, 266, 275, 287, 300, 314, 330, 351, 374, 402, 430, + 467, 508, 548, 561, 517, 475, 440, 410, 382, 359, 338, 322, 306, 293, 282, 273, 265, + 258, 256, 256, 257, 257, 260, 265, 275, 287, 299, 313, 330, 350, 373, 398, 428, 464, + 505, 544, 559, 516, 475, 440, 408, 382, 358, 339, 321, 305, 293, 282, 272, 264, 258, + 256, 256, 256, 257, 260, 266, 275, 287, 298, 312, 329, 349, 372, 398, 428, 462, 503, + 542, 559, 516, 475, 440, 408, 382, 358, 340, 322, 306, 293, 282, 273, 264, 258, 256, + 256, 256, 257, 261, 267, 277, 287, 298, 313, 329, 349, 371, 398, 427, 462, 502, 542, + 559, 517, 476, 440, 409, 383, 359, 338, 322, 307, 293, 283, 273, 265, 258, 256, 256, + 256, 257, 261, 268, 277, 287, 299, 314, 330, 349, 372, 398, 428, 462, 503, 543, 562, + 521, 480, 443, 412, 385, 362, 341, 323, 308, 296, 285, 274, 267, 260, 256, 256, 256, + 257, 262, 269, 279, 289, 301, 315, 332, 351, 373, 399, 428, 465, 507, 544, 564, 522, + 481, 445, 414, 387, 364, 343, 325, 311, 297, 287, 277, 269, 262, 257, 257, 257, 260, + 265, 272, 281, 291, 303, 318, 335, 353, 375, 401, 432, 468, 509, 551, 571, 525, 485, + 448, 417, 390, 367, 346, 329, 313, 300, 290, 280, 272, 265, 261, 260, 260, 262, 267, + 274, 283, 294, 306, 320, 337, 356, 379, 405, 434, 470, 513, 553, 576, 531, 489, 454, + 421, 394, 370, 350, 332, 317, 303, 293, 283, 274, 269, 265, 263, 264, 266, 272, 278, + 287, 297, 309, 323, 340, 359, 382, 408, 438, 476, 517, 559, 583, 540, 496, 458, 426, + 397, 374, 355, 336, 320, 307, 296, 287, 279, 274, 269, 268, 269, 271, 276, 282, 291, + 301, 313, 328, 344, 364, 387, 414, 445, 482, 523, 562, 593, 548, 504, 465, 432, 405, + 380, 358, 341, 325, 312, 301, 292, 283, 278, 274, 273, 273, 276, 280, 286, 295, 306, + 318, 332, 349, 368, 390, 418, 450, 487, 530, 570, 603, 559, 513, 473, 438, 409, 387, + 365, 348, 331, 318, 307, 297, 290, 284, 280, 278, 278, 282, 286, 292, 300, 311, 323, + 338, 355, 374, 398, 426, 458, 495, 535, 575, 615, 569, 524, 481, 447, 417, 394, 372, + 354, 338, 324, 313, 305, 296, 290, 286, 284, 284, 287, 291, 297, 306, 316, 329, 343, + 362, 380, 405, 432, 464, 501, 544, 586, 631, 582, 532, 492, 456, 426, 400, 380, 362, + 345, 331, 319, 311, 302, 297, 293, 291, 291, 293, 298, 303, 313, 323, 336, 349, 369, + 388, 413, 439, 473, 511, 555, 597, 645, 596, 543, 502, 466, 435, 409, 387, 369, 352, + 340, 328, 318, 310, 304, 301, 298, 299, 301, 305, 311, 320, 330, 343, 357, 376, 397, + 421, 449, 484, 522, 565, 613, 660, 607, 560, 515, 479, 447, 419, 397, 378, 363, 348, + 336, 325, 318, 312, 308, 306, 307, 308, 313, 319, 327, 338, 350, 365, 384, 405, 430, + 460, 493, 535, 579, 626, 681, 625, 575, 530, 488, 459, 432, 406, 387, 371, 357, 344, + 335, 326, 319, 316, 314, 314, 317, 322, 328, 336, 347, 359, 376, 394, 416, 440, 470, + 507, 544, 594, 642, 697, 645, 592, 543, 506, 473, 444, 418, 398, 380, 366, 354, 344, + 335, 330, 325, 324, 324, 325, 330, 336, 346, 357, 369, 386, 403, 425, 453, 482, 517, + 560, 609, 659, 722, 665, 607, 560, 519, 484, 455, 430, 408, 390, 374, 364, 352, 344, + 339, 336, 334, 332, 336, 338, 345, 355, 365, 379, 395, 414, 436, 463, 495, 532, 575, + 626, 681, 739, 678, 621, 574, 531, 493, 463, 438, 417, 398, 382, 369, 359, 351, 346, + 341, 340, 338, 341, 345, 352, 362, 372, 385, 401, 422, 444, 469, 504, 542, 588, 639, + 693, + }, + + /* b_gain: */ + { + 669, 620, 567, 522, 485, 456, 427, 402, 385, 368, 353, 341, 334, 327, 321, 317, 316, + 317, 320, 326, 334, 341, 353, 367, 382, 404, 426, 456, 483, 524, 569, 620, 682, 657, + 610, 554, 512, 477, 445, 419, 397, 380, 361, 346, 337, 327, 320, 315, 311, 310, 310, + 315, 320, 328, 337, 346, 358, 374, 396, 419, 445, 477, 514, 558, 610, 660, 645, 590, + 541, 503, 463, 435, 408, 388, 370, 354, 340, 329, 320, 313, 307, 304, 301, 303, 307, + 311, 318, 328, 338, 351, 367, 385, 408, 435, 465, 503, 543, 595, 642, 623, 576, 527, + 488, 454, 425, 400, 381, 361, 345, 332, 320, 312, 305, 299, 296, 295, 295, 298, 305, + 309, 320, 329, 342, 358, 378, 398, 424, 456, 488, 527, 578, 620, 610, 567, 518, 478, + 445, 416, 391, 371, 354, 337, 326, 315, 306, 298, 292, 289, 287, 288, 290, 296, 303, + 310, 320, 334, 351, 368, 388, 415, 445, 478, 516, 567, 612, 600, 552, 505, 468, 436, + 408, 384, 365, 346, 331, 319, 309, 300, 292, 286, 284, 281, 280, 285, 288, 294, 304, + 314, 327, 342, 360, 382, 406, 436, 468, 507, 549, 605, 587, 541, 495, 460, 429, 401, + 380, 358, 341, 327, 315, 305, 295, 287, 280, 277, 274, 275, 278, 281, 288, 297, 309, + 320, 337, 354, 375, 398, 426, 460, 497, 539, 592, 578, 531, 490, 456, 422, 396, 371, + 353, 337, 322, 309, 300, 290, 281, 277, 271, 270, 269, 271, 276, 283, 293, 303, 316, + 330, 349, 368, 393, 419, 454, 488, 535, 585, 567, 524, 483, 447, 418, 389, 367, 349, + 332, 317, 305, 295, 286, 278, 271, 268, 264, 263, 266, 271, 278, 287, 297, 311, 326, + 343, 365, 387, 414, 446, 483, 522, 578, 560, 516, 477, 440, 413, 385, 364, 344, 328, + 315, 300, 291, 281, 273, 268, 262, 261, 261, 262, 268, 275, 283, 294, 307, 322, 340, + 358, 383, 408, 440, 477, 516, 569, 549, 512, 472, 438, 406, 382, 358, 341, 326, 310, + 298, 288, 278, 270, 263, 260, 257, 258, 261, 263, 271, 279, 291, 305, 318, 335, 354, + 379, 405, 434, 471, 512, 556, 547, 509, 468, 435, 405, 380, 357, 339, 320, 307, 296, + 285, 276, 269, 262, 258, 257, 258, 260, 262, 269, 278, 289, 301, 317, 332, 352, 375, + 401, 431, 466, 507, 547, 545, 505, 466, 434, 402, 378, 355, 337, 320, 305, 294, 283, + 272, 265, 260, 256, 256, 257, 258, 261, 267, 276, 288, 299, 314, 330, 351, 371, 398, + 426, 462, 503, 541, 541, 505, 465, 430, 401, 377, 354, 334, 317, 303, 292, 281, 272, + 264, 259, 256, 257, 257, 259, 261, 266, 274, 286, 298, 310, 329, 349, 369, 396, 425, + 460, 500, 537, 539, 503, 463, 431, 400, 374, 353, 334, 317, 303, 290, 280, 270, 263, + 258, 256, 256, 257, 259, 261, 265, 276, 285, 297, 310, 327, 347, 368, 395, 424, 459, + 495, 533, 537, 503, 465, 431, 399, 373, 352, 333, 317, 302, 289, 280, 271, 263, 257, + 256, 256, 256, 258, 260, 265, 274, 286, 297, 311, 327, 346, 368, 391, 422, 456, 495, + 533, 539, 503, 465, 431, 400, 374, 353, 333, 317, 303, 290, 279, 270, 263, 257, 256, + 256, 256, 257, 261, 267, 276, 286, 297, 310, 327, 345, 368, 394, 421, 456, 493, 531, + 539, 503, 462, 430, 401, 376, 353, 334, 318, 303, 291, 280, 271, 264, 257, 256, 256, + 256, 257, 261, 267, 277, 287, 298, 311, 327, 346, 368, 395, 421, 456, 495, 531, 541, + 505, 465, 434, 402, 377, 355, 337, 319, 304, 292, 283, 273, 265, 260, 256, 256, 256, + 259, 262, 269, 278, 288, 300, 314, 329, 348, 369, 396, 422, 457, 498, 535, 547, 509, + 466, 434, 407, 381, 358, 338, 320, 307, 296, 285, 277, 268, 262, 257, 256, 257, 261, + 263, 271, 280, 289, 301, 316, 330, 351, 373, 397, 425, 460, 502, 537, 549, 512, 471, + 438, 408, 383, 360, 341, 325, 309, 297, 288, 278, 271, 264, 261, 259, 261, 262, 268, + 273, 284, 293, 305, 318, 334, 353, 375, 400, 429, 466, 505, 539, 556, 516, 477, 440, + 413, 386, 366, 343, 328, 314, 300, 290, 280, 273, 268, 264, 262, 263, 265, 271, 277, + 286, 296, 307, 322, 338, 356, 380, 404, 435, 469, 509, 545, 565, 522, 482, 446, 416, + 390, 369, 350, 331, 317, 305, 295, 285, 278, 272, 268, 267, 268, 270, 275, 281, 289, + 299, 312, 326, 341, 360, 383, 408, 438, 474, 514, 552, 571, 535, 490, 453, 422, 396, + 372, 354, 336, 322, 309, 299, 289, 281, 276, 272, 271, 272, 274, 280, 286, 293, 305, + 317, 330, 345, 366, 387, 415, 442, 480, 518, 560, 580, 541, 497, 460, 427, 401, 379, + 358, 341, 328, 315, 305, 295, 288, 282, 278, 278, 277, 280, 285, 291, 298, 308, 320, + 334, 351, 371, 393, 420, 450, 485, 525, 565, 597, 549, 507, 466, 436, 408, 384, 366, + 346, 332, 320, 310, 301, 295, 287, 283, 283, 284, 285, 290, 297, 305, 315, 327, 341, + 357, 375, 400, 425, 456, 491, 535, 573, 607, 565, 516, 478, 445, 418, 391, 373, 356, + 341, 328, 317, 307, 300, 295, 290, 289, 291, 292, 296, 301, 310, 321, 333, 349, 365, + 383, 407, 435, 466, 505, 541, 587, 623, 576, 529, 488, 454, 425, 402, 382, 364, 350, + 336, 322, 316, 307, 300, 298, 297, 298, 299, 303, 309, 317, 328, 341, 354, 371, 390, + 416, 443, 475, 512, 554, 600, 642, 590, 541, 503, 466, 436, 409, 388, 371, 356, 343, + 332, 322, 315, 309, 306, 305, 305, 307, 310, 316, 326, 337, 347, 364, 380, 400, 424, + 454, 483, 522, 567, 612, 651, 607, 554, 514, 478, 447, 422, 399, 382, 366, 352, 340, + 330, 322, 317, 315, 313, 313, 315, 318, 326, 333, 344, 357, 371, 390, 410, 434, 463, + 495, 537, 578, 623, 672, 623, 573, 531, 491, 460, 434, 409, 390, 374, 360, 348, 339, + 332, 327, 322, 321, 321, 325, 327, 334, 342, 353, 368, 381, 400, 420, 445, 477, 509, + 547, 595, 642, 692, 642, 590, 543, 505, 475, 443, 422, 402, 384, 370, 358, 349, 341, + 337, 331, 330, 330, 332, 337, 343, 351, 363, 375, 390, 409, 433, 456, 485, 522, 560, + 612, 663, 705, 657, 605, 554, 514, 482, 454, 431, 412, 389, 378, 365, 354, 350, 343, + 338, 337, 337, 340, 342, 351, 358, 368, 383, 397, 416, 436, 465, 493, 533, 571, 623, + 682, + }, + }, + }, + } +}; + +static const ot_isp_cmos_acs g_cmos_acs = { + /* acs_attr */ + { + /* en */ + 1, + /* y_strength */ + 256, + /* run_interval */ + 2, + /* lock_en */ + 0, + }, + /* acs_calib_param */ + { + /* light_index */ + { + -1, 23, 10, 5, 4, 1, 5, -1, 6, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 22, + -1, 0, 10, 14, 3, 14, 5, -1, 2, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 23, + }, + /* model_ar_min */ + -0.08f, + /* model_ar_step */ + 0.098f, + /* model_ab_min */ + 0, + /* model_ab_step */ + 0.28f, + /* light_type_g_high */ + 1, + /* light_type_g_low */ + 2 + }, + + /* acs_y_shading_lut */ + { + /* g_param_high_ct */ + { + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, + 1024, 1024, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67174464, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 67174464, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 + } + }, +}; + +static const ot_isp_cmos_clut g_cmos_clut_wdr = { + { + 1, + 128, + 128, + 128, + }, + { + { + 0, 3149813, 1046533, 3149814, 6299621, 9450452, 6299622, 9450451, 12602304, + 16802729, 12602303, 16803752, 22052752, 26255221, 21005198, 25206643, 30457689, 35708733, + 29409112, 32563005, 39910177, 45161223, 35714854, 38866705, 49362669, 54612692, 42017535, + 45168367, 60912311, 68261528, 48319196, 52519622, 75610743, 3149814, 57769646, 4198390, + 2095110, 9451475, 3143687, 9451474, 6299621, 15755175, 6300644, 14706598, 12603326, + 23110515, 11554749, 21012342, 19956621, 29416257, 17859470, 25219913, 26263385, 32572189, + 23116638, 26276652, 31519533, 34675465, 26273592, 25232160, 33624849, 37828337, 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12580866, 0, 1043325952, 6290434, 14681084, 0, + 980346125, 6292479, 1043464, 0, 1006568682, 1044470, 1044486, 0, 1032791238, + 1046518, 1045508, 0, 1060062370, 1048566, 1046530, 0, 12544126, 2039, + 1047553, 0, 40863832, 1072696313, 0, 0, 69184560, 1070599162, 1023, + 0, 97506310, 1068500989, 1023, 0, 126877660, 1066402816, 0, 0, + 993986794, 0, 0, 0, 1016014027, 0, 0, 0, 1039089837, + 0, 0, 0, 1062165645, 0, 0, 0, 11499630, 0, + 0, 0, 34576461, 0, 0, 0, 58701867, 0, 0, + 0, 83875848, 0, 0, 0, 108002276, 0, 0, 0, + 1007628486, 0, 0, 0, 1025459373, 0, 0, 0, 1044339859, + 0, 0, 0, 1064268921, 0, 0, 0, 9407582, 0, + 0, 0, 29337666, 0, 0, 0, 49266726, 0, 0, + 0, 69196809, 0, 0, 0, 89127915, 0, 0, 0, + 1020220579, 0, 0, 0, 1035954318, 0, 0, 0, 1050638457, + 0, 0, 0, 1066372196, 0, 0, 0, 7315534, 0, + 0, 0, 23049271, 0, 0, 0, 39832608, 0, 0, + 0, 55566345, 0, 0, 0, 71302129, 0, 0, 0, + 1033861248, 0, 0, 0, 1045399664, 0, 0, 0, 1056937055, + 0, 0, 0, 1068475470, 0, 0, 0, 6272061, 0, + 0, 0, 17810476, 0, 0, 0, 30398490, 0, 0, + 0, 42985479, 0, 0, 0, 54524917, 0, 0, 0, + 1046453341, 0, 0, 0, 1054845009, 0, 0, 0, 1062188101, + 0, 0, 0, 1070578745, 0, 0, 0, 5228588, 0, + 0, 0, 13620256, 0, 0, 0, 22011923, 0, 0, + 0, 30404613, 0, 0, 0, 38797304, 0, 0, 0, + 1059045435, 0, 0, 0, 1063241779, 0, 0, 0, 1068486699, + 0, 0, 0, 1072683043, 0, 0, 0, 3137563, 0, + 0, 0, 8382483, 0, 0, 0, 13627403, 0, 0, + 0, 17822723, 0, 0, 0, 23068667, 0, 0, 0, + 1071637529, 0, 0, 0, 1072687125, 0, 0, 0, 1073736721, + 0, 0, 0, 1044493, 0, 0, 0, 2094090, 0, + 0, 0, 3143686, 0, 0, 0, 5241859, 0, 0, + 0, 6290433, 0, 0, 0, 7341054, 0, 0, 0, + 1042423, 0, 0, 0, 1045494, 0, 0, 0, 1047542, + 0, 0, 0, 1015, 0, 0, 0, 3064, 0, + 0, 0, 1071647738, 0, 0, 0, 1069550588, 0, 0, + 0, 1067452414, 0, 0, 0, 1065352192, 0, 0, 0, + } + }, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* IMX515_CMOS_EX_H */ diff --git a/libraries/sensor/hi3519dv500/sony_imx515/imx515_sensor_ctl.c b/libraries/sensor/hi3519dv500/sony_imx515/imx515_sensor_ctl.c new file mode 100644 index 0000000..055d68d --- /dev/null +++ b/libraries/sensor/hi3519dv500/sony_imx515/imx515_sensor_ctl.c @@ -0,0 +1,428 @@ +/* + Copyright (c), 2001-2024, Shenshu Tech. Co., Ltd. + */ + +#include +#include +#include +#include + +#ifdef OT_GPIO_I2C +#include "gpioi2c_ex.h" +#else +#include "ot_i2c.h" +#endif +#include "securec.h" + +#include "imx515_cmos.h" + +#define I2C_DEV_FILE_NUM 16 +#define I2C_BUF_NUM 8 + +static int g_fd[OT_ISP_MAX_PIPE_NUM] = {[0 ...(OT_ISP_MAX_PIPE_NUM - 1)] = -1}; + +int imx515_i2c_init(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + return TD_SUCCESS; + } +#ifdef OT_GPIO_I2C + g_fd[vi_pipe] = open("/dev/gpioi2c_ex", O_RDONLY, S_IRUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open gpioi2c_ex error!\n"); + return TD_FAILURE; + } +#else + int ret; + char dev_file[I2C_DEV_FILE_NUM] = {0}; + td_u8 dev_num; + ot_isp_sns_commbus *imx515businfo = TD_NULL; + imx515businfo = imx515_get_bus_info(vi_pipe); + dev_num = imx515businfo->i2c_dev; + (td_void)snprintf_s(dev_file, sizeof(dev_file), sizeof(dev_file) - 1, "/dev/i2c-%u", dev_num); + + g_fd[vi_pipe] = open(dev_file, O_RDWR, S_IRUSR | S_IWUSR); + if (g_fd[vi_pipe] < 0) { + isp_err_trace("Open /dev/ot_i2c_drv-%u error!\n", dev_num); + return TD_FAILURE; + } + + ret = ioctl(g_fd[vi_pipe], OT_I2C_SLAVE_FORCE, (IMX515_I2C_ADDR >> 1)); + if (ret < 0) { + isp_err_trace("I2C_SLAVE_FORCE error!\n"); + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return ret; + } +#endif + + return TD_SUCCESS; +} + +int imx515_i2c_exit(ot_vi_pipe vi_pipe) +{ + if (g_fd[vi_pipe] >= 0) { + close(g_fd[vi_pipe]); + g_fd[vi_pipe] = -1; + return TD_SUCCESS; + } + return TD_FAILURE; +} + +td_s32 imx515_read_register(ot_vi_pipe vi_pipe, td_u32 addr) +{ + ot_unused(vi_pipe); + ot_unused(addr); + return TD_SUCCESS; +} + +td_s32 imx515_write_register(ot_vi_pipe vi_pipe, td_u32 addr, td_u32 data) +{ + td_s32 ret; + if (g_fd[vi_pipe] < 0) { + return TD_SUCCESS; + } + +#ifdef OT_GPIO_I2C + i2c_data.dev_addr = IMX515_I2C_ADDR; + i2c_data.reg_addr = addr; + i2c_data.addr_byte_num = IMX515_ADDR_BYTE; + i2c_data.data = data; + i2c_data.data_byte_num = IMX515_DATA_BYTE; + + ret = ioctl(g_fd[vi_pipe], GPIO_I2C_WRITE, &i2c_data); + if (ret) { + isp_err_trace("GPIO-I2C write failed!\n"); + return ret; + } +#else + td_u32 idx = 0; + td_u8 buf[I2C_BUF_NUM]; + + if (IMX515_ADDR_BYTE == 2) { /* 2 byte */ + buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ + idx++; + buf[idx] = addr & 0xff; + idx++; + } else { + } + + if (IMX515_DATA_BYTE == 2) { /* 2 byte */ + } else { + buf[idx] = data & 0xff; + idx++; + } + + ret = write(g_fd[vi_pipe], buf, IMX515_ADDR_BYTE + IMX515_DATA_BYTE); + if (ret < 0) { + isp_err_trace("I2C_WRITE error!\n"); + return TD_FAILURE; + } + +#endif + return TD_SUCCESS; +} + +static void delay_ms(int ms) +{ + usleep(ms * 1000); /* 1ms: 1000us */ + return; +} + +void imx515_prog(ot_vi_pipe vi_pipe, const td_u32 *rom) +{ + ot_unused(vi_pipe); + ot_unused(rom); +} + +void imx515_standby(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx515_write_register(vi_pipe, 0x3000, 0x01); /* STANDBY */ + ret += imx515_write_register(vi_pipe, 0x3002, 0x01); /* XTMSTA */ + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx515_restart(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx515_write_register(vi_pipe, 0x3000, 0x00); /* standby */ + delay_ms(20); /* 20ms */ + ret += imx515_write_register(vi_pipe, 0x3002, 0x00); /* master mode start */ + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx515_mirror_flip(ot_vi_pipe vi_pipe, ot_isp_sns_mirrorflip_type sns_mirror_flip) +{ + switch (sns_mirror_flip) { + case ISP_SNS_NORMAL: + imx515_write_register(vi_pipe, 0x3030, 0x00); + break; + case ISP_SNS_MIRROR: + imx515_write_register(vi_pipe, 0x3030, 0x01); + break; + case ISP_SNS_FLIP: + imx515_write_register(vi_pipe, 0x3030, 0x02); + break; + case ISP_SNS_MIRROR_FLIP: + imx515_write_register(vi_pipe, 0x3030, 0x03); + break; + default: + break; + } + return; +} + +td_void imx515_blc_clamp(ot_vi_pipe vi_pipe, ot_isp_sns_blc_clamp blc_clamp) +{ + td_s32 ret = TD_SUCCESS; + + imx515_set_blc_clamp_value(vi_pipe, blc_clamp.blc_clamp_en); + + if (blc_clamp.blc_clamp_en == TD_TRUE) { + ret += imx515_write_register(vi_pipe, 0x300e, 0x01); + } else { + ret += imx515_write_register(vi_pipe, 0x300e, 0x00); + } + + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx515_comm_init(ot_vi_pipe vi_pipe); +void imx515_linear_8m_init(ot_vi_pipe vi_pipe); + +void imx515_default_reg_init(ot_vi_pipe vi_pipe) +{ + td_u32 i; + td_s32 ret = TD_SUCCESS; + ot_isp_sns_state *pastimx515 = TD_NULL; + pastimx515 = imx515_get_ctx(vi_pipe); + for (i = 0; i < pastimx515->regs_info[0].reg_num; i++) { + ret += imx515_write_register(vi_pipe, + pastimx515->regs_info[0].i2c_data[i].reg_addr, + pastimx515->regs_info[0].i2c_data[i].data); + } + if (ret != TD_SUCCESS) { + isp_err_trace("write register failed!\n"); + } + return; +} + +void imx515_init(ot_vi_pipe vi_pipe) +{ + ot_wdr_mode wdr_mode; + td_bool init; + td_s32 ret; + ot_isp_sns_state *pastimx515 = TD_NULL; + pastimx515 = imx515_get_ctx(vi_pipe); + init = pastimx515->init; + wdr_mode = pastimx515->wdr_mode; + + ret = imx515_i2c_init(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("i2c init failed!\n"); + return; + } + /* When sensor first init, config all registers */ + if (init == TD_FALSE) { + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + } else { + imx515_linear_8m_init(vi_pipe); + } + } else { + /* When sensor switch mode(linear<->WDR or resolution), config different registers(if possible) */ + if (OT_WDR_MODE_2To1_LINE == wdr_mode) { + } else { + imx515_linear_8m_init(vi_pipe); + } + } + + pastimx515->init = TD_TRUE; + return; +} + +void imx515_exit(ot_vi_pipe vi_pipe) +{ + td_s32 ret; + ret = imx515_i2c_exit(vi_pipe); + if (ret != TD_SUCCESS) { + isp_err_trace("IMX515 exit failed!\n"); + } + return; +} + +static td_s32 imx515_linear_2160p30_init_part1(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + ret += imx515_write_register(vi_pipe, 0x3008, 0x7F); + ret += imx515_write_register(vi_pipe, 0x300A, 0x5B); + ret += imx515_write_register(vi_pipe, 0x3024, 0xE4); + ret += imx515_write_register(vi_pipe, 0x3025, 0x0C); + ret += imx515_write_register(vi_pipe, 0x3028, 0xEE); + ret += imx515_write_register(vi_pipe, 0x3033, 0x08); + ret += imx515_write_register(vi_pipe, 0x3050, 0x06); + ret += imx515_write_register(vi_pipe, 0x3051, 0x09); + ret += imx515_write_register(vi_pipe, 0x3090, 0x14); + ret += imx515_write_register(vi_pipe, 0x30C1, 0x00); + ret += imx515_write_register(vi_pipe, 0x3116, 0x24); + ret += imx515_write_register(vi_pipe, 0x3118, 0xA0); + ret += imx515_write_register(vi_pipe, 0x311E, 0x24); + ret += imx515_write_register(vi_pipe, 0x32D4, 0x21); + ret += imx515_write_register(vi_pipe, 0x32EC, 0xA1); + ret += imx515_write_register(vi_pipe, 0x344C, 0x2B); + ret += imx515_write_register(vi_pipe, 0x344D, 0x01); + ret += imx515_write_register(vi_pipe, 0x344E, 0xED); + ret += imx515_write_register(vi_pipe, 0x344F, 0x01); + ret += imx515_write_register(vi_pipe, 0x3450, 0xF6); + ret += imx515_write_register(vi_pipe, 0x3451, 0x02); + ret += imx515_write_register(vi_pipe, 0x3452, 0x7F); + ret += imx515_write_register(vi_pipe, 0x3453, 0x03); + ret += imx515_write_register(vi_pipe, 0x358A, 0x04); + ret += imx515_write_register(vi_pipe, 0x35A1, 0x02); + ret += imx515_write_register(vi_pipe, 0x35EC, 0x27); + ret += imx515_write_register(vi_pipe, 0x35EE, 0x8D); + ret += imx515_write_register(vi_pipe, 0x35F0, 0x8D); + ret += imx515_write_register(vi_pipe, 0x35F2, 0x29); + ret += imx515_write_register(vi_pipe, 0x36BC, 0x0C); + ret += imx515_write_register(vi_pipe, 0x36CC, 0x53); + ret += imx515_write_register(vi_pipe, 0x36CD, 0x00); + ret += imx515_write_register(vi_pipe, 0x36CE, 0x3C); + ret += imx515_write_register(vi_pipe, 0x36D0, 0x8C); + ret += imx515_write_register(vi_pipe, 0x36D1, 0x00); + ret += imx515_write_register(vi_pipe, 0x36D2, 0x71); + ret += imx515_write_register(vi_pipe, 0x36D4, 0x3C); + ret += imx515_write_register(vi_pipe, 0x36D6, 0x53); + ret += imx515_write_register(vi_pipe, 0x36D7, 0x00); + ret += imx515_write_register(vi_pipe, 0x36D8, 0x71); + ret += imx515_write_register(vi_pipe, 0x36DA, 0x8C); + ret += imx515_write_register(vi_pipe, 0x36DB, 0x00); + + return ret; +} + +static td_s32 imx515_linear_2160p30_init_part2(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += imx515_write_register(vi_pipe, 0x3720, 0x00); + ret += imx515_write_register(vi_pipe, 0x3724, 0x02); + ret += imx515_write_register(vi_pipe, 0x3726, 0x02); + ret += imx515_write_register(vi_pipe, 0x3732, 0x02); + ret += imx515_write_register(vi_pipe, 0x3734, 0x03); + ret += imx515_write_register(vi_pipe, 0x3736, 0x03); + ret += imx515_write_register(vi_pipe, 0x3742, 0x03); + ret += imx515_write_register(vi_pipe, 0x3862, 0xE0); + ret += imx515_write_register(vi_pipe, 0x38CC, 0x30); + ret += imx515_write_register(vi_pipe, 0x38CD, 0x2F); + ret += imx515_write_register(vi_pipe, 0x395C, 0x0C); + ret += imx515_write_register(vi_pipe, 0x39A4, 0x07); + ret += imx515_write_register(vi_pipe, 0x39A8, 0x32); + ret += imx515_write_register(vi_pipe, 0x39AA, 0x32); + ret += imx515_write_register(vi_pipe, 0x39AC, 0x32); + ret += imx515_write_register(vi_pipe, 0x39AE, 0x32); + ret += imx515_write_register(vi_pipe, 0x39B0, 0x32); + ret += imx515_write_register(vi_pipe, 0x39B2, 0x2F); + ret += imx515_write_register(vi_pipe, 0x39B4, 0x2D); + ret += imx515_write_register(vi_pipe, 0x39B6, 0x28); + ret += imx515_write_register(vi_pipe, 0x39B8, 0x30); + ret += imx515_write_register(vi_pipe, 0x39BA, 0x30); + ret += imx515_write_register(vi_pipe, 0x39BC, 0x30); + ret += imx515_write_register(vi_pipe, 0x39BE, 0x30); + ret += imx515_write_register(vi_pipe, 0x39C0, 0x30); + ret += imx515_write_register(vi_pipe, 0x39C2, 0x2E); + ret += imx515_write_register(vi_pipe, 0x39C4, 0x2B); + ret += imx515_write_register(vi_pipe, 0x39C6, 0x25); + ret += imx515_write_register(vi_pipe, 0x3A42, 0xD1); + ret += imx515_write_register(vi_pipe, 0x3A4C, 0x77); + ret += imx515_write_register(vi_pipe, 0x3AE0, 0x02); + ret += imx515_write_register(vi_pipe, 0x3AEC, 0x0C); + ret += imx515_write_register(vi_pipe, 0x3B00, 0x2E); + ret += imx515_write_register(vi_pipe, 0x3B06, 0x29); + ret += imx515_write_register(vi_pipe, 0x3B98, 0x25); + ret += imx515_write_register(vi_pipe, 0x3B99, 0x21); + ret += imx515_write_register(vi_pipe, 0x3B9B, 0x13); + ret += imx515_write_register(vi_pipe, 0x3B9C, 0x13); + ret += imx515_write_register(vi_pipe, 0x3B9D, 0x13); + ret += imx515_write_register(vi_pipe, 0x3B9E, 0x13); + + return ret; +} + +static td_s32 imx515_linear_2160p30_init_part3(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += imx515_write_register(vi_pipe, 0x3BA1, 0x00); + ret += imx515_write_register(vi_pipe, 0x3BA2, 0x06); + ret += imx515_write_register(vi_pipe, 0x3BA3, 0x0B); + ret += imx515_write_register(vi_pipe, 0x3BA4, 0x10); + ret += imx515_write_register(vi_pipe, 0x3BA5, 0x14); + ret += imx515_write_register(vi_pipe, 0x3BA6, 0x18); + ret += imx515_write_register(vi_pipe, 0x3BA7, 0x1A); + ret += imx515_write_register(vi_pipe, 0x3BA8, 0x1A); + ret += imx515_write_register(vi_pipe, 0x3BA9, 0x1A); + ret += imx515_write_register(vi_pipe, 0x3BAC, 0xED); + ret += imx515_write_register(vi_pipe, 0x3BAD, 0x01); + ret += imx515_write_register(vi_pipe, 0x3BAE, 0xF6); + ret += imx515_write_register(vi_pipe, 0x3BAF, 0x02); + ret += imx515_write_register(vi_pipe, 0x3BB0, 0xA2); + ret += imx515_write_register(vi_pipe, 0x3BB1, 0x03); + ret += imx515_write_register(vi_pipe, 0x3BB2, 0xE0); + ret += imx515_write_register(vi_pipe, 0x3BB3, 0x03); + ret += imx515_write_register(vi_pipe, 0x3BB4, 0xE0); + ret += imx515_write_register(vi_pipe, 0x3BB5, 0x03); + ret += imx515_write_register(vi_pipe, 0x3BB6, 0xE0); + ret += imx515_write_register(vi_pipe, 0x3BB7, 0x03); + ret += imx515_write_register(vi_pipe, 0x3BB8, 0xE0); + ret += imx515_write_register(vi_pipe, 0x3BBA, 0xE0); + ret += imx515_write_register(vi_pipe, 0x3BBC, 0xDA); + ret += imx515_write_register(vi_pipe, 0x3BBE, 0x88); + ret += imx515_write_register(vi_pipe, 0x3BC0, 0x44); + ret += imx515_write_register(vi_pipe, 0x3BC2, 0x7B); + ret += imx515_write_register(vi_pipe, 0x3BC4, 0xA2); + ret += imx515_write_register(vi_pipe, 0x3BC8, 0xBD); + ret += imx515_write_register(vi_pipe, 0x3BCA, 0xBD); + ret += imx515_write_register(vi_pipe, 0x4004, 0x48); + ret += imx515_write_register(vi_pipe, 0x4005, 0x09); + ret += imx515_write_register(vi_pipe, 0x4018, 0xA7); + ret += imx515_write_register(vi_pipe, 0x401A, 0x57); + ret += imx515_write_register(vi_pipe, 0x401C, 0x5F); + ret += imx515_write_register(vi_pipe, 0x401E, 0x97); + ret += imx515_write_register(vi_pipe, 0x4020, 0x5F); + ret += imx515_write_register(vi_pipe, 0x4022, 0xAF); + ret += imx515_write_register(vi_pipe, 0x4024, 0x5F); + ret += imx515_write_register(vi_pipe, 0x4026, 0x9F); + ret += imx515_write_register(vi_pipe, 0x4028, 0x4F); + + return ret; +} + +void imx515_linear_8m_init(ot_vi_pipe vi_pipe) +{ + td_s32 ret = TD_SUCCESS; + + ret += imx515_linear_2160p30_init_part1(vi_pipe); + ret += imx515_linear_2160p30_init_part2(vi_pipe); + ret += imx515_linear_2160p30_init_part3(vi_pipe); + + imx515_default_reg_init(vi_pipe); + + ret += imx515_write_register(vi_pipe, 0x3000, 0x00); /* standby */ + delay_ms(20); /* 20ms */ + ret += imx515_write_register(vi_pipe, 0x3002, 0x00); /* master mode start */ + if (ret != TD_SUCCESS) { + isp_err_trace("imx515 write register failed!\n"); + return; + } + printf("===IMX515 8M 30fps 12bit LINE Init OK!===\n"); + return; +}