diff --git a/test/constant/local-float-point-constants.ll b/test/constant/local-float-point-constants.ll
index e31c8fa96..a04775758 100644
--- a/test/constant/local-float-point-constants.ll
+++ b/test/constant/local-float-point-constants.ll
@@ -49,6 +49,6 @@ define double @getConstantFP64() {
 ; CHECK: ReturnValue [[#FP64_CONST]]
 ; CHECK: FunctionEnd
 
-; CHECK-LLVM: ret half 0xH3C4D
-; CHECK-LLVM: ret float 0x3FD27C8BE0000000
-; CHECK-LLVM: ret double 0x4F2DE42B8C68F3F1
+; CHECK-LLVM: ret half 1.075200e+00
+; CHECK-LLVM: ret float f0x3E93E45F
+; CHECK-LLVM: ret double f0x4F2DE42B8C68F3F1
diff --git a/test/extensions/EXT/SPV_EXT_float8/conversions_matrix.ll b/test/extensions/EXT/SPV_EXT_float8/conversions_matrix.ll
index 5a6642214..63f0a6b14 100644
--- a/test/extensions/EXT/SPV_EXT_float8/conversions_matrix.ll
+++ b/test/extensions/EXT/SPV_EXT_float8/conversions_matrix.ll
@@ -27,7 +27,7 @@
 ; CHECK-SPIRV: FConvert [[#FP8MatrixTy]] [[#Conv:]] [[#M]]
 ; CHECK-SPIRV: Bitcast [[#Int8MatrixTy]] [[#]] [[#Conv]]
 
-; CHECK-LLVM: %[[#M:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0xH0000)
+; CHECK-LLVM: %[[#M:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0.000000e+00)
 ; CHECK-LLVM: call target("spirv.CooperativeMatrixKHR", i8, 3, 12, 12, 2) @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTPU3AS144__spirv_CooperativeMatrixKHR__half_3_12_12_2(target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) %[[#M]])
 
 ; ModuleID = 'test.bc'
diff --git a/test/extensions/EXT/SPV_EXT_float8/conversions_scalar_vector.ll b/test/extensions/EXT/SPV_EXT_float8/conversions_scalar_vector.ll
index b0f08b92c..b04d89c0a 100644
--- a/test/extensions/EXT/SPV_EXT_float8/conversions_scalar_vector.ll
+++ b/test/extensions/EXT/SPV_EXT_float8/conversions_scalar_vector.ll
@@ -198,7 +198,7 @@ declare dso_local spir_func <8 x bfloat> @_Z36__builtin_spirv_ConvertE5M2ToBF16E
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: hf16_e4m3_scalar
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half 0xH3C00)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_e4m3_scalar() {
@@ -215,7 +215,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half)
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: hf16_e4m3_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv8_Dh(<8 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv8_Dh(<8 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i8> %[[#Call]]
 
 define spir_func <8 x i8> @hf16_e4m3_vector() {
@@ -232,7 +232,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: hf16_e5m2_scalar
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half 0xH3C00)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_e5m2_scalar() {
@@ -249,7 +249,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half)
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: hf16_e5m2_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv8_Dh(<8 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv8_Dh(<8 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i8> %[[#Call]]
 
 define spir_func <8 x i8> @hf16_e5m2_vector() {
@@ -266,7 +266,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: bf16_e4m3_scalar
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bfloat 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_e4m3_scalar() {
@@ -283,7 +283,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bf
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: bf16_e4m3_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i8> %[[#Call]]
 
 define spir_func <8 x i8> @bf16_e4m3_vector() {
@@ -300,7 +300,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: bf16_e5m2_scalar
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bfloat 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_e5m2_scalar() {
@@ -317,7 +317,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bf
 ; CHECK-SPIRV: ReturnValue [[#Cast1]]
 
 ; CHECK-LLVM-LABEL: bf16_e5m2_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i8> %[[#Call]]
 
 define spir_func <8 x i8> @bf16_e5m2_vector() {
diff --git a/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll b/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
index 5a377a6bc..c421df157 100644
--- a/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
+++ b/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
@@ -27,7 +27,7 @@ entry:
  %0 = atomicrmw fsub ptr addrspace(1) @f, half 1.0e+00 seq_cst
 ; CHECK-SPIRV: FNegate [[Half]] [[NegateValue:[0-9]+]] [[HalfValue]]
 ; CHECK-SPIRV: AtomicFAddEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[ScopeCrossDevice]] [[MemSem_SequentiallyConsistent]] [[NegateValue]]
-; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg half 0xH3C00
+; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg half 1.000000e+00
 ; CHECK-LLVM: call spir_func half {{.*}}atomic_add{{.*}}(ptr addrspace(1) @f, half [[FNegateLLVM]])
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_float4/conversions_packed.ll b/test/extensions/INTEL/SPV_INTEL_float4/conversions_packed.ll
index 26964f9b7..c8ba62344 100644
--- a/test/extensions/INTEL/SPV_INTEL_float4/conversions_packed.ll
+++ b/test/extensions/INTEL/SPV_INTEL_float4/conversions_packed.ll
@@ -106,7 +106,7 @@ declare dso_local spir_func <8 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_32
-; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <8 x i4> %[[#Call]] to i32
 ; CHECK-LLVM: ret i32 %[[#Cast]]
 
@@ -145,7 +145,7 @@ declare dso_local spir_func <2 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_8
-; CHECK-LLVM: %[[#Call:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv2_Dh(<2 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv2_Dh(<2 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <2 x i4> %[[#Call]] to i8
 ; CHECK-LLVM: ret i8 %[[#Cast]]
 
@@ -228,7 +228,7 @@ declare dso_local spir_func <4 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_16
-; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to i16
 ; CHECK-LLVM: ret i16 %[[#Cast]]
 
@@ -248,7 +248,7 @@ declare dso_local spir_func i16 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_D
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_64
-; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_Dh(<16 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_Dh(<16 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <16 x i4> %[[#Call]] to i64
 ; CHECK-LLVM: ret i64 %[[#Cast]]
 
@@ -268,7 +268,7 @@ declare dso_local spir_func i64 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_vec2xi8
-; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to <2 x i8>
 ; CHECK-LLVM: ret <2 x i8> %[[#Cast]]
 
diff --git a/test/extensions/INTEL/SPV_INTEL_float4/conversions_scalar_vector.ll b/test/extensions/INTEL/SPV_INTEL_float4/conversions_scalar_vector.ll
index e783fad32..098d1679f 100644
--- a/test/extensions/INTEL/SPV_INTEL_float4/conversions_scalar_vector.ll
+++ b/test/extensions/INTEL/SPV_INTEL_float4/conversions_scalar_vector.ll
@@ -211,7 +211,7 @@ declare dso_local spir_func <8 x bfloat> @_Z38__builtin_spirv_ConvertE2M1ToBF16I
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_scalar
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(half 0xH3C00)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(half 1.000000e+00)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @hf16_fp4e2m1_scalar() {
@@ -228,7 +228,7 @@ declare dso_local spir_func i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(hal
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i4> %[[#Call]]
 
 define spir_func <8 x i4> @hf16_fp4e2m1_vector() {
@@ -245,7 +245,7 @@ declare dso_local spir_func <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_fp4e2m1_scalar
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(bfloat 1.000000e+00)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @bf16_fp4e2m1_scalar() {
@@ -262,7 +262,7 @@ declare dso_local spir_func i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_fp4e2m1_vector
-; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
+; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
 ; CHECK-LLVM: ret <8 x i4> %[[#Call]]
 
 define spir_func <8 x i4> @bf16_fp4e2m1_vector() {
diff --git a/test/extensions/INTEL/SPV_INTEL_fp_conversions/spv_intel_fp_conversions.ll b/test/extensions/INTEL/SPV_INTEL_fp_conversions/spv_intel_fp_conversions.ll
index 5de60ef33..bd722c6ea 100644
--- a/test/extensions/INTEL/SPV_INTEL_fp_conversions/spv_intel_fp_conversions.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fp_conversions/spv_intel_fp_conversions.ll
@@ -66,7 +66,7 @@ target triple = "spir-unknown-unknown"
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_hf8_clamp
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELDh(half 0xH3C00)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELDh(half 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_hf8_clamp() {
@@ -83,7 +83,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELD
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_bf8_clamp
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELDh(half 0xH3C00)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELDh(half 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_bf8_clamp() {
@@ -100,7 +100,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELD
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_hf8_clamp
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELDF16b(bfloat 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_hf8_clamp() {
@@ -117,7 +117,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELD
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_bf8_clamp
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELDF16b(bfloat 1.000000e+00)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_bf8_clamp() {
@@ -134,7 +134,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELD
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_bf8_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhi(half 0xH3C00, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhi(half 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_bf8_stochastic() {
@@ -151,7 +151,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INT
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_hf8_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INTELDhi(half 0xH3C00, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INTELDhi(half 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_hf8_stochastic() {
@@ -168,7 +168,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INT
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_bf8_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INTELDF16bi(bfloat 0xR3F80, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INTELDF16bi(bfloat 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_bf8_stochastic() {
@@ -185,7 +185,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INT
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_hf8_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INTELDF16bi(bfloat 0xR3F80, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INTELDF16bi(bfloat 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_hf8_stochastic() {
@@ -202,7 +202,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INT
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_fp4e2m1_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INTELDhi(half 0xH3C00, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INTELDhi(half 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @hf16_fp4e2m1_stochastic() {
@@ -219,7 +219,7 @@ declare dso_local spir_func i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INT
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_fp4e2m1_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INTELDF16bi(bfloat 0xR3F80, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INTELDF16bi(bfloat 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @bf16_fp4e2m1_stochastic() {
@@ -235,7 +235,7 @@ declare dso_local spir_func i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INT
 ; CHECK-SPIRV: ReturnValue [[#Conv]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhi(half 0xH3C00, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhi(half 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @hf16_int4_stochastic() {
@@ -251,7 +251,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToIn
 ; CHECK-SPIRV: ReturnValue [[#Conv]]
 
 ; CHECK-LLVM-LABEL: bf16_int4_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToInt4INTELDF16bi(bfloat 0xR3F80, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToInt4INTELDF16bi(bfloat 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @bf16_int4_stochastic() {
@@ -268,7 +268,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToIn
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_bf8_clamp_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhi(half 0xH3C00, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhi(half 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_bf8_clamp_stochastic() {
@@ -285,7 +285,7 @@ declare dso_local spir_func i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: bf16_bf8_clamp_stochastic
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5M2INTELDF16bi(bfloat 0xR3F80, i32 1)
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5M2INTELDF16bi(bfloat 1.000000e+00, i32 1)
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @bf16_bf8_clamp_stochastic() {
@@ -304,7 +304,7 @@ declare dso_local spir_func i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5
 
 ; CHECK-LLVM-LABEL: hf16_bf8_stochastic_last_seed
 ; CHECK-LLVM: %[[#Ptr:]] = alloca i32
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_bf8_stochastic_last_seed() {
@@ -323,7 +323,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INT
 
 ; CHECK-LLVM-LABEL: hf16_int4_stochastic_last_seed
 ; CHECK-LLVM: %[[#Ptr:]] = alloca i32
-; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
+; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
 ; CHECK-LLVM: ret i4 %[[#Call]]
 
 define spir_func i4 @hf16_int4_stochastic_last_seed() {
@@ -343,7 +343,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToIn
 
 ; CHECK-LLVM-LABEL: hf16_bf8_clamp_stochastic_last_seed
 ; CHECK-LLVM: %[[#Ptr:]] = alloca i32
-; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
+; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
 ; CHECK-LLVM: ret i8 %[[#Call]]
 
 define spir_func i8 @hf16_bf8_clamp_stochastic_last_seed() {
diff --git a/test/extensions/INTEL/SPV_INTEL_int4/conversions_packed.ll b/test/extensions/INTEL/SPV_INTEL_int4/conversions_packed.ll
index 9d94595e8..208dd077e 100644
--- a/test/extensions/INTEL/SPV_INTEL_int4/conversions_packed.ll
+++ b/test/extensions/INTEL/SPV_INTEL_int4/conversions_packed.ll
@@ -110,7 +110,7 @@ declare dso_local spir_func <8 x i8> @_Z38__builtin_spirv_ConvertInt4ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_32
-; CHECK-LLVM: %[[#Conv:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv8_Dh(<8 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Conv:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv8_Dh(<8 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: [[#Cast:]] = bitcast <8 x i4> %[[#Conv]] to i32
 ; CHECK-LLVM: ret i32 %[[#Cast]]
 
@@ -151,7 +151,7 @@ declare dso_local spir_func <2 x i8> @_Z38__builtin_spirv_ConvertInt4ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_8
-; CHECK-LLVM: %[[#Conv:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv2_Dh(<2 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Conv:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv2_Dh(<2 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: [[#Cast:]] = bitcast <2 x i4> %[[#Conv]] to i8
 ; CHECK-LLVM: ret i8 %[[#Cast]]
 
@@ -235,7 +235,7 @@ declare dso_local spir_func <4 x i8> @_Z38__builtin_spirv_ConvertInt4ToE4M3INTEL
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_16
-; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to i16
 ; CHECK-LLVM: ret i16 %[[#Cast]]
 
@@ -255,7 +255,7 @@ declare dso_local spir_func i16 @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv4_D
 ; CHECK-SPIRV: ReturnValue [[#Cast2]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_64
-; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv16_Dh(<16 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv16_Dh(<16 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <16 x i4> %[[#Call]] to i64
 ; CHECK-LLVM: ret i64 %[[#Cast]]
 
@@ -275,7 +275,7 @@ declare dso_local spir_func i64 @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv16_
 ; CHECK-SPIRV: ReturnValue [[#Cast]]
 
 ; CHECK-LLVM-LABEL: hf16_int4_vec2xi8
-; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
+; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToInt4INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
 ; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to <2 x i8>
 ; CHECK-LLVM: ret <2 x i8> %[[#Cast]]
 
diff --git a/test/extensions/INTEL/SPV_INTEL_sigmoid/sigmoid_f16.ll b/test/extensions/INTEL/SPV_INTEL_sigmoid/sigmoid_f16.ll
index 103d59d88..2ac1e7056 100644
--- a/test/extensions/INTEL/SPV_INTEL_sigmoid/sigmoid_f16.ll
+++ b/test/extensions/INTEL/SPV_INTEL_sigmoid/sigmoid_f16.ll
@@ -28,7 +28,7 @@ target triple = "spir64-unknown-unknown"
 
 ; CHECK-LLVM: call spir_func half @_Z21__spirv_FSigmoidINTELDh(half
 ; CHECK-LLVM: call spir_func <8 x half> @_Z21__spirv_FSigmoidINTELDv8_Dh(<8 x half>
-; CHECK-LLVM: call spir_func half @_Z21__spirv_FSigmoidINTELDh(half 0xH3C00)
+; CHECK-LLVM: call spir_func half @_Z21__spirv_FSigmoidINTELDh(half 1.000000e+00)
 
 define spir_func void @_Z2opffv8(half %a, <8 x half> %in) {
   %1 = tail call spir_func half @_Z21__spirv_FSigmoidINTELDh(half %a)
diff --git a/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll b/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
index cfd8f44d8..bac55334b 100644
--- a/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
+++ b/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
@@ -21,7 +21,7 @@
 ; CHECK-SPIRV-DAG: Constant [[#BFloatTy]] [[#]] 16256
 ; CHECK-SPIRV: CompositeConstruct [[#MatTy]]
 
-; CHECK-LLVM: call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDF16b(bfloat 0xR3F80)
+; CHECK-LLVM: call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDF16b(bfloat 1.000000e+00)
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
diff --git a/test/extensions/KHR/SPV_KHR_cooperative_matrix/conversion_instructions.ll b/test/extensions/KHR/SPV_KHR_cooperative_matrix/conversion_instructions.ll
index f6ed4815d..08e6d9123 100644
--- a/test/extensions/KHR/SPV_KHR_cooperative_matrix/conversion_instructions.ll
+++ b/test/extensions/KHR/SPV_KHR_cooperative_matrix/conversion_instructions.ll
@@ -5,7 +5,7 @@
 ; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
 
 ; RUN: llvm-spirv -r --spirv-target-env=SPV-IR %t.spv -o %t.rev.bc
-; RUN: llvm-dis %t.rev.bc
+; RUN: llvm-dis %t.rev.bc 
 ; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM
 
 ; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_KHR_cooperative_matrix,+SPV_KHR_untyped_pointers -o %t.spv
@@ -130,7 +130,7 @@ entry:
 ; CHECK-SPIRV: CompositeConstruct [[#MatrixTypeFloat16]] [[#MatrixIn:]] [[#]] {{$}}
 ; CHECK-SPIRV: FConvert [[#MatrixTypeFloat]] [[#]] [[#MatrixIn]]
 
-; CHECK-LLVM: %[[#Matrix:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0xH0000)
+; CHECK-LLVM: %[[#Matrix:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0.000000e+00)
 ; CHECK-LLVM: call spir_func target("spirv.CooperativeMatrixKHR", float, 3, 12, 12, 2) @_Z75__spirv_FConvert_RPU3AS145__spirv_CooperativeMatrixKHR__float_3_12_12_2_satPU3AS144__spirv_CooperativeMatrixKHR__half_3_12_12_2(target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) %[[#Matrix]])
 
 define void @f_convert() {
diff --git a/test/extensions/KHR/SPV_KHR_subgroup_rotate/SPV_KHR_subgroup_rotate.cl b/test/extensions/KHR/SPV_KHR_subgroup_rotate/SPV_KHR_subgroup_rotate.cl
index aaf418aee..3dcdc13e5 100644
--- a/test/extensions/KHR/SPV_KHR_subgroup_rotate/SPV_KHR_subgroup_rotate.cl
+++ b/test/extensions/KHR/SPV_KHR_subgroup_rotate/SPV_KHR_subgroup_rotate.cl
@@ -226,11 +226,11 @@ kernel void testRotateFloat(global float* dst)
 
 // CHECK-COMMON-LABEL: @testRotateHalf
 
-// CHECK-LLVM: call spir_func half @_Z16sub_group_rotateDhi(half 0xH0000, i32 2)
-// CHECK-LLVM: call spir_func half @_Z26sub_group_clustered_rotateDhij(half 0xH0000, i32 2, i32 4)
+// CHECK-LLVM: call spir_func half @_Z16sub_group_rotateDhi(half 0.000000e+00, i32 2)
+// CHECK-LLVM: call spir_func half @_Z26sub_group_clustered_rotateDhij(half 0.000000e+00, i32 2, i32 4)
 
-// CHECK-SPV-IR: call spir_func half @_Z32__spirv_GroupNonUniformRotateKHRiDhi(i32 3, half 0xH0000, i32 2)
-// CHECK-SPV-IR: call spir_func half @_Z32__spirv_GroupNonUniformRotateKHRiDhij(i32 3, half 0xH0000, i32 2, i32 4)
+// CHECK-SPV-IR: call spir_func half @_Z32__spirv_GroupNonUniformRotateKHRiDhi(i32 3, half 0.000000e+00, i32 2)
+// CHECK-SPV-IR: call spir_func half @_Z32__spirv_GroupNonUniformRotateKHRiDhij(i32 3, half 0.000000e+00, i32 2, i32 4)
 kernel void testRotateHalf(global half* dst)
 {
     half v = 0;
diff --git a/test/extensions/KHR/SPV_KHR_uniform_group_instructions/group-instructions.ll b/test/extensions/KHR/SPV_KHR_uniform_group_instructions/group-instructions.ll
index 1c6a2659a..548c6b0b4 100644
--- a/test/extensions/KHR/SPV_KHR_uniform_group_instructions/group-instructions.ll
+++ b/test/extensions/KHR/SPV_KHR_uniform_group_instructions/group-instructions.ll
@@ -43,7 +43,7 @@
 ; CHECK-LLVM: call spir_func i32 @_Z28work_group_reduce_logical_ori(i32 0)
 ; CHECK-LLVM: call spir_func i32 @_Z29work_group_reduce_logical_xori(i32 0)
 ; CHECK-LLVM: call spir_func i32 @_Z21work_group_reduce_muli(i32 0)
-; CHECK-LLVM: call spir_func half @_Z21work_group_reduce_mulDh(half 0xH0000)
+; CHECK-LLVM: call spir_func half @_Z21work_group_reduce_mulDh(half 0.000000e+00)
 
 ; CHECK-LLVM-SPIRV: %call1 = call spir_func i32 @_Z26__spirv_GroupBitwiseAndKHR{{.*}}(i32 2, i32 0, i32 0)
 ; CHECK-LLVM-SPIRV: %call2 = call spir_func i32 @_Z25__spirv_GroupBitwiseOrKHR{{.*}}(i32 2, i32 0, i32 0)
@@ -52,7 +52,7 @@
 ; CHECK-LLVM-SPIRV: %call5 = call spir_func i1 @_Z25__spirv_GroupLogicalOrKHR{{.*}}(i32 2, i32 0, i1 false)
 ; CHECK-LLVM-SPIRV: %call6 = call spir_func i1 @_Z26__spirv_GroupLogicalXorKHR{{.*}}(i32 2, i32 0, i1 false)
 ; CHECK-LLVM-SPIRV: %call7 = call spir_func i32 @_Z20__spirv_GroupIMulKHR{{.*}}(i32 2, i32 0, i32 0)
-; CHECK-LLVM-SPIRV: %call8 = call spir_func half @_Z20__spirv_GroupFMulKHR{{.*}}(i32 2, i32 0, half 0xH0000)
+; CHECK-LLVM-SPIRV: %call8 = call spir_func half @_Z20__spirv_GroupFMulKHR{{.*}}(i32 2, i32 0, half 0.000000e+00)
 
 ; ModuleID = 'source.bc'
 source_filename = "group_operations.cpp"
diff --git a/test/transcoding/OpImageSampleExplicitLod_arg.cl b/test/transcoding/OpImageSampleExplicitLod_arg.cl
index ae1e8823b..63415f135 100644
--- a/test/transcoding/OpImageSampleExplicitLod_arg.cl
+++ b/test/transcoding/OpImageSampleExplicitLod_arg.cl
@@ -33,5 +33,5 @@ void __kernel sample_kernel_read( __global float4 *results,
 // CHECK-SPIRV: ImageSampleExplicitLod {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 4 [[dx]] [[dy]]
 
 // CHECK-LLVM: call spir_func <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_f(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 0) %image, target("spirv.Sampler") %imageSampler, <2 x float> %coord)
-// CHECK-LLVM: call spir_func <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_ff(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 0) %image, target("spirv.Sampler") %imageSampler, <2 x float> %coord, float 0x40091EB860000000)
+// CHECK-LLVM: call spir_func <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_ff(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 0) %image, target("spirv.Sampler") %imageSampler, <2 x float> %coord, float 3.140000e+00)
 // CHECK-LLVM: call spir_func <4 x float> @_Z11read_imagef14ocl_image2d_ro11ocl_samplerDv2_fS1_S1_(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 0) %image, target("spirv.Sampler") %imageSampler, <2 x float> %coord, <2 x float> %dx, <2 x float> %dy)
diff --git a/test/transcoding/float16.ll b/test/transcoding/float16.ll
index f0c04c4ec..be2e1480c 100644
--- a/test/transcoding/float16.ll
+++ b/test/transcoding/float16.ll
@@ -36,8 +36,8 @@ target triple = "spirv64-unknown-unknown"
 
 ; CHECK-LLVM: %addr = alloca half
 ; CHECK-LLVM: %addr2 = alloca <2 x half>
-; CHECK-LLVM: %{{[a-z0-9]+}} = call spir_func half @_Z5fractDhPDh(half 0xH39C4, ptr %addr)
-; CHECK-LLVM: %{{[a-z0-9]+}} = call spir_func <2 x half> @_Z5fractDv2_DhPS_(<2 x half> <half 0xH39C4, half 0xH0000>, ptr %addr2)
+; CHECK-LLVM: %{{[a-z0-9]+}} = call spir_func half @_Z5fractDhPDh(half 7.207030e-01, ptr %addr)
+; CHECK-LLVM: %{{[a-z0-9]+}} = call spir_func <2 x half> @_Z5fractDv2_DhPS_(<2 x half> <half 7.207030e-01, half 0.000000e+00>, ptr %addr2)
 
 define spir_kernel void @test() {
 entry:
diff --git a/test/transcoding/image_signedness_spv_ir.ll b/test/transcoding/image_signedness_spv_ir.ll
index 99cc56b92..12197799c 100644
--- a/test/transcoding/image_signedness_spv_ir.ll
+++ b/test/transcoding/image_signedness_spv_ir.ll
@@ -67,7 +67,7 @@ define dso_local spir_kernel void @writes() {
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1isi(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, i16 0, i32 4096)
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_2_0_0_0_0_0_1Dv4_iti(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 1) undef, <4 x i32> zeroinitializer, i16 0, i32 8192)
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iDv2_f(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, <2 x float> zeroinitializer)
-; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_1_0_0_0_0_0_1Dv2_iDh(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) undef, <2 x i32> zeroinitializer, half 0xH0000)
+; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_1_0_0_0_0_0_1Dv2_iDh(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) undef, <2 x i32> zeroinitializer, half 0.000000e+00)
 
   call spir_func void @_Z18__spirv_ImageWriteI14ocl_image3d_woDv4_iiEvT_T0_T1_(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 1) undef, <4 x i32> zeroinitializer, i32 zeroinitializer)
   call spir_func void @_Z18__spirv_ImageWriteI14ocl_image2d_woDv2_iS1_EvT_T0_T1_(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) undef, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer)
@@ -174,7 +174,7 @@ define dso_local spir_kernel void @writes2() {
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1isi(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, i16 0, i32 4096)
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iDv2_ti(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, <2 x i16> zeroinitializer, i32 8192)
 ; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iDv4_f(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, <4 x float> zeroinitializer)
-; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iDh(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, half 0xH0000)
+; CHECK-SPV-IR: call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iDh(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, half 0.000000e+00)
 
   call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_0_0_0_0_0_0_1iii(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 1) undef, i32 0, i32 0, i32 4096)
   call spir_func void @_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_1_0_0_0_0_0_1Dv2_ii(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) undef, <2 x i32> zeroinitializer, i32 0)
diff --git a/test/transcoding/spec_const.ll b/test/transcoding/spec_const.ll
index 157abb96a..3f3a34669 100644
--- a/test/transcoding/spec_const.ll
+++ b/test/transcoding/spec_const.ll
@@ -64,13 +64,13 @@ entry:
   %4 = call i64 @_Z20__spirv_SpecConstantix(i32 4, i64 3)
   store i64 %4, ptr addrspace(1) %l, align 8
 
-  ; CHECK-LLVM: store half 0xH3800, ptr addrspace(1) %h, align 2
-  ; CHECK-LLVM-SPEC: store half 0xH4580, ptr addrspace(1) %h, align 2
+  ; CHECK-LLVM: store half 5.000000e-01, ptr addrspace(1) %h, align 2
+  ; CHECK-LLVM-SPEC: store half 5.500000e+00, ptr addrspace(1) %h, align 2
   %5 = call half @_Z20__spirv_SpecConstantih(i32 5, half 0xH3800)
   store half %5, ptr addrspace(1) %h, align 2
 
   ; CHECK-LLVM: store float 1.250000e+00, ptr addrspace(1) %f, align 4
-  ; CHECK-LLVM-SPEC: store float 0x401A666660000000, ptr addrspace(1) %f, align 4
+  ; CHECK-LLVM-SPEC: store float 6.600000e+00, ptr addrspace(1) %f, align 4
   %6 = call float @_Z20__spirv_SpecConstantif(i32 6, float 1.250000e+00)
   store float %6, ptr addrspace(1) %f, align 4
 
diff --git a/test/transcoding/sub_group_clustered_reduce.ll b/test/transcoding/sub_group_clustered_reduce.ll
index 3c0c6d128..41ad41f4f 100644
--- a/test/transcoding/sub_group_clustered_reduce.ll
+++ b/test/transcoding/sub_group_clustered_reduce.ll
@@ -1,7 +1,7 @@
 ;; #pragma OPENCL EXTENSION cl_khr_subgroup_clustered_reduce : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp16 : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp64 : enable
-;;
+;; 
 ;; kernel void testClusteredArithmeticChar(global char* dst)
 ;; {
 ;;     char v = 0;
@@ -10,7 +10,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticUChar(global uchar* dst)
 ;; {
 ;;     uchar v = 0;
@@ -19,7 +19,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticShort(global short* dst)
 ;; {
 ;;     short v = 0;
@@ -28,7 +28,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticUShort(global ushort* dst)
 ;; {
 ;;     ushort v = 0;
@@ -37,7 +37,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticInt(global int* dst)
 ;; {
 ;;     int v = 0;
@@ -46,7 +46,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticUInt(global uint* dst)
 ;; {
 ;;     uint v = 0;
@@ -55,7 +55,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticLong(global long* dst)
 ;; {
 ;;     long v = 0;
@@ -64,7 +64,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticULong(global ulong* dst)
 ;; {
 ;;     ulong v = 0;
@@ -73,7 +73,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticFloat(global float* dst)
 ;; {
 ;;     float v = 0;
@@ -82,7 +82,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticHalf(global half* dst)
 ;; {
 ;;     half v = 0;
@@ -91,7 +91,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredArithmeticDouble(global double* dst)
 ;; {
 ;;     double v = 0;
@@ -100,7 +100,7 @@
 ;;     dst[2] = sub_group_clustered_reduce_min(v, 2);
 ;;     dst[3] = sub_group_clustered_reduce_max(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseChar(global char* dst)
 ;; {
 ;;     char v = 0;
@@ -108,7 +108,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseUChar(global uchar* dst)
 ;; {
 ;;     uchar v = 0;
@@ -116,7 +116,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseShort(global short* dst)
 ;; {
 ;;     short v = 0;
@@ -124,7 +124,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseUShort(global ushort* dst)
 ;; {
 ;;     ushort v = 0;
@@ -132,7 +132,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseInt(global int* dst)
 ;; {
 ;;     int v = 0;
@@ -140,7 +140,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseUInt(global uint* dst)
 ;; {
 ;;     uint v = 0;
@@ -148,7 +148,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseLong(global long* dst)
 ;; {
 ;;     long v = 0;
@@ -156,7 +156,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredBitwiseULong(global ulong* dst)
 ;; {
 ;;     ulong v = 0;
@@ -164,7 +164,7 @@
 ;;     dst[1] = sub_group_clustered_reduce_or(v, 2);
 ;;     dst[2] = sub_group_clustered_reduce_xor(v, 2);
 ;; }
-;;
+;; 
 ;; kernel void testClusteredLogical(global int* dst)
 ;; {
 ;;     int v = 0;
@@ -645,15 +645,15 @@ declare dso_local spir_func float @_Z30sub_group_clustered_reduce_maxfj(float, i
 
 ; CHECK-COMMON-LABEL: @testClusteredArithmeticHalf
 
-; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_addDhj(half 0xH0000, i32 2)
-; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_mulDhj(half 0xH0000, i32 2)
-; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_minDhj(half 0xH0000, i32 2)
-; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_maxDhj(half 0xH0000, i32 2)
+; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_addDhj(half 0.000000e+00, i32 2)
+; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_mulDhj(half 0.000000e+00, i32 2)
+; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_minDhj(half 0.000000e+00, i32 2)
+; CHECK-LLVM: call spir_func half @_Z30sub_group_clustered_reduce_maxDhj(half 0.000000e+00, i32 2)
 
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDhj(i32 3, i32 3, half 0xH0000, i32 2)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDhj(i32 3, i32 3, half 0xH0000, i32 2)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDhj(i32 3, i32 3, half 0xH0000, i32 2)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDhj(i32 3, i32 3, half 0xH0000, i32 2)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDhj(i32 3, i32 3, half 0.000000e+00, i32 2)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDhj(i32 3, i32 3, half 0.000000e+00, i32 2)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDhj(i32 3, i32 3, half 0.000000e+00, i32 2)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDhj(i32 3, i32 3, half 0.000000e+00, i32 2)
 
 ; Function Attrs: convergent nounwind
 define dso_local spir_kernel void @testClusteredArithmeticHalf(ptr addrspace(1) captures(none)) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !26 !kernel_arg_base_type !26 !kernel_arg_type_qual !6 {
diff --git a/test/transcoding/sub_group_non_uniform_arithmetic.ll b/test/transcoding/sub_group_non_uniform_arithmetic.ll
index 602be87b9..451aa48c2 100644
--- a/test/transcoding/sub_group_non_uniform_arithmetic.ll
+++ b/test/transcoding/sub_group_non_uniform_arithmetic.ll
@@ -1,7 +1,7 @@
 ;; #pragma OPENCL EXTENSION cl_khr_subgroup_non_uniform_arithmetic : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp16 : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp64 : enable
-;;
+;; 
 ;; kernel void testNonUniformArithmeticChar(global char* dst)
 ;; {
 ;;     char v = 0;
@@ -18,7 +18,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticUChar(global uchar* dst)
 ;; {
 ;;     uchar v = 0;
@@ -35,7 +35,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticShort(global short* dst)
 ;; {
 ;;     short v = 0;
@@ -52,7 +52,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticUShort(global ushort* dst)
 ;; {
 ;;     ushort v = 0;
@@ -69,7 +69,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticInt(global int* dst)
 ;; {
 ;;     int v = 0;
@@ -86,7 +86,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticUInt(global uint* dst)
 ;; {
 ;;     uint v = 0;
@@ -103,7 +103,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticLong(global long* dst)
 ;; {
 ;;     long v = 0;
@@ -120,7 +120,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticULong(global ulong* dst)
 ;; {
 ;;     ulong v = 0;
@@ -137,7 +137,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticFloat(global float* dst)
 ;; {
 ;;     float v = 0;
@@ -154,7 +154,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticHalf(global half* dst)
 ;; {
 ;;     half v = 0;
@@ -171,7 +171,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformArithmeticDouble(global double* dst)
 ;; {
 ;;     double v = 0;
@@ -188,7 +188,7 @@
 ;;     dst[10] = sub_group_non_uniform_scan_exclusive_min(v);
 ;;     dst[11] = sub_group_non_uniform_scan_exclusive_max(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformBitwiseChar(global char* dst)
 ;; {
 ;;     char v = 0;
@@ -293,7 +293,7 @@
 ;;     dst[7] = sub_group_non_uniform_scan_exclusive_or(v);
 ;;     dst[8] = sub_group_non_uniform_scan_exclusive_xor(v);
 ;; }
-;;
+;; 
 ;; kernel void testNonUniformLogical(global int* dst)
 ;; {
 ;;     int v = 0;
@@ -1435,31 +1435,31 @@ declare dso_local spir_func float @_Z40sub_group_non_uniform_scan_exclusive_maxf
 
 ; CHECK-COMMON-LABEL: @testNonUniformArithmeticHalf
 
-; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_addDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_mulDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_minDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_maxDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_addDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_mulDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_minDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_maxDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_addDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_mulDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_minDh(half 0xH0000)
-; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_maxDh(half 0xH0000)
-
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 0, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 0, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 0, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 0, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 1, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 1, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 1, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 1, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 2, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 2, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 2, half 0xH0000)
-; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 2, half 0xH0000)
+; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_addDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_mulDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_minDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z32sub_group_non_uniform_reduce_maxDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_addDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_mulDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_minDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_inclusive_maxDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_addDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_mulDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_minDh(half 0.000000e+00)
+; CHECK-LLVM: call spir_func half @_Z40sub_group_non_uniform_scan_exclusive_maxDh(half 0.000000e+00)
+
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 0, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 0, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 0, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 0, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 1, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 1, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 1, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 1, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFAddiiDh(i32 3, i32 2, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMuliiDh(i32 3, i32 2, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMiniiDh(i32 3, i32 2, half 0.000000e+00)
+; CHECK-SPV-IR: call spir_func half @_Z27__spirv_GroupNonUniformFMaxiiDh(i32 3, i32 2, half 0.000000e+00)
 
 ; Function Attrs: convergent nounwind
 define dso_local spir_kernel void @testNonUniformArithmeticHalf(ptr addrspace(1) captures(none)) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !26 !kernel_arg_base_type !26 !kernel_arg_type_qual !6 {
diff --git a/test/transcoding/sub_group_shuffle.ll b/test/transcoding/sub_group_shuffle.ll
index 2bce03bb4..90ec61a6c 100644
--- a/test/transcoding/sub_group_shuffle.ll
+++ b/test/transcoding/sub_group_shuffle.ll
@@ -1,77 +1,77 @@
 ;; #pragma OPENCL EXTENSION cl_khr_subgroup_shuffle : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp16 : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp64 : enable
-;;
+;; 
 ;; kernel void testShuffleChar(global char* dst)
 ;; {
 ;; 	char v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleUChar(global uchar* dst)
 ;; {
 ;; 	uchar v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleShort(global short* dst)
 ;; {
 ;; 	short v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleUShort(global ushort* dst)
 ;; {
 ;; 	ushort v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleInt(global int* dst)
 ;; {
 ;; 	int v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleUInt(global uint* dst)
 ;; {
 ;; 	uint v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleLong(global long* dst)
 ;; {
 ;; 	long v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleULong(global ulong* dst)
 ;; {
 ;; 	ulong v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleFloat(global float* dst)
 ;; {
 ;; 	float v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleHalf(global half* dst)
 ;; {
 ;; 	half v = 0;
 ;;     dst[0] = sub_group_shuffle( v, 0 );
 ;;     dst[1] = sub_group_shuffle_xor( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleDouble(global double* dst)
 ;; {
 ;; 	double v = 0;
@@ -384,11 +384,11 @@ declare dso_local spir_func float @_Z21sub_group_shuffle_xorfj(float, i32) local
 
 ; CHECK-COMMON-LABEL: @testShuffleHalf
 
-; CHECK-LLVM: call spir_func half @_Z17sub_group_shuffleDhj(half 0xH0000, i32 0)
-; CHECK-LLVM: call spir_func half @_Z21sub_group_shuffle_xorDhj(half 0xH0000, i32 0)
+; CHECK-LLVM: call spir_func half @_Z17sub_group_shuffleDhj(half 0.000000e+00, i32 0)
+; CHECK-LLVM: call spir_func half @_Z21sub_group_shuffle_xorDhj(half 0.000000e+00, i32 0)
 
-; CHECK-SPV-IR: call spir_func half @_Z30__spirv_GroupNonUniformShuffleiDhj(i32 3, half 0xH0000, i32 0)
-; CHECK-SPV-IR: call spir_func half @_Z33__spirv_GroupNonUniformShuffleXoriDhj(i32 3, half 0xH0000, i32 0)
+; CHECK-SPV-IR: call spir_func half @_Z30__spirv_GroupNonUniformShuffleiDhj(i32 3, half 0.000000e+00, i32 0)
+; CHECK-SPV-IR: call spir_func half @_Z33__spirv_GroupNonUniformShuffleXoriDhj(i32 3, half 0.000000e+00, i32 0)
 
 ; Function Attrs: convergent nounwind
 define dso_local spir_kernel void @testShuffleHalf(ptr addrspace(1) captures(none)) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !26 !kernel_arg_base_type !26 !kernel_arg_type_qual !6 {
diff --git a/test/transcoding/sub_group_shuffle_relative.ll b/test/transcoding/sub_group_shuffle_relative.ll
index 772da84e4..2c0d1a352 100644
--- a/test/transcoding/sub_group_shuffle_relative.ll
+++ b/test/transcoding/sub_group_shuffle_relative.ll
@@ -1,77 +1,77 @@
 ;; #pragma OPENCL EXTENSION cl_khr_subgroup_shuffle_relative : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp16 : enable
 ;; #pragma OPENCL EXTENSION cl_khr_fp64 : enable
-;;
+;; 
 ;; kernel void testShuffleRelativeChar(global char* dst)
 ;; {
 ;; 	char v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeUChar(global uchar* dst)
 ;; {
 ;; 	uchar v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeShort(global short* dst)
 ;; {
 ;; 	short v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeUShort(global ushort* dst)
 ;; {
 ;; 	ushort v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeInt(global int* dst)
 ;; {
 ;; 	int v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeUInt(global uint* dst)
 ;; {
 ;; 	uint v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeLong(global long* dst)
 ;; {
 ;; 	long v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeULong(global ulong* dst)
 ;; {
 ;; 	ulong v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeFloat(global float* dst)
 ;; {
 ;; 	float v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeHalf(global half* dst)
 ;; {
 ;; 	half v = 0;
 ;;     dst[0] = sub_group_shuffle_up( v, 0 );
 ;;     dst[1] = sub_group_shuffle_down( v, 0 );
 ;; }
-;;
+;; 
 ;; kernel void testShuffleRelativeDouble(global double* dst)
 ;; {
 ;; 	double v = 0;
@@ -345,8 +345,8 @@ declare dso_local spir_func float @_Z22sub_group_shuffle_downfj(float, i32) loca
 ; CHECK-SPIRV: FunctionEnd
 
 ; CHECK-LLVM-LABEL: @testShuffleRelativeHalf
-; CHECK-LLVM: call spir_func half @_Z20sub_group_shuffle_upDhj(half 0xH0000, i32 0)
-; CHECK-LLVM: call spir_func half @_Z22sub_group_shuffle_downDhj(half 0xH0000, i32 0)
+; CHECK-LLVM: call spir_func half @_Z20sub_group_shuffle_upDhj(half 0.000000e+00, i32 0)
+; CHECK-LLVM: call spir_func half @_Z22sub_group_shuffle_downDhj(half 0.000000e+00, i32 0)
 
 ; Function Attrs: convergent nounwind
 define dso_local spir_kernel void @testShuffleRelativeHalf(ptr addrspace(1) captures(none)) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !26 !kernel_arg_base_type !26 !kernel_arg_type_qual !6 {