[AMDGPU] Fix Hot Block Register Renaming assertions on complex IR

Fix two assertions discovered during CI/CT testing with rocBLAS kernels:

1. isVirtRegMovable() crashed on PHI nodes with multiple value definitions.
   Converted assertions to early-return checks, allowing the pass to skip
   unmovable registers instead of crashing on legitimate IR patterns.

2. tryMoveValue() assumed LiveIntervalUnion contains only virtual registers,
   but it can contain physical registers after allocation. Added isVirtual()
   check before calling VirtRegMap::getPhys() to prevent assertion failures.

Both fixes improve robustness without affecting correctness or performance.

Author: michaelselehov

llvm/lib/Target/AMDGPU/AMDGPUHotBlockRegisterRenaming.cpp

@@ -377,10 +377,21 @@ bool AMDGPUHotBlockRegisterRenamingImpl::isVirtRegMovable(Register VirtReg,
     if (S.start >= BBStart && S.end <= BBEnd)
       SegmentCount++;
   }
-  assert(SegmentCount == 1 &&
-         "isVirtRegMovable expects VirtReg with single segment in BB");
-  assert(VirtRegLI.getNumValNums() == 1 &&
-         "isVirtRegMovable expects VirtReg with single value");
+  
+  // Cannot move registers with multiple segments in BB (e.g., PHI nodes)
+  if (SegmentCount != 1) {
+    LLVM_DEBUG(dbgs() << "        Cannot move " << printReg(VirtReg, TRI)
+                      << ": has " << SegmentCount << " segments in BB\n");
+    return false;
+  }
+  
+  // Cannot move registers with multiple definitions (e.g., from PHI merge)
+  if (VirtRegLI.getNumValNums() != 1) {
+    LLVM_DEBUG(dbgs() << "        Cannot move " << printReg(VirtReg, TRI)
+                      << ": has " << VirtRegLI.getNumValNums() 
+                      << " value definitions\n");
+    return false;
+  }
 
   // Check for tied operands
   // A tied operand means the instruction requires source and destination to be
@@ -451,6 +462,14 @@ bool AMDGPUHotBlockRegisterRenamingImpl::tryMoveValue(MCRegister DenseReg,
     for (LiveIntervalUnion::SegmentIter SI = LIU.begin(); SI.valid(); ++SI) {
       Register VirtReg = SI.value()->reg();
 
+      // Skip physical registers (LiveIntervalUnion can contain both)
+      if (!VirtReg.isVirtual())
+        continue;
+
+      // Skip virtual registers that haven't been allocated yet
+      if (!VRM->hasPhys(VirtReg))
+        continue;
+
       // Check if this VirtReg is mapped to DenseReg
       // NOTE: This is NOT redundant! We iterate per register unit, and units
       // can be shared between aliased registers (e.g., VGPR0 and VGPR0_VGPR1).