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ronliebronlieb
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Fix build issues/lit tests
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‎llvm/lib/Target/AMDGPU/AMDGPUHotBlockRegisterRenaming.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -348,7 +348,7 @@ void AMDGPUHotBlockRegisterRenamingImpl::calculateValueDensity(
348348

349349
// Access LiveIntervalUnion for this PhysReg
350350
for (MCRegUnit Unit : TRI->regunits(PhysReg)) {
351-
LiveIntervalUnion &LIU = LRM->getLiveUnions()[Unit];
351+
LiveIntervalUnion &LIU = LRM->getLiveUnions()[static_cast<unsigned>(Unit)];
352352

353353
for (LiveIntervalUnion::SegmentIter SI = LIU.begin(); SI.valid(); ++SI) {
354354
SlotIndex SegStart = SI.start();
@@ -389,7 +389,7 @@ void AMDGPUHotBlockRegisterRenamingImpl::findFreeRegisters(
389389

390390
// Check all register units
391391
for (MCRegUnit Unit : TRI->regunits(PhysReg)) {
392-
LiveIntervalUnion &LIU = LRM->getLiveUnions()[Unit];
392+
LiveIntervalUnion &LIU = LRM->getLiveUnions()[static_cast<unsigned>(Unit)];
393393

394394
// Check if anything is live in this BB
395395
LiveIntervalUnion::SegmentIter SI = LIU.find(BBStart);
@@ -498,7 +498,7 @@ bool AMDGPUHotBlockRegisterRenamingImpl::tryMoveValue(
498498
const DenseMap<MCRegister, SmallVector<SlotIndex, 4>> &PhysRegDefs) {
499499
// Find a movable local value in DenseReg
500500
for (MCRegUnit Unit : TRI->regunits(DenseReg)) {
501-
LiveIntervalUnion &LIU = LRM->getLiveUnions()[Unit];
501+
LiveIntervalUnion &LIU = LRM->getLiveUnions()[static_cast<unsigned>(Unit)];
502502

503503
for (LiveIntervalUnion::SegmentIter SI = LIU.begin(); SI.valid(); ++SI) {
504504
Register VirtReg = SI.value()->reg();

‎llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll‎

Lines changed: 67 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -19,11 +19,11 @@ define amdgpu_kernel void @local_address_load(ptr addrspace(1) %out, ptr addrspa
1919
; GFX7-NEXT: s_mov_b32 m0, -1
2020
; GFX7-NEXT: s_mov_b32 s3, 0xf000
2121
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
22-
; GFX7-NEXT: v_mov_b32_e32 v0, s2
23-
; GFX7-NEXT: ds_read_b32 v0, v0
22+
; GFX7-NEXT: v_mov_b32_e32 v1, s2
23+
; GFX7-NEXT: ds_read_b32 v2, v1
2424
; GFX7-NEXT: s_mov_b32 s2, -1
2525
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
26-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
26+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
2727
; GFX7-NEXT: s_endpgm
2828
;
2929
; GFX8-LABEL: local_address_load:
@@ -33,11 +33,11 @@ define amdgpu_kernel void @local_address_load(ptr addrspace(1) %out, ptr addrspa
3333
; GFX8-NEXT: s_mov_b32 m0, -1
3434
; GFX8-NEXT: s_mov_b32 s3, 0xf000
3535
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
36-
; GFX8-NEXT: v_mov_b32_e32 v0, s2
37-
; GFX8-NEXT: ds_read_b32 v0, v0
36+
; GFX8-NEXT: v_mov_b32_e32 v1, s2
37+
; GFX8-NEXT: ds_read_b32 v2, v1
3838
; GFX8-NEXT: s_mov_b32 s2, -1
3939
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
40-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
40+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
4141
; GFX8-NEXT: s_endpgm
4242
entry:
4343
%0 = load i32, ptr addrspace(3) %in
@@ -53,12 +53,12 @@ define amdgpu_kernel void @local_address_gep(ptr addrspace(1) %out, ptr addrspac
5353
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
5454
; GFX7-NEXT: s_lshl_b32 s3, s3, 2
5555
; GFX7-NEXT: s_add_i32 s2, s2, s3
56-
; GFX7-NEXT: v_mov_b32_e32 v0, s2
57-
; GFX7-NEXT: ds_read_b32 v0, v0
56+
; GFX7-NEXT: v_mov_b32_e32 v1, s2
57+
; GFX7-NEXT: ds_read_b32 v2, v1
5858
; GFX7-NEXT: s_mov_b32 s3, 0xf000
5959
; GFX7-NEXT: s_mov_b32 s2, -1
6060
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
61-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
61+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
6262
; GFX7-NEXT: s_endpgm
6363
;
6464
; GFX8-LABEL: local_address_gep:
@@ -68,12 +68,12 @@ define amdgpu_kernel void @local_address_gep(ptr addrspace(1) %out, ptr addrspac
6868
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
6969
; GFX8-NEXT: s_lshl_b32 s3, s3, 2
7070
; GFX8-NEXT: s_add_i32 s2, s2, s3
71-
; GFX8-NEXT: v_mov_b32_e32 v0, s2
72-
; GFX8-NEXT: ds_read_b32 v0, v0
71+
; GFX8-NEXT: v_mov_b32_e32 v1, s2
72+
; GFX8-NEXT: ds_read_b32 v2, v1
7373
; GFX8-NEXT: s_mov_b32 s3, 0xf000
7474
; GFX8-NEXT: s_mov_b32 s2, -1
7575
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
76-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
76+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
7777
; GFX8-NEXT: s_endpgm
7878
entry:
7979
%0 = getelementptr i32, ptr addrspace(3) %in, i32 %offset
@@ -90,11 +90,11 @@ define amdgpu_kernel void @local_address_gep_const_offset(ptr addrspace(1) %out,
9090
; GFX7-NEXT: s_mov_b32 m0, -1
9191
; GFX7-NEXT: s_mov_b32 s3, 0xf000
9292
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
93-
; GFX7-NEXT: v_mov_b32_e32 v0, s2
94-
; GFX7-NEXT: ds_read_b32 v0, v0 offset:4
93+
; GFX7-NEXT: v_mov_b32_e32 v1, s2
94+
; GFX7-NEXT: ds_read_b32 v2, v1 offset:4
9595
; GFX7-NEXT: s_mov_b32 s2, -1
9696
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
97-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
97+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
9898
; GFX7-NEXT: s_endpgm
9999
;
100100
; GFX8-LABEL: local_address_gep_const_offset:
@@ -104,11 +104,11 @@ define amdgpu_kernel void @local_address_gep_const_offset(ptr addrspace(1) %out,
104104
; GFX8-NEXT: s_mov_b32 m0, -1
105105
; GFX8-NEXT: s_mov_b32 s3, 0xf000
106106
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
107-
; GFX8-NEXT: v_mov_b32_e32 v0, s2
108-
; GFX8-NEXT: ds_read_b32 v0, v0 offset:4
107+
; GFX8-NEXT: v_mov_b32_e32 v1, s2
108+
; GFX8-NEXT: ds_read_b32 v2, v1 offset:4
109109
; GFX8-NEXT: s_mov_b32 s2, -1
110110
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
111-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
111+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
112112
; GFX8-NEXT: s_endpgm
113113
entry:
114114
%0 = getelementptr i32, ptr addrspace(3) %in, i32 1
@@ -127,11 +127,11 @@ define amdgpu_kernel void @local_address_gep_large_const_offset(ptr addrspace(1)
127127
; GFX7-NEXT: s_mov_b32 s3, 0xf000
128128
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
129129
; GFX7-NEXT: s_add_i32 s2, s2, 0x10004
130-
; GFX7-NEXT: v_mov_b32_e32 v0, s2
131-
; GFX7-NEXT: ds_read_b32 v0, v0
130+
; GFX7-NEXT: v_mov_b32_e32 v1, s2
131+
; GFX7-NEXT: ds_read_b32 v2, v1
132132
; GFX7-NEXT: s_mov_b32 s2, -1
133133
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
134-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
134+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
135135
; GFX7-NEXT: s_endpgm
136136
;
137137
; GFX8-LABEL: local_address_gep_large_const_offset:
@@ -142,11 +142,11 @@ define amdgpu_kernel void @local_address_gep_large_const_offset(ptr addrspace(1)
142142
; GFX8-NEXT: s_mov_b32 s3, 0xf000
143143
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
144144
; GFX8-NEXT: s_add_i32 s2, s2, 0x10004
145-
; GFX8-NEXT: v_mov_b32_e32 v0, s2
146-
; GFX8-NEXT: ds_read_b32 v0, v0
145+
; GFX8-NEXT: v_mov_b32_e32 v1, s2
146+
; GFX8-NEXT: ds_read_b32 v2, v1
147147
; GFX8-NEXT: s_mov_b32 s2, -1
148148
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
149-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
149+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
150150
; GFX8-NEXT: s_endpgm
151151
entry:
152152
%0 = getelementptr i32, ptr addrspace(3) %in, i32 16385
@@ -166,8 +166,8 @@ define amdgpu_kernel void @null_32bit_lds_ptr(ptr addrspace(1) %out, ptr addrspa
166166
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
167167
; GFX7-NEXT: s_cmp_lg_u32 s6, 0
168168
; GFX7-NEXT: s_cselect_b32 s4, s4, 0x1c8
169-
; GFX7-NEXT: v_mov_b32_e32 v0, s4
170-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
169+
; GFX7-NEXT: v_mov_b32_e32 v1, s4
170+
; GFX7-NEXT: buffer_store_dword v1, off, s[0:3], 0
171171
; GFX7-NEXT: s_endpgm
172172
;
173173
; GFX8-LABEL: null_32bit_lds_ptr:
@@ -180,8 +180,8 @@ define amdgpu_kernel void @null_32bit_lds_ptr(ptr addrspace(1) %out, ptr addrspa
180180
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
181181
; GFX8-NEXT: s_cmp_lg_u32 s6, 0
182182
; GFX8-NEXT: s_cselect_b32 s4, s4, 0x1c8
183-
; GFX8-NEXT: v_mov_b32_e32 v0, s4
184-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
183+
; GFX8-NEXT: v_mov_b32_e32 v1, s4
184+
; GFX8-NEXT: buffer_store_dword v1, off, s[0:3], 0
185185
; GFX8-NEXT: s_endpgm
186186
%cmp = icmp ne ptr addrspace(3) %lds, null
187187
%x = select i1 %cmp, i32 123, i32 456
@@ -197,12 +197,12 @@ define amdgpu_kernel void @mul_32bit_ptr(ptr addrspace(1) %out, ptr addrspace(3)
197197
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
198198
; GFX7-NEXT: s_mul_i32 s3, s3, 12
199199
; GFX7-NEXT: s_add_i32 s2, s2, s3
200-
; GFX7-NEXT: v_mov_b32_e32 v0, s2
201-
; GFX7-NEXT: ds_read_b32 v0, v0
200+
; GFX7-NEXT: v_mov_b32_e32 v1, s2
201+
; GFX7-NEXT: ds_read_b32 v2, v1
202202
; GFX7-NEXT: s_mov_b32 s3, 0xf000
203203
; GFX7-NEXT: s_mov_b32 s2, -1
204204
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
205-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
205+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
206206
; GFX7-NEXT: s_endpgm
207207
;
208208
; GFX8-LABEL: mul_32bit_ptr:
@@ -212,12 +212,12 @@ define amdgpu_kernel void @mul_32bit_ptr(ptr addrspace(1) %out, ptr addrspace(3)
212212
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
213213
; GFX8-NEXT: s_mul_i32 s3, s3, 12
214214
; GFX8-NEXT: s_add_i32 s2, s2, s3
215-
; GFX8-NEXT: v_mov_b32_e32 v0, s2
216-
; GFX8-NEXT: ds_read_b32 v0, v0
215+
; GFX8-NEXT: v_mov_b32_e32 v1, s2
216+
; GFX8-NEXT: ds_read_b32 v2, v1
217217
; GFX8-NEXT: s_mov_b32 s3, 0xf000
218218
; GFX8-NEXT: s_mov_b32 s2, -1
219219
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
220-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
220+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
221221
; GFX8-NEXT: s_endpgm
222222
%ptr = getelementptr [3 x float], ptr addrspace(3) %lds, i32 %tid, i32 0
223223
%val = load float, ptr addrspace(3) %ptr
@@ -230,26 +230,26 @@ define amdgpu_kernel void @mul_32bit_ptr(ptr addrspace(1) %out, ptr addrspace(3)
230230
define amdgpu_kernel void @infer_ptr_alignment_global_offset(ptr addrspace(1) %out, i32 %tid) {
231231
; GFX7-LABEL: infer_ptr_alignment_global_offset:
232232
; GFX7: ; %bb.0:
233-
; GFX7-NEXT: v_mov_b32_e32 v0, 0
233+
; GFX7-NEXT: v_mov_b32_e32 v1, 0
234234
; GFX7-NEXT: s_mov_b32 m0, -1
235235
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
236-
; GFX7-NEXT: ds_read_b32 v0, v0
236+
; GFX7-NEXT: ds_read_b32 v2, v1
237237
; GFX7-NEXT: s_mov_b32 s3, 0xf000
238238
; GFX7-NEXT: s_mov_b32 s2, -1
239239
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
240-
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
240+
; GFX7-NEXT: buffer_store_dword v2, off, s[0:3], 0
241241
; GFX7-NEXT: s_endpgm
242242
;
243243
; GFX8-LABEL: infer_ptr_alignment_global_offset:
244244
; GFX8: ; %bb.0:
245-
; GFX8-NEXT: v_mov_b32_e32 v0, 0
245+
; GFX8-NEXT: v_mov_b32_e32 v1, 0
246246
; GFX8-NEXT: s_mov_b32 m0, -1
247247
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
248-
; GFX8-NEXT: ds_read_b32 v0, v0
248+
; GFX8-NEXT: ds_read_b32 v2, v1
249249
; GFX8-NEXT: s_mov_b32 s3, 0xf000
250250
; GFX8-NEXT: s_mov_b32 s2, -1
251251
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
252-
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
252+
; GFX8-NEXT: buffer_store_dword v2, off, s[0:3], 0
253253
; GFX8-NEXT: s_endpgm
254254
%val = load float, ptr addrspace(3) @g_lds
255255
store float %val, ptr addrspace(1) %out
@@ -262,10 +262,10 @@ define amdgpu_kernel void @infer_ptr_alignment_global_offset(ptr addrspace(1) %o
262262
define amdgpu_kernel void @global_ptr() nounwind {
263263
; SI-LABEL: global_ptr:
264264
; SI: ; %bb.0:
265-
; SI-NEXT: v_mov_b32_e32 v0, 64
266-
; SI-NEXT: v_mov_b32_e32 v1, 0
265+
; SI-NEXT: v_mov_b32_e32 v3, 64
266+
; SI-NEXT: v_mov_b32_e32 v2, 0
267267
; SI-NEXT: s_mov_b32 m0, -1
268-
; SI-NEXT: ds_write_b32 v1, v0 offset:65532
268+
; SI-NEXT: ds_write_b32 v2, v3 offset:65532
269269
; SI-NEXT: s_endpgm
270270
store ptr addrspace(3) getelementptr ([16383 x i32], ptr addrspace(3) @dst, i32 0, i32 16), ptr addrspace(3) @ptr
271271
ret void
@@ -277,19 +277,19 @@ define amdgpu_kernel void @local_address_store(ptr addrspace(3) %out, i32 %val)
277277
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
278278
; GFX7-NEXT: s_mov_b32 m0, -1
279279
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
280-
; GFX7-NEXT: v_mov_b32_e32 v0, s0
281-
; GFX7-NEXT: v_mov_b32_e32 v1, s1
282-
; GFX7-NEXT: ds_write_b32 v0, v1
280+
; GFX7-NEXT: v_mov_b32_e32 v3, s0
281+
; GFX7-NEXT: v_mov_b32_e32 v2, s1
282+
; GFX7-NEXT: ds_write_b32 v3, v2
283283
; GFX7-NEXT: s_endpgm
284284
;
285285
; GFX8-LABEL: local_address_store:
286286
; GFX8: ; %bb.0:
287287
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
288288
; GFX8-NEXT: s_mov_b32 m0, -1
289289
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
290-
; GFX8-NEXT: v_mov_b32_e32 v0, s0
291-
; GFX8-NEXT: v_mov_b32_e32 v1, s1
292-
; GFX8-NEXT: ds_write_b32 v0, v1
290+
; GFX8-NEXT: v_mov_b32_e32 v3, s0
291+
; GFX8-NEXT: v_mov_b32_e32 v2, s1
292+
; GFX8-NEXT: ds_write_b32 v3, v2
293293
; GFX8-NEXT: s_endpgm
294294
store i32 %val, ptr addrspace(3) %out
295295
ret void
@@ -303,10 +303,10 @@ define amdgpu_kernel void @local_address_gep_store(ptr addrspace(3) %out, i32, i
303303
; GFX7-NEXT: s_mov_b32 m0, -1
304304
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
305305
; GFX7-NEXT: s_lshl_b32 s1, s1, 2
306-
; GFX7-NEXT: v_mov_b32_e32 v0, s0
306+
; GFX7-NEXT: v_mov_b32_e32 v3, s0
307307
; GFX7-NEXT: s_add_i32 s0, s2, s1
308-
; GFX7-NEXT: v_mov_b32_e32 v1, s0
309-
; GFX7-NEXT: ds_write_b32 v1, v0
308+
; GFX7-NEXT: v_mov_b32_e32 v2, s0
309+
; GFX7-NEXT: ds_write_b32 v2, v3
310310
; GFX7-NEXT: s_endpgm
311311
;
312312
; GFX8-LABEL: local_address_gep_store:
@@ -316,10 +316,10 @@ define amdgpu_kernel void @local_address_gep_store(ptr addrspace(3) %out, i32, i
316316
; GFX8-NEXT: s_mov_b32 m0, -1
317317
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
318318
; GFX8-NEXT: s_lshl_b32 s1, s1, 2
319-
; GFX8-NEXT: v_mov_b32_e32 v0, s0
319+
; GFX8-NEXT: v_mov_b32_e32 v3, s0
320320
; GFX8-NEXT: s_add_i32 s0, s2, s1
321-
; GFX8-NEXT: v_mov_b32_e32 v1, s0
322-
; GFX8-NEXT: ds_write_b32 v1, v0
321+
; GFX8-NEXT: v_mov_b32_e32 v2, s0
322+
; GFX8-NEXT: ds_write_b32 v2, v3
323323
; GFX8-NEXT: s_endpgm
324324
%gep = getelementptr i32, ptr addrspace(3) %out, i32 %offset
325325
store i32 %val, ptr addrspace(3) %gep, align 4
@@ -332,19 +332,19 @@ define amdgpu_kernel void @local_address_gep_const_offset_store(ptr addrspace(3)
332332
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
333333
; GFX7-NEXT: s_mov_b32 m0, -1
334334
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
335-
; GFX7-NEXT: v_mov_b32_e32 v0, s0
336-
; GFX7-NEXT: v_mov_b32_e32 v1, s1
337-
; GFX7-NEXT: ds_write_b32 v0, v1 offset:4
335+
; GFX7-NEXT: v_mov_b32_e32 v3, s0
336+
; GFX7-NEXT: v_mov_b32_e32 v2, s1
337+
; GFX7-NEXT: ds_write_b32 v3, v2 offset:4
338338
; GFX7-NEXT: s_endpgm
339339
;
340340
; GFX8-LABEL: local_address_gep_const_offset_store:
341341
; GFX8: ; %bb.0:
342342
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
343343
; GFX8-NEXT: s_mov_b32 m0, -1
344344
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
345-
; GFX8-NEXT: v_mov_b32_e32 v0, s0
346-
; GFX8-NEXT: v_mov_b32_e32 v1, s1
347-
; GFX8-NEXT: ds_write_b32 v0, v1 offset:4
345+
; GFX8-NEXT: v_mov_b32_e32 v3, s0
346+
; GFX8-NEXT: v_mov_b32_e32 v2, s1
347+
; GFX8-NEXT: ds_write_b32 v3, v2 offset:4
348348
; GFX8-NEXT: s_endpgm
349349
%gep = getelementptr i32, ptr addrspace(3) %out, i32 1
350350
store i32 %val, ptr addrspace(3) %gep, align 4
@@ -359,9 +359,9 @@ define amdgpu_kernel void @local_address_gep_large_const_offset_store(ptr addrsp
359359
; GFX7-NEXT: s_mov_b32 m0, -1
360360
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
361361
; GFX7-NEXT: s_add_i32 s0, s0, 0x10004
362-
; GFX7-NEXT: v_mov_b32_e32 v0, s1
363-
; GFX7-NEXT: v_mov_b32_e32 v1, s0
364-
; GFX7-NEXT: ds_write_b32 v1, v0
362+
; GFX7-NEXT: v_mov_b32_e32 v3, s1
363+
; GFX7-NEXT: v_mov_b32_e32 v2, s0
364+
; GFX7-NEXT: ds_write_b32 v2, v3
365365
; GFX7-NEXT: s_endpgm
366366
;
367367
; GFX8-LABEL: local_address_gep_large_const_offset_store:
@@ -370,9 +370,9 @@ define amdgpu_kernel void @local_address_gep_large_const_offset_store(ptr addrsp
370370
; GFX8-NEXT: s_mov_b32 m0, -1
371371
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
372372
; GFX8-NEXT: s_add_i32 s0, s0, 0x10004
373-
; GFX8-NEXT: v_mov_b32_e32 v0, s1
374-
; GFX8-NEXT: v_mov_b32_e32 v1, s0
375-
; GFX8-NEXT: ds_write_b32 v1, v0
373+
; GFX8-NEXT: v_mov_b32_e32 v3, s1
374+
; GFX8-NEXT: v_mov_b32_e32 v2, s0
375+
; GFX8-NEXT: ds_write_b32 v2, v3
376376
; GFX8-NEXT: s_endpgm
377377
%gep = getelementptr i32, ptr addrspace(3) %out, i32 16385
378378
store i32 %val, ptr addrspace(3) %gep, align 4

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