Port layer incoherence with "multiplier" primitive.

[AlexMantilla1]

When we instance a multiplier component as follows:

from glayout import multiplier

kwargs = {
"pdk": gf180,
"width": width,
"length": length,
"fingers": fingers,
"sdlayer": sdlayer,
"dummy": (False, False),
"routing": False,
"sd_route_topmet": "met2",
"inter_finger_topmet": "met2",
}
fet = multiplier(**kwargs)

I would expect to route the S/D terminals with "met2" layer. The function creates the mosfet, in the S/D terminals, it uses met1, met2 and a via1 to connect them, as expected. To make a straight route in met2 from this S/D terminal to another mosfets S/D terminal (in an inverter) I have used the port "row0_col0_rightsd_array_row0_col0_top_met_X" as follows:

Route the drains
the_inverter << straight_route(
pdk,
my_pmos_ref.ports[f"row0_col0_rightsd_array_row0_col0_top_met_N"],
my_nmos_ref.ports[f"row0_col0_rightsd_array_row0_col0_top_met_S"],
)

However, this does not create the expected routing as the port layer is NOT met2, it is met1, actually. Then, it creates the route in met1. Of course, this could be "solved" by using the straight_route argument " glayer1="met2" ". Nevertheless, this creates a new via1 right next to the actual via1 that was created by the multiplier function, and this may suffer DRC problems.

The expected behavior would be to route the met2 layer directly that is already there.

note: I have tried with port "row0_col0_rightsd_top_met_S" too, but is in met1 also. I print the layers of each fet port (with a for) and none of them is in met2.

Thanks for your time and work!

[Nimok15]

The ports are defined in met1, hence routing selects met1 as the routing layer. Although met2 physically exists, the router does not recognise that it should use it. Manually adding ports to met2 would be somewhat better compared to the "glayer" approach, as it might help avoid DRC issues.