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.vscode/settings.json

Lines changed: 0 additions & 3 deletions
This file was deleted.

src/get.py

Lines changed: 0 additions & 296 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
# import requests
22
# import lxml
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4-
# url = 'https://electricalvoice.com/opcodes-8085-microprocessor/'
53
# response = requests.get(url )
64
# print(response.status_code)
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# # print(response.content)
@@ -37,300 +35,6 @@
3735
dic = json.loads(data)
3836
# print(len(dic.keys()))
3937
nd = dic
40-
# print(nd.keys())
41-
# nd['ACI Data']['description'] = 'Add with carry immediate'
42-
# nd['ADC A']['description'] = 'Add with carry'
43-
# nd['ADC B']['description'] = 'Add with carry'
44-
# nd['ADC C']['description'] = 'Add with carry'
45-
# nd['ADC D']['description'] = 'Add with carry'
46-
# nd['ADC E']['description'] = 'Add with carry'
47-
# nd['ADC H']['description'] = 'Add with carry'
48-
# nd['ADC L']['description'] = 'Add with carry'
49-
# nd['ADC M']['description'] = 'Add with carry to memory (HL Pair)'
50-
# nd['ADD A']['description'] = 'Add'
51-
# nd['ADD B']['description'] = 'Add'
52-
# nd['ADD C']['description'] = 'Add'
53-
# nd['ADD D']['description'] = 'Add'
54-
# nd['ADD E']['description'] = 'Add'
55-
# nd['ADD H']['description'] = 'Add'
56-
# nd['ADD L']['description'] = 'Add'
57-
# nd['ADI Data']['description'] = 'Add Immediate'
58-
# nd['ANA A']['description'] = 'And Accumulator'
59-
# nd['ANA B']['description'] = 'And Accumulator'
60-
# nd['ANA C']['description'] = 'And Accumulator'
61-
# nd['ANA D']['description'] = 'And Accumulator'
62-
# nd['ANA E']['description'] = 'And Accumulator'
63-
# nd['ANA H']['description'] = 'And Accumulator'
64-
# nd['ANA L']['description'] = 'And Accumulator'
65-
# nd['ANA M']['description'] = 'And Accumulator to memory'
66-
# nd['ANI Data']['description'] = 'And Immediate'
67-
# nd['CALL Label']['description'] = 'Call unconditional'
68-
# nd['CC Label']['description'] = 'Call on carry'
69-
# nd['CM Label']['description'] = 'Call on minus'
70-
# nd['CMA']['description'] = 'Complement accumulator , A = ~A'
71-
# nd['CMC']['description'] = 'Complement carry , Cy = ~Cy'
72-
# nd['CMP A']['description'] = 'Compare , A - (r)'
73-
# nd['CMP B']['description'] = 'Compare , A - (r)'
74-
# nd['CMP C']['description'] = 'Compare , A - (r)'
75-
# nd['CMP D']['description'] = 'Compare , A - (r)'
76-
# nd['CMP E']['description'] = 'Compare , A - (r)'
77-
# nd['CMP H']['description'] = 'Compare , A - (r)'
78-
# nd['CMP L']['description'] = 'Compare , A - (r)'
79-
# nd['CMP M']['description'] = 'Compare with memory , A - (HL)'
80-
# nd['CNC Label']['description'] = 'Call on no carry'
81-
# nd['CNZ Label']['description'] = 'Call on no carry'
82-
# nd['CP Label']['description'] = 'Call on no carry'
83-
84-
# for key in dic.keys():
85-
# print('nd[\'{}\'][\'description\'] = \'\''.format(key))
86-
87-
88-
nd['ACI Data']['description'] = 'Add with carry immediate'
89-
nd['ADC A']['description'] = 'Add with carry'
90-
nd['ADC B']['description'] = 'Add with carry'
91-
nd['ADC C']['description'] = 'Add with carry'
92-
nd['ADC D']['description'] = 'Add with carry'
93-
nd['ADC E']['description'] = 'Add with carry'
94-
nd['ADC H']['description'] = 'Add with carry'
95-
nd['ADC L']['description'] = 'Add with carry'
96-
nd['ADC M']['description'] = 'Add with carry to memory(HL)'
97-
nd['ADD A']['description'] = 'ADD'
98-
nd['ADD B']['description'] = 'ADD'
99-
nd['ADD C']['description'] = 'ADD'
100-
nd['ADD D']['description'] = 'ADD'
101-
nd['ADD E']['description'] = 'ADD'
102-
nd['ADD H']['description'] = 'ADD'
103-
nd['ADD L']['description'] = 'ADD'
104-
nd['ADD M']['description'] = 'ADD to memory'
105-
nd['ADI Data']['description'] = 'ADD Immediate'
106-
nd['ANA A']['description'] = 'AND Accumulator , A = A & r'
107-
nd['ANA B']['description'] = 'AND Accumulator , A = A & r'
108-
nd['ANA C']['description'] = 'AND Accumulator , A = A & r'
109-
nd['ANA D']['description'] = 'AND Accumulator , A = A & r'
110-
nd['ANA E']['description'] = 'AND Accumulator , A = A & r'
111-
nd['ANA H']['description'] = 'AND Accumulator , A = A & r'
112-
nd['ANA L']['description'] = 'AND Accumulator , A = A & r'
113-
nd['ANA M']['description'] = 'AND Accumulator and memory'
114-
nd['ANI Data']['description'] = 'AND Immediate'
115-
nd['CALL Label']['description'] = 'Call unconditional'
116-
nd['CC Label']['description'] = 'Call on carry'
117-
nd['CM Label']['description'] = 'Call on minus'
118-
nd['CMA']['description'] = 'Complement accumulator'
119-
nd['CMC']['description'] = 'Complement carry'
120-
nd['CMP A']['description'] = 'Compare , A -r'
121-
nd['CMP B']['description'] = 'Compare , A -r'
122-
nd['CMP C']['description'] = 'Compare , A -r'
123-
nd['CMP D']['description'] = 'Compare , A -r'
124-
nd['CMP E']['description'] = 'Compare , A -r'
125-
nd['CMP H']['description'] = 'Compare , A -r'
126-
nd['CMP L']['description'] = 'Compare , A -r'
127-
nd['CMP M']['description'] = 'Compare with memory, A -(HL)'
128-
nd['CNC Label']['description'] = 'Call on carry'
129-
nd['CNZ Label']['description'] = 'Call on no zero'
130-
nd['CP Label']['description'] = 'Call on Plus'
131-
nd['CPE Label']['description'] = 'Call on Parity Even'
132-
nd['CPI Data']['description'] = 'Compare Immediate'
133-
nd['CPO Label']['description'] = 'Call on Parity Odd'
134-
nd['CZ Label']['description'] = 'Call on Zero'
135-
nd['DAA']['description'] = 'Decimal Adjust Accumulator , A =BCD format , used for BCD Addition'
136-
nd['DAD B']['description'] = 'Double Add BC to HL , HL =HL +BC'
137-
nd['DAD D']['description'] = 'Double Add DE to HL , HL =HL +DE'
138-
nd['DAD H']['description'] = 'Double Add HL to HL , HL =HL +HL'
139-
nd['DAD SP']['description'] = 'Double Add SP(Stack Pointer) to HL , HL =HL +SP'
140-
nd['DCR A']['description'] = 'Decrement'
141-
nd['DCR B']['description'] = 'Decrement'
142-
nd['DCR C']['description'] = 'Decrement'
143-
nd['DCR D']['description'] = 'Decrement'
144-
nd['DCR E']['description'] = 'Decrement'
145-
nd['DCR H']['description'] = 'Decrement'
146-
nd['DCR L']['description'] = 'Decrement'
147-
nd['DCR M']['description'] = 'Decrement Memory , HL = HL -1'
148-
nd['DCX B']['description'] = 'Decrement BC'
149-
nd['DCX D']['description'] = 'Decrement DE'
150-
nd['DCX H']['description'] = 'Decrement HL'
151-
nd['DCX SP']['description'] = 'Decrement Stack Pointer'
152-
nd['DI']['description'] = 'Disable interrrupts'
153-
nd['EI']['description'] = 'Enable interrupts'
154-
nd['HLT']['description'] = 'Halt'
155-
nd['IN Port-address']['description'] = 'Input ,A =[p]'
156-
nd['INR A']['description'] = 'Increment'
157-
nd['INR B']['description'] = 'Increment'
158-
nd['INR C']['description'] = 'Increment'
159-
nd['INR D']['description'] = 'Increment'
160-
nd['INR E']['description'] = 'Increment'
161-
nd['INR H']['description'] = 'Increment'
162-
nd['INR L']['description'] = 'Increment'
163-
nd['INR M']['description'] = 'Increment memory'
164-
nd['INX B']['description'] = 'Increment BC'
165-
nd['INX D']['description'] = 'Increment DE'
166-
nd['INX H']['description'] = 'Increment HL'
167-
nd['INX SP']['description'] = 'Increment Stack Pointer'
168-
nd['JC Label']['description'] = 'Jump on carry'
169-
nd['JM Label']['description'] = 'Jump on minus'
170-
nd['JMP Label']['description'] = 'Jump unconditional'
171-
nd['JNC Label']['description'] = 'Jump on no carry'
172-
nd['JNZ Label']['description'] = 'Jump on no Zero'
173-
nd['JP Label']['description'] = 'Jump on Plus'
174-
nd['JPE Label']['description'] = 'Jump on Parity Even'
175-
nd['JPO Label']['description'] = 'Jump on Parity Odd'
176-
nd['JZ Label']['description'] = 'Jump on Zero'
177-
nd['LDA Address']['description'] = 'Load accumulator direct A=[a]'
178-
nd['LDAX B']['description'] = 'Load accumulator indirect A=[BC]'
179-
nd['LDAX D']['description'] = 'Load accumulator indirect A=[DE]'
180-
nd['LHLD Address']['description'] = 'Load HL Direct'
181-
nd['LXI B']['description'] = 'Load Immediate BC'
182-
nd['LXI D']['description'] = 'Load Immediate DE'
183-
nd['LXI H']['description'] = 'Load Immediate HL'
184-
nd['LXI SP']['description'] = 'Load Immediate Stack Pointer'
185-
nd['MOV A, A']['description'] = 'Move register to register , A =A'
186-
nd['MOV A, B']['description'] = 'Move register to register , A =B'
187-
nd['MOV A, C']['description'] = 'Move register to register , A =C'
188-
nd['MOV A, D']['description'] = 'Move register to register , A =D'
189-
nd['MOV A, E']['description'] = 'Move register to register , A =E'
190-
nd['MOV A, H']['description'] = 'Move register to register , A =H'
191-
nd['MOV A, L']['description'] = 'Move register to register , A =L'
192-
nd['MOV A, M']['description'] = 'Move memory to register , A =[HL]'
193-
nd['MOV B, A']['description'] = 'Move register to register , B =A'
194-
nd['MOV B, B']['description'] = 'Move register to register , B =B'
195-
nd['MOV B, C']['description'] = 'Move register to register , B =C'
196-
nd['MOV B, D']['description'] = 'Move register to register , B =D'
197-
nd['MOV B, E']['description'] = 'Move register to register , B =E'
198-
nd['MOV B, H']['description'] = 'Move register to register , B =H'
199-
nd['MOV B, L']['description'] = 'Move register to register , B =L'
200-
nd['MOV B, M']['description'] = 'Move memory to register , B =[HL]'
201-
nd['MOV C, A']['description'] = 'Move register to register , C =A'
202-
nd['MOV C, B']['description'] = 'Move register to register , C =B'
203-
nd['MOV C, C']['description'] = 'Move register to register , C =C'
204-
nd['MOV C, D']['description'] = 'Move register to register , C =D'
205-
nd['MOV C, E']['description'] = 'Move register to register , C =E'
206-
nd['MOV C, H']['description'] = 'Move register to register , C =H'
207-
nd['MOV C, L']['description'] = 'Move register to register , C =L'
208-
nd['MOV C, M']['description'] = 'Move memory to register , C =[HL]'
209-
nd['MOV D, A']['description'] = 'Move register to register , D =A'
210-
nd['MOV D, B']['description'] = 'Move register to register , D =B'
211-
nd['MOV D, C']['description'] = 'Move register to register , D =C'
212-
nd['MOV D, D']['description'] = 'Move register to register , D =D'
213-
nd['MOV D, E']['description'] = 'Move register to register , D =E'
214-
nd['MOV D, H']['description'] = 'Move register to register , D =H'
215-
nd['MOV D, L']['description'] = 'Move register to register , D =L'
216-
nd['MOV D, M']['description'] = 'Move memory to register , D =[HL]'
217-
nd['MOV E, A']['description'] = 'Move register to register , E =A'
218-
nd['MOV E, B']['description'] = 'Move register to register , E =B'
219-
nd['MOV E, C']['description'] = 'Move register to register , E =C'
220-
nd['MOV E, D']['description'] = 'Move register to register , E =D'
221-
nd['MOV E, E']['description'] = 'Move register to register , E =E'
222-
nd['MOV E, H']['description'] = 'Move register to register , E =H'
223-
nd['MOV E, L']['description'] = 'Move register to register , E =L'
224-
nd['MOV E, M']['description'] = 'Move memory to register , E =[HL]'
225-
nd['MOV H, A']['description'] = 'Move register to register , H =A'
226-
nd['MOV H, B']['description'] = 'Move register to register , H =B'
227-
nd['MOV H, C']['description'] = 'Move register to register , H =C'
228-
nd['MOV H, D']['description'] = 'Move register to register , H =D'
229-
nd['MOV H, E']['description'] = 'Move register to register , H =E'
230-
nd['MOV H, H']['description'] = 'Move register to register , H =H'
231-
nd['MOV H, L']['description'] = 'Move register to register , H =L'
232-
nd['MOV H, M']['description'] = 'Move memory to register , H =[HL]'
233-
nd['MOV L, A']['description'] = 'Move register to register , L =A'
234-
nd['MOV L, B']['description'] = 'Move register to register , L =B'
235-
nd['MOV L, C']['description'] = 'Move register to register , L =C'
236-
nd['MOV L, D']['description'] = 'Move register to register , L =D'
237-
nd['MOV L, E']['description'] = 'Move register to register , L =E'
238-
nd['MOV L, H']['description'] = 'Move register to register , L =H'
239-
nd['MOV L, L']['description'] = 'Move register to register , L =L'
240-
nd['MOV L, M']['description'] = 'Move memory to register , L =[HL]'
241-
nd['MOV M, A']['description'] = 'Move register to memory , [HL] =A'
242-
nd['MOV M, B']['description'] = 'Move register to memory , [HL] =B'
243-
nd['MOV M, C']['description'] = 'Move register to memory , [HL] =C'
244-
nd['MOV M, D']['description'] = 'Move register to memory , [HL] =D'
245-
nd['MOV M, E']['description'] = 'Move register to memory , [HL] =E'
246-
nd['MOV M, H']['description'] = 'Move register to memory , [HL] =H'
247-
nd['MOV M, L']['description'] = 'Move register to memory , [HL] =L'
248-
nd['MVI A, Data']['description'] = 'Move Immediate to register'
249-
nd['MVI B, Data']['description'] = 'Move Immediate to register'
250-
nd['MVI C, Data']['description'] = 'Move Immediate to register'
251-
nd['MVI D, Data']['description'] = 'Move Immediate to register'
252-
nd['MVI E, Data']['description'] = 'Move Immediate to register'
253-
nd['MVI H, Data']['description'] = 'Move Immediate to register'
254-
nd['MVI L, Data']['description'] = 'Move Immediate to register'
255-
nd['MVI M, Data']['description'] = 'Move Immediate to memory'
256-
nd['NOP']['description'] = 'No operation'
257-
nd['ORA A']['description'] = 'Inclusive OR Accumulator , A = A v r'
258-
nd['ORA B']['description'] = 'Inclusive OR Accumulator , A = A v r'
259-
nd['ORA C']['description'] = 'Inclusive OR Accumulator , A = A v r'
260-
nd['ORA D']['description'] = 'Inclusive OR Accumulator , A = A v r'
261-
nd['ORA E']['description'] = 'Inclusive OR Accumulator , A = A v r'
262-
nd['ORA H']['description'] = 'Inclusive OR Accumulator , A = A v r'
263-
nd['ORA L']['description'] = 'Inclusive OR Accumulator , A = A v r'
264-
nd['ORA M']['description'] = 'Inclusive OR Memory , A = A v [HL]'
265-
nd['ORI Data']['description'] = 'Inclusive OR Immediate'
266-
nd['OUT Port-Address']['description'] = 'Output'
267-
nd['PCHL']['description'] = 'Jump HL Indirect , PC =[HL]'
268-
nd['POP B']['description'] = 'Pop BC , BC = [SP]+'
269-
nd['POP D']['description'] = 'Pop DE , DE = [SP]+'
270-
nd['POP H']['description'] = 'Pop HL , HL = [SP]+'
271-
nd['POP PSW']['description'] = 'Pop processor status word , PSW ,A = [SP]+'
272-
nd['PUSH B']['description'] = 'PUSH BC ,-[SP] =BC'
273-
nd['PUSH D']['description'] = 'PUSH DE ,-[SP] =DE'
274-
nd['PUSH H']['description'] = 'PUSH HL ,-[SP] =HL'
275-
nd['PUSH PSW']['description'] = 'PUSH Processor Status Word ,-[SP] = PSW ,A'
276-
nd['RAL']['description'] = 'Rotate accumulator left , A={CY,A}<-'
277-
nd['RAR']['description'] = 'Rotate Accumulator Right , A=->{CY,A}'
278-
nd['RC']['description'] = 'Return on carry'
279-
nd['RET']['description'] = 'Return , PC=[SP]+'
280-
nd['RIM']['description'] = 'Read Interrupt Mask ,A=mask'
281-
nd['RLC']['description'] = 'Rotate Left Circular , A=A<-'
282-
nd['RM']['description'] = 'Return on Minus'
283-
nd['RNC']['description'] = 'Return on No Carry'
284-
nd['RNZ']['description'] = 'Return on No Zero '
285-
nd['RP']['description'] = 'Return on Plus'
286-
nd['RPE']['description'] = 'Return on Parity Even'
287-
nd['RPO']['description'] = 'Return on Parity ODD'
288-
nd['RRC']['description'] = 'Rotate Right Circular'
289-
nd['RST 0']['description'] = 'Restart ,-[SP]=PC,PC=0'
290-
nd['RST 1']['description'] = 'Restart ,-[SP]=PC,PC=1'
291-
nd['RST 2']['description'] = 'Restart ,-[SP]=PC,PC=2'
292-
nd['RST 3']['description'] = 'Restart ,-[SP]=PC,PC=3'
293-
nd['RST 4']['description'] = 'Restart ,-[SP]=PC,PC=4'
294-
nd['RST 5']['description'] = 'Restart ,-[SP]=PC,PC=5'
295-
nd['RST 6']['description'] = 'Restart ,-[SP]=PC,PC=6'
296-
nd['RST 7']['description'] = 'Restart ,-[SP]=PC,PC=7'
297-
nd['RZ']['description'] = 'Return on Zero'
298-
nd['SBB A']['description'] = 'Subtract with Borrow , A=A-r-CY '
299-
nd['SBB B']['description'] = 'Subtract with Borrow , A=A-r-CY '
300-
nd['SBB C']['description'] = 'Subtract with Borrow , A=A-r-CY '
301-
nd['SBB D']['description'] = 'Subtract with Borrow , A=A-r-CY '
302-
nd['SBB E']['description'] = 'Subtract with Borrow , A=A-r-CY '
303-
nd['SBB H']['description'] = 'Subtract with Borrow , A=A-r-CY '
304-
nd['SBB L']['description'] = 'Subtract with Borrow , A=A-r-CY '
305-
nd['SBB M']['description'] = 'Subtract with Borrow , A=A-[HL]-CY '
306-
nd['SBI Data']['description'] = 'Subtract with Borrow Immediate, A=A-r-CY '
307-
nd['SHLD Address']['description'] = 'Store HL Direct , [a]=HL'
308-
nd['SIM']['description'] = 'Set Interrupt Mask , mask=A'
309-
nd['SPHL']['description'] = 'Move HL to SP , SP=HL '
310-
nd['STA Address']['description'] = 'Store Accumulator , [a] =A'
311-
nd['STAX B']['description'] = 'Store Accumulator indirect , [BC]=A'
312-
nd['STAX D']['description'] = 'Store Accumulator indirect ,[DE]=A'
313-
nd['STC']['description'] = 'Set Carry ,CY=1'
314-
nd['SUB A']['description'] = 'Subtract ,A=A-r'
315-
nd['SUB B']['description'] = 'Subtract ,A=A-r'
316-
nd['SUB C']['description'] = 'Subtract ,A=A-r'
317-
nd['SUB D']['description'] = 'Subtract ,A=A-r'
318-
nd['SUB E']['description'] = 'Subtract ,A=A-r'
319-
nd['SUB H']['description'] = 'Subtract ,A=A-r'
320-
nd['SUB L']['description'] = 'Subtract ,A=A-r'
321-
nd['SUB M']['description'] = 'Subtract memory,A=A-[HL]'
322-
nd['SUI Data']['description'] = 'Subtract Immedaite,A=A-r'
323-
nd['XCHG']['description'] = 'Exchange or Swap HL with DE , HL<->DE'
324-
nd['XRA A']['description'] = 'Exclusive OR Accumulator ,A=Axr'
325-
nd['XRA B']['description'] = 'Exclusive OR Accumulator ,A=Axr'
326-
nd['XRA C']['description'] = 'Exclusive OR Accumulator ,A=Axr'
327-
nd['XRA D']['description'] = 'Exclusive OR Accumulator ,A=Axr'
328-
nd['XRA E']['description'] = 'Exclusive OR Accumulator ,A=Axr'
329-
nd['XRA H']['description'] = 'Exclusive OR Accumulator ,A=Axr'
330-
nd['XRA L']['description'] = 'Exclusive OR Accumulator ,A=Axr'
331-
nd['XRA M']['description'] = 'Exclusive OR Accumulator ,A=Ax[HL]'
332-
nd['XRI Data']['description'] = 'Exclusive OR Immediate ,A=Axn'
333-
nd['XTHL']['description'] = 'Exchange stack Top with HL , [SP]<->HL '
33438

33539
x = json.dumps(nd)
33640
with open('new_data.json' , 'w' ) as f:

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