AIE

AMD Vitis™ AI Engine Tutorials See Vitis Development Environment on amd.com See Vitis AI Development Environment on amd.com

AI Engine Development

Introduction

The tutorials under AI Engine Development help you learn to target, develop, and deploy advanced algorithms using an AMD Versal™ AI Engine array. Do this in conjunction with PL IP/kernels and software applications running on the embedded processors. To successfully deploy AI Engine applications in hardware, you need to understand the Vitis and AI Engine tools and flows.

• The AI Engine Development Feature Tutorials highlight specific features and flows that help you develop AI Engine applications.

• The AI Engine Development Design Tutorials showcase two major phases of AI Engine application development: designing the application and developing the kernels. These tutorials demonstrate both phases.

Getting Started

AI Engine Documentation

Use the AI Engine Design Process Hub to find the right documentation for your current development stage.

Key AI Engine documentation includes:

• Versal adaptive SoC AI Engine Architecture Manual AM009
• AI Engine Tools and Flows UG1076
• AI Engine Kernel and Graph Programming Guide UG1079

AI Engine Training

If you are new to AI Engine, take these training courses to understand the architecture and design flow:

• Designing with Versal AI Engine 1: Architecture and Design Flow
• Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels
• Designing with Versal AI Engine 3: Kernel Programming and Optimization

Environment Settings

IMPORTANT: Before starting any tutorial, read and follow the Vitis Release Notes and Installation Guide (UG1742) (v2025.2) to set up software and install the VCK190 base platform.

Follow these steps to set up your environment (do not apply to tutorials that do not use the VCK190 base platform):

1. Set up your platform: Run the xilinx-versal-common-v2025.2/environment-setup-cortexa72-cortexa53-amd-linux script from the platform download. This script sets up the SYSROOT and CXX variables. If the script is not present, you must run the xilinx-versal-common-v2025.2/sdk.sh command.
2. Set the ROOTFS path: Point it to xilinx-versal-common-v2025.2/rootfs.ext4.
3. Set the IMAGE path: Point it to xilinx-versal-common-v2025.2/Image.
4. Set the PLATFORM_REPO_PATHS environment variable: Define it based on where you downloaded the platform.

Getting Started with AI Engine Development Using the AI Engine Tutorials

If you are new to AI Engine architecture and tools, start with the A to Z Bare-metal Flow. This tutorial takes you step-by-step from platform creation in AMD Vivado™ to AI Engine application creation, system integration, and hardware testing using the Vitis IDE.

AI Engine Application Development

To start developing AI Engine applications, work through the following tutorials:

• DSP Library Tutorial: Learn to create an AI Engine application using the AMD DSP library.
• AIE DSPLib and Model Composer: Learn to create an AI Engine application using the AMD provided DSP library with ModelComposer, enabling MATLAB Simulink-based design.
• Using GMIO with AIE: Learn how to connect AI Engine to DDR memory through the GMIO interface and NoC.
• Implementing an IIR Filter on the AIE: Learn custom kernel coding with an IIR filter application.

Other tutorials covering useful AI Engine features include:

• Runtime Parameter Reconfiguration
• Packet Switching
• Using Floating-Point in the AIE

AI Engine Application Debug and Optimization

After writing your first AI Engine application, verify that your graphs and kernels function correctly using x86 and AI Engine simulation. Use these tutorials to assist with debugging and optimization:

• Debug Walkthrough Tutorial: Analyze performance and debug functional issues.
• AIE Performance and Deadlock Analysis: Learn performance analysis, optimization methods, and graph execution synchronization.

System Integration

When your AI Engine application meets functional and performance expectations, integrate it into the Versal system. Use these tutorials:

• AIE Versal Integration: Build a design running on the AI Engine, PS, and PL.
• Versal System Design Clocking: Learn clocking concepts for the Vitis compiler and define clocking for an ADF Graph and PL kernels using automation.
• Versal Emulation Waveform Analysis:Use the Vivado Design Suite logic simulator GUI and Vitis analyzer to debug and analyze your design.

Available Tutorials

Feature Tutorials

These tutorials target the VCK190 board. Use the following table to find available tutorials and see the features and flows each one demonstrates. The columns list specific features and flows so you can identify tutorials that match what you want to learn.

Tutorial	Platform	OS	IDE Flow	Libraries Used	HLS Kernel	x86 Simulator	AIE Simulator	HW Emu	HW	Event Trace in HW	Profile in HW
AI Engine A-to-Z Flow for Linux	Base / Custom	Linux			MM2S / S2MM	Yes	Yes	Yes	Yes
A to Z Bare-metal Flow	Custom	Baremetal	Yes		MM2S / S2MM		Yes	Yes	Yes
Using GMIO with AIE	Base	Linux					Yes	Yes	Yes		Yes
Runtime Parameter Reconfiguration	Base	Linux			MM2S / S2MM		Yes	Yes	Yes
Packet Switching	Base	Linux			MM2S / S2MM		Yes	Yes	Yes
AIE Versal Integration	Base	Linux	Yes		MM2S / S2MM	Yes	Yes	Yes	Yes
Versal System Design Clocking	Base	Linux			MM2S / S2MM		Yes	Yes	Yes
Using Floating-Point in the AIE	Base	Linux					Yes
DSP Library Tutorial	Base	Linux		DSPLib	MM2S / S2MM		Yes
Debug Walkthrough Tutorial	Base	Linux	Yes			Yes	Yes	Yes	Yes	Yes	Yes
AIE DSPLib and Model Composer	Base	Linux	Yes	DSPLib	MM2S / S2MM	Yes	Yes
Versal Emulation Waveform Analysis	Base	Linux			Traffic Gen			Yes
AIE Performance and Deadlock Analysis	Base	Linux					Yes	Yes	Yes		Yes
Implementing an IIR Filter on the AIE	Base	Linux	Yes			Yes	Yes
Post-Link Recompile of an AIE Application	Base	Linux			MM2S / S2MM		Yes	Yes	Yes
Using RTL IP with AI Engines	Custom	Linux			MM2S / S2MM		Yes	Yes
AIE Compiler Features	Base	Linux			MM2S / S2MM	Yes	Yes	Yes	Yes	Yes	Yes
Two Tone Filter	Base	Linux	Yes	DSPLib		Yes	Yes
Compiling AIE Graphs for Independent Partitions	Base	Linux			MM2S / S2MM	Yes	Yes	Yes	Yes	Yes
RTL / AI Engine interfacing Examples	Custom	N/A	Yes					Yes
AIE Kernel Optimization	Base / Custom	Linux				Yes	Yes
Matrix Compute with Vitis Libraries	Base	Linux		DSPLib			Yes
A Gentle Introduction to AI Engine Kernel Programming	Base	Linux	Yes			Yes	Yes
System Timeline Tutorial	Base	Linux	Yes		MM2S / S2MM	Yes	Yes	Yes	Yes	Yes	Yes

Design Tutorials

These tutorials target the VCK190 board. The following table lists the tutorials, features, and flows highlighted in these tutorials. The columns correspond to specific features and flows supported in these tutorials and help you identify tutorials that showcase specific flows and features that interest you.

Tutorial	Platform	OS	IDE Flow	Libraries Used	HLS Kernel	x86 Simulator	AIE Simulator	HW Emu	HW	Event Trace in HW	Profile in HW
Versal Custom Thin Platform Extensible System	Custom	Linux			MM2S / S2MM / VADD			Yes	Yes
LeNet Tutorial	Base	Linux			MM2S / S2MM		Yes	Yes	Yes		Yes
Super Sampling Rate FIR Filters	Base	Linux					Yes
Beamforming Design	Base	Linux					Yes	Yes	Yes		Yes
Polyphase Channelizer	Base	Linux			MM2S / S2MM			Yes	Yes
Prime Factor FFT	Base	Linux			MM2S / S2MM			Yes	Yes
2D-FFT	Base	Linux		DSPLib	PL Data Generator and Checker		Yes	Yes	Yes		Yes
FIR Filter	Base	Linux		DSPLib	PL Data Generator and Checker		Yes	Yes	Yes		Yes
N-Body Simulator	Base	Linux			PL Datamover		Yes	Yes	Yes
Digital Down-conversion Chain	Base	Linux				Yes	Yes
Versal GeMM Implementation	Base	Linux		DSPLib	Datamover		Yes	Yes	Yes		Yes
Bilinear Interpolation	Base	Linux				Yes	Yes
64K IFFT Using 2D Architecture	Base	Linux			MM2S / S2MM			Yes	Yes
FFT and DFT on AI Engine	Base	Linux		DSPLib		Yes	Yes
Bitonic SIMD Sorting on AI Engine	Base	Linux				Yes	Yes
Fractional Delay Farrow Filter	Base	Linux			Data Movers	Yes	Yes	Yes	Yes
1M Point float FFT @ 32 Gsps	Custom	Baremetal				Yes	Yes		Yes		Yes
System Partitioning of a Hough Transform	Base	Linux				Yes	Yes
MUSIC Algorithm on AI Engine	Base	Linux			MM2S / S2MM				Yes
SoftMax Function on AI Engine	Base	Linux				Yes	Yes
Time-Division Multiplexed Mixer	Base	Linux				Yes	Yes
Back-Projection SAR on AIE	Base	Linux		DSPLib	Data Movers & Image Buffering	Yes	Yes		Yes		Yes

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