Skip to content

Commit 2188633

Browse files
AndrDragomirAndrDragomir
committed
projects/adrv904x: Add ORx support
Working only for Non-LinkSharing use cases Signed-off-by: AndrDragomir <[email protected]>
1 parent b6c5122 commit 2188633

File tree

8 files changed

+397
-127
lines changed

8 files changed

+397
-127
lines changed

‎projects/adrv904x/common/adrv904x_bd.tcl‎

Lines changed: 241 additions & 30 deletions
Large diffs are not rendered by default.

‎projects/adrv904x/common/adrv904x_fmc.txt‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -14,44 +14,44 @@ G7 LA00_CC_N FMC_CLK2TRXIC- dev_clk_n #N/A #N/A
1414
J2 CLK3_IO_P FMC_CLK2CLKCHIP+ dev_clk_buff_p #N/A #N/A
1515
J3 CLK3_IO_N FMC_CLK2CLKCHIP- dev_clk_buff_n #N/A #N/A
1616

17-
C6 DP0_M2C_P SERDOUT7- rx_data_p[0] #N/A #N/A
18-
C7 DP0_M2C_N SERDOUT7+ rx_data_n[0] #N/A #N/A
19-
A2 DP1_M2C_P SERDOUT6- rx_data_p[1] #N/A #N/A
20-
A3 DP1_M2C_N SERDOUT6+ rx_data_n[1] #N/A #N/A
21-
A6 DP2_M2C_P SERDOUT4- rx_data_p[2] #N/A #N/A
22-
A7 DP2_M2C_N SERDOUT4+ rx_data_n[2] #N/A #N/A
23-
A10 DP3_M2C_P SERDOUT5- rx_data_p[3] #N/A #N/A
24-
A11 DP3_M2C_N SERDOUT5+ rx_data_n[3] #N/A #N/A
25-
A14 DP4_M2C_P SERDOUT2- rx_data_p[4] #N/A #N/A
26-
A15 DP4_M2C_N SERDOUT2+ rx_data_n[4] #N/A #N/A
27-
A18 DP5_M2C_P SERDOUT0- rx_data_p[5] #N/A #N/A
28-
A19 DP5_M2C_N SERDOUT0+ rx_data_n[5] #N/A #N/A
29-
B16 DP6_M2C_P SERDOUT1- rx_data_p[6] #N/A #N/A
30-
B17 DP6_M2C_N SERDOUT1+ rx_data_n[6] #N/A #N/A
31-
B12 DP7_M2C_P SERDOUT3- rx_data_p[7] #N/A #N/A
32-
B13 DP7_M2C_N SERDOUT3+ rx_data_n[7] #N/A #N/A
17+
A18 DP5_M2C_P SERDOUT0- rx_data_p[0] #N/A #N/A
18+
A19 DP5_M2C_N SERDOUT0+ rx_data_n[0] #N/A #N/A
19+
B16 DP6_M2C_P SERDOUT1- rx_data_p[1] #N/A #N/A
20+
B17 DP6_M2C_N SERDOUT1+ rx_data_n[1] #N/A #N/A
21+
A14 DP4_M2C_P SERDOUT2- rx_data_p[2] #N/A #N/A
22+
A15 DP4_M2C_N SERDOUT2+ rx_data_n[2] #N/A #N/A
23+
B12 DP7_M2C_P SERDOUT3- rx_data_p[3] #N/A #N/A
24+
B13 DP7_M2C_N SERDOUT3+ rx_data_n[3] #N/A #N/A
25+
A6 DP2_M2C_P SERDOUT4- rx_data_p[4] #N/A #N/A
26+
A7 DP2_M2C_N SERDOUT4+ rx_data_n[4] #N/A #N/A
27+
A10 DP3_M2C_P SERDOUT5- rx_data_p[5] #N/A #N/A
28+
A11 DP3_M2C_N SERDOUT5+ rx_data_n[5] #N/A #N/A
29+
A2 DP1_M2C_P SERDOUT6- rx_data_p[6] #N/A #N/A
30+
A3 DP1_M2C_N SERDOUT6+ rx_data_n[6] #N/A #N/A
31+
C6 DP0_M2C_P SERDOUT7- rx_data_p[7] #N/A #N/A
32+
C7 DP0_M2C_N SERDOUT7+ rx_data_n[7] #N/A #N/A
3333

34-
C2 DP0_C2M_P SERDIN0- tx_data_p[0] #N/A #N/A
35-
C3 DP0_C2M_N SERDIN0+ tx_data_n[0] #N/A #N/A
36-
A22 DP1_C2M_P SERDIN1- tx_data_p[1] #N/A #N/A
37-
A23 DP1_C2M_N SERDIN1+ tx_data_n[1] #N/A #N/A
38-
A26 DP2_C2M_P SERDIN2- tx_data_p[2] #N/A #N/A
39-
A27 DP2_C2M_N SERDIN2+ tx_data_n[2] #N/A #N/A
40-
A30 DP3_C2M_P SERDIN3- tx_data_p[3] #N/A #N/A
41-
A31 DP3_C2M_N SERDIN3+ tx_data_n[3] #N/A #N/A
42-
A34 DP4_C2M_P SERDIN7+ tx_data_p[4] #N/A #N/A
43-
A35 DP4_C2M_N SERDIN7- tx_data_n[4] #N/A #N/A
44-
A38 DP5_C2M_P SERDIN6+ tx_data_p[5] #N/A #N/A
45-
A39 DP5_C2M_N SERDIN6- tx_data_n[5] #N/A #N/A
46-
B36 DP6_C2M_P SERDIN5+ tx_data_p[6] #N/A #N/A
47-
B37 DP6_C2M_N SERDIN5- tx_data_n[6] #N/A #N/A
48-
B32 DP7_C2M_P SERDIN4+ tx_data_p[7] #N/A #N/A
49-
B33 DP7_C2M_N SERDIN4- tx_data_n[7] #N/A #N/A
34+
A38 DP5_C2M_P SERDIN6+ tx_data_p[0] #N/A #N/A
35+
A39 DP5_C2M_N SERDIN6- tx_data_n[0] #N/A #N/A
36+
B36 DP6_C2M_P SERDIN5+ tx_data_p[1] #N/A #N/A
37+
B37 DP6_C2M_N SERDIN5- tx_data_n[1] #N/A #N/A
38+
A34 DP4_C2M_P SERDIN7+ tx_data_p[2] #N/A #N/A
39+
A35 DP4_C2M_N SERDIN7- tx_data_n[2] #N/A #N/A
40+
B32 DP7_C2M_P SERDIN4+ tx_data_p[3] #N/A #N/A
41+
B33 DP7_C2M_N SERDIN4- tx_data_n[3] #N/A #N/A
42+
A26 DP2_C2M_P SERDIN2- tx_data_p[4] #N/A #N/A
43+
A27 DP2_C2M_N SERDIN2+ tx_data_n[4] #N/A #N/A
44+
A30 DP3_C2M_P SERDIN3- tx_data_p[5] #N/A #N/A
45+
A31 DP3_C2M_N SERDIN3+ tx_data_n[5] #N/A #N/A
46+
A22 DP1_C2M_P SERDIN1- tx_data_p[6] #N/A #N/A
47+
A23 DP1_C2M_N SERDIN1+ tx_data_n[6] #N/A #N/A
48+
C2 DP0_C2M_P SERDIN0- tx_data_p[7] #N/A #N/A
49+
C3 DP0_C2M_N SERDIN0+ tx_data_n[7] #N/A #N/A
5050

5151
H7 LA02_P SYNCOUT0+ rx_sync_p LVDS #N/A
5252
H8 LA02_N SYNCOUT0- rx_sync_n LVDS #N/A
53-
H37 LA32_P SYNCOUT1+ rx_sync_1_p LVDS #N/A
54-
H38 LA32_N SYNCOUT1- rx_sync_1_n LVDS #N/A
53+
H37 LA32_P SYNCOUT1+ rx_sync_os_p LVDS #N/A
54+
H38 LA32_N SYNCOUT1- rx_sync_os_n LVDS #N/A
5555
G33 LA31_P SYNCIN0- tx_sync_p LVDS DIFF_TERM_ADV TERM_100
5656
G34 LA31_N SYNCIN0+ tx_sync_n LVDS DIFF_TERM_ADV TERM_100
5757
G27 LA25_P SYNCIN1- tx_sync_1_p LVDS DIFF_TERM_ADV TERM_100
@@ -121,9 +121,9 @@ F29 HB08_N FMC_GPIO14 fmc_gpio[14] LVCMOS18 #N/A
121121
F28 HB08_P FMC_GPIO15 fmc_gpio[15] LVCMOS18 #N/A
122122

123123
C26 LA27_P FMC_CLK_RESETB ad9528_reset_b LVCMOS18 #N/A
124-
G22 LA20_N RESETB adrv904x_reset_b LVCMOS18 #N/A
124+
G22 LA20_N RESETB adrv904x_reset_b LVCMOS18 #N/A
125125
H16 LA11_P UART0_RESETB uart0_resetb LVCMOS18 #N/A
126-
H17 LA11_N UART1_RESETB uart1_resetb LVCMOS18 #N/A
126+
H17 LA11_N UART1_RESETB uart1_resetb LVCMOS18 #N/A
127127

128128
C30 SCL FMCA_SCL scl LVCMOS18 #N/A
129129
C31 SDA FMCA_SDA sda LVCMOS18 #N/A

‎projects/adrv904x/zcu102/Makefile‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
####################################################################################
2-
## Copyright (c) 2018 - 2024 Analog Devices, Inc.
2+
## Copyright (c) 2018 - 2025 Analog Devices, Inc.
33
### SPDX short identifier: BSD-1-Clause
44
## Auto-generated, do not modify!
55
####################################################################################
@@ -20,6 +20,7 @@ M_DEPS += ../../../library/common/util_pulse_gen.v
2020
M_DEPS += ../../../library/common/ad_iobuf.v
2121
M_DEPS += ../../../library/common/ad_bus_mux.v
2222

23+
LIB_DEPS += axi_clkgen
2324
LIB_DEPS += axi_dmac
2425
LIB_DEPS += axi_sysid
2526
LIB_DEPS += data_offload

‎projects/adrv904x/zcu102/README.md‎

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -17,19 +17,22 @@ All of the RX/TX link modes can be found in the [ADRV9040 data sheet](https://ww
1717

1818
If other configurations are desired, then the parameters from the HDL project (see below) need to be changed, as well as the Linux/no-OS project configurations.
1919

20-
**Warning**: The JESD link mode is configured using the ADRV904x plugin from [ACE](https://wiki.analog.com/resources/tools-software/ace) application. The device tree is the same, regardless of the configuration: [zynqmp-zcu102-rev10-adrv904x.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv904x.dts)
20+
**Warning**: The JESD link mode is configured using the ADRV904x plugin from [ACE](https://wiki.analog.com/resources/tools-software/ace) application. The default device tree is: [zynqmp-zcu102-rev10-adrv904x.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv904x.dts). For ORX integration in NLS mode the device tree is: [zynqmp-zcu102-rev10-adrv904x-nls.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv904x-nls.dts).
2121

2222
The overwritable parameters from the environment:
2323

2424
- JESD_MODE - link layer encoder mode used;
25-
- 8B10B - 8b10b link layer defined in JESD204B, uses ADI IP as Physical layer
26-
- 64B66B - 64b66b link layer defined in JESD204C, uses Xilinx IP as Physical layer
27-
- [RX/TX]_LANE_RATE - lane rate of the [RX/TX] link (RX: MxFE to FPGA/TX: FPGA to MxFE)
28-
- [RX/TX]_JESD_M - [RX/TX] number of converters per link
29-
- [RX/TX]_JESD_L - [RX/TX] number of lanes per link
30-
- [RX/TX]_JESD_S - [RX/TX] number of samples per converter per frame
31-
- [RX/TX]_JESD_NP - [RX/TX] number of bits per sample, only 16 is supported
32-
- [RX/TX]_NUM_LINKS - [RX/TX] number of links, which matches the number of MxFE devices
25+
- 8B10B - 8b10b link layer defined in JESD204Br
26+
- 64B66B - 64b66b link layer defined in JESD204C
27+
- ORX_ENABLE : Additional data path for RX-OS
28+
- 0 - Disabled (used for profiles with RX-OS disabled)
29+
- 1 - Enabled (used for profiles with RX-OS enabled)
30+
- [RX/TX/RX_OS]_LANE_RATE - lane rate of the [RX/TX/RX_OS] link
31+
- [RX/TX/RX_OS]_JESD_M - [RX/TX/RX_OS] number of converters per link
32+
- [RX/TX/RX_OS]_JESD_L - [RX/TX/RX_OS] number of lanes per link
33+
- [RX/TX/RX_OS]_JESD_S - [RX/TX/RX_OS] number of samples per converter per frame
34+
- [RX/TX/RX_OS]_JESD_NP - [RX/TX/RX_OS] number of bits per sample, only 16 is supported
35+
- [RX/TX/RX_OS]_NUM_LINKS - [RX/TX/RX_OS] number of links
3336

3437
### Example configurations
3538

@@ -39,16 +42,24 @@ This specific command is equivalent to running `make` only:
3942

4043
```
4144
make JESD_MODE=64B66B \
45+
ORX_ENABLE=0 \
4246
RX_LANE_RATE=16.22 \
4347
TX_LANE_RATE=16.22 \
4448
RX_NUM_LINKS=1 \
4549
TX_NUM_LINK=1 \
50+
RX_OS_NUM_LINKS=1 \
4651
RX_JESD_M=16 \
4752
RX_JESD_L=8 \
4853
RX_JESD_S=1 \
54+
RX_JESD_NP=16 \
4955
TX_JESD_M=16 \
5056
TX_JESD_L=8 \
51-
TX_JESD_S=1
57+
TX_JESD_S=1 \
58+
TX_JESD_NP=16 \
59+
RX_OS_JESD_M=0 \
60+
RX_OS_JESD_L=0 \
61+
RX_OS_JESD_S=0 \
62+
RX_OS_JESD_NP=0
5263
```
5364

5465
Corresponding device tree: [zynqmp-zcu102-rev10-adrv904x.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv904x.dts)

‎projects/adrv904x/zcu102/system_bd.tcl‎

Lines changed: 24 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
###############################################################################
2-
## Copyright (C) 2024 Analog Devices, Inc. All rights reserved.
2+
## Copyright (C) 2024-2025 Analog Devices, Inc. All rights reserved.
33
### SPDX short identifier: ADIBSD
44
###############################################################################
55

@@ -14,9 +14,30 @@ source $ad_hdl_dir/projects/scripts/adi_pd.tcl
1414
set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
1515

1616
#system ID
17-
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
17+
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 10
1818
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
19-
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
19+
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 10
20+
21+
set sys_cstring "JESD_MODE=$ad_project_params(JESD_MODE)\
22+
ORX_ENABLE=$ad_project_params(ORX_ENABLE)\
23+
RX:RATE=$ad_project_params(RX_LANE_RATE)\
24+
M=$ad_project_params(RX_JESD_M)\
25+
L=$ad_project_params(RX_JESD_L)\
26+
S=$ad_project_params(RX_JESD_S)\
27+
NP=$ad_project_params(RX_JESD_NP)\
28+
LINKS=$ad_project_params(RX_NUM_LINKS)\
29+
TX:RATE=$ad_project_params(TX_LANE_RATE)\
30+
M=$ad_project_params(TX_JESD_M)\
31+
L=$ad_project_params(TX_JESD_L)\
32+
S=$ad_project_params(TX_JESD_S)\
33+
NP=$ad_project_params(TX_JESD_NP)\
34+
LINKS=$ad_project_params(TX_NUM_LINKS)\
35+
ORX:RATE=$ad_project_params(RX_LANE_RATE)\
36+
M=$ad_project_params(RX_OS_JESD_M)\
37+
L=$ad_project_params(RX_OS_JESD_L)\
38+
S=$ad_project_params(RX_OS_JESD_S)\
39+
NP=$ad_project_params(RX_OS_JESD_NP)\
40+
LINKS=$ad_project_params(RX_OS_NUM_LINKS)"
2041

2142
sysid_gen_sys_init_file
2243

0 commit comments

Comments
 (0)