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hadarauelenahadarauelena
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projects: Integrate xcvr automation
Signed-off-by: Elena-Hadarau_adi <[email protected]>
1 parent d1ba0e0 commit 4ff2ff6

28 files changed

+414
-123
lines changed

‎projects/adrv9009/common/adrv9009_bd.tcl‎

Lines changed: 8 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ set DATAPATH_WIDTH 4
1717
source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
1818
source $ad_hdl_dir/projects/common/xilinx/adi_fir_filter_bd.tcl
1919
source $ad_hdl_dir/projects/common/xilinx/data_offload_bd.tcl
20+
source $ad_hdl_dir/library/xilinx/scripts/xcvr_automation.tcl
2021

2122
# TX parameters
2223
set TX_NUM_OF_LANES $ad_project_params(TX_JESD_L) ; # L
@@ -221,18 +222,14 @@ ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.CACHE_COHERENT $CACHE_COHERENCY
221222

222223
# common cores
223224

225+
global xcvr_config_paths
224226

225-
ad_ip_instance util_adxcvr util_adrv9009_xcvr
226-
ad_ip_parameter util_adrv9009_xcvr CONFIG.RX_NUM_OF_LANES [expr $MAX_RX_NUM_OF_LANES+$MAX_RX_OS_NUM_OF_LANES]
227-
ad_ip_parameter util_adrv9009_xcvr CONFIG.TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES
228-
ad_ip_parameter util_adrv9009_xcvr CONFIG.TX_OUT_DIV 1
229-
ad_ip_parameter util_adrv9009_xcvr CONFIG.CPLL_FBDIV 4
230-
ad_ip_parameter util_adrv9009_xcvr CONFIG.CPLL_FBDIV_4_5 5
231-
ad_ip_parameter util_adrv9009_xcvr CONFIG.RX_CLK25_DIV 10
232-
ad_ip_parameter util_adrv9009_xcvr CONFIG.TX_CLK25_DIV 10
233-
ad_ip_parameter util_adrv9009_xcvr CONFIG.RX_PMA_CFG 0x001E7080
234-
ad_ip_parameter util_adrv9009_xcvr CONFIG.RX_CDR_CFG 0x0b000023ff10400020
235-
ad_ip_parameter util_adrv9009_xcvr CONFIG.QPLL_FBDIV 0x080
227+
set util_adxcvr_parameters [adi_xcvr_parameters $xcvr_config_paths [list \
228+
RX_NUM_OF_LANES [expr $MAX_RX_NUM_OF_LANES+$MAX_RX_OS_NUM_OF_LANES] \
229+
TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES\
230+
]]
231+
232+
ad_ip_instance util_adxcvr util_adrv9009_xcvr $util_adxcvr_parameters
236233

237234
# xcvr interfaces
238235

‎projects/adrv9009/zc706/system_project.tcl‎

Lines changed: 23 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,29 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
1313
# Use over-writable parameters from the environment.
1414
#
1515
# e.g.
16-
# make TX_JESD_L=2 RX_OS_JESD_M=4
17-
# make TX_JESD_M=4 TX_JESD_L=2 RX_JESD_M=4 RX_JESD_L=1 RX_OS_JESD_M=2 RX_OS_JESD_L=1
18-
# make TX_JESD_M=2 TX_JESD_L=1 RX_JESD_M=4 RX_JESD_L=1 RX_OS_JESD_M=2 RX_OS_JESD_L=1
16+
# make PLL_TYPE=CPLL REF_CLK=125 LANE_RATE=5
17+
18+
# Parameter description:
19+
# LANE_RATE: Value of lane rate [gbps]
20+
# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
21+
# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL]
22+
#
23+
# e.g. call for make with parameters
24+
# set xcvr_config_paths [adi_xcvr_project [list \
25+
# LANE_RATE 5\
26+
# REF_CLK 125\
27+
# PLL_TYPE CPLL\
28+
# ]]
29+
# The function returns a dictionary with the paths to the `cfng` file
30+
# containing the modified parameters and to the `_common.v` file for extracting the value of the `QPLL_FBDIV_TOP` parameter for GTXE2.
31+
32+
global xcvr_config_paths
33+
34+
set xcvr_config_paths [adi_xcvr_project [list \
35+
LANE_RATE [get_env_param LANE_RATE 5] \
36+
REF_CLK [get_env_param REF_CLK 125] \
37+
PLL_TYPE [get_env_param PLL_TYPE CPLL] \
38+
]]
1939

2040
# Parameter description:
2141
# [TX/RX/RX_OS]_JESD_M : Number of converters per link
@@ -46,4 +66,3 @@ adi_project_files adrv9009_zc706 [list \
4666

4767
adi_project_run adrv9009_zc706
4868

49-

‎projects/adrv9009/zcu102/system_bd.tcl‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,5 +41,5 @@ ad_ip_parameter axi_adrv9009_rx_dma CONFIG.FIFO_SIZE 32
4141
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.FIFO_SIZE 32
4242
ad_ip_parameter axi_adrv9009_tx_dma CONFIG.FIFO_SIZE 32
4343

44-
ad_ip_parameter util_adrv9009_xcvr CONFIG.QPLL_FBDIV 80
45-
ad_ip_parameter util_adrv9009_xcvr CONFIG.QPLL_REFCLK_DIV 1
44+
# ad_ip_parameter util_adrv9009_xcvr CONFIG.QPLL_FBDIV 80
45+
# ad_ip_parameter util_adrv9009_xcvr CONFIG.QPLL_REFCLK_DIV 1

‎projects/adrv9009/zcu102/system_project.tcl‎

Lines changed: 23 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,29 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
1313
# Use over-writable parameters from the environment.
1414
#
1515
# e.g.
16-
# make TX_JESD_L=2 RX_OS_JESD_M=4
17-
# make TX_JESD_M=4 TX_JESD_L=2 RX_JESD_M=4 RX_JESD_L=1 RX_OS_JESD_M=2 RX_OS_JESD_L=1
18-
# make TX_JESD_M=2 TX_JESD_L=1 RX_JESD_M=4 RX_JESD_L=1 RX_OS_JESD_M=2 RX_OS_JESD_L=1
16+
# make PLL_TYPE=QPLL0 REF_CLK=250 LANE_RATE=10
17+
18+
# Parameter description:
19+
# LANE_RATE: Value of lane rate [gbps]
20+
# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
21+
# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
22+
#
23+
# e.g. call for make with parameters
24+
# set xcvr_config_paths [adi_xcvr_project [list \
25+
# LANE_RATE 10\
26+
# REF_CLK 250\
27+
# PLL_TYPE QPLL0\
28+
# ]]
29+
# The function returns a dictionary with the paths to the `cfng` file
30+
# containing the modified parameters and to the `_common.v` file for extracting the value of the `QPLL_FBDIV_TOP` parameter for GTXE2.
31+
32+
global xcvr_config_paths
33+
34+
set xcvr_config_paths [adi_xcvr_project [list \
35+
LANE_RATE [get_env_param LANE_RATE 10] \
36+
REF_CLK [get_env_param REF_CLK 250] \
37+
PLL_TYPE [get_env_param PLL_TYPE QPLL0] \
38+
]]
1939

2040
# Parameter description:
2141
# [TX/RX/RX_OS]_JESD_M : Number of converters per link

‎projects/adrv9026/common/adrv9026_bd.tcl‎

Lines changed: 15 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -140,24 +140,21 @@ create_bd_port -dir I $rx_ref_clk
140140

141141
# common cores
142142

143-
ad_ip_instance util_adxcvr util_adrv9026_xcvr
144-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_NUM_OF_LANES $RX_NUM_OF_LANES
145-
ad_ip_parameter util_adrv9026_xcvr CONFIG.LINK_MODE $ENCODER_SEL
146-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_LANE_RATE $RX_LANE_RATE
147-
ad_ip_parameter util_adrv9026_xcvr CONFIG.TX_LANE_RATE $TX_LANE_RATE
148-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_OUT_DIV 1
149-
ad_ip_parameter util_adrv9026_xcvr CONFIG.TX_NUM_OF_LANES $TX_NUM_OF_LANES
150-
ad_ip_parameter util_adrv9026_xcvr CONFIG.TX_OUT_DIV 1
151-
ad_ip_parameter util_adrv9026_xcvr CONFIG.CPLL_FBDIV 4
152-
ad_ip_parameter util_adrv9026_xcvr CONFIG.CPLL_FBDIV_4_5 5
153-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_CLK25_DIV 10
154-
ad_ip_parameter util_adrv9026_xcvr CONFIG.TX_CLK25_DIV 10
155-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_PMA_CFG 0x001E7080
156-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_CDR_CFG 0x0b000023ff10400020
157-
ad_ip_parameter util_adrv9026_xcvr CONFIG.QPLL_FBDIV 40
158-
ad_ip_parameter util_adrv9026_xcvr CONFIG.QPLL_REFCLK_DIV 1
159-
ad_ip_parameter util_adrv9026_xcvr CONFIG.TX_LANE_INVERT 6
160-
ad_ip_parameter util_adrv9026_xcvr CONFIG.RX_LANE_INVERT 15
143+
source $ad_hdl_dir/library/xilinx/scripts/xcvr_automation.tcl
144+
145+
global xcvr_config_paths
146+
147+
set util_adxcvr_parameters [adi_xcvr_parameters $xcvr_config_paths [list \
148+
LINK_MODE $ENCODER_SEL \
149+
RX_LANE_RATE $RX_LANE_RATE \
150+
TX_LANE_RATE $TX_LANE_RATE \
151+
TX_LANE_INVERT 6 \
152+
RX_LANE_INVERT 15 \
153+
RX_NUM_OF_LANES $RX_NUM_OF_LANES \
154+
TX_NUM_OF_LANES $TX_NUM_OF_LANES\
155+
]]
156+
157+
ad_ip_instance util_adxcvr util_adrv9026_xcvr $util_adxcvr_parameters
161158

162159
ad_connect $sys_cpu_resetn util_adrv9026_xcvr/up_rstn
163160
ad_connect $sys_cpu_clk util_adrv9026_xcvr/up_clk

‎projects/adrv9026/vcu118/system_project.tcl‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,31 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
1212
#
1313
# Use over-writable parameters from the environment.
1414
#
15+
# e.g.
16+
# make PLL_TYPE=QPLL0 REF_CLK=245.75 LANE_RATE=9.83
17+
18+
# Parameter description:
19+
# LANE_RATE: Value of lane rate [gbps]
20+
# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
21+
# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
22+
#
23+
# e.g. call for make with parameters
24+
# set xcvr_config_paths [adi_xcvr_project [list \
25+
# LANE_RATE 9.83\
26+
# REF_CLK 245.75\
27+
# PLL_TYPE QPLL0\
28+
# ]]
29+
# The function returns a dictionary with the paths to the `cfng` file
30+
# containing the modified parameters and to the `_common.v` file for extracting the value of the `QPLL_FBDIV_TOP` parameter for GTXE2.
31+
32+
global xcvr_config_paths
33+
34+
set xcvr_config_paths [adi_xcvr_project [list \
35+
LANE_RATE [get_env_param LANE_RATE 9.83] \
36+
REF_CLK [get_env_param REF_CLK 245.75] \
37+
PLL_TYPE [get_env_param PLL_TYPE QPLL0] \
38+
]]
39+
1540
# Parameter description:
1641
# [TX/RX/RX_OS]_JESD_M : Number of converters per link
1742
# [TX/RX/RX_OS]_JESD_L : Number of lanes per link
@@ -43,3 +68,4 @@ set_property strategy Performance_RefinePlacement [get_runs impl_1]
4368
set_property STEPS.PHYS_OPT_DESIGN.ARGS.DIRECTIVE ExploreWithAggressiveHoldFix [get_runs impl_1]
4469

4570
adi_project_run adrv9026_vcu118
71+

‎projects/adrv9026/zcu102/system_project.tcl‎

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,36 @@ source ../../../scripts/adi_env.tcl
77
source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
88
source $ad_hdl_dir/projects/scripts/adi_board.tcl
99

10+
# get_env_param retrieves parameter value from the environment if exists,
11+
# other case use the default value
12+
#
13+
# Use over-writable parameters from the environment.
14+
#
15+
# e.g.
16+
# make PLL_TYPE=QPLL0 REF_CLK=245.75 LANE_RATE=9.83
17+
18+
# Parameter description:
19+
# LANE_RATE: Value of lane rate [gbps]
20+
# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
21+
# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
22+
#
23+
# e.g. call for make with parameters
24+
# set xcvr_config_paths [adi_xcvr_project [list \
25+
# LANE_RATE 9.83\
26+
# REF_CLK 245.75\
27+
# PLL_TYPE QPLL0\
28+
# ]]
29+
# The function returns a dictionary with the paths to the `cfng` file
30+
# containing the modified parameters and to the `_common.v` file for extracting the value of the `QPLL_FBDIV_TOP` parameter for GTXE2.
31+
32+
global xcvr_config_paths
33+
34+
set xcvr_config_paths [adi_xcvr_project [list \
35+
LANE_RATE [get_env_param LANE_RATE 9.83] \
36+
REF_CLK [get_env_param REF_CLK 245.75] \
37+
PLL_TYPE [get_env_param PLL_TYPE QPLL0] \
38+
]]
39+
1040
adi_project adrv9026_zcu102 0 [list \
1141
JESD_MODE [get_env_param JESD_MODE 8B10B ] \
1242
TX_LANE_RATE [get_env_param TX_LANE_RATE 9.83 ] \
@@ -26,4 +56,4 @@ adi_project_files adrv9026_zcu102 [list \
2656
"$ad_hdl_dir/library/common/ad_iobuf.v" \
2757
"$ad_hdl_dir/projects/common/zcu102/zcu102_system_constr.xdc" ]
2858

29-
adi_project_run adrv9026_zcu102
59+
adi_project_run adrv9026_zcu102

‎projects/adrv9371x/common/adrv9371x_bd.tcl‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ set dac_dma_data_width [expr $TX_SAMPLE_WIDTH * $TX_NUM_OF_CONVERTERS * $TX_SAMP
4747

4848
source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
4949
source $ad_hdl_dir/projects/common/xilinx/adi_fir_filter_bd.tcl
50+
source $ad_hdl_dir/library/xilinx/scripts/xcvr_automation.tcl
5051

5152
# ad9371
5253

@@ -203,16 +204,14 @@ ad_ip_parameter axi_ad9371_rx_os_dma CONFIG.CACHE_COHERENT $CACHE_COHERENCY
203204

204205
# common cores
205206

206-
ad_ip_instance util_adxcvr util_ad9371_xcvr
207-
ad_ip_parameter util_ad9371_xcvr CONFIG.RX_NUM_OF_LANES [expr $MAX_RX_NUM_OF_LANES+$MAX_RX_OS_NUM_OF_LANES]
208-
ad_ip_parameter util_ad9371_xcvr CONFIG.TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES
209-
ad_ip_parameter util_ad9371_xcvr CONFIG.TX_OUT_DIV 2
210-
ad_ip_parameter util_ad9371_xcvr CONFIG.CPLL_FBDIV 4
211-
ad_ip_parameter util_ad9371_xcvr CONFIG.RX_CLK25_DIV 5
212-
ad_ip_parameter util_ad9371_xcvr CONFIG.TX_CLK25_DIV 5
213-
ad_ip_parameter util_ad9371_xcvr CONFIG.RX_PMA_CFG 0x00018480
214-
ad_ip_parameter util_ad9371_xcvr CONFIG.RX_CDR_CFG 0x03000023ff20400020
215-
ad_ip_parameter util_ad9371_xcvr CONFIG.QPLL_FBDIV 0x120
207+
global xcvr_config_paths
208+
209+
set util_adxcvr_parameters [adi_xcvr_parameters $xcvr_config_paths [list \
210+
RX_NUM_OF_LANES [expr $MAX_RX_NUM_OF_LANES+$MAX_RX_OS_NUM_OF_LANES] \
211+
TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES\
212+
]]
213+
214+
ad_ip_instance util_adxcvr util_ad9371_xcvr $util_adxcvr_parameters
216215

217216
# xcvr interfaces
218217

@@ -410,3 +409,4 @@ ad_cpu_interrupt ps-10 mb-15 axi_ad9371_rx_jesd/irq
410409
ad_cpu_interrupt ps-11 mb-14 axi_ad9371_rx_os_dma/irq
411410
ad_cpu_interrupt ps-12 mb-13- axi_ad9371_tx_dma/irq
412411
ad_cpu_interrupt ps-13 mb-12 axi_ad9371_rx_dma/irq
412+

‎projects/adrv9371x/kcu105/system_bd.tcl‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -34,9 +34,3 @@ sysid_gen_sys_init_file $sys_cstring
3434
ad_ip_parameter axi_ddr_cntrl CONFIG.ADDN_UI_CLKOUT3_FREQ_HZ 200
3535

3636
source ../common/adrv9371x_bd.tcl
37-
38-
ad_ip_parameter util_ad9371_xcvr CONFIG.QPLL_FBDIV 80
39-
ad_ip_parameter util_ad9371_xcvr CONFIG.QPLL_REFCLK_DIV 1
40-
ad_ip_parameter util_ad9371_xcvr CONFIG.CPLL_CFG0 0x67f8
41-
ad_ip_parameter util_ad9371_xcvr CONFIG.CPLL_CFG1 0xa4ac
42-
ad_ip_parameter util_ad9371_xcvr CONFIG.CPLL_CFG2 0x0007

‎projects/adrv9371x/kcu105/system_project.tcl‎

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,29 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
1313
# Use over-writable parameters from the environment.
1414
#
1515
# e.g.
16-
# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2
16+
# make PLL_TYPE=CPLL REF_CLK=125 LANE_RATE=5
17+
18+
# Parameter description:
19+
# LANE_RATE: Value of lane rate [gbps]
20+
# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
21+
# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
22+
#
23+
# e.g. call for make with parameters
24+
# set xcvr_config_paths [adi_xcvr_project [list \
25+
# LANE_RATE 5\
26+
# REF_CLK 125\
27+
# PLL_TYPE CPLL\
28+
# ]]
29+
# The function returns a dictionary with the paths to the `cfng` file
30+
# containing the modified parameters and to the `_common.v` file for extracting the value of the `QPLL_FBDIV_TOP` parameter for GTXE2.
31+
32+
global xcvr_config_paths
33+
34+
set xcvr_config_paths [adi_xcvr_project [list \
35+
LANE_RATE [get_env_param LANE_RATE 5] \
36+
REF_CLK [get_env_param REF_CLK 125] \
37+
PLL_TYPE [get_env_param PLL_TYPE CPLL] \
38+
]]
1739

1840
# Parameter description:
1941
# [TX/RX/RX_OS]_JESD_M : Number of converters per link

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