diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dac-max22007 b/Documentation/ABI/testing/sysfs-bus-iio-dac-max22007 new file mode 100644 index 00000000000000..2475917d5d9766 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-dac-max22007 @@ -0,0 +1,33 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_ldac_update +KernelVersion: 6.13 +Contact: linux-iio@vger.kernel.org +Description: + Trigger LDAC (Load DAC) update for the specified channel. Write 1 to update DAC outputs. + +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_ldac_update +KernelVersion: 6.13 +Contact: linux-iio@vger.kernel.org +Description: + Trigger LDAC (Load DAC) update for the specified channel. + Writing 1 will transfer the DAC register value to the actual + DAC output, effectively updating the analog output current. + Writing 0 has no effect. This is useful when using the + transparent latch mode is disabled, allowing manual control + over when DAC register changes take effect on the output. + +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_powermode +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_powermode +KernelVersion: 6.13 +Contact: linux-iio@vger.kernel.org +Description: + Control the power state of the specified channel. Write "on" to + enable the channel output, or "off" to disable it. Reading + returns the current power state. + +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_powermode_available +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_powermode_available +KernelVersion: 6.13 +Contact: linux-iio@vger.kernel.org +Description: + Shows the available power modes for the channel. Always returns + "on off". \ No newline at end of file diff --git a/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml b/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml new file mode 100644 index 00000000000000..6b983eb52c0dd3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,max22007.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX22007 DAC device driver + +maintainers: + - Janani Sunil + +description: + The MAX22007 is a quad-channel, 12-bit digital-to-analog converter (DAC) + with integrated precision output amplifiers and current output capability. + Each channel can be independently configured for voltage or current output. + The driver supports runtime LDAC (Latch DAC) control via per-channel sysfs + attributes for precise output timing control. + Datasheet available at https://www.analog.com/en/products/max22007.html + +properties: + compatible: + const: adi,max22007 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 500000 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + vdd-supply: + description: Low-Voltage Power Supply from +2.7V to +5.5V. + + hvdd-supply: + description: + Positive High-Voltage Power Supply from +8V to (HVSS +24V) for + the Output Channels. + + hvss-supply: + description: + Negative High-Voltage Power Supply from -2V to 0V for the Output Channels. + + adi,crc-disable: + type: boolean + description: + Disable CRC8 error checking for SPI communications. By default, CRC8 is + enabled for data integrity verification. Set this property to disable it. + + reset-gpios: + maxItems: 1 + description: + GPIO used for hardware reset of the device. If not specified, the driver + will use software reset via SPI register. + +patternProperties: + "^channel@[0-3]$": + type: object + description: + Represents the external channels which are connected to the DAC. + Channels not specified in the device tree will be powered off. + properties: + reg: + description: + This represents the channel number. + maximum: 3 + + adi,dac-latch-mode: + description: + DAC latch control mode for the channel. + $ref: /schemas/types.yaml#/definitions/string + enum: [ldac-control, transparent] + default: ldac-control + + adi,mode: + description: + Output mode for the channel. + $ref: /schemas/types.yaml#/definitions/string + enum: [voltage, current] + default: voltage + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + +anyOf: + - required: [channel@0] + - required: [channel@1] + - required: [channel@2] + - required: [channel@3] + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "adi,max22007"; + reg = <0>; + spi-max-frequency = <500000>; + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + adi,mode = "voltage"; + adi,dac-latch-mode = "ldac-control"; + }; + + channel@1 { + reg = <1>; + adi,mode = "current"; + adi,dac-latch-mode = "transparent"; + }; + }; + }; +... diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index 6e88932536bd85..be8ace8df75a9d 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -31,3 +31,4 @@ Industrial I/O Kernel Drivers adxl380 bno055 ep93xx_adc + max22007 diff --git a/Documentation/iio/max22007.rst b/Documentation/iio/max22007.rst new file mode 100644 index 00000000000000..29b97eb1324b18 --- /dev/null +++ b/Documentation/iio/max22007.rst @@ -0,0 +1,192 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +=============== +MAX22007 driver +=============== + +Device driver for Analog Devices Inc. MAX22007 quad-channel industrial DAC. +The module name is ``max22007``. + +Supported devices +================= + +* `MAX22007 `_ + +Wiring connections +================== + +The MAX22007 uses a standard SPI interface. + +Device Tree Configuration +========================= + +The device supports both global and per-channel configuration through device tree. + +Global Properties: +* ``adi,crc-disable``: Disable CRC8 error checking for SPI communications (optional, CRC enabled by default) +* ``reset-gpios``: GPIO pin for hardware reset (optional, falls back to software reset if not specified) +* ``vdd-supply``: Low-Voltage Power Supply from +2.7V to +5.5V (optional) +* ``hvdd-supply``: Positive High-Voltage Power Supply from +8V to (HVSS +24V) for the Output Channels (optional) +* ``hvss-supply``: Negative High-Voltage Power Supply from -2V to 0V for the Output Channels (optional) + +Per-channel properties: +* ``adi,dac-latch-mode``: Controls when DAC updates occur + - "ldac-control": LDAC pin controls the latch (default) + - "transparent": Transparent latch mode (immediate update) + +* ``adi,mode``: Sets the output mode + - "voltage": Voltage output mode (default) + - "current": Current output mode + +Device attributes +================= + +The MAX22007 driver provides IIO DAC interfaces that vary based on the +configured channel mode. Each channel appears as a separate IIO device +attribute: + +* ``out_voltage_raw`` (voltage mode channels) +* ``out_current_raw`` (current mode channels) +* ``out_voltage_scale`` / ``out_current_scale`` (channel scaling factors) +* ``out_voltage_powermode`` / ``out_current_powermode`` (channel power control) +* ``out_voltage_powermode_available`` / ``out_current_powermode_available`` (available power modes) +* ``ldac_update`` (per-channel LDAC latch control) + +The driver automatically configures the IIO channel type based on the configured +channel mode from device tree. + +LDAC Update Control +=================== + +Each channel provides an ``ldac_update`` attribute for runtime LDAC (Latch DAC) +control. This allows precise timing control of when DAC register values are +transferred to the output: + +* Write ``1`` to trigger an immediate LDAC update for that specific channel +* Write ``0`` for no operation (returns immediately) + +This provides fine-grained control over output timing, which is essential for +applications requiring synchronized DAC updates. + +Power Mode Control +================== + +Each channel provides ``powermode`` attributes for runtime power control: + +* Write ``"on"`` to enable the channel output +* Write ``"off"`` to disable the channel output +* Read the attribute to get the current power state +* Read ``powermode_available`` to see available power modes (always ``"off on"``) + +This allows individual channels to be powered on/off independently for power +management and safety purposes. + +Usage Examples +============== + +Setting DAC output value and triggering LDAC update: + +.. code-block:: bash + + # Set channel 0 (voltage mode) to raw value 655 (≈2V) + echo 655 > /sys/bus/iio/devices/iio:deviceX/out_voltage0_raw + + # Trigger LDAC update to apply the new value + echo 1 > /sys/bus/iio/devices/iio:deviceX/out_voltage0_ldac_update + + # Set channel 1 (current mode) and update + echo 1024 > /sys/bus/iio/devices/iio:deviceX/out_current1_raw + echo 1 > /sys/bus/iio/devices/iio:deviceX/out_current1_ldac_update + +Controlling channel power modes: + +.. code-block:: bash + + # Enable channel 0 + echo on > /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode + + # Disable channel 1 + echo off > /sys/bus/iio/devices/iio:deviceX/out_current1_powermode + + # Check current power state + cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode + + # Check available power modes + cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode_available + +Reading channel values and scale factors: + +.. code-block:: bash + + # Read raw DAC value + cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_raw + + # Read scale factor (volts per LSB) + cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_scale + +Check available channels: + +.. code-block:: bash + + ls /sys/bus/iio/devices/iio:deviceX/out_*_raw + +Scale Calculations +================== + +The driver provides accurate scale factors based on the hardware configuration: + +**Voltage Mode:** + - Scale = (5 × 2.5V) / 4096 = 0.003051757 V per LSB + - Range: 0V to 12.5V over 12-bit (0-4095) + - Formula: Output = Raw_Value × Scale + +**Current Mode:** + - Scale = (2.5V / (2 × 50Ω)) / 4096 = 0.000006103515625 A per LSB + - Range: 0A to 0.025A over 12-bit (0-4095) + - Formula: Output = Raw_Value × Scale + +Register Map +------------ + +The MAX22007 uses the following register mapping: + +.. list-table:: + :header-rows: 1 + + * - Address + - Register Name + - Description + * - 0x03 + - CONFIG_REG + - Configuration register (CRC enable, DAC latch modes) + * - 0x04 + - CONTROL_REG + - LDAC control register for runtime updates + * - 0x05 + - CHANNEL_MODE_REG + - Channel mode and power control + * - 0x06 + - SOFT_RESET_REG + - Software reset control + * - 0x07-0x0A + - DAC_CHANNEL_REG(0-3) + - DAC data registers for channels 0-3 + + +Driver Architecture +=================== + +The driver implements the following key features: + +* **CRC8 Error Checking**: All SPI communications use CRC8 for data integrity +* **Channel Configuration**: Supports per-channel mode and power configuration +* **Register Map**: Uses regmap for efficient register access and caching +* **IIO Integration**: Full integration with the Linux IIO subsystem + +Not Implemented +=============== + +* Channel configuration (voltage/current mode) is set at device tree parsing + and cannot be changed dynamically +* The driver requires proper device tree configuration for optimal operation +* Simultaneous multi-channel LDAC updates (only single-channel updates supported) \ No newline at end of file diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile index 157bbdd8167fd3..429c8ea7b48828 100644 --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -322,6 +322,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ rpi-ltc6952.dtbo \ rpi-max14830-i2c.dtbo \ rpi-max14830-spi.dtbo \ + rpi-max22007.dtbo \ rpi-max31335.dtbo \ rpi-poe.dtbo \ rpi-poe-plus.dtbo \ diff --git a/arch/arm/boot/dts/overlays/rpi-max22007-overlay.dts b/arch/arm/boot/dts/overlays/rpi-max22007-overlay.dts new file mode 100644 index 00000000000000..cf52cb221cc717 --- /dev/null +++ b/arch/arm/boot/dts/overlays/rpi-max22007-overlay.dts @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices MAX22007 + * + * hdl_project: + * + * Copyright (C) 2025 Analog Devices Inc. + */ + +/dts-v1/; +/plugin/; + +#include + +&spi0 { + status = "okay"; + + max22007: max22007@0 { + compatible = "adi,max22007"; + reg = <0>; + spi-max-frequency = <500000>; + spi-cpha; + spi-cpol; + status = "okay"; + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + adi,dac-latch-mode = "ldac-control"; + adi,mode = "voltage"; + }; + + channel@1 { + reg = <1>; + adi,dac-latch-mode = "ldac-control"; + adi,mode = "voltage"; + }; + + channel@2 { + reg = <2>; + adi,dac-latch-mode = "ldac-control"; + adi,mode = "voltage"; + }; + + channel@3 { + reg = <3>; + adi,dac-latch-mode = "ldac-control"; + adi,mode = "voltage"; + }; + }; +}; + +&spidev0 { + status = "disabled"; +}; + +&spidev1 { + status = "disabled"; +}; diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 6b97fefd805784..6a0faa50964fd0 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -472,6 +472,19 @@ config MAX517 This driver can also be built as a module. If so, the module will be called max517. +config MAX22007 + tristate "Analog Devices MAX22007 DAC Driver" + depends on SPI + select REGMAP + select CRC8 + help + Say Y here if you want to build a driver for Analog Devices MAX22007. + + MAX22007 is a single-channel, 16-bit, voltage-output digital to + analog converter (DAC) with SPI interface. + + If compiled as a module, it will be called max22007. + config MAX5522 tristate "Maxim MAX5522 DAC driver" depends on SPI_MASTER diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 4b0a840d8610b7..6f4db74fff4b17 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_LTC2664) += ltc2664.o obj-$(CONFIG_LTC2688) += ltc2688.o obj-$(CONFIG_M62332) += m62332.o obj-$(CONFIG_MAX517) += max517.o +obj-$(CONFIG_MAX22007) += max22007.o obj-$(CONFIG_MAX5522) += max5522.o obj-$(CONFIG_MAX5821) += max5821.o obj-$(CONFIG_MCP4725) += mcp4725.o diff --git a/drivers/iio/dac/max22007.c b/drivers/iio/dac/max22007.c new file mode 100644 index 00000000000000..c08c9e3654da80 --- /dev/null +++ b/drivers/iio/dac/max22007.c @@ -0,0 +1,613 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * max22007.c - MAX22007 DAC driver + * + * Driver for Analog Devices MAX22007 Digital to Analog Converter. + * + * Copyright (c) 2025 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX22007_NUM_CHANNELS 4 +#define MAX22007_REV_ID_REG 0x00 +#define MAX22007_STAT_INTR_REG 0x01 +#define MAX22007_INTERRUPT_EN_REG 0x02 +#define MAX22007_CONFIG_REG 0x03 +#define MAX22007_CONTROL_REG 0x04 +#define MAX22007_CHANNEL_MODE_REG 0x05 +#define MAX22007_SOFT_RESET_REG 0x06 +#define MAX22007_DAC_CHANNEL_REG(ch) (0x07 + (ch)) +#define MAX22007_GPIO_CTRL_REG 0x0B +#define MAX22007_GPIO_DATA_REG 0x0C +#define MAX22007_GPI_EDGE_INT_CTRL_REG 0x0D +#define MAX22007_GPI_INT_STATUS_REG 0x0E + +/* Channel mask definitions */ +#define MAX22007_CH_MODE_CH_MASK(channel) BIT(12 + (channel)) +#define MAX22007_CH_PWR_CH_MASK(channel) BIT(8 + (channel)) +#define MAX22007_DAC_LATCH_MODE_MASK(channel) BIT(12 + (channel)) +#define MAX22007_LDAC_UPDATE_MASK(channel) BIT(12 + (channel)) +#define MAX22007_SW_RST_MASK BIT(8) +#define MAX22007_SW_CLR_MASK BIT(12) +#define MAX22007_SOFT_RESET_BITS_MASK (MAX22007_SW_RST_MASK | \ + MAX22007_SW_CLR_MASK) +#define MAX22007_DAC_DATA_MASK GENMASK(15, 4) +#define MAX22007_DAC_MAX_RAW GENMASK(11, 0) +#define MAX22007_CRC8_POLYNOMIAL 0x8C +#define MAX22007_CRC_EN_MASK BIT(0) +#define MAX22007_REG_ADDR_MASK GENMASK(7, 1) +#define MAX22007_RW_MASK BIT(0) + +/* Field value preparation macros with masking */ +#define MAX22007_CH_PWR_VAL(channel, val) (((val) & 0x1) << (8 + (channel))) +#define MAX22007_CH_MODE_VAL(channel, val) (((val) & 0x1) << (12 + (channel))) +#define MAX22007_DAC_LATCH_MODE_VAL(channel, val) (((val) & 0x1) << (12 + (channel))) + +static u8 max22007_crc8_table[256]; + +enum max22007_channel_mode { + MAX22007_VOLTAGE_MODE = 0, + MAX22007_CURRENT_MODE = 1, +}; + +enum max22007_dac_latch_mode { + LDAC_CONTROL = 0, + TRANSPARENT_LATCH = 1 +}; + +enum max22007_channel_power { + MAX22007_CH_POWER_OFF = 0, + MAX22007_CH_POWER_ON = 1, +}; + +static const char * const max22007_power_modes[] = { + [MAX22007_CH_POWER_OFF] = "off", + [MAX22007_CH_POWER_ON] = "on", +}; + +struct max22007_state { + struct spi_device *spi; + struct regmap *regmap; + struct iio_chan_spec *iio_chan; + bool crc_en; + u8 tx_buf[4] __aligned(IIO_DMA_MINALIGN); + u8 rx_buf[4]; +}; + +static ssize_t max22007_write_ldac_update(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len); + +static int max22007_power_mode_read(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan); + +static int max22007_power_mode_write(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int item); + +static const struct iio_enum max22007_power_mode_enum = { + .items = max22007_power_modes, + .num_items = ARRAY_SIZE(max22007_power_modes), + .set = max22007_power_mode_write, + .get = max22007_power_mode_read, +}; + +static const struct iio_chan_spec_ext_info max22007_ext_info[] = { + { + .name = "ldac_update", + .write = max22007_write_ldac_update, + .shared = IIO_SEPARATE, + }, + IIO_ENUM("powermode", IIO_SEPARATE, &max22007_power_mode_enum), + IIO_ENUM_AVAILABLE("powermode", IIO_SEPARATE, &max22007_power_mode_enum), + { }, +}; + +static int max22007_spi_reg_read(struct max22007_state *st, unsigned int reg, unsigned int *val) +{ + u8 calculated_crc, received_crc; + u8 crc_data[3]; + int ret; + struct spi_transfer xfer = { + .tx_buf = st->tx_buf, + .rx_buf = st->rx_buf, + .len = 3, + }; + + memset(st->tx_buf, 0, sizeof(st->tx_buf)); + memset(st->rx_buf, 0, sizeof(st->rx_buf)); + + if (st->crc_en) + xfer.len += 1; + + st->tx_buf[0] = FIELD_PREP(MAX22007_REG_ADDR_MASK, reg) | + FIELD_PREP(MAX22007_RW_MASK, 1); + + ret = spi_sync_transfer(st->spi, &xfer, 1); + if (ret) { + dev_err(&st->spi->dev, "SPI transfer failed: %d\n", ret); + return ret; + } + + if (st->crc_en) { + crc_data[0] = st->tx_buf[0]; + crc_data[1] = st->rx_buf[1]; + crc_data[2] = st->rx_buf[2]; + + calculated_crc = crc8(max22007_crc8_table, crc_data, 3, 0x00); + received_crc = st->rx_buf[3]; + + if (calculated_crc != received_crc) { + dev_warn(&st->spi->dev, "CRC mismatch on read register %02x:\n", reg); + return -EIO; + } + } + + /* Ignore the dummy byte 0 */ + *val = get_unaligned_be16(&st->rx_buf[1]); + + return 0; +} + +static int max22007_spi_reg_write(struct max22007_state *st, unsigned int reg, unsigned int val) +{ + struct spi_transfer xfer = { + .tx_buf = st->tx_buf, + .rx_buf = st->tx_buf, + .len = 3, + }; + + memset(st->tx_buf, 0, sizeof(st->tx_buf)); + + if (st->crc_en) + xfer.len += 1; + + st->tx_buf[0] = FIELD_PREP(MAX22007_REG_ADDR_MASK, reg) | + FIELD_PREP(MAX22007_RW_MASK, 0); + st->tx_buf[1] = (val >> 8) & 0xFF; + st->tx_buf[2] = val; + if (st->crc_en) + st->tx_buf[3] = crc8(max22007_crc8_table, st->tx_buf, 3, 0x00); + + return spi_sync_transfer(st->spi, &xfer, 1); +} + +static int max22007_spi_read(void *context, const void *reg, size_t reg_size, + void *val, size_t val_size) +{ + struct max22007_state *st = context; + unsigned int reg_addr = *(u8 *)reg; + unsigned int read_val; + int ret; + + ret = max22007_spi_reg_read(st, reg_addr, &read_val); + if (ret) + return ret; + + /* Store as big endian */ + put_unaligned_be16(read_val, val); + return 0; +} + +static int max22007_spi_write(void *context, const void *data, size_t count) +{ + struct max22007_state *st = context; + u8 reg; + u16 val; + + if (count != 3) + return -EINVAL; + + reg = *(u8 *)data; + val = get_unaligned_be16((u8 *)data + 1); + + return max22007_spi_reg_write(st, reg, val); +} + +static bool max22007_reg_readable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX22007_REV_ID_REG: + case MAX22007_STAT_INTR_REG: + case MAX22007_CONFIG_REG: + case MAX22007_CONTROL_REG: + case MAX22007_CHANNEL_MODE_REG: + case MAX22007_SOFT_RESET_REG: + case MAX22007_GPIO_CTRL_REG: + case MAX22007_GPIO_DATA_REG: + case MAX22007_GPI_EDGE_INT_CTRL_REG: + case MAX22007_GPI_INT_STATUS_REG: + return true; + case MAX22007_DAC_CHANNEL_REG(0) ... MAX22007_DAC_CHANNEL_REG(MAX22007_NUM_CHANNELS - 1): + return true; + default: + return false; + } +} + +static bool max22007_reg_writable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX22007_CONFIG_REG: + case MAX22007_CONTROL_REG: + case MAX22007_CHANNEL_MODE_REG: + case MAX22007_SOFT_RESET_REG: + case MAX22007_GPIO_CTRL_REG: + case MAX22007_GPIO_DATA_REG: + case MAX22007_GPI_EDGE_INT_CTRL_REG: + return true; + case MAX22007_DAC_CHANNEL_REG(0) ... MAX22007_DAC_CHANNEL_REG(MAX22007_NUM_CHANNELS - 1): + return true; + default: + return false; + } +} + +static const struct regmap_bus max22007_regmap_bus = { + .read = max22007_spi_read, + .write = max22007_spi_write, + .reg_format_endian_default = REGMAP_ENDIAN_BIG, + .val_format_endian_default = REGMAP_ENDIAN_BIG, +}; + +static const struct regmap_config max22007_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .readable_reg = max22007_reg_readable, + .writeable_reg = max22007_reg_writable, + .max_register = 0x0E, +}; + +static int max22007_write_channel_data(struct max22007_state *state, unsigned int channel, + unsigned int data) +{ + unsigned int reg_val; + + if (data > MAX22007_DAC_MAX_RAW) + return -EINVAL; + + reg_val = FIELD_PREP(MAX22007_DAC_DATA_MASK, data); + + return regmap_write(state->regmap, MAX22007_DAC_CHANNEL_REG(channel), reg_val); +} + +static int max22007_read_channel_data(struct max22007_state *state, unsigned int channel, + unsigned int *data) +{ + int ret; + unsigned int reg_val; + + ret = regmap_read(state->regmap, MAX22007_DAC_CHANNEL_REG(channel), ®_val); + if (ret) + return ret; + + *data = FIELD_GET(MAX22007_DAC_DATA_MASK, reg_val); + + return 0; +} + +static int max22007_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct max22007_state *st = iio_priv(indio_dev); + unsigned int reg_val; + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = max22007_read_channel_data(st, chan->channel, ®_val); + if (ret) + return ret; + *val = reg_val; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + if (chan->type == IIO_VOLTAGE) { + *val = 5 * 2500; /* 5 * Vref(2.5V) in mV */ + *val2 = 4096 * 1000; /* 12-bit DAC resolution * 1000 to convert mV to V */ + } else { + *val = 2500; /* Vref in mV */ + *val2 = 2 * 50 * 4096 * 1000; /* 2 * Rsense * 4096 * 1000 to convert mA to A */ + } + return IIO_VAL_FRACTIONAL; + default: + return -EINVAL; + } +} + +static int max22007_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct max22007_state *st = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + return max22007_write_channel_data(st, chan->channel, val); + default: + return -EINVAL; + } +} + +static int max22007_ldac_update_channel(struct max22007_state *state, unsigned int channel) +{ + if (channel >= MAX22007_NUM_CHANNELS) + return -EINVAL; + + return regmap_write(state->regmap, MAX22007_CONTROL_REG, + MAX22007_LDAC_UPDATE_MASK(channel)); +} + +static ssize_t max22007_write_ldac_update(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct max22007_state *st = iio_priv(indio_dev); + bool update; + int ret; + + ret = kstrtobool(buf, &update); + if (ret) + return ret; + + if (!update) + return len; + + ret = max22007_ldac_update_channel(st, chan->channel); + if (ret) + return ret; + + return len; +} + +static const struct iio_info max22007_info = { + .read_raw = max22007_read_raw, + .write_raw = max22007_write_raw, +}; + +static int max22007_set_power_mode(struct max22007_state *state, unsigned int channel, + enum max22007_channel_power power_mode) +{ + return regmap_update_bits(state->regmap, MAX22007_CHANNEL_MODE_REG, + MAX22007_CH_PWR_CH_MASK(channel), + MAX22007_CH_PWR_VAL(channel, power_mode)); +} + +static int max22007_set_channel_mode(struct max22007_state *state, unsigned int channel, + enum max22007_channel_mode channel_mode) +{ + return regmap_update_bits(state->regmap, MAX22007_CHANNEL_MODE_REG, + MAX22007_CH_MODE_CH_MASK(channel), + MAX22007_CH_MODE_VAL(channel, channel_mode)); +} + +static int max22007_set_dac_latch_mode(struct max22007_state *state, unsigned int channel, + enum max22007_dac_latch_mode latch_mode) +{ + return regmap_update_bits(state->regmap, MAX22007_CONFIG_REG, + MAX22007_DAC_LATCH_MODE_MASK(channel), + MAX22007_DAC_LATCH_MODE_VAL(channel, latch_mode)); +} + +static int max22007_configure_crc(struct max22007_state *state) +{ + bool crc; + int ret; + + crc = !device_property_read_bool(&state->spi->dev, "adi,crc-disable"); + + ret = regmap_update_bits(state->regmap, MAX22007_CONFIG_REG, + MAX22007_CRC_EN_MASK, + crc ? MAX22007_CRC_EN_MASK : 0); + if (ret) + return ret; + + state->crc_en = crc; + + return 0; +} + +static int max22007_power_mode_read(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct max22007_state *st = iio_priv(indio_dev); + unsigned int reg_val; + int ret; + + ret = regmap_read(st->regmap, MAX22007_CHANNEL_MODE_REG, ®_val); + if (ret) + return ret; + + if (reg_val & MAX22007_CH_PWR_CH_MASK(chan->channel)) + return MAX22007_CH_POWER_ON; + else + return MAX22007_CH_POWER_OFF; +} + +static int max22007_power_mode_write(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int item) +{ + struct max22007_state *st = iio_priv(indio_dev); + + return max22007_set_power_mode(st, chan->channel, item); +} + +static int max22007_parse_channel_cfg(struct max22007_state *st, u8 *num_channels) +{ + static const char * const latch_mode_strings[] = { "ldac-control", "transparent" }; + static const char * const mode_strings[] = { "voltage", "current" }; + struct device *dev = &st->spi->dev; + struct iio_chan_spec *iio_chan; + int ret, num_chan = 0, i = 0; + int latch_mode_idx, mode_idx; + u32 reg; + + num_chan = device_get_child_node_count(dev); + if (!num_chan) + return dev_err_probe(dev, -ENODEV, "no channels configured\n"); + + st->iio_chan = devm_kcalloc(dev, num_chan, sizeof(*st->iio_chan), GFP_KERNEL); + if (!st->iio_chan) + return -ENOMEM; + + device_for_each_child_node_scoped(dev, child) { + ret = fwnode_property_read_u32(child, "reg", ®); + if (ret) + return dev_err_probe(dev, ret, + "failed to read reg property of %pfwP\n", child); + + if (reg >= MAX22007_NUM_CHANNELS) + return dev_err_probe(dev, -EINVAL, + "reg out of range in %pfwP\n", child); + + iio_chan = &st->iio_chan[i]; + + iio_chan->type = IIO_VOLTAGE; + iio_chan->output = 1; + iio_chan->indexed = 1; + iio_chan->channel = reg; + iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE); + iio_chan->ext_info = max22007_ext_info; + i++; + + latch_mode_idx = fwnode_property_match_property_string(child, "adi,dac-latch-mode", + latch_mode_strings, + ARRAY_SIZE(latch_mode_strings)); + if (latch_mode_idx < 0 && latch_mode_idx != -EINVAL) + return dev_err_probe(dev, latch_mode_idx, + "failed to read adi,dac-latch-mode of %pfwP\n", child); + if (latch_mode_idx >= 0) { + ret = max22007_set_dac_latch_mode(st, reg, latch_mode_idx); + if (ret) + return ret; + } + + mode_idx = fwnode_property_match_property_string(child, "adi,mode", mode_strings, + ARRAY_SIZE(mode_strings)); + if (mode_idx < 0 && mode_idx != -EINVAL) + return dev_err_probe(dev, mode_idx, + "failed to read adi,mode of %pfwP\n", child); + if (mode_idx >= 0) { + ret = max22007_set_channel_mode(st, reg, mode_idx); + if (ret) + return ret; + + if (mode_idx == MAX22007_CURRENT_MODE) + iio_chan->type = IIO_CURRENT; + else + iio_chan->type = IIO_VOLTAGE; + } + } + + *num_channels = num_chan; + + return 0; +} + +static int max22007_probe(struct spi_device *spi) +{ + struct iio_dev *indio_dev; + struct max22007_state *state; + struct gpio_desc *reset_gpio; + u8 num_channels; + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state)); + if (!indio_dev) + return -ENOMEM; + + state = iio_priv(indio_dev); + state->spi = spi; + state->crc_en = true; + + crc8_populate_lsb(max22007_crc8_table, MAX22007_CRC8_POLYNOMIAL); + + state->regmap = devm_regmap_init(&spi->dev, &max22007_regmap_bus, state, + &max22007_regmap_config); + if (IS_ERR(state->regmap)) { + dev_err(&spi->dev, "Failed to initialize regmap\n"); + return PTR_ERR(state->regmap); + } + + reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset_gpio)) + return dev_err_probe(&spi->dev, PTR_ERR(reset_gpio), + "Failed to get reset GPIO\n"); + + if (reset_gpio) { + ret = gpiod_direction_output(reset_gpio, 1); + if (ret) { + dev_err(&spi->dev, "Failed to set GPIO as output: %d\n", ret); + return ret; + } + gpiod_set_value_cansleep(reset_gpio, 0); + } else { + ret = max22007_spi_reg_write(state, MAX22007_SOFT_RESET_REG, + MAX22007_SOFT_RESET_BITS_MASK); + if (ret) + return ret; + } + + ret = max22007_configure_crc(state); + if (ret) + return ret; + + ret = max22007_parse_channel_cfg(state, &num_channels); + if (ret) + return ret; + + indio_dev->info = &max22007_info; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->channels = state->iio_chan; + indio_dev->num_channels = num_channels; + indio_dev->name = "max22007"; + + return devm_iio_device_register(&spi->dev, indio_dev); +} + +static const struct spi_device_id max22007_id[] = { + {"max22007"}, + { } +}; +MODULE_DEVICE_TABLE(spi, max22007_id); + +static const struct of_device_id max22007_of_match[] = { + { .compatible = "adi,max22007" }, + { } +}; +MODULE_DEVICE_TABLE(of, max22007_of_match); + +static struct spi_driver max22007_driver = { + .driver = { + .name = "max22007", + .of_match_table = max22007_of_match, + }, + .probe = max22007_probe, + .id_table = max22007_id, +}; +module_spi_driver(max22007_driver); + +MODULE_AUTHOR("Janani Sunil "); +MODULE_DESCRIPTION("Analog Devices MAX22007 DAC"); +MODULE_LICENSE("GPL");