[U4-A] Codegen verification, repo polish, and end-to-end demo

[angelo-yap]

Track A · Angelo Yap — Final Update

Merges the former [U4-A] and [F-A]. All lowering paths are implemented, so this is
the last Track A ticket: prove the output actually reaches SIMD, then get the repo
presentable.

Scope

Codegen verification

• Confirm the emitted masks (splatFieldPattern, splatAmount) are constants the
  backend folds rather than materializing per iteration.
• Run llc on x86-64 AVX2 over the lowered IR for every supported op — and/or/xor,
  add, sub, shl, lshr, ashr, eq/ne, ult, slt — at i1, i2, i4.
  No scalarization fallback, no illegal types surviving the pass.
• Compare instruction counts against naive/default emission.
• Tidy pass output and value naming so the demo IR is readable.

Repo polish

• The README is stale and currently undersells the pass: it still frames it as
  "Slice 1: bitwise lowering", says non-byte-multiple vectors are skipped (padding
  landed in pad non-byte-multiple vectors instead of skipping #27 / [U3-A] Non-byte-multiple padding path #8), and lists arithmetic, shifts, compares and the differential
  harness as deferred. Rewrite it to describe what actually ships.
• Add a ROADMAP covering what is in scope and what is deliberately left out.
• Verify a clean build from a fresh clone on a machine that has never built this.

Demo

• One end-to-end path to run live: source → opt -passes=nybbler → llc → run,
  with the before/after assembly visible.

Done when

• llc on AVX2 emits SIMD instructions for every operation and width, with no
  extractelement scalarization in the output
• Instruction counts versus naive emission recorded and handed to Track C
• README and ROADMAP match the implemented pass
• A fresh clone builds and the demo runs end to end