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Tests: add integration test for SV32 page-table and TLB
Add a set of small assembly tests that exercise the SV32 page-table walker, SATP enablement and the new TLB code. The tests create a root page table and map a virtual page at 0xC4000000, then exercise several scenarios. The tests verify page-table walker behaviour, SATP switching and TLB caching/flush logic. Tests were written based on the consultation.
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‎src/cli/CMakeLists.txt‎

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@@ -77,3 +77,43 @@ add_cli_test(
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/modifiers-pcrel/program.S"
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EXPECTED_OUTPUT "tests/cli/modifiers-pcrel/stdout.txt"
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)
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add_cli_test(
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NAME virtual_memory_template
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ARGS
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/virtual_memory/template/program.S"
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--dump-registers
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EXPECTED_OUTPUT "tests/cli/virtual_memory/template/stdout.txt"
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)
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add_cli_test(
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NAME virtual_memory_dtlb
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ARGS
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/virtual_memory/dtlb/program.S"
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--dump-registers
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EXPECTED_OUTPUT "tests/cli/virtual_memory/dtlb/stdout.txt"
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)
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add_cli_test(
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NAME virtual_memory_itlb
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ARGS
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/virtual_memory/itlb/program.S"
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--dump-registers
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EXPECTED_OUTPUT "tests/cli/virtual_memory/itlb/stdout.txt"
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)
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add_cli_test(
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NAME virtual_memory_memrw
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ARGS
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/virtual_memory/memrw/program.S"
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--dump-registers
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EXPECTED_OUTPUT "tests/cli/virtual_memory/memrw/stdout.txt"
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)
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add_cli_test(
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NAME virtual_memory_exec
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ARGS
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--asm "${CMAKE_SOURCE_DIR}/tests/cli/virtual_memory/exec/program.S"
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--dump-registers
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EXPECTED_OUTPUT "tests/cli/virtual_memory/exec/stdout.txt"
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)

‎tests/cli/virtual_memory/dtlb/program.S‎

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// D-TLB test — map data pages at MAP_VA; write 'A'..'H' to the first byte of eight pages and read/print them.
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.globl _start
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.option norelax
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// Serial port/terminal registers
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.equ SERIAL_PORT_BASE, 0xffffc000 // base address of serial port region
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.equ SERP_RX_ST_REG_o, 0x0000 // Offset of RX_ST_REG
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.equ SERP_RX_DATA_REG_o, 0x0004 // Offset of RX_DATA_REG
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.equ SERP_TX_ST_REG_o, 0x0008 // Offset of TX_ST_REG
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.equ SERP_TX_ST_REG_READY_m,0x1 // Transmitter can accept next byte
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.equ SERP_TX_DATA_REG_o, 0x000c // Offset of TX_DATA_REG
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.equ ROOT_PT_PHYS, 0x1000
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.equ MAP_VA, 0xC4000000
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// PTE flags: 0xCF = 11001111
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// bit0 V = 1 (Valid)
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// bit1 R = 1 (Readable)
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// bit2 W = 1 Writable)
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// bit3 X = 1 (Executable)
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// bit4 U = 0 (NOT user-accessible)
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// bit5 G = 0 (NOT global)
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// bit6 A = 1 (Accessed)
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// bit7 D = 1 (Dirty)
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.equ PTE_FLAGS_FULL, 0xCF
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// mstatus MPP manipulation masks (for preparing mret to change privilege)
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.equ MSTATUS_MPP_CLEAR, 0x1000 // mask to clear MPP[12] (set bit 12 -> will be cleared via csrrc)
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.equ MSTATUS_MPP_SET, 0x800 // mask to set MPP[11] (set bit 11 -> will be set via csrrs)
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.equ SATP_ENABLE, 0x80000001 // satp value to enable paging (implementation-specific)
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.org 0x00000200
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.text
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_start:
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// t0 = physical address of root page table
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li t0, ROOT_PT_PHYS
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// t4 = virtual address we want to map (MAP_VA)
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li t4, MAP_VA
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// Build a leaf PTE value in t1:
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// Take VA >> 12 (remove page offset) then shift left 10 to position PPN bits for a PTE,
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// then OR in the PTE flags.
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srli t1, t4, 12 // t1 = MAP_VA >> 12 (page number)
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slli t1, t1, 10 // t1 <<= 10 to position as PPN bits for a PTE entry
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li t6, PTE_FLAGS_FULL // t6 = flags
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or t1, t1, t6 // t1 = (PPN << 10) | PTE_FLAGS_FULL
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// Calculate the root page table entry index for the high VPN (VPN[1]):
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// t5 = MAP_VA >> 22 (VPN[1])
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// t2 = t5 << 2 (multiply by 4 bytes per PTE to get byte offset)
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// t3 = root_pt_phys + offset (address of PTE in root page table)
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srli t5, t4, 22
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slli t2, t5, 2
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add t3, t0, t2
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// Store the constructed PTE into the root page table (making a mapping)
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sw t1, 0(t3)
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fence
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// Ensure satp is cleared before setting new value (flush previous translations)
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li t0, 0
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csrw satp, t0
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// Enable the MMU by writing SATP; this switches address translation on
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li t0, SATP_ENABLE
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csrw satp, t0
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fence
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// Prepare mstatus MPP so that mret will return to Supervisor mode:
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// Clear MPP[12] bit then set MPP[11] bit (resulting MPP=01 => Supervisor).
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li t0, MSTATUS_MPP_CLEAR
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csrrc zero, mstatus, t0 // clear bit 12 of mstatus.MPP
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li t0, MSTATUS_MPP_SET
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csrrs zero, mstatus, t0 // set bit 11 of mstatus.MPP
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// Set mepc to the virtual address of vm_entry and return from machine mode to
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// the prepared privilege level (Supervisor) using mret.
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la t0, vm_entry // load address of vm_entry (virtual address after mapping)
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csrw mepc, t0
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mret
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.org 0xC4000000
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.text
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vm_entry:
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li t0, SERIAL_PORT_BASE
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la t1, MAP_VA // pointer to start of mapped virtual region
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li t2, 0 // page counter
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li t3, 8 // number of pages to write/read (A..H)
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li t4, 65 // ASCII 'A'
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li t5, 0x1000 // page size (4KB)
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// write_pages_loop: write one byte (A..H) at the start of each mapped page.
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write_pages_loop:
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sb t4, 0(t1)
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add t1, t1, t5
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addi t4, t4, 1
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addi t2, t2, 1
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blt t2, t3, write_pages_loop
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// Reset pointer and counter to read back and print the first byte of each page.
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la t1, MAP_VA
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li t2, 0
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read_print_loop:
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lb t6, 0(t1) // load the byte stored at start of current page
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// wait_tx: poll transmitter status until ready, then write byte to TX data reg.
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wait_tx:
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lw t4, SERP_TX_ST_REG_o(t0)
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andi t4, t4, SERP_TX_ST_REG_READY_m
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beq t4, zero, wait_tx
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sw t6, SERP_TX_DATA_REG_o(t0)
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add t1, t1, t5
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addi t2, t2, 1
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blt t2, t3, read_print_loop
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ebreak
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1: auipc t0, 0
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jalr zero, 0(t0)

‎tests/cli/virtual_memory/dtlb/stdout.txt‎

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Machine stopped on BREAK exception.
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Machine state report:
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PC:0xc4000078
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R0:0x00000000 R1:0x00000000 R2:0xbfffff00 R3:0x00000000 R4:0x00000000 R5:0xffffffffffffc000 R6:0xffffffffc4008000 R7:0x00000008 R8:0x00000000 R9:0x00000000 R10:0x00000000 R11:0x00000000 R12:0x00000000 R13:0x00000000 R14:0x00000000 R15:0x00000000 R16:0x00000000 R17:0x00000000 R18:0x00000000 R19:0x00000000 R20:0x00000000 R21:0x00000000 R22:0x00000000 R23:0x00000000 R24:0x00000000 R25:0x00000000 R26:0x00000000 R27:0x00000000 R28:0x00000008 R29:0x00000001 R30:0x00001000 R31:0x00000048
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cycle: 0x00000098 mvendorid: 0x00000000 marchid: 0x00000000 mimpid: 0x00000000 mhardid: 0x00000000 mstatus: 0x00000080 misa: 0x40001111 mie: 0x00000000 mtvec: 0x00000000 mscratch: 0x00000000 mepc: 0xc4000074 mcause: 0x00000003 mtval: 0x00000000 mip: 0x00000000 mtinst: 0x00000000 mtval2: 0x00000000 mcycle: 0x00000098 minstret: 0x00000097 sstatus: 0x00000000 stvec: 0x00000000 sscratch: 0x00000000 sepc: 0x00000000 scause: 0x00000000 stval: 0x00000000 satp: 0x80000001

‎tests/cli/virtual_memory/exec/program.S‎

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// Place a tiny function in the mapped virtual page and jump to it (tests X bit).
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.globl _start
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.option norelax
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// Serial port/terminal registers
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.equ SERIAL_PORT_BASE, 0xffffc000 // base address of serial port region
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.equ SERP_RX_ST_REG_o, 0x0000 // Offset of RX_ST_REG
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.equ SERP_RX_DATA_REG_o, 0x0004 // Offset of RX_DATA_REG
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.equ SERP_TX_ST_REG_o, 0x0008 // Offset of TX_ST_REG
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.equ SERP_TX_ST_REG_READY_m,0x1 // Transmitter can accept next byte
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.equ SERP_TX_DATA_REG_o, 0x000c // Offset of TX_DATA_REG
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.equ ROOT_PT_PHYS, 0x1000
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.equ MAP_VA, 0xC4000000
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// PTE flags: 0xCF = 11001111
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// bit0 V = 1 (Valid)
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// bit1 R = 1 (Readable)
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// bit2 W = 1 Writable)
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// bit3 X = 1 (Executable)
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// bit4 U = 0 (NOT user-accessible)
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// bit5 G = 0 (NOT global)
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// bit6 A = 1 (Accessed)
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// bit7 D = 1 (Dirty)
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.equ PTE_FLAGS_FULL, 0xCF
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// mstatus MPP manipulation masks (for preparing mret to change privilege)
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.equ MSTATUS_MPP_CLEAR, 0x1000 // mask to clear MPP[12] (set bit 12 -> will be cleared via csrrc)
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.equ MSTATUS_MPP_SET, 0x800 // mask to set MPP[11] (set bit 11 -> will be set via csrrs)
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.equ SATP_ENABLE, 0x80000001 // satp value to enable paging (implementation-specific)
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.org 0x00000200
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.text
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_start:
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// t0 = physical address of root page table
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li t0, ROOT_PT_PHYS
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// t4 = virtual address we want to map (MAP_VA)
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li t4, MAP_VA
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// Build a leaf PTE value in t1:
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// Take VA >> 12 (remove page offset) then shift left 10 to position PPN bits for a PTE,
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// then OR in the PTE flags.
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srli t1, t4, 12 // t1 = MAP_VA >> 12 (page number)
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slli t1, t1, 10 // t1 <<= 10 to position as PPN bits for a PTE entry
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li t6, PTE_FLAGS_FULL // t6 = flags
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or t1, t1, t6 // t1 = (PPN << 10) | PTE_FLAGS_FULL
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// Calculate the root page table entry index for the high VPN (VPN[1]):
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// t5 = MAP_VA >> 22 (VPN[1])
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// t2 = t5 << 2 (multiply by 4 bytes per PTE to get byte offset)
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// t3 = root_pt_phys + offset (address of PTE in root page table)
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srli t5, t4, 22
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slli t2, t5, 2
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add t3, t0, t2
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// Store the constructed PTE into the root page table (making a mapping)
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sw t1, 0(t3)
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fence
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// Ensure satp is cleared before setting new value (flush previous translations)
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li t0, 0
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csrw satp, t0
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// Enable the MMU by writing SATP; this switches address translation on
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li t0, SATP_ENABLE
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csrw satp, t0
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fence
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// Prepare mstatus MPP so that mret will return to Supervisor mode:
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// Clear MPP[12] bit then set MPP[11] bit (resulting MPP=01 => Supervisor).
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li t0, MSTATUS_MPP_CLEAR
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csrrc zero, mstatus, t0 // clear bit 12 of mstatus.MPP
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li t0, MSTATUS_MPP_SET
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csrrs zero, mstatus, t0 // set bit 11 of mstatus.MPP
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// Set mepc to the virtual address of vm_entry and return from machine mode to
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// the prepared privilege level (Supervisor) using mret.
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la t0, vm_entry // load address of vm_entry (virtual address after mapping)
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csrw mepc, t0
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mret
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.org 0xC4000000
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.text
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vm_entry:
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li a0, SERIAL_PORT_BASE
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// Call the function placed in the same mapped page
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la t0, mapped_function
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jalr zero, 0(t0)
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ebreak
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// small function placed in the mapped page
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.org 0xC4000100
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mapped_function:
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li a0, SERIAL_PORT_BASE
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li t1, 88
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wait_tx:
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lw t0, SERP_TX_ST_REG_o(a0)
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andi t0, t0, SERP_TX_ST_REG_READY_m
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beq t0, zero, wait_tx
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sw t1, SERP_TX_DATA_REG_o(a0)
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ebreak

‎tests/cli/virtual_memory/exec/stdout.txt‎

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Machine stopped on BREAK exception.
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Machine state report:
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PC:0xc4000124
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R0:0x00000000 R1:0x00000000 R2:0xbfffff00 R3:0x00000000 R4:0x00000000 R5:0x00000001 R6:0x00000058 R7:0x00000c40 R8:0x00000000 R9:0x00000000 R10:0xffffffffffffc000 R11:0x00000000 R12:0x00000000 R13:0x00000000 R14:0x00000000 R15:0x00000000 R16:0x00000000 R17:0x00000000 R18:0x00000000 R19:0x00000000 R20:0x00000000 R21:0x00000000 R22:0x00000000 R23:0x00000000 R24:0x00000000 R25:0x00000000 R26:0x00000000 R27:0x00000000 R28:0x00001c40 R29:0xffffffffc4000000 R30:0x00000310 R31:0x000000cf
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cycle: 0x0000002d mvendorid: 0x00000000 marchid: 0x00000000 mimpid: 0x00000000 mhardid: 0x00000000 mstatus: 0x00000080 misa: 0x40001111 mie: 0x00000000 mtvec: 0x00000000 mscratch: 0x00000000 mepc: 0xc4000120 mcause: 0x00000003 mtval: 0x00000000 mip: 0x00000000 mtinst: 0x00000000 mtval2: 0x00000000 mcycle: 0x0000002d minstret: 0x0000002c sstatus: 0x00000000 stvec: 0x00000000 sscratch: 0x00000000 sepc: 0x00000000 scause: 0x00000000 stval: 0x00000000 satp: 0x80000001

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