SystemVerilog: create identifier expressions in scanner

Author: kroening

src/hw_cbmc_irep_ids.h

@@ -80,6 +80,7 @@ IREP_ID_ONE(verilog_array_range)
 IREP_ID_ONE(verilog_assignment_pattern)
 IREP_ID_ONE(verilog_associative_array)
 IREP_ID_ONE(verilog_declarations)
+IREP_ID_ONE(verilog_identifier)
 IREP_ID_ONE(verilog_lifetime)
 IREP_ID_ONE(verilog_logical_equality)
 IREP_ID_ONE(verilog_logical_inequality)

src/verilog/scanner.l

@@ -64,7 +64,9 @@ static void preprocessor()
 #define IDENTIFIER(text) \
   { newstack(yyveriloglval); \
     irep_idt irep_id = text; \
-    stack_expr(yyveriloglval).id(irep_id); \
+    stack_expr(yyveriloglval).id(ID_verilog_identifier); \
+    stack_expr(yyveriloglval).set(ID_base_name, irep_id); \
+    PARSER.set_source_location(stack_expr(yyveriloglval)); \
     auto name = PARSER.scopes.lookup(irep_id); \
     return name == nullptr ? TOK_NON_TYPE_IDENTIFIER : \
            name->is_type ?   TOK_TYPE_IDENTIFIER : \