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Instrument $past when generating SMV word level
This removes Verilog's $past when outputting SMV word level, which does not have an equivalent of $past.
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CORE
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verilog5.sv
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--smv-word-level
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^INIT ebmc::\$past1@1 = FALSE$
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^TRANS next\(ebmc::\$past1@1\) = main\.in$
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^LTLSPEC G main\.in = \(X ebmc::\$past1@1\)$
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^EXIT=0$
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^SIGNAL=0$
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--
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module main(input clk, input in);
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p1: assert property (in iff s_nexttime $past(in));
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endmodule

src/ebmc/ebmc_parse_options.cpp

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@@ -21,6 +21,7 @@ Author: Daniel Kroening, [email protected]
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#include "ebmc_version.h"
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#include "format_hooks.h"
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#include "instrument_buechi.h"
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#include "instrument_past.h"
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#include "liveness_to_safety.h"
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#include "netlist.h"
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#include "neural_liveness.h"
@@ -234,6 +235,8 @@ int ebmc_parse_optionst::doit()
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if(cmdline.isset("smv-word-level"))
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{
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// There is no $past in SMV.
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instrument_past(transition_system, properties);
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auto filename = cmdline.value_opt("outfile").value_or("-");
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output_filet output_file{filename};
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output_smv_word_level(

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