diff --git a/src/coreclr/jit/hwintrinsic.cpp b/src/coreclr/jit/hwintrinsic.cpp index 0b963d23e39a5..71528427c93b7 100644 --- a/src/coreclr/jit/hwintrinsic.cpp +++ b/src/coreclr/jit/hwintrinsic.cpp @@ -1731,6 +1731,8 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic, { case NI_Sve_ConvertToInt32: case NI_Sve_ConvertToUInt32: + case NI_Sve_ConvertToInt64: + case NI_Sve_ConvertToUInt64: // Save the base type of return SIMD. It is used to contain this intrinsic inside // ConditionalSelect. retNode->AsHWIntrinsic()->SetAuxiliaryJitType(getBaseJitTypeOfSIMDType(sig->retTypeSigClass)); diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index ed59e82e5823f..f86bde7b016bd 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -492,12 +492,22 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) // Special handling for ConvertTo* APIs // Just need to change the opt here. + insOpts embOpt = opt; switch (intrinEmbMask.id) { case NI_Sve_ConvertToInt32: case NI_Sve_ConvertToUInt32: { - opt = intrinEmbMask.baseType == TYP_DOUBLE ? INS_OPTS_D_TO_S : INS_OPTS_SCALABLE_S; + embOpt = emitTypeSize(intrinEmbMask.baseType) == EA_8BYTE ? INS_OPTS_D_TO_S + : INS_OPTS_SCALABLE_S; + break; + } + + case NI_Sve_ConvertToInt64: + case NI_Sve_ConvertToUInt64: + { + embOpt = emitTypeSize(intrinEmbMask.baseType) == EA_4BYTE ? INS_OPTS_S_TO_D + : INS_OPTS_SCALABLE_D; break; } default: @@ -536,7 +546,8 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) // We cannot use use `movprfx` here to move falseReg to targetReg because that will // overwrite the value of embMaskOp1Reg which is present in targetReg. - GetEmitter()->emitIns_R_R_R(insEmbMask, emitSize, targetReg, maskReg, embMaskOp1Reg, opt); + GetEmitter()->emitIns_R_R_R(insEmbMask, emitSize, targetReg, maskReg, embMaskOp1Reg, + embOpt); GetEmitter()->emitIns_R_R_R_R(INS_sve_sel, emitSize, targetReg, maskReg, targetReg, falseReg, opt); @@ -550,7 +561,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) } } - GetEmitter()->emitIns_R_R_R(insEmbMask, emitSize, targetReg, maskReg, embMaskOp1Reg, opt); + GetEmitter()->emitIns_R_R_R(insEmbMask, emitSize, targetReg, maskReg, embMaskOp1Reg, embOpt); break; } diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 14eaa7b82ae89..5d10b4a0ea853 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -32,7 +32,9 @@ HARDWARE_INTRINSIC(Sve, Compute64BitAddresses, HARDWARE_INTRINSIC(Sve, Compute8BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(Sve, ConditionalSelect, -1, 3, true, {INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_SupportsContainment) HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation) +HARDWARE_INTRINSIC(Sve, ConvertToInt64, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation) HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation) +HARDWARE_INTRINSIC(Sve, ConvertToUInt64, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation) HARDWARE_INTRINSIC(Sve, Count16BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cnth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed) HARDWARE_INTRINSIC(Sve, Count32BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntw, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed) HARDWARE_INTRINSIC(Sve, Count64BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed) diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index f958b392495e1..198830ea75ccc 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -3389,7 +3389,9 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node) // For now, make sure that we get here only for intrinsics that we are // sure about to rely on auxiliary type's size. assert((embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt32) || - (embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt32)); + (embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt32) || + (embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt64) || + (embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt64)); uint32_t auxSize = genTypeSize(embOp->GetAuxiliaryType()); if (maskSize == auxSize) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs index ee7848a4a5eb1..a0bb5a0c2f2c9 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs @@ -869,6 +869,26 @@ internal Arm64() { } public static unsafe Vector ConvertToInt32(Vector value) { throw new PlatformNotSupportedException(); } + /// ConvertToInt64 : Floating-point convert + + /// + /// svint64_t svcvt_s64[_f64]_m(svint64_t inactive, svbool_t pg, svfloat64_t op) + /// FCVTZS Ztied.D, Pg/M, Zop.D + /// svint64_t svcvt_s64[_f64]_x(svbool_t pg, svfloat64_t op) + /// FCVTZS Ztied.D, Pg/M, Ztied.D + /// svint64_t svcvt_s64[_f64]_z(svbool_t pg, svfloat64_t op) + /// + public static unsafe Vector ConvertToInt64(Vector value) { throw new PlatformNotSupportedException(); } + + /// + /// svint64_t svcvt_s64[_f32]_m(svint64_t inactive, svbool_t pg, svfloat32_t op) + /// FCVTZS Ztied.D, Pg/M, Zop.S + /// svint64_t svcvt_s64[_f32]_x(svbool_t pg, svfloat32_t op) + /// FCVTZS Ztied.D, Pg/M, Ztied.S + /// svint64_t svcvt_s64[_f32]_z(svbool_t pg, svfloat32_t op) + /// + public static unsafe Vector ConvertToInt64(Vector value) { throw new PlatformNotSupportedException(); } + /// ConvertToUInt32 : Floating-point convert /// @@ -890,6 +910,27 @@ internal Arm64() { } public static unsafe Vector ConvertToUInt32(Vector value) { throw new PlatformNotSupportedException(); } + /// ConvertToUInt64 : Floating-point convert + + /// + /// svuint64_t svcvt_u64[_f64]_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) + /// FCVTZU Ztied.D, Pg/M, Zop.D + /// svuint64_t svcvt_u64[_f64]_x(svbool_t pg, svfloat64_t op) + /// FCVTZU Ztied.D, Pg/M, Ztied.D + /// svuint64_t svcvt_u64[_f64]_z(svbool_t pg, svfloat64_t op) + /// + public static unsafe Vector ConvertToUInt64(Vector value) { throw new PlatformNotSupportedException(); } + + /// + /// svuint64_t svcvt_u64[_f32]_m(svuint64_t inactive, svbool_t pg, svfloat32_t op) + /// FCVTZU Ztied.D, Pg/M, Zop.S + /// svuint64_t svcvt_u64[_f32]_x(svbool_t pg, svfloat32_t op) + /// FCVTZU Ztied.D, Pg/M, Ztied.S + /// svuint64_t svcvt_u64[_f32]_z(svbool_t pg, svfloat32_t op) + /// + public static unsafe Vector ConvertToUInt64(Vector value) { throw new PlatformNotSupportedException(); } + + /// Count16BitElements : Count the number of 16-bit elements in a vector /// diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs index 7bf2ff6b84e9b..25f767b70cc0f 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs @@ -926,6 +926,27 @@ internal Arm64() { } public static unsafe Vector ConvertToInt32(Vector value) => ConvertToInt32(value); + /// ConvertToInt64 : Floating-point convert + + /// + /// svint64_t svcvt_s64[_f64]_m(svint64_t inactive, svbool_t pg, svfloat64_t op) + /// FCVTZS Ztied.D, Pg/M, Zop.D + /// svint64_t svcvt_s64[_f64]_x(svbool_t pg, svfloat64_t op) + /// FCVTZS Ztied.D, Pg/M, Ztied.D + /// svint64_t svcvt_s64[_f64]_z(svbool_t pg, svfloat64_t op) + /// + public static unsafe Vector ConvertToInt64(Vector value) => ConvertToInt64(value); + + /// + /// svint64_t svcvt_s64[_f32]_m(svint64_t inactive, svbool_t pg, svfloat32_t op) + /// FCVTZS Ztied.D, Pg/M, Zop.S + /// svint64_t svcvt_s64[_f32]_x(svbool_t pg, svfloat32_t op) + /// FCVTZS Ztied.D, Pg/M, Ztied.S + /// svint64_t svcvt_s64[_f32]_z(svbool_t pg, svfloat32_t op) + /// + public static unsafe Vector ConvertToInt64(Vector value) => ConvertToInt64(value); + + /// ConvertToUInt32 : Floating-point convert /// @@ -947,6 +968,27 @@ internal Arm64() { } public static unsafe Vector ConvertToUInt32(Vector value) => ConvertToUInt32(value); + /// ConvertToUInt64 : Floating-point convert + + /// + /// svuint64_t svcvt_u64[_f64]_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) + /// FCVTZU Ztied.D, Pg/M, Zop.D + /// svuint64_t svcvt_u64[_f64]_x(svbool_t pg, svfloat64_t op) + /// FCVTZU Ztied.D, Pg/M, Ztied.D + /// svuint64_t svcvt_u64[_f64]_z(svbool_t pg, svfloat64_t op) + /// + public static unsafe Vector ConvertToUInt64(Vector value) => ConvertToUInt64(value); + + /// + /// svuint64_t svcvt_u64[_f32]_m(svuint64_t inactive, svbool_t pg, svfloat32_t op) + /// FCVTZU Ztied.D, Pg/M, Zop.S + /// svuint64_t svcvt_u64[_f32]_x(svbool_t pg, svfloat32_t op) + /// FCVTZU Ztied.D, Pg/M, Ztied.S + /// svuint64_t svcvt_u64[_f32]_z(svbool_t pg, svfloat32_t op) + /// + public static unsafe Vector ConvertToUInt64(Vector value) => ConvertToUInt64(value); + + /// Count16BitElements : Count the number of 16-bit elements in a vector /// diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index acc21ef80b49a..0e47bf6993a48 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -4317,8 +4317,12 @@ internal Arm64() { } public static System.Numerics.Vector ConvertToInt32(System.Numerics.Vector value) { throw null; } public static System.Numerics.Vector ConvertToInt32(System.Numerics.Vector value) { throw null; } + public static System.Numerics.Vector ConvertToInt64(System.Numerics.Vector value) { throw null; } + public static System.Numerics.Vector ConvertToInt64(System.Numerics.Vector value) { throw null; } public static System.Numerics.Vector ConvertToUInt32(System.Numerics.Vector value) { throw null; } public static System.Numerics.Vector ConvertToUInt32(System.Numerics.Vector value) { throw null; } + public static System.Numerics.Vector ConvertToUInt64(System.Numerics.Vector value) { throw null; } + public static System.Numerics.Vector ConvertToUInt64(System.Numerics.Vector value) { throw null; } public static ulong Count16BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; } public static ulong Count32BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; } diff --git a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs index da93f2b6448b1..05f3bea2ea1d5 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs @@ -3083,11 +3083,15 @@ ("SveConditionalSelect.template", new Dictionary { ["TestName"] = "Sve_ConditionalSelect_ushort", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConditionalSelect", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt16", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "(firstOp[i] != 0 ? (result[i] != secondOp[i]) : (result[i] != thirdOp[i]))",}), ("SveConditionalSelect.template", new Dictionary { ["TestName"] = "Sve_ConditionalSelect_uint", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConditionalSelect", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "(firstOp[i] != 0 ? (result[i] != secondOp[i]) : (result[i] != thirdOp[i]))",}), ("SveConditionalSelect.template", new Dictionary { ["TestName"] = "Sve_ConditionalSelect_ulong", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConditionalSelect", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "(firstOp[i] != 0 ? (result[i] != secondOp[i]) : (result[i] != thirdOp[i]))",}), - - ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt32_int_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertToInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToInt32(leftOp[i])"}), - ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt32_int_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertDoubleToInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertDoubleToInt32(leftOp[i])"}), - ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt32_uint_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertToUInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToUInt32(leftOp[i])"}), - ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt32_uint_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertDoubleToUInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertDoubleToUInt32(leftOp[i])"}), + + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt32_int_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertToInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToInt32(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt32_int_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertDoubleToInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertDoubleToInt32(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt64_long_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt64", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertFloatToInt64(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertFloatToInt64(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToInt64_long_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToInt64", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertToInt64(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToInt64(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt32_uint_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertToUInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToUInt32(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt32_uint_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt32", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertDoubleToUInt32(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertDoubleToUInt32(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt64_ulong_float", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt64", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Single", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "Helpers.ConvertFloatToUInt64(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertFloatToUInt64(leftOp[i])"}), + ("SveSimpleVecOpDifferentRetTypeTest.template", new Dictionary { ["TestName"] = "Sve_ConvertToUInt64_ulong_double", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "ConvertToUInt64", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Double", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "Helpers.ConvertToUInt64(firstOp[i]) != result[i]", ["GetIterResult"] = "Helpers.ConvertToUInt64(leftOp[i])"}), ("ScalarUnOpTest.template", new Dictionary { ["TestName"] = "Sve_Count16BitElements", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "Count16BitElements", ["RetBaseType"] = "UInt64", ["Op1BaseType"] = "SveMaskPattern", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "SveMaskPattern.All", ["ValidateResult"] = "isUnexpectedResult = (result != (UInt64)(Unsafe.SizeOf>() / sizeof(Int16)));",}), ("ScalarUnOpTest.template", new Dictionary { ["TestName"] = "Sve_Count32BitElements", ["Isa"] = "Sve", ["LoadIsa"] = "Sve", ["Method"] = "Count32BitElements", ["RetBaseType"] = "UInt64", ["Op1BaseType"] = "SveMaskPattern", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "SveMaskPattern.All", ["ValidateResult"] = "isUnexpectedResult = (result != (UInt64)(Unsafe.SizeOf>() / sizeof(Int32)));",}), diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs index 5cdd61a162c82..f796a3aa5f691 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs @@ -6176,14 +6176,18 @@ public static ulong ShiftRightAndInsert(ulong left, ulong right, byte shift) public static int ConvertDoubleToInt32(double op1) => (int)Math.Clamp(op1, long.MinValue, long.MaxValue); public static int ConvertToInt32(float op1) => (int)Math.Clamp(op1, int.MinValue, int.MaxValue); + + public static long ConvertToInt64(double op1) => (long)Math.Clamp(op1, long.MinValue, long.MaxValue); - private static long ConvertToInt64(double op1) => (long)Math.Clamp(op1, long.MinValue, long.MaxValue); + public static long ConvertFloatToInt64(float op1) => (long)Math.Clamp(op1, int.MinValue, int.MaxValue); public static uint ConvertDoubleToUInt32(double op1) => (uint)Math.Clamp(op1, ulong.MinValue, ulong.MaxValue); public static uint ConvertToUInt32(float op1) => (uint)Math.Clamp(op1, uint.MinValue, uint.MaxValue); - private static ulong ConvertToUInt64(double op1) => (ulong)Math.Clamp(op1, ulong.MinValue, ulong.MaxValue); + public static ulong ConvertToUInt64(double op1) => (ulong)Math.Clamp(op1, ulong.MinValue, ulong.MaxValue); + + public static ulong ConvertFloatToUInt64(float op1) => (ulong)Math.Clamp(op1, uint.MinValue, uint.MaxValue); public static Int32 ConvertToInt32RoundAwayFromZero(float op1) => ConvertToInt32(RoundAwayFromZero(op1)); diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/_SveUnaryOpDifferentRetTypeTestTemplate.template b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/_SveUnaryOpDifferentRetTypeTestTemplate.template index dc84d4319f312..d58e5c5aad0ba 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/_SveUnaryOpDifferentRetTypeTestTemplate.template +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/_SveUnaryOpDifferentRetTypeTestTemplate.template @@ -143,7 +143,6 @@ namespace JIT.HardwareIntrinsics.Arm private static readonly int LargestVectorSize = {LargestVectorSize}; private static readonly int Op1ElementCount = Unsafe.SizeOf<{Op1VectorType}<{Op1BaseType}>>() / sizeof({Op1BaseType}); - private static readonly int RetElementCount = Unsafe.SizeOf<{RetVectorType}<{RetBaseType}>>() / sizeof({RetBaseType}); private static {Op1BaseType}[] _data1 = new {Op1BaseType}[Op1ElementCount]; private static {RetBaseType}[] _data2 = new {RetBaseType}[Op1ElementCount]; @@ -166,7 +165,7 @@ namespace JIT.HardwareIntrinsics.Arm Unsafe.CopyBlockUnaligned(ref Unsafe.As<{Op1VectorType}<{RetBaseType}>, byte>(ref _falseFld), ref Unsafe.As<{RetBaseType}, byte>(ref _data2[0]), (uint)Unsafe.SizeOf<{Op1VectorType}<{RetBaseType}>>()); for (var i = 0; i < Op1ElementCount; i++) { _data1[i] = {NextValueOp1}; } - _dataTable = new DataTable(_data1, new {RetBaseType}[RetElementCount], LargestVectorSize); + _dataTable = new DataTable(_data1, new {RetBaseType}[Op1ElementCount], LargestVectorSize); } public bool IsSupported => {Isa}.IsSupported; @@ -311,7 +310,7 @@ namespace JIT.HardwareIntrinsics.Arm {RetBaseType}[] mask = new {RetBaseType}[Op1ElementCount]; {Op1BaseType}[] left = new {Op1BaseType}[Op1ElementCount]; {RetBaseType}[] falseVal = new {RetBaseType}[Op1ElementCount]; - {RetBaseType}[] result = new {RetBaseType}[RetElementCount]; + {RetBaseType}[] result = new {RetBaseType}[Op1ElementCount]; Unsafe.WriteUnaligned(ref Unsafe.As<{RetBaseType}, byte>(ref mask[0]), maskOp); Unsafe.WriteUnaligned(ref Unsafe.As<{Op1BaseType}, byte>(ref left[0]), leftOp); @@ -338,7 +337,7 @@ namespace JIT.HardwareIntrinsics.Arm private void ValidateResult({Op1VectorType}<{Op1BaseType}> op1, void* result, [CallerMemberName] string method = "") { {Op1BaseType}[] inArray1 = new {Op1BaseType}[Op1ElementCount]; - {RetBaseType}[] outArray = new {RetBaseType}[RetElementCount]; + {RetBaseType}[] outArray = new {RetBaseType}[Op1ElementCount]; Unsafe.WriteUnaligned(ref Unsafe.As<{Op1BaseType}, byte>(ref inArray1[0]), op1); Unsafe.CopyBlockUnaligned(ref Unsafe.As<{RetBaseType}, byte>(ref outArray[0]), ref Unsafe.AsRef(result), (uint)Unsafe.SizeOf<{RetVectorType}<{RetBaseType}>>()); @@ -349,7 +348,7 @@ namespace JIT.HardwareIntrinsics.Arm private void ValidateResult(void* op1, void* result, [CallerMemberName] string method = "") { {Op1BaseType}[] inArray1 = new {Op1BaseType}[Op1ElementCount]; - {RetBaseType}[] outArray = new {RetBaseType}[RetElementCount]; + {RetBaseType}[] outArray = new {RetBaseType}[Op1ElementCount]; Unsafe.CopyBlockUnaligned(ref Unsafe.As<{Op1BaseType}, byte>(ref inArray1[0]), ref Unsafe.AsRef(op1), (uint)Unsafe.SizeOf<{Op1VectorType}<{Op1BaseType}>>()); Unsafe.CopyBlockUnaligned(ref Unsafe.As<{RetBaseType}, byte>(ref outArray[0]), ref Unsafe.AsRef(result), (uint)Unsafe.SizeOf<{RetVectorType}<{RetBaseType}>>());