@@ -1003,7 +1003,7 @@ extern int exec_function_f(void (*)(), int *, int *, int, int *);
1003
1003
"ldr r3, [r7, #60]\n\t" /* i */ \
1004
1004
/* https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/function-parameters-on-32-bit-arm */ \
1005
1005
"lsl r4, r3, #2\n\t" /* r4 = i * 2 */ \
1006
- "ldr r1, [r7, #80 ]\n\t" /* vargv[0] */ \
1006
+ "ldr r1, [r7, #16 ]\n\t" /* vargv[0] */ \
1007
1007
"add r1, r1, r4\n\t" /* vargv[i] */ \
1008
1008
"add r2, sp, r4\n\t" /* stack[i] */ \
1009
1009
"ldr r0, [r1]\n\t" \
@@ -1050,41 +1050,45 @@ __asm__ (".align 4\n"
1050
1050
".global exec_function_i\n\t"
1051
1051
".type exec_function_i, %function\n"
1052
1052
"exec_function_i:\n\t"
1053
- "push {r7, lr}\n\t"
1053
+ "push {r3, r4, r5, r6, r7, lr}\n\t"
1054
1054
"sub sp, sp, #136\n\t"
1055
1055
"add r7, sp, #64\n\t"
1056
1056
"str r0, [r7, #12]\n\t" // fc
1057
1057
"str r1, [r7, #8]\n\t" // iargv
1058
1058
"str r2, [r7, #4]\n\t" // fargv
1059
1059
"str r3, [r7]\n\t" // vcntr
1060
+ "ldr r0, [r7, #96]\n\t" // get 5th argument (vargv)
1061
+ "str r0, [r7, #16]\n\t" // store vargv to #16
1060
1062
exec_function_asm ("FUNCI" )
1061
1063
// retval
1062
1064
"adds r7, r7, #72\n\t"
1063
1065
"mov sp, r7\n\t"
1064
1066
"@ sp needed @\n\t"
1065
- "pop {r7, pc}\n\t"
1067
+ "pop {r3, r4, r5, r6, r7, pc}\n\t"
1066
1068
".size exec_function_i, .-exec_function_i\n\t"
1067
1069
);
1068
1070
1069
1071
__asm__ (".align 4\n"
1070
1072
".global exec_function_f\n\t"
1071
1073
".type exec_function_f, %function\n"
1072
1074
"exec_function_f:\n\t"
1073
- "push {r7, lr}\n\t"
1075
+ "push {r3, r4, r5, r6, r7, lr}\n\t"
1074
1076
"sub sp, sp, #136\n\t"
1075
1077
"add r7, sp, #64\n\t"
1076
1078
"str r0, [r7, #12]\n\t" // fc
1077
1079
"str r1, [r7, #8]\n\t" // iargv
1078
1080
"str r2, [r7, #4]\n\t" // fargv
1079
1081
"str r3, [r7]\n\t" // vcntr
1082
+ "ldr r0, [r7, #96]\n\t" // get 5th argument (vargv)
1083
+ "str r0, [r7, #16]\n\t" // store vargv to #16
1080
1084
exec_function_asm ("FUNCF" )
1081
1085
// retval
1082
1086
"vmov r0, s0 @ <retval>\n\t"
1083
1087
"vmov r1, s1 @ <retval>\n\t"
1084
1088
"adds r7, r7, #72\n\t"
1085
1089
"mov sp, r7\n\t"
1086
1090
"@ sp needed @\n\t"
1087
- "pop {r7, pc}\n\t"
1091
+ "pop {r3, r4, r5, r6, r7, pc}\n\t"
1088
1092
".size exec_function_f, .-exec_function_f\n\t"
1089
1093
);
1090
1094
@@ -1119,8 +1123,13 @@ pointer args[];
1119
1123
double f ;
1120
1124
1121
1125
if (code -> c .fcode .entry2 != NIL ) {
1126
+ #if (WORD_SIZE == 64 )
1122
1127
ifunc = (eusinteger_t (* )())((((eusinteger_t )ifunc )& 0xffffffff00000000 )
1123
1128
| (intval (code -> c .fcode .entry2 )& 0x00000000ffffffff ));
1129
+ #else
1130
+ ifunc = (eusinteger_t (* )())((((eusinteger_t )ifunc )& 0xffff0000 )
1131
+ | (intval (code -> c .fcode .entry2 )& 0x0000ffff ));
1132
+ #endif
1124
1133
/* R.Hanai 090726 */
1125
1134
}
1126
1135
while (iscons (paramtypes )) {
@@ -1306,13 +1315,13 @@ pointer args[];
1306
1315
if (resulttype == K_FLOAT || resulttype == K_FLOAT32 ) {
1307
1316
union {
1308
1317
eusfloat_t f ;
1309
- #if __ARM_ARCH == 4
1318
+ #if __ARM_ARCH == 4 || __ARM_ARCH == 5
1310
1319
eusinteger_t i ; // ARM 32bit armel
1311
1320
#else
1312
1321
eusfloat_t i ; // Intel 32bit x86
1313
1322
#endif
1314
1323
} n ;
1315
- #if __ARM_ARCH == 4
1324
+ #if __ARM_ARCH == 4 || __ARM_ARCH == 5
1316
1325
typedef eusinteger_t ifunc_ret_type ;
1317
1326
#else
1318
1327
typedef double ifunc_ret_type ;
0 commit comments