arcv: apex: Add LTO testsuite for APEX intrinsics.

This patch adds tests for LTO support of APEX intrinsics,
including both positive and negative test cases.

The testsuite validates that APEX intrinsics declared via #pragma
intrinsic directives in different translation units are correctly
serialized, merged, and made available during link-time optimization.

Test coverage includes:

1. Conflict Detection Tests (arcv-apex-lto-err*):
   - Opcode mismatch detection across compilation units
   - Instruction name mismatch detection
   - Instruction format mismatch detection
   - Multiple simultaneous conflicts

2. Successful LTO Tests (arcv-apex-lto-test*):
   - Multiple instruction formats (XD, XS, XI, XC) across files
   - Partial overlap of intrinsics between translation units
   - Different pragma declaration orders

All tests verify that:
- APEX intrinsic calls survive LTO optimization
- Correct .extInstruction directives are emitted
- Proper assembly instructions are generated
- Conflicting definitions produce appropriate diagnostics

Signed-off-by: Luis Silva <[email protected]>

Author: luismgsilva

gcc/testsuite/gcc.target/riscv/apex/apex.exp

@@ -14,27 +14,59 @@
 # along with GCC; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
 
-# GCC testsuite that uses the `dg.exp' driver.
+# GCC testsuite for RISC-V APEX intrinsics.
+# This file handles both regular single-file tests and multi-file LTO tests.
 
 # Exit immediately if this isn't a RISC-V target.
 if ![istarget riscv*-*-*] then {
   return
 }
 
-# Load support procs.
+# Load all required libraries.
 load_lib gcc-dg.exp
+load_lib standard.exp
+load_lib gcc.exp
+load_lib lto.exp
+load_lib scanltrans.exp
 
 global DEFAULT_CFLAGS
 if ![info exists DEFAULT_CFLAGS] then {
     set DEFAULT_CFLAGS " -ansi -pedantic-errors"
 }
 
-# Initialize `dg'.
+#
+# Run regular single-file tests
+#
 dg-init
 
-# Main loop.
-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
-        "" $DEFAULT_CFLAGS
+set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]]
+set non_lto_tests [list]
+foreach test $tests {
+    if {![string match "*arcv-apex-lto-*" $test]} {
+        lappend non_lto_tests $test
+    }
+}
+
+dg-runtest $non_lto_tests "" $DEFAULT_CFLAGS
 
-# All done.
-dg-finish
+dg-finish
+
+#
+# Run multi-file LTO tests (if LTO is supported)
+#
+if { [check_effective_target_lto] } {
+    gcc_init
+    lto_init no-mathlib
+    
+    set sid "riscv_apex_lto"
+    
+    foreach src [lsort [find $srcdir/$subdir arcv-apex-lto-*_0.c]] {
+        if ![runtest_file_p $runtests $src] then {
+            continue
+        }
+        
+        lto-execute $src $sid
+    }
+    
+    lto_finish
+}

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err1_0.c

@@ -0,0 +1,13 @@
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -flto -O2 } } } */
+
+int apex_conflict (int, int);
+#pragma intrinsic (apex_conflict, "conflict", 50, "XS")
+
+extern int use_conflict (int, int);
+
+int
+main (void)
+{
+  return use_conflict (5, 10);
+}

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err1_1.c

@@ -0,0 +1,12 @@
+
+int apex_conflict (int, int);
+#pragma intrinsic (apex_conflict, "conflict", 51, "XS")  /* Different opcode: 51 vs 50 */
+
+int
+use_conflict (int a, int b)
+{
+  return apex_conflict (a, b);
+}
+
+/* { dg-lto-warning "APEX builtin 'apex_conflict' already registered with different opcode: 0x32 vs 0x33" "" { target *-*-* } 2 } */
+/* { dg-lto-error "APEX builtin 'apex_conflict' has conflicting definitions across compilation units" "" { target *-*-* } 2 } */

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err2_0.c

@@ -0,0 +1,15 @@
+/* Test LTO error detection for instruction name mismatch */
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -flto -O2 } } } */
+
+int apex_insn_mismatch (int, int);
+#pragma intrinsic (apex_insn_mismatch, "insn_a", 100, "XD")
+
+extern int use_insn_mismatch (int, int);
+
+int
+main (void)
+{
+  return use_insn_mismatch (5, 10);
+}
+

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err2_1.c

@@ -0,0 +1,13 @@
+
+int apex_insn_mismatch (int, int);
+#pragma intrinsic (apex_insn_mismatch, "insn_b", 100, "XD")  /* Different instruction name */
+
+int
+use_insn_mismatch (int a, int b)
+{
+  return apex_insn_mismatch (a, b);
+}
+
+/* { dg-lto-warning "APEX builtin 'apex_insn_mismatch' already registered with different instruction name: 'insn_a' vs 'insn_b'" "" { target *-*-* } 2 } */
+/* { dg-lto-error "APEX builtin 'apex_insn_mismatch' has conflicting definitions across compilation units" "" { target *-*-* } 2 } */
+

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err3_0.c

@@ -0,0 +1,15 @@
+/* Test LTO error detection for instruction format mismatch */
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -flto -O2 } } } */
+
+int apex_format_mismatch (int, int);
+#pragma intrinsic (apex_format_mismatch, "format_test", 20, "XS")
+
+extern int use_format_mismatch (int);
+
+int
+main (void)
+{
+  return use_format_mismatch (5);
+}
+

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err3_1.c

@@ -0,0 +1,12 @@
+
+int apex_format_mismatch (int, int);
+#pragma intrinsic (apex_format_mismatch, "format_test", 20, "XC")  /* Different format: XC vs XS */
+
+int
+use_format_mismatch (int a)
+{
+  return apex_format_mismatch (a, 10);
+}
+
+/* { dg-lto-warning "APEX builtin 'apex_format_mismatch' already registered with different instruction formats: 0xe2 vs 0xe8" "" { target *-*-* } 2 } */
+/* { dg-lto-error "APEX builtin 'apex_format_mismatch' has conflicting definitions across compilation units" "" { target *-*-* } 2 } */

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err4_0.c

@@ -0,0 +1,15 @@
+/* Test LTO error detection for multiple mismatches */
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -flto -O2 } } } */
+
+int apex_multi_mismatch (int, int);
+#pragma intrinsic (apex_multi_mismatch, "insn_original", 20, "XD")
+
+extern int use_multi_mismatch (int);
+
+int
+main (void)
+{
+  return use_multi_mismatch (5);
+}
+

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-err4_1.c

@@ -0,0 +1,14 @@
+
+int apex_multi_mismatch (int, int);
+#pragma intrinsic (apex_multi_mismatch, "insn_different", 21, "XS")  /* All different */
+
+int
+use_multi_mismatch (int a)
+{
+  return apex_multi_mismatch (a, 10);
+}
+
+/* { dg-lto-warning "APEX builtin 'apex_multi_mismatch' already registered with different instruction name: 'insn_original' vs 'insn_different'" "" { target *-*-* } 2 } */
+/* { dg-lto-warning "APEX builtin 'apex_multi_mismatch' already registered with different opcode: 0x14 vs 0x15" "" { target *-*-* } 2 } */
+/* { dg-lto-warning "APEX builtin 'apex_multi_mismatch' already registered with different instruction formats: 0xe1 vs 0xe2" "" { target *-*-* } 2 } */
+/* { dg-lto-error "APEX builtin 'apex_multi_mismatch' has conflicting definitions across compilation units" "" { target *-*-* } 2 } */

gcc/testsuite/gcc.target/riscv/apex/arcv-apex-lto-test0_0.c

@@ -0,0 +1,49 @@
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -flto -O2 -fdump-tree-optimized -save-temps } } } */
+
+int func_apex_xd (int, int);
+#pragma intrinsic (func_apex_xd, "insn_apex_xd", 50, "XD")
+
+int func_apex_xs (int, int);
+#pragma intrinsic (func_apex_xs, "insn_apex_xs", 32, "XS")
+
+int func_apex_xi (int);
+#pragma intrinsic (func_apex_xi, "insn_apex_xi", 20, "XI")
+
+int func_apex_xc (int, int);
+#pragma intrinsic (func_apex_xc, "insn_apex_xc", 21, "XC")
+
+extern int foo (int);
+
+int
+main (void)
+{
+  int x = func_apex_xd (1,2);
+  int y = func_apex_xs (x, 3);
+  int z = func_apex_xi (4);
+  int w = func_apex_xc (y, 5);
+  
+  return foo (y) + w + z;
+}
+
+/* Verify that APEX intrinsic calls survive LTO optimization. */
+/* { dg-final { scan-ltrans-tree-dump "func_apex_xd" "optimized" } } */
+/* { dg-final { scan-ltrans-tree-dump "func_apex_xs" "optimized" } } */
+/* { dg-final { scan-ltrans-tree-dump "func_apex_xi" "optimized" } } */
+/* { dg-final { scan-ltrans-tree-dump "func_apex_xc" "optimized" } } */
+
+/* Verify that the correct custom instructions are emitted in assembly. */
+/* { dg-final { scan-ltrans-assembler "\\.extInstruction insn_apex_xd,50,XD" } } */
+/* { dg-final { scan-ltrans-assembler "\\.extInstruction insn_apex_xs,32,XS" } } */
+/* { dg-final { scan-ltrans-assembler "\\.extInstruction insn_apex_xi,20,XI" } } */
+/* { dg-final { scan-ltrans-assembler "\\.extInstruction insn_apex_xc,21,XC" } } */
+
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xd\\s+a\[0-9\]+,a\[0-9\]+,a\[0-9\]+" 2 } } */
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xs\\s+a\[0-9\]+,a\[0-9\]+,3" 1 } } */
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xi\\s+a\[0-9\]+,4" 1 } } */
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xc\\s+a\[0-9\]+,a\[0-9\]+,5" 1 } } */
+
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xs\\s+a\[0-9\]+,a\[0-9\]+,8" 1 } } */
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xi\\s+a\[0-9\]+,9" 1 } } */
+/* { dg-final { scan-ltrans-assembler-times "insn_apex_xc\\s+a\[0-9\]+,a\[0-9\]+,10" 1 } } */
+