diff --git a/arch/arm/configs/mx53_efikasb_defconfig b/arch/arm/configs/mx53_efikasb_defconfig new file mode 100644 index 00000000000..8110746a9de --- /dev/null +++ b/arch/arm/configs/mx53_efikasb_defconfig @@ -0,0 +1,2686 @@ +# +# Automatically generated make config: don't edit +# Linux/arm 2.6.38.3 Kernel Configuration +# Sun Dec 11 07:24:44 2011 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_SCHED_CLOCK=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_KTIME_SCALAR=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_FIQ=y +CONFIG_VECTORS_BASE=0xffff0000 +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y +CONFIG_HAVE_IRQ_WORK=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set +CONFIG_HAVE_SPARSE_IRQ=y +# CONFIG_GENERIC_PENDING_IRQ is not set +# CONFIG_AUTO_IRQ_AFFINITY is not set +# CONFIG_IRQ_PER_CPU is not set +# CONFIG_SPARSE_IRQ is not set + +# +# RCU Subsystem +# +CONFIG_TREE_PREEMPT_RCU=y +# CONFIG_TINY_RCU is not set +# CONFIG_TINY_PREEMPT_RCU is not set +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_NAMESPACES is not set +# CONFIG_HAVE_GET_CYCLES is not set +# CONFIG_HAVE_TRACE_CLOCK is not set +CONFIG_HAVE_TRACE_CLOCK_GENERIC=y +CONFIG_HAVE_TRACE_CLOCK_32_TO_64=y +# CONFIG_HAVE_UNSYNCHRONIZED_TSC is not set +# CONFIG_SCHED_AUTOGROUP is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EXPERT=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +# CONFIG_PERF_EVENTS is not set +# CONFIG_PERF_COUNTERS is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y + +# +# GCOV-based kernel profiling +# +CONFIG_HAVE_LTT_DUMP_TABLES=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CNS3XXX is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_NUC93X is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5P6442 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS4 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_TCC_926 is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_VT8500 is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +CONFIG_IMX_HAVE_PLATFORM_FEC=y +CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SRTC=y +CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y +CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y +CONFIG_IMX_HAVE_PLATFORM_MXC_NAND=y +CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y +CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y +CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y +CONFIG_IMX_HAVE_PLATFORM_IMX_TVE=y +CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y +CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y +CONFIG_IMX_HAVE_PLATFORM_IMX_IIM=y +CONFIG_IMX_HAVE_PLATFORM_MXC_GPU=y +CONFIG_IMX_HAVE_PLATFORM_LDB=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MXC91231 is not set +CONFIG_ARCH_MX5=y +CONFIG_ARCH_MX53=y +CONFIG_SOC_IMX53=y +CONFIG_FORCE_MAX_ZONEORDER=11 + +# +# MX5 platforms: +# +# CONFIG_MACH_MX51_BABBAGE is not set +# CONFIG_MACH_MX51_3DS is not set +# CONFIG_MACH_EUKREA_CPUIMX51 is not set +# CONFIG_MACH_EUKREA_CPUIMX51SD is not set +# CONFIG_MACH_MX51_EFIKAMX is not set +# CONFIG_MACH_MX51_EFIKASB is not set +# CONFIG_MACH_MX53_EVK is not set +# CONFIG_MACH_MX53_SMD is not set +# CONFIG_MACH_MX53_LOCO is not set +CONFIG_MACH_MX53_EFIKASB=y +# CONFIG_MACH_MX53_ARD is not set +# CONFIG_MACH_MX50_RDP is not set +# CONFIG_MACH_IMX_BLUETOOTH_RFKILL is not set +CONFIG_ISP1504_MXC=y +CONFIG_UTMI_MXC=y +# CONFIG_MXC_IRQ_PRIOR is not set +CONFIG_MXC_TZIC=y +CONFIG_MXC_PWM=y +# CONFIG_MXC_DEBUG_BOARD is not set +CONFIG_ARCH_MXC_IOMUX_V3=y +CONFIG_ARCH_MXC_AUDMUX_V2=y +CONFIG_IRAM_ALLOC=y + +# +# System MMU +# + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_SWP_EMULATE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_CPU_HAS_PMU=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +# CONFIG_ARM_ERRATA_743622 is not set +# CONFIG_ARM_ERRATA_754322 is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_VMSPLIT_3G is not set +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0x80000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_NEED_PER_CPU_KM=y +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set +# CONFIG_DEPRECATED_PARAM_STRUCT is not set + +# +# Boot options +# +# CONFIG_USE_OF is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=223.223.223.11:/srv/arm2_new,v3 ip=dhcp" +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_AUTO_ZRELADDR is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_OPS=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +# CONFIG_BATMAN_ADV is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y + +# +# CAN Device Drivers +# +CONFIG_CAN_VCAN=y +# CONFIG_CAN_SLCAN is not set +# CONFIG_CAN_DEV is not set +CONFIG_CAN_DEBUG_DEVICES=y +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=y +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_TESTS=m +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_MXC=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=256 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_AD525X_DPOT is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_IWMC3200TOP is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +# CONFIG_SATA_PMP is not set + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_SATA_MV is not set + +# +# PATA SFF controllers with BMDMA +# + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_PLATFORM is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_MII=y +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM63XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_FEC is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_ATH_COMMON is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_HOSTAP=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_RTL8192CE is not set +# CONFIG_WL1251 is not set +# CONFIG_WL12XX_MENU is not set +# CONFIG_ZD1211RW is not set +# CONFIG_ATH6K_LEGACY is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_WAN is not set + +# +# CAIF transport drivers +# +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_IMX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_MXC is not set +CONFIG_KEYBOARD_SPPP=y +CONFIG_KEYBOARD_MPR121=y +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_SPPP=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_QT602240 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_P1003 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_ISL29023 is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX3107 is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_RAMOOPS is not set +# CONFIG_MXC_IIM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE is not set +CONFIG_I2C_GPIO=y +CONFIG_I2C_IMX=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_IMX_VER_0_7=y +CONFIG_SPI_IMX_VER_2_3=y +CONFIG_SPI_IMX=y +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set + +# +# PPS generators support +# +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_BASIC_MMIO is not set +# CONFIG_GPIO_IT8761E is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_APM_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ20Z75 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_GPIO is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_MXC_MMA8450 is not set +# CONFIG_MXC_MMA8451 is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +CONFIG_IMX2_WDT=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_MFD_SUPPORT=y +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_PMIC_DIALOG is not set +# CONFIG_MFD_MC13XXX is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_WL1273_CORE is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_DUMMY is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_RC_CORE is not set +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y + +# +# Customize TV tuners +# +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_MEDIA_TUNER_MAX2165=m +# CONFIG_MEDIA_TUNER_TDA18218 is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_AK881X is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_MXC_CAMERA is not set +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_PXP_V4L2 is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_TIMBERDALE is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_I2C_SI4713 is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_WMT_GE_ROPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_ADP8860 is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_TVOUT_TVE is not set +CONFIG_FB_MXC_LDB=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SII902X is not set +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_MXC_EINK_PANEL is not set +# CONFIG_FB_MXC_ELCDIF_FB is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_CACHE_LZO is not set +CONFIG_SND_SOC_AC97_BUS=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_MXC_SOC_MX2=y +# CONFIG_SND_SOC_IMX_SGTL5000 is not set +CONFIG_SND_SOC_IMX_CS42L52=y +# CONFIG_SND_SOC_IMX_SPDIF is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_CS42L52=y +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +CONFIG_HID_A4TECH=m +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +# CONFIG_HID_CANDO is not set +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +# CONFIG_HID_PRODIKEYS is not set +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_EGALAX is not set +# CONFIG_HID_ELECOM is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWII_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +CONFIG_HID_MICROSOFT=m +# CONFIG_HID_MOSART is not set +CONFIG_HID_MONTEREY=m +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_QUANTA is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_ROCCAT_KONE is not set +# CONFIG_HID_ROCCAT_KONEPLUS is not set +# CONFIG_HID_ROCCAT_PYRA is not set +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +# CONFIG_HID_STANTUM is not set +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_EHCI_MXC is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_UAS is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SAMBA is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_FUSB300 is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA_U2O is not set +# CONFIG_USB_GADGET_M66592 is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ULPI is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_MXC_OTG is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +# CONFIG_MMC_DW is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TRIGGERS is not set + +# +# LED Triggers +# + +# +# LED Triggers +# +# CONFIG_NFC_DEVICES is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_MXC is not set +CONFIG_RTC_DRV_MXC_V2=y +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_SPPP=y +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +# CONFIG_DW_DMAC is not set +# CONFIG_TIMB_DMA is not set +CONFIG_IMX_SDMA=y +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_USB_DABUSB is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IP_COMMON is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_BRCM80211 is not set +# CONFIG_RT2870 is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_R8712U is not set +# CONFIG_TRANZPORT is not set +# CONFIG_POHMELFS is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_USB_SERIAL_QUATECH_USB2 is not set +# CONFIG_VT6656 is not set +# CONFIG_IIO is not set +# CONFIG_ZRAM is not set +# CONFIG_FB_SM7XX is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_ST_BT is not set +# CONFIG_SMB_FS is not set +# CONFIG_EASYCAP is not set +CONFIG_MACH_NO_WESTBRIDGE=y +# CONFIG_USB_ENESTORAGE is not set +# CONFIG_BCM_WIMAX is not set +# CONFIG_FT1000 is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +CONFIG_CLKDEV_LOOKUP=y + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3=y + +# +# MXC SSI support +# +CONFIG_MXC_SSI=y + +# +# MXC Digital Audio Multiplexer support +# +CONFIG_MXC_DAM=y + +# +# MXC PMIC support +# +# CONFIG_MXC_PMIC_MC13783 is not set +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_SCC2 is not set +# CONFIG_MXC_SECURITY_RNG is not set + +# +# SAHARA2 Security Hardware Support +# +# CONFIG_MXC_SAHARA is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# +# CONFIG_MXC_ASRC is not set + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# +# CONFIG_MXC_MLB is not set + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# MXC GPU support +# +CONFIG_MXC_AMD_GPU=y +# CONFIG_MXC_AMD_GPU_LOGGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT2_FS_XIP=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_DEFAULTS_TO_ORDERED=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_FS_XIP=y +CONFIG_JBD=y +CONFIG_JBD2=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_XATTR=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_LOGFS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_LOCKUP_DETECTOR is not set +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +CONFIG_BKL=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_DETECTOR=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_CPU_STALL_DETECTOR_RUNNABLE=y +CONFIG_RCU_CPU_STALL_VERBOSE=y +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_OC_ETM is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_TEST=m +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y +CONFIG_AVERAGE=y diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index a1c3f58ad9d..26c57c6d12e 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -205,6 +205,21 @@ config MACH_MX53_LOCO Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. +config MACH_MX53_EFIKASB + bool "Support MX53 EFIKASB platforms" + select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_IMX_SRTC + select IMX_HAVE_PLATFORM_MXC_GPU + select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select IMX_HAVE_PLATFORM_AHCI + select IMX_HAVE_PLATFORM_MXC_NAND + help + Include support for MX53 EFIKASB platform. This includes specific + configurations for the board and its peripherals. + config MACH_MX53_ARD bool "Support MX53 ARD platform" select SOC_IMX53 diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 557a514a90a..c0f9152c285 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o mx53_smd_pmic_da9053.o obj-$(CONFIG_MACH_IMX_BLUETOOTH_RFKILL) += imx_bt_rfkill.o obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o mx53_loco_pmic_da9053.o +obj-$(CONFIG_MACH_MX53_EFIKASB) += board-mx53_efikasb.o spppdriver.o sppp_power.o obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o diff --git a/arch/arm/mach-mx5/board-mx53_efikasb.c b/arch/arm/mach-mx5/board-mx53_efikasb.c new file mode 100644 index 00000000000..81986f77ca9 --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_efikasb.c @@ -0,0 +1,602 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "crm_regs.h" +#include "devices-imx53.h" +#include "devices.h" +#include "usb.h" + +/* MX53 Efika SB GPIO PIN configurations */ +#define USBDR_OC IMX_GPIO_NR(4, 14) /* GPIO_4_14 */ +#define USBDR_PWREN IMX_GPIO_NR(4, 15) /* GPIO_4_15 */ +#define USBH1_OC IMX_GPIO_NR(3, 30) /* GPIO_3_30 */ +#define USBH1_PWREN IMX_GPIO_NR(3, 31) /* GPIO_3_31 */ +#define CLKO IMX_GPIO_NR(1, 5) /* GPIO_1_5 */ +#define WIFISWITCH IMX_GPIO_NR(1, 0) /* GPIO_1_0 */ +#define SD1_WP IMX_GPIO_NR(1, 9) /* GPIO_1_9 */ + +#define PERIPH_RESET IMX_GPIO_NR(5, 28) /* GPIO_5_28 */ +#define PERIPH_PWR IMX_GPIO_NR(5, 29) /* GPIO_5_29 */ + +/* GPIO I2C */ +#define GPIO_SDA IMX_GPIO_NR(5, 27) /* GPIO_5_27 */ +#define GPIO_SCL IMX_GPIO_NR(5, 26) /* GPIO_5_26 */ + +static iomux_v3_cfg_t mx53_efikasb_pads[] = { + /* USB */ + MX53_PAD_KEY_COL4__GPIO4_14, /* overcurrent */ + MX53_PAD_KEY_ROW4__GPIO4_15, /* pwr_en */ + MX53_PAD_EIM_D30__GPIO3_30, /* overcurrent input */ + MX53_PAD_EIM_D31__GPIO3_31, /* power enable */ + /* AUDIO */ + MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC, + MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD, + MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS, + MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD, + /* PERIPHERAL */ + MX53_PAD_GPIO_5__CCM_CLKO, /* CLKO master audio/camera clock */ + MX53_PAD_GPIO_0__GPIO1_0, /* WIFI switch */ + MX53_PAD_CSI0_DAT10__GPIO5_28, /* Periph Reset */ + MX53_PAD_CSI0_DAT11__GPIO5_29, /* Periph Power Down */ + /* SD1 */ + MX53_PAD_SD1_CMD__ESDHC1_CMD, + MX53_PAD_SD1_CLK__ESDHC1_CLK, + MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + MX53_PAD_GPIO_9__GPIO1_9, /* SD1 write protect */ + /* SD2 */ + MX53_PAD_SD2_CMD__ESDHC2_CMD, + MX53_PAD_SD2_CLK__ESDHC2_CLK, + MX53_PAD_SD2_DATA0__ESDHC2_DAT0, + MX53_PAD_SD2_DATA1__ESDHC2_DAT1, + MX53_PAD_SD2_DATA2__ESDHC2_DAT2, + MX53_PAD_SD2_DATA3__ESDHC2_DAT3, + /* LVDS */ +/* MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3, */ /* Schematic says no */ + MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK, + MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2, + MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1, + MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0, + /* I2C1 */ + MX53_PAD_CSI0_DAT8__I2C1_SDA, + MX53_PAD_CSI0_DAT9__I2C1_SCL, + /* UART */ + MX53_PAD_PATA_DIOW__UART1_TXD_MUX, + MX53_PAD_PATA_DMACK__UART1_RXD_MUX, + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, + /* CAMERA */ + MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12, + MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13, + MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14, + MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15, + MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16, + MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17, + MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18, + MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19, + MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC, + MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC, + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK, +}; + +static iomux_v3_cfg_t mx53_efikasb_nand_pads[] = { + MX53_PAD_NANDF_CLE__EMI_NANDF_CLE, + MX53_PAD_NANDF_ALE__EMI_NANDF_ALE, + MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B, + MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B, + MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B, + MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0, + MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0, + MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1, + MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2, /* --> not connected */ + MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3, /* --> not connected */ + MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, + MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, + MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, + MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, + MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, + MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, + MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, + MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7, +}; + +static struct fb_videomode video_modes[] = { + { + /* WSVGA 1024x600 @ 60 Hz */ + "WSVGA", 60, 1024, 600, 22800, + 80, 40, + 20, 21, + 4, 4, + FB_SYNC_OE_LOW_ACT, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +static struct ipuv3_fb_platform_data efikasb_fb0_data = { + .interface_pix_fmt = IPU_PIX_FMT_BGR24, + .mode_str = "WSVGA", + .modes = video_modes, + .num_modes = ARRAY_SIZE(video_modes), +}; + +static struct ipuv3_fb_platform_data efikasb_fb1_data = { + .interface_pix_fmt = IPU_PIX_FMT_BGR24, + .mode_str = "WSVGA", + .modes = video_modes, + .num_modes = ARRAY_SIZE(video_modes), +}; + +static struct imx_ipuv3_platform_data ipu_data = { + .rev = 3, + .fb_head0_platform_data = &efikasb_fb0_data, + .fb_head1_platform_data = &efikasb_fb1_data, + .primary_di = MXC_PRI_DI0, +}; + +static struct fsl_mxc_ldb_platform_data ldb_data = { + .ext_ref = 1, +}; + +static struct mxc_dvfs_platform_data efikasb_dvfs_core_data = { + .reg_id = "DA9052_BUCK_CORE", + .clk1_id = "cpu_clk", + .clk2_id = "gpc_dvfs_clk", + .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, + .gpc_vcr_offset = MXC_GPC_VCR_OFFSET, + .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET, + .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET, + .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET, + .prediv_mask = 0x1F800, + .prediv_offset = 11, + .prediv_val = 3, + .div3ck_mask = 0xE0000000, + .div3ck_offset = 29, + .div3ck_val = 2, + .emac_val = 0x08, + .upthr_val = 25, + .dnthr_val = 9, + .pncthr_val = 33, + .upcnt_val = 10, + .dncnt_val = 10, + .delay_time = 30, +}; + +static const struct esdhc_platform_data mx53_efikasb_sd1_data __initconst = { + .always_present = true, + .wp_gpio = SD1_WP, +}; + +static const struct esdhc_platform_data mx53_efikasb_sd2_data __initconst = { + .always_present = true, +}; + +static struct fsl_mxc_camera_platform_data camera_data = { + .mclk = 27000000, + .csi = 0, +}; + +static struct mxc_audio_platform_data cs42l52_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 3, + .sysclk = 27000000, +}; + +static struct platform_device cs42l52_device = { + .name = "imx-cs42l52", +}; + +static const struct imxi2c_platform_data mx53_efikasb_i2c_data __initconst = { + .bitrate = 100000, +}; + +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { + { + .type = "cs42l52", + .addr = 0x4a, + }, + { + .type = "gc0308", + .addr = 0x42, + .platform_data = (void *)&camera_data, + }, +}; + +static int nand_init(void) +{ + u32 i, reg; + void __iomem *base; + +#define M4IF_GENP_WEIM_MM_MASK 0x00000001 +#define WEIM_GCR2_MUX16_BYP_GRANT_MASK 0x00001000 + + base = ioremap(MX53_M4IF_BASE_ADDR, SZ_4K); + reg = __raw_readl(base + 0xc); + reg &= ~M4IF_GENP_WEIM_MM_MASK; + __raw_writel(reg, base + 0xc); + + iounmap(base); + + base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K); + for (i = 0x4; i < 0x94; i += 0x18) { + reg = __raw_readl((u32)base + i); + reg &= ~WEIM_GCR2_MUX16_BYP_GRANT_MASK; + __raw_writel(reg, (u32)base + i); + } + iounmap(base); + + return 0; +} + +/* NAND Flash Partitions */ +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition nand_flash_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 32 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 128 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; +#endif + +static struct flash_platform_data efikasb_nand_data = { +#ifdef CONFIG_MTD_PARTITIONS + .parts = nand_flash_partitions, + .nr_parts = ARRAY_SIZE(nand_flash_partitions), +#endif + .width = 1, + .init = nand_init, +}; + +static struct resource mxc_nand_resources[] = { + { + .flags = IORESOURCE_MEM, + .name = "NFC_AXI_BASE", + .start = MX53_NFC_AXI_BASE_ADDR , + .end = MX53_NFC_AXI_BASE_ADDR + SZ_8K - 1, + }, + { + .flags = IORESOURCE_MEM, + .name = "NFC_IP_BASE", + .start = MX53_NFC_BASE_ADDR + 0x00, + .end = MX53_NFC_BASE_ADDR + 0x34 - 1, + }, + { + .flags = IORESOURCE_IRQ, + .start = MX53_INT_NFC, + .end = MX53_INT_NFC, + }, +}; + +struct platform_device mxc_nandv2_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .resource = mxc_nand_resources, + .num_resources = ARRAY_SIZE(mxc_nand_resources), +}; + + +static void mx53_efikasb_usbh1_vbus(bool on) +{ + if (on) + gpio_set_value(USBH1_PWREN, 1); + else + gpio_set_value(USBH1_PWREN, 0); +} + +static void mx53_efikasb_usbdr_vbus(bool on) +{ + if (on) + gpio_set_value(USBDR_PWREN, 1); + else + gpio_set_value(USBDR_PWREN, 0); +} + +static void mx53_efikasb_wlan_power(bool on) +{ + if (on) + gpio_set_value(WIFISWITCH, 1); + else + gpio_set_value(WIFISWITCH, 0); +} + +static void mx53_efikasb_periph_power(bool on) +{ + if (on) + gpio_set_value(PERIPH_PWR, 1); + else + gpio_set_value(PERIPH_PWR, 0); +} + +static void mx53_efikasb_do_periph_reset(void) +{ + gpio_set_value(PERIPH_RESET, 1); + msleep(50); + gpio_set_value(PERIPH_RESET, 0); + msleep(1); + gpio_set_value(PERIPH_RESET, 1); + msleep(30); +} + +static struct imx_ssi_platform_data efikasb_ssi_pdata = { + .flags = IMX_SSI_DMA | IMX_SSI_SYN | + IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, +}; + + +static struct mxc_gpu_platform_data gpu_data __initdata; +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + struct tag *t; + struct tag *mem_tag = 0; + int total_mem = SZ_512M; + int left_mem = 0; + int gpu_mem = SZ_32M; + int fb_mem = SZ_16M; + char *str; + + for_each_tag(mem_tag, tags) { + if (mem_tag->hdr.tag == ATAG_MEM) { + total_mem = mem_tag->u.mem.size; + left_mem = total_mem - gpu_mem - fb_mem; + break; + } + } + + for_each_tag(t, tags) { + if (t->hdr.tag == ATAG_CMDLINE) { + str = t->u.cmdline.cmdline; + str = strstr(str, "mem="); + if (str != NULL) { + str += 4; + left_mem = memparse(str, &str); + if (left_mem == 0 || left_mem > total_mem) + left_mem = total_mem - gpu_mem - fb_mem; + } + + str = t->u.cmdline.cmdline; + str = strstr(str, "gpu_memory="); + if (str != NULL) { + str += 11; + gpu_mem = memparse(str, &str); + } + + break; + } + } + + if (mem_tag) { + fb_mem = total_mem - left_mem - gpu_mem; + if (fb_mem < 0) { + gpu_mem = total_mem - left_mem; + fb_mem = 0; + } + mem_tag->u.mem.size = left_mem; + + /* reserve memory for gpu */ + gpu_data.reserved_mem_base = + mem_tag->u.mem.start + left_mem; + gpu_data.reserved_mem_size = gpu_mem; + + /* reserve memory for fb */ + efikasb_fb0_data.res_base = gpu_data.reserved_mem_base + + gpu_data.reserved_mem_size; + efikasb_fb0_data.res_size = fb_mem; + efikasb_fb1_data.res_base = gpu_data.reserved_mem_base + + gpu_data.reserved_mem_size; + efikasb_fb1_data.res_size = fb_mem; + } +} + + +static void __init mx53_efikasb_io_init(void) +{ + + imx_otg_base = MX53_IO_ADDRESS(MX53_OTG_BASE_ADDR); + + mxc_iomux_v3_setup_multiple_pads(mx53_efikasb_pads, + ARRAY_SIZE(mx53_efikasb_pads)); + + mxc_iomux_v3_setup_multiple_pads(mx53_efikasb_nand_pads, + ARRAY_SIZE(mx53_efikasb_nand_pads)); + + /* SD1 Write Protect */ + gpio_request(SD1_WP, "sd1-wp"); + gpio_direction_input(SD1_WP); + gpio_free(SD1_WP); + + /* USB PWR enable */ + gpio_request(USBH1_PWREN, "usb-pwr1"); + gpio_direction_output(USBH1_PWREN, 0); + + gpio_request(USBDR_PWREN, "usb-pwr0"); + gpio_direction_output(USBDR_PWREN, 0); + + /* WIFI power */ + gpio_request(WIFISWITCH, "wifi-pwr"); + gpio_direction_output(WIFISWITCH, 0); + + /* Peripheral power */ + gpio_request(PERIPH_PWR, "periph-pwr"); + gpio_direction_output(PERIPH_PWR, 0); + + /* Peripheral reset */ + gpio_request(PERIPH_RESET, "periph-reset"); + gpio_direction_output(PERIPH_RESET, 0); + +} + +/* Sets up the MCLK for audio and camera */ +static void efikasb_mclk_init(void) +{ + + struct clk *oclk, *pclk; + int ret = 0; + + oclk = clk_get(NULL, "cko1"); + pclk = clk_get(NULL, "pll3"); + + ret = clk_set_parent(oclk, pclk); + if (ret) + printk(KERN_ERR "Can't set parent clock.\n"); + + clk_put(pclk); + + ret = clk_set_rate(oclk, 27000000); + if (ret) + printk(KERN_ERR "Can't set clock rate.\n"); + + ret = clk_enable(oclk); + if (ret) + printk(KERN_ERR "Can't enable Output Clock.\n"); +} + + +static void __init mx53_efikasb_board_init(void) +{ + mx53_efikasb_io_init(); + + imx53_add_imx_uart(0, NULL); + + imx53_add_ipuv3(&ipu_data); + + imx53_add_vpu(); + imx53_add_ldb(&ldb_data); + imx53_add_v4l2_output(0); + + imx53_add_imx2_wdt(0, NULL); + imx53_add_dvfs_core(&efikasb_dvfs_core_data); + + /* I2C */ + imx53_add_imx_i2c(0, &mx53_efikasb_i2c_data); + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); + + /* SD Interfaces */ + imx53_add_sdhci_esdhc_imx(0, &mx53_efikasb_sd1_data); + imx53_add_sdhci_esdhc_imx(1, &mx53_efikasb_sd2_data); + + /* USB */ + mx5_set_otghost_vbus_func(mx53_efikasb_usbdr_vbus); + mx5_usb_dr_init(); + mx5_set_host1_vbus_func(mx53_efikasb_usbh1_vbus); + mx5_usbh1_init(); + + /* Audio */ + imx53_add_imx_ssi(1, &efikasb_ssi_pdata); + mxc_register_device(&cs42l52_device, &cs42l52_data); + + /* NAND */ + mxc_register_device(&mxc_nandv2_mtd_device, &efikasb_nand_data); + + /*GPU*/ + if (mx53_revision() >= IMX_CHIP_REVISION_2_0) + gpu_data.z160_revision = 1; + else + gpu_data.z160_revision = 0; + imx53_add_mxc_gpu(&gpu_data); + + /* this call required to release SCC RAM partition held by ROM + * during boot, even if SCC2 driver is not part of the image + */ + imx53_add_mxc_scc2(); + + /* MCLK for camera and audio */ + efikasb_mclk_init(); + + /* Power on peripherals */ + mx53_efikasb_periph_power(1); + + /* Power on WLan */ + mx53_efikasb_wlan_power(1); + /* And do reset... */ + mx53_efikasb_do_periph_reset(); +} + +static void __init mx53_efikasb_timer_init(void) +{ + mx53_clocks_init(32768, 24000000, 0, 0); +} + +static struct sys_timer mx53_efikasb_timer = { + .init = mx53_efikasb_timer_init, +}; + +MACHINE_START(MX53_EFIKASB, "Genesi MX53 Efika SB Board") + .fixup = fixup_mxc_board, + .map_io = mx53_map_io, + .init_early = imx53_init_early, + .init_irq = mx53_init_irq, + .timer = &mx53_efikasb_timer, + .init_machine = mx53_efikasb_board_init, +MACHINE_END diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c index f57335a3c4d..855ada76245 100644 --- a/arch/arm/mach-mx5/clock.c +++ b/arch/arm/mach-mx5/clock.c @@ -87,7 +87,7 @@ extern int dvfs_core_is_active; /* To keep compatible with some NAND flash, limit * max NAND clk to 34MHZ. The user can modify it for * dedicate NAND flash */ -#define MAX_NFC_CLK 34000000 +#define MAX_NFC_CLK 48000000 /* Default: 34000000 Micron: 48000000 */ #define UART1_DMA_ENABLE 0 #define UART2_DMA_ENABLE 0 diff --git a/arch/arm/mach-mx5/sppp_power.c b/arch/arm/mach-mx5/sppp_power.c new file mode 100644 index 00000000000..1df39d5ccdb --- /dev/null +++ b/arch/arm/mach-mx5/sppp_power.c @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct sppp_client sppp_pwr_client; + +/* Callback for incoming data from SPM */ +static void sppp_get_data(sppp_rx_t *packet) +{ +} + +/* Send power suspend sequence to SPM */ +static void sppp_pwr_suspend(void) +{ + sppp_tx_t sppp_tx_g; + + sppp_start(&sppp_tx_g, SPPP_PWR_ID); + sppp_data(&sppp_tx_g, PWR_ID_GOTO_STANDY); + sppp_stop(&sppp_tx_g); +} + +static int __init sppp_pwr_init(void) +{ + sppp_pwr_client.id = POWER; + sppp_pwr_client.decode = sppp_get_data; + sppp_client_register(&sppp_pwr_client); + + pm_power_off = sppp_pwr_suspend; + + return 0; +} + +static void __exit sppp_pwr_exit(void) +{ + sppp_client_remove(&sppp_pwr_client); + pm_power_off = NULL; +} + +module_init(sppp_pwr_init); +module_exit(sppp_pwr_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SPPP Power Management client"); +MODULE_AUTHOR("Johan Dams "); + diff --git a/arch/arm/mach-mx5/spppdriver.c b/arch/arm/mach-mx5/spppdriver.c new file mode 100644 index 00000000000..392e485d1c7 --- /dev/null +++ b/arch/arm/mach-mx5/spppdriver.c @@ -0,0 +1,392 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "spppdriver.h" + +/* Read and write registers */ +#define __REG(x) (*((u32 *)(x))) + +/* Maximum number of SPPP clients */ +#define MAX_CLIENTS 10 + +/* Simple device structure for the SPPP driver */ +struct sppp_device { + struct uart_port port; + unsigned int baud; + struct clk *clk; +}; + +/* Array od SPPP clients */ +static struct sppp_client *array_of_clients[MAX_CLIENTS] = {NULL}; + +/* baseint contains the address as a 32 bit integer */ +static u32 *base, baseint; + +/* Actual SPPP device */ +static struct sppp_device sppp __initdata; + +/* Receive structure */ +static sppp_rx_t sppp_rx_g; + +/* Registers an SPPP client with the driver */ +void sppp_client_register(struct sppp_client *client) +{ + if (client->id <= MAX_CLIENTS) + array_of_clients[client->id] = client; + else + printk(KERN_ERR "Wrong client id\n"); +} +EXPORT_SYMBOL(sppp_client_register); + +/* Removes an SPPP client from the driver */ +void sppp_client_remove(struct sppp_client *client) +{ + if (client->id <= MAX_CLIENTS) + array_of_clients[client->id] = NULL; + else + printk(KERN_ERR "Wrong client id\n"); +} +EXPORT_SYMBOL(sppp_client_remove); + +/* Process, identify and decode packet after full encapulated packet received */ +static int decode(void) +{ + int i; + + switch (sppp_rx_g.id) { + case SPPP_IDENTIFICATION_ID: + printk(KERN_ERR "IDENTIFICATION\n"); + for (i = 0; i < sppp_rx_g.pos; i++) + printk(KERN_ERR "%02x", sppp_rx_g.input[i]); + printk(KERN_ERR "\n"); + break; + case SPPP_PS2_ID: + if (array_of_clients[TRACKPAD] != NULL) + array_of_clients[TRACKPAD]->decode(&sppp_rx_g); + break; + case SPPP_KEY_ID: + if (array_of_clients[KEYBOARD] != NULL) + array_of_clients[KEYBOARD]->decode(&sppp_rx_g); + break; + + case SPPP_RTC_ID: + if (array_of_clients[RTC] != NULL) + array_of_clients[RTC]->decode(&sppp_rx_g); + break; + case SPPP_PWR_ID: + if (array_of_clients[POWER] != NULL) + array_of_clients[POWER]->decode(&sppp_rx_g); + break; + case SPPP_STRING_ID: + printk(KERN_ERR "STRING\n"); + for (i = 0; i < sppp_rx_g.pos; i++) + printk(KERN_ERR "%c", sppp_rx_g.input[i]); + printk(KERN_ERR "\n"); + break; + case 10: + return 0; + default: + break; + } + + return 0; +} + +/* Process incoming encapsulated data */ +static void recv(sppp_rx_t *sppp_rx, uint8_t data) +{ + if (sppp_rx->sync == SPPP_SYNC) { + switch (data & ~SPPP_PKT_ID_MASK) { + case SPPP_PKT_START: + goto sppp_start; + case SPPP_PKT_STOP: + sppp_rx->sync = SPPP_NOSYNC; /* mark the end of the current packet */ + /* check for valid CRC */ + if (!((sppp_rx->crc^data) & SPPP_PKT_ID_MASK)) + decode(); + else + printk(KERN_ERR "no valid crc=0x%02x != 0x%02x\n", (sppp_rx->crc & SPPP_PKT_ID_MASK), (data & SPPP_PKT_ID_MASK)); + break; + default: + /* max input size reached */ + if (sppp_rx->pos < MAX_RECV_PKG_SIZE) { + /* add to CRC sum */ + sppp_rx->crc += data; + if (sppp_rx->num != 0) { + /* Shift current byte on right pos */ + sppp_rx->input[sppp_rx->pos] = ((data >> (7-sppp_rx->num)) | sppp_rx->carry); + /* Input size */ + sppp_rx->pos++; + } + /* shift carry byte on right pos for next run */ + sppp_rx->carry = (data << (1 + sppp_rx->num)); + sppp_rx->num++; + if (sppp_rx->num > 7) + sppp_rx->num = 0; + } else { + /* size is to big, drop this one */ + sppp_rx->sync = SPPP_NOSYNC; + } + } + } else { + if ((data & ~SPPP_PKT_ID_MASK) == SPPP_PKT_START) { +sppp_start: + sppp_rx->id = data & SPPP_PKT_ID_MASK; + sppp_rx->crc = data; + sppp_rx->pos = 0; + sppp_rx->num = 0; + sppp_rx->carry = 0; + sppp_rx->sync = SPPP_SYNC; + } + } +} + + +/* Interrupt service routine for serial interface */ +static irqreturn_t sppp_int(int irq, void *dev_id) +{ + uint8_t rx; + unsigned int sr2, sr1, cr1; + + sr1 = __REG(baseint + USR1); + sr2 = __REG(baseint + USR2); + cr1 = __REG(baseint + UCR1); + + /* Clear interrupt bits */ + __REG(baseint + USR1) = sr1; + __REG(baseint + USR2) = sr2; + + /* Receive interrupt */ + if (sr2 & USR2_RDR) { + while (__REG(baseint + USR2) & USR2_RDR) { + + /* Read data from the receive data register and mask out any status bits */ + rx = (__REG(baseint + URXD) & URXD_RX_DATA); + + /* Process incoming data */ + recv(&sppp_rx_g, rx); + } + + } + + return IRQ_HANDLED; +} + +/* Polling send function */ +void serial_putc(const char c) +{ + __REG(baseint + UTXD) = c; + + /* wait for transmitter to be ready */ + while + (!(__REG(baseint + USR1) & USR1_TRDY)); + /* STM needs time for processing... */ + msleep(1); +} + +/* Writing a string, uses polled serial_putc() */ +void serial_puts(const char *s) +{ + while (*s) + serial_putc(*s++); +} + +#define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) +#define TXTL 2 /* reset default */ +#define RXTL 1 /* reset default */ + +static int imx_setup_ufcr(struct uart_port *port, unsigned int mode) +{ + unsigned int val; + unsigned int ufcr_rfdiv; + + /* set receiver / transmitter trigger level. + * RFDIV is set such way to satisfy requested uartclk value + * 24000000 is the value of the oscillator, see mx53_clocks_init() + */ + val = TXTL << 10 | RXTL; + ufcr_rfdiv = (clk_get_rate(clk_get_sys("imx-uart.1", NULL)) + 24000000 / 2) + / 24000000; + + if (!ufcr_rfdiv) + ufcr_rfdiv = 1; + + val |= UFCR_RFDIV_REG(ufcr_rfdiv); + + __REG(baseint + UFCR) = val; + + return 0; +} + +/* Initialise the serial port with the baudrate. */ +static int sppp_setup(void) +{ + int retval; + struct sppp_device *device = &sppp; + struct uart_port *port = &device->port; + + port->mapbase = MX53_UART2_BASE_ADDR; /* UART 2 is connected to the STM */ + port->irq = MX53_INT_UART2; /* Our interrupt */ + + /* Currently at 115200 */ + device->baud = 115200; + + /* Get base address of our remapped uart */ + base = (u32 *)ioremap(port->mapbase, 0xD4); + + /* Make it available as an integer for use with __REG(x) macro */ + baseint = (u32)base; + + /* Enable the uart clock */ + clk_enable(clk_get_sys("imx-uart.1", NULL)); + port->uartclk = clk_get_rate(clk_get_sys("imx-uart.1", NULL)); + + /* Set clock divider */ + imx_setup_ufcr(port, 0); + + /* Initialise registers to zero, clears any possible flags that shouldn't be set */ + __REG(baseint + UCR1) = 0x0; + __REG(baseint + UCR2) = 0x0; + + /* Wait for SW reset */ + while + (!(__REG(baseint + UCR2) & UCR2_SRST)); + + /* disable the DREN bit (Data Ready interrupt enable) before + * requesting IRQs + */ + __REG(baseint + UCR4) &= ~UCR4_DREN; + + /* Get the irq */ + retval = request_irq(port->irq, sppp_int, 0, "spppinterrupt", port); + if (retval != 0) + printk(KERN_ERR "Could not get interrupt...\n"); + + /* Set Baudrate */ + __REG(baseint + UBIR) = 0xf; + __REG(baseint + UBMR) = port->uartclk / (2 * device->baud); + + /* And finally enable the port and interrupts in the control registers */ + __REG(baseint + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; + __REG(baseint + UCR1) = UCR1_UARTEN | UCR1_RRDYEN; /* The last one enables receive ready interrupt */ + + return 0; +} + +/* SPPP send operations */ + +/* Low Level write */ +void _sppp_write(sppp_tx_t *sppp_tx, uint8_t data) +{ + sppp_tx->crc += data; + serial_putc(data); +} + +/* Send Start */ +void sppp_start(sppp_tx_t *sppp_tx, uint8_t pkg_id) +{ + sppp_tx->crc = 0; + sppp_tx->pos = 0; + sppp_tx->carry = 0; + _sppp_write(sppp_tx, SPPP_PKT_START | (pkg_id&0x3F)) ; +} +EXPORT_SYMBOL(sppp_start); + +/* Encode data for sending */ +void sppp_data(sppp_tx_t *sppp_tx, uint8_t data) +{ + _sppp_write(sppp_tx, (data >> (1 + sppp_tx->pos)) | sppp_tx->carry); /* send */ + sppp_tx->carry = (data << (6-sppp_tx->pos)) & 0x7F; /* save carry */ + sppp_tx->pos++; + if (sppp_tx->pos >= 7) { + _sppp_write(sppp_tx, sppp_tx->carry); /* send this byte */ + sppp_tx->carry = 0; + sppp_tx->pos = 0; + } +} +EXPORT_SYMBOL(sppp_data); + +/* Send Stop */ +void sppp_stop(sppp_tx_t *sppp_tx) +{ + if (sppp_tx->pos < 7) + _sppp_write(sppp_tx, sppp_tx->carry); + _sppp_write(sppp_tx, SPPP_PKT_STOP | (~SPPP_PKT_STOP & sppp_tx->crc)); /* send EOP */ +} +EXPORT_SYMBOL(sppp_stop); + +/* General all-in-one send function */ +void sppp_send(sppp_tx_t *sppp_tx, unsigned char *buf, int size, int pkg_id) +{ + int i; + sppp_tx->crc = 0; + sppp_tx->pos = 0; + sppp_tx->carry = 0; + + printk(KERN_ERR "send SOP\n"); + _sppp_write(sppp_tx, (SPPP_PKT_START | (pkg_id&0x3F))) ; /* send SOP and ID */ + for (i = 0; i < size; i++) + sppp_data(sppp_tx, buf[i]); + printk(KERN_ERR "send EOP\n"); + if (sppp_tx->pos < 7) + _sppp_write(sppp_tx, sppp_tx->carry); /* send only carry if no more bytes send */ + _sppp_write(sppp_tx, SPPP_PKT_STOP | (~SPPP_PKT_STOP & sppp_tx->crc)); /* send EOP */ +} +EXPORT_SYMBOL(sppp_send); + +static int __init sppp_init(void) +{ + printk(KERN_ALERT "Inserting SPPP driver.\n"); + sppp_setup(); + sppp_rx_g.sync = SPPP_NOSYNC; + + return 0; +} + +static void __exit sppp_exit(void) +{ + printk(KERN_ALERT "Removing SPPP driver.\n"); + + /* free_irq(port->irq, NULL); //--> needs fixing, blows up with segfault... */ + clk_disable(clk_get_sys("imx-uart.1", NULL)); + iounmap(base); +} + +module_init(sppp_init); +module_exit(sppp_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SPPP device driver"); +MODULE_AUTHOR("Johan Dams "); + diff --git a/arch/arm/mach-mx5/spppdriver.h b/arch/arm/mach-mx5/spppdriver.h new file mode 100644 index 00000000000..238c9344b03 --- /dev/null +++ b/arch/arm/mach-mx5/spppdriver.h @@ -0,0 +1,108 @@ +/* Register definitions */ +#define URXD 0x0 /* Receiver Register */ +#define UTXD 0x40 /* Transmitter Register */ +#define UCR1 0x80 /* Control Register 1 */ +#define UCR2 0x84 /* Control Register 2 */ +#define UCR3 0x88 /* Control Register 3 */ +#define UCR4 0x8c /* Control Register 4 */ +#define UFCR 0x90 /* FIFO Control Register */ +#define USR1 0x94 /* Status Register 1 */ +#define USR2 0x98 /* Status Register 2 */ +#define UESC 0x9c /* Escape Character Register */ +#define UTIM 0xa0 /* Escape Timer Register */ +#define UBIR 0xa4 /* BRM Incremental Register */ +#define UBMR 0xa8 /* BRM Modulator Register */ +#define UBRC 0xac /* Baud Rate Count Register */ +#define UTS 0xb4 /* UART Test Register (mx31) */ + +/* UART Control Register Bit Fields.*/ +#define URXD_CHARRDY (1<<15) +#define URXD_ERR (1<<14) +#define URXD_OVRRUN (1<<13) +#define URXD_FRMERR (1<<12) +#define URXD_BRK (1<<11) +#define URXD_PRERR (1<<10) +#define URXD_RX_DATA (0xFF) +#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ +#define UCR1_ADBR (1<<14) /* Auto detect baud rate */ +#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ +#define UCR1_IDEN (1<<12) /* Idle condition interrupt */ +#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ +#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ +#define UCR1_IREN (1<<7) /* Infrared interface enable */ +#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ +#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ +#define UCR1_SNDBRK (1<<4) /* Send break */ +#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ +#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ +#define UCR1_DOZE (1<<1) /* Doze */ +#define UCR1_UARTEN (1<<0) /* UART enabled */ +#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ +#define UCR2_IRTS (1<<14) /* Ignore RTS pin */ +#define UCR2_CTSC (1<<13) /* CTS pin control */ +#define UCR2_CTS (1<<12) /* Clear to send */ +#define UCR2_ESCEN (1<<11) /* Escape enable */ +#define UCR2_PREN (1<<8) /* Parity enable */ +#define UCR2_PROE (1<<7) /* Parity odd/even */ +#define UCR2_STPB (1<<6) /* Stop */ +#define UCR2_WS (1<<5) /* Word size */ +#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ +#define UCR2_TXEN (1<<2) /* Transmitter enabled */ +#define UCR2_RXEN (1<<1) /* Receiver enabled */ +#define UCR2_SRST (1<<0) /* SW reset */ +#define UCR3_DTREN (1<<13) /* DTR interrupt enable */ +#define UCR3_PARERREN (1<<12) /* Parity enable */ +#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ +#define UCR3_DSR (1<<10) /* Data set ready */ +#define UCR3_DCD (1<<9) /* Data carrier detect */ +#define UCR3_RI (1<<8) /* Ring indicator */ +#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ +#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ +#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ +#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ +#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ +#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ +#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ +#define UCR3_BPEN (1<<0) /* Preset registers enable */ +#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ +#define UCR4_INVR (1<<9) /* Inverted infrared reception */ +#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ +#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ +#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ +#define UCR4_IRSC (1<<5) /* IR special case */ +#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ +#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ +#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ +#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ +#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ +#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ +#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ +#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ +#define USR1_RTSS (1<<14) /* RTS pin status */ +#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ +#define USR1_RTSD (1<<12) /* RTS delta */ +#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ +#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ +#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ +#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ +#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ +#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ +#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ +#define USR2_ADET (1<<15) /* Auto baud rate detect complete */ +#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ +#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ +#define USR2_IDLE (1<<12) /* Idle condition */ +#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ +#define USR2_WAKE (1<<7) /* Wake */ +#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ +#define USR2_TXDC (1<<3) /* Transmitter complete */ +#define USR2_BRCD (1<<2) /* Break condition */ +#define USR2_ORE (1<<1) /* Overrun error */ +#define USR2_RDR (1<<0) /* Recv data ready */ +#define UTS_FRCPERR (1<<13) /* Force parity error */ +#define UTS_LOOP (1<<12) /* Loop tx and rx */ +#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ +#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ +#define UTS_TXFULL (1<<4) /* TxFIFO full */ +#define UTS_RXFULL (1<<3) /* RxFIFO full */ +#define UTS_SOFTRST (1<<0) /* Software reset */ diff --git a/arch/arm/plat-mxc/include/mach/mxc_gpu.h b/arch/arm/plat-mxc/include/mach/mxc_gpu.h index a43d6ec99bf..4861d2677fa 100644 --- a/arch/arm/plat-mxc/include/mach/mxc_gpu.h +++ b/arch/arm/plat-mxc/include/mach/mxc_gpu.h @@ -17,6 +17,7 @@ struct mxc_gpu_platform_data { int z160_revision; + int enable_mmu; resource_size_t reserved_mem_base; resource_size_t reserved_mem_size; }; diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 7ca41f0a09b..7de6e1a26b1 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -1099,3 +1099,4 @@ ecuv5 MACH_ECUV5 ECUV5 3421 hsgx6d MACH_HSGX6D HSGX6D 3422 dawad7 MACH_DAWAD7 DAWAD7 3423 sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424 +mx53_efikasb MACH_MX53_EFIKASB MX53_EFIKASB 3610 diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 8e73ccb411f..b0c79e0a004 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -533,6 +533,14 @@ config KEYBOARD_MXS help This is the Keypad driver for the Freescale mxs soc +config KEYBOARD_SPPP + tristate "SPPP keyboard driver" + depends on MACH_MX53_EFIKASB + help + Say Y here if you have a Genesi MX53 EfikaSB based + System. These systems use the SPPP protocol to + communicate with a housekeeper chip responsible + for keyboard and trackpad among others. config KEYBOARD_MC9S08DZ60 tristate "mc9s08dz60 keyboard" @@ -558,3 +566,4 @@ config KEYBOARD_MPR121 To compile this driver as a module, choose M here endif + diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile index dac8089cc2f..fcc33762d59 100644 --- a/drivers/input/keyboard/Makefile +++ b/drivers/input/keyboard/Makefile @@ -51,5 +51,6 @@ obj-$(CONFIG_KEYBOARD_MXC) += mxc_keyb.o obj-$(CONFIG_KEYBOARD_MXC) += mxc_pwrkey.o obj-$(CONFIG_KEYBOARD_MPR084) += mpr084.o obj-$(CONFIG_KEYBOARD_MXS) += mxs-kbd.o +obj-$(CONFIG_KEYBOARD_SPPP) += sppp_keyboard.o obj-$(CONFIG_KEYBOARD_MC9S08DZ60) += mc9s08dz60_keyb.o obj-$(CONFIG_KEYBOARD_MPR121) += mpr121.o diff --git a/drivers/input/keyboard/sppp_keyboard.c b/drivers/input/keyboard/sppp_keyboard.c new file mode 100644 index 00000000000..382591beb7e --- /dev/null +++ b/drivers/input/keyboard/sppp_keyboard.c @@ -0,0 +1,253 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include + +#include + +#define VERBOSE 0 /* show some (not all) debug */ +#define KBD_SYNC 0xAA /* keyboard inserts a SYNC after each full matrix scan */ +#define MAXROW 8 +#define MAXCOL 16 + +static struct input_dev *keyb_dev; + +static struct sppp_client sppp_keyboard_client; + +char keyboard_g[MAXCOL][MAXROW]; /* raw keys from keyboard */ +char keypress_g[MAXCOL][MAXROW]; /* current keys reported to the system */ +char keyvalid_g[MAXCOL][MAXROW] = { /* valid key and scancodes on current keyboard */ + { 66, 12, 82, 83, 0, 8, 0, 52 }, /* COL 0 a '0' indicates none existing==invalid */ + { 0, 0, 0, 25, 0, 0, 0, 13 }, /* COL 1 */ + { 0, 0, 9, 0, 0, 2, 0, 0 }, + { 1, 32, 67, 54, 39, 14, 0, 26 }, + { 0, 0, 0, 0, 7, 0, 0, 0 }, + { 0, 0, 73, 61, 62, 34, 20, 47 }, + { 0, 0, 74, 75, 63, 35, 21, 48 }, + { 31, 18, 72, 60, 46, 33, 19, 59 }, + { 0, 24, 78, 79, 65, 37, 23, 50 }, + { 0, 0, 0, 0, 0, 0, 3, 0 }, + { 71, 45, 70, 58, 43, 30, 17, 44 }, + { 0, 0, 69, 56, 57, 29, 16, 42 }, + { 0, 11, 80, 81, 53, 38, 0, 51 }, + { 4, 6, 0, 0, 0, 0, 0, 0 }, + { 5, 10, 76, 77, 64, 36, 22, 49 }, /* COL 14 */ + { 15, 0, 68, 55, 40, 27, 28, 41 } /* COL 15 */ +}; + +int key_sync_g; +int key_ghost_g; + +/* Reset 'raw' and 'clean' versions of the key matix */ +static void kbd_clear(void) +{ + int i, j; + + for (i = 0; i < MAXCOL ; i++) + for (j = 0; j < MAXROW; j++) { + keyboard_g[i][j] = 0; + keypress_g[i][j] = 0; + } +} + +/* Key ghosting is checked by looking for a rectangle of four keys. Due too + * the HW limits the diagonal key pair can NOT be diferenciated from real + * keypress or being a ghost key. This filter will remove any of those + * key combinations. + */ +static int kbd_is_ghost(int col, int row) /* check for ghosting */ +{ + int i, j; + + for (j = 0; j < MAXROW; j++) { /* the 'ghosting' rectangle must have one more at same row */ + if (j == row) /* don't test ourself */ + continue; + if (keyboard_g[col][j] != 0) { /* we are at col/row found second key at col/j */ + for (i = 0; i < MAXCOL; i++) { /* now walk down each col */ + if (i == col) /* don't test ourself */ + continue; + if (keyboard_g[i][row] != 0 && /* we found a rectangle with */ + keyboard_g[i][j] != 0) { /* col/row , col/j , i/j , i/row */ +#if 1 + if (keyvalid_g[col][j] != 0 && /* complex check tests other three */ + keyvalid_g[i][j] != 0 && /* corners to be a valid key */ + keyvalid_g[i][row] != 0) +#endif + return 1; /* simple check returns true here */ + } + } + } + } + return 0; +} + + +/* keyboard handler + * Takes the scancode and make/break value and passes it on to + * Linux input + */ +static void key_do(unsigned char scancode) +{ + int makebreak; + + makebreak = scancode & 0x80 ? 0 : 1; + scancode = scancode & 0x7f; /* NOTE: scancode is limited to 128 entries here */ + + input_report_key(keyb_dev, scancode, makebreak); + input_sync(keyb_dev); +} + +/* Due too HW limitations (no diodes at col/row connections) the 'raw' data + * show ghost/phantom keys, a special 'find key rectangle' algorithm is + * used to remove those keys. A clean version of the data is created at + * keypress_g[][] and coresponding scancodes with make/break bit at pos 7 + * are send to a keyboard handler/driver + */ +static void kbd_handle(void) +{ + int i, j; + + for (i = 0; i < MAXCOL; i++) { + for (j = 0 ; j < MAXROW; j++) { + if (keyboard_g[i][j] == 0) { /* mark key up */ + if (keyvalid_g[i][j] != 0 && /* a valid key changed its state */ + keypress_g[i][j] == 1) { + key_do(keyvalid_g[i][j]|0x80); /* send break code to handler */ + } + keypress_g[i][j] = 0; /* key is up */ + } else { + if (keyvalid_g[i][j] != 0) { + if (!kbd_is_ghost(i, j)) { + if (keyvalid_g[i][j] != 0 && /* a valid key changed its state */ + keypress_g[i][j] == 0) { + key_do(keyvalid_g[i][j]); /* send break code to handler */ + } + keypress_g[i][j] = 1; /* key is down */ + } else { + key_ghost_g++; /* statistics only */ + } + } + } + } + } +} + +/* Insert delta changes to our 'raw' copy of the matrix. The 'raw' data + * records all delta keys and is a copy of the physical keyboard matix. + */ +static void kbd_add_col(int col, int key) +{ + int j; + + if (!(col < MAXCOL)) /* sanity check */ + return; + + for (j = 0; j < MAXROW; j++) { + keyboard_g[col][j] = key&1 ? 0 : 1; /* note: keyboard reports active lo signals */ + key >>= 1; + } +} + +/* Take the payload of the keyboard event packet and do some meanfull things. + * The data comes as 2 bytes pair with first byte=column index (0-15) and + * second byte as the row read out value (note: this is active lo bitfield). + * The data comes as 'endless' stream with a SYNC byte inserted after each + * full scan of the key matix. The keyboard ONLY reports the key deltas + * between two consecutive scans. + */ +static void kbd_decode(sppp_rx_t *packet) +{ + unsigned char *keys = packet->input; + int keyc = packet->pos; +#if VERBOSE + int i; + + printk(KERN_ERR "decode %d bytes (", keyc); + for (i = 0; i < keyc; i++) + printk(KERN_ERR" 0x%02x", keys[i]); + printk(KERN_ERR " )\n"); +#endif + + while (keyc > 1) { /* two or more bytes left */ + if (keys[0] == KBD_SYNC) { /* found SYNC, this also indicates next KBD event */ + key_sync_g++; /* statistics only */ + kbd_handle(); /* handle keys of this event */ +#if VERBOSE + printk(KERN_ERR "event %d\n", key_sync_g); +#endif + } else { + kbd_add_col(keys[0], keys[1]); /* insert changes into raw matrix */ + } + keyc -= 2; + keys += 2; + } +} + +#define PCI_VENDOR_ID_FREESCALE 0x1957 + +static int __init sppp_kbd_init(void) +{ + int i, j; + int error; + + keyb_dev = input_allocate_device(); + + keyb_dev->name = "Efika SB Keyboard"; + keyb_dev->phys = "efikasb/input0"; + keyb_dev->uniq = "efikasb_keyboard"; + keyb_dev->id.bustype = BUS_HOST; + keyb_dev->id.vendor = PCI_VENDOR_ID_FREESCALE; + + keyb_dev->evbit[0] = BIT_MASK(EV_KEY); + + for (i = 0; i < MAXCOL; i++) + for (j = 0; j < MAXROW; j++) + set_bit(keyvalid_g[i][j], keyb_dev->keybit); + + error = input_register_device(keyb_dev); + if (error) { + printk(KERN_ERR "Keyboard input device registration failed.\n"); + input_free_device(keyb_dev); + return -1; + } + + kbd_clear(); + + sppp_keyboard_client.id = KEYBOARD; + sppp_keyboard_client.decode = kbd_decode; + + sppp_client_register(&sppp_keyboard_client); + + return 0; +} + +static void __exit sppp_kbd_exit(void) +{ + sppp_client_remove(&sppp_keyboard_client); +} + +module_init(sppp_kbd_init); +module_exit(sppp_kbd_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SPPP keyboard client"); +MODULE_AUTHOR("Johan Dams "); + diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig index 9c1e6ee8353..c02b2564ce9 100644 --- a/drivers/input/mouse/Kconfig +++ b/drivers/input/mouse/Kconfig @@ -136,6 +136,15 @@ config MOUSE_PS2_OLPC If unsure, say N. +config MOUSE_SPPP + tristate "SPPP trackpad driver" + depends on MACH_MX53_EFIKASB + help + Say Y here if you have a Genesi MX53 EfikaSB based + System. These systems use the SPPP protocol to + communicate with a housekeeper chip responsible + for keyboard and trackpad among others. + config MOUSE_SERIAL tristate "Serial mouse" select SERIO diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile index 570c84a4a65..9f0e64050ab 100644 --- a/drivers/input/mouse/Makefile +++ b/drivers/input/mouse/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_MOUSE_RISCPC) += rpcmouse.o obj-$(CONFIG_MOUSE_SERIAL) += sermouse.o obj-$(CONFIG_MOUSE_SYNAPTICS_I2C) += synaptics_i2c.o obj-$(CONFIG_MOUSE_VSXXXAA) += vsxxxaa.o +obj-$(CONFIG_MOUSE_SPPP) += sppp_trackpad.o psmouse-objs := psmouse-base.o synaptics.o diff --git a/drivers/input/mouse/sppp_trackpad.c b/drivers/input/mouse/sppp_trackpad.c new file mode 100644 index 00000000000..8274e70f279 --- /dev/null +++ b/drivers/input/mouse/sppp_trackpad.c @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + + +#include +#include +#include + +#include + +static struct input_dev *track_dev; + +static struct sppp_client sppp_trackpad_client; + +/* Decode trackpad data, which is encoded as PS/2. + * PS/2 data is send as a 2 byte value, first one is a sequence number + * second one is the PS/2 data. The sequence number will change for independant + * PS/2 data. A single byte value from a PS/2 device will have one sequence number, + * as well as every bytes out of a multi byte message (e.g. streaming data) will + * have the same sequence number. We use this to correctly identify the message + * start and ending of a multibyte message (streaming data from pointing device) + */ +static void trackpad_decode(sppp_rx_t *packet) +{ + static uint8_t ps2_byte[3]; + static uint8_t ps2_seq; + static int ps2_count; + int i; + + + /* note: a PS/2 packet can have incomplete and/or multiple messages */ + for (i = 0; (i+1) < packet->pos; i += 2) { + if (packet->input[i] != ps2_seq) { + ps2_seq = packet->input[i]; + ps2_count = 0; + } + + ps2_byte[ps2_count++] = packet->input[i+1]; + + if (ps2_count == 3) { + /* Check for overflow, and discard if so */ + if (!((ps2_byte[0]&0x80) || (ps2_byte[0]&0x40))) { + + /* Actually send ps2_byte to input dev */ + input_report_key(track_dev, BTN_LEFT, ps2_byte[0] & 0x01); + input_report_key(track_dev, BTN_RIGHT, ps2_byte[0] & 0x02); + + input_report_rel(track_dev, REL_X, ps2_byte[1] ? (int) ps2_byte[1] - (int) ((ps2_byte[0] << 4) & 0x100) : 0); + input_report_rel(track_dev, REL_Y, ps2_byte[2] ? (int) ((ps2_byte[0] << 3) & 0x100) - (int) ps2_byte[2] : 0); + + input_sync(track_dev); + } + ps2_count = 0; + } + } +} + +static int __init sppp_trackpad_init(void) +{ + int error; + sppp_tx_t sppp_tx_g; + + track_dev = input_allocate_device(); + + track_dev->name = "Efika SB Trackpad"; + track_dev->phys = "efikasb/input1"; + track_dev->uniq = "efikasb_trackpad"; + track_dev->id.bustype = BUS_I8042; + track_dev->id.vendor = 0x0002; + track_dev->id.product = 1; + track_dev->id.version = 0; + + track_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL); + track_dev->keybit[BIT_WORD(BTN_MOUSE)] = BIT_MASK(BTN_LEFT) | BIT_MASK(BTN_RIGHT); + track_dev->relbit[0] = BIT_MASK(REL_X) | BIT_MASK(REL_Y); + + error = input_register_device(track_dev); + if (error) { + printk(KERN_ERR "Keyboard input device registration failed.\n"); + input_free_device(track_dev); + return -1; + } + + sppp_trackpad_client.id = TRACKPAD; + sppp_trackpad_client.decode = trackpad_decode; + + /* Low Level PS/2 trackpad init */ + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0xFF); /* reset */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0xF3); /* going to set sample rate */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0x50); /* sample rate */ + /* Valid sample rates are 10, 20, 40, 60, 80, 100, and 200 samples/sec */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0xE6); /* Scaling 2:1; 1:1 = 0xE6 */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0xE8); /* Going to set resolution */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + /* 00,01,02,03 -> 1, 2, 4, 8 counts/mm */ + sppp_data(&sppp_tx_g, 0x03); /* set resolution */ + sppp_stop(&sppp_tx_g); + + sppp_start(&sppp_tx_g, SPPP_PS2_ID); + sppp_data(&sppp_tx_g, 0xF4); /* enable data reporting */ + sppp_stop(&sppp_tx_g); + + sppp_client_register(&sppp_trackpad_client); + + return 0; +} + +static void __exit sppp_trackpad_exit(void) +{ + sppp_client_remove(&sppp_trackpad_client); +} + +module_init(sppp_trackpad_init); +module_exit(sppp_trackpad_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SPPP trackpad client"); +MODULE_AUTHOR("Johan Dams "); + diff --git a/drivers/mmc/core/quirks.c b/drivers/mmc/core/quirks.c index 11118b74eb2..4cb5a6966d4 100644 --- a/drivers/mmc/core/quirks.c +++ b/drivers/mmc/core/quirks.c @@ -57,6 +57,14 @@ static void add_quirk_for_sdio_devices(struct mmc_card *card, int data) #define SDIO_DEVICE_ID_TI_WL1271 0x4076 #endif +#ifndef SDIO_VENDOR_ID_STE +#define SDIO_VENDOR_ID_STE 0x0020 +#endif + +#ifndef SDIO_DEVICE_ID_STE_CW1200 +#define SDIO_DEVICE_ID_STE_CW1200 0x2280 +#endif + static const struct mmc_fixup mmc_fixup_methods[] = { /* by default sdio devices are considered CLK_GATING broken */ /* good cards will be whitelisted as they are tested */ @@ -64,6 +72,8 @@ static const struct mmc_fixup mmc_fixup_methods[] = { add_quirk_for_sdio_devices, MMC_QUIRK_BROKEN_CLK_GATING }, { SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_WL1271, remove_quirk, MMC_QUIRK_BROKEN_CLK_GATING }, + { SDIO_VENDOR_ID_STE, SDIO_DEVICE_ID_STE_CW1200, + add_quirk, MMC_QUIRK_BROKEN_BYTE_MODE_512}, { 0 } }; diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c index dea36d9c22e..2aefb41d89f 100644 --- a/drivers/mmc/core/sdio_ops.c +++ b/drivers/mmc/core/sdio_ops.c @@ -152,8 +152,13 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn, cmd.arg |= fn << 28; cmd.arg |= incr_addr ? 0x04000000 : 0x00000000; cmd.arg |= addr << 9; - if (blocks == 1 && blksz <= 512) - cmd.arg |= (blksz == 512) ? 0 : blksz; /* byte mode */ + //if (blocks == 1 && blksz <= 512) + // cmd.arg |= (blksz == 512) ? 0 : blksz; /* byte mode */ + if (blocks == 1 && blksz < 512) + cmd.arg |= blksz; /* byte mode */ + else if (blocks == 1 && blksz == 512 && + !(mmc_card_broken_byte_mode_512(card))) + cmd.arg |= 0; /* byte mode, 0==512 */ else cmd.arg |= 0x08000000 | blocks; /* block mode */ cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 3ef52006046..ee3c48548f5 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -27,6 +27,7 @@ #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" +#define SDHCI_CTRL_D3CD 0x08 /* VENDOR SPEC register */ #define SDHCI_VENDOR_SPEC 0xC0 #define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 @@ -74,7 +75,7 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg) if (boarddata && gpio_is_valid(boarddata->cd_gpio) && gpio_get_value(boarddata->cd_gpio)) /* no card, if a valid gpio says so... */ - val &= SDHCI_CARD_PRESENT; + val &= ~SDHCI_CARD_PRESENT; else /* ... in all other cases assume card is present */ val |= SDHCI_CARD_PRESENT; @@ -87,14 +88,22 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct pltfm_imx_data *imx_data = pltfm_host->priv; - - if (unlikely((reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE) - && (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP))) - /* - * these interrupts won't work with a custom card_detect gpio - * (only applied to mx25/35) - */ - val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + u32 data; + + if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) { + if (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP) + /* + * these interrupts won't work with a custom card_detect gpio + * (only applied to mx25/35) + */ + val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + + if (val & SDHCI_INT_CARD_INT) { + data = readl(host->ioaddr + SDHCI_HOST_CONTROL); + data |= SDHCI_CTRL_D3CD; + writel(data, host->ioaddr + SDHCI_HOST_CONTROL); + } + } if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT) && (reg == SDHCI_INT_STATUS) @@ -164,8 +173,8 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) */ return; case SDHCI_HOST_CONTROL: - /* FSL messed up here, so we can just keep those two */ - new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS); + /* FSL messed up here, so we can just keep those three */ + new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS | SDHCI_CTRL_D3CD); /* ensure the endianess */ new_val |= ESDHC_HOST_CONTROL_LE; /* DMA mode bits are shifted */ @@ -175,6 +184,17 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) return; } esdhc_clrset_le(host, 0xff, val, reg); + + /* + * The esdhc has a design violation to SDHC spec which tells + * that software reset should not affect card detection circuit. + * But esdhc clears its SYSCTL register bits [0..2] during the + * software reset. This will stop those clocks that card detection + * circuit relies on. To work around it, we turn the clocks on back + * to keep card detection circuit functional. + */ + if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1)) + esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL); } static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host) diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 8ad6faec72c..5ef6c5a90be 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -39,7 +39,7 @@ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o -obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o +obj-$(CONFIG_MTD_NAND_MXC) += nand_device_info.o mxc_nd2.o obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o obj-$(CONFIG_MTD_NAND_NUC900) += nuc900_nand.o diff --git a/drivers/mtd/nand/mxc_nd2.c b/drivers/mtd/nand/mxc_nd2.c new file mode 100644 index 00000000000..960829de307 --- /dev/null +++ b/drivers/mtd/nand/mxc_nd2.c @@ -0,0 +1,1757 @@ +/* + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_nd2.h" +#include "nand_device_info.h" + +#define DVR_VER "3.0" + +/* Global address Variables */ +static void __iomem *nfc_axi_base, *nfc_ip_base; +static int nfc_irq; + +struct mxc_mtd_s { + struct mtd_info mtd; + struct nand_chip nand; + struct mtd_partition *parts; + struct device *dev; + int disable_bi_swap; /* disable bi swap */ + int ignore_bad_block; /* ignore bad block marker */ + void *saved_bbt; + int (*saved_block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); + int clk_active; +}; + +static struct mxc_mtd_s *mxc_nand_data; + +/* + * Define delay timeout value + */ +#define TROP_US_DELAY (1000 * 1000) + +struct nand_info { + bool bStatusRequest; + u16 colAddr; +}; + +static struct nand_info g_nandfc_info; + +#ifdef MTD_NAND_MXC_SWECC +static int hardware_ecc; +#else +static int hardware_ecc = 1; +#endif + + +static u8 num_of_interleave = 1; + +static u8 *data_buf; +static u8 *oob_buf; + +static int g_page_mask; + +static struct clk *nfc_clk; + +/* + * OOB placement block for use with hardware ecc generation + */ +static struct nand_ecclayout nand_hw_eccoob_512 = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{0, 4} } +}; + +static struct nand_ecclayout nand_hw_eccoob_2k = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{2, 4} } +}; + +static struct nand_ecclayout nand_hw_eccoob_4k = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{2, 4} } +}; + +/*! + * @defgroup NAND_MTD NAND Flash MTD Driver for MXC processors + */ + +/*! + * @file mxc_nd2.c + * + * @brief This file contains the hardware specific layer for NAND Flash on + * MXC processor + * + * @ingroup NAND_MTD + */ + +#ifdef CONFIG_MTD_PARTITIONS +static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL }; +#endif + +static wait_queue_head_t irq_waitq; + +static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) +{ + /* Disable Interuupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) | NFC_INT_MSK, REG_NFC_INTRRUPT); + wake_up(&irq_waitq); + + return IRQ_HANDLED; +} + +static void mxc_nand_bi_swap(struct mtd_info *mtd) +{ + u16 ma, sa, nma, nsa; + + if (!IS_LARGE_PAGE_NAND) + return; + + /* Disable bi swap if the user set disable_bi_swap at sys entry */ + if (mxc_nand_data->disable_bi_swap) + return; + + ma = __raw_readw(BAD_BLK_MARKER_MAIN); + sa = __raw_readw(BAD_BLK_MARKER_SP); + + nma = (ma & 0xFF00) | (sa >> 8); + nsa = (sa & 0x00FF) | (ma << 8); + + __raw_writew(nma, BAD_BLK_MARKER_MAIN); + __raw_writew(nsa, BAD_BLK_MARKER_SP); +} + +static void nfc_memcpy(void *dest, void *src, int len) +{ + u8 *d = dest; + u8 *s = src; + + while (len > 0) { + if (len >= 4) { + *(u32 *)d = *(u32 *)s; + d += 4; + s += 4; + len -= 4; + } else { + *(u16 *)d = *(u16 *)s; + len -= 2; + break; + } + } + + if (len) + BUG(); +} + +/* + * Functions to transfer data to/from spare erea. + */ +static void +copy_spare(struct mtd_info *mtd, void *pbuf, void *pspare, int len, bool bfrom) +{ + u16 i, j; + u16 m = mtd->oobsize; + u16 n = mtd->writesize >> 9; + u8 *d = (u8 *) pbuf; + u8 *s = (u8 *) pspare; + u16 t = SPARE_LEN; + + m /= num_of_interleave; + n /= num_of_interleave; + + j = (m / n >> 1) << 1; + + if (bfrom) { + for (i = 0; i < n - 1; i++) + nfc_memcpy(&d[i * j], &s[i * t], j); + + /* the last section */ + nfc_memcpy(&d[i * j], &s[i * t], len - i * j); + } else { + for (i = 0; i < n - 1; i++) + nfc_memcpy(&s[i * t], &d[i * j], j); + + /* the last section */ + nfc_memcpy(&s[i * t], &d[i * j], len - i * j); + } +} + +/*! + * This function polls the NFC to wait for the basic operation to complete by + * checking the INT bit of config2 register. + * + * @param maxRetries number of retry attempts (separated by 1 us) + * @param useirq True if IRQ should be used rather than polling + */ +static void wait_op_done(int maxRetries, bool useirq) +{ + if (useirq) { + if ((raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT) == 0) { + /* enable interrupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) & ~NFC_INT_MSK, + REG_NFC_INTRRUPT); + if (!wait_event_timeout(irq_waitq, + (raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT), + msecs_to_jiffies(TROP_US_DELAY / 1000)) > 0) { + /* disable interrupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) + | NFC_INT_MSK, REG_NFC_INTRRUPT); + + printk(KERN_WARNING "%s(%d): INT not set\n", + __func__, __LINE__); + return; + } + } + WRITE_NFC_IP_REG((raw_read(REG_NFC_OPS_STAT) & + ~NFC_OPS_STAT), REG_NFC_OPS_STAT); + } else { + while (1) { + maxRetries--; + if (raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT) { + WRITE_NFC_IP_REG((raw_read(REG_NFC_OPS_STAT) & + ~NFC_OPS_STAT), + REG_NFC_OPS_STAT); + break; + } + udelay(1); + if (maxRetries <= 0) { + printk(KERN_WARNING "%s(%d): INT not set\n", + __func__, __LINE__); + break; + } + } + } +} + +static inline void send_atomic_cmd(u16 cmd, bool useirq) +{ + /* fill command */ + raw_write(cmd, REG_NFC_FLASH_CMD); + + /* send out command */ + raw_write(NFC_CMD, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, useirq); +} + +static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr); +static int mxc_check_ecc_status(struct mtd_info *mtd); + +#ifdef NFC_AUTO_MODE_ENABLE +/*! + * This function handle the interleave related work + * @param mtd mtd info + * @param cmd command + */ +static void auto_cmd_interleave(struct mtd_info *mtd, u16 cmd) +{ + u32 i, page_addr, ncs; + u32 j = num_of_interleave; + struct nand_chip *this = mtd->priv; + u32 addr_low = raw_read(NFC_FLASH_ADDR0); + u32 addr_high = raw_read(NFC_FLASH_ADDR8); + u8 *dbuf = data_buf; + u8 *obuf = oob_buf; + u32 dlen = mtd->writesize / j; + u32 olen = mtd->oobsize / j; + + /* adjust the addr value + * since ADD_OP mode is 01 + */ + if (cmd == NAND_CMD_ERASE2) + page_addr = addr_low; + else + page_addr = addr_low >> 16 | addr_high << 16; + + ncs = NFC_GET_NFC_ACTIVE_CS(); + + if (j > 1) { + page_addr *= j; + } else { + page_addr *= this->numchips; + page_addr += ncs; + } + + switch (cmd) { + case NAND_CMD_PAGEPROG: + for (i = 0; i < j; i++) { + /* reset addr cycle */ + mxc_do_addr_cycle(mtd, 0, page_addr++); + + /* data transfer */ + memcpy(MAIN_AREA0, dbuf, dlen); + copy_spare(mtd, obuf, SPARE_AREA0, olen, false); + mxc_nand_bi_swap(mtd); + + /* update the value */ + dbuf += dlen; + obuf += olen; + + NFC_SET_RBA(0); + raw_write(NFC_AUTO_PROG, REG_NFC_OPS); + + /* wait auto_prog_done bit set */ + while (!(raw_read(REG_NFC_OPS_STAT) & NFC_OP_DONE)) + ; + } + + wait_op_done(TROP_US_DELAY, true); + while (!(raw_read(REG_NFC_OPS_STAT) & NFC_RB)); + + break; + case NAND_CMD_READSTART: + for (i = 0; i < j; i++) { + /* reset addr cycle */ + mxc_do_addr_cycle(mtd, 0, page_addr++); + + NFC_SET_RBA(0); + raw_write(NFC_AUTO_READ, REG_NFC_OPS); + wait_op_done(TROP_US_DELAY, true); + + /* check ecc error */ + mxc_check_ecc_status(mtd); + + /* data transfer */ + mxc_nand_bi_swap(mtd); + memcpy(dbuf, MAIN_AREA0, dlen); + copy_spare(mtd, obuf, SPARE_AREA0, olen, true); + + /* update the value */ + dbuf += dlen; + obuf += olen; + } + break; + case NAND_CMD_ERASE2: + for (i = 0; i < j; i++) { + mxc_do_addr_cycle(mtd, -1, page_addr++); + raw_write(NFC_AUTO_ERASE, REG_NFC_OPS); + wait_op_done(TROP_US_DELAY, true); + } + break; + case NAND_CMD_RESET: + for (i = 0; i < j; i++) { + if (j > 1) + NFC_SET_NFC_ACTIVE_CS(i); + send_atomic_cmd(cmd, false); + } + break; + default: + break; + } +} +#endif + +static void send_addr(u16 addr, bool useirq); + +/*! + * This function issues the specified command to the NAND device and + * waits for completion. + * + * @param cmd command for NAND Flash + * @param useirq True if IRQ should be used rather than polling + */ +static void send_cmd(struct mtd_info *mtd, u16 cmd, bool useirq) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(0x%x, %d)\n", cmd, useirq); + +#ifdef NFC_AUTO_MODE_ENABLE + switch (cmd) { + case NAND_CMD_READ0: + case NAND_CMD_READOOB: + raw_write(NAND_CMD_READ0, REG_NFC_FLASH_CMD); + break; + case NAND_CMD_SEQIN: + case NAND_CMD_ERASE1: + raw_write(cmd, REG_NFC_FLASH_CMD); + break; + case NAND_CMD_PAGEPROG: + case NAND_CMD_ERASE2: + case NAND_CMD_READSTART: + raw_write(raw_read(REG_NFC_FLASH_CMD) | cmd << NFC_CMD_1_SHIFT, + REG_NFC_FLASH_CMD); + auto_cmd_interleave(mtd, cmd); + break; + case NAND_CMD_READID: + send_atomic_cmd(cmd, useirq); + send_addr(0, false); + break; + case NAND_CMD_RESET: + auto_cmd_interleave(mtd, cmd); + break; + case NAND_CMD_STATUS: + send_atomic_cmd(cmd, useirq); + break; + default: + break; + } +#else + send_atomic_cmd(cmd, useirq); +#endif +} + +/*! + * This function sends an address (or partial address) to the + * NAND device. The address is used to select the source/destination for + * a NAND command. + * + * @param addr address to be written to NFC. + * @param useirq True if IRQ should be used rather than polling + */ +static void send_addr(u16 addr, bool useirq) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_addr(0x%x %d)\n", addr, useirq); + + /* fill address */ + raw_write((addr << NFC_FLASH_ADDR_SHIFT), REG_NFC_FLASH_ADDR); + + /* send out address */ + raw_write(NFC_ADDR, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, useirq); +} + +/*! + * This function requests the NFC to initate the transfer + * of data currently in the NFC RAM buffer to the NAND device. + * + * @param buf_id Specify Internal RAM Buffer number + */ +static void send_prog_page(u8 buf_id) +{ +#ifndef NFC_AUTO_MODE_ENABLE + DEBUG(MTD_DEBUG_LEVEL3, "%s\n", __FUNCTION__); + + /* set ram buffer id */ + NFC_SET_RBA(buf_id); + + /* transfer data from NFC ram to nand */ + raw_write(NFC_INPUT, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); +#endif +} + +/*! + * This function requests the NFC to initated the transfer + * of data from the NAND device into in the NFC ram buffer. + * + * @param buf_id Specify Internal RAM Buffer number + */ +static void send_read_page(u8 buf_id) +{ +#ifndef NFC_AUTO_MODE_ENABLE + DEBUG(MTD_DEBUG_LEVEL3, "%s(%d)\n", __FUNCTION__, buf_id); + + /* set ram buffer id */ + NFC_SET_RBA(buf_id); + + /* transfer data from nand to NFC ram */ + raw_write(NFC_OUTPUT, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); +#endif +} + +/*! + * This function requests the NFC to perform a read of the + * NAND device ID. + */ +static void send_read_id(void) +{ + /* Set RBA bits for BUFFER0 */ + NFC_SET_RBA(0); + + /* Read ID into main buffer */ + raw_write(NFC_ID, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, false); + +} + +#ifdef NFC_AUTO_MODE_ENABLE +static inline void read_dev_status(u16 *status) +{ + u32 mask = 0xFF << 16; + + /* use atomic mode to read status instead + of using auto mode,auto-mode has issues + and the status is not correct. + */ + raw_write(NFC_STATUS, REG_NFC_OPS); + + wait_op_done(TROP_US_DELAY, true); + + *status = (raw_read(NFC_CONFIG1) & mask) >> 16; + +} +#endif + +/*! + * This function requests the NFC to perform a read of the + * NAND device status and returns the current status. + * + * @return device status + */ +static u16 get_dev_status(void) +{ +#ifdef NFC_AUTO_MODE_ENABLE + int i; + u16 status = 0; + int cs = NFC_GET_NFC_ACTIVE_CS(); + + for (i = 0; i < num_of_interleave; i++) { + + /* set ative cs */ + NFC_SET_NFC_ACTIVE_CS(i); + + /* FIXME, NFC Auto erase may have + * problem, have to pollingit until + * the nand get idle, otherwise + * it may get error + */ + read_dev_status(&status); + if (status & NAND_STATUS_FAIL) + break; + } + + /* Restore active CS */ + NFC_SET_NFC_ACTIVE_CS(cs); + + return status; +#else + volatile u16 *mainBuf = MAIN_AREA1; + u8 val = 1; + u16 ret; + + /* Set ram buffer id */ + NFC_SET_RBA(val); + + /* Read status into main buffer */ + raw_write(NFC_STATUS, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); + + /* Status is placed in first word of main buffer */ + /* get status, then recovery area 1 data */ + ret = *mainBuf; + + return ret; +#endif +} + +static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode) +{ + raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), REG_NFC_ECC_EN); + return; +} + +/* + * Function to record the ECC corrected/uncorrected errors resulted + * after a page read. This NFC detects and corrects upto to 4 symbols + * of 9-bits each. + */ +static int mxc_check_ecc_status(struct mtd_info *mtd) +{ + u32 ecc_stat, err; + int no_subpages = 1; + int ret = 0; + u8 ecc_bit_mask = 0xf; + + no_subpages = mtd->writesize >> 9; + + no_subpages /= num_of_interleave; + + ecc_stat = GET_NFC_ECC_STATUS(); + do { + err = ecc_stat & ecc_bit_mask; + if (err == ecc_bit_mask) { + mtd->ecc_stats.failed++; + printk(KERN_WARNING "UnCorrectable RS-ECC Error\n"); + return -1; + } else { + ret += err; + } + ecc_stat >>= 4; + } while (--no_subpages); + + pr_debug("Correctable ECC Error(%d)\n", ret); + + return ret; +} + +/* + * Function to correct the detected errors. This NFC corrects all the errors + * detected. So this function just return 0. + */ +static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + return 0; +} + +/* + * Function to calculate the ECC for the data to be stored in the Nand device. + * This NFC has a hardware RS(511,503) ECC engine together with the RS ECC + * CONTROL blocks are responsible for detection and correction of up to + * 8 symbols of 9 bits each in 528 byte page. + * So this function is just return 0. + */ + +static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, + u_char *ecc_code) +{ + return 0; +} + +/*! + * This function id is used to read the data buffer from the NAND Flash. To + * read the data from NAND Flash first the data output cycle is initiated by + * the NFC, which copies the data to RAMbuffer. This data of length \b len is + * then copied to buffer \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be read from NAND Flash + * @param len number of bytes to be read + */ +static void mxc_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) +{ + u16 col = g_nandfc_info.colAddr; + + if (mtd->writesize) { + + int j = mtd->writesize - col; + int n = mtd->oobsize + j; + + n = min(n, len); + + if (j > 0) { + if (n > j) { + memcpy(buf, &data_buf[col], j); + memcpy(buf + j, &oob_buf[0], n - j); + } else { + memcpy(buf, &data_buf[col], n); + } + } else { + col -= mtd->writesize; + memcpy(buf, &oob_buf[col], len); + } + + /* update */ + g_nandfc_info.colAddr += n; + + } else { + /* At flash identify phase, + * mtd->writesize has not been + * set correctly, it should + * be zero.And len will less 2 + */ + memcpy(buf, &data_buf[col], len); + + /* update */ + g_nandfc_info.colAddr += len; + } + +} + +/*! + * This function reads byte from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static uint8_t mxc_nand_read_byte(struct mtd_info *mtd) +{ + uint8_t ret; + + /* Check for status request */ + if (g_nandfc_info.bStatusRequest) { + return get_dev_status() & 0xFF; + } + + mxc_nand_read_buf(mtd, &ret, 1); + + return ret; +} + +/*! + * This function reads word from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u16 mxc_nand_read_word(struct mtd_info *mtd) +{ + u16 ret; + + mxc_nand_read_buf(mtd, (uint8_t *) &ret, sizeof(u16)); + + return ret; +} + +/*! + * This function reads byte from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u_char mxc_nand_read_byte16(struct mtd_info *mtd) +{ + /* Check for status request */ + if (g_nandfc_info.bStatusRequest) { + return get_dev_status() & 0xFF; + } + + return mxc_nand_read_word(mtd) & 0xFF; +} + +/*! + * This function writes data of length \b len from buffer \b buf to the NAND + * internal RAM buffer's MAIN area 0. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be written to NAND Flash + * @param len number of bytes to be written + */ +static void mxc_nand_write_buf(struct mtd_info *mtd, + const u_char *buf, int len) +{ + u16 col = g_nandfc_info.colAddr; + int j = mtd->writesize - col; + int n = mtd->oobsize + j; + + n = min(n, len); + + if (j > 0) { + if (n > j) { + memcpy(&data_buf[col], buf, j); + memcpy(&oob_buf[0], buf + j, n - j); + } else { + memcpy(&data_buf[col], buf, n); + } + } else { + col -= mtd->writesize; + memcpy(&oob_buf[col], buf, len); + } + + /* update */ + g_nandfc_info.colAddr += n; +} + +/*! + * This function is used by the upper layer to verify the data in NAND Flash + * with the data in the \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be verified + * @param len length of the data to be verified + * + * @return -EFAULT if error else 0 + * + */ +static int mxc_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, + int len) +{ + u_char *s = data_buf; + + const u_char *p = buf; + + for (; len > 0; len--) { + if (*p++ != *s++) + return -EFAULT; + } + + return 0; +} + +/*! + * This function will enable NFC clock + * + */ +static inline void mxc_nand_clk_enable(void) +{ + if (!mxc_nand_data->clk_active) { + clk_enable(nfc_clk); + mxc_nand_data->clk_active = 1; + } +} + +/*! + * This function will disable NFC clock + * + */ +static inline void mxc_nand_clk_disable(void) +{ + if (mxc_nand_data->clk_active) { + clk_disable(nfc_clk); + mxc_nand_data->clk_active = 0; + } +} + +/*! + * This function is used by upper layer for select and deselect of the NAND + * chip + * + * @param mtd MTD structure for the NAND Flash + * @param chip val indicating select or deselect + */ +static void mxc_nand_select_chip(struct mtd_info *mtd, int chip) +{ + + switch (chip) { + case -1: + /* Disable the NFC clock */ + mxc_nand_clk_disable(); + + break; + case 0 ... NFC_GET_MAXCHIP_SP(): + /* Enable the NFC clock */ + mxc_nand_clk_enable(); + NFC_SET_NFC_ACTIVE_CS(chip); + + break; + + default: + break; + } +} + +/* + * Function to perform the address cycles. + */ +static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) +{ +#ifdef NFC_AUTO_MODE_ENABLE + + if (page_addr != -1 && column != -1) { + u32 mask = 0xFFFF; + /* the column address */ + raw_write(column & mask, NFC_FLASH_ADDR0); + raw_write((raw_read(NFC_FLASH_ADDR0) | + ((page_addr & mask) << 16)), NFC_FLASH_ADDR0); + /* the row address */ + raw_write(((raw_read(NFC_FLASH_ADDR8) & (mask << 16)) | + ((page_addr & (mask << 16)) >> 16)), + NFC_FLASH_ADDR8); + } else if (page_addr != -1) { + raw_write(page_addr, NFC_FLASH_ADDR0); + raw_write(0, NFC_FLASH_ADDR8); + } + + DEBUG(MTD_DEBUG_LEVEL3, + "AutoMode:the ADDR REGS value is (0x%x, 0x%x)\n", + raw_read(NFC_FLASH_ADDR0), raw_read(NFC_FLASH_ADDR8)); +#else + + u32 page_mask = g_page_mask; + + if (column != -1) { + send_addr(column & 0xFF, true); + if (IS_2K_PAGE_NAND) { + /* another col addr cycle for 2k page */ + send_addr((column >> 8) & 0xF, true); + } else if (IS_4K_PAGE_NAND) { + /* another col addr cycle for 4k page */ + send_addr((column >> 8) & 0x1F, true); + } + } + if (page_addr != -1) { + do { + send_addr((page_addr & 0xff), true); + page_mask >>= 8; + page_addr >>= 8; + } while (page_mask != 0); + } +#endif +} + +/*! + * This function is used by the upper layer to write command to NAND Flash for + * different operations to be carried out on NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * @param command command for NAND Flash + * @param column column offset for the page read + * @param page_addr page to be read from NAND Flash + */ +static void mxc_nand_command(struct mtd_info *mtd, unsigned command, + int column, int page_addr) +{ + bool useirq = true; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n", + command, column, page_addr); + /* + * Reset command state information + */ + g_nandfc_info.bStatusRequest = false; + + /* + * Command pre-processing step + */ + switch (command) { + case NAND_CMD_STATUS: + g_nandfc_info.colAddr = 0; + g_nandfc_info.bStatusRequest = true; + break; + + case NAND_CMD_READ0: + g_nandfc_info.colAddr = column; + break; + + case NAND_CMD_READOOB: + g_nandfc_info.colAddr = column; + command = NAND_CMD_READ0; + break; + + case NAND_CMD_SEQIN: + if (column != 0) { + + /* FIXME: before send SEQIN command for + * partial write,We need read one page out. + * FSL NFC does not support partial write + * It alway send out 512+ecc+512+ecc ... + * for large page nand flash. But for small + * page nand flash, it did support SPARE + * ONLY operation. But to make driver + * simple. We take the same as large page,read + * whole page out and update. As for MLC nand + * NOP(num of operation) = 1. Partial written + * on one programed page is not allowed! We + * can't limit it on the driver, it need the + * upper layer applicaiton take care it + */ + + mxc_nand_command(mtd, NAND_CMD_READ0, 0, page_addr); + } + + g_nandfc_info.colAddr = column; + column = 0; + + break; + + case NAND_CMD_PAGEPROG: +#ifndef NFC_AUTO_MODE_ENABLE + /* FIXME:the NFC interal buffer + * access has some limitation, it + * does not allow byte access. To + * make the code simple and ease use + * not every time check the address + * alignment.Use the temp buffer + * to accomadate the data.since We + * know data_buf will be at leat 4 + * byte alignment, so we can use + * memcpy safely + */ + nfc_memcpy(MAIN_AREA0, data_buf, mtd->writesize); + copy_spare(mtd, oob_buf, SPARE_AREA0, mtd->oobsize, false); + mxc_nand_bi_swap(mtd); +#endif + + if (IS_LARGE_PAGE_NAND) + PROG_PAGE(); + else + send_prog_page(0); + + break; + + case NAND_CMD_ERASE1: + break; + case NAND_CMD_ERASE2: + break; + } + + /* + * Write out the command to the device. + */ + send_cmd(mtd, command, useirq); + + mxc_do_addr_cycle(mtd, column, page_addr); + + /* + * Command post-processing step + */ + switch (command) { + + case NAND_CMD_READOOB: + case NAND_CMD_READ0: + if (IS_LARGE_PAGE_NAND) { + /* send read confirm command */ + send_cmd(mtd, NAND_CMD_READSTART, true); + /* read for each AREA */ + READ_PAGE(); + } else { + send_read_page(0); + } + +#ifndef NFC_AUTO_MODE_ENABLE + /* FIXME, the NFC interal buffer + * access has some limitation, it + * does not allow byte access. To + * make the code simple and ease use + * not every time check the address + * alignment.Use the temp buffer + * to accomadate the data.since We + * know data_buf will be at leat 4 + * byte alignment, so we can use + * memcpy safely + */ + mxc_nand_bi_swap(mtd); + nfc_memcpy(data_buf, MAIN_AREA0, mtd->writesize); + copy_spare(mtd, oob_buf, SPARE_AREA0, mtd->oobsize, true); +#endif + + break; + + case NAND_CMD_READID: + send_read_id(); + g_nandfc_info.colAddr = column; + nfc_memcpy(data_buf, MAIN_AREA0, 2048); + + break; + } +} + +static int mxc_nand_read_oob(struct mtd_info *mtd, + struct nand_chip *chip, int page, int sndcmd) +{ + if (sndcmd) { + + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + sndcmd = 0; + } + + memcpy(chip->oob_poi, oob_buf, mtd->oobsize); + + return sndcmd; +} + +static int mxc_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page) +{ + +#ifndef NFC_AUTO_MODE_ENABLE + mxc_check_ecc_status(mtd); +#endif + + memcpy(buf, data_buf, mtd->writesize); + memcpy(chip->oob_poi, oob_buf, mtd->oobsize); + + return 0; +} + +static void mxc_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) +{ + memcpy(data_buf, buf, mtd->writesize); + memcpy(oob_buf, chip->oob_poi, mtd->oobsize); + +} + +/*! + * mxc_nand_block_bad - Claims all blocks are good + * In principle, this function is *only* called when the NAND Flash MTD system + * isn't allowed to keep an in-memory bad block table, so it is forced to ask + * the driver for bad block information. + * + * In fact, we permit the NAND Flash MTD system to have an in-memory BBT, so + * this function is *only* called when we take it away. + * + * We take away the in-memory BBT when the user sets the "ignorebad" parameter, + * which indicates that all blocks should be reported good. + * + * Thus, this function is only called when we want *all* blocks to look good, + * so it *always* return success. + * + * @mtd: Ignored. + * @ofs: Ignored. + * @getchip: Ignored. + */ +static int mxc_nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) +{ + return 0; +} + +/* Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr smallpage_memorybased = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = 5, + .len = 1, + .pattern = scan_ff_pattern +}; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern +}; + +/* Generic flash bbt decriptors +*/ +static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; +static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = bbt_pattern +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = mirror_pattern +}; + +static int mxc_nand_scan_bbt(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + + g_page_mask = this->pagemask; + + if (IS_2K_PAGE_NAND) { + NFC_SET_NFMS(1 << NFMS_NF_PG_SZ); + this->ecc.layout = &nand_hw_eccoob_2k; + } else if (IS_4K_PAGE_NAND) { + NFC_SET_NFMS(1 << NFMS_NF_PG_SZ); + this->ecc.layout = &nand_hw_eccoob_4k; + } else { + this->ecc.layout = &nand_hw_eccoob_512; + } + + /* propagate ecc.layout to mtd_info */ + mtd->ecclayout = this->ecc.layout; + + /* jffs2 not write oob */ + mtd->flags &= ~MTD_OOB_WRITEABLE; + + /* fix up the offset */ + largepage_memorybased.offs = BAD_BLK_MARKER_OOB_OFFS; + + /* keep compatible for bbt table with old soc */ + if (cpu_is_mx53()) { + bbt_mirror_descr.offs = BAD_BLK_MARKER_OOB_OFFS + 2; + bbt_main_descr.offs = BAD_BLK_MARKER_OOB_OFFS + 2; + bbt_mirror_descr.veroffs = bbt_mirror_descr.offs + 4; + bbt_main_descr.veroffs = bbt_main_descr.offs + 4; + } + + /* use flash based bbt */ + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + + /* update flash based bbt */ + this->options |= NAND_USE_FLASH_BBT; + + if (!this->badblock_pattern) { + this->badblock_pattern = (mtd->writesize > 512) ? + &largepage_memorybased : &smallpage_memorybased; + } + + /* Build bad block table */ + return nand_scan_bbt(mtd, this->badblock_pattern); +} + +static int mxc_get_resources(struct platform_device *pdev) +{ + struct resource *r; + int error = 0; + +#define MXC_NFC_NO_IP_REG \ + (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx32() || cpu_is_mx35()) + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + error = -ENXIO; + goto out_0; + } + nfc_axi_base = ioremap(r->start, resource_size(r)); + + if (!MXC_NFC_NO_IP_REG) { + r = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!r) { + error = -ENXIO; + goto out_1; + } + } + nfc_ip_base = ioremap(r->start, resource_size(r)); + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!r) { + error = -ENXIO; + goto out_2; + } + nfc_irq = r->start; + + init_waitqueue_head(&irq_waitq); + error = request_irq(nfc_irq, mxc_nfc_irq, 0, "mxc_nd", NULL); + if (error) + goto out_3; + + return 0; +out_3: +out_2: + if (!MXC_NFC_NO_IP_REG) + iounmap(nfc_ip_base); +out_1: + iounmap(nfc_axi_base); +out_0: + return error; +} + +static void mxc_nfc_init(void) +{ + /* Disable interrupt */ + raw_write((raw_read(REG_NFC_INTRRUPT) | NFC_INT_MSK), REG_NFC_INTRRUPT); + + /* disable spare enable */ + raw_write(raw_read(REG_NFC_SP_EN) & ~NFC_SP_EN, REG_NFC_SP_EN); + + /* Unlock the internal RAM Buffer */ + raw_write(NFC_SET_BLS(NFC_BLS_UNLCOKED), REG_NFC_BLS); + + if (!(cpu_is_mx53())) { + /* Blocks to be unlocked */ + UNLOCK_ADDR(0x0, 0xFFFF); + + /* Unlock Block Command for given address range */ + raw_write(NFC_SET_WPC(NFC_WPC_UNLOCK), REG_NFC_WPC); + } + + /* Enable symetric mode by default except mx37TO1.0 */ + if (!(cpu_is_mx37_rev(CHIP_REV_1_0) == 1)) + raw_write(raw_read(REG_NFC_ONE_CYCLE) | + NFC_ONE_CYCLE, REG_NFC_ONE_CYCLE); +} + +static int mxc_alloc_buf(void) +{ + int err = 0; + + data_buf = kzalloc(NAND_MAX_PAGESIZE, GFP_KERNEL); + if (!data_buf) { + printk(KERN_ERR "%s: failed to allocate data_buf\n", __func__); + err = -ENOMEM; + goto out; + } + oob_buf = kzalloc(NAND_MAX_OOBSIZE, GFP_KERNEL); + if (!oob_buf) { + printk(KERN_ERR "%s: failed to allocate oob_buf\n", __func__); + err = -ENOMEM; + goto out; + } + + out: + return err; +} + +static void mxc_free_buf(void) +{ + kfree(data_buf); + kfree(oob_buf); +} + +int nand_scan_mid(struct mtd_info *mtd) +{ + int i; + uint8_t id_bytes[NAND_DEVICE_ID_BYTE_COUNT]; + struct nand_chip *this = mtd->priv; + struct nand_device_info *dev_info; + + if (!IS_LARGE_PAGE_NAND) + return 0; + + /* Read ID bytes from the first NAND Flash chip. */ + this->select_chip(mtd, 0); + + this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); + + for (i = 0; i < NAND_DEVICE_ID_BYTE_COUNT; i++) + id_bytes[i] = this->read_byte(mtd); + + /* Get information about this device, based on the ID bytes. */ + dev_info = nand_device_get_info(id_bytes); + + /* Check if we understand this device. */ + if (!dev_info) { + printk(KERN_ERR "Unrecognized NAND Flash device.\n"); + return !0; + } + + /* Correct mtd setting */ + this->chipsize = dev_info->chip_size_in_bytes; + mtd->size = dev_info->chip_size_in_bytes * this->numchips; + mtd->writesize = dev_info->page_total_size_in_bytes & ~0x3ff; + mtd->oobsize = dev_info->page_total_size_in_bytes & 0x3ff; + mtd->erasesize = dev_info->block_size_in_pages * mtd->writesize; + + /* Calculate the address shift from the page size */ + this->page_shift = ffs(mtd->writesize) - 1; + /* Convert chipsize to number of pages per chip -1. */ + this->pagemask = (this->chipsize >> this->page_shift) - 1; + + this->bbt_erase_shift = this->phys_erase_shift = + ffs(mtd->erasesize) - 1; + this->chip_shift = ffs(this->chipsize) - 1; + + return 0; +} + +/*! + * show_device_disable_bi_swap() + * Shows the value of the 'disable_bi_swap' flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_disable_bi_swap(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", mxc_nand_data->disable_bi_swap); +} + +/*! + * store_device_disable_bi_swap() + * Sets the value of the 'disable_bi_swap' flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_disable_bi_swap(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + const char *p = buf; + unsigned long v; + + /* Try to make sense of what arrived from user space. */ + + if (strict_strtoul(p, 0, &v) < 0) + return size; + + if (v > 0) + v = 1; + mxc_nand_data->disable_bi_swap = v; + return size; + +} + +static DEVICE_ATTR(disable_bi_swap, 0644, + show_device_disable_bi_swap, store_device_disable_bi_swap); + +/*! + * show_device_ignorebad() + * Shows the value of the 'ignore_bad_block' flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_ignorebad(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", mxc_nand_data->ignore_bad_block); +} + +/*! + * store_device_ignorebad() + * Sets the value of the 'ignore_bad_block' flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_ignorebad(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + const char *p = buf; + unsigned long v; + + /* Try to make sense of what arrived from user space. */ + + if (strict_strtoul(p, 0, &v) < 0) + return size; + + if (v > 0) + v = 1; + + /* Only do something if the value is changing. */ + if (v != mxc_nand_data->ignore_bad_block) { + if (v) { + /* + * If control arrives here, we want to begin ignoring + * bad block marks. Reach into the NAND Flash MTD data + * structures and set the in-memory BBT pointer to NULL. + * This will cause the NAND Flash MTD code to believe + * that it never created a BBT and force it to call our + * block_bad function. + */ + mxc_nand_data->saved_bbt = mxc_nand_data->nand.bbt; + mxc_nand_data->nand.bbt = 0; + mxc_nand_data->saved_block_bad = + mxc_nand_data->nand.block_bad; + mxc_nand_data->nand.block_bad = + mxc_nand_block_bad; + } else { + /* + * If control arrives here, we want to stop ignoring + * bad block marks. Restore the NAND Flash MTD's pointer + * to its in-memory BBT. + */ + mxc_nand_data->nand.bbt = mxc_nand_data->saved_bbt; + mxc_nand_data->nand.block_bad = + mxc_nand_data->saved_block_bad; + } + mxc_nand_data->ignore_bad_block = v; + } + + return size; + +} + +static DEVICE_ATTR(ignorebad, 0644, + show_device_ignorebad, store_device_ignorebad); + + +static struct device_attribute *device_attributes[] = { + &dev_attr_disable_bi_swap, + &dev_attr_ignorebad, +}; +/*! + * manage_sysfs_files() - Creates/removes sysfs files for this device. + * + * @create: create/remove the sys entry. + */ +static void manage_sysfs_files(int create) +{ + struct device *dev = mxc_nand_data->dev; + int error; + unsigned int i; + struct device_attribute **attr; + + for (i = 0, attr = device_attributes; + i < ARRAY_SIZE(device_attributes); i++, attr++) { + + if (create) { + error = device_create_file(dev, *attr); + if (error) { + while (--attr >= device_attributes) + device_remove_file(dev, *attr); + return; + } + } else { + device_remove_file(dev, *attr); + } + } + +} + + +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and + * remove functions + * + * @return The function always returns 0. + */ +static int __devinit mxcnd_probe(struct platform_device *pdev) +{ + struct nand_chip *this; + struct mtd_info *mtd; + struct flash_platform_data *flash = pdev->dev.platform_data; + int nr_parts = 0, err = 0; + + /* get the resource */ + err = mxc_get_resources(pdev); + if (err) + goto out; + + /* init the nfc */ + mxc_nfc_init(); + + /* init data buf */ + if (mxc_alloc_buf()) + goto out; + + /* Allocate memory for MTD device structure and private data */ + mxc_nand_data = kzalloc(sizeof(struct mxc_mtd_s), GFP_KERNEL); + if (!mxc_nand_data) { + printk(KERN_ERR "%s: failed to allocate mtd_info\n", + __FUNCTION__); + err = -ENOMEM; + goto out; + } + + memset((char *)&g_nandfc_info, 0, sizeof(g_nandfc_info)); + + mxc_nand_data->dev = &pdev->dev; + /* structures must be linked */ + this = &mxc_nand_data->nand; + mtd = &mxc_nand_data->mtd; + mtd->priv = this; + mtd->owner = THIS_MODULE; + + this->priv = mxc_nand_data; + this->cmdfunc = mxc_nand_command; + this->select_chip = mxc_nand_select_chip; + this->read_byte = mxc_nand_read_byte; + this->read_word = mxc_nand_read_word; + this->write_buf = mxc_nand_write_buf; + this->read_buf = mxc_nand_read_buf; + this->verify_buf = mxc_nand_verify_buf; + this->scan_bbt = mxc_nand_scan_bbt; + + /* NAND bus width determines access funtions used by upper layer */ + if (flash->width == 2) { + this->read_byte = mxc_nand_read_byte16; + this->options |= NAND_BUSWIDTH_16; + NFC_SET_NFMS(1 << NFMS_NF_DWIDTH); + } else { + NFC_SET_NFMS(0); + } + + nfc_clk = clk_get(&pdev->dev, "nfc_clk"); + clk_enable(nfc_clk); + mxc_nand_data->clk_active = 1; + + if (hardware_ecc) { + this->ecc.read_page = mxc_nand_read_page; + this->ecc.write_page = mxc_nand_write_page; + this->ecc.read_oob = mxc_nand_read_oob; + this->ecc.layout = &nand_hw_eccoob_512; + this->ecc.calculate = mxc_nand_calculate_ecc; + this->ecc.hwctl = mxc_nand_enable_hwecc; + this->ecc.correct = mxc_nand_correct_data; + this->ecc.mode = NAND_ECC_HW; + this->ecc.size = 512; + this->ecc.bytes = 9; + raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), + REG_NFC_ECC_EN); + } else { + this->ecc.mode = NAND_ECC_SOFT; + raw_write((raw_read(REG_NFC_ECC_EN) & ~NFC_ECC_EN), + REG_NFC_ECC_EN); + } + + /* config the gpio */ + if (flash->init) + flash->init(); + + /* Reset NAND */ + this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + + /* Scan to find existence of the device */ + if (nand_scan_ident(mtd, NFC_GET_MAXCHIP_SP(), NULL) + || nand_scan_mid(mtd) + || nand_scan_tail(mtd)) { + DEBUG(MTD_DEBUG_LEVEL0, + "MXC_ND2: Unable to find any NAND device.\n"); + err = -ENXIO; + goto out_1; + } + + /* Register the partitions */ +#ifdef CONFIG_MTD_PARTITIONS + nr_parts = + parse_mtd_partitions(mtd, part_probes, &mxc_nand_data->parts, 0); + if (nr_parts > 0) + add_mtd_partitions(mtd, mxc_nand_data->parts, nr_parts); + else if (flash->parts) + add_mtd_partitions(mtd, flash->parts, flash->nr_parts); + else +#endif + { + pr_info("Registering %s as whole device\n", mtd->name); + add_mtd_device(mtd); + } + + /* Create sysfs entries for this device. */ + manage_sysfs_files(true); + + platform_set_drvdata(pdev, mtd); + + return 0; + + out_1: + kfree(mxc_nand_data); + out: + return err; + +} + + /*! + * Dissociates the driver from the device. + * + * @param pdev the device structure used to give information on which + * + * @return The function always returns 0. + */ + +static int __exit mxcnd_remove(struct platform_device *pdev) +{ + struct mtd_info *mtd = platform_get_drvdata(pdev); + struct flash_platform_data *flash = pdev->dev.platform_data; + + if (flash->exit) + flash->exit(); + + manage_sysfs_files(false); + mxc_free_buf(); + + mxc_nand_clk_disable(); + clk_put(nfc_clk); + platform_set_drvdata(pdev, NULL); + + if (mxc_nand_data) { + nand_release(mtd); + free_irq(nfc_irq, NULL); + kfree(mxc_nand_data); + } + + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function is called to put the NAND in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure + */ + +static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state) +{ + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND2 : NAND suspend\n"); + + /* Disable the NFC clock */ + mxc_nand_clk_disable(); + + return 0; +} + +/*! + * This function is called to bring the NAND back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxcnd_resume(struct platform_device *pdev) +{ + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND2 : NAND resume\n"); + + /* Enable the NFC clock */ + mxc_nand_clk_enable(); + + return 0; +} + +#else +#define mxcnd_suspend NULL +#define mxcnd_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcnd_driver = { + .driver = { + .name = "mxc_nandv2_flash", + }, + .probe = mxcnd_probe, + .remove = __exit_p(mxcnd_remove), + .suspend = mxcnd_suspend, + .resume = mxcnd_resume, +}; + +/*! + * Main initialization routine + * @return 0 if successful; non-zero otherwise + */ +static int __init mxc_nd_init(void) +{ + /* Register the device driver structure. */ + pr_info("MXC MTD nand Driver %s\n", DVR_VER); + if (platform_driver_register(&mxcnd_driver) != 0) { + printk(KERN_ERR "Driver register failed for mxcnd_driver\n"); + return -ENODEV; + } + return 0; +} + +/*! + * Clean up routine + */ +static void __exit mxc_nd_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&mxcnd_driver); +} + +module_init(mxc_nd_init); +module_exit(mxc_nd_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC NAND MTD driver Version 2-5"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mtd/nand/mxc_nd2.h b/drivers/mtd/nand/mxc_nd2.h new file mode 100644 index 00000000000..224b422bc92 --- /dev/null +++ b/drivers/mtd/nand/mxc_nd2.h @@ -0,0 +1,731 @@ +/* + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_nd2.h + * + * @brief This file contains the NAND Flash Controller register information. + * + * + * @ingroup NAND_MTD + */ + +#ifndef __MXC_ND2_H__ +#define __MXC_ND2_H__ + +#include + +#define CHIP_REV_1_0 0x00 +#define CHIP_REV_2_0 0x20 + +#define mxc_cpu_rev() (system_rev & 0xFF) +#define mxc_cpu_is_rev(rev) \ + ((mxc_cpu_rev() == rev) ? 1 : ((mxc_cpu_rev() < rev) ? -1 : 2)) +#define cpu_rev(type, rev) (cpu_is_##type() ? mxc_cpu_is_rev(rev) : 0) +#define cpu_is_mx51_rev(rev) cpu_rev(mx51, rev) +#define cpu_is_mx37_rev(rev) cpu_rev(mx37, rev) + +#define CONFIG_ARCH_MXC_HAS_NFC_V3 +#define CONFIG_ARCH_MXC_HAS_NFC_V3_2 + +#define IS_2K_PAGE_NAND ((mtd->writesize / num_of_interleave) \ + == NAND_PAGESIZE_2KB) +#define IS_4K_PAGE_NAND ((mtd->writesize / num_of_interleave) \ + == NAND_PAGESIZE_4KB) +#define IS_LARGE_PAGE_NAND ((mtd->writesize / num_of_interleave) > 512) + +#define GET_NAND_OOB_SIZE (mtd->oobsize / num_of_interleave) +#define GET_NAND_PAGE_SIZE (mtd->writesize / num_of_interleave) + +#define NAND_PAGESIZE_2KB 2048 +#define NAND_PAGESIZE_4KB 4096 + +/* + * main area for bad block marker is in the last data section + * the spare area for swapped bad block marker is the second + * byte of last spare section + */ +#define NAND_SECTIONS (GET_NAND_PAGE_SIZE >> 9) +#define NAND_OOB_PER_SECTION (((GET_NAND_OOB_SIZE / NAND_SECTIONS) >> 1) << 1) +#define NAND_CHUNKS (GET_NAND_PAGE_SIZE / (512 + NAND_OOB_PER_SECTION)) + +#define BAD_BLK_MARKER_MAIN_OFFS \ + (GET_NAND_PAGE_SIZE - NAND_CHUNKS * NAND_OOB_PER_SECTION) + +#define BAD_BLK_MARKER_SP_OFFS (NAND_CHUNKS * SPARE_LEN) + +#define BAD_BLK_MARKER_OOB_OFFS (NAND_CHUNKS * NAND_OOB_PER_SECTION) + +#define BAD_BLK_MARKER_MAIN \ + ((u32)MAIN_AREA0 + BAD_BLK_MARKER_MAIN_OFFS) + +#define BAD_BLK_MARKER_SP \ + ((u32)SPARE_AREA0 + BAD_BLK_MARKER_SP_OFFS) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3 +/* + * For V3 NFC registers Definition + */ + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) /* mx37 */ +#define MXC_INT_NANDFC MXC_INT_EMI +#define NFC_FLASH_ADDR_CMD (nfc_axi_base + 0x1E00) +#define NFC_CONFIG1 (nfc_axi_base + 0x1E04) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0x1E08) +#define LAUNCH_NFC (nfc_axi_base + 0x1E0c) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x14) +#define NFC_IPC (nfc_ip_base + 0x18) +#elif defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define MXC_INT_NANDFC MXC_INT_NFC +#define NFC_AUTO_MODE_ENABLE +#define NFC_FLASH_CMD (nfc_axi_base + 0x1E00) +#define NFC_FLASH_ADDR0 (nfc_axi_base + 0x1E04) +#define NFC_FLASH_ADDR8 (nfc_axi_base + 0x1E24) +#define NFC_CONFIG1 (nfc_axi_base + 0x1E34) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0x1E38) +#define NFC_ECC_STATUS_SUM (nfc_axi_base + 0x1E3C) +#define LAUNCH_NFC (nfc_axi_base + 0x1E40) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x24) +#define NFC_CONFIG3 (nfc_ip_base + 0x28) +#define NFC_IPC (nfc_ip_base + 0x2C) +#define NFC_DELAY_LINE (nfc_ip_base + 0x34) +#else /* skye */ +#define NFC_FLASH_ADDR_CMD (nfc_axi_base + 0xE00) +#define NFC_CONFIG1 (nfc_axi_base + 0xE04) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0xE08) +#define LAUNCH_NFC (nfc_axi_base + 0xE0C) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x14) +#define NFC_IPC (nfc_ip_base + 0x18) +#endif +/*! + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 ((u16 *)(nfc_axi_base + 0x000)) +#define MAIN_AREA1 ((u16 *)(nfc_axi_base + 0x200)) + +/*! + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define SPARE_AREA0 ((u16 *)(nfc_axi_base + 0x1000)) +#define SPARE_LEN 64 +#define SPARE_COUNT 8 +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) +#else +#define SPARE_AREA0 ((u16 *)(nfc_axi_base + 0x800)) +#define SPARE_LEN 16 +#define SPARE_COUNT 4 +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) +#endif + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_SPAS_WIDTH 8 +#define NFC_SPAS_SHIFT 16 + +#define NFC_SET_SPAS(v) \ + raw_write((((raw_read(NFC_CONFIG2) & \ + NFC_FIELD_RESET(NFC_SPAS_WIDTH, NFC_SPAS_SHIFT)) | ((v) << 16))), \ + NFC_CONFIG2) + +#define NFC_SET_ECC_MODE(v) \ +do { \ + if (cpu_is_mx53() > 0) { \ + if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(3 << 6)) | \ + NFC_ECC_MODE_16), NFC_CONFIG2); \ + else \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(3 << 6)) | \ + NFC_ECC_MODE_4), NFC_CONFIG2); \ + } else if (cpu_is_mx51_rev(CHIP_REV_2_0) > 0) { \ + if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(1 << 6)) | \ + NFC_ECC_MODE_8), NFC_CONFIG2); \ + else \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(1 << 6)) | \ + NFC_ECC_MODE_4), NFC_CONFIG2); \ + } else { \ + if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(1 << 6)) | \ + NFC_ECC_MODE_4), NFC_CONFIG2); \ + else \ + raw_write(((raw_read(NFC_CONFIG2) & \ + ~(1 << 6)) | \ + NFC_ECC_MODE_8), NFC_CONFIG2); \ + } \ +} while (0) + +#define WRITE_NFC_IP_REG(val, reg) \ + do { \ + raw_write(raw_read(NFC_IPC) | NFC_IPC_CREQ, NFC_IPC); \ + while (!(raw_read(NFC_IPC) & NFC_IPC_ACK)) \ + ; \ + raw_write(val, reg); \ + raw_write(raw_read(NFC_IPC) & ~NFC_IPC_CREQ, NFC_IPC); \ + } while (0) + +#else +#define NFC_SET_SPAS(v) +#define NFC_SET_ECC_MODE(v) +#define NFC_SET_NFMS(v) (NFMS |= (v)) + +#define WRITE_NFC_IP_REG(val, reg) \ + raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \ + REG_NFC_OPS_STAT) +#endif + +#define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); + +/*! + * Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for + * Specific operation + */ +#define NFC_CMD 0x1 +#define NFC_ADDR 0x2 +#define NFC_INPUT 0x4 +#define NFC_OUTPUT 0x8 +#define NFC_ID 0x10 +#define NFC_STATUS 0x20 + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_AUTO_PROG 0x40 +#define NFC_AUTO_READ 0x80 +#define NFC_AUTO_ERASE 0x200 +#define NFC_COPY_BACK_0 0x400 +#define NFC_COPY_BACK_1 0x800 +#define NFC_AUTO_STATE 0x1000 +#endif + +/* Bit Definitions for NFC_IPC*/ +#define NFC_OPS_STAT (1 << 31) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_OP_DONE (1 << 30) +#define NFC_RB (1 << 28) +#define NFC_PS_WIDTH 2 +#define NFC_PS_SHIFT 0 +#define NFC_PS_512 0 +#define NFC_PS_2K 1 +#define NFC_PS_4K 2 +#else +#define NFC_RB (1 << 29) +#endif + +#define NFC_ONE_CYCLE (1 << 2) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_INT_MSK (1 << 15) +#define NFC_AUTO_PROG_DONE_MSK (1 << 14) +#define NFC_NUM_ADDR_PHASE1_WIDTH 2 +#define NFC_NUM_ADDR_PHASE1_SHIFT 12 + +#define NFC_NUM_ADDR_PHASE0_WIDTH 1 +#define NFC_NUM_ADDR_PHASE0_SHIFT 5 + +#define NFC_ONE_LESS_PHASE1 0 +#define NFC_TWO_LESS_PHASE1 1 + +#define NFC_FLASH_ADDR_SHIFT 0 +#else +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_FLASH_ADDR_SHIFT 16 +#endif + +#define NFC_UNLOCK_END_ADDR_SHIFT 16 + +/* Bit definition for NFC_CONFIGRATION_1 */ +#define NFC_SP_EN (1 << 0) +#define NFC_CE (1 << 1) +#define NFC_RST (1 << 2) +#define NFC_ECC_EN (1 << 3) + +#define NFC_FIELD_RESET(width, shift) (~((((1 << (width)) - 1) << (shift)))) + +#define NFC_RBA_SHIFT 4 + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define NFC_RBA_WIDTH 3 +#else +#define NFC_RBA_WIDTH 2 +#endif + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define NFC_ITERATION_SHIFT 8 +#define NFC_ITERATION_WIDTH 4 +#define NFC_ACTIVE_CS_SHIFT 12 +#define NFC_ACTIVE_CS_WIDTH 3 +/* bit definition for CONFIGRATION3 */ +#define NFC_NO_SDMA (1 << 20) +#define NFC_FMP_SHIFT 16 +#define NFC_FMP_WIDTH 4 +#define NFC_RBB_MODE (1 << 15) +#define NFC_NUM_OF_DEVICES_SHIFT 12 +#define NFC_NUM_OF_DEVICES_WIDTH 4 +#define NFC_DMA_MODE_SHIFT 11 +#define NFC_DMA_MODE_WIDTH 1 +#define NFC_SBB_SHIFT 8 +#define NFC_SBB_WIDTH 3 +#define NFC_BIG (1 << 7) +#define NFC_SB2R_SHIFT 4 +#define NFC_SB2R_WIDTH 3 +#define NFC_FW_SHIFT 3 +#define NFC_FW_WIDTH 1 +#define NFC_TOO (1 << 2) +#define NFC_ADD_OP_SHIFT 0 +#define NFC_ADD_OP_WIDTH 2 +#define NFC_FW_8 1 +#define NFC_FW_16 0 +#define NFC_ST_CMD_SHITF 24 +#define NFC_ST_CMD_WIDTH 8 +#endif + +#define NFC_PPB_32 (0 << 7) +#define NFC_PPB_64 (1 << 7) +#define NFC_PPB_128 (2 << 7) +#define NFC_PPB_256 (3 << 7) +#define NFC_PPB_RESET (~(3 << 7)) + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_BLS_LOCKED (0 << 6) +#define NFC_BLS_LOCKED_DEFAULT (1 << 6) +#define NFC_BLS_UNLCOKED (2 << 6) +#define NFC_BLS_RESET (~(3 << 6)) +#else +#define NFC_BLS_LOCKED (0 << 16) +#define NFC_BLS_LOCKED_DEFAULT (1 << 16) +#define NFC_BLS_UNLCOKED (2 << 16) +#define NFC_BLS_RESET (~(3 << 16)) +#endif + +#define NFC_WPC_LOCK_TIGHT 1 +#define NFC_WPC_LOCK (1 << 1) +#define NFC_WPC_UNLOCK (1 << 2) +#define NFC_WPC_RESET (~(7)) +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_ECC_MODE_4 (0x0 << 6) +#define NFC_ECC_MODE_8 (0x1 << 6) +#define NFC_ECC_MODE_16 (0x3 << 6) +#define NFC_SPAS_16 8 +#define NFC_SPAS_64 32 +#define NFC_SPAS_128 64 +#define NFC_SPAS_112 56 +#define NFC_SPAS_218 109 +#define NFC_IPC_CREQ (1 << 0) +#define NFC_IPC_ACK (1 << 1) +#endif + +#define REG_NFC_OPS_STAT NFC_IPC +#define REG_NFC_INTRRUPT NFC_CONFIG2 +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR0 +#define REG_NFC_FLASH_CMD NFC_FLASH_CMD +#else +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR_CMD +#define REG_NFC_FLASH_CMD NFC_FLASH_ADDR_CMD +#endif +#define REG_NFC_OPS LAUNCH_NFC +#define REG_NFC_SET_RBA NFC_CONFIG1 +#define REG_NFC_RB NFC_IPC +#define REG_NFC_ECC_EN NFC_CONFIG2 +#define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT +#define REG_NFC_CE NFC_CONFIG1 +#define REG_NFC_RST NFC_CONFIG1 +#define REG_NFC_PPB NFC_CONFIG2 +#define REG_NFC_SP_EN NFC_CONFIG1 +#define REG_NFC_BLS NFC_WRPROT +#define REG_UNLOCK_BLK_ADD0 NFC_WRPROT_UNLOCK_BLK_ADD0 +#define REG_UNLOCK_BLK_ADD1 NFC_WRPROT_UNLOCK_BLK_ADD1 +#define REG_UNLOCK_BLK_ADD2 NFC_WRPROT_UNLOCK_BLK_ADD2 +#define REG_UNLOCK_BLK_ADD3 NFC_WRPROT_UNLOCK_BLK_ADD3 +#define REG_NFC_WPC NFC_WRPROT +#define REG_NFC_ONE_CYCLE NFC_CONFIG2 + +/* NFC V3 Specific MACRO functions definitions */ +#define raw_write(v, a) __raw_writel(v, a) +#define raw_read(a) __raw_readl(a) + +/* Set RBA buffer id*/ +#define NFC_SET_RBA(val) \ + raw_write((raw_read(REG_NFC_SET_RBA) & \ + (NFC_FIELD_RESET(NFC_RBA_WIDTH, NFC_RBA_SHIFT))) | \ + ((val) << NFC_RBA_SHIFT), REG_NFC_SET_RBA); + +#define NFC_SET_PS(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_PS_WIDTH, NFC_PS_SHIFT))) | \ + ((val) << NFC_PS_SHIFT), NFC_CONFIG2); + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 +#define UNLOCK_ADDR(start_addr, end_addr) \ +{ \ + int i = 0; \ + for (; i < NAND_MAX_CHIPS; i++) \ + raw_write(start_addr | \ + (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), \ + REG_UNLOCK_BLK_ADD0 + (i << 2)); \ +} +#define NFC_SET_NFC_ACTIVE_CS(val) \ + raw_write((raw_read(NFC_CONFIG1) & \ + (NFC_FIELD_RESET(NFC_ACTIVE_CS_WIDTH, NFC_ACTIVE_CS_SHIFT))) | \ + ((val) << NFC_ACTIVE_CS_SHIFT), NFC_CONFIG1); + +#define NFC_GET_NFC_ACTIVE_CS() \ + ((raw_read(NFC_CONFIG1) >> NFC_ACTIVE_CS_SHIFT) & \ + ((1 << NFC_ACTIVE_CS_WIDTH) - 1)) + +#define NFC_GET_MAXCHIP_SP() 8 + +#else +#define UNLOCK_ADDR(start_addr, end_addr) \ + raw_write(start_addr | \ + (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), REG_UNLOCK_BLK_ADD0); + +#define NFC_SET_NFC_ACTIVE_CS(val) +#define NFC_GET_NFC_ACTIVE_CS() +#define NFC_GET_MAXCHIP_SP() 1 +#endif + +#define NFC_SET_BLS(val) ((raw_read(REG_NFC_BLS) & NFC_BLS_RESET) | val) +#define NFC_SET_WPC(val) ((raw_read(REG_NFC_WPC) & NFC_WPC_RESET) | val) +#define CHECK_NFC_RB (raw_read(REG_NFC_RB) & NFC_RB) + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_SET_NFC_NUM_ADDR_PHASE1(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE1_WIDTH, \ + NFC_NUM_ADDR_PHASE1_SHIFT))) | \ + ((val) << NFC_NUM_ADDR_PHASE1_SHIFT), NFC_CONFIG2); + +#define NFC_SET_NFC_NUM_ADDR_PHASE0(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE0_WIDTH, \ + NFC_NUM_ADDR_PHASE0_SHIFT))) | \ + ((val) << NFC_NUM_ADDR_PHASE0_SHIFT), NFC_CONFIG2); + +#define NFC_SET_NFC_ITERATION(val) \ + raw_write((raw_read(NFC_CONFIG1) & \ + (NFC_FIELD_RESET(NFC_ITERATION_WIDTH, NFC_ITERATION_SHIFT))) | \ + ((val) << NFC_ITERATION_SHIFT), NFC_CONFIG1); + +#define NFC_SET_FW(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_FW_WIDTH, NFC_FW_SHIFT))) | \ + ((val) << NFC_FW_SHIFT), NFC_CONFIG3); + +#define NFC_SET_NUM_OF_DEVICE(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_NUM_OF_DEVICES_WIDTH, \ + NFC_NUM_OF_DEVICES_SHIFT))) | \ + ((val) << NFC_NUM_OF_DEVICES_SHIFT), NFC_CONFIG3); + +#define NFC_SET_ADD_OP_MODE(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_ADD_OP_WIDTH, NFC_ADD_OP_SHIFT))) | \ + ((val) << NFC_ADD_OP_SHIFT), NFC_CONFIG3); + +#define NFC_SET_ADD_CS_MODE(val) \ +{ \ + NFC_SET_ADD_OP_MODE(val); \ + NFC_SET_NUM_OF_DEVICE(this->numchips - 1); \ +} + +#define NFC_SET_ST_CMD(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_ST_CMD_WIDTH, \ + NFC_ST_CMD_SHITF))) | \ + ((val) << NFC_ST_CMD_SHITF), NFC_CONFIG2); + +#define NFMS_NF_DWIDTH 0 +#define NFMS_NF_PG_SZ 1 +#define NFC_CMD_1_SHIFT 8 + +#define NUM_OF_ADDR_CYCLE (fls(g_page_mask) >> 3) +#define SET_NFC_DELAY_LINE(val) raw_write((val), NFC_DELAY_LINE) + +/*should set the fw,ps,spas,ppb*/ +#define NFC_SET_NFMS(v) \ +do { \ + if (!(v)) \ + NFC_SET_FW(NFC_FW_8); \ + if (((v) & (1 << NFMS_NF_DWIDTH))) \ + NFC_SET_FW(NFC_FW_16); \ + if (((v) & (1 << NFMS_NF_PG_SZ))) { \ + if (IS_2K_PAGE_NAND) { \ + NFC_SET_PS(NFC_PS_2K); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \ + } else if (IS_4K_PAGE_NAND) { \ + NFC_SET_PS(NFC_PS_4K); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \ + } else { \ + NFC_SET_PS(NFC_PS_512); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE - 1); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_ONE_LESS_PHASE1); \ + } \ + NFC_SET_ADD_CS_MODE(1); \ + NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1); \ + NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \ + NFC_SET_ST_CMD(0x70); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \ + if (cpu_is_mx51()) \ + SET_NFC_DELAY_LINE(0); \ + } \ +} while (0) +#endif + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1 +#define NFC_SET_NFMS(v) +#endif + +#define READ_PAGE() send_read_page(0) +#define PROG_PAGE() send_prog_page(0) + +#elif defined(CONFIG_ARCH_MXC_HAS_NFC_V2) + +/* + * For V1/V2 NFC registers Definition + */ + +/* + * Addresses for NFC registers + */ +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_REG_BASE (nfc_axi_base + 0x1000) +#else +#define NFC_REG_BASE nfc_axi_base +#endif +#define NFC_BUF_SIZE (NFC_REG_BASE + 0xE00) +#define NFC_BUF_ADDR (NFC_REG_BASE + 0xE04) +#define NFC_FLASH_ADDR (NFC_REG_BASE + 0xE06) +#define NFC_FLASH_CMD (NFC_REG_BASE + 0xE08) +#define NFC_CONFIG (NFC_REG_BASE + 0xE0A) +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_ECC_STATUS_RESULT (NFC_REG_BASE + 0xE0C) +#define NFC_ECC_STATUS_RESULT_1 (NFC_REG_BASE + 0xE0C) +#define NFC_ECC_STATUS_RESULT_2 (NFC_REG_BASE + 0xE0E) +#define NFC_SPAS (NFC_REG_BASE + 0xE10) +#else +#define NFC_ECC_STATUS_RESULT (NFC_REG_BASE + 0xE0C) +#define NFC_RSLTMAIN_AREA (NFC_REG_BASE + 0xE0E) +#define NFC_RSLTSPARE_AREA (NFC_REG_BASE + 0xE10) +#endif +#define NFC_WRPROT (NFC_REG_BASE + 0xE12) +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_UNLOCKSTART_BLKADDR (NFC_REG_BASE + 0xE20) +#define NFC_UNLOCKEND_BLKADDR (NFC_REG_BASE + 0xE22) +#define NFC_UNLOCKSTART_BLKADDR1 (NFC_REG_BASE + 0xE24) +#define NFC_UNLOCKEND_BLKADDR1 (NFC_REG_BASE + 0xE26) +#define NFC_UNLOCKSTART_BLKADDR2 (NFC_REG_BASE + 0xE28) +#define NFC_UNLOCKEND_BLKADDR2 (NFC_REG_BASE + 0xE2A) +#define NFC_UNLOCKSTART_BLKADDR3 (NFC_REG_BASE + 0xE2C) +#define NFC_UNLOCKEND_BLKADDR3 (NFC_REG_BASE + 0xE2E) +#else +#define NFC_UNLOCKSTART_BLKADDR (NFC_REG_BASE + 0xE14) +#define NFC_UNLOCKEND_BLKADDR (NFC_REG_BASE + 0xE16) +#endif +#define NFC_NF_WRPRST (NFC_REG_BASE + 0xE18) +#define NFC_CONFIG1 (NFC_REG_BASE + 0xE1A) +#define NFC_CONFIG2 (NFC_REG_BASE + 0xE1C) + +/*! + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 (u16 *)(nfc_axi_base + 0x000) +#define MAIN_AREA1 (u16 *)(nfc_axi_base + 0x200) + +/*! + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define SPARE_AREA0 (u16 *)(nfc_axi_base + 0x1000) +#define SPARE_LEN 64 +#define SPARE_COUNT 8 +#else +#define SPARE_AREA0 (u16 *)(nfc_axi_base + 0x800) +#define SPARE_LEN 16 +#define SPARE_COUNT 4 +#endif +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define REG_NFC_ECC_MODE NFC_CONFIG1 +#define SPAS_SHIFT (0) +#define REG_NFC_SPAS NFC_SPAS +#define SPAS_MASK (0xFF00) + +#define NFC_SET_SPAS(v) \ + raw_write(((raw_read(REG_NFC_SPAS) & SPAS_MASK) | ((v<> 1); \ + } \ +} while (0) +#else +#define NFC_SET_SPAS(v) +#define NFC_SET_ECC_MODE(v) +#define GET_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); +#define NFC_SET_NFMS(v) (NFMS |= (v)) +#endif + +#define WRITE_NFC_IP_REG(val, reg) \ + raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \ + REG_NFC_OPS_STAT) + +#define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); + +/*! + * Set INT to 0, Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for + * Specific operation + */ +#define NFC_CMD 0x1 +#define NFC_ADDR 0x2 +#define NFC_INPUT 0x4 +#define NFC_OUTPUT 0x8 +#define NFC_ID 0x10 +#define NFC_STATUS 0x20 + +/* Bit Definitions */ +#define NFC_OPS_STAT (1 << 15) +#define NFC_SP_EN (1 << 2) +#define NFC_ECC_EN (1 << 3) +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_RST (1 << 6) +#define NFC_CE (1 << 7) +#define NFC_ONE_CYCLE (1 << 8) +#define NFC_BLS_LOCKED 0 +#define NFC_BLS_LOCKED_DEFAULT 1 +#define NFC_BLS_UNLCOKED 2 +#define NFC_WPC_LOCK_TIGHT 1 +#define NFC_WPC_LOCK (1 << 1) +#define NFC_WPC_UNLOCK (1 << 2) +#define NFC_FLASH_ADDR_SHIFT 0 +#define NFC_UNLOCK_END_ADDR_SHIFT 0 + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_ECC_MODE_4 (1<<0) +#define NFC_ECC_MODE_8 (~(1<<0)) +#define NFC_SPAS_16 8 +#define NFC_SPAS_64 32 +#define NFC_SPAS_112 56 +#define NFC_SPAS_128 64 +#define NFC_SPAS_218 109 +#endif +/* NFC Register Mapping */ +#define REG_NFC_OPS_STAT NFC_CONFIG2 +#define REG_NFC_INTRRUPT NFC_CONFIG1 +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR +#define REG_NFC_FLASH_CMD NFC_FLASH_CMD +#define REG_NFC_OPS NFC_CONFIG2 +#define REG_NFC_SET_RBA NFC_BUF_ADDR +#define REG_NFC_ECC_EN NFC_CONFIG1 +#define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT +#define REG_NFC_CE NFC_CONFIG1 +#define REG_NFC_SP_EN NFC_CONFIG1 +#define REG_NFC_BLS NFC_CONFIG +#define REG_NFC_WPC NFC_WRPROT +#define REG_START_BLKADDR NFC_UNLOCKSTART_BLKADDR +#define REG_END_BLKADDR NFC_UNLOCKEND_BLKADDR +#define REG_NFC_RST NFC_CONFIG1 +#define REG_NFC_ONE_CYCLE NFC_CONFIG1 + +/* NFC V1/V2 Specific MACRO functions definitions */ + +#define raw_write(v, a) __raw_writew(v, a) +#define raw_read(a) __raw_readw(a) + +#define NFC_SET_BLS(val) val + +#define UNLOCK_ADDR(start_addr, end_addr) \ +{ \ + raw_write(start_addr, REG_START_BLKADDR); \ + raw_write(end_addr, REG_END_BLKADDR); \ +} + +#define NFC_SET_NFC_ACTIVE_CS(val) +#define NFC_GET_NFC_ACTIVE_CS() +#define NFC_GET_MAXCHIP_SP() 1 +#define NFC_SET_WPC(val) val + +#define NFC_SET_RBA(val) raw_write(val, REG_NFC_SET_RBA); + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define READ_PAGE() send_read_page(0) +#define PROG_PAGE() send_prog_page(0) +#else +#define READ_PAGE() \ +do { \ + send_read_page(0); \ + send_read_page(1); \ + send_read_page(2); \ + send_read_page(3); \ +} while (0) + +#define PROG_PAGE() \ +do { \ + send_prog_page(0); \ + send_prog_page(1); \ + send_prog_page(2); \ + send_prog_page(3); \ +} while (0) +#endif +#define CHECK_NFC_RB 1 + +#endif + +#endif /* __MXC_ND2_H__ */ diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 2e94c8e2f7a..db066082542 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -3040,7 +3040,10 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, mtd->erasesize = (64 * 1024) << (extid & 0x03); extid >>= 2; /* Get buswidth information */ - busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; + if(id_data[0] == NAND_MFR_MICRON) /* Micron is only 8-bit but reports 16-bit */ + busw = 0; + else + busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; } } else { /* diff --git a/drivers/mtd/nand/nand_device_info.c b/drivers/mtd/nand/nand_device_info.c new file mode 100644 index 00000000000..6a23810ebad --- /dev/null +++ b/drivers/mtd/nand/nand_device_info.c @@ -0,0 +1,2413 @@ +/* + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include + +#include "nand_device_info.h" + +/* + * Type 2 + */ +static struct nand_device_info nand_device_info_table_type_2[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND01GW3", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 25, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F1F08", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG0S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND02GW3", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 25, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UF082G2M, HY27UG082G2M, HY27UG082G1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F2G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F2G08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG1S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 10, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UH084G2M, HY27UG084G2M, HY27UH084G1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 25, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 25, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG2S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 25, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UH088G2M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND08GW3BxANx", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08FABWG", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x48, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + /* TODO: The actual oob size for MT29F16G08ABACA is + 224 bytes. Use oob 218 bytes since MX53 NFC controller + mentions the spare area size must be less or equal 218 + byte if ECC is enabled */ + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F16G08ABACA(2GB)", + }, + {true} +}; + +/* + * Large MLC + */ +static struct nand_device_info nand_device_info_table_large_mlc[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG1D4BFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG3D4xFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 20, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 15, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG4D4xFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 15, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG2D4BFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9G4G08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 25, + .address_setup_in_ns = 50, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UT084G2M, HY27UU088G5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 40, + .data_hold_in_ns = 20, + .address_setup_in_ns = 30, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND04GW3C2AN1E", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 15, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9G8G08U0M, K9HAG08U1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 60, + .data_hold_in_ns = 30, + .address_setup_in_ns = 50, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UV08AG5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "Intel JS29F08G08AAMiB1 and Micron MT29F8G08MAA; " + "Intel JS29F08G08CAMiB1 and Micron MT29F16G08QAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 15, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9LAG08U0M K9HBG08U1M K9GAG08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "Intel JS29F32G08FAMiB1 and Micron MT29F32G08TAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 20, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F08G08AAMiB2, JS29F08G08CAMiB2", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F32G08FAMiB2", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UW08CGFM", + }, + {true} +}; + +/* + * Type 7 + */ +static struct nand_device_info nand_device_info_table_type_7[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08FABWG", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08AAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 35, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9K8G08UXM, K9NBG08U5A, K9WAG08U1A", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9WAG08UXM", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F2G08U0A", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F1F08", + }, + {true} +}; + +/* + * Type 8 + */ +static struct nand_device_info nand_device_info_table_type_8[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9GAG08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9LBG08U0M (32Gb), K9HCG08U1M (64Gb), K9MDG08U5M (128Gb)", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 20, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 0, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "H27UAG, H27UBG", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 23, + .data_hold_in_ns = 20, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 0, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "H27UCG", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "H27U8G8T2B", + }, + {true} +}; + +/* + * Type 9 + */ +static struct nand_device_info nand_device_info_table_type_9[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG3D1DTG00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG4D1DTG00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG6D1DTG20", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F16G08AAMC1, JS29F32G08CAMC1", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F16G08MAA, MT29F32G08QAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F64G08TAA (32Gb), MT29F32G08CBAAA (32Gb) MT29F64G08CFAAA (64Gb)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd9, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F128G08CJAAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JSF64G08FAMC1", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "K9LBG08U0D", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9GAG08U0D, K9LBG08U1D, K9HCG08U5D", + }, + {true} +}; + +/* + * Type 10 + */ +static struct nand_device_info nand_device_info_table_type_10[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 30, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9NCG08U5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + {true} +}; + +/* + * Type 11 + */ +static struct nand_device_info nand_device_info_table_type_11[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 376, + .ecc_strength_in_bits = 14, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 8, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 25, + "TC58NVG5D2ELAM8 (4GB), TH58NVG6D2ELAM8 (8GB)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xde, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 376, + .ecc_strength_in_bits = 14, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 8, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 25, + "TH58NVG7D2ELAM8", + }, + {true} +}; + +/* + * Type 15 + */ +static struct nand_device_info nand_device_info_table_type_15[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 436, + .ecc_strength_in_bits = 16, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 25, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "K9GBG08U0M (4GB, 1CE); K9LCG08U1M (8GB, 2CE); K9HDG08U5M (16GB, 4CE)", + }, + {true} +}; + +static struct nand_device_info nand_device_info_table_type_16[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .is_ddr_ok = true, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 512, + .ecc_strength_in_bits = 24, + .ecc_size_in_bytes = 1024, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 25, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "K9LCGD88X1M(8GB, 1CE); K9HDGD8X5M(8GB, 2CE); K9PFGD8X7M(16GB, 4CE)", + }, + {true} +}; +/* + * BCH ECC12 + */ +static struct nand_device_info nand_device_info_table_bch_ecc12[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "H27UAG8T2ATR (2GB, 1CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "H27UBG8T2M (4GB, 1CE), H27UCG8UDM (8GB, 2CE), H27UDG8VEM (16GB, 4CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xde, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "H27UEG8YEM (32GB, 4CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 16, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F32G08CBAAA (4GB, 1CE), MT29F64G08CFAAA (8GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd9, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 16, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F128G08CJAAA (16GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x48, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F16G08CBABA (2GB, 1CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x68, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F32G08CBABA (4GB, 1CE); " + "MT29F64G08CEABA (8GB, 2CE); " + "MT29F64G08CFABA (8GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x88, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F128G08CJABA (16GB, 2CE); " + "MT29F128G08CKABA (16GB, 2CE); " + "MT29F256G08CUABA (32GB, 4CE)", + }, + {true} +}; + +/* + * BCH ECC24 + */ +static struct nand_device_info nand_device_info_table_bch_ecc24[] __initdata = { + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x88, + .is_ddr_ok = true, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL * SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 8 * SZ_1K + 448, + .ecc_strength_in_bits = 24, + .ecc_size_in_bytes = 1024, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F64G08CBAAA(8GB, 2CE) ", + }, + {true} +}; + +/* + * The following macros make it convenient to extract information from an ID + * byte array. All these macros begin with the prefix "ID_". + * + * Macros of the form: + * + * ID_GET_[_[_]] + * + * extract the given field from an ID byte array. Macros of the form: + * + * ID_[_[_]]_ + * + * contain the value for the given field that has the given meaning. + * + * If the appears, it means this macro represents a view of this + * field that is specific to the given manufacturer. + * + * If the appears, it means this macro represents a view of this + * field that the given manufacturer applies only under specific conditions. + * + * Here is a simple example: + * + * ID_PAGE_SIZE_CODE_2K + * + * This macro has the value of the "Page Size" field that indicates the page + * size is 2K. + * + * A more complicated example: + * + * ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K (0x2) + * + * This macro has the value of the "Page Size" field for Samsung parts that + * indicates the page size is 8K. However, this interpretation is only correct + * for devices that return 6 ID bytes. + */ + +/* Byte 1 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_1(id) ((id)[0]) + +#define ID_GET_MFR_CODE(id) ID_GET_BYTE_1(id) + +/* Byte 2 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_2(id) ((id)[1]) + +#define ID_GET_DEVICE_CODE(id) ID_GET_BYTE_2(id) + #define ID_SAMSUNG_DEVICE_CODE_1_GBIT (0xf1) + #define ID_SAMSUNG_DEVICE_CODE_2_GBIT (0xda) + #define ID_HYNIX_DEVICE_CODE_ECC12 (0xd7) + #define ID_HYNIX_DEVICE_CODE_ECC12_ODD (0xd5) + #define ID_HYNIX_DEVICE_CODE_ECC12_LARGE (0xde) + #define ID_MICRON_DEVICE_CODE_ECC12 (0xd7) /* ECC12 */ + #define ID_MICRON_DEVICE_CODE_ECC12_LARGE (0xd9) /* ECC12 8GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_2GB_PER_CE (0x48) /* L63B 2GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_4GB_PER_CE (0x68) /* L63B 4GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_8GB_PER_CE (0x88) /* L63B 8GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC24_8GB_PER_CE (0x88) /* L63B 8GB/CE */ + +/* Byte 3 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_3(id) ((id)[2]) + +#define ID_GET_DIE_COUNT_CODE(id) ((ID_GET_BYTE_3(id) >> 0) & 0x3) + +#define ID_GET_CELL_TYPE_CODE(id) ((ID_GET_BYTE_3(id) >> 2) & 0x3) + #define ID_CELL_TYPE_CODE_SLC (0x0) /* All others => MLC. */ + +#define ID_GET_SAMSUNG_SIMUL_PROG(id) ((ID_GET_BYTE_3(id) >> 4) & 0x3) + +#define ID_GET_MICRON_SIMUL_PROG(id) ((ID_GET_BYTE_3(id) >> 4) & 0x3) + +#define ID_GET_CACHE_PROGRAM(id) ((ID_GET_BYTE_3(id) >> 7) & 0x1) + +#define ID_ONFI_NAND_BYTE3 (0x04) +/* Byte 4 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_4(id) ((id)[3]) + #define ID_HYNIX_BYTE_4_ECC12_DEVICE (0x25) + +#define ID_GET_PAGE_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 0) & 0x3) + #define ID_PAGE_SIZE_CODE_1K (0x0) + #define ID_PAGE_SIZE_CODE_2K (0x1) + #define ID_PAGE_SIZE_CODE_4K (0x2) + #define ID_PAGE_SIZE_CODE_8K (0x3) + #define ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K (0x2) + +#define ID_GET_OOB_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 2) & 0x1) + +#define ID_GET_BLOCK_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 4) & 0x3) + +/* Byte 5 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_5(id) ((id)[4]) + #define ID_MICRON_BYTE_5_ECC12 (0x84) + +#define ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) ((ID_GET_BYTE_5(id) >> 4) & 0x7) + #define ID_SAMSUNG_ECC_LEVEL_CODE_8 (0x03) + #define ID_SAMSUNG_ECC_LEVEL_CODE_24 (0x05) + +#define ID_GET_PLANE_COUNT_CODE(id) ((ID_GET_BYTE_5(id) >> 2) & 0x3) + +/* Byte 6 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_6(id) ((id)[5]) + #define ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_8K (0x54) + #define ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_4K (0x13) + +#define ID_GET_SAMSUNG_DEVICE_VERSION_CODE(id) ((ID_GET_BYTE_6(id)>>0) & 0x7) + #define ID_SAMSUNG_DEVICE_VERSION_CODE_40NM (0x01) + +#define ID_GET_TOGGLE_NAND(id) ((ID_GET_BYTE_6(id) >> 7) & 0x1) + +/* -------------------------------------------------------------------------- */ + +void nand_device_print_info(struct nand_device_info *info) +{ + unsigned i; + const char *mfr_name; + const char *cell_technology_name; + uint64_t chip_size; + const char *chip_size_units; + unsigned page_data_size_in_bytes; + unsigned page_oob_size_in_bytes; + + /* Check for nonsense. */ + + if (!info) + return; + + /* Prepare the manufacturer name. */ + + mfr_name = "Unknown"; + + for (i = 0; nand_manuf_ids[i].id; i++) { + if (nand_manuf_ids[i].id == info->manufacturer_code) { + mfr_name = nand_manuf_ids[i].name; + break; + } + } + + /* Prepare the name of the cell technology. */ + + switch (info->cell_technology) { + case NAND_DEVICE_CELL_TECH_SLC: + cell_technology_name = "SLC"; + break; + case NAND_DEVICE_CELL_TECH_MLC: + cell_technology_name = "MLC"; + break; + default: + cell_technology_name = "Unknown"; + break; + } + + /* Prepare the chip size. */ + + if ((info->chip_size_in_bytes >= SZ_1G) && + !(info->chip_size_in_bytes % SZ_1G)) { + chip_size = info->chip_size_in_bytes / ((uint64_t) SZ_1G); + chip_size_units = "GiB"; + } else if ((info->chip_size_in_bytes >= SZ_1M) && + !(info->chip_size_in_bytes % SZ_1M)) { + chip_size = info->chip_size_in_bytes / ((uint64_t) SZ_1M); + chip_size_units = "MiB"; + } else { + chip_size = info->chip_size_in_bytes; + chip_size_units = "B"; + } + + /* Prepare the page geometry. */ + + page_data_size_in_bytes = (1<<(fls(info->page_total_size_in_bytes)-1)); + page_oob_size_in_bytes = info->page_total_size_in_bytes - + page_data_size_in_bytes; + + /* Print the information. */ + + printk(KERN_INFO "Manufacturer : %s (0x%02x)\n", mfr_name, + info->manufacturer_code); + printk(KERN_INFO "Device Code : 0x%02x\n", info->device_code); + printk(KERN_INFO "Cell Technology : %s\n", cell_technology_name); + printk(KERN_INFO "Chip Size : %llu %s\n", chip_size, + chip_size_units); + printk(KERN_INFO "Pages per Block : %u\n", + info->block_size_in_pages); + printk(KERN_INFO "Page Geometry : %u+%u\n", page_data_size_in_bytes, + page_oob_size_in_bytes); + printk(KERN_INFO "ECC Strength : %u bits\n", + info->ecc_strength_in_bits); + printk(KERN_INFO "ECC Size : %u B\n", info->ecc_size_in_bytes); + printk(KERN_INFO "Data Setup Time : %u ns\n", info->data_setup_in_ns); + printk(KERN_INFO "Data Hold Time : %u ns\n", info->data_hold_in_ns); + printk(KERN_INFO "Address Setup Time: %u ns\n", + info->address_setup_in_ns); + printk(KERN_INFO "GPMI Sample Delay : %u ns\n", + info->gpmi_sample_delay_in_ns); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tREA : %u ns\n", + info->tREA_in_ns); + else + printk(KERN_INFO "tREA : Unknown\n"); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tRLOH : %u ns\n", + info->tRLOH_in_ns); + else + printk(KERN_INFO "tRLOH : Unknown\n"); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tRHOH : %u ns\n", + info->tRHOH_in_ns); + else + printk(KERN_INFO "tRHOH : Unknown\n"); + if (info->description) + printk(KERN_INFO "Description : %s\n", info->description); + else + printk(KERN_INFO "Description : \n"); + +} + +static struct nand_device_info *nand_device_info_search( + struct nand_device_info *table, uint8_t mfr_code, uint8_t device_code) +{ + + for (; !table->end_of_table; table++) { + if (table->manufacturer_code != mfr_code) + continue; + if (table->device_code != device_code) + continue; + return table; + } + + return 0; + +} + +static struct nand_device_info * __init nand_device_info_fn_toshiba(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + /* + * Look for 8K page Toshiba MLC devices. + * + * The page size field in byte 4 can't be used because the field was + * redefined in the 8K parts so the value meaning "8K page" is the same + * as the value meaning "4K page" on the 4K page devices. + * + * The only identifiable difference between the 4K and 8K page Toshiba + * devices with a device code of 0xd7 is the undocumented 6th ID byte. + * The 4K device returns a value of 0x13 and the 8K a value of 0x54. + * Toshiba has verified that this is an acceptable method to distinguish + * the two device families. + */ + + if (ID_GET_BYTE_6(id) == ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_8K) { + /* Type 11 */ + table = nand_device_info_table_type_11; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_samsung(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an MLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) != ID_CELL_TYPE_CODE_SLC) { + + /* Is this a Samsung 8K Page MLC device with 16 bit ECC? */ + if ((ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) == + ID_SAMSUNG_ECC_LEVEL_CODE_24) && + (ID_GET_PAGE_SIZE_CODE(id) == + ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K)) { + if (ID_GET_TOGGLE_NAND(id)) + table = nand_device_info_table_type_16; + else + /* Type 15 */ + table = nand_device_info_table_type_15; + } + /* Is this a Samsung 42nm ECC8 device with a 6 byte ID? */ + else if ((ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) == + ID_SAMSUNG_ECC_LEVEL_CODE_8) && + (ID_GET_SAMSUNG_DEVICE_VERSION_CODE(id) == + ID_SAMSUNG_DEVICE_VERSION_CODE_40NM)) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 8 */ + table = nand_device_info_table_type_8; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + } else { + + /* Check the page size first. */ + if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 10 */ + table = nand_device_info_table_type_10; + } + /* Check the chip size. */ + else if (ID_GET_DEVICE_CODE(id) == + ID_SAMSUNG_DEVICE_CODE_1_GBIT) { + if (!ID_GET_CACHE_PROGRAM(id)) { + /* + * 128 MiB Samsung chips without cache program + * are Type 7. + * + * The K9F1G08U0B does not support multi-plane + * program, so the if statement below cannot be + * used to identify it. + */ + table = nand_device_info_table_type_7; + + } else { + /* Smaller sizes are Type 2 by default. */ + table = nand_device_info_table_type_2; + } + } else { + /* Check number of simultaneously programmed pages. */ + if (ID_GET_SAMSUNG_SIMUL_PROG(id) && + ID_GET_PLANE_COUNT_CODE(id)) { + /* Type 7 */ + table = nand_device_info_table_type_7; + } else { + /* Type 2 */ + table = nand_device_info_table_type_2; + } + + } + + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_stmicro(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) + /* Type 2 */ + table = nand_device_info_table_type_2; + else + /* Large MLC */ + table = nand_device_info_table_large_mlc; + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_hynix(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + /* + * Check for ECC12 devices. + * + * We look at the 4th ID byte to distinguish some Hynix ECC12 devices + * from the similar ECC8 part. For example H27UBG8T2M (ECC12) 4th byte + * is 0x25, whereas H27UDG8WFM (ECC8) 4th byte is 0xB6. + */ + + if ((((ID_GET_DEVICE_CODE(id) == ID_HYNIX_DEVICE_CODE_ECC12) || + (ID_GET_DEVICE_CODE(id) == ID_HYNIX_DEVICE_CODE_ECC12_ODD)) && + ID_GET_BYTE_4(id) == ID_HYNIX_BYTE_4_ECC12_DEVICE) || + (ID_GET_DEVICE_CODE(id) == ID_HYNIX_DEVICE_CODE_ECC12_LARGE)) { + /* BCH ECC 12 */ + table = nand_device_info_table_bch_ecc12; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* + * So far, all other Samsung and Hynix 4K page devices are + * Type 8. + */ + table = nand_device_info_table_type_8; + } else + /* Large MLC */ + table = nand_device_info_table_large_mlc; + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_micron(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + + /* Check number of simultaneously programmed pages. */ + + if (ID_GET_MICRON_SIMUL_PROG(id)) { + /* Type 7 */ + table = nand_device_info_table_type_7; + } else { + /* Zero simultaneously programmed pages means Type 2. */ + table = nand_device_info_table_type_2; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + + } + + if (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC24_8GB_PER_CE + && ID_GET_BYTE_3(id) == ID_ONFI_NAND_BYTE3) { + /* BCH ECC 24 */ + table = nand_device_info_table_bch_ecc24; + } else + /* + * We look at the 5th ID byte to distinguish some Micron ECC12 NANDs + * from the similar ECC8 part. + * + * For example MT29F64G08CFAAA (ECC12) 5th byte is 0x84, whereas + * MT29F64G08TAA (ECC8) 5th byte is 0x78. + * + * We also have a special case for the Micron L63B family + * (256 page/block), which has unique device codes but no ID fields that + * can easily be used to distinguish the family. + */ + + if ((ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12 && + ID_GET_BYTE_5(id) == ID_MICRON_BYTE_5_ECC12) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_LARGE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_2GB_PER_CE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_4GB_PER_CE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_8GB_PER_CE)) { + /* BCH ECC 12 */ + table = nand_device_info_table_bch_ecc12; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Toshiba devices with 4K pages are Type 9. */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_sandisk(const uint8_t id[]) +{ + struct nand_device_info *table; + + if (ID_GET_CELL_TYPE_CODE(id) != ID_CELL_TYPE_CODE_SLC) { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } else { + /* Type 2 */ + table = nand_device_info_table_type_2; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_intel(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +/** + * struct nand_device_type_info - Information about a NAND Flash type. + * + * @name: A human-readable name for this type. + * @table: The device info table for this type. + */ + +struct nand_device_type_info { + struct nand_device_info *table; + const char *name; +}; + +/* + * A table that maps manufacturer IDs to device information tables. + */ + +static struct nand_device_type_info nand_device_type_directory[] __initdata = { + {nand_device_info_table_type_2, "Type 2" }, + {nand_device_info_table_large_mlc, "Large MLC"}, + {nand_device_info_table_type_7, "Type 7" }, + {nand_device_info_table_type_8, "Type 8" }, + {nand_device_info_table_type_9, "Type 9" }, + {nand_device_info_table_type_10, "Type 10" }, + {nand_device_info_table_type_11, "Type 11" }, + {nand_device_info_table_type_15, "Type 15" }, + {nand_device_info_table_type_16, "Type 16" }, + {nand_device_info_table_bch_ecc12, "BCH ECC12"}, + {nand_device_info_table_bch_ecc24, "BCH ECC24"}, + {0, 0}, +}; + +/** + * struct nand_device_mfr_info - Information about a NAND Flash manufacturer. + * + * @id: The value of the first NAND Flash ID byte, which identifies the + * manufacturer. + * @fn: A pointer to a function to use for identifying devices from the + * given manufacturer. + */ + +struct nand_device_mfr_info { + uint8_t id; + struct nand_device_info *(*fn)(const uint8_t id[]); +}; + +/* + * A table that maps manufacturer IDs to device information tables. + */ + +static struct nand_device_mfr_info nand_device_mfr_directory[] __initdata = { + { + .id = NAND_MFR_TOSHIBA, + .fn = nand_device_info_fn_toshiba, + }, + { + .id = NAND_MFR_SAMSUNG, + .fn = nand_device_info_fn_samsung, + }, + { + .id = NAND_MFR_FUJITSU, + .fn = 0, + }, + { + .id = NAND_MFR_NATIONAL, + .fn = 0, + }, + { + .id = NAND_MFR_RENESAS, + .fn = 0, + }, + { + .id = NAND_MFR_STMICRO, + .fn = nand_device_info_fn_stmicro, + }, + { + .id = NAND_MFR_HYNIX, + .fn = nand_device_info_fn_hynix, + }, + { + .id = NAND_MFR_MICRON, + .fn = nand_device_info_fn_micron, + }, + { + .id = NAND_MFR_AMD, + .fn = 0, + }, + { + .id = NAND_MFR_SANDISK, + .fn = nand_device_info_fn_sandisk, + }, + { + .id = NAND_MFR_INTEL, + .fn = nand_device_info_fn_intel, + }, + {0, 0} +}; + +/** + * nand_device_info_test_table - Validate a device info table. + * + * This function runs tests on the given device info table to check that it + * meets the current assumptions. + */ + +static void __init nand_device_info_test_table( + struct nand_device_info *table, const char *name) +{ + unsigned i; + unsigned j; + uint8_t mfr_code; + uint8_t device_code; + + /* Loop over entries in this table. */ + + for (i = 0; !table[i].end_of_table; i++) { + + /* Get discriminating attributes of the current device. */ + + mfr_code = table[i].manufacturer_code; + device_code = table[i].device_code; + + /* Compare with the remaining devices in this table. */ + + for (j = i + 1; !table[j].end_of_table; j++) { + if ((mfr_code == table[j].manufacturer_code) && + (device_code == table[j].device_code)) + goto error; + } + + } + + return; + +error: + + printk(KERN_EMERG + "\n== NAND Flash device info table failed validity check ==\n"); + + printk(KERN_EMERG "\nDevice Info Table: %s\n", name); + printk(KERN_EMERG "\nTable Index %u\n", i); + nand_device_print_info(table + i); + printk(KERN_EMERG "\nTable Index %u\n", j); + nand_device_print_info(table + j); + printk(KERN_EMERG "\n"); + + BUG(); + +} + +/** + * nand_device_info_test_data - Test the NAND Flash device data. + */ + +static void __init nand_device_info_test_data(void) +{ + + unsigned i; + + for (i = 0; nand_device_type_directory[i].name; i++) { + nand_device_info_test_table( + nand_device_type_directory[i].table, + nand_device_type_directory[i].name); + } + +} + +struct nand_device_info * __init nand_device_get_info(const uint8_t id[]) +{ + unsigned i; + uint8_t mfr_id = ID_GET_MFR_CODE(id); + struct nand_device_info *(*fn)(const uint8_t id[]) = 0; + + /* Test the data. */ + + nand_device_info_test_data(); + + /* Look for information about this manufacturer. */ + + for (i = 0; nand_device_mfr_directory[i].id; i++) { + if (nand_device_mfr_directory[i].id == mfr_id) { + fn = nand_device_mfr_directory[i].fn; + break; + } + } + + if (!fn) + return 0; + + /* + * If control arrives here, we found both a table of device information, + * and a function we can use to identify the current device. Attempt to + * identify the device and return the result. + */ + + return fn(id); + +} diff --git a/drivers/mtd/nand/nand_device_info.h b/drivers/mtd/nand/nand_device_info.h new file mode 100644 index 00000000000..f74c975b2fb --- /dev/null +++ b/drivers/mtd/nand/nand_device_info.h @@ -0,0 +1,152 @@ +/* + * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __DRIVERS_NAND_DEVICE_INFO_H +#define __DRIVERS_NAND_DEVICE_INFO_H + + /* + * The number of ID bytes to read from the NAND Flash device and hand over to + * the identification system. + */ + +#define NAND_DEVICE_ID_BYTE_COUNT (6) + + /* + * The number of ID bytes to read from the NAND Flash device and hand over to + * the identification system. + */ + +enum nand_device_cell_technology { + NAND_DEVICE_CELL_TECH_SLC = 0, + NAND_DEVICE_CELL_TECH_MLC = 1, +}; + +/** + * struct nand_device_info - Information about a single NAND Flash device. + * + * This structure contains all the *essential* information about a NAND Flash + * device, derived from the device's data sheet. For each manufacturer, we have + * an array of these structures. + * + * @end_of_table: If true, marks the end of a table of device + * information. + * @manufacturer_code: The manufacturer code (1st ID byte) reported by + * the device. + * @device_code: The device code (2nd ID byte) reported by the + * device. + * @is_ddr_ok: Is this nand an ONFI nand or TOGGLE nand ? + * @cell_technology: The storage cell technology. + * @chip_size_in_bytes: The total size of the storage behind a single + * chip select, in bytes. Notice that this is *not* + * necessarily the total size of the storage in a + * *package*, which may contain several chips. + * @block_size_in_pages: The number of pages in a block. + * @page_total_size_in_bytes: The total size of a page, in bytes, including + * both the data and the OOB. + * @ecc_strength_in_bits: The strength of the ECC called for by the + * manufacturer, in number of correctable bits. + * @ecc_size_in_bytes: The size of the data block over which the + * manufacturer calls for the given ECC algorithm + * and strength. + * @data_setup_in_ns: The data setup time, in nanoseconds. Usually the + * maximum of tDS and tWP. A negative value + * indicates this characteristic isn't known. + * @data_hold_in_ns: The data hold time, in nanoseconds. Usually the + * maximum of tDH, tWH and tREH. A negative value + * indicates this characteristic isn't known. + * @address_setup_in_ns: The address setup time, in nanoseconds. Usually + * the maximum of tCLS, tCS and tALS. A negative + * value indicates this characteristic isn't known. + * @gpmi_sample_delay_in_ns: A GPMI-specific timing parameter. A negative + * value indicates this characteristic isn't known. + * @tREA_in_ns: tREA, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRLOH_in_ns: tRLOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRHOH_in_ns: tRHOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + */ + +struct nand_device_info { + + /* End of table marker */ + + bool end_of_table; + + /* Manufacturer and Device codes */ + + uint8_t manufacturer_code; + uint8_t device_code; + + /* Does the nand support DDR? (ONFI or TOGGLE) */ + bool is_ddr_ok; + + /* Technology */ + + enum nand_device_cell_technology cell_technology; + + /* Geometry */ + + uint64_t chip_size_in_bytes; + uint32_t block_size_in_pages; + uint16_t page_total_size_in_bytes; + + /* ECC */ + + uint8_t ecc_strength_in_bits; + uint16_t ecc_size_in_bytes; + + /* Timing */ + + int8_t data_setup_in_ns; + int8_t data_hold_in_ns; + int8_t address_setup_in_ns; + int8_t gpmi_sample_delay_in_ns; + int8_t tREA_in_ns; + int8_t tRLOH_in_ns; + int8_t tRHOH_in_ns; + + /* Description */ + + const char *description; + +}; + +/** + * nand_device_get_info - Get info about a device based on ID bytes. + * + * @id_bytes: An array of NAND_DEVICE_ID_BYTE_COUNT ID bytes retrieved from the + * NAND Flash device. + */ + +struct nand_device_info *nand_device_get_info(const uint8_t id_bytes[]); + +/** + * nand_device_print_info - Prints information about a NAND Flash device. + * + * @info A pointer to a NAND Flash device information structure. + */ + +void nand_device_print_info(struct nand_device_info *info); + +/* + * Check the NAND whether it supports the DDR mode. + * Only the ONFI nand and TOGGLE nand support the DDR now. + */ +static inline bool is_ddr_nand(struct nand_device_info *info) +{ + return info->is_ddr_ok; +} +#endif diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 251cb84b4d5..bb46a9b3a21 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -159,6 +159,8 @@ struct nand_flash_dev nand_flash_ids[] = { NAND_IS_AND | NAND_NO_AUTOINCR |NAND_NO_READRDY | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH }, + + {"NAND 4GiB 3,3V 8-bit", 0x68, 0, 4096, 0, LP_OPTIONS}, {NULL,} }; diff --git a/drivers/mxc/amd-gpu/Kconfig b/drivers/mxc/amd-gpu/Kconfig index 629d8cbbc98..1cbc89cac2a 100644 --- a/drivers/mxc/amd-gpu/Kconfig +++ b/drivers/mxc/amd-gpu/Kconfig @@ -10,4 +10,10 @@ config MXC_AMD_GPU ---help--- Say Y to get the GPU driver support. +config MXC_AMD_GPU_LOGGING + bool "Enable Logging" + depends on MXC_AMD_GPU + ---help--- + Enable logging to kernel messages for GPU kernel module + endmenu diff --git a/drivers/mxc/amd-gpu/Makefile b/drivers/mxc/amd-gpu/Makefile index 84cf02e5b3a..981d2599a93 100644 --- a/drivers/mxc/amd-gpu/Makefile +++ b/drivers/mxc/amd-gpu/Makefile @@ -1,31 +1,28 @@ EXTRA_CFLAGS := \ - -D_LINUX \ -I$(obj)/include \ - -I$(obj)/include/api \ - -I$(obj)/include/ucode \ - -I$(obj)/platform/hal/linux \ - -I$(obj)/os/include \ - -I$(obj)/os/kernel/include \ - -I$(obj)/os/user/include + -I$(obj)/include/api obj-$(CONFIG_MXC_AMD_GPU) += gpu.o -gpu-objs += common/gsl_cmdstream.o \ - common/gsl_cmdwindow.o \ - common/gsl_context.o \ - common/gsl_debug_pm4.o \ - common/gsl_device.o \ - common/gsl_drawctxt.o \ - common/gsl_driver.o \ - common/gsl_g12.o \ - common/gsl_intrmgr.o \ - common/gsl_memmgr.o \ - common/gsl_mmu.o \ - common/gsl_ringbuffer.o \ - common/gsl_sharedmem.o \ - common/gsl_yamato.o \ - platform/hal/linux/gsl_linux_map.o \ - platform/hal/linux/gsl_kmod.o \ - platform/hal/linux/gsl_hal.o \ - platform/hal/linux/gsl_kmod_cleanup.o \ - platform/hal/linux/misc.o \ - os/kernel/src/linux/kos_lib.o +gpu-objs += gsl_cmdstream.o \ + gsl_cmdwindow.o \ + gsl_context.o \ + gsl_device.o \ + gsl_drawctxt.o \ + gsl_driver.o \ + gsl_g12.o \ + gsl_intrmgr.o \ + gsl_memmgr.o \ + gsl_mmu.o \ + gsl_ringbuffer.o \ + gsl_sharedmem.o \ + gsl_yamato.o \ + gsl_linux_map.o \ + gsl_kmod.o \ + gsl_hal.o \ + gsl_kmod_cleanup.o \ + misc.o + +ifdef CONFIG_MXC_AMD_GPU_LOGGING +gpu-objs += gsl_log.o +EXTRA_CFLAGS += -DGSL_LOG +endif diff --git a/drivers/mxc/amd-gpu/common/gsl_cmdstream.c b/drivers/mxc/amd-gpu/gsl_cmdstream.c similarity index 74% rename from drivers/mxc/amd-gpu/common/gsl_cmdstream.c rename to drivers/mxc/amd-gpu/gsl_cmdstream.c index 4f0d107f2f6..8ab90950c09 100644 --- a/drivers/mxc/amd-gpu/common/gsl_cmdstream.c +++ b/drivers/mxc/amd-gpu/gsl_cmdstream.c @@ -16,57 +16,33 @@ * */ +#include +#include + #include "gsl.h" #include "gsl_hal.h" #include "gsl_cmdstream.h" -#ifdef GSL_LOCKING_FINEGRAIN -#define GSL_CMDSTREAM_MUTEX_CREATE() device->cmdstream_mutex = kos_mutex_create("gsl_cmdstream"); \ - if (!device->cmdstream_mutex) return (GSL_FAILURE); -#define GSL_CMDSTREAM_MUTEX_LOCK() kos_mutex_lock(device->cmdstream_mutex) -#define GSL_CMDSTREAM_MUTEX_UNLOCK() kos_mutex_unlock(device->cmdstream_mutex) -#define GSL_CMDSTREAM_MUTEX_FREE() kos_mutex_free(device->cmdstream_mutex); device->cmdstream_mutex = 0; -#else -#define GSL_CMDSTREAM_MUTEX_CREATE() -#define GSL_CMDSTREAM_MUTEX_LOCK() -#define GSL_CMDSTREAM_MUTEX_UNLOCK() -#define GSL_CMDSTREAM_MUTEX_FREE() -#endif - - -////////////////////////////////////////////////////////////////////////////// // functions -////////////////////////////////////////////////////////////////////////////// -int -kgsl_cmdstream_init(gsl_device_t *device) +int kgsl_cmdstream_init(gsl_device_t *device) { - GSL_CMDSTREAM_MUTEX_CREATE(); - - return GSL_SUCCESS; + return GSL_SUCCESS; } -//---------------------------------------------------------------------------- - -int -kgsl_cmdstream_close(gsl_device_t *device) +int kgsl_cmdstream_close(gsl_device_t *device) { - GSL_CMDSTREAM_MUTEX_FREE(); - - return GSL_SUCCESS; + return GSL_SUCCESS; } -//---------------------------------------------------------------------------- - -gsl_timestamp_t -kgsl_cmdstream_readtimestamp0(gsl_deviceid_t device_id, gsl_timestamp_type_t type) +gsl_timestamp_t kgsl_cmdstream_readtimestamp0(gsl_deviceid_t device_id, gsl_timestamp_type_t type) { gsl_timestamp_t timestamp = -1; gsl_device_t* device = &gsl_driver.device[device_id-1]; kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, - "--> gsl_timestamp_t kgsl_cmdstream_readtimestamp(gsl_deviceid_t device_id=%d gsl_timestamp_type_t type=%d)\n", device_id, type ); + "--> gsl_timestamp_t kgsl_cmdstream_readtimestamp(gsl_deviceid_t device_id=%D gsl_timestamp_type_t type=%d)\n", device_id, type ); #if (defined(GSL_BLD_G12) && defined(IRQTHREAD_POLL)) - kos_event_signal(device->irqthread_event); + complete_all(&device->irqthread_event); #endif if (type == GSL_TIMESTAMP_CONSUMED) { @@ -84,54 +60,63 @@ kgsl_cmdstream_readtimestamp0(gsl_deviceid_t device_id, gsl_timestamp_type_t typ //---------------------------------------------------------------------------- -KGSL_API gsl_timestamp_t +gsl_timestamp_t kgsl_cmdstream_readtimestamp(gsl_deviceid_t device_id, gsl_timestamp_type_t type) { gsl_timestamp_t timestamp = -1; - GSL_API_MUTEX_LOCK(); + + mutex_lock(&gsl_driver.lock); + timestamp = kgsl_cmdstream_readtimestamp0(device_id, type); - GSL_API_MUTEX_UNLOCK(); + + mutex_unlock(&gsl_driver.lock); + return timestamp; } //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_cmdstream_issueibcmds(gsl_deviceid_t device_id, int drawctxt_index, gpuaddr_t ibaddr, int sizedwords, gsl_timestamp_t *timestamp, unsigned int flags) { gsl_device_t* device = &gsl_driver.device[device_id-1]; int status = GSL_FAILURE; - GSL_API_MUTEX_LOCK(); - + + mutex_lock(&gsl_driver.lock); + kgsl_device_active(device); - + if (device->ftbl.cmdstream_issueibcmds) { status = device->ftbl.cmdstream_issueibcmds(device, drawctxt_index, ibaddr, sizedwords, timestamp, flags); } - GSL_API_MUTEX_UNLOCK(); + + mutex_unlock(&gsl_driver.lock); + return status; } //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_add_timestamp(gsl_deviceid_t device_id, gsl_timestamp_t *timestamp) { gsl_device_t* device = &gsl_driver.device[device_id-1]; int status = GSL_FAILURE; - GSL_API_MUTEX_LOCK(); + + mutex_lock(&gsl_driver.lock); + if (device->ftbl.device_addtimestamp) { status = device->ftbl.device_addtimestamp(device, timestamp); } - GSL_API_MUTEX_UNLOCK(); + + mutex_unlock(&gsl_driver.lock); return status; } //---------------------------------------------------------------------------- -KGSL_API int kgsl_cmdstream_waittimestamp(gsl_deviceid_t device_id, gsl_timestamp_t timestamp, unsigned int timeout) { gsl_device_t* device = &gsl_driver.device[device_id-1]; @@ -152,12 +137,9 @@ kgsl_cmdstream_memqueue_drain(gsl_device_t *device) gsl_timestamp_t timestamp, ts_processed; gsl_memqueue_t *memqueue = &device->memqueue; - GSL_CMDSTREAM_MUTEX_LOCK(); - // check head if (memqueue->head == NULL) { - GSL_CMDSTREAM_MUTEX_UNLOCK(); return; } // get current EOP timestamp @@ -166,7 +148,6 @@ kgsl_cmdstream_memqueue_drain(gsl_device_t *device) // check head timestamp if (!(((ts_processed - timestamp) >= 0) || ((ts_processed - timestamp) < -GSL_TIMESTAMP_EPSILON))) { - GSL_CMDSTREAM_MUTEX_UNLOCK(); return; } memnode = memqueue->head; @@ -198,10 +179,9 @@ kgsl_cmdstream_memqueue_drain(gsl_device_t *device) memnode = freehead; freehead = memnode->next; kgsl_sharedmem_free0(&memnode->memdesc, memnode->pid); - kos_free(memnode); + kfree(memnode); } - GSL_CMDSTREAM_MUTEX_UNLOCK(); } //---------------------------------------------------------------------------- @@ -214,25 +194,22 @@ kgsl_cmdstream_freememontimestamp(gsl_deviceid_t device_id, gsl_memdesc_t *memde gsl_memqueue_t *memqueue; (void)type; // unref. For now just use EOP timestamp - GSL_API_MUTEX_LOCK(); - GSL_CMDSTREAM_MUTEX_LOCK(); - - memqueue = &device->memqueue; + mutex_lock(&gsl_driver.lock); - memnode = kos_malloc(sizeof(gsl_memnode_t)); + memqueue = &device->memqueue; + memnode = kmalloc(sizeof(gsl_memnode_t), GFP_KERNEL); if (!memnode) { // other solution is to idle and free which given that the upper level driver probably wont check, probably a better idea - GSL_CMDSTREAM_MUTEX_UNLOCK(); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return (GSL_FAILURE); } memnode->timestamp = timestamp; - memnode->pid = GSL_CALLER_PROCESSID_GET(); + memnode->pid = current->tgid; memnode->next = NULL; - kos_memcpy(&memnode->memdesc, memdesc, sizeof(gsl_memdesc_t)); + memcpy(&memnode->memdesc, memdesc, sizeof(gsl_memdesc_t)); // add to end of queue if (memqueue->tail != NULL) @@ -242,13 +219,12 @@ kgsl_cmdstream_freememontimestamp(gsl_deviceid_t device_id, gsl_memdesc_t *memde } else { - KOS_ASSERT(memqueue->head == NULL); + DEBUG_ASSERT(memqueue->head == NULL); memqueue->head = memnode; memqueue->tail = memnode; } - GSL_CMDSTREAM_MUTEX_UNLOCK(); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return (GSL_SUCCESS); } diff --git a/drivers/mxc/amd-gpu/common/gsl_cmdwindow.c b/drivers/mxc/amd-gpu/gsl_cmdwindow.c similarity index 71% rename from drivers/mxc/amd-gpu/common/gsl_cmdwindow.c rename to drivers/mxc/amd-gpu/gsl_cmdwindow.c index d19832d8da4..7cec78490c4 100644 --- a/drivers/mxc/amd-gpu/common/gsl_cmdwindow.c +++ b/drivers/mxc/amd-gpu/gsl_cmdwindow.c @@ -16,56 +16,31 @@ * */ +#include + #include "gsl.h" #include "gsl_hal.h" #ifdef GSL_BLD_G12 -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// +// defines #define GSL_CMDWINDOW_TARGET_MASK 0x000000FF #define GSL_CMDWINDOW_ADDR_MASK 0x00FFFF00 #define GSL_CMDWINDOW_TARGET_SHIFT 0 #define GSL_CMDWINDOW_ADDR_SHIFT 8 - -////////////////////////////////////////////////////////////////////////////// -// macros -////////////////////////////////////////////////////////////////////////////// -#ifdef GSL_LOCKING_FINEGRAIN -#define GSL_CMDWINDOW_MUTEX_CREATE() device->cmdwindow_mutex = kos_mutex_create("gsl_cmdwindow"); \ - if (!device->cmdwindow_mutex) return (GSL_FAILURE); -#define GSL_CMDWINDOW_MUTEX_LOCK() kos_mutex_lock(device->cmdwindow_mutex) -#define GSL_CMDWINDOW_MUTEX_UNLOCK() kos_mutex_unlock(device->cmdwindow_mutex) -#define GSL_CMDWINDOW_MUTEX_FREE() kos_mutex_free(device->cmdwindow_mutex); device->cmdwindow_mutex = 0; -#else -#define GSL_CMDWINDOW_MUTEX_CREATE() -#define GSL_CMDWINDOW_MUTEX_LOCK() -#define GSL_CMDWINDOW_MUTEX_UNLOCK() -#define GSL_CMDWINDOW_MUTEX_FREE() -#endif - - -////////////////////////////////////////////////////////////////////////////// // functions -////////////////////////////////////////////////////////////////////////////// - int kgsl_cmdwindow_init(gsl_device_t *device) { - GSL_CMDWINDOW_MUTEX_CREATE(); - return (GSL_SUCCESS); } //---------------------------------------------------------------------------- -int +int kgsl_cmdwindow_close(gsl_device_t *device) { - GSL_CMDWINDOW_MUTEX_FREE(); - return (GSL_SUCCESS); } @@ -82,7 +57,7 @@ kgsl_cmdwindow_write0(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned unsigned int cmdstream; kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_cmdwindow_write( gsl_device_id_t device_id=%d, gsl_cmdwindow_t target=%d, unsigned int addr=0x%08x, unsigned int data=0x%08x)\n", device_id, target, addr, data ); + "--> int kgsl_cmdwindow_write( gsl_device_id_t device_id=%D, gsl_cmdwindow_t target=%d, uint addr=0x%08x, uint data=0x%08x)\n", device_id, target, addr, data ); device = &gsl_driver.device[device_id-1]; // device_id is 1 based @@ -119,11 +94,9 @@ kgsl_cmdwindow_write0(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned cmdwinaddr = ((target << GSL_CMDWINDOW_TARGET_SHIFT) & GSL_CMDWINDOW_TARGET_MASK); cmdwinaddr |= ((addr << GSL_CMDWINDOW_ADDR_SHIFT) & GSL_CMDWINDOW_ADDR_MASK); - GSL_CMDWINDOW_MUTEX_LOCK(); - #ifndef GSL_NO_MMU // set mmu pagetable - kgsl_mmu_setpagetable(device, GSL_CALLER_PROCESSID_GET()); + kgsl_mmu_setpagetable(device, current->tgid); #endif // write command window address @@ -132,8 +105,6 @@ kgsl_cmdwindow_write0(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned // write data device->ftbl.device_regwrite(device, (cmdstream)>>2, data); - GSL_CMDWINDOW_MUTEX_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_cmdwindow_write. Return value %B\n", GSL_SUCCESS ); return (GSL_SUCCESS); @@ -150,12 +121,12 @@ kgsl_cmdwindow_write0(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_cmdwindow_write(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned int addr, unsigned int data) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); status = kgsl_cmdwindow_write0(device_id, target, addr, data); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } diff --git a/drivers/mxc/amd-gpu/common/gsl_context.c b/drivers/mxc/amd-gpu/gsl_context.c similarity index 92% rename from drivers/mxc/amd-gpu/common/gsl_context.c rename to drivers/mxc/amd-gpu/gsl_context.c index c999247b3af..984cea66381 100644 --- a/drivers/mxc/amd-gpu/common/gsl_context.c +++ b/drivers/mxc/amd-gpu/gsl_context.c @@ -18,19 +18,18 @@ #include "gsl.h" #include "gsl_hal.h" -#include "gsl_context.h" ////////////////////////////////////////////////////////////////////////////// // functions ////////////////////////////////////////////////////////////////////////////// -KGSL_API int +int kgsl_context_create(gsl_deviceid_t device_id, gsl_context_type_t type, unsigned int *drawctxt_id, gsl_flags_t flags) { gsl_device_t* device = &gsl_driver.device[device_id-1]; int status; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); if (device->ftbl.context_create) { @@ -41,20 +40,20 @@ kgsl_context_create(gsl_deviceid_t device_id, gsl_context_type_t type, unsigned status = GSL_FAILURE; } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_context_destroy(gsl_deviceid_t device_id, unsigned int drawctxt_id) { gsl_device_t* device = &gsl_driver.device[device_id-1]; int status; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); if (device->ftbl.context_destroy) { @@ -65,7 +64,7 @@ kgsl_context_destroy(gsl_deviceid_t device_id, unsigned int drawctxt_id) status = GSL_FAILURE; } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } diff --git a/drivers/mxc/amd-gpu/common/gsl_debug_pm4.c b/drivers/mxc/amd-gpu/gsl_debug_pm4.c similarity index 80% rename from drivers/mxc/amd-gpu/common/gsl_debug_pm4.c rename to drivers/mxc/amd-gpu/gsl_debug_pm4.c index 847df8dbe38..f712bb402ff 100644 --- a/drivers/mxc/amd-gpu/common/gsl_debug_pm4.c +++ b/drivers/mxc/amd-gpu/gsl_debug_pm4.c @@ -19,11 +19,9 @@ #include "gsl.h" #include "gsl_hal.h" -#if defined(_WIN32) && defined (GSL_BLD_YAMATO) +#if 0//defined(GSL_BLD_YAMATO) -#include -#include -#include +#include //#define PM4_DEBUG_USE_MEMBUF @@ -34,16 +32,11 @@ char memBuf[MEMBUF_SIZE]; static int writePtr = 0; static unsigned int lineNumber = 0; -//#define fprintf(A,...); writePtr += sprintf( memBuf+writePtr, __VA_ARGS__ ); sprintf( memBuf+writePtr, "###" ); if( writePtr > MEMBUF_SIZE-BUFFER_END_MARGIN ) { memset(memBuf+writePtr, '#', MEMBUF_SIZE-writePtr); writePtr = 0; } -#define FILE char -#define fopen(X,Y) 0 -#define fclose(X) -int printString( FILE *_File, const char * _Format, ...) +int printString(const char * _Format, ...) { int ret; va_list ap; - (void)_File; va_start(ap, _Format); if( writePtr > 0 && memBuf[writePtr-1] == '\n' ) @@ -54,9 +47,9 @@ int printString( FILE *_File, const char * _Format, ...) ret = vsprintf(memBuf+writePtr, _Format, ap); writePtr += ret; sprintf( memBuf+writePtr, "###" ); - if( writePtr > MEMBUF_SIZE-BUFFER_END_MARGIN ) - { - memset(memBuf+writePtr, '#', MEMBUF_SIZE-writePtr); + if( writePtr > MEMBUF_SIZE-BUFFER_END_MARGIN ) + { + memset(memBuf+writePtr, '#', MEMBUF_SIZE-writePtr); writePtr = 0; } @@ -67,25 +60,18 @@ int printString( FILE *_File, const char * _Format, ...) #else -int printString( FILE *_File, const char * _Format, ...) +int printString(const char * _Format, ...) { int ret; va_list ap; va_start(ap, _Format); - ret = vfprintf(_File, _Format, ap); + ret = printk(_Format, ap); va_end(ap); - fflush(_File); return ret; } #endif -#ifndef _WIN32_WCE -#define PM4_DUMPFILE "pm4dump.txt" -#else -#define PM4_DUMPFILE "\\Release\\pm4dump.txt" -#endif - ////////////////////////////////////////////////////////////////////////////// // defines ////////////////////////////////////////////////////////////////////////////// @@ -96,7 +82,7 @@ int printString( FILE *_File, const char * _Format, ...) #define GetString_signedint15(val, szValue) GetString_signedint(val, 15, szValue) // Need a prototype for this function -void WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer); +void WritePM4Packet_Type3(unsigned int dwHeader, unsigned int** ppBuffer); static int indirectionLevel = 0; @@ -105,14 +91,14 @@ static int indirectionLevel = 0; // functions ////////////////////////////////////////////////////////////////////////////// -void WriteDWORD(FILE* pFile, unsigned int dwValue) +void WriteDWORD(unsigned int dwValue) { - printString(pFile, " 0x%08x", dwValue); + printString( " 0x%08x", dwValue); } -void WriteDWORD2(FILE* pFile, unsigned int dwValue) +void WriteDWORD2(unsigned int dwValue) { - printString(pFile, " 0x%08x\n", dwValue); + printString( " 0x%08x\n", dwValue); } //---------------------------------------------------------------------------- @@ -126,7 +112,7 @@ void GetString_##__type(unsigned int val, char* szValue) \ #define GENERATE_ENUM(__enumname, __val) \ case __val: \ - kos_strcpy(szValue, #__enumname); \ + strcpy(szValue, #__enumname); \ break; #define END_ENUMTYPE(__type) \ @@ -160,14 +146,7 @@ GetString_float(unsigned int val, char* szValue) void GetString_bool(unsigned int val, char* szValue) { - if (val) - { - kos_strcpy(szValue, "TRUE"); - } - else - { - kos_strcpy(szValue, "FALSE"); - } + strcpy(szValue, val ? "TRUE" : "FALSE"); } //---------------------------------------------------------------------------- @@ -272,7 +251,7 @@ switch(EXPAND_OPCODE(opcode)) { #define TYPE3SWITCH(__opcode) \ case PM4_PACKET3_##__opcode: \ - kos_strcpy(pszValue, #__opcode); \ + strcpy(pszValue, #__opcode); \ break; TYPE3SWITCH(NOP) @@ -333,14 +312,14 @@ switch(EXPAND_OPCODE(opcode)) //---------------------------------------------------------------------------- void -WritePM4Packet_Type0(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer) +WritePM4Packet_Type0(unsigned int dwHeader, unsigned int** ppBuffer) { pm4_type0 header = *((pm4_type0*) &dwHeader); unsigned int* pBuffer = *ppBuffer; unsigned int dwIndex; - WriteDWORD(pFile, dwHeader); - printString(pFile, " // Type-0 packet (BASE_INDEX = 0x%x, ONE_REG_WR = %d, COUNT = %d+1)\n", + WriteDWORD(dwHeader); + printString(" // Type-0 packet (BASE_INDEX = 0x%x, ONE_REG_WR = %d, COUNT = %d+1)\n", header.base_index, header.one_reg_wr, header.count); // Now go through and write the dwNumDWORDs @@ -359,10 +338,10 @@ WritePM4Packet_Type0(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer dwRegIndex = header.base_index + dwIndex; } - WriteDWORD(pFile, dwRegValue); + WriteDWORD(dwRegValue); // Write register string based on fields GetString_Register(dwRegIndex, dwRegValue, szRegister); - printString(pFile, " // %s\n", szRegister); + printString(" // %s\n", szRegister); // Write actual unsigned int @@ -374,42 +353,42 @@ WritePM4Packet_Type0(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer //---------------------------------------------------------------------------- void -WritePM4Packet_Type2(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer) +WritePM4Packet_Type2(unsigned int dwHeader, unsigned int** ppBuffer) { unsigned int* pBuffer = *ppBuffer; - WriteDWORD(pFile, dwHeader); - printString(pFile, " // Type-2 packet\n"); - + WriteDWORD(dwHeader); + printString(" // Type-2 packet\n"); + *ppBuffer = pBuffer; } //---------------------------------------------------------------------------- void -AnalyzePacketType(FILE *pFile, unsigned int dwHeader, unsigned int**ppBuffer) +AnalyzePacketType(unsigned int dwHeader, unsigned int**ppBuffer) { switch(dwHeader & PM4_PKT_MASK) { case PM4_TYPE0_PKT: - WritePM4Packet_Type0(pFile, dwHeader, ppBuffer); + WritePM4Packet_Type0(dwHeader, ppBuffer); break; case PM4_TYPE1_PKT: break; case PM4_TYPE2_PKT: - WritePM4Packet_Type2(pFile, dwHeader, ppBuffer); + WritePM4Packet_Type2(dwHeader, ppBuffer); break; case PM4_TYPE3_PKT: - WritePM4Packet_Type3(pFile, dwHeader, ppBuffer); + WritePM4Packet_Type3(dwHeader, ppBuffer); break; } } void -WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer) +WritePM4Packet_Type3(unsigned int dwHeader, unsigned int** ppBuffer) { pm4_type3 header = *((pm4_type3*) &dwHeader); unsigned int* pBuffer = *ppBuffer; @@ -425,33 +404,33 @@ WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer indirectionLevel++; - WriteDWORD2(pFile, dwHeader); - WriteDWORD2(pFile, gpuaddr); - WriteDWORD2(pFile, (unsigned int) (pIndirectBufferEnd-pIndirectBuffer)); + WriteDWORD2(dwHeader); + WriteDWORD2(gpuaddr); + WriteDWORD2((unsigned int) (pIndirectBufferEnd-pIndirectBuffer)); if (indirectionLevel == 1) { - printString(pFile, "Start_IB1, base=0x%x, size=%d\n", gpuaddr, (unsigned int)(pIndirectBufferEnd - pIndirectBuffer)); + printString( "Start_IB1, base=0x%x, size=%d\n", gpuaddr, (unsigned int)(pIndirectBufferEnd - pIndirectBuffer)); } else { - printString(pFile, "Start_IB2, base=0x%x, size=%d\n", gpuaddr, (unsigned int)(pIndirectBufferEnd - pIndirectBuffer)); + printString( "Start_IB2, base=0x%x, size=%d\n", gpuaddr, (unsigned int)(pIndirectBufferEnd - pIndirectBuffer)); } while(pIndirectBuffer < pIndirectBufferEnd) { unsigned int _dwHeader = *(pIndirectBuffer++); - AnalyzePacketType(pFile, _dwHeader, &pIndirectBuffer); + AnalyzePacketType(_dwHeader, &pIndirectBuffer); } if (indirectionLevel == 1) { - printString(pFile, "End_IB1\n"); + printString( "End_IB1\n"); } else { - printString(pFile, "End_IB2\n"); + printString( "End_IB2\n"); } indirectionLevel--; @@ -463,8 +442,8 @@ WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer GetString_Type3Opcode(header.it_opcode, szOpcode); - WriteDWORD(pFile, dwHeader); - printString(pFile, " // Type-3 packet (PREDICATE = %d, IT_OPCODE = %s, COUNT = %d+1)\n", + WriteDWORD(dwHeader); + printString( " // Type-3 packet (PREDICATE = %d, IT_OPCODE = %s, COUNT = %d+1)\n", header.predicate, szOpcode, header.count); // Go through each command @@ -475,20 +454,20 @@ WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer registerAddr = (*pBuffer) & 0xffff; // Write unsigned int - WriteDWORD(pFile, *pBuffer); + WriteDWORD(*pBuffer); // Starting at Ordinal 2 is actual register values if((dwIndex > 0) && (registerAddr != 0xffffffff)) { // Write register string based on address GetString_Register(registerAddr + 0x2000, *pBuffer, szRegister); - printString(pFile, " // %s\n", szRegister); + printString( " // %s\n", szRegister); registerAddr++; } else { // Write out newline if we aren't augmenting with register fields - printString(pFile, "\n"); + printString( "\n"); } pBuffer++; @@ -502,12 +481,8 @@ WritePM4Packet_Type3(FILE* pFile, unsigned int dwHeader, unsigned int** ppBuffer void Yamato_DumpInitParams(unsigned int dwEDRAMBase, unsigned int dwEDRAMSize) { - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "InitParams, edrambase=0x%x, edramsize=%d\n", + printString( "InitParams, edrambase=0x%x, edramsize=%d\n", dwEDRAMBase, dwEDRAMSize); - - fclose(pFile); } //---------------------------------------------------------------------------- @@ -516,13 +491,8 @@ void Yamato_DumpSwapBuffers(unsigned int dwAddress, unsigned int dwWidth, unsigned int dwHeight, unsigned int dwPitch, unsigned int dwAlignedHeight, unsigned int dwBitsPerPixel) { - // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "SwapBuffers, address=0x%08x, width=%d, height=%d, pitch=%d, alignedheight=%d, bpp=%d\n", + printString( "SwapBuffers, address=0x%08x, width=%d, height=%d, pitch=%d, alignedheight=%d, bpp=%d\n", dwAddress, dwWidth, dwHeight, dwPitch, dwAlignedHeight, dwBitsPerPixel); - - fclose(pFile); } //---------------------------------------------------------------------------- @@ -534,30 +504,26 @@ Yamato_DumpRegSpace(gsl_device_t *device) unsigned int dwOffset; unsigned int value; - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "Start_RegisterSpace\n"); + printString( "Start_RegisterSpace\n"); for (dwOffset = 0; dwOffset < device->regspace.sizebytes; dwOffset += 4) { if (dwOffset % regsPerLine == 0) { - printString(pFile, " 0x%08x ", dwOffset); + printString( " 0x%08x ", dwOffset); } GSL_HAL_REG_READ(device->id, (unsigned int) device->regspace.mmio_virt_base, (dwOffset >> 2), &value); - printString(pFile, " 0x%08x", value); + printString( " 0x%08x", value); if (((dwOffset + 4) % regsPerLine == 0) && ((dwOffset + 4) < device->regspace.sizebytes)) { - printString(pFile, "\n"); + printString( "\n"); } } - printString(pFile, "\nEnd_RegisterSpace\n"); - - fclose(pFile); + printString( "\nEnd_RegisterSpace\n"); } //---------------------------------------------------------------------------- @@ -566,13 +532,8 @@ void Yamato_DumpAllocateMemory(unsigned int dwSize, unsigned int dwFlags, unsigned int dwAddress, unsigned int dwActualSize) { - // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "AllocateMemory, size=%d, flags=0x%x, address=0x%x, actualSize=%d\n", + printString( "AllocateMemory, size=%d, flags=0x%x, address=0x%x, actualSize=%d\n", dwSize, dwFlags, dwAddress, dwActualSize); - - fclose(pFile); } //---------------------------------------------------------------------------- @@ -580,12 +541,7 @@ Yamato_DumpAllocateMemory(unsigned int dwSize, unsigned int dwFlags, unsigned in void Yamato_DumpFreeMemory(unsigned int dwAddress) { - // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "FreeMemory, address=0x%x\n", dwAddress); - - fclose(pFile); + printString( "FreeMemory, address=0x%x\n", dwAddress); } //---------------------------------------------------------------------------- @@ -594,12 +550,11 @@ void Yamato_DumpWriteMemory(unsigned int dwAddress, unsigned int dwSize, void* pData) { // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); unsigned int dwNumDWORDs; unsigned int dwIndex; unsigned int *pDataPtr; - printString(pFile, "StartWriteMemory, address=0x%x, size=%d\n", dwAddress, dwSize); + printString( "StartWriteMemory, address=0x%x, size=%d\n", dwAddress, dwSize); // Now write the data, in dwNumDWORDs dwNumDWORDs = dwSize >> 2; @@ -611,25 +566,19 @@ Yamato_DumpWriteMemory(unsigned int dwAddress, unsigned int dwSize, void* pData) for (dwIndex = 0, pDataPtr = (unsigned int *)pData; dwIndex < dwNumDWORDs; dwIndex++, pDataPtr++) { - WriteDWORD2(pFile, *pDataPtr); + WriteDWORD2(*pDataPtr); } - printString(pFile, "EndWriteMemory\n"); - - fclose(pFile); + printString( "EndWriteMemory\n"); } void Yamato_DumpSetMemory(unsigned int dwAddress, unsigned int dwSize, unsigned int pData) { - // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); // unsigned int* pDataPtr; - printString(pFile, "SetMemory, address=0x%x, size=%d, value=0x%x\n", + printString( "SetMemory, address=0x%x, size=%d, value=0x%x\n", dwAddress, dwSize, pData); - - fclose(pFile); } //---------------------------------------------------------------------------- @@ -714,43 +663,39 @@ Yamato_DumpPM4(unsigned int* pBuffer, unsigned int sizeDWords) unsigned int *pBufferEnd = pBuffer + sizeDWords; unsigned int *tmp; - // Open file - FILE* pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "Start_PM4Buffer\n");//, count=%d\n", sizeDWords); + printString( "Start_PM4Buffer\n");//, count=%d\n", sizeDWords); // So look at the first unsigned int - should be a header while(pBuffer < pBufferEnd) { unsigned int dwHeader = *(pBuffer++); - //printString(pFile, " Start_Packet\n"); + //printString( " Start_Packet\n"); switch(dwHeader & PM4_PKT_MASK) { case PM4_TYPE0_PKT: - WritePM4Packet_Type0(pFile, dwHeader, &pBuffer); + WritePM4Packet_Type0(dwHeader, &pBuffer); break; case PM4_TYPE1_PKT: break; case PM4_TYPE2_PKT: - WritePM4Packet_Type2(pFile, dwHeader, &pBuffer); + WritePM4Packet_Type2(dwHeader, &pBuffer); break; case PM4_TYPE3_PKT: indirectionLevel = 0; tmp = pBuffer; Yamato_ConvertIBAddr(dwHeader, tmp, 1); - WritePM4Packet_Type3(pFile, dwHeader, &pBuffer); + WritePM4Packet_Type3(dwHeader, &pBuffer); Yamato_ConvertIBAddr(dwHeader, tmp, 0); break; } - //printString(pFile, " End_Packet\n"); + //printString( " End_Packet\n"); } - printString(pFile, "End_PM4Buffer\n"); - fclose(pFile); + printString( "End_PM4Buffer\n"); } //---------------------------------------------------------------------------- @@ -758,8 +703,6 @@ Yamato_DumpPM4(unsigned int* pBuffer, unsigned int sizeDWords) void Yamato_DumpRegisterWrite(unsigned int dwAddress, unsigned int value) { - FILE *pFile; - // Build a Type-0 packet that maps to this register write unsigned int pBuffer[100], *pBuf = &pBuffer[1]; @@ -767,16 +710,12 @@ Yamato_DumpRegisterWrite(unsigned int dwAddress, unsigned int value) if(dwAddress == mmCP_RB_WPTR) return; - pFile = fopen(PM4_DUMPFILE, "a"); - pBuffer[0] = dwAddress; pBuffer[1] = value; - printString(pFile, "StartRegisterWrite\n"); - WritePM4Packet_Type0(pFile, pBuffer[0], &pBuf); - printString(pFile, "EndRegisterWrite\n"); - - fclose(pFile); + printString( "StartRegisterWrite\n"); + WritePM4Packet_Type0(pBuffer[0], &pBuf); + printString( "EndRegisterWrite\n"); } //---------------------------------------------------------------------------- @@ -784,20 +723,14 @@ Yamato_DumpRegisterWrite(unsigned int dwAddress, unsigned int value) void Yamato_DumpFbStart(gsl_device_t *device) { - FILE *pFile; - static int firstCall = 0; // We only want to call this once if(firstCall) return; - pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "FbStart, value=0x%x\n", device->mmu.mpu_base); - printString(pFile, "FbSize, value=0x%x\n", device->mmu.mpu_range); - - fclose(pFile); + printString( "FbStart, value=0x%x\n", device->mmu.mpu_base); + printString( "FbSize, value=0x%x\n", device->mmu.mpu_range); firstCall = 1; } @@ -807,13 +740,7 @@ Yamato_DumpFbStart(gsl_device_t *device) void Yamato_DumpWindow(unsigned int addr, unsigned int width, unsigned int height) { - FILE *pFile; - - pFile = fopen(PM4_DUMPFILE, "a"); - - printString(pFile, "DumpWindow, addr=0x%x, width=0x%x, height=0x%x\n", addr, width, height); - - fclose(pFile); + printString( "DumpWindow, addr=0x%x, width=0x%x, height=0x%x\n", addr, width, height); } //---------------------------------------------------------------------------- @@ -874,14 +801,14 @@ static int kgsl_dumpx_handle_type3(unsigned int* hostaddr, int count) addr_stack[kgsl_dumpx_addr_count] = ibaddr; // just for sanity checking size_stack[kgsl_dumpx_addr_count++] = ibsize; - KOS_ASSERT(kgsl_dumpx_addr_count < ADDRESS_STACK_SIZE); + DEBUG_ASSERT(kgsl_dumpx_addr_count < ADDRESS_STACK_SIZE); // recursively follow the indirect link and update swap if indirect buffer had resolve swap |= kgsl_dumpx_parse_ibs(ibaddr, ibsize); } else { - KOS_ASSERT(size_stack[i] == ibsize); + DEBUG_ASSERT(size_stack[i] == ibsize); } } break; @@ -934,7 +861,7 @@ static int kgsl_dumpx_handle_type3(unsigned int* hostaddr, int count) if(iscopy && !swap) { // printf("resolve: %ix%i @ 0x%08x, format = 0x%08x\n", width, height, baseaddr, format); - KOS_ASSERT(format < 15); + DEBUG_ASSERT(format < 15); // yes it was and we need to update color buffer config because this is the first bin // dumpx framebuffer base address, and dimensions @@ -969,8 +896,8 @@ int kgsl_dumpx_parse_ibs(gpuaddr_t gpuaddr, int sizedwords) level++; - KOS_ASSERT(sizeof(unsigned int *) == sizeof(unsigned int)); - KOS_ASSERT(level <= 2); + DEBUG_ASSERT(sizeof(unsigned int *) == sizeof(unsigned int)); + DEBUG_ASSERT(level <= 2); hostaddr = (unsigned int *)kgsl_sharedmem_convertaddr(gpuaddr, 0); // dump the IB to test vector @@ -993,13 +920,13 @@ int kgsl_dumpx_parse_ibs(gpuaddr_t gpuaddr, int sizedwords) swap |= kgsl_dumpx_handle_type3(hostaddr, count); break; // type-3 default: - KOS_ASSERT(!"unknown packet type"); + DEBUG_ASSERT(!"unknown packet type"); } // jump to next packet dwords_left -= count; hostaddr += count; - KOS_ASSERT(dwords_left >= 0 && "PM4 parsing error"); + DEBUG_ASSERT(dwords_left >= 0 && "PM4 parsing error"); } level--; diff --git a/drivers/mxc/amd-gpu/common/gsl_device.c b/drivers/mxc/amd-gpu/gsl_device.c similarity index 87% rename from drivers/mxc/amd-gpu/common/gsl_device.c rename to drivers/mxc/amd-gpu/gsl_device.c index 6c41d3dd6dc..04c8f099458 100644 --- a/drivers/mxc/amd-gpu/common/gsl_device.c +++ b/drivers/mxc/amd-gpu/gsl_device.c @@ -15,17 +15,16 @@ * 02110-1301, USA. * */ - + +#include + #include "gsl.h" #include "gsl_hal.h" -#ifdef _LINUX -#include -#endif ////////////////////////////////////////////////////////////////////////////// // inline functions ////////////////////////////////////////////////////////////////////////////// -OSINLINE void +static __inline void kgsl_device_getfunctable(gsl_deviceid_t device_id, gsl_functable_t *ftbl) { switch (device_id) @@ -74,16 +73,16 @@ kgsl_device_init(gsl_device_t *device, gsl_deviceid_t device_id) return (GSL_SUCCESS); } - kos_memset(device, 0, sizeof(gsl_device_t)); + memset(device, 0, sizeof(gsl_device_t)); // if device configuration is present if (kgsl_hal_getdevconfig(device_id, &config) == GSL_SUCCESS) { kgsl_device_getfunctable(device_id, &device->ftbl); - kos_memcpy(&device->regspace, &config.regspace, sizeof(gsl_memregion_t)); + memcpy(&device->regspace, &config.regspace, sizeof(gsl_memregion_t)); #ifdef GSL_BLD_YAMATO - kos_memcpy(&device->gmemspace, &config.gmemspace, sizeof(gsl_memregion_t)); + memcpy(&device->gmemspace, &config.gmemspace, sizeof(gsl_memregion_t)); #endif // GSL_BLD_YAMATO device->refcnt = 0; @@ -112,7 +111,7 @@ kgsl_device_init(gsl_device_t *device, gsl_deviceid_t device_id) KGSL_DEBUG(GSL_DBGFLAGS_DUMPX, { // dumpx needs this to be in EMEM0 aperture - kgsl_sharedmem_free0(&device->memstore, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&device->memstore, current->tgid); status = kgsl_sharedmem_alloc0(device->id, GSL_MEMFLAGS_ALIGNPAGE, sizeof(gsl_devmemstore_t), &device->memstore); }); @@ -135,18 +134,8 @@ kgsl_device_init(gsl_device_t *device, gsl_deviceid_t device_id) return (status); } -#ifndef _LINUX - // Create timestamp event - device->timestamp_event = kos_event_create(0); - if( !device->timestamp_event ) - { - kgsl_device_stop(device->id); - return (status); - } -#else - // Create timestamp wait queue - init_waitqueue_head(&device->timestamp_waitq); -#endif + // Create timestamp wait queue + init_waitqueue_head(&device->timestamp_waitq); // // Read the chip ID after the device has been initialized. @@ -178,9 +167,9 @@ kgsl_device_close(gsl_device_t *device) kgsl_device_close is only called for last running caller process */ while (device->refcnt > 0) { - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_device_stop(device->id); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); } // close cmdstream @@ -195,23 +184,13 @@ kgsl_device_close(gsl_device_t *device) if ((device->refcnt == 0) && device->memstore.hostptr && !(gsl_driver.flags_debug & GSL_DBGFLAGS_DUMPX)) { - kgsl_sharedmem_free0(&device->memstore, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&device->memstore, current->tgid); } -#ifndef _LINUX - // destroy timestamp event - if(device->timestamp_event) - { - kos_event_signal(device->timestamp_event); // wake up waiting threads before destroying the structure - kos_event_destroy( device->timestamp_event ); - device->timestamp_event = 0; - } -#else wake_up_interruptible_all(&(device->timestamp_waitq)); -#endif kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_close. Return value %B\n", status ); - + return (status); } @@ -304,16 +283,16 @@ kgsl_device_detachcallback(gsl_device_t *device, unsigned int pid) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes) { int status = GSL_SUCCESS; gsl_device_t *device = &gsl_driver.device[device_id-1]; // device_id is 1 based kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_device_getproperty(gsl_deviceid_t device_id=%D, gsl_property_type_t type=%d, void *value=0x08x, unsigned int sizebytes=%d)\n", device_id, type, value, sizebytes ); + "--> int kgsl_device_getproperty(gsl_deviceid_t device_id=%D, gsl_property_type_t type=%T, void *value=0x%08x, uint sizebytes=%u)\n", device_id, type, value, sizebytes ); - KOS_ASSERT(value); + DEBUG_ASSERT(value); #ifndef _DEBUG (void) sizebytes; // unreferenced formal parameter @@ -325,7 +304,7 @@ kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void { gsl_shmemprop_t *shem = (gsl_shmemprop_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_shmemprop_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_shmemprop_t)); shem->numapertures = gsl_driver.shmem.numapertures; shem->aperture_mask = GSL_APERTURE_MASK; @@ -339,7 +318,7 @@ kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void int i; gsl_apertureprop_t *aperture = (gsl_apertureprop_t *) value; - KOS_ASSERT(sizebytes == (sizeof(gsl_apertureprop_t) * gsl_driver.shmem.numapertures)); + DEBUG_ASSERT(sizebytes == (sizeof(gsl_apertureprop_t) * gsl_driver.shmem.numapertures)); for (i = 0; i < gsl_driver.shmem.numapertures; i++) { @@ -363,9 +342,9 @@ kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void { gsl_shadowprop_t *shadowprop = (gsl_shadowprop_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_shadowprop_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_shadowprop_t)); - kos_memset(shadowprop, 0, sizeof(gsl_shadowprop_t)); + memset(shadowprop, 0, sizeof(gsl_shadowprop_t)); #ifdef GSL_DEVICE_SHADOW_MEMSTORE_TO_USER if (device->memstore.hostptr) @@ -397,18 +376,18 @@ kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_setproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes) { int status = GSL_SUCCESS; gsl_device_t *device; kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_device_setproperty(gsl_deviceid_t device_id=%D, gsl_property_type_t type=%d, void *value=0x08x, unsigned int sizebytes=%d)\n", device_id, type, value, sizebytes ); + "--> int kgsl_device_setproperty(gsl_deviceid_t device_id=%D, gsl_property_type_t type=%T, void *value=0x%08x, uint sizebytes=%u)\n", device_id, type, value, sizebytes ); - KOS_ASSERT(value); + DEBUG_ASSERT(value); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based @@ -420,7 +399,7 @@ kgsl_device_setproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void } } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_setproperty. Return value %B\n", status ); @@ -429,7 +408,7 @@ kgsl_device_setproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) { int status = GSL_FAILURE_NOTINITIALIZED; @@ -439,15 +418,15 @@ kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_device_start(gsl_deviceid_t device_id=%D, gsl_flags_t flags=%d)\n", device_id, flags ); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); if ((GSL_DEVICE_G12 == device_id) && !(hal->has_z160)) { - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return GSL_FAILURE_NOTSUPPORTED; } if ((GSL_DEVICE_YAMATO == device_id) && !(hal->has_z430)) { - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return GSL_FAILURE_NOTSUPPORTED; } @@ -457,7 +436,7 @@ kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) if (!(device->flags & GSL_FLAGS_INITIALIZED)) { - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_ERROR, "ERROR: Trying to start uninitialized device.\n" ); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_start. Return value %B\n", GSL_FAILURE ); @@ -468,7 +447,7 @@ kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) if (device->flags & GSL_FLAGS_STARTED) { - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_start. Return value %B\n", GSL_SUCCESS ); return (GSL_SUCCESS); } @@ -485,7 +464,7 @@ kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) status = device->ftbl.device_start(device, flags); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_start. Return value %B\n", status ); @@ -494,7 +473,7 @@ kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_stop(gsl_deviceid_t device_id) { int status = GSL_FAILURE_NOTINITIALIZED; @@ -503,13 +482,13 @@ kgsl_device_stop(gsl_deviceid_t device_id) kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_device_stop(gsl_deviceid_t device_id=%D)\n", device_id ); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based if (device->flags & GSL_FLAGS_STARTED) { - KOS_ASSERT(device->refcnt); + DEBUG_ASSERT(device->refcnt); device->refcnt--; @@ -526,7 +505,7 @@ kgsl_device_stop(gsl_deviceid_t device_id) } } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_stop. Return value %B\n", status ); @@ -535,7 +514,7 @@ kgsl_device_stop(gsl_deviceid_t device_id) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout) { int status = GSL_FAILURE_NOTINITIALIZED; @@ -544,7 +523,7 @@ kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout) kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_device_idle(gsl_deviceid_t device_id=%D, unsigned int timeout=%d)\n", device_id, timeout ); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based @@ -555,7 +534,7 @@ kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout) status = device->ftbl.device_idle(device, timeout); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_idle. Return value %B\n", status ); @@ -564,7 +543,7 @@ kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_isidle(gsl_deviceid_t device_id) { gsl_timestamp_t retired = kgsl_cmdstream_readtimestamp0(device_id, GSL_TIMESTAMP_RETIRED); @@ -575,7 +554,7 @@ kgsl_device_isidle(gsl_deviceid_t device_id) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_regread(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int *value) { int status = GSL_FAILURE_NOTINITIALIZED; @@ -588,19 +567,19 @@ kgsl_device_regread(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned "--> int kgsl_device_regread(gsl_deviceid_t device_id=%D, unsigned int offsetwords=%R, unsigned int *value=0x%08x)\n", device_id, offsetwords, value ); #endif - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based - KOS_ASSERT(value); - KOS_ASSERT(offsetwords < device->regspace.sizebytes); + DEBUG_ASSERT(value); + DEBUG_ASSERT(offsetwords < device->regspace.sizebytes); if (device->ftbl.device_regread) { status = device->ftbl.device_regread(device, offsetwords, value); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); #ifdef GSL_LOG if( offsetwords != mmRBBM_STATUS && offsetwords != mmCP_RB_RPTR ) @@ -612,27 +591,27 @@ kgsl_device_regread(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_regwrite(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int value) { int status = GSL_FAILURE_NOTINITIALIZED; gsl_device_t *device; kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_device_regwrite(gsl_deviceid_t device_id=%D, unsigned int offsetwords=%R, unsigned int value=0x%08x)\n", device_id, offsetwords, value ); + "--> int kgsl_device_regwrite(gsl_deviceid_t device_id=%D, unsigned int offsetwords=%R, uint value=0x%08x)\n", device_id, offsetwords, value ); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based - KOS_ASSERT(offsetwords < device->regspace.sizebytes); + DEBUG_ASSERT(offsetwords < device->regspace.sizebytes); if (device->ftbl.device_regwrite) { status = device->ftbl.device_regwrite(device, offsetwords, value); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_regwrite. Return value %B\n", status ); @@ -641,7 +620,7 @@ kgsl_device_regwrite(gsl_deviceid_t device_id, unsigned int offsetwords, unsigne //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_device_waitirq(gsl_deviceid_t device_id, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout) { int status = GSL_FAILURE_NOTINITIALIZED; @@ -650,7 +629,7 @@ kgsl_device_waitirq(gsl_deviceid_t device_id, gsl_intrid_t intr_id, unsigned int kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_device_waitirq(gsl_deviceid_t device_id=%D, gsl_intrid_t intr_id=%d, unsigned int *count=0x%08x, unsigned int timout=0x%08x)\n", device_id, intr_id, count, timeout); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); device = &gsl_driver.device[device_id-1]; // device_id is 1 based @@ -659,7 +638,7 @@ kgsl_device_waitirq(gsl_deviceid_t device_id, gsl_intrid_t intr_id, unsigned int status = device->ftbl.device_waitirq(device, intr_id, count, timeout); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DEVICE | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_device_waitirq. Return value %B\n", status ); diff --git a/drivers/mxc/amd-gpu/common/gsl_drawctxt.c b/drivers/mxc/amd-gpu/gsl_drawctxt.c similarity index 92% rename from drivers/mxc/amd-gpu/common/gsl_drawctxt.c rename to drivers/mxc/amd-gpu/gsl_drawctxt.c index 1e8fa1a4962..3ff861bea9b 100644 --- a/drivers/mxc/amd-gpu/common/gsl_drawctxt.c +++ b/drivers/mxc/amd-gpu/gsl_drawctxt.c @@ -16,11 +16,11 @@ * */ +#include +#include + #include "gsl.h" #include "gsl_hal.h" -#ifdef _LINUX -#include -#endif #ifdef GSL_BLD_YAMATO @@ -110,23 +110,6 @@ #define CONTEXT_SIZE (SHADER_OFFSET + 3 * SHADER_SHADOW_SIZE) -///////////////////////////////////////////////////////////////////////////// -// macros -////////////////////////////////////////////////////////////////////////////// -#ifdef GSL_LOCKING_FINEGRAIN -#define GSL_CONTEXT_MUTEX_CREATE() device->drawctxt_mutex = kos_mutex_create("gsl_drawctxt"); \ - if (!device->drawctxt_mutex) {return (GSL_FAILURE);} -#define GSL_CONTEXT_MUTEX_LOCK() kos_mutex_lock(device->drawctxt_mutex) -#define GSL_CONTEXT_MUTEX_UNLOCK() kos_mutex_unlock(device->drawctxt_mutex) -#define GSL_CONTEXT_MUTEX_FREE() kos_mutex_free(device->drawctxt_mutex); device->drawctxt_mutex = 0; -#else -#define GSL_CONTEXT_MUTEX_CREATE() -#define GSL_CONTEXT_MUTEX_LOCK() -#define GSL_CONTEXT_MUTEX_UNLOCK() -#define GSL_CONTEXT_MUTEX_FREE() -#endif - - ////////////////////////////////////////////////////////////////////////////// // temporary work structure ////////////////////////////////////////////////////////////////////////////// @@ -152,32 +135,26 @@ typedef struct } ctx_t; -////////////////////////////////////////////////////////////////////////////// -// Helper function to calculate IEEE754 single precision float values without FPU -////////////////////////////////////////////////////////////////////////////// +/* Helper function to calculate IEEE754 single precision float values + * without FPU + */ unsigned int uint2float( unsigned int uintval ) { - unsigned int exp = 0; - unsigned int frac = 0; - unsigned int u = uintval; + unsigned int exp, frac = 0; - // Handle zero separately - if( uintval == 0 ) return 0; + if( uintval == 0 ) + return 0; - // Find log2 of u - if(u>=0x10000) { exp+=16; u>>=16; } - if(u>=0x100 ) { exp+=8; u>>=8; } - if(u>=0x10 ) { exp+=4; u>>=4; } - if(u>=0x4 ) { exp+=2; u>>=2; } - if(u>=0x2 ) { exp+=1; u>>=1; } + exp = ilog2(uintval); - // Calculate fraction - frac = ( uintval & ( ~( 1 << exp ) ) ) << ( 23 - exp ); + /* Calculate fraction */ + if (23 > exp) + frac = ( uintval & ( ~( 1 << exp ) ) ) << ( 23 - exp ); - // Exp is biased by 127 and shifted 23 bits + /* Exp is biased by 127 and shifted 23 bits */ exp = ( exp + 127 ) << 23; - return ( exp | frac ); + return exp | frac; } ////////////////////////////////////////////////////////////////////////////// @@ -185,26 +162,18 @@ unsigned int uint2float( unsigned int uintval ) ////////////////////////////////////////////////////////////////////////////// unsigned int uintdivide(unsigned int a, unsigned int b) { -#ifdef _LINUX uint64_t a_fixed = a << 16; uint64_t b_fixed = b << 16; -#else - unsigned int a_fixed = a << 16; - unsigned int b_fixed = b << 16; -#endif + // Assume the result is 0.fraction unsigned int fraction; unsigned int exp = 126; if( b == 0 ) return 0; -#ifdef _LINUX a_fixed = a_fixed << 32; do_div(a_fixed, b_fixed); fraction = (unsigned int)a_fixed; -#else - fraction = ((unsigned int)((((__int64)a_fixed) << 32) / (__int64)b_fixed)); -#endif if( fraction == 0 ) return 0; @@ -512,7 +481,7 @@ program_shader(unsigned int *cmds, int vtxfrag, const unsigned int *shader_pgm, *cmds++ = vtxfrag; // 0=vertex shader, 1=fragment shader *cmds++ = ( (0 << 16) | dwords ); // instruction start & size (in 32-bit words) - kos_memcpy(cmds, shader_pgm, dwords<<2); + memcpy(cmds, shader_pgm, dwords<<2); cmds += dwords; return cmds; @@ -617,6 +586,10 @@ build_regsave_cmds(gsl_drawctxt_t *drawctxt, ctx_t *ctx) // Copy Tex constants cmd = reg_to_mem(cmd, (drawctxt->gpustate.gpuaddr + TEX_OFFSET) & 0xFFFFE000, mmSQ_FETCH_0, TEX_CONSTANTS); #else + // insert a wait for idle (adreno.c:542 from qualcomm kernel) + *cmd++ = pm4_type3_packet(PM4_WAIT_FOR_IDLE, 1); + *cmd++ = 0; + // H/w registers are already shadowed; just need to disable shadowing to prevent corruption. *cmd++ = pm4_type3_packet(PM4_LOAD_CONSTANT_CONTEXT, 3); *cmd++ = (drawctxt->gpustate.gpuaddr + REG_OFFSET) & 0xFFFFE000; @@ -685,6 +658,10 @@ build_gmem2sys_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) *cmds++ = pm4_type0_packet(mmTP0_CHICKEN, 1); *cmds++ = 0x00000000; + /* Set PA_SC_AA_CONFIG to 0 - from Qualcomm*/ + //*cmds++ = pm4_type0_packet(mmPA_SC_AA_CONFIG, 1); + //*cmds++ = 0x00000000; + // -------------- // program shader // -------------- @@ -741,7 +718,7 @@ build_gmem2sys_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) // RB_COLOR_INFO Endian=none, Linear, Format=RGBA8888, Swap=0, Base=gmem_base if( ctx ) { - KOS_ASSERT((ctx->gmem_base & 0xFFF) == 0); // gmem base assumed 4K aligned. + DEBUG_ASSERT((ctx->gmem_base & 0xFFF) == 0); // gmem base assumed 4K aligned. *cmds++ = (shadow->format << RB_COLOR_INFO__COLOR_FORMAT__SHIFT) | ctx->gmem_base; } else @@ -794,7 +771,7 @@ build_gmem2sys_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) *cmds++ = shadow->pitch >> 5; // RB_COPY_DEST_PITCH *cmds++ = 0x0003c008 | (shadow->format << RB_COPY_DEST_INFO__COPY_DEST_FORMAT__SHIFT); // Endian=none, Linear, Format=RGBA8888,Swap=0,!Dither,MaskWrite:R=G=B=A=1 - KOS_ASSERT( (offset & 0xfffff000) == 0 ); // Make sure we stay in offsetx field. + DEBUG_ASSERT( (offset & 0xfffff000) == 0 ); // Make sure we stay in offsetx field. *cmds++ = offset; } @@ -802,6 +779,11 @@ build_gmem2sys_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) *cmds++ = PM4_REG(mmRB_MODECONTROL); *cmds++ = 0x6; // EDRAM copy + // gleaned from qualcomm source + //*cmds++ = pm4_type3_packet(PM4_SET_CONSTANT, 2); + //*cmds++ = PM4_REG(mmPA_CL_CLIP_CNTL); + //*cmds++ = 0x00010000; + // queue the draw packet *cmds++ = pm4_type3_packet(PM4_DRAW_INDX, 2); *cmds++ = 0; // viz query info. @@ -844,6 +826,10 @@ build_sys2gmem_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) *cmds++ = pm4_type0_packet(mmTP0_CHICKEN, 1); *cmds++ = 0x00000000; + /* Set PA_SC_AA_CONFIG to 0 */ + //*cmds++ = pm4_type0_packet(mmPA_SC_AA_CONFIG, 1); + //*cmds++ = 0x00000000; + // ---------------- // shader constants // ---------------- @@ -920,7 +906,7 @@ build_sys2gmem_cmds(gsl_drawctxt_t *drawctxt, ctx_t* ctx, gmem_shadow_t *shadow) // texture constants *cmds++ = pm4_type3_packet(PM4_SET_CONSTANT, (SYS2GMEM_TEX_CONST_LEN + 1)); *cmds++ = (0x1 << 16) | (0 * 6); - kos_memcpy(cmds, sys2gmem_tex_const, SYS2GMEM_TEX_CONST_LEN<<2); + memcpy(cmds, sys2gmem_tex_const, SYS2GMEM_TEX_CONST_LEN<<2); cmds[0] |= (shadow->pitch >> 5) << 22; cmds[1] |= shadow->gmemshadow.gpuaddr | surface_format_table[shadow->format]; cmds[2] |= (shadow->width+shadow->offset_x-1) | (shadow->height+shadow->offset_y-1) << 13; @@ -1127,10 +1113,10 @@ static void set_gmem_copy_quad( gmem_shadow_t* shadow ) gmem_copy_texcoord[5] = gmem_copy_texcoord[7] = tex_offset[1]; // copy quad data to vertex buffer - kos_memcpy(shadow->quad_vertices.hostptr, gmem_copy_quad, QUAD_LEN << 2); + memcpy(shadow->quad_vertices.hostptr, gmem_copy_quad, QUAD_LEN << 2); // copy tex coord data to tex coord buffer - kos_memcpy(shadow->quad_texcoords.hostptr, gmem_copy_texcoord, TEXCOORD_LEN << 2); + memcpy(shadow->quad_texcoords.hostptr, gmem_copy_texcoord, TEXCOORD_LEN << 2); } @@ -1367,7 +1353,7 @@ create_gmem_shadow(gsl_device_t *device, gsl_drawctxt_t *drawctxt, ctx_t *ctx) } else { - kos_memset( &drawctxt->context_gmem_shadow.gmemshadow, 0, sizeof( gsl_memdesc_t ) ); + memset( &drawctxt->context_gmem_shadow.gmemshadow, 0, sizeof( gsl_memdesc_t ) ); } // build quad vertex buffer @@ -1406,8 +1392,6 @@ create_gmem_shadow(gsl_device_t *device, gsl_drawctxt_t *drawctxt, ctx_t *ctx) int kgsl_drawctxt_init(gsl_device_t *device) { - GSL_CONTEXT_MUTEX_CREATE(); - return (GSL_SUCCESS); } @@ -1419,8 +1403,6 @@ kgsl_drawctxt_init(gsl_device_t *device) int kgsl_drawctxt_close(gsl_device_t *device) { - GSL_CONTEXT_MUTEX_FREE(); - return (GSL_SUCCESS); } @@ -1437,11 +1419,9 @@ kgsl_drawctxt_create(gsl_device_t* device, gsl_context_type_t type, unsigned int ctx_t ctx; kgsl_device_active(device); - - GSL_CONTEXT_MUTEX_LOCK(); + if (device->drawctxt_count >= GSL_CONTEXT_MAX) { - GSL_CONTEXT_MUTEX_UNLOCK(); return (GSL_FAILURE); } @@ -1457,15 +1437,14 @@ kgsl_drawctxt_create(gsl_device_t* device, gsl_context_type_t type, unsigned int if (index >= GSL_CONTEXT_MAX) { - GSL_CONTEXT_MUTEX_UNLOCK(); - return (GSL_FAILURE); + return (GSL_FAILURE); } drawctxt = &device->drawctxt[index]; - kos_memset( &drawctxt->context_gmem_shadow, 0, sizeof( gmem_shadow_t ) ); + memset( &drawctxt->context_gmem_shadow, 0, sizeof( gmem_shadow_t ) ); - drawctxt->pid = GSL_CALLER_PROCESSID_GET(); + drawctxt->pid = current->tgid; drawctxt->flags = CTXT_FLAGS_IN_USE; drawctxt->type = type; @@ -1477,7 +1456,7 @@ kgsl_drawctxt_create(gsl_device_t* device, gsl_context_type_t type, unsigned int if (create_gpustate_shadow(device, drawctxt, &ctx) != GSL_SUCCESS) { kgsl_drawctxt_destroy(device, index); - GSL_CONTEXT_MUTEX_UNLOCK(); + return (GSL_FAILURE); } @@ -1485,22 +1464,21 @@ kgsl_drawctxt_create(gsl_device_t* device, gsl_context_type_t type, unsigned int drawctxt->flags |= ( CTXT_FLAGS_SHADER_SAVE | CTXT_FLAGS_GMEM_SHADOW ); // Clear out user defined GMEM shadow buffer structs - kos_memset( drawctxt->user_gmem_shadow, 0, sizeof(gmem_shadow_t)*GSL_MAX_GMEM_SHADOW_BUFFERS ); + memset( drawctxt->user_gmem_shadow, 0, sizeof(gmem_shadow_t)*GSL_MAX_GMEM_SHADOW_BUFFERS ); // create gmem shadow if (create_gmem_shadow(device, drawctxt, &ctx) != GSL_SUCCESS) { kgsl_drawctxt_destroy(device, index); - GSL_CONTEXT_MUTEX_UNLOCK(); + return (GSL_FAILURE); } - KOS_ASSERT(ctx.cmd - ctx.start <= CMD_BUFFER_LEN); + DEBUG_ASSERT(ctx.cmd - ctx.start <= CMD_BUFFER_LEN); } *drawctxt_id = index; - GSL_CONTEXT_MUTEX_UNLOCK(); return (GSL_SUCCESS); } @@ -1514,8 +1492,6 @@ kgsl_drawctxt_destroy(gsl_device_t* device, unsigned int drawctxt_id) { gsl_drawctxt_t *drawctxt; - GSL_CONTEXT_MUTEX_LOCK(); - drawctxt = &device->drawctxt[drawctxt_id]; if (drawctxt->flags != CTXT_FLAGS_NOT_IN_USE) @@ -1533,13 +1509,13 @@ kgsl_drawctxt_destroy(gsl_device_t* device, unsigned int drawctxt_id) // destroy state shadow, if allocated if (drawctxt->flags & CTXT_FLAGS_STATE_SHADOW) - kgsl_sharedmem_free0(&drawctxt->gpustate, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&drawctxt->gpustate, current->tgid); // destroy gmem shadow, if allocated if (drawctxt->context_gmem_shadow.gmemshadow.size > 0) { - kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, current->tgid); drawctxt->context_gmem_shadow.gmemshadow.size = 0; } @@ -1547,11 +1523,9 @@ kgsl_drawctxt_destroy(gsl_device_t* device, unsigned int drawctxt_id) drawctxt->pid = 0; device->drawctxt_count--; - KOS_ASSERT(device->drawctxt_count >= 0); + DEBUG_ASSERT(device->drawctxt_count >= 0); } - GSL_CONTEXT_MUTEX_UNLOCK(); - return (GSL_SUCCESS); } @@ -1577,15 +1551,14 @@ kgsl_drawctxt_destroy(gsl_device_t* device, unsigned int drawctxt_id) // // ////////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned int drawctxt_id, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id) +int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned int drawctxt_id, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id) { gsl_device_t *device = &gsl_driver.device[device_id-1]; gsl_drawctxt_t *drawctxt = &device->drawctxt[drawctxt_id]; gmem_shadow_t *shadow = &drawctxt->user_gmem_shadow[buffer_id]; unsigned int i; - GSL_API_MUTEX_LOCK(); - GSL_CONTEXT_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); if( !shadow_buffer->enabled ) { @@ -1595,23 +1568,23 @@ KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned i else { // Sanity checks - KOS_ASSERT((gmem_rect->x % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT((gmem_rect->y % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT((gmem_rect->width % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT((gmem_rect->height % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT((gmem_rect->pitch % 32) == 0); // Needs to be a multiple of 32 + DEBUG_ASSERT((gmem_rect->x % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((gmem_rect->y % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((gmem_rect->width % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((gmem_rect->height % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((gmem_rect->pitch % 32) == 0); // Needs to be a multiple of 32 - KOS_ASSERT((shadow_x % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT((shadow_y % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((shadow_x % 2) == 0); // Needs to be a multiple of 2 + DEBUG_ASSERT((shadow_y % 2) == 0); // Needs to be a multiple of 2 - KOS_ASSERT(shadow_buffer->format >= COLORX_4_4_4_4); - KOS_ASSERT(shadow_buffer->format <= COLORX_32_32_32_32_FLOAT); - KOS_ASSERT((shadow_buffer->pitch % 32) == 0); // Needs to be a multiple of 32 - KOS_ASSERT(buffer_id >= 0); - KOS_ASSERT(buffer_id < GSL_MAX_GMEM_SHADOW_BUFFERS); + DEBUG_ASSERT(shadow_buffer->format >= COLORX_4_4_4_4); + DEBUG_ASSERT(shadow_buffer->format <= COLORX_32_32_32_32_FLOAT); + DEBUG_ASSERT((shadow_buffer->pitch % 32) == 0); // Needs to be a multiple of 32 + DEBUG_ASSERT(buffer_id >= 0); + DEBUG_ASSERT(buffer_id < GSL_MAX_GMEM_SHADOW_BUFFERS); // Set up GMEM shadow regions - kos_memcpy( &shadow->gmemshadow, &shadow_buffer->data, sizeof( gsl_memdesc_t ) ); + memcpy( &shadow->gmemshadow, &shadow_buffer->data, sizeof( gsl_memdesc_t ) ); shadow->size = shadow->gmemshadow.size; shadow->width = shadow_buffer->width; @@ -1641,7 +1614,7 @@ KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned i // Release context GMEM shadow if found if (drawctxt->context_gmem_shadow.gmemshadow.size > 0) { - kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, current->tgid); drawctxt->context_gmem_shadow.gmemshadow.size = 0; } } @@ -1656,8 +1629,7 @@ KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned i } } - GSL_CONTEXT_MUTEX_UNLOCK(); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return (GSL_SUCCESS); } @@ -1794,8 +1766,6 @@ kgsl_drawctxt_destroyall(gsl_device_t *device) int i; gsl_drawctxt_t *drawctxt; - GSL_CONTEXT_MUTEX_LOCK(); - for (i = 0; i < GSL_CONTEXT_MAX; i++) { drawctxt = &device->drawctxt[i]; @@ -1804,24 +1774,22 @@ kgsl_drawctxt_destroyall(gsl_device_t *device) { // destroy state shadow, if allocated if (drawctxt->flags & CTXT_FLAGS_STATE_SHADOW) - kgsl_sharedmem_free0(&drawctxt->gpustate, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&drawctxt->gpustate, current->tgid); // destroy gmem shadow, if allocated if (drawctxt->context_gmem_shadow.gmemshadow.size > 0) { - kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&drawctxt->context_gmem_shadow.gmemshadow, current->tgid); drawctxt->context_gmem_shadow.gmemshadow.size = 0; } drawctxt->flags = CTXT_FLAGS_NOT_IN_USE; device->drawctxt_count--; - KOS_ASSERT(device->drawctxt_count >= 0); + DEBUG_ASSERT(device->drawctxt_count >= 0); } } - GSL_CONTEXT_MUTEX_UNLOCK(); - return (GSL_SUCCESS); } diff --git a/drivers/mxc/amd-gpu/common/gsl_driver.c b/drivers/mxc/amd-gpu/gsl_driver.c similarity index 88% rename from drivers/mxc/amd-gpu/common/gsl_driver.c rename to drivers/mxc/amd-gpu/gsl_driver.c index b8c5170a142..679ba7b97e5 100644 --- a/drivers/mxc/amd-gpu/common/gsl_driver.c +++ b/drivers/mxc/amd-gpu/gsl_driver.c @@ -16,6 +16,8 @@ * */ +#include + #include "gsl.h" #include "gsl_hal.h" @@ -53,16 +55,11 @@ kgsl_driver_init0(gsl_flags_t flags, gsl_flags_t flags_debug) if (!(gsl_driver_initialized & GSL_FLAGS_INITIALIZED0)) { #ifdef GSL_LOG - // Uncomment these to enable logging. - //kgsl_log_init(); - //kgsl_log_open_stdout( KGSL_LOG_GROUP_ALL | KGSL_LOG_LEVEL_ALL | KGSL_LOG_TIMESTAMP - // | KGSL_LOG_THREAD_ID | KGSL_LOG_PROCESS_ID ); - //kgsl_log_open_file( "c:\\kgsl_log.txt", KGSL_LOG_GROUP_ALL | KGSL_LOG_LEVEL_ALL | KGSL_LOG_TIMESTAMP - // | KGSL_LOG_THREAD_ID | KGSL_LOG_PROCESS_ID ); + kgsl_log_start( KGSL_LOG_GROUP_ALL | KGSL_LOG_LEVEL_ALL | KGSL_LOG_TIMESTAMP + | KGSL_LOG_THREAD_ID | KGSL_LOG_PROCESS_ID ); #endif - kos_memset(&gsl_driver, 0, sizeof(gsl_driver_t)); - - GSL_API_MUTEX_CREATE(); + memset(&gsl_driver, 0, sizeof(gsl_driver_t)); + mutex_init(&gsl_driver.lock); } #ifdef _DEBUG @@ -83,7 +80,7 @@ kgsl_driver_init0(gsl_flags_t flags, gsl_flags_t flags_debug) if (!(gsl_driver_initialized & GSL_FLAGS_INITIALIZED0)) { - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); // init hal status = kgsl_hal_init(); @@ -94,7 +91,7 @@ kgsl_driver_init0(gsl_flags_t flags, gsl_flags_t flags_debug) gsl_driver_initialized |= GSL_FLAGS_INITIALIZED0; } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); } return (status); @@ -109,17 +106,13 @@ kgsl_driver_close0(gsl_flags_t flags) if ((gsl_driver_initialized & GSL_FLAGS_INITIALIZED0) && (gsl_driver_initialized & flags)) { - GSL_API_MUTEX_LOCK(); - - // close hall + mutex_lock(&gsl_driver.lock); + // close hal status = kgsl_hal_close(); - - GSL_API_MUTEX_UNLOCK(); - - GSL_API_MUTEX_FREE(); + mutex_unlock(&gsl_driver.lock); #ifdef GSL_LOG - kgsl_log_close(); + kgsl_log_finish(); #endif gsl_driver_initialized &= ~flags; @@ -138,7 +131,7 @@ kgsl_driver_close0(gsl_flags_t flags) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_driver_init() { // only an external (platform specific device driver) component should call this @@ -148,7 +141,7 @@ kgsl_driver_init() //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_driver_close() { // only an external (platform specific device driver) component should call this @@ -158,7 +151,7 @@ kgsl_driver_close() //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_driver_entry(gsl_flags_t flags) { int status = GSL_FAILURE; @@ -170,11 +163,11 @@ kgsl_driver_entry(gsl_flags_t flags) return (GSL_FAILURE); } - kgsl_log_write( KGSL_LOG_GROUP_DRIVER | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_driver_entry( gsl_flags_t flags=%d )\n", flags ); + kgsl_log_write( KGSL_LOG_GROUP_DRIVER | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_driver_entry( gsl_flags_t flags=%x )\n", flags ); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); - pid = GSL_CALLER_PROCESSID_GET(); + pid = current->tgid; // if caller process has not already opened access status = kgsl_driver_getcallerprocessindex(pid, &index); @@ -238,7 +231,7 @@ kgsl_driver_entry(gsl_flags_t flags) } } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_DRIVER | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_driver_entry. Return value: %B\n", status ); @@ -253,7 +246,7 @@ kgsl_driver_exit0(unsigned int pid) int status = GSL_SUCCESS; int index, i; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); if (gsl_driver_initialized & GSL_FLAGS_INITIALIZED) { @@ -294,7 +287,7 @@ kgsl_driver_exit0(unsigned int pid) } } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); if (!(gsl_driver_initialized & GSL_FLAGS_INITIALIZED)) { @@ -306,14 +299,14 @@ kgsl_driver_exit0(unsigned int pid) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_driver_exit(void) { int status; kgsl_log_write( KGSL_LOG_GROUP_DRIVER | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_driver_exit()\n" ); - status = kgsl_driver_exit0(GSL_CALLER_PROCESSID_GET()); + status = kgsl_driver_exit0(current->tgid); kgsl_log_write( KGSL_LOG_GROUP_DRIVER | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_driver_exit(). Return value: %B\n", status ); @@ -322,7 +315,7 @@ kgsl_driver_exit(void) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_driver_destroy(unsigned int pid) { return (kgsl_driver_exit0(pid)); diff --git a/drivers/mxc/amd-gpu/common/gsl_g12.c b/drivers/mxc/amd-gpu/gsl_g12.c similarity index 83% rename from drivers/mxc/amd-gpu/common/gsl_g12.c rename to drivers/mxc/amd-gpu/gsl_g12.c index 8286e8e6a6a..e7fb131a157 100644 --- a/drivers/mxc/amd-gpu/common/gsl_g12.c +++ b/drivers/mxc/amd-gpu/gsl_g12.c @@ -16,13 +16,13 @@ * */ +#include +#include +#include + #include "gsl.h" #include "gsl_hal.h" -#include "kos_libapi.h" #include "gsl_cmdstream.h" -#ifdef _LINUX -#include -#endif #ifdef CONFIG_ARCH_MX35 #define V3_SYNC @@ -110,9 +110,6 @@ static int kgsl_g12_context_create(gsl_device_t* device, gsl_context_type_t type static int kgsl_g12_context_destroy(gsl_device_t* device, unsigned int drawctxt_id); static unsigned int drawctx_id = 0; static int kgsl_g12_idle(gsl_device_t *device, unsigned int timeout); -#ifndef _LINUX -static void irq_thread(void); -#endif //---------------------------------------------------------------------------- @@ -125,16 +122,14 @@ kgsl_g12_intrcallback(gsl_intrid_t id, void *cookie) { // non-error condition interrupt case GSL_INTR_G12_G2D: -#ifdef _LINUX queue_work(device->irq_workq, &(device->irq_work)); break; -#endif #ifndef _Z180 case GSL_INTR_G12_FBC: -#endif //_Z180 // signal intr completion event - kos_event_signal(device->intr.evnt[id]); + complete_all(&device->intr.evnt[id]); break; +#endif //_Z180 // error condition interrupt case GSL_INTR_G12_FIFO: @@ -227,7 +222,6 @@ kgsl_g12_setpagetable(gsl_device_t *device, unsigned int reg_ptbase, gpuaddr_t p //---------------------------------------------------------------------------- -#ifdef _LINUX static void kgsl_g12_updatetimestamp(gsl_device_t *device) { unsigned int count = 0; @@ -259,7 +253,7 @@ static void kgsl_g12_irqerr(struct work_struct *work) gsl_device_t *device = &gsl_driver.device[GSL_DEVICE_G12-1]; device->ftbl.device_destroy(device); } -#endif + //---------------------------------------------------------------------------- @@ -302,7 +296,7 @@ kgsl_g12_init(gsl_device_t *device) #ifdef IRQTHREAD_POLL // Create event to trigger IRQ polling thread - device->irqthread_event = kos_event_create(0); + init_completion(&device->irqthread_event); #endif // enable interrupts @@ -317,16 +311,9 @@ kgsl_g12_init(gsl_device_t *device) #endif //_Z180 // create thread for IRQ handling -#if defined(__SYMBIAN32__) - kos_thread_create( (oshandle_t)irq_thread, &(device->irq_thread) ); -#elif defined(_LINUX) - device->irq_workq = create_singlethread_workqueue("z1xx_workq"); - INIT_WORK(&device->irq_work, kgsl_g12_irqtask); - INIT_WORK(&device->irq_err_work, kgsl_g12_irqerr); -#else - #pragma warning(disable:4152) - device->irq_thread_handle = kos_thread_create( (oshandle_t)irq_thread, &(device->irq_thread) ); -#endif + device->irq_workq = create_singlethread_workqueue("z160_workqueue"); + INIT_WORK(&device->irq_work, kgsl_g12_irqtask); + INIT_WORK(&device->irq_err_work, kgsl_g12_irqerr); return (status); } @@ -344,13 +331,9 @@ kgsl_g12_close(gsl_device_t *device) // empty irq counters. Otherwise there's a possibility to have them in // registers next time systems starts up and this results in a hang. status = device->ftbl.device_idle(device, 1000); - KOS_ASSERT(status == GSL_SUCCESS); + DEBUG_ASSERT(status == GSL_SUCCESS); -#ifndef _LINUX - kos_thread_destroy(device->irq_thread_handle); -#else - destroy_workqueue(device->irq_workq); -#endif + destroy_workqueue(device->irq_workq); // shutdown command window kgsl_cmdwindow_close(device); @@ -374,15 +357,11 @@ kgsl_g12_close(gsl_device_t *device) device->flags &= ~GSL_FLAGS_INITIALIZED; -#if defined(__SYMBIAN32__) - while(device->irq_thread) - { - kos_sleep(20); - } -#endif drawctx_id = 0; - KOS_ASSERT(g_z1xx.numcontext == 0); + DEBUG_ASSERT(g_z1xx.numcontext == 0); + + memset(&g_z1xx, 0, sizeof(gsl_z1xx_t)); } return (GSL_SUCCESS); @@ -398,7 +377,7 @@ kgsl_g12_destroy(gsl_device_t *device) #ifdef _DEBUG // for now, signal catastrophic failure in a brute force way - KOS_ASSERT(0); + DEBUG_ASSERT(0); #endif // _DEBUG //todo: hard reset core? @@ -437,7 +416,7 @@ kgsl_g12_start(gsl_device_t *device, gsl_flags_t flags) return (status); } - KOS_ASSERT(g_z1xx.numcontext == 0); + DEBUG_ASSERT(g_z1xx.numcontext == 0); device->flags |= GSL_FLAGS_STARTED; @@ -451,11 +430,11 @@ kgsl_g12_stop(gsl_device_t *device) { int status; - KOS_ASSERT(device->refcnt == 0); + DEBUG_ASSERT(device->refcnt == 0); /* wait for device to idle before setting it's clock off */ status = device->ftbl.device_idle(device, 1000); - KOS_ASSERT(status == GSL_SUCCESS); + DEBUG_ASSERT(status == GSL_SUCCESS); status = kgsl_hal_setpowerstate(device->id, GSL_PWRFLAGS_CLK_OFF, 0); device->flags &= ~GSL_FLAGS_STARTED; @@ -476,7 +455,7 @@ kgsl_g12_getproperty(gsl_device_t *device, gsl_property_type_t type, void *value { gsl_devinfo_t *devinfo = (gsl_devinfo_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_devinfo_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_devinfo_t)); devinfo->device_id = device->id; devinfo->chip_id = (gsl_chipid_t)device->chip_id; @@ -502,13 +481,13 @@ kgsl_g12_setproperty(gsl_device_t *device, gsl_property_type_t type, void *value int status = GSL_FAILURE; // unreferenced formal parameters - (void) device; + (void) device; if (type == GSL_PROP_DEVICE_POWER) { gsl_powerprop_t *power = (gsl_powerprop_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_powerprop_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_powerprop_t)); if (!(device->flags & GSL_FLAGS_SAFEMODE)) { @@ -522,7 +501,7 @@ kgsl_g12_setproperty(gsl_device_t *device, gsl_property_type_t type, void *value //---------------------------------------------------------------------------- -int +int kgsl_g12_idle(gsl_device_t *device, unsigned int timeout) { if ( device->flags & GSL_FLAGS_STARTED ) @@ -533,7 +512,7 @@ kgsl_g12_idle(gsl_device_t *device, unsigned int timeout) gsl_timestamp_t ts_diff = retired - device->current_timestamp; if ( ts_diff >= 0 || ts_diff < -GSL_TIMESTAMP_EPSILON ) break; - kos_sleep(10); + msleep(10); } } @@ -542,7 +521,7 @@ kgsl_g12_idle(gsl_device_t *device, unsigned int timeout) //---------------------------------------------------------------------------- -int +int kgsl_g12_regread(gsl_device_t *device, unsigned int offsetwords, unsigned int *value) { // G12 MH register values can only be retrieved via dedicated read registers @@ -596,9 +575,7 @@ int kgsl_g12_waitirq(gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout) { int status = GSL_FAILURE_NOTSUPPORTED; -#ifdef VG_HDK - (void)timeout; -#endif + int complete = 0; #ifndef _Z180 if (intr_id == GSL_INTR_G12_G2D || intr_id == GSL_INTR_G12_FBC) @@ -606,29 +583,30 @@ kgsl_g12_waitirq(gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count if (intr_id == GSL_INTR_G12_G2D) #endif //_Z180 { -#ifndef VG_HDK if (kgsl_intr_isenabled(&device->intr, intr_id) == GSL_SUCCESS) -#endif { - // wait until intr completion event is received and check that + // wait until intr completion event is received and check that // the interrupt is still enabled. If event is received, but - // interrupt is not enabled any more, the driver is shutting + // interrupt is not enabled any more, the driver is shutting // down and event structure is not valid anymore. -#ifndef VG_HDK - if (kos_event_wait(device->intr.evnt[intr_id], timeout) == OS_SUCCESS && kgsl_intr_isenabled(&device->intr, intr_id) == GSL_SUCCESS) -#endif + + if (timeout != OS_INFINITE) + complete = wait_for_completion_timeout(&device->intr.evnt[intr_id], msecs_to_jiffies(timeout)); + else + complete = wait_for_completion_killable(&device->intr.evnt[intr_id]); + + if (complete && kgsl_intr_isenabled(&device->intr, intr_id) == GSL_SUCCESS) { unsigned int cntrs; int i; + struct completion *comp = &device->intr.evnt[intr_id]; + kgsl_device_active(device); -#ifndef VG_HDK - kos_event_reset(device->intr.evnt[intr_id]); + + INIT_COMPLETION(*comp); device->ftbl.device_regread(device, (ADDR_VGC_IRQ_ACTIVE_CNT >> 2), &cntrs); -#else - device->ftbl.device_regread(device, (0x38 >> 2), &cntrs); -#endif - for (i = 0; i < GSL_G12_INTR_COUNT; i++) + for (i = 0; i < GSL_G12_INTR_COUNT; i++) { int intrcnt = cntrs >> ((8 * i)) & 255; @@ -643,19 +621,17 @@ kgsl_g12_waitirq(gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count device->intrcnt[intr_id - GSL_INTR_G12_MH] = 0; status = GSL_SUCCESS; } -#ifndef VG_HDK else { status = GSL_FAILURE_TIMEOUT; } -#endif } } else if(intr_id == GSL_INTR_FOOBAR) { if (kgsl_intr_isenabled(&device->intr, GSL_INTR_G12_G2D) == GSL_SUCCESS) { - kos_event_signal(device->intr.evnt[GSL_INTR_G12_G2D]); + complete_all(&device->intr.evnt[GSL_INTR_G12_G2D]); } } @@ -667,9 +643,6 @@ kgsl_g12_waitirq(gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count int kgsl_g12_waittimestamp(gsl_device_t *device, gsl_timestamp_t timestamp, unsigned int timeout) { -#ifndef _LINUX - return kos_event_wait( device->timestamp_event, timeout ); -#else int status = wait_event_interruptible_timeout(device->timestamp_waitq, kgsl_cmdstream_check_timestamp(device->id, timestamp), msecs_to_jiffies(timeout)); @@ -677,7 +650,6 @@ kgsl_g12_waittimestamp(gsl_device_t *device, gsl_timestamp_t timestamp, unsigned return GSL_SUCCESS; else return GSL_FAILURE; -#endif } int @@ -711,7 +683,7 @@ kgsl_g12_getfunctable(gsl_functable_t *ftbl) static void addmarker(gsl_z1xx_t* z1xx) { - KOS_ASSERT(z1xx); + DEBUG_ASSERT(z1xx); { unsigned int *p = z1xx->cmdbuf[z1xx->curr]; /* todo: use symbolic values */ @@ -732,7 +704,7 @@ static void addmarker(gsl_z1xx_t* z1xx) static void beginpacket(gsl_z1xx_t* z1xx, gpuaddr_t cmd, unsigned int nextcnt) { unsigned int *p = z1xx->cmdbuf[z1xx->curr]; - + p[z1xx->offs++] = 0x7C000176; p[z1xx->offs++] = 5; p[z1xx->offs++] = ADDR_VGV3_LAST<<24; @@ -752,7 +724,7 @@ kgsl_g12_issueibcmds(gsl_device_t* device, int drawctxt_index, gpuaddr_t ibaddr, { unsigned int ofs = PACKETSIZE_STATESTREAM*sizeof(unsigned int); unsigned int cnt = 5; - unsigned int cmd = ibaddr; + unsigned int cmd = ibaddr; unsigned int nextbuf = (g_z1xx.curr+1)%GSL_HAL_NUMCMDBUFFERS; unsigned int nextaddr = g_z1xx.cmdbufdesc[nextbuf].gpuaddr; unsigned int nextcnt = 0x9000|5; @@ -767,22 +739,17 @@ kgsl_g12_issueibcmds(gsl_device_t* device, int drawctxt_index, gpuaddr_t ibaddr, /* wait for the next buffer's timestamp to occur */ while(processed_timestamp < g_z1xx.timestamp[nextbuf]) { -#ifndef _LINUX - kos_event_wait(device->timestamp_event, 1000); - kos_event_reset(device->timestamp_event); -#else kgsl_cmdstream_waittimestamp(device->id, g_z1xx.timestamp[nextbuf], 1000); -#endif GSL_CMDSTREAM_GET_EOP_TIMESTAMP(device, (int *)&processed_timestamp); } - + *timestamp = g_z1xx.timestamp[nextbuf] = device->current_timestamp + 1; /* context switch */ if (drawctxt_index != (int)g_z1xx.prevctx) { cnt = PACKETSIZE_STATESTREAM; - ofs = 0; + ofs = 0; } g_z1xx.prevctx = drawctxt_index; @@ -793,7 +760,7 @@ kgsl_g12_issueibcmds(gsl_device_t* device, int drawctxt_index, gpuaddr_t ibaddr, kgsl_sharedmem_write0(&tmp, 4, &nextaddr, 4, false); kgsl_sharedmem_write0(&tmp, 8, &nextcnt, 4, false); - /* sync mem */ + /* sync mem */ kgsl_sharedmem_write0((const gsl_memdesc_t *)&g_z1xx.cmdbufdesc[g_z1xx.curr], 0, g_z1xx.cmdbuf[g_z1xx.curr], (512 + 13) * sizeof(unsigned int), false); g_z1xx.offs = 0; @@ -832,26 +799,26 @@ kgsl_g12_context_create(gsl_device_t* device, gsl_context_type_t type, unsigned (void) type; //(void) drawctxt_id; (void) flags; - + kgsl_device_active(device); - + if (g_z1xx.numcontext==0) { g_z1xx.nextUniqueContextID = 0; - /* todo: move this to device create or start. Error checking!! */ + /* todo: move this to device create or start. Error checking!! */ for (i=0;itgid); + kfree(g_z1xx.cmdbuf[i]); } - kgsl_sharedmem_free0(&g_z1xx.e0, GSL_CALLER_PROCESSID_GET()); - kgsl_sharedmem_free0(&g_z1xx.e1, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&g_z1xx.e0, current->tgid); + kgsl_sharedmem_free0(&g_z1xx.e1, current->tgid); #ifdef _Z180 - kgsl_sharedmem_free0(&g_z1xx.e2, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&g_z1xx.e2, current->tgid); #endif - kos_memset(&g_z1xx,0,sizeof(gsl_z1xx_t)); } return (GSL_SUCCESS); } -//---------------------------------------------------------------------------- -#if !defined GSL_BLD_YAMATO && (!defined __SYMBIAN32__ || defined __WINSCW__) -KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned int drawctxt_id, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id) -{ - (void)device_id; - (void)drawctxt_id; - (void)gmem_rect; - (void)shadow_x; - (void)shadow_y; - (void)shadow_buffer; - (void)buffer_id; - return (GSL_FAILURE); -} -#endif -//---------------------------------------------------------------------------- - -#ifndef _LINUX -static void irq_thread(void) -{ - int error = 0; - unsigned int irq_count; - gsl_device_t* device = &gsl_driver.device[GSL_DEVICE_G12-1]; - gsl_timestamp_t timestamp; - - while( !error ) - { -#ifdef IRQTHREAD_POLL - if(kos_event_wait(device->irqthread_event, GSL_IRQ_TIMEOUT)==GSL_SUCCESS) - { - kgsl_g12_waitirq(device, GSL_INTR_G12_G2D, &irq_count, GSL_IRQ_TIMEOUT); -#else - - if( kgsl_g12_waitirq(device, GSL_INTR_G12_G2D, &irq_count, GSL_IRQ_TIMEOUT) == GSL_SUCCESS ) - { -#endif - /* Read a timestamp value */ -#ifdef VG_HDK - timestamp = device->timestamp; -#else - GSL_CMDSTREAM_GET_EOP_TIMESTAMP(device, (int *)×tamp); -#endif - /* Increase the timestamp value */ - timestamp += irq_count; - - /* Write the new timestamp value */ - device->timestamp = timestamp; - kgsl_sharedmem_write0(&device->memstore, GSL_DEVICE_MEMSTORE_OFFSET(eoptimestamp), ×tamp, 4, false); - -#ifdef V3_SYNC - if (device->current_timestamp > device->timestamp) - { - kgsl_cmdwindow_write0(2, GSL_CMDWINDOW_2D, ADDR_VGV3_CONTROL, 2); - kgsl_cmdwindow_write0(2, GSL_CMDWINDOW_2D, ADDR_VGV3_CONTROL, 0); - } -#endif - - /* Notify timestamp event */ -#ifndef _LINUX - kos_event_signal( device->timestamp_event ); -#else - wake_up_interruptible_all(&(device->timestamp_waitq)); -#endif - } - else - { - /* Timeout */ - - - if(!(device->flags&GSL_FLAGS_INITIALIZED)) - { - /* if device is closed -> thread exit */ -#if defined(__SYMBIAN32__) - device->irq_thread = 0; -#endif - return; - } - } - } -} -#endif - //---------------------------------------------------------------------------- static int kgsl_g12_addtimestamp(gsl_device_t* device, gsl_timestamp_t *timestamp) -{ +{ device->current_timestamp++; *timestamp = device->current_timestamp; - + return (GSL_SUCCESS); } #endif diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c b/drivers/mxc/amd-gpu/gsl_hal.c similarity index 75% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c rename to drivers/mxc/amd-gpu/gsl_hal.c index 8d452830cc0..1aca6df25a0 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c +++ b/drivers/mxc/amd-gpu/gsl_hal.c @@ -17,7 +17,7 @@ */ /* - * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. */ #include "gsl_hal.h" @@ -34,11 +34,13 @@ #include #include +#include + #define GSL_HAL_MEM1 0 #define GSL_HAL_MEM2 1 -#define GSL_HAL_MEM3 2 +//#define GSL_HAL_MEM3 2 -/* #define GSL_HAL_DEBUG */ +#define GSL_HAL_DEBUG extern phys_addr_t gpu_2d_regbase; extern int gpu_2d_regsize; @@ -48,6 +50,7 @@ extern int gmem_size; extern phys_addr_t gpu_reserved_mem; extern int gpu_reserved_mem_size; extern int gpu_2d_irq, gpu_3d_irq; +extern int enable_mmu; KGSLHAL_API int @@ -89,20 +92,20 @@ KGSLHAL_API int kgsl_hal_init(void) { gsl_hal_t *hal; - unsigned long totalsize, mem1size; + unsigned long physsize, virtsize; unsigned int va, pa; if (gsl_driver.hal) { return GSL_FAILURE_ALREADYINITIALIZED; } - gsl_driver.hal = (void *)kos_malloc(sizeof(gsl_hal_t)); + gsl_driver.hal = (void *)kmalloc(sizeof(gsl_hal_t), GFP_KERNEL); if (!gsl_driver.hal) { return GSL_FAILURE_OUTOFMEM; } - kos_memset(gsl_driver.hal, 0, sizeof(gsl_hal_t)); + memset(gsl_driver.hal, 0, sizeof(gsl_hal_t)); /* overlay structure on hal memory */ @@ -120,8 +123,7 @@ kgsl_hal_init(void) hal->has_z160 = 0; } - /* there is still some problem to enable mmu currently */ - gsl_driver.enable_mmu = 0; + gsl_driver.enable_mmu = enable_mmu; /* setup register space */ if (hal->has_z430) { @@ -156,92 +158,85 @@ kgsl_hal_init(void) #endif } + physsize = SZ_8M; + if (gsl_driver.enable_mmu) { - totalsize = GSL_HAL_SHMEM_SIZE_EMEM2_MMU + GSL_HAL_SHMEM_SIZE_PHYS_MMU; - mem1size = GSL_HAL_SHMEM_SIZE_EMEM1_MMU; - if (gpu_reserved_mem && gpu_reserved_mem_size >= totalsize) { + printk(KERN_INFO "GPU MMU enabled\n"); + virtsize = GSL_HAL_SHMEM_SIZE_EMEM_MMU; + if (gpu_reserved_mem && gpu_reserved_mem_size >= physsize) { pa = gpu_reserved_mem; - va = (unsigned int)ioremap(gpu_reserved_mem, totalsize); + va = (unsigned int)ioremap/*_wc*/(gpu_reserved_mem, gpu_reserved_mem_size); + physsize = gpu_reserved_mem_size; } else { - va = (unsigned int)dma_alloc_coherent(0, totalsize, (dma_addr_t *)&pa, GFP_DMA | GFP_KERNEL); + if (gpu_reserved_mem_size > 0) { + printk(KERN_INFO "Reallocating PHYS aperture: reserved memory going to waste\n"); + } + gpu_reserved_mem = 0; + va = (unsigned int)dma_alloc_coherent(0, physsize, (dma_addr_t *)&pa, GFP_DMA | GFP_KERNEL); } } else { - if (gpu_reserved_mem && gpu_reserved_mem_size >= SZ_8M) { - totalsize = gpu_reserved_mem_size; + printk(KERN_INFO "GPU MMU disabled\n"); + if (gpu_reserved_mem && gpu_reserved_mem_size >= physsize) { + physsize = gpu_reserved_mem_size; pa = gpu_reserved_mem; va = (unsigned int)ioremap(gpu_reserved_mem, gpu_reserved_mem_size); } else { + if (gpu_reserved_mem_size > 0) { + printk(KERN_INFO "Reallocating PHYS aperture: reserved memory going to waste\n"); + } gpu_reserved_mem = 0; - totalsize = GSL_HAL_SHMEM_SIZE_EMEM1_NOMMU + GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU + GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; - va = (unsigned int)dma_alloc_coherent(0, totalsize, (dma_addr_t *)&pa, GFP_DMA | GFP_KERNEL); + physsize = GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; + va = (unsigned int)dma_alloc_coherent(0, physsize, (dma_addr_t *)&pa, GFP_DMA | GFP_KERNEL); } - mem1size = totalsize - (GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU + GSL_HAL_SHMEM_SIZE_PHYS_NOMMU); + virtsize = physsize - GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; } if (va) { - kos_memset((void *)va, 0, totalsize); + memset((void *)va, 0, physsize); hal->memchunk.mmio_virt_base = (void *)va; hal->memchunk.mmio_phys_base = pa; - hal->memchunk.sizebytes = totalsize; + hal->memchunk.sizebytes = physsize; #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->memchunk.mmio_phys_base = 0x%p\n", __func__, (void *)hal->memchunk.mmio_phys_base); - printk(KERN_INFO "%s: hal->memchunk.mmio_virt_base = 0x%p\n", __func__, (void *)hal->memchunk.mmio_virt_base); - printk(KERN_INFO "%s: hal->memchunk.sizebytes = 0x%08x\n", __func__, hal->memchunk.sizebytes); + printk(KERN_INFO "Reserved memory: pa = 0x%p va = 0x%p size = 0x%08x\n", + (void *)hal->memchunk.mmio_phys_base, + (void *)hal->memchunk.mmio_virt_base, + hal->memchunk.sizebytes + ); #endif - hal->memspace[GSL_HAL_MEM2].mmio_virt_base = (void *) va; - hal->memspace[GSL_HAL_MEM2].gpu_base = pa; - if (gsl_driver.enable_mmu) { - hal->memspace[GSL_HAL_MEM2].sizebytes = GSL_HAL_SHMEM_SIZE_EMEM2_MMU; - va += GSL_HAL_SHMEM_SIZE_EMEM2_MMU; - pa += GSL_HAL_SHMEM_SIZE_EMEM2_MMU; - } else { - hal->memspace[GSL_HAL_MEM2].sizebytes = GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU; - va += GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU; - pa += GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU; - } + hal->memspace[GSL_HAL_MEM2].mmio_virt_base = (void *) va; + hal->memspace[GSL_HAL_MEM2].gpu_base = pa; + hal->memspace[GSL_HAL_MEM2].sizebytes = physsize; + va += physsize; + pa += physsize; #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM2].gpu_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM2].gpu_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM2].mmio_virt_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM2].mmio_virt_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM2].sizebytes = 0x%08x\n", __func__, hal->memspace[GSL_HAL_MEM2].sizebytes); -#endif - - hal->memspace[GSL_HAL_MEM3].mmio_virt_base = (void *) va; - hal->memspace[GSL_HAL_MEM3].gpu_base = pa; - if (gsl_driver.enable_mmu) { - hal->memspace[GSL_HAL_MEM3].sizebytes = GSL_HAL_SHMEM_SIZE_PHYS_MMU; - va += GSL_HAL_SHMEM_SIZE_PHYS_MMU; - pa += GSL_HAL_SHMEM_SIZE_PHYS_MMU; - } else { - hal->memspace[GSL_HAL_MEM3].sizebytes = GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; - va += GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; - pa += GSL_HAL_SHMEM_SIZE_PHYS_NOMMU; - } - -#ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM3].gpu_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM3].gpu_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM3].mmio_virt_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM3].mmio_virt_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM3].sizebytes = 0x%08x\n", __func__, hal->memspace[GSL_HAL_MEM3].sizebytes); + printk(KERN_INFO "GSL_HAL_MEM2 aperture (PHYS) pa = 0x%p va = 0x%p size = 0x%08x\n", + (void *)hal->memspace[GSL_HAL_MEM2].gpu_base, + (void *)hal->memspace[GSL_HAL_MEM2].mmio_virt_base, + hal->memspace[GSL_HAL_MEM2].sizebytes + ); #endif if (gsl_driver.enable_mmu) { gsl_linux_map_init(); hal->memspace[GSL_HAL_MEM1].mmio_virt_base = (void *)GSL_LINUX_MAP_RANGE_START; hal->memspace[GSL_HAL_MEM1].gpu_base = GSL_LINUX_MAP_RANGE_START; - hal->memspace[GSL_HAL_MEM1].sizebytes = mem1size; } else { hal->memspace[GSL_HAL_MEM1].mmio_virt_base = (void *) va; hal->memspace[GSL_HAL_MEM1].gpu_base = pa; - hal->memspace[GSL_HAL_MEM1].sizebytes = mem1size; } + hal->memspace[GSL_HAL_MEM1].sizebytes = virtsize; #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM1].gpu_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM1].gpu_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM1].mmio_virt_base = 0x%p\n", __func__, (void *)hal->memspace[GSL_HAL_MEM1].mmio_virt_base); - printk(KERN_INFO "%s: hal->memspace[GSL_HAL_MEM1].sizebytes = 0x%08x\n", __func__, hal->memspace[GSL_HAL_MEM1].sizebytes); + printk(KERN_INFO "GSL_HAL_MEM1 aperture (%s) pa = 0x%p va = 0x%p size = 0x%08x\n", + gsl_driver.enable_mmu ? "MMU" : "EMEM", + (void *)hal->memspace[GSL_HAL_MEM1].gpu_base, + (void *)hal->memspace[GSL_HAL_MEM1].mmio_virt_base, + hal->memspace[GSL_HAL_MEM1].sizebytes + ); #endif } else { kgsl_hal_close(); @@ -283,8 +278,8 @@ kgsl_hal_close(void) } /* release hal struct */ - kos_memset(hal, 0, sizeof(gsl_hal_t)); - kos_free(gsl_driver.hal); + memset(hal, 0, sizeof(gsl_hal_t)); + kfree(gsl_driver.hal); gsl_driver.hal = NULL; } @@ -299,7 +294,7 @@ kgsl_hal_getshmemconfig(gsl_shmemconfig_t *config) int status = GSL_FAILURE_DEVICEERROR; gsl_hal_t *hal = (gsl_hal_t *) gsl_driver.hal; - kos_memset(config, 0, sizeof(gsl_shmemconfig_t)); + memset(config, 0, sizeof(gsl_shmemconfig_t)); if (hal) { config->numapertures = GSL_SHMEM_MAX_APERTURES; @@ -314,18 +309,12 @@ kgsl_hal_getshmemconfig(gsl_shmemconfig_t *config) config->apertures[0].gpubase = hal->memspace[GSL_HAL_MEM1].gpu_base; config->apertures[0].sizebytes = hal->memspace[GSL_HAL_MEM1].sizebytes; - config->apertures[1].id = GSL_APERTURE_EMEM; - config->apertures[1].channel = GSL_CHANNEL_2; + config->apertures[1].id = GSL_APERTURE_PHYS; + config->apertures[1].channel = GSL_CHANNEL_1; config->apertures[1].hostbase = (unsigned int)hal->memspace[GSL_HAL_MEM2].mmio_virt_base; config->apertures[1].gpubase = hal->memspace[GSL_HAL_MEM2].gpu_base; config->apertures[1].sizebytes = hal->memspace[GSL_HAL_MEM2].sizebytes; - config->apertures[2].id = GSL_APERTURE_PHYS; - config->apertures[2].channel = GSL_CHANNEL_1; - config->apertures[2].hostbase = (unsigned int)hal->memspace[GSL_HAL_MEM3].mmio_virt_base; - config->apertures[2].gpubase = hal->memspace[GSL_HAL_MEM3].gpu_base; - config->apertures[2].sizebytes = hal->memspace[GSL_HAL_MEM3].sizebytes; - status = GSL_SUCCESS; } @@ -340,7 +329,7 @@ kgsl_hal_getdevconfig(gsl_deviceid_t device_id, gsl_devconfig_t *config) int status = GSL_FAILURE_DEVICEERROR; gsl_hal_t *hal = (gsl_hal_t *) gsl_driver.hal; - kos_memset(config, 0, sizeof(gsl_devconfig_t)); + memset(config, 0, sizeof(gsl_devconfig_t)); if (hal) { switch (device_id) { @@ -462,6 +451,10 @@ kgsl_hal_getchipid(gsl_deviceid_t device_id) patchid = ((revid >> 16) & 0xFF); chipid = ((coreid << 24) | (majorid << 16) | (minorid << 8) | (patchid << 0)); + +#ifdef GSL_HAL_DEBUG + printk(KERN_INFO "Z430 found: core %u major %u minor %u patch %u (chipid 0x%08x)\n", coreid, majorid, minorid, patchid, chipid); +#endif } return chipid; diff --git a/drivers/mxc/amd-gpu/common/gsl_intrmgr.c b/drivers/mxc/amd-gpu/gsl_intrmgr.c similarity index 95% rename from drivers/mxc/amd-gpu/common/gsl_intrmgr.c rename to drivers/mxc/amd-gpu/gsl_intrmgr.c index 4ea3bab594d..1a81a3c9e99 100644 --- a/drivers/mxc/amd-gpu/common/gsl_intrmgr.c +++ b/drivers/mxc/amd-gpu/gsl_intrmgr.c @@ -15,7 +15,10 @@ * 02110-1301, USA. * */ - + +#include +#include + #include "gsl.h" ////////////////////////////////////////////////////////////////////////////// @@ -83,7 +86,7 @@ kgsl_intr_decode(gsl_device_t *device, gsl_intrblock_t block_id) //---------------------------------------------------------------------------- -KGSL_API void +void kgsl_intr_isr(gsl_device_t *device) { if (device->intr.flags & GSL_FLAGS_INITIALIZED) { @@ -142,7 +145,7 @@ int kgsl_intr_close(gsl_device_t *device) } } - kos_memset(&device->intr, 0, sizeof(gsl_intr_t)); + memset(&device->intr, 0, sizeof(gsl_intr_t)); } return (GSL_SUCCESS); @@ -177,7 +180,7 @@ int kgsl_intr_enable(gsl_intr_t *intr, gsl_intrid_t id) if (mask && !(enabled & mask)) { - intr->evnt[id] = kos_event_create(0); + init_completion(&intr->evnt[id]); enabled |= mask; intr->enabled[block->id] = enabled; @@ -200,13 +203,13 @@ int kgsl_intr_disable(gsl_intr_t *intr, gsl_intrid_t id) return (GSL_FAILURE_BADPARAM); } - if (intr->handler[id].callback == NULL) + if (intr->handler[id].callback == NULL) { return (GSL_FAILURE_NOTINITIALIZED); } block = kgsl_intr_id2block(id); - if (block == NULL) + if (block == NULL) { return (GSL_FAILURE_SYSTEMERROR); } @@ -214,15 +217,13 @@ int kgsl_intr_disable(gsl_intr_t *intr, gsl_intrid_t id) mask = gsl_cfg_intr_mask[id]; enabled = intr->enabled[block->id]; - if (enabled & mask) + if (enabled & mask) { enabled &= ~mask; intr->enabled[block->id] = enabled; intr->device->ftbl.device_regwrite(intr->device, block->mask_reg, enabled); - kos_event_signal(intr->evnt[id]); // wake up waiting threads before destroying the event - kos_event_destroy(intr->evnt[id]); - intr->evnt[id] = 0; + complete_all(&intr->evnt[id]); // wake up waiting threads before destroying the event } return (GSL_SUCCESS); diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c b/drivers/mxc/amd-gpu/gsl_kmod.c similarity index 97% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c rename to drivers/mxc/amd-gpu/gsl_kmod.c index 94667d04668..bab42621d93 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c +++ b/drivers/mxc/amd-gpu/gsl_kmod.c @@ -31,13 +31,15 @@ #include #include #include +#include #include #include #include + #include #include -#include +#include #include int gpu_2d_irq, gpu_3d_irq; @@ -50,6 +52,7 @@ int gmem_size; phys_addr_t gpu_reserved_mem; int gpu_reserved_mem_size; int z160_version; +int enable_mmu; static ssize_t gsl_kmod_read(struct file *fd, char __user *buf, size_t len, loff_t *ptr); static ssize_t gsl_kmod_write(struct file *fd, const char __user *buf, size_t len, loff_t *ptr); @@ -93,7 +96,7 @@ static ssize_t gsl_kmod_write(struct file *fd, const char __user *buf, size_t le static long gsl_kmod_ioctl(struct file *fd, unsigned int cmd, unsigned long arg) { - int kgslStatus = GSL_FAILURE; + long kgslStatus = GSL_FAILURE; switch (cmd) { case IOCTL_KGSL_DEVICE_START: @@ -371,7 +374,7 @@ static long gsl_kmod_ioctl(struct file *fd, unsigned int cmd, unsigned long arg) * always check against GSL_SUCCESS or GSL_FAILURE as they are not the only * return values. */ - KOS_ASSERT(tmpStatus == GSL_SUCCESS); + DEBUG_ASSERT(tmpStatus == GSL_SUCCESS); printk(KERN_ERR "%s: copy_to_user error\n", __func__); kgslStatus = GSL_FAILURE; break; @@ -425,7 +428,7 @@ static long gsl_kmod_ioctl(struct file *fd, unsigned int cmd, unsigned long arg) if (copy_to_user(param.memdesc, &tmp, sizeof(gsl_memdesc_t))) { tmpStatus = kgsl_sharedmem_free(&tmp); - KOS_ASSERT(tmpStatus == GSL_SUCCESS); + DEBUG_ASSERT(tmpStatus == GSL_SUCCESS); printk(KERN_ERR "%s: copy_to_user error\n", __func__); kgslStatus = GSL_FAILURE; break; @@ -766,14 +769,15 @@ static int gpu_probe(struct platform_device *pdev) int i; struct resource *res; struct device *dev; - struct mxc_gpu_platform_data *pdata; + struct mxc_gpu_platform_data *gpu_data; - pdata = pdev->dev.platform_data; - if (pdata) { - z160_version = pdata->z160_revision; - gpu_reserved_mem = pdata->reserved_mem_base; - gpu_reserved_mem_size = pdata->reserved_mem_size; - } + gpu_data = (struct mxc_gpu_platform_data *)pdev->dev.platform_data; + + if (gpu_data == NULL) + return 0; + + z160_version = gpu_data->z160_revision; + enable_mmu = gpu_data->enable_mmu; for(i = 0; i < 2; i++){ res = platform_get_resource(pdev, IORESOURCE_IRQ, i); @@ -792,7 +796,7 @@ static int gpu_probe(struct platform_device *pdev) } } - for (i = 0; i < 3; i++) { + for(i = 0; i < 4; i++){ res = platform_get_resource(pdev, IORESOURCE_MEM, i); if (!res) { gpu_2d_regbase = 0; @@ -812,6 +816,9 @@ static int gpu_probe(struct platform_device *pdev) gpu_3d_regsize = res->end - res->start + 1; }else if(strcmp(res->name, "gpu_graphics_mem") == 0){ gmem_size = res->end - res->start + 1; + }else if(strcmp(res->name, "gpu_reserved_mem") == 0){ + gpu_reserved_mem = res->start; + gpu_reserved_mem_size = res->end - res->start + 1; } } } @@ -828,7 +835,7 @@ static int gpu_probe(struct platform_device *pdev) if (gpu_2d_irq > 0) { if (request_irq(gpu_2d_irq, z160_irq_handler, 0, "g12", NULL) < 0) { - printk(KERN_ERR "DO NOT use uio_pdrv_genirq kernel module for X acceleration!\n"); + printk(KERN_ERR "Could not allocate IRQ for OpenVG!\n"); gpu_2d_irq = 0; } } diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod_cleanup.c b/drivers/mxc/amd-gpu/gsl_kmod_cleanup.c similarity index 90% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod_cleanup.c rename to drivers/mxc/amd-gpu/gsl_kmod_cleanup.c index 3685a5756ba..3908bef506e 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod_cleanup.c +++ b/drivers/mxc/amd-gpu/gsl_kmod_cleanup.c @@ -28,7 +28,7 @@ */ static u32 device_id_to_device_index(gsl_deviceid_t device_id) { - KOS_ASSERT((GSL_DEVICE_ANY < device_id) && + DEBUG_ASSERT((GSL_DEVICE_ANY < device_id) && (device_id <= GSL_DEVICE_MAX)); return (u32)(device_id - 1); } @@ -40,9 +40,9 @@ static struct gsl_kmod_per_fd_data *get_fd_private_data(struct file *fd) { struct gsl_kmod_per_fd_data *datp; - KOS_ASSERT(fd); + DEBUG_ASSERT(fd); datp = (struct gsl_kmod_per_fd_data *)fd->private_data; - KOS_ASSERT(datp); + DEBUG_ASSERT(datp); return datp; } @@ -53,8 +53,8 @@ static s8 *find_first_entry_with(s8 *subarray, s8 context_id) //printk(KERN_DEBUG "At %s, ctx_id = %d\n", __func__, context_id); - KOS_ASSERT(context_id >= EMPTY_ENTRY); - KOS_ASSERT(context_id <= GSL_CONTEXT_MAX); // TODO: check the bound. + DEBUG_ASSERT(context_id >= EMPTY_ENTRY); + DEBUG_ASSERT(context_id <= GSL_CONTEXT_MAX); // TODO: check the bound. for(i = 0; i < GSL_CONTEXT_MAX; i++) // TODO: check the bound. { @@ -85,12 +85,12 @@ int add_memblock_to_allocated_list(struct file *fd, struct gsl_kmod_alloc_list *lisp; struct list_head *head; - KOS_ASSERT(allocated_block); + DEBUG_ASSERT(allocated_block); datp = get_fd_private_data(fd); head = &datp->allocated_blocks_head; - KOS_ASSERT(head); + DEBUG_ASSERT(head); /* allocate and put new entry in the list of allocated memory descriptors */ lisp = (struct gsl_kmod_alloc_list *)kzalloc(sizeof(struct gsl_kmod_alloc_list), GFP_KERNEL); @@ -127,14 +127,14 @@ int del_memblock_from_allocated_list(struct file *fd, struct list_head *head; // int is_different; - KOS_ASSERT(freed_block); + DEBUG_ASSERT(freed_block); datp = get_fd_private_data(fd); head = &datp->allocated_blocks_head; - KOS_ASSERT(head); + DEBUG_ASSERT(head); - KOS_ASSERT(datp->number_of_allocated_blocks > 0); + DEBUG_ASSERT(datp->number_of_allocated_blocks > 0); if(!list_empty(head)) { @@ -143,7 +143,7 @@ int del_memblock_from_allocated_list(struct file *fd, if(cursor->allocated_block.gpuaddr == freed_block->gpuaddr) { // is_different = memcmp(&cursor->allocated_block, freed_block, sizeof(gsl_memdesc_t)); -// KOS_ASSERT(!is_different); +// DEBUG_ASSERT(!is_different); list_del(&cursor->node); // printk(KERN_DEBUG "List entry #%u freed\n", cursor->allocation_number); @@ -166,7 +166,7 @@ int del_all_memblocks_from_allocated_list(struct file *fd) datp = get_fd_private_data(fd); head = &datp->allocated_blocks_head; - KOS_ASSERT(head); + DEBUG_ASSERT(head); if(!list_empty(head)) { @@ -180,7 +180,7 @@ int del_all_memblocks_from_allocated_list(struct file *fd) } } - KOS_ASSERT(list_empty(head)); + DEBUG_ASSERT(list_empty(head)); datp->number_of_allocated_blocks = 0; return 0; @@ -206,10 +206,10 @@ void add_device_context_to_array(struct file *fd, subarray = datp->created_contexts_array[device_index]; entry = find_first_entry_with(subarray, EMPTY_ENTRY); - KOS_ASSERT(entry); - KOS_ASSERT((datp->created_contexts_array[device_index] <= entry) && + DEBUG_ASSERT(entry); + DEBUG_ASSERT((datp->created_contexts_array[device_index] <= entry) && (entry < datp->created_contexts_array[device_index] + GSL_CONTEXT_MAX)); - KOS_ASSERT(context_id < 127); + DEBUG_ASSERT(context_id < 127); *entry = (s8)context_id; } @@ -224,11 +224,11 @@ void del_device_context_from_array(struct file *fd, datp = get_fd_private_data(fd); - KOS_ASSERT(context_id < 127); + DEBUG_ASSERT(context_id < 127); subarray = &(datp->created_contexts_array[device_index][0]); entry = find_first_entry_with(subarray, context_id); - KOS_ASSERT(entry); - KOS_ASSERT((datp->created_contexts_array[device_index] <= entry) && + DEBUG_ASSERT(entry); + DEBUG_ASSERT((datp->created_contexts_array[device_index] <= entry) && (entry < datp->created_contexts_array[device_index] + GSL_CONTEXT_MAX)); *entry = EMPTY_ENTRY; } diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod_cleanup.h b/drivers/mxc/amd-gpu/gsl_kmod_cleanup.h similarity index 100% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod_cleanup.h rename to drivers/mxc/amd-gpu/gsl_kmod_cleanup.h diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c b/drivers/mxc/amd-gpu/gsl_linux_map.c similarity index 96% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c rename to drivers/mxc/amd-gpu/gsl_linux_map.c index 7fee7b81441..9a2c4b30ce8 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c +++ b/drivers/mxc/amd-gpu/gsl_linux_map.c @@ -52,7 +52,7 @@ void *gsl_linux_map_alloc(unsigned int gpu_addr, unsigned int size) void *va; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); if(map->gpu_addr == gpu_addr){ @@ -61,7 +61,7 @@ void *gsl_linux_map_alloc(unsigned int gpu_addr, unsigned int size) } } - va = __vmalloc(size, GFP_KERNEL, pgprot_noncached(pgprot_kernel)); + va = __vmalloc(size, GFP_KERNEL, pgprot_writecombine(pgprot_kernel)); if(va == NULL){ mutex_unlock(&gsl_linux_map_mutex); return NULL; @@ -86,7 +86,7 @@ void gsl_linux_map_free(unsigned int gpu_addr) struct list_head *p; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); if(map->gpu_addr == gpu_addr){ @@ -110,7 +110,7 @@ void *gsl_linux_map_find(unsigned int gpu_addr) struct list_head *p; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); if(map->gpu_addr == gpu_addr){ @@ -129,10 +129,10 @@ void *gsl_linux_map_read(void *dst, unsigned int gpuoffset, unsigned int sizebyt struct list_head *p; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); - if(map->gpu_addr <= gpuoffset && + if(map->gpu_addr <= gpuoffset && (map->gpu_addr + map->size) > gpuoffset){ void *src = map->kernel_virtual_addr + (gpuoffset - map->gpu_addr); mutex_unlock(&gsl_linux_map_mutex); @@ -157,10 +157,10 @@ void *gsl_linux_map_write(void *src, unsigned int gpuoffset, unsigned int sizeby struct list_head *p; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); - if(map->gpu_addr <= gpuoffset && + if(map->gpu_addr <= gpuoffset && (map->gpu_addr + map->size) > gpuoffset){ void *dst = map->kernel_virtual_addr + (gpuoffset - map->gpu_addr); mutex_unlock(&gsl_linux_map_mutex); @@ -185,10 +185,10 @@ void *gsl_linux_map_set(unsigned int gpuoffset, unsigned int value, unsigned int struct list_head *p; mutex_lock(&gsl_linux_map_mutex); - + list_for_each(p, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); - if(map->gpu_addr <= gpuoffset && + if(map->gpu_addr <= gpuoffset && (map->gpu_addr + map->size) > gpuoffset){ void *ptr = map->kernel_virtual_addr + (gpuoffset - map->gpu_addr); mutex_unlock(&gsl_linux_map_mutex); @@ -206,7 +206,7 @@ int gsl_linux_map_destroy() struct list_head *p, *tmp; mutex_lock(&gsl_linux_map_mutex); - + list_for_each_safe(p, tmp, &gsl_linux_map_list){ map = list_entry(p, struct gsl_linux_map, list); vfree(map->kernel_virtual_addr); diff --git a/drivers/mxc/amd-gpu/common/gsl_log.c b/drivers/mxc/amd-gpu/gsl_log.c similarity index 87% rename from drivers/mxc/amd-gpu/common/gsl_log.c rename to drivers/mxc/amd-gpu/gsl_log.c index 79a14a5f4b2..268012a16d4 100644 --- a/drivers/mxc/amd-gpu/common/gsl_log.c +++ b/drivers/mxc/amd-gpu/gsl_log.c @@ -20,88 +20,44 @@ #define _CRT_SECURE_NO_WARNINGS -#include -#include -#include -#include "gsl.h" +#include +#include +#include -#define KGSL_OUTPUT_TYPE_MEMBUF 0 -#define KGSL_OUTPUT_TYPE_STDOUT 1 -#define KGSL_OUTPUT_TYPE_FILE 2 +#include "gsl.h" #define REG_OUTPUT( X ) case X: b += sprintf( b, "%s", #X ); break; #define INTRID_OUTPUT( X ) case X: b += sprintf( b, "%s", #X ); break; typedef struct log_output { - unsigned char type; unsigned int flags; - oshandle_t file; - struct log_output* next; } log_output_t; static log_output_t* outputs = NULL; -static oshandle_t log_mutex = NULL; -static char buffer[256]; -static char buffer2[256]; +static struct mutex log_mutex; +static char buffer[1024]; +static char buffer2[1024]; static int log_initialized = 0; //---------------------------------------------------------------------------- -int kgsl_log_init() -{ - log_mutex = kos_mutex_create( "log_mutex" ); - - log_initialized = 1; - - return GSL_SUCCESS; -} - -//---------------------------------------------------------------------------- - -int kgsl_log_close() +int kgsl_log_start( unsigned int log_flags ) { - if( !log_initialized ) return GSL_SUCCESS; - - // Go throught output list and free every node - while( outputs != NULL ) - { - log_output_t* temp = outputs->next; - - switch( outputs->type ) - { - case KGSL_OUTPUT_TYPE_FILE: - kos_fclose( outputs->file ); - break; - } - - kos_free( outputs ); - outputs = temp; - } - - kos_mutex_free( log_mutex ); + log_output_t* output; - log_initialized = 0; + if( log_initialized ) return GSL_SUCCESS; - return GSL_SUCCESS; -} - -//---------------------------------------------------------------------------- + mutex_init(&log_mutex); + log_initialized = 1; -int kgsl_log_open_stdout( unsigned int log_flags ) -{ - log_output_t* output; - - if( !log_initialized ) return GSL_SUCCESS; - - output = kos_malloc( sizeof( log_output_t ) ); - output->type = KGSL_OUTPUT_TYPE_STDOUT; + output = kmalloc( sizeof( log_output_t ), GFP_KERNEL ); output->flags = log_flags; // Add to the list - if( outputs == NULL ) + if( outputs == NULL ) { // First node in the list. outputs = output; @@ -119,51 +75,24 @@ int kgsl_log_open_stdout( unsigned int log_flags ) //---------------------------------------------------------------------------- -int kgsl_log_open_membuf( int* memBufId, unsigned int log_flags ) -{ - // TODO - - return GSL_SUCCESS; -} - -//---------------------------------------------------------------------------- - -int kgsl_log_open_file( char* filename, unsigned int log_flags ) +int kgsl_log_finish() { - log_output_t* output; - if( !log_initialized ) return GSL_SUCCESS; - - output = kos_malloc( sizeof( log_output_t ) ); - output->type = KGSL_OUTPUT_TYPE_FILE; - output->flags = log_flags; - output->file = kos_fopen( filename, "w" ); - // Add to the list - if( outputs == NULL ) - { - // First node in the list. - outputs = output; - output->next = NULL; - } - else + // Go throught output list and free every node + while( outputs != NULL ) { - // Add to the start of the list - output->next = outputs; - outputs = output; - } - - return GSL_SUCCESS; -} + log_output_t* temp = outputs->next; -//---------------------------------------------------------------------------- + kfree( outputs ); + outputs = temp; + } -int kgsl_log_flush_membuf( char* filename, int memBufId ) -{ - // TODO + log_initialized = 0; return GSL_SUCCESS; } + //---------------------------------------------------------------------------- int kgsl_log_write( unsigned int log_flags, char* format, ... ) @@ -177,7 +106,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) if( !log_initialized ) return GSL_SUCCESS; // Acquire mutex lock as we are using shared buffer for the string parsing - kos_mutex_lock( log_mutex ); + mutex_lock(&log_mutex); // Add separator *(b++) = '|'; *(b++) = ' '; @@ -188,7 +117,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) { // Find the first occurence of % p1 = strchr( c, '%' ); - if( !p1 ) + if( !p1 ) { // No more % characters -> copy rest of the string strcpy( b, c ); @@ -203,7 +132,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) if( !p2 ) p2 = strchr( p1+1, '\0' ); // Break the string to this point - kos_memcpy( buffer2, c, p2-c ); + memcpy( buffer2, c, p2-c ); *(buffer2+(unsigned int)(p2-c)) = '\0'; switch( *(p1+1) ) @@ -211,14 +140,14 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) // gsl_memdesc_t case 'M': { - gsl_memdesc_t val = va_arg( arguments, gsl_memdesc_t ); + gsl_memdesc_t *val = va_arg( arguments, gsl_memdesc_t *); // Handle string before %M - kos_memcpy( b, c, p1-c ); + memcpy( b, c, p1-c ); b += (unsigned int)p1-(unsigned int)c; // Replace %M - b += sprintf( b, "[hostptr=0x%08x, gpuaddr=0x%08x]", val.hostptr, val.gpuaddr ); + b += sprintf( b, "[hostptr=0x%08x,gpuaddr=0x%08x,size=%u,flags=%x]", val->hostptr, val->gpuaddr, val->size, (unsigned int) val->priv ); // Handle string after %M - kos_memcpy( b, p1+2, p2-(p1+2) ); + memcpy( b, p1+2, p2-(p1+2) ); b += (unsigned int)p2-(unsigned int)(p1+2); *b = '\0'; } @@ -228,16 +157,23 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) case 'B': { int val = va_arg( arguments, int ); + char *s; // Handle string before %B - kos_memcpy( b, c, p1-c ); + memcpy( b, c, p1-c ); b += (unsigned int)p1-(unsigned int)c; // Replace %B - if( val == GSL_SUCCESS ) - b += sprintf( b, "%s", "GSL_SUCCESS" ); - else - b += sprintf( b, "%s", "GSL_FAILURE" ); + switch (val) { + case GSL_SUCCESS: + s = "GSL_SUCCESS"; + break; + case GSL_FAILURE: + default: + s = "GSL_FAILURE"; + break; + } + b += sprintf( b, "%s", s ); // Handle string after %B - kos_memcpy( b, p1+2, p2-(p1+2) ); + memcpy( b, p1+2, p2-(p1+2) ); b += (unsigned int)p2-(unsigned int)(p1+2); *b = '\0'; } @@ -248,7 +184,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) { gsl_deviceid_t val = va_arg( arguments, gsl_deviceid_t ); // Handle string before %D - kos_memcpy( b, c, p1-c ); + memcpy( b, c, p1-c ); b += (unsigned int)p1-(unsigned int)c; // Replace %D switch( val ) @@ -267,18 +203,18 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) break; } // Handle string after %D - kos_memcpy( b, p1+2, p2-(p1+2) ); + memcpy( b, p1+2, p2-(p1+2) ); b += (unsigned int)p2-(unsigned int)(p1+2); *b = '\0'; } break; - + // gsl_intrid_t case 'I': { unsigned int val = va_arg( arguments, unsigned int ); // Handle string before %I - kos_memcpy( b, c, p1-c ); + memcpy( b, c, p1-c ); b += (unsigned int)p1-(unsigned int)c; // Replace %I switch( val ) @@ -317,7 +253,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) break; } // Handle string after %I - kos_memcpy( b, p1+2, p2-(p1+2) ); + memcpy( b, p1+2, p2-(p1+2) ); b += (unsigned int)p2-(unsigned int)(p1+2); *b = '\0'; } @@ -327,9 +263,9 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) case 'R': { unsigned int val = va_arg( arguments, unsigned int ); - + // Handle string before %R - kos_memcpy( b, c, p1-c ); + memcpy( b, c, p1-c ); b += (unsigned int)p1-(unsigned int)c; // Replace %R switch( val ) @@ -510,12 +446,67 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) break; } // Handle string after %R - kos_memcpy( b, p1+2, p2-(p1+2) ); + memcpy( b, p1+2, p2-(p1+2) ); b += (unsigned int)p2-(unsigned int)(p1+2); *b = '\0'; } break; + // gsl_scatterlist_t + case 'S': + { + gsl_scatterlist_t *val = va_arg(arguments, gsl_scatterlist_t *); + // handle string before %S + memcpy( b, c, p1-c ); + b += (unsigned int)p1-(unsigned int)c; + // Replace %S + b += sprintf( b, "[contiguous=%d,num=%u]",val->contiguous,val->num); + // Handle string after %S + memcpy( b, p1+2, p2-(p1+2) ); + b += (unsigned int)p2-(unsigned int)(p1+2); + *b = '\0'; + } + break; + + // gsl_property_type_t + case 'T': + { + char *prop; + gsl_property_type_t val = va_arg(arguments, gsl_property_type_t); + // handle string before %T + memcpy( b, c, p1-c ); + b += (unsigned int)p1-(unsigned int)c; + // Replace %T + switch (val) { + case GSL_PROP_DEVICE_INFO: + prop = "GSL_PROP_DEVICE_INFO"; + break; + case GSL_PROP_DEVICE_SHADOW: + prop = "GSL_PROP_DEVICE_SHADOW"; + break; + case GSL_PROP_DEVICE_POWER: + prop = "GSL_PROP_DEVICE_POWER"; + break; + case GSL_PROP_SHMEM: + prop = "GSL_PROP_SHMEM"; + break; + case GSL_PROP_SHMEM_APERTURES: + prop = "GSL_PROP_SHMEM_APERTURES"; + break; + case GSL_PROP_DEVICE_DMI: + prop = "GSL_PROP_DEVICE_DMI"; + break; + default: + prop = "????????"; + break; + } + b += sprintf( b, "%s",prop); + // Handle string after %T + memcpy( b, p1+2, p2-(p1+2) ); + b += (unsigned int)p2-(unsigned int)(p1+2); + *b = '\0'; + } + break; default: { @@ -525,7 +516,6 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) } break; } - c = p2; } @@ -538,14 +528,7 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) // Filter according to the flags if( ( output->flags & log_flags ) == log_flags ) { - // Passed the filter. Now commit this message. - switch( output->type ) - { - case KGSL_OUTPUT_TYPE_MEMBUF: - // TODO - break; - - case KGSL_OUTPUT_TYPE_STDOUT: + /* // Write timestamp if enabled if( output->flags & KGSL_LOG_TIMESTAMP ) printf( "[Timestamp: %d] ", kos_timestamp() ); @@ -555,34 +538,17 @@ int kgsl_log_write( unsigned int log_flags, char* format, ... ) // Write thread id if enabled if( output->flags & KGSL_LOG_THREAD_ID ) printf( "[Thread ID: %d] ", kos_thread_getid() ); - - // Write the message - printf( buffer ); - break; - - case KGSL_OUTPUT_TYPE_FILE: - // Write timestamp if enabled - if( output->flags & KGSL_LOG_TIMESTAMP ) - kos_fprintf( output->file, "[Timestamp: %d] ", kos_timestamp() ); - // Write process id if enabled - if( output->flags & KGSL_LOG_PROCESS_ID ) - kos_fprintf( output->file, "[Process ID: %d] ", kos_process_getid() ); - // Write thread id if enabled - if( output->flags & KGSL_LOG_THREAD_ID ) - kos_fprintf( output->file, "[Thread ID: %d] ", kos_thread_getid() ); - - // Write the message - kos_fprintf( output->file, buffer ); - break; - } + */ + // Write the message + printk( buffer ); } - + output = output->next; } va_end( arguments ); - kos_mutex_unlock( log_mutex ); + mutex_unlock(&log_mutex ); return GSL_SUCCESS; } diff --git a/drivers/mxc/amd-gpu/common/gsl_memmgr.c b/drivers/mxc/amd-gpu/gsl_memmgr.c similarity index 86% rename from drivers/mxc/amd-gpu/common/gsl_memmgr.c rename to drivers/mxc/amd-gpu/gsl_memmgr.c index 75f250ae59b..ba1e3361c02 100644 --- a/drivers/mxc/amd-gpu/common/gsl_memmgr.c +++ b/drivers/mxc/amd-gpu/gsl_memmgr.c @@ -15,20 +15,26 @@ * 02110-1301, USA. * */ - + +#include + #include "gsl.h" #include "gsl_hal.h" -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// +/* + * defines + * + * these are a bit overzealous: a whole byte for a bit flag? + */ #define GSL_MEMARENAPRIV_SIGNATURE_MASK 0x0000FFFF #define GSL_MEMARENAPRIV_APERTUREID_MASK 0xF0000000 #define GSL_MEMARENAPRIV_MMUVIRTUALIZED_MASK 0x0F000000 +#define GSL_MEMARENAPRIV_CONPHYS_MASK 0x00F00000 //neko #define GSL_MEMARENAPRIV_SIGNATURE_SHIFT 0 #define GSL_MEMARENAPRIV_MMUVIRTUALIZED_SHIFT 24 #define GSL_MEMARENAPRIV_APERTUREID_SHIFT 28 +#define GSL_MEMARENAPRIV_CONPHYS_SHIFT 20 //neko #define GSL_MEMARENA_INSTANCE_SIGNATURE 0x0000CAFE @@ -39,37 +45,31 @@ #endif // GSL_STATS_MEM -///////////////////////////////////////////////////////////////////////////// // macros -////////////////////////////////////////////////////////////////////////////// -#define GSL_MEMARENA_LOCK() kos_mutex_lock(memarena->mutex) -#define GSL_MEMARENA_UNLOCK() kos_mutex_unlock(memarena->mutex) - #define GSL_MEMARENA_SET_SIGNATURE (memarena->priv |= ((GSL_MEMARENA_INSTANCE_SIGNATURE << GSL_MEMARENAPRIV_SIGNATURE_SHIFT) & GSL_MEMARENAPRIV_SIGNATURE_MASK)) #define GSL_MEMARENA_SET_MMU_VIRTUALIZED (memarena->priv |= ((mmu_virtualized << GSL_MEMARENAPRIV_MMUVIRTUALIZED_SHIFT) & GSL_MEMARENAPRIV_MMUVIRTUALIZED_MASK)) #define GSL_MEMARENA_SET_ID (memarena->priv |= ((aperture_id << GSL_MEMARENAPRIV_APERTUREID_SHIFT) & GSL_MEMARENAPRIV_APERTUREID_MASK)) +#define GSL_MEMARENA_SET_CONPHYS (memarena->priv |= ((conphys << GSL_MEMARENAPRIV_CONPHYS_SHIFT) & GSL_MEMARENAPRIV_CONPHYS_MASK))//neko #define GSL_MEMARENA_GET_SIGNATURE ((memarena->priv & GSL_MEMARENAPRIV_SIGNATURE_MASK) >> GSL_MEMARENAPRIV_SIGNATURE_SHIFT) #define GSL_MEMARENA_IS_MMU_VIRTUALIZED ((memarena->priv & GSL_MEMARENAPRIV_MMUVIRTUALIZED_MASK) >> GSL_MEMARENAPRIV_MMUVIRTUALIZED_SHIFT) #define GSL_MEMARENA_GET_ID ((memarena->priv & GSL_MEMARENAPRIV_APERTUREID_MASK) >> GSL_MEMARENAPRIV_APERTUREID_SHIFT) +#define GSL_MEMARENA_IS_CONPHYS ((memarena->priv & GSL_MEMARENAPRIV_CONPHYS_MASK) >> GSL_MEMARENAPRIV_CONPHYS_SHIFT)//neko - -////////////////////////////////////////////////////////////////////////////// // validate -////////////////////////////////////////////////////////////////////////////// #define GSL_MEMARENA_VALIDATE(memarena) \ - KOS_ASSERT(memarena); \ + DEBUG_ASSERT(memarena); \ if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) \ { \ kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, \ - "ERROR: Memarena validation failed.\n" ); \ + "ERROR: Memarena validation failed.\n" ); \ return (GSL_FAILURE); \ } -////////////////////////////////////////////////////////////////////////////// +// " neko + // block alignment shift count -////////////////////////////////////////////////////////////////////////////// -OSINLINE unsigned int +static __inline unsigned int gsl_memarena_alignmentshift(gsl_flags_t flags) { int alignshift = ((flags & GSL_MEMFLAGS_ALIGN_MASK) >> GSL_MEMFLAGS_ALIGN_SHIFT); @@ -78,10 +78,8 @@ gsl_memarena_alignmentshift(gsl_flags_t flags) return (alignshift); } -////////////////////////////////////////////////////////////////////////////// // address alignment -////////////////////////////////////////////////////////////////////////////// -OSINLINE unsigned int +static __inline unsigned int gsl_memarena_alignaddr(unsigned int address, int shift) { // @@ -97,14 +95,11 @@ gsl_memarena_alignaddr(unsigned int address, int shift) } -////////////////////////////////////////////////////////////////////////////// // memory management API -////////////////////////////////////////////////////////////////////////////// - -OSINLINE memblk_t* -kgsl_memarena_getmemblknode(gsl_memarena_t *memarena) -{ #ifdef GSL_MEMARENA_NODE_POOL_ENABLED +static __inline memblk_t* +kgsl_memarena_getmemblknode_pool(gsl_memarena_t *memarena) +{ gsl_nodepool_t *nodepool = memarena->nodepool; memblk_t *memblk = NULL; int allocnewpool = 1; @@ -139,7 +134,7 @@ kgsl_memarena_getmemblknode(gsl_memarena_t *memarena) break; } - else + else { nodepool = nodepool->next; @@ -156,10 +151,10 @@ kgsl_memarena_getmemblknode(gsl_memarena_t *memarena) if (allocnewpool) { // alloc new pool of memblk nodes - nodepool = ((gsl_nodepool_t *)kos_malloc(sizeof(gsl_nodepool_t))); + nodepool = ((gsl_nodepool_t *)kmalloc(sizeof(gsl_nodepool_t), GFP_KERNEL)); if (nodepool) { - kos_memset(nodepool, 0, sizeof(gsl_nodepool_t)); + memset(nodepool, 0, sizeof(gsl_nodepool_t)); if (memarena->nodepool) { @@ -185,35 +180,43 @@ kgsl_memarena_getmemblknode(gsl_memarena_t *memarena) } } - KOS_ASSERT(memblk); + DEBUG_ASSERT(memblk); return (memblk); +} +#endif + +static __inline memblk_t* +kgsl_memarena_getmemblknode(gsl_memarena_t *memarena) +{ +#ifdef GSL_MEMARENA_NODE_POOL_ENABLED + return( kgsl_memarena_getmemblknode_pool(gsl_memarena_t *memarena) ); #else // unreferenced formal parameter (void) memarena; - return ((memblk_t *)kos_malloc(sizeof(memblk_t))); + return ((memblk_t *)kmalloc(sizeof(memblk_t), GFP_KERNEL)); #endif // GSL_MEMARENA_NODE_POOL_ENABLED } //---------------------------------------------------------------------------- -OSINLINE void -kgsl_memarena_releasememblknode(gsl_memarena_t *memarena, memblk_t *memblk) -{ #ifdef GSL_MEMARENA_NODE_POOL_ENABLED +static __inline void +kgsl_memarena_releasememblknode_pool(gsl_memarena_t *memarena, memblk_t *memblk) +{ gsl_nodepool_t *nodepool = memarena->nodepool; - KOS_ASSERT(memblk); - KOS_ASSERT(nodepool); + DEBUG_ASSERT(memblk); + DEBUG_ASSERT(nodepool); // locate pool to which this memblk node belongs - while (((unsigned int) memblk) < ((unsigned int) nodepool) || + while (((unsigned int) memblk) < ((unsigned int) nodepool) || ((unsigned int) memblk) > ((unsigned int) nodepool) + sizeof(gsl_nodepool_t)) { nodepool = nodepool->prev; - KOS_ASSERT(nodepool != memarena->nodepool); + DEBUG_ASSERT(nodepool != memarena->nodepool); } // mark memblk node as unused @@ -238,18 +241,26 @@ kgsl_memarena_releasememblknode(gsl_memarena_t *memarena, memblk_t *memblk) memarena->nodepool = NULL; } - kos_free((void *)nodepool); + kfree((void *)nodepool); } else { // leave pool head in last pool a memblk node was released memarena->nodepool = nodepool; } +} +#endif + +static __inline void +kgsl_memarena_releasememblknode(gsl_memarena_t *memarena, memblk_t *memblk) +{ +#ifdef GSL_MEMARENA_NODE_POOL_ENABLED + kgsl_memarena_releasememblknode(memarena, memblk) #else // unreferenced formal parameter (void) memarena; - kos_free((void *)memblk); + kfree((void *)memblk); #endif // GSL_MEMARENA_NODE_POOL_ENABLED } @@ -259,16 +270,14 @@ gsl_memarena_t* kgsl_memarena_create(int aperture_id, int mmu_virtualized, unsigned int hostbaseaddr, gpuaddr_t gpubaseaddr, int sizebytes) { static int count = 0; - char name[100], id_str[2]; - int len; gsl_memarena_t *memarena; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_memarena_t* kgsl_memarena_create(int aperture_id=%d, gpuaddr_t gpubaseaddr=0x%08x, int sizebytes=%d)\n", aperture_id, gpubaseaddr, sizebytes ); - memarena = (gsl_memarena_t *)kos_malloc(sizeof(gsl_memarena_t)); + memarena = (gsl_memarena_t *)kmalloc(sizeof(gsl_memarena_t), GFP_KERNEL); - if (!memarena) + if (!memarena) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Memarena allocation failed.\n" ); @@ -276,20 +285,13 @@ kgsl_memarena_create(int aperture_id, int mmu_virtualized, unsigned int hostbase return (NULL); } - kos_memset(memarena, 0, sizeof(gsl_memarena_t)); + memset(memarena, 0, sizeof(gsl_memarena_t)); GSL_MEMARENA_SET_SIGNATURE; GSL_MEMARENA_SET_MMU_VIRTUALIZED; GSL_MEMARENA_SET_ID; - // define unique mutex for each memory arena instance - id_str[0] = (char) (count + '0'); - id_str[1] = '\0'; - kos_strcpy(name, "GSL_memory_arena_"); - len = kos_strlen(name); - kos_strcpy(&name[len], id_str); - - memarena->mutex = kos_mutex_create(name); + mutex_init(&memarena->lock); // set up the memory arena memarena->hostbaseaddr = hostbaseaddr; @@ -314,10 +316,11 @@ kgsl_memarena_create(int aperture_id, int mmu_virtualized, unsigned int hostbase //---------------------------------------------------------------------------- -int +int kgsl_memarena_destroy(gsl_memarena_t *memarena) { int status = GSL_SUCCESS; + int err; memblk_t *p, *next; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, @@ -325,7 +328,11 @@ kgsl_memarena_destroy(gsl_memarena_t *memarena) GSL_MEMARENA_VALIDATE(memarena); - GSL_MEMARENA_LOCK(); + err = mutex_lock_interruptible(&memarena->lock); + if (err == -EINTR) { + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, + "WARNING: memarena mutex lock was interrupted\n"); + } #ifdef _DEBUG // memory leak check @@ -349,14 +356,9 @@ kgsl_memarena_destroy(gsl_memarena_t *memarena) p = next; } while (p != memarena->freelist.head); - GSL_MEMARENA_UNLOCK(); - - if (memarena->mutex) - { - kos_mutex_free(memarena->mutex); - } + mutex_unlock(&memarena->lock); - kos_free((void *)memarena); + kfree((void *)memarena); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_destroy. Return value: %B\n", GSL_SUCCESS ); @@ -389,11 +391,11 @@ kgsl_memarena_checkconsistency(gsl_memarena_t *memarena) { if (p->next->blkaddr != memarena->freelist.head->blkaddr) { - if (p->prev->next->blkaddr != p->blkaddr || + if (p->prev->next->blkaddr != p->blkaddr || p->next->prev->blkaddr != p->blkaddr || p->blkaddr + p->blksize >= p->next->blkaddr) { - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_checkconsistency. Return value: %B\n", GSL_FAILURE ); return (GSL_FAILURE); } @@ -409,15 +411,15 @@ kgsl_memarena_checkconsistency(gsl_memarena_t *memarena) //---------------------------------------------------------------------------- -int +int kgsl_memarena_querystats(gsl_memarena_t *memarena, gsl_memarena_stats_t *stats) { #ifdef GSL_STATS_MEM - KOS_ASSERT(stats); + DEBUG_ASSERT(stats); GSL_MEMARENA_VALIDATE(memarena); - kos_memcpy(stats, &memarena->stats, sizeof(gsl_memarena_stats_t)); - + memcpy(stats, &memarena->stats, sizeof(gsl_memarena_stats_t)); + return (GSL_SUCCESS); #else // unreferenced formal parameters @@ -430,10 +432,11 @@ kgsl_memarena_querystats(gsl_memarena_t *memarena, gsl_memarena_stats_t *stats) //---------------------------------------------------------------------------- -int +int kgsl_memarena_checkfreeblock(gsl_memarena_t *memarena, int bytesneeded) { memblk_t *p; + int err; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_memarena_checkfreeblock(gsl_memarena_t *memarena=0x%08x, int bytesneeded=%d)\n", memarena, bytesneeded ); @@ -443,12 +446,16 @@ kgsl_memarena_checkfreeblock(gsl_memarena_t *memarena, int bytesneeded) if (bytesneeded < 1) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Illegal number of bytes needed.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_checkfreeblock. Return value: %B\n", GSL_FAILURE ); return (GSL_FAILURE); } - GSL_MEMARENA_LOCK(); + err = mutex_lock_interruptible(&memarena->lock); + if (err == -EINTR) { + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, + "WARNING: memarena mutex lock was interrupted\n"); + } p = memarena->freelist.head; do @@ -462,7 +469,7 @@ kgsl_memarena_checkfreeblock(gsl_memarena_t *memarena, int bytesneeded) p = p->next; } while (p != memarena->freelist.head); - GSL_MEMARENA_UNLOCK(); + mutex_unlock(&memarena->lock); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_checkfreeblock. Return value: %B\n", GSL_FAILURE ); @@ -471,7 +478,7 @@ kgsl_memarena_checkfreeblock(gsl_memarena_t *memarena, int bytesneeded) //---------------------------------------------------------------------------- -int +int kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_memdesc_t *memdesc) { int result = GSL_FAILURE_OUTOFMEM; @@ -479,16 +486,17 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m unsigned int blksize; unsigned int baseaddr, alignedbaseaddr, alignfragment; int freeblk, alignmentshift; + int err; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_memarena_alloc(gsl_memarena_t *memarena=0x%08x, gsl_flags_t flags=0x%08x, int size=%d, gsl_memdesc_t *memdesc=%M)\n", memarena, flags, size, memdesc ); + "--> int kgsl_memarena_alloc(gsl_memarena_t *memarena=0x%08x, gsl_flags_t flags=%x, int size=%d, gsl_memdesc_t *memdesc=%M)\n", memarena, flags, size, memdesc ); GSL_MEMARENA_VALIDATE(memarena); if (size <= 0) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Invalid size for memory allocation.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_alloc. Return value: %B\n", GSL_FAILURE ); return (GSL_FAILURE); } @@ -503,14 +511,14 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m // by blksize and return the address after allocating the memory. if the free block size becomes // 0 then remove this node from the free list // - // there would be no node on the free list if all available memory were to be allocated. - // handling an empty list would require executing error checking code in the main branch which - // is not desired. instead, the free list will have at least one node at all times. This node + // there would be no node on the free list if all available memory were to be allocated. + // handling an empty list would require executing error checking code in the main branch which + // is not desired. instead, the free list will have at least one node at all times. This node // could have a block size of zero // - // we use a next fit allocation mechanism that uses a roving pointer on a circular free block list. + // we use a next fit allocation mechanism that uses a roving pointer on a circular free block list. // the pointer is advanced along the chain when searching for a fit. Thus each allocation begins - // looking where the previous one finished. + // looking where the previous one finished. // // when allocating from external memory aperture, round up size of requested block to multiple of page size if needed @@ -531,7 +539,11 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m // adjust size of requested block to include alignment blksize = (unsigned int)((size + ((1 << alignmentshift) - 1)) >> alignmentshift) << alignmentshift; - GSL_MEMARENA_LOCK(); + err = mutex_lock_interruptible(&memarena->lock); + if (err == -EINTR) { + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, + "WARNING: memarena mutex lock was interrupted\n"); + } // check consistency, debug only KGSL_DEBUG(GSL_DBGFLAGS_MEMMGR, kgsl_memarena_checkconsistency(memarena)); @@ -541,11 +553,11 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m freeblk = 0; do - { + { // align base address baseaddr = ptrfree->blkaddr + memarena->gpubaseaddr; alignedbaseaddr = gsl_memarena_alignaddr(baseaddr, alignmentshift); - + alignfragment = alignedbaseaddr - baseaddr; if (ptrfree->blksize >= blksize + alignfragment) @@ -606,12 +618,13 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m } while (!freeblk && ptrfree != memarena->freelist.allocrover); - GSL_MEMARENA_UNLOCK(); + + mutex_unlock(&memarena->lock); if (result == GSL_SUCCESS) { GSL_MEMARENA_STATS( - { + { int i = 0; while (memdesc->size >> (GSL_PAGESIZE_SHIFT + i)) { @@ -629,7 +642,7 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m } kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_alloc. Return value: %B\n", result ); - + return (result); } @@ -648,32 +661,37 @@ kgsl_memarena_free(gsl_memarena_t *memarena, gsl_memdesc_t *memdesc) memblk_t *ptrfree, *ptrend, *p; int mallocfreeblk, clockwise; unsigned int addrtofree; - + int err; + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> void kgsl_memarena_free(gsl_memarena_t *memarena=0x%08x, gsl_memdesc_t *memdesc=%M)\n", memarena, memdesc ); - KOS_ASSERT(memarena); + DEBUG_ASSERT(memarena); if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_free.\n" ); return; } - // check size of malloc'ed block + // check size of malloc'ed block if (memdesc->size <= 0) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Illegal size for the memdesc.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_free.\n" ); return; } // check address range - KOS_ASSERT( memarena->gpubaseaddr <= memdesc->gpuaddr); - KOS_ASSERT((memarena->gpubaseaddr + memarena->sizebytes) >= memdesc->gpuaddr + memdesc->size); + DEBUG_ASSERT( memarena->gpubaseaddr <= memdesc->gpuaddr); + DEBUG_ASSERT((memarena->gpubaseaddr + memarena->sizebytes) >= memdesc->gpuaddr + memdesc->size); - GSL_MEMARENA_LOCK(); + err = mutex_lock_interruptible(&memarena->lock); + if (err == -EINTR) { + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, + "WARNING: memarena mutex lock was interrupted\n"); + } // check consistency of memory map, debug only KGSL_DEBUG(GSL_DBGFLAGS_MEMMGR, kgsl_memarena_checkconsistency(memarena)); @@ -746,7 +764,7 @@ kgsl_memarena_free(gsl_memarena_t *memarena, gsl_memdesc_t *memdesc) // traverse the nodes do { - if ((addrtofree >= ptrfree->blkaddr + ptrfree->blksize) && + if ((addrtofree >= ptrfree->blkaddr + ptrfree->blksize) && (addrtofree + memdesc->size <= ptrfree->next->blkaddr)) { if (addrtofree == ptrfree->blkaddr + ptrfree->blksize) @@ -820,10 +838,10 @@ kgsl_memarena_free(gsl_memarena_t *memarena, gsl_memdesc_t *memdesc) memarena->freelist.freerover = ptrfree; } - GSL_MEMARENA_UNLOCK(); + mutex_unlock(&memarena->lock); GSL_MEMARENA_STATS( - { + { int i = 0; while (memdesc->size >> (GSL_PAGESIZE_SHIFT + i)) { @@ -840,8 +858,7 @@ kgsl_memarena_free(gsl_memarena_t *memarena, gsl_memdesc_t *memdesc) //---------------------------------------------------------------------------- -void * -kgsl_memarena_gethostptr(gsl_memarena_t *memarena, gpuaddr_t gpuaddr) +void *kgsl_memarena_gethostptr(gsl_memarena_t *memarena, gpuaddr_t gpuaddr) { // // get the host mapped address for a hardware device address @@ -852,7 +869,7 @@ kgsl_memarena_gethostptr(gsl_memarena_t *memarena, gpuaddr_t gpuaddr) kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> void* kgsl_memarena_gethostptr(gsl_memarena_t *memarena=0x%08x, gpuaddr_t gpuaddr=0x%08x)\n", memarena, gpuaddr ); - KOS_ASSERT(memarena); + DEBUG_ASSERT(memarena); if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_gethostptr. Return value: 0x%08x\n", NULL ); @@ -860,8 +877,8 @@ kgsl_memarena_gethostptr(gsl_memarena_t *memarena, gpuaddr_t gpuaddr) } // check address range - KOS_ASSERT(gpuaddr >= memarena->gpubaseaddr); - KOS_ASSERT(gpuaddr < memarena->gpubaseaddr + memarena->sizebytes); + DEBUG_ASSERT(gpuaddr >= memarena->gpubaseaddr); + DEBUG_ASSERT(gpuaddr < memarena->gpubaseaddr + memarena->sizebytes); hostptr = (void *)((gpuaddr - memarena->gpubaseaddr) + memarena->hostbaseaddr); @@ -872,8 +889,7 @@ kgsl_memarena_gethostptr(gsl_memarena_t *memarena, gpuaddr_t gpuaddr) //---------------------------------------------------------------------------- -gpuaddr_t -kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena, void *hostptr) +gpuaddr_t kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena, void *hostptr) { // // get the hardware device address for a host mapped address @@ -884,7 +900,7 @@ kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena, void *hostptr) kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena=0x%08x, void *hostptr=0x%08x)\n", memarena, hostptr ); - KOS_ASSERT(memarena); + DEBUG_ASSERT(memarena); if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_getgpuaddr. Return value: 0x%08x\n", 0 ); @@ -892,9 +908,9 @@ kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena, void *hostptr) } // check address range - KOS_ASSERT(hostptr >= (void *)memarena->hostbaseaddr); - KOS_ASSERT(hostptr < (void *)(memarena->hostbaseaddr + memarena->sizebytes)); - + DEBUG_ASSERT(hostptr >= (void *)memarena->hostbaseaddr); + DEBUG_ASSERT(hostptr < (void *)(memarena->hostbaseaddr + memarena->sizebytes)); + gpuaddr = ((unsigned int)hostptr - memarena->hostbaseaddr) + memarena->gpubaseaddr; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_getgpuaddr. Return value: 0x%08x\n", gpuaddr ); @@ -904,18 +920,19 @@ kgsl_memarena_getgpuaddr(gsl_memarena_t *memarena, void *hostptr) //---------------------------------------------------------------------------- -unsigned int +unsigned int kgsl_memarena_getlargestfreeblock(gsl_memarena_t *memarena, gsl_flags_t flags) { memblk_t *ptrfree; unsigned int blocksize, largestblocksize = 0; - int alignmentshift; + int alignmentshift; + int err; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> unsigned int kgsl_memarena_getlargestfreeblock(gsl_memarena_t *memarena=0x%08x, gsl_flags_t flags=0x%08x)\n", memarena, flags ); + "--> unsigned int kgsl_memarena_getlargestfreeblock(gsl_memarena_t *memarena=0x%08x, gsl_flags_t flags=%x)\n", memarena, flags ); - KOS_ASSERT(memarena); - if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) + DEBUG_ASSERT(memarena); + if (GSL_MEMARENA_GET_SIGNATURE != GSL_MEMARENA_INSTANCE_SIGNATURE) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_getlargestfreeblock. Return value: %d\n", 0 ); return (0); @@ -924,7 +941,11 @@ kgsl_memarena_getlargestfreeblock(gsl_memarena_t *memarena, gsl_flags_t flags) // determine shift count for alignment requested alignmentshift = gsl_memarena_alignmentshift(flags); - GSL_MEMARENA_LOCK(); + err = mutex_lock_interruptible(&memarena->lock); + if (err == -EINTR) { + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, + "WARNING: memarena mutex lock was interrupted\n"); + } ptrfree = memarena->freelist.head; @@ -941,7 +962,7 @@ kgsl_memarena_getlargestfreeblock(gsl_memarena_t *memarena, gsl_flags_t flags) } while (ptrfree != memarena->freelist.head); - GSL_MEMARENA_UNLOCK(); + mutex_unlock(&memarena->lock); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_memarena_getlargestfreeblock. Return value: %d\n", largestblocksize ); diff --git a/drivers/mxc/amd-gpu/common/gsl_mmu.c b/drivers/mxc/amd-gpu/gsl_mmu.c similarity index 91% rename from drivers/mxc/amd-gpu/common/gsl_mmu.c rename to drivers/mxc/amd-gpu/gsl_mmu.c index 810a058a515..c5f9c7cc384 100644 --- a/drivers/mxc/amd-gpu/common/gsl_mmu.c +++ b/drivers/mxc/amd-gpu/gsl_mmu.c @@ -16,6 +16,9 @@ * */ +#include +#include + #include "gsl.h" #include "gsl_hal.h" @@ -63,18 +66,6 @@ const unsigned int GSL_PT_PAGE_AP[4] = {(GSL_PT_PAGE_READ | GSL_PT_PAGE_WRITE), ///////////////////////////////////////////////////////////////////////////// // macros ////////////////////////////////////////////////////////////////////////////// -#ifdef GSL_LOCKING_FINEGRAIN -#define GSL_MMU_MUTEX_CREATE() mmu->mutex = kos_mutex_create("gsl_mmu"); \ - if (!mmu->mutex) {return (GSL_FAILURE);} -#define GSL_MMU_LOCK() kos_mutex_lock(mmu->mutex) -#define GSL_MMU_UNLOCK() kos_mutex_unlock(mmu->mutex) -#define GSL_MMU_MUTEX_FREE() kos_mutex_free(mmu->mutex); mmu->mutex = 0; -#else -#define GSL_MMU_MUTEX_CREATE() -#define GSL_MMU_LOCK() -#define GSL_MMU_UNLOCK() -#define GSL_MMU_MUTEX_FREE() -#endif #define GSL_PT_ENTRY_GET(va) ((va - pagetable->va_base) >> GSL_PAGESIZE_SHIFT) #define GSL_PT_VIRT_GET(pte) (pagetable->va_base + (pte * GSL_PAGESIZE)) @@ -89,7 +80,8 @@ const unsigned int GSL_PT_PAGE_AP[4] = {(GSL_PT_PAGE_READ | GSL_PT_PAGE_WRITE), #define GSL_PT_MAP_SETBITS(pte, bits) (GSL_PT_MAP_GET(pte) |= (((unsigned int) bits) & GSL_PT_PAGE_AP_MASK)) #define GSL_PT_MAP_SETADDR(pte, pageaddr) (GSL_PT_MAP_GET(pte) = (GSL_PT_MAP_GET(pte) & ~GSL_PT_PAGE_ADDR_MASK) | (((unsigned int) pageaddr) & GSL_PT_PAGE_ADDR_MASK)) -#define GSL_PT_MAP_RESET(pte) (GSL_PT_MAP_GET(pte) = 0) +/* reserve RV and WV bits to work around READ_PROTECTION_ERROR in some cases */ +#define GSL_PT_MAP_RESET(pte) (GSL_PT_MAP_GET(pte) &= ~GSL_PT_PAGE_ADDR_MASK) #define GSL_PT_MAP_RESETBITS(pte, bits) (GSL_PT_MAP_GET(pte) &= ~(((unsigned int) bits) & GSL_PT_PAGE_AP_MASK)) #define GSL_MMU_VIRT_TO_PAGE(va) *((unsigned int *)(pagetable->base.gpuaddr + (GSL_PT_ENTRY_GET(va) * GSL_PT_ENTRY_SIZEBYTES))) @@ -98,13 +90,13 @@ const unsigned int GSL_PT_PAGE_AP[4] = {(GSL_PT_PAGE_READ | GSL_PT_PAGE_WRITE), #define GSL_TLBFLUSH_FILTER_GET(superpte) *((unsigned char *)(((unsigned int)mmu->tlbflushfilter.base) + (superpte / GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS))) #define GSL_TLBFLUSH_FILTER_SETDIRTY(superpte) (GSL_TLBFLUSH_FILTER_GET((superpte)) |= 1 << (superpte % GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS)) #define GSL_TLBFLUSH_FILTER_ISDIRTY(superpte) (GSL_TLBFLUSH_FILTER_GET((superpte)) & (1 << (superpte % GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS))) -#define GSL_TLBFLUSH_FILTER_RESET() kos_memset(mmu->tlbflushfilter.base, 0, mmu->tlbflushfilter.size) +#define GSL_TLBFLUSH_FILTER_RESET() memset(mmu->tlbflushfilter.base, 0, mmu->tlbflushfilter.size) ////////////////////////////////////////////////////////////////////////////// // process index in pagetable object table ////////////////////////////////////////////////////////////////////////////// -OSINLINE int +static __inline int kgsl_mmu_getprocessindex(unsigned int pid, int *pindex) { int status = GSL_SUCCESS; @@ -123,7 +115,7 @@ kgsl_mmu_getprocessindex(unsigned int pid, int *pindex) ////////////////////////////////////////////////////////////////////////////// // pagetable object for current caller process ////////////////////////////////////////////////////////////////////////////// -OSINLINE gsl_pagetable_t* +static __inline gsl_pagetable_t* kgsl_mmu_getpagetableobject(gsl_mmu_t *mmu, unsigned int pid) { int pindex = 0; @@ -171,7 +163,7 @@ kgsl_mmu_debug(gsl_mmu_t *mmu, gsl_mmu_debug_t *regs) { unsigned int devindex = mmu->device->id-1; // device_id is 1 based - kos_memset(regs, 0, sizeof(gsl_mmu_debug_t)); + memset(regs, 0, sizeof(gsl_mmu_debug_t)); mmu->device->ftbl.device_regread(mmu->device, gsl_cfg_mmu_reg[devindex].CONFIG, ®s->config); mmu->device->ftbl.device_regread(mmu->device, gsl_cfg_mmu_reg[devindex].MPU_BASE, ®s->mpu_base); @@ -198,7 +190,7 @@ kgsl_mmu_checkconsistency(gsl_pagetable_t *pagetable) if (pagetable->last_superpte % GSL_PT_SUPER_PTE != 0) { - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_checkconsistency. Return value %B\n", GSL_FAILURE ); return (GSL_FAILURE); } @@ -234,7 +226,7 @@ kgsl_mmu_destroypagetableobject(gsl_mmu_t *mmu, unsigned int pid) int pindex; gsl_pagetable_t *pagetable; - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_pagetable_t* kgsl_mmu_destroypagetableobject(gsl_mmu_t *mmu=0x%08x, unsigned int pid=0x%08x)\n", mmu, pid ); + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_pagetable_t* kgsl_mmu_destroypagetableobject(gsl_mmu_t *mmu=0x%08x, uint pid=0x%08x)\n", mmu, pid ); if (kgsl_mmu_getprocessindex(pid, &pindex) != GSL_SUCCESS) { @@ -256,9 +248,9 @@ kgsl_mmu_destroypagetableobject(gsl_mmu_t *mmu, unsigned int pid) { /* many dumpx test cases forcefully exit, and thus trigger this assert. */ /* Because it is an annoyance for HW guys, it is disabled for dumpx */ - if(!gsl_driver.flags_debug & GSL_DBGFLAGS_DUMPX) + if(!(gsl_driver.flags_debug & GSL_DBGFLAGS_DUMPX)) { - KOS_ASSERT(0); + DEBUG_ASSERT(0); return (GSL_FAILURE); } } @@ -266,10 +258,10 @@ kgsl_mmu_destroypagetableobject(gsl_mmu_t *mmu, unsigned int pid) if (pagetable->base.gpuaddr) { - kgsl_sharedmem_free0(&pagetable->base, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&pagetable->base, current->tgid); } - kos_free(pagetable); + kfree(pagetable); // clear pagetable object reference for all "device mmu"/"current caller process" combinations for (tmp_id = GSL_DEVICE_ANY + 1; tmp_id <= GSL_DEVICE_MAX; tmp_id++) @@ -305,7 +297,7 @@ kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu, unsigned int pid) int pindex; gsl_flags_t flags; - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_pagetable_t* kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu=0x%08x, unsigned int pid=0x%08x)\n", mmu, pid ); + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_pagetable_t* kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu=0x%08x, uint pid=0x%08x)\n", mmu, pid ); status = kgsl_mmu_getprocessindex(pid, &pindex); if (status != GSL_SUCCESS) @@ -334,8 +326,8 @@ kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu, unsigned int pid) // pagetable object exists if (tmp_pagetable) { - KOS_ASSERT(tmp_pagetable->va_base == mmu->va_base); - KOS_ASSERT(tmp_pagetable->va_range == mmu->va_range); + DEBUG_ASSERT(tmp_pagetable->va_base == mmu->va_base); + DEBUG_ASSERT(tmp_pagetable->va_range == mmu->va_range); // set pagetable object reference mmu->pagetable[pindex] = tmp_pagetable; @@ -343,7 +335,7 @@ kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu, unsigned int pid) // create new pagetable object else { - mmu->pagetable[pindex] = (void *)kos_malloc(sizeof(gsl_pagetable_t)); + mmu->pagetable[pindex] = (void *)kmalloc(sizeof(gsl_pagetable_t), GFP_KERNEL); if (!mmu->pagetable[pindex]) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Unable to allocate pagetable object.\n" ); @@ -351,7 +343,7 @@ kgsl_mmu_createpagetableobject(gsl_mmu_t *mmu, unsigned int pid) return (NULL); } - kos_memset(mmu->pagetable[pindex], 0, sizeof(gsl_pagetable_t)); + memset(mmu->pagetable[pindex], 0, sizeof(gsl_pagetable_t)); mmu->pagetable[pindex]->pid = pid; mmu->pagetable[pindex]->refcnt = 0; @@ -398,8 +390,6 @@ kgsl_mmu_setpagetable(gsl_device_t *device, unsigned int pid) kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> gsl_pagetable_t* kgsl_mmu_setpagetable(gsl_device_t *device=0x%08x)\n", device ); - GSL_MMU_LOCK(); - if (mmu->flags & GSL_FLAGS_STARTED) { #ifdef GSL_MMU_PAGETABLE_PERPROCESS @@ -438,8 +428,6 @@ kgsl_mmu_setpagetable(gsl_device_t *device, unsigned int pid) } } - GSL_MMU_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_setpagetable. Return value %B\n", status ); return (status); @@ -509,8 +497,8 @@ kgsl_mmu_init(gsl_device_t *device) device->ftbl.device_idle(device, GSL_TIMEOUT_DEFAULT); // make sure aligned to pagesize - KOS_ASSERT((mmu->mpu_base & ((1 << GSL_PAGESIZE_SHIFT)-1)) == 0); - KOS_ASSERT(((mmu->mpu_base + mmu->mpu_range) & ((1 << GSL_PAGESIZE_SHIFT)-1)) == 0); + DEBUG_ASSERT((mmu->mpu_base & ((1 << GSL_PAGESIZE_SHIFT)-1)) == 0); + DEBUG_ASSERT(((mmu->mpu_base + mmu->mpu_range) & ((1 << GSL_PAGESIZE_SHIFT)-1)) == 0); // define physical memory range accessible by the core device->ftbl.device_regwrite(device, gsl_cfg_mmu_reg[devindex].MPU_BASE, mmu->mpu_base); @@ -525,13 +513,11 @@ kgsl_mmu_init(gsl_device_t *device) // sub-client MMU lookups require address translation if ((mmu->config & ~0x1) > 0) { - GSL_MMU_MUTEX_CREATE(); - // make sure virtual address range is a multiple of 64Kb - KOS_ASSERT((mmu->va_range & ((1 << 16)-1)) == 0); + DEBUG_ASSERT((mmu->va_range & ((1 << 16)-1)) == 0); // setup pagetable object - pagetable = kgsl_mmu_createpagetableobject(mmu, GSL_CALLER_PROCESSID_GET()); + pagetable = kgsl_mmu_createpagetableobject(mmu, current->tgid); if (!pagetable) { kgsl_mmu_close(device); @@ -543,7 +529,7 @@ kgsl_mmu_init(gsl_device_t *device) // create tlb flush filter to track dirty superPTE's -- one bit per superPTE mmu->tlbflushfilter.size = (mmu->va_range / (GSL_PAGESIZE * GSL_PT_SUPER_PTE * 8)) + 1; - mmu->tlbflushfilter.base = (unsigned int *)kos_malloc(mmu->tlbflushfilter.size); + mmu->tlbflushfilter.base = (unsigned int *)kmalloc(mmu->tlbflushfilter.size, GFP_KERNEL); if (!mmu->tlbflushfilter.base) { kgsl_mmu_close(device); @@ -603,15 +589,15 @@ kgsl_mmu_map(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, const gsl_scatterlist_t *sca gsl_pagetable_t *pagetable; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_mmu_map(gsl_mmu_t *mmu=0x%08x, gpuaddr_t gpubaseaddr=0x%08x, gsl_scatterlist_t *scatterlist=%M, gsl_flags_t flags=%d, unsigned int pid=%d)\n", + "--> int kgsl_mmu_map(gsl_mmu_t *mmu=0x%08x, gpuaddr_t gpubaseaddr=0x%08x, gsl_scatterlist_t *scatterlist=%S, gsl_flags_t flags=%x, uint pid=0x%08x)\n", mmu, gpubaseaddr, scatterlist, flags, pid ); - KOS_ASSERT(scatterlist); + DEBUG_ASSERT(scatterlist); if (scatterlist->num <= 0) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: num pages is too small.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_map. Return value %B\n", GSL_FAILURE ); return (GSL_FAILURE); } @@ -619,12 +605,9 @@ kgsl_mmu_map(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, const gsl_scatterlist_t *sca // get gpu access permissions ap = GSL_PT_PAGE_AP[((flags & GSL_MEMFLAGS_GPUAP_MASK) >> GSL_MEMFLAGS_GPUAP_SHIFT)]; - GSL_MMU_LOCK(); - pagetable = kgsl_mmu_getpagetableobject(mmu, pid); if (!pagetable) { - GSL_MMU_UNLOCK(); return (GSL_FAILURE); } @@ -695,12 +678,10 @@ kgsl_mmu_map(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, const gsl_scatterlist_t *sca { // this should never happen kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, "FATAL: This should never happen.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); status = GSL_FAILURE; } - GSL_MMU_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_map. Return value %B\n", GSL_SUCCESS ); return (status); @@ -708,6 +689,16 @@ kgsl_mmu_map(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, const gsl_scatterlist_t *sca //---------------------------------------------------------------------------- +static bool is_superpte_empty(gsl_pagetable_t *pagetable, unsigned int superpte) +{ + int i; + for (i = 0; i < GSL_PT_SUPER_PTE; i++) { + if (GSL_PT_MAP_GET(superpte+i)) + return false; + } + return true; +} + int kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pid) { @@ -720,13 +711,13 @@ kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pi unsigned int pte, ptefirst, ptelast, superpte; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_mmu_unmap(gsl_mmu_t *mmu=0x%08x, gpuaddr_t gpubaseaddr=0x%08x, int range=%d, unsigned int pid=%d)\n", + "--> int kgsl_mmu_unmap(gsl_mmu_t *mmu=0x%08x, gpuaddr_t gpubaseaddr=0x%08x, int range=%d, uint pid=0x%08x)\n", mmu, gpubaseaddr, range, pid ); if (range <= 0) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Range is too small.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_unmap. Return value %B\n", GSL_FAILURE ); return (GSL_FAILURE); } @@ -737,12 +728,9 @@ kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pi numpages++; } - GSL_MMU_LOCK(); - pagetable = kgsl_mmu_getpagetableobject(mmu, pid); if (!pagetable) { - GSL_MMU_UNLOCK(); return (GSL_FAILURE); } @@ -777,7 +765,10 @@ kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pi { do { - pagetable->last_superpte -= GSL_PT_SUPER_PTE; + if (is_superpte_empty(pagetable, superpte)) + pagetable->last_superpte -= GSL_PT_SUPER_PTE; + else + break; } while (!GSL_PT_MAP_GETADDR(pagetable->last_superpte) && pagetable->last_superpte >= GSL_PT_SUPER_PTE); } @@ -787,15 +778,13 @@ kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pi { // this should never happen kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_FATAL, "FATAL: This should never happen.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); status = GSL_FAILURE; } // invalidate tlb, debug only KGSL_DEBUG(GSL_DBGFLAGS_MMU, mmu->device->ftbl.mmu_tlbinvalidate(mmu->device, gsl_cfg_mmu_reg[mmu->device->id-1].INVALIDATE, pagetable->pid)); - GSL_MMU_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_unmap. Return value %B\n", GSL_SUCCESS ); return (status); @@ -825,17 +814,14 @@ kgsl_mmu_getmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, gsl_scatterlis if (range <= 0 || scatterlist->num != numpages) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Range is too small.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_getmap. Return value %B\n", GSL_FAILURE ); return (GSL_FAILURE); } - GSL_MMU_LOCK(); - pagetable = kgsl_mmu_getpagetableobject(mmu, pid); if (!pagetable) { - GSL_MMU_UNLOCK(); return (GSL_FAILURE); } @@ -869,8 +855,6 @@ kgsl_mmu_getmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, gsl_scatterlis scatterlist->pages[0] = GSL_PT_MAP_GETADDR(ptefirst); } - GSL_MMU_UNLOCK(); - scatterlist->contiguous = contiguous; return (GSL_SUCCESS); @@ -899,7 +883,7 @@ kgsl_mmu_close(gsl_device_t *device) if (mmu->flags & GSL_FLAGS_STARTED) { // terminate pagetable object - kgsl_mmu_destroypagetableobject(mmu, GSL_CALLER_PROCESSID_GET()); + kgsl_mmu_destroypagetableobject(mmu, current->tgid); } // no more processes attached to current device mmu @@ -913,9 +897,9 @@ kgsl_mmu_close(gsl_device_t *device) { /* many dumpx test cases forcefully exit, and thus trigger this assert. */ /* Because it is an annoyance for HW guys, it is disabled for dumpx */ - if(!gsl_driver.flags_debug & GSL_DBGFLAGS_DUMPX) + if(!(gsl_driver.flags_debug & GSL_DBGFLAGS_DUMPX)) { - KOS_ASSERT(0); + DEBUG_ASSERT(0); return (GSL_FAILURE); } } @@ -932,16 +916,14 @@ kgsl_mmu_close(gsl_device_t *device) if (mmu->tlbflushfilter.base) { - kos_free(mmu->tlbflushfilter.base); + kfree(mmu->tlbflushfilter.base); } if (mmu->dummyspace.gpuaddr) { - kgsl_sharedmem_free0(&mmu->dummyspace, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&mmu->dummyspace, current->tgid); } - GSL_MMU_MUTEX_FREE(); - mmu->flags &= ~GSL_FLAGS_STARTED; mmu->flags &= ~GSL_FLAGS_INITIALIZED; mmu->flags &= ~GSL_FLAGS_INITIALIZED0; @@ -966,9 +948,7 @@ kgsl_mmu_attachcallback(gsl_mmu_t *mmu, unsigned int pid) int status = GSL_SUCCESS; gsl_pagetable_t *pagetable; - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_mmu_attachcallback(gsl_mmu_t *mmu=0x%08x, unsigned int pid=0x%08x)\n", mmu, pid ); - - GSL_MMU_LOCK(); + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_mmu_attachcallback(gsl_mmu_t *mmu=0x%08x, uint pid=0x%08x)\n", mmu, pid ); if (mmu->flags & GSL_FLAGS_INITIALIZED0) { @@ -990,8 +970,6 @@ kgsl_mmu_attachcallback(gsl_mmu_t *mmu, unsigned int pid) } } - GSL_MMU_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_attachcallback. Return value %B\n", status ); return (status); @@ -1008,9 +986,7 @@ kgsl_mmu_detachcallback(gsl_mmu_t *mmu, unsigned int pid) int status = GSL_SUCCESS; gsl_pagetable_t *pagetable; - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_mmu_detachcallback(gsl_mmu_t *mmu=0x%08x, unsigned int pid=0x%08x)\n", mmu, pid ); - - GSL_MMU_LOCK(); + kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_mmu_detachcallback(gsl_mmu_t *mmu=0x%08x, uint pid=0x%08x)\n", mmu, pid ); if (mmu->flags & GSL_FLAGS_INITIALIZED0) { @@ -1032,8 +1008,6 @@ kgsl_mmu_detachcallback(gsl_mmu_t *mmu, unsigned int pid) } } - GSL_MMU_UNLOCK(); - kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_mmu_detachcallback. Return value %B\n", status ); return (status); @@ -1047,21 +1021,17 @@ kgsl_mmu_querystats(gsl_mmu_t *mmu, gsl_mmustats_t *stats) #ifdef GSL_STATS_MMU int status = GSL_SUCCESS; - KOS_ASSERT(stats); - - GSL_MMU_LOCK(); + DEBUG_ASSERT(stats); if (mmu->flags & GSL_FLAGS_STARTED) { - kos_memcpy(stats, &mmu->stats, sizeof(gsl_mmustats_t)); + memcpy(stats, &mmu->stats, sizeof(gsl_mmustats_t)); } else { - kos_memset(stats, 0, sizeof(gsl_mmustats_t)); + memset(stats, 0, sizeof(gsl_mmustats_t)); } - GSL_MMU_UNLOCK(); - return (status); #else // unreferenced formal parameters diff --git a/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c b/drivers/mxc/amd-gpu/gsl_ringbuffer.c similarity index 97% rename from drivers/mxc/amd-gpu/common/gsl_ringbuffer.c rename to drivers/mxc/amd-gpu/gsl_ringbuffer.c index fb05ff3cbe1..d957928e56b 100644 --- a/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c +++ b/drivers/mxc/amd-gpu/gsl_ringbuffer.c @@ -16,9 +16,12 @@ * */ +#include + #include "gsl.h" #include "gsl_hal.h" #include "gsl_cmdstream.h" +#include "gsl_ringbuffer.h" #ifdef GSL_BLD_YAMATO @@ -45,7 +48,7 @@ ////////////////////////////////////////////////////////////////////////////// // ringbuffer size log2 quadwords equivalent ////////////////////////////////////////////////////////////////////////////// -OSINLINE unsigned int +static __inline unsigned int gsl_ringbuffer_sizelog2quadwords(unsigned int sizedwords) { unsigned int sizelog2quadwords = 0; @@ -97,7 +100,7 @@ kgsl_cp_intrcallback(gsl_intrid_t id, void *cookie) case GSL_INTR_YDX_CP_RING_BUFFER: // signal intr completion event - kos_event_signal(rb->device->intr.evnt[id]); + complete_all(&rb->device->intr.evnt[id]); break; default: @@ -120,8 +123,6 @@ kgsl_ringbuffer_watchdog() if (rb->flags & GSL_FLAGS_STARTED) { - GSL_RB_MUTEX_LOCK(); - GSL_RB_GET_READPTR(rb, &rb->rptr); // ringbuffer is currently not empty @@ -152,9 +153,7 @@ kgsl_ringbuffer_watchdog() rb->watchdog.flags &= ~GSL_FLAGS_ACTIVE; } - GSL_RB_MUTEX_UNLOCK(); } - kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_ringbuffer_watchdog.\n" ); } @@ -162,7 +161,7 @@ kgsl_ringbuffer_watchdog() #ifdef _DEBUG -OSINLINE void +static __inline void kgsl_ringbuffer_checkregister(unsigned int reg, int pmodecheck) { if (pmodecheck) @@ -171,7 +170,7 @@ kgsl_ringbuffer_checkregister(unsigned int reg, int pmodecheck) if (reg <= (GSL_RB_PROTECTED_MODE_CONTROL & 0x3FFF)) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Register protection mode violation.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); } } @@ -179,7 +178,7 @@ kgsl_ringbuffer_checkregister(unsigned int reg, int pmodecheck) if (reg > (gsl_driver.device[GSL_DEVICE_YAMATO-1].regspace.sizebytes >> 2)) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Register out of range.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); } } @@ -219,7 +218,7 @@ kgsl_ringbuffer_checkpm4type3(unsigned int header, unsigned int** cmds, int indi if (indirection > 2) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Only two levels of indirection supported.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); } switch(pm4header.it_opcode) @@ -258,7 +257,7 @@ kgsl_ringbuffer_checkpm4type3(unsigned int header, unsigned int** cmds, int indi if(indirection != 0) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: ME INIT packet cannot reside in an ib.\n" ); - KOS_ASSERT(0); + DEBUG_ASSERT(0); } break; @@ -342,15 +341,13 @@ kgsl_ringbuffer_checkpm4(unsigned int* cmds, unsigned int sizedwords, int pmodeo static void kgsl_ringbuffer_submit(gsl_ringbuffer_t *rb) { - unsigned int value; - kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, "--> static void kgsl_ringbuffer_submit(gsl_ringbuffer_t *rb=0x%08x)\n", rb ); - KOS_ASSERT(rb->wptr != 0); + DEBUG_ASSERT(rb->wptr != 0); kgsl_device_active(rb->device); - + GSL_RB_UPDATE_WPTR_POLLING(rb); // send the wptr to the hw @@ -424,7 +421,7 @@ kgsl_ringbuffer_addcmds(gsl_ringbuffer_t *rb, unsigned int numcmds) "--> static unsigned int* kgsl_ringbuffer_addcmds(gsl_ringbuffer_t *rb=0x%08x, unsigned int numcmds=%d)\n", rb, numcmds ); - KOS_ASSERT(numcmds < rb->sizedwords); + DEBUG_ASSERT(numcmds < rb->sizedwords); // update host copy of read pointer when running in safe mode if (rb->device->flags & GSL_FLAGS_SAFEMODE) @@ -672,8 +669,6 @@ kgsl_ringbuffer_init(gsl_device_t *device) rb->sizedwords = (2 << gsl_cfg_rb_sizelog2quadwords); rb->blksizequadwords = gsl_cfg_rb_blksizequadwords; - GSL_RB_MUTEX_CREATE(); - // allocate memory for ringbuffer, needs to be double octword aligned // align on page from contiguous physical memory flags = (GSL_MEMFLAGS_ALIGNPAGE | GSL_MEMFLAGS_CONPHYS | GSL_MEMFLAGS_STRICTREQUEST); @@ -736,30 +731,24 @@ kgsl_ringbuffer_close(gsl_ringbuffer_t *rb) kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, "--> int kgsl_ringbuffer_close(gsl_ringbuffer_t *rb=0x%08x)\n", rb ); - GSL_RB_MUTEX_LOCK(); - // stop ringbuffer kgsl_ringbuffer_stop(rb); // free buffer if (rb->buffer_desc.hostptr) { - kgsl_sharedmem_free0(&rb->buffer_desc, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&rb->buffer_desc, current->tgid); } // free memory pointers if (rb->memptrs_desc.hostptr) { - kgsl_sharedmem_free0(&rb->memptrs_desc, GSL_CALLER_PROCESSID_GET()); + kgsl_sharedmem_free0(&rb->memptrs_desc, current->tgid); } rb->flags &= ~GSL_FLAGS_INITIALIZED; - GSL_RB_MUTEX_UNLOCK(); - - GSL_RB_MUTEX_FREE(); - - kos_memset(rb, 0, sizeof(gsl_ringbuffer_t)); + memset(rb, 0, sizeof(gsl_ringbuffer_t)); kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_ringbuffer_close. Return value %B\n", GSL_SUCCESS ); return (GSL_SUCCESS); @@ -797,7 +786,7 @@ kgsl_ringbuffer_issuecmds(gsl_device_t *device, int pmodeoff, unsigned int *cmds #if defined GSL_RB_TIMESTAMP_INTERUPT pmodesizedwords += 2; -#endif +#endif // allocate space in ringbuffer ringcmds = kgsl_ringbuffer_addcmds(rb, pmodesizedwords + sizedwords + 6); @@ -810,7 +799,7 @@ kgsl_ringbuffer_issuecmds(gsl_device_t *device, int pmodeoff, unsigned int *cmds } // copy the cmds to the ringbuffer - kos_memcpy(ringcmds, cmds, (sizedwords << 2)); + memcpy(ringcmds, cmds, (sizedwords << 2)); ringcmds += sizedwords; @@ -874,13 +863,11 @@ kgsl_ringbuffer_issueibcmds(gsl_device_t *device, int drawctxt_index, gpuaddr_t return (GSL_FAILURE); } - KOS_ASSERT(ibaddr); - KOS_ASSERT(sizedwords); + DEBUG_ASSERT(ibaddr); + DEBUG_ASSERT(sizedwords); KGSL_DEBUG(GSL_DBGFLAGS_DUMPX, dumpx_swap = kgsl_dumpx_parse_ibs(ibaddr, sizedwords)); - GSL_RB_MUTEX_LOCK(); - // context switch if needed kgsl_drawctxt_switch(device, &device->drawctxt[drawctxt_index], flags); @@ -888,9 +875,7 @@ kgsl_ringbuffer_issueibcmds(gsl_device_t *device, int drawctxt_index, gpuaddr_t link[1] = ibaddr; link[2] = sizedwords; - *timestamp = kgsl_ringbuffer_issuecmds(device, 0, &link[0], 3, GSL_CALLER_PROCESSID_GET()); - - GSL_RB_MUTEX_UNLOCK(); + *timestamp = kgsl_ringbuffer_issuecmds(device, 0, &link[0], 3, current->tgid); // idle device when running in safe mode if (device->flags & GSL_FLAGS_SAFEMODE) @@ -926,7 +911,7 @@ kgsl_ringbuffer_issueibcmds(gsl_device_t *device, int drawctxt_index, gpuaddr_t static void kgsl_ringbuffer_debug(gsl_ringbuffer_t *rb, gsl_rb_debug_t *rb_debug) { - kos_memset(rb_debug, 0, sizeof(gsl_rb_debug_t)); + memset(rb_debug, 0, sizeof(gsl_rb_debug_t)); rb_debug->pm4_ucode_rel = PM4_MICROCODE_VERSION; rb_debug->pfp_ucode_rel = PFP_MICROCODE_VERSION; @@ -956,14 +941,14 @@ int kgsl_ringbuffer_querystats(gsl_ringbuffer_t *rb, gsl_rbstats_t *stats) { #ifdef GSL_STATS_RINGBUFFER - KOS_ASSERT(stats); + DEBUG_ASSERT(stats); if (!(rb->flags & GSL_FLAGS_STARTED)) { return (GSL_FAILURE); } - kos_memcpy(stats, &rb->stats, sizeof(gsl_rbstats_t)); + memcpy(stats, &rb->stats, sizeof(gsl_rbstats_t)); return (GSL_SUCCESS); #else diff --git a/drivers/mxc/amd-gpu/common/gsl_sharedmem.c b/drivers/mxc/amd-gpu/gsl_sharedmem.c similarity index 89% rename from drivers/mxc/amd-gpu/common/gsl_sharedmem.c rename to drivers/mxc/amd-gpu/gsl_sharedmem.c index 51e66f97c52..434f076705b 100644 --- a/drivers/mxc/amd-gpu/common/gsl_sharedmem.c +++ b/drivers/mxc/amd-gpu/gsl_sharedmem.c @@ -16,6 +16,9 @@ * */ +#include +#include + #include "gsl.h" #include "gsl_hal.h" @@ -30,11 +33,11 @@ #define GSL_MEMFLAGS_APERTURE_GET(flags, aperture_id) \ aperture_id = (gsl_apertureid_t)((flags & GSL_MEMFLAGS_APERTURE_MASK) >> GSL_MEMFLAGS_APERTURE_SHIFT); \ - KOS_ASSERT(aperture_id < GSL_APERTURE_MAX); + DEBUG_ASSERT(aperture_id < GSL_APERTURE_MAX); #define GSL_MEMFLAGS_CHANNEL_GET(flags, channel_id) \ channel_id = (gsl_channelid_t)((flags & GSL_MEMFLAGS_CHANNEL_MASK) >> GSL_MEMFLAGS_CHANNEL_SHIFT); \ - KOS_ASSERT(channel_id < GSL_CHANNEL_MAX); + DEBUG_ASSERT(channel_id < GSL_CHANNEL_MAX); #define GSL_MEMDESC_APERTURE_SET(memdesc, aperture_index) \ memdesc->priv = (memdesc->priv & ~GSL_APERTURE_MASK) | ((aperture_index << GSL_APERTURE_SHIFT) & GSL_APERTURE_MASK); @@ -46,14 +49,14 @@ memdesc->priv = (memdesc->priv & ~GSL_EXTALLOC_MASK) | ((flag << GSL_EXTALLOC_SHIFT) & GSL_EXTALLOC_MASK); #define GSL_MEMDESC_APERTURE_GET(memdesc, aperture_index) \ - KOS_ASSERT(memdesc); \ + DEBUG_ASSERT(memdesc); \ aperture_index = ((memdesc->priv & GSL_APERTURE_MASK) >> GSL_APERTURE_SHIFT); \ - KOS_ASSERT(aperture_index < GSL_SHMEM_MAX_APERTURES); + DEBUG_ASSERT(aperture_index < GSL_SHMEM_MAX_APERTURES); #define GSL_MEMDESC_DEVICE_GET(memdesc, device_id) \ - KOS_ASSERT(memdesc); \ + DEBUG_ASSERT(memdesc); \ device_id = (gsl_deviceid_t)((memdesc->priv & GSL_DEVICEID_MASK) >> GSL_DEVICEID_SHIFT); \ - KOS_ASSERT(device_id <= GSL_DEVICE_MAX); + DEBUG_ASSERT(device_id <= GSL_DEVICE_MAX); #define GSL_MEMDESC_EXTALLOC_ISMARKED(memdesc) \ ((memdesc->priv & GSL_EXTALLOC_MASK) >> GSL_EXTALLOC_SHIFT) @@ -62,10 +65,10 @@ ////////////////////////////////////////////////////////////////////////////// // aperture index in shared memory object ////////////////////////////////////////////////////////////////////////////// -OSINLINE int +static __inline int kgsl_sharedmem_getapertureindex(gsl_sharedmem_t *shmem, gsl_apertureid_t aperture_id, gsl_channelid_t channel_id) { - KOS_ASSERT(shmem->aperturelookup[aperture_id][channel_id] < shmem->numapertures); + DEBUG_ASSERT(shmem->aperturelookup[aperture_id][channel_id] < shmem->numapertures); return (shmem->aperturelookup[aperture_id][channel_id]); } @@ -123,7 +126,7 @@ kgsl_sharedmem_init(gsl_sharedmem_t *shmem) } // make sure aligned to page size - KOS_ASSERT((gpubaseaddr & ((1 << GSL_PAGESIZE_SHIFT) - 1)) == 0); + DEBUG_ASSERT((gpubaseaddr & ((1 << GSL_PAGESIZE_SHIFT) - 1)) == 0); // make a multiple of page size sizebytes = (sizebytes & ~((1 << GSL_PAGESIZE_SHIFT) - 1)); @@ -190,7 +193,7 @@ kgsl_sharedmem_close(gsl_sharedmem_t *shmem) } } - kos_memset(shmem, 0, sizeof(gsl_sharedmem_t)); + memset(shmem, 0, sizeof(gsl_sharedmem_t)); } kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_sharedmem_close. Return value %B\n", result ); @@ -212,16 +215,16 @@ kgsl_sharedmem_alloc0(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes gsl_sharedmem_t *shmem = &gsl_driver.shmem; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_alloc(gsl_deviceid_t device_id=%D, gsl_flags_t flags=0x%08x, int sizebytes=%d, gsl_memdesc_t *memdesc=%M)\n", + "--> int kgsl_sharedmem_alloc(gsl_deviceid_t device_id=%D, gsl_flags_t flags=%x, int sizebytes=%d, gsl_memdesc_t *memdesc=%M)\n", device_id, flags, sizebytes, memdesc ); - KOS_ASSERT(sizebytes); - KOS_ASSERT(memdesc); + DEBUG_ASSERT(sizebytes); + DEBUG_ASSERT(memdesc); GSL_MEMFLAGS_APERTURE_GET(flags, aperture_id); GSL_MEMFLAGS_CHANNEL_GET(flags, channel_id); - kos_memset(memdesc, 0, sizeof(gsl_memdesc_t)); + memset(memdesc, 0, sizeof(gsl_memdesc_t)); if (!(shmem->flags & GSL_FLAGS_INITIALIZED)) { @@ -268,7 +271,7 @@ kgsl_sharedmem_alloc0(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes } } - KOS_ASSERT(device_id > GSL_DEVICE_ANY && device_id <= GSL_DEVICE_MAX); + DEBUG_ASSERT(device_id > GSL_DEVICE_ANY && device_id <= GSL_DEVICE_MAX); // get mmu reference mmu = &gsl_driver.device[device_id-1].mmu; @@ -347,21 +350,21 @@ kgsl_sharedmem_alloc0(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes scatterlist.num++; } - scatterlist.pages = kos_malloc(sizeof(unsigned int) * scatterlist.num); + scatterlist.pages = kmalloc(sizeof(unsigned int) * scatterlist.num, GFP_KERNEL); if (scatterlist.pages) { // allocate physical pages result = kgsl_hal_allocphysical(memdesc->gpuaddr, scatterlist.num, scatterlist.pages); if (result == GSL_SUCCESS) { - result = kgsl_mmu_map(mmu, memdesc->gpuaddr, &scatterlist, flags, GSL_CALLER_PROCESSID_GET()); + result = kgsl_mmu_map(mmu, memdesc->gpuaddr, &scatterlist, flags, current->tgid); if (result != GSL_SUCCESS) { kgsl_hal_freephysical(memdesc->gpuaddr, scatterlist.num, scatterlist.pages); } } - kos_free(scatterlist.pages); + kfree(scatterlist.pages); } else { @@ -384,13 +387,13 @@ kgsl_sharedmem_alloc0(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_alloc(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes, gsl_memdesc_t *memdesc) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); status = kgsl_sharedmem_alloc0(device_id, flags, sizebytes, memdesc); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } @@ -426,7 +429,7 @@ kgsl_sharedmem_free0(gsl_memdesc_t *memdesc, unsigned int pid) kgsl_memarena_free(shmem->apertures[aperture_index].memarena, memdesc); // clear descriptor - kos_memset(memdesc, 0, sizeof(gsl_memdesc_t)); + memset(memdesc, 0, sizeof(gsl_memdesc_t)); } else { @@ -440,14 +443,14 @@ kgsl_sharedmem_free0(gsl_memdesc_t *memdesc, unsigned int pid) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_free(gsl_memdesc_t *memdesc) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); - status = kgsl_sharedmem_free0(memdesc, GSL_CALLER_PROCESSID_GET()); - GSL_API_MUTEX_UNLOCK(); - return status; + mutex_lock(&gsl_driver.lock); + status = kgsl_sharedmem_free0(memdesc, current->tgid); + mutex_unlock(&gsl_driver.lock); + return status; } //---------------------------------------------------------------------------- @@ -460,7 +463,7 @@ kgsl_sharedmem_read0(const gsl_memdesc_t *memdesc, void *dst, unsigned int offse unsigned int gpuoffsetbytes; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_read(gsl_memdesc_t *memdesc=%M, void *dst=0x%08x, unsigned int offsetbytes=%d, unsigned int sizebytes=%d)\n", + "--> int kgsl_sharedmem_read(gsl_memdesc_t *memdesc=%M, void *dst=0x%08x, uint offsetbytes=%u, uint sizebytes=%u)\n", memdesc, dst, offsetbytes, sizebytes ); GSL_MEMDESC_APERTURE_GET(memdesc, aperture_index); @@ -480,8 +483,8 @@ kgsl_sharedmem_read0(const gsl_memdesc_t *memdesc, void *dst, unsigned int offse return (GSL_FAILURE); } - KOS_ASSERT(dst); - KOS_ASSERT(sizebytes); + DEBUG_ASSERT(dst); + DEBUG_ASSERT(sizebytes); if (memdesc->gpuaddr < shmem->apertures[aperture_index].memarena->gpubaseaddr) { @@ -504,13 +507,13 @@ kgsl_sharedmem_read0(const gsl_memdesc_t *memdesc, void *dst, unsigned int offse //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_read(const gsl_memdesc_t *memdesc, void *dst, unsigned int offsetbytes, unsigned int sizebytes, unsigned int touserspace) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); status = kgsl_sharedmem_read0(memdesc, dst, offsetbytes, sizebytes, touserspace); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } @@ -524,7 +527,7 @@ kgsl_sharedmem_write0(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, vo unsigned int gpuoffsetbytes; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_write(gsl_memdesc_t *memdesc=%M, unsigned int offsetbytes=%d, void *src=0x%08x, unsigned int sizebytes=%d)\n", + "--> int kgsl_sharedmem_write(gsl_memdesc_t *memdesc=%M, uint offsetbytes=%u, void *src=0x%08x, uint sizebytes=%u)\n", memdesc, offsetbytes, src, sizebytes ); GSL_MEMDESC_APERTURE_GET(memdesc, aperture_index); @@ -544,10 +547,10 @@ kgsl_sharedmem_write0(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, vo return (GSL_FAILURE); } - KOS_ASSERT(src); - KOS_ASSERT(sizebytes); - KOS_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); - KOS_ASSERT((memdesc->gpuaddr + sizebytes) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); + DEBUG_ASSERT(src); + DEBUG_ASSERT(sizebytes); + DEBUG_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); + DEBUG_ASSERT((memdesc->gpuaddr + sizebytes) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); gpuoffsetbytes = (memdesc->gpuaddr - shmem->apertures[aperture_index].memarena->gpubaseaddr) + offsetbytes; @@ -564,13 +567,13 @@ kgsl_sharedmem_write0(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, vo //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_write(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, void *src, unsigned int sizebytes, unsigned int fromuserspace) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); status = kgsl_sharedmem_write0(memdesc, offsetbytes, src, sizebytes, fromuserspace); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } @@ -604,9 +607,9 @@ kgsl_sharedmem_set0(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsi return (GSL_FAILURE); } - KOS_ASSERT(sizebytes); - KOS_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); - KOS_ASSERT((memdesc->gpuaddr + sizebytes) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); + DEBUG_ASSERT(sizebytes); + DEBUG_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); + DEBUG_ASSERT((memdesc->gpuaddr + sizebytes) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); gpuoffsetbytes = (memdesc->gpuaddr - shmem->apertures[aperture_index].memarena->gpubaseaddr) + offsetbytes; @@ -623,19 +626,19 @@ kgsl_sharedmem_set0(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsi //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_set(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int value, unsigned int sizebytes) { int status = GSL_SUCCESS; - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); status = kgsl_sharedmem_set0(memdesc, offsetbytes, value, sizebytes); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); return status; } //---------------------------------------------------------------------------- -KGSL_API unsigned int +unsigned int kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags) { gsl_apertureid_t aperture_id; @@ -650,20 +653,20 @@ kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags) (void) device_id; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id=%D, gsl_flags_t flags=0x%08x)\n", + "--> int kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id=%D, gsl_flags_t flags=%x)\n", device_id, flags ); GSL_MEMFLAGS_APERTURE_GET(flags, aperture_id); GSL_MEMFLAGS_CHANNEL_GET(flags, channel_id); - GSL_API_MUTEX_LOCK(); + mutex_lock(&gsl_driver.lock); shmem = &gsl_driver.shmem; if (!(shmem->flags & GSL_FLAGS_INITIALIZED)) { kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_ERROR, "ERROR: Shared memory not initialized.\n" ); - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_sharedmem_largestfreeblock. Return value %d\n", 0 ); return (0); } @@ -675,7 +678,7 @@ kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags) result = kgsl_memarena_getlargestfreeblock(shmem->apertures[aperture_index].memarena, flags); } - GSL_API_MUTEX_UNLOCK(); + mutex_unlock(&gsl_driver.lock); kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, "<-- kgsl_sharedmem_largestfreeblock. Return value %d\n", result ); @@ -684,7 +687,7 @@ kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatterlist_t *scatterlist, gsl_memdesc_t *memdesc) { int status = GSL_FAILURE; @@ -693,7 +696,7 @@ kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatte gsl_deviceid_t tmp_id; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_map(gsl_deviceid_t device_id=%D, gsl_flags_t flags=0x%08x, gsl_scatterlist_t scatterlist=%M, gsl_memdesc_t *memdesc=%M)\n", + "--> int kgsl_sharedmem_map(gsl_deviceid_t device_id=%D, gsl_flags_t flags=%x, gsl_scatterlist_t scatterlist=%S, gsl_memdesc_t *memdesc=%M)\n", device_id, flags, memdesc, scatterlist ); // execute pending device action @@ -734,7 +737,7 @@ kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatte } } - KOS_ASSERT(device_id > GSL_DEVICE_ANY && device_id <= GSL_DEVICE_MAX); + DEBUG_ASSERT(device_id > GSL_DEVICE_ANY && device_id <= GSL_DEVICE_MAX); if (shmem->flags & GSL_FLAGS_INITIALIZED) { @@ -742,8 +745,8 @@ kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatte if (kgsl_memarena_isvirtualized(shmem->apertures[aperture_index].memarena)) { - KOS_ASSERT(scatterlist->num); - KOS_ASSERT(scatterlist->pages); + DEBUG_ASSERT(scatterlist->num); + DEBUG_ASSERT(scatterlist->pages); status = kgsl_memarena_alloc(shmem->apertures[aperture_index].memarena, flags, scatterlist->num *GSL_PAGESIZE, memdesc); if (status == GSL_SUCCESS) @@ -754,7 +757,7 @@ kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatte // mark descriptor's memory as externally allocated -- i.e. outside GSL GSL_MEMDESC_EXTALLOC_SET(memdesc, 1); - status = kgsl_mmu_map(&gsl_driver.device[device_id-1].mmu, memdesc->gpuaddr, scatterlist, flags, GSL_CALLER_PROCESSID_GET()); + status = kgsl_mmu_map(&gsl_driver.device[device_id-1].mmu, memdesc->gpuaddr, scatterlist, flags, current->tgid); if (status != GSL_SUCCESS) { kgsl_memarena_free(shmem->apertures[aperture_index].memarena, memdesc); @@ -770,15 +773,15 @@ kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatte //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_unmap(gsl_memdesc_t *memdesc) { - return (kgsl_sharedmem_free0(memdesc, GSL_CALLER_PROCESSID_GET())); + return (kgsl_sharedmem_free0(memdesc, current->tgid)); } //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_getmap(const gsl_memdesc_t *memdesc, gsl_scatterlist_t *scatterlist) { int status = GSL_SUCCESS; @@ -787,7 +790,7 @@ kgsl_sharedmem_getmap(const gsl_memdesc_t *memdesc, gsl_scatterlist_t *scatterli gsl_sharedmem_t *shmem; kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE, - "--> int kgsl_sharedmem_getmap(gsl_memdesc_t *memdesc=%M, gsl_scatterlist_t scatterlist=%M)\n", + "--> int kgsl_sharedmem_getmap(gsl_memdesc_t *memdesc=%M, gsl_scatterlist_t scatterlist=%S)\n", memdesc, scatterlist ); GSL_MEMDESC_APERTURE_GET(memdesc, aperture_index); @@ -797,16 +800,16 @@ kgsl_sharedmem_getmap(const gsl_memdesc_t *memdesc, gsl_scatterlist_t *scatterli if (shmem->flags & GSL_FLAGS_INITIALIZED) { - KOS_ASSERT(scatterlist->num); - KOS_ASSERT(scatterlist->pages); - KOS_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); - KOS_ASSERT((memdesc->gpuaddr + memdesc->size) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); + DEBUG_ASSERT(scatterlist->num); + DEBUG_ASSERT(scatterlist->pages); + DEBUG_ASSERT(memdesc->gpuaddr >= shmem->apertures[aperture_index].memarena->gpubaseaddr); + DEBUG_ASSERT((memdesc->gpuaddr + memdesc->size) <= (shmem->apertures[aperture_index].memarena->gpubaseaddr + shmem->apertures[aperture_index].memarena->sizebytes)); - kos_memset(scatterlist->pages, 0, sizeof(unsigned int) * scatterlist->num); + memset(scatterlist->pages, 0, sizeof(unsigned int) * scatterlist->num); if (kgsl_memarena_isvirtualized(shmem->apertures[aperture_index].memarena)) { - status = kgsl_mmu_getmap(&gsl_driver.device[device_id-1].mmu, memdesc->gpuaddr, memdesc->size, scatterlist, GSL_CALLER_PROCESSID_GET()); + status = kgsl_mmu_getmap(&gsl_driver.device[device_id-1].mmu, memdesc->gpuaddr, memdesc->size, scatterlist, current->tgid); } else { @@ -830,7 +833,7 @@ kgsl_sharedmem_querystats(gsl_sharedmem_t *shmem, gsl_sharedmem_stats_t *stats) int status = GSL_SUCCESS; int i; - KOS_ASSERT(stats); + DEBUG_ASSERT(stats); if (shmem->flags & GSL_FLAGS_INITIALIZED) { @@ -847,7 +850,7 @@ kgsl_sharedmem_querystats(gsl_sharedmem_t *shmem, gsl_sharedmem_stats_t *stats) } else { - kos_memset(stats, 0, sizeof(gsl_sharedmem_stats_t)); + memset(stats, 0, sizeof(gsl_sharedmem_stats_t)); } return (status); @@ -904,7 +907,7 @@ kgsl_sharedmem_convertaddr(unsigned int addr, int type) //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int sizebytes, unsigned int operation) { int status = GSL_FAILURE; @@ -922,7 +925,7 @@ kgsl_sharedmem_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetb //---------------------------------------------------------------------------- -KGSL_API int +int kgsl_sharedmem_fromhostpointer(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, void* hostptr) { int status = GSL_FAILURE; diff --git a/drivers/mxc/amd-gpu/common/gsl_tbdump.c b/drivers/mxc/amd-gpu/gsl_tbdump.c similarity index 83% rename from drivers/mxc/amd-gpu/common/gsl_tbdump.c rename to drivers/mxc/amd-gpu/gsl_tbdump.c index e22cf894f7b..0279f313a4a 100644 --- a/drivers/mxc/amd-gpu/common/gsl_tbdump.c +++ b/drivers/mxc/amd-gpu/gsl_tbdump.c @@ -16,13 +16,10 @@ * */ -#include -#ifdef WIN32 -#include -#endif +#include + #include "gsl.h" #include "gsl_tbdump.h" -#include "kos_libapi.h" #ifdef TBDUMP @@ -33,9 +30,7 @@ typedef struct TBDump_ static TBDump g_tb; -static oshandle_t tbdump_mutex = 0; -#define TBDUMP_MUTEX_LOCK() if( tbdump_mutex ) kos_mutex_lock( tbdump_mutex ) -#define TBDUMP_MUTEX_UNLOCK() if( tbdump_mutex ) kos_mutex_unlock( tbdump_mutex ) +static struct mutex *tbdump_mutex = NULL; /* ------------------------------------------------------------------------ */ /* ------------------------------------------------------------------------ */ @@ -76,9 +71,13 @@ static void tbdump_getmemhex(char* buffer, unsigned int addr, unsigned int sizew void tbdump_open(char* filename) { - if( !tbdump_mutex ) tbdump_mutex = kos_mutex_create( "TBDUMP_MUTEX" ); + if( !tbdump_mutex ) { + tbdump_mutex = (struct mutex *) kmalloc(sizeof(struct mutex), GFP_KERNEL); + if (tbdump_mutex) + mutex_init(tbdump_mutex); + } - kos_memset( &g_tb, 0, sizeof( g_tb ) ); + memset( &g_tb, 0, sizeof( g_tb ) ); g_tb.file = kos_fopen( filename, "wt" ); @@ -92,14 +91,16 @@ void tbdump_open(char* filename) void tbdump_close() { - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); kos_fclose( g_tb.file ); g_tb.file = 0; - TBDUMP_MUTEX_UNLOCK(); - - if( tbdump_mutex ) kos_mutex_free( tbdump_mutex ); + if( tbdump_mutex ) { + mutex_unlock(tbdump_mutex); + kfree( tbdump_mutex ); + } } /* ------------------------------------------------------------------------ */ @@ -111,7 +112,8 @@ void tbdump_syncmem(unsigned int addr, unsigned int src, unsigned int sizebytes) unsigned int end = addr+sizebytes; char buffer[65]; - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); beg = (beg+15) & ~15; end &= ~15; @@ -122,7 +124,8 @@ void tbdump_syncmem(unsigned int addr, unsigned int src, unsigned int sizebytes) tbdump_printline("19 %08x %i 1 %s", addr, sizebytes, buffer); - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); return; } @@ -155,40 +158,46 @@ void tbdump_syncmem(unsigned int addr, unsigned int src, unsigned int sizebytes) tbdump_printline("19 %08x %i 1 %s", end, (addr+sizebytes)-end, buffer); } - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); } /* ------------------------------------------------------------------------ */ void tbdump_setmem(unsigned int addr, unsigned int value, unsigned int sizebytes) { - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); tbdump_printline("19 %08x 4 %i %032x", addr, (sizebytes+3)/4, value ); - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); } /* ------------------------------------------------------------------------ */ void tbdump_slavewrite(unsigned int addr, unsigned int value) { - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); tbdump_printline("1 %08x %08x", addr, value); - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); } /* ------------------------------------------------------------------------ */ -KGSL_API int +int kgsl_tbdump_waitirq() { if(!g_tb.file) return GSL_FAILURE; - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); tbdump_printinfo("wait irq"); tbdump_printline("10"); @@ -197,14 +206,15 @@ kgsl_tbdump_waitirq() tbdump_printline("1 00000418 00000003"); tbdump_printline("18 00000018 00000000 # slave read & assert"); - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); return GSL_SUCCESS; } /* ------------------------------------------------------------------------ */ -KGSL_API int +int kgsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride, unsigned int width, unsigned int height) { static char filename[20]; @@ -212,13 +222,16 @@ kgsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride if(!g_tb.file) return GSL_FAILURE; - TBDUMP_MUTEX_LOCK(); + if (tbdump_mutex) + mutex_lock(tbdump_mutex); + #pragma warning(disable:4996) sprintf( filename, "tbdump_%08d.bmp", numframe++ ); tbdump_printline("13 %s %d %08x %d %d %d 0", filename, format, (unsigned int)addr, stride, width, height); - TBDUMP_MUTEX_UNLOCK(); + if (tbdump_mutex) + mutex_unlock(tbdump_mutex); return GSL_SUCCESS; } diff --git a/drivers/mxc/amd-gpu/common/gsl_yamato.c b/drivers/mxc/amd-gpu/gsl_yamato.c similarity index 96% rename from drivers/mxc/amd-gpu/common/gsl_yamato.c rename to drivers/mxc/amd-gpu/gsl_yamato.c index 07c651f57f4..9b36ea96d46 100644 --- a/drivers/mxc/amd-gpu/common/gsl_yamato.c +++ b/drivers/mxc/amd-gpu/gsl_yamato.c @@ -16,12 +16,11 @@ * */ -#include "gsl.h" -#include "gsl_hal.h" -#ifdef _LINUX #include #include -#endif + +#include "gsl.h" +#include "gsl_hal.h" #ifdef GSL_BLD_YAMATO @@ -40,7 +39,7 @@ kgsl_yamato_gmeminit(gsl_device_t *device) unsigned int edram_value = 0; // make sure edram range is aligned to size - KOS_ASSERT((device->gmemspace.gpu_base & (device->gmemspace.sizebytes - 1)) == 0); + DEBUG_ASSERT((device->gmemspace.gpu_base & (device->gmemspace.sizebytes - 1)) == 0); // get edram_size value equivalent gmem_size = (device->gmemspace.sizebytes >> 14); @@ -87,7 +86,7 @@ kgsl_yamato_rbbmintrcallback(gsl_intrid_t id, void *cookie) case GSL_INTR_YDX_RBBM_DISPLAY_UPDATE: case GSL_INTR_YDX_RBBM_GUI_IDLE: - kos_event_signal(device->intr.evnt[id]); + complete_all(&device->intr.evnt[id]); break; default: @@ -106,11 +105,7 @@ kgsl_yamato_cpintrcallback(gsl_intrid_t id, void *cookie) switch(id) { case GSL_INTR_YDX_CP_RING_BUFFER: -#ifndef _LINUX - kos_event_signal(device->timestamp_event); -#else - wake_up_interruptible_all(&(device->timestamp_waitq)); -#endif + wake_up_interruptible_all(&(device->timestamp_waitq)); break; default: break; @@ -164,7 +159,7 @@ kgsl_yamato_bist(gsl_device_t *device) // interrupt bist link[0] = pm4_type3_packet(PM4_INTERRUPT, 1); link[1] = CP_INT_CNTL__RB_INT_MASK; - kgsl_ringbuffer_issuecmds(device, 1, &link[0], 2, GSL_CALLER_PROCESSID_GET()); + kgsl_ringbuffer_issuecmds(device, 1, &link[0], 2, current->tgid); status = kgsl_mmu_bist(&device->mmu); if (status != GSL_SUCCESS) @@ -340,7 +335,7 @@ kgsl_yamato_init(gsl_device_t *device) // soft reset device->ftbl.device_regwrite(device, mmRBBM_SOFT_RESET, 0xFFFFFFFF); - kos_sleep(50); + msleep(50); device->ftbl.device_regwrite(device, mmRBBM_SOFT_RESET, 0x00000000); // RBBM control @@ -406,7 +401,7 @@ kgsl_yamato_destroy(gsl_device_t *device) #ifdef _DEBUG // for now, signal catastrophic failure in a brute force way - KOS_ASSERT(0); + DEBUG_ASSERT(0); #endif // _DEBUG // todo: - hard reset core? @@ -503,7 +498,7 @@ kgsl_yamato_stop(gsl_device_t *device) unsigned int cmds[2]; cmds[0] = pm4_type3_packet(PM4_WAIT_FOR_IDLE, 1); cmds[0] = 0; - kgsl_ringbuffer_issuecmds(device, 0, cmds, 2, GSL_CALLER_PROCESSID_GET()); + kgsl_ringbuffer_issuecmds(device, 0, cmds, 2, current->tgid); // disable rbbm interrupts kgsl_intr_detach(&device->intr, GSL_INTR_YDX_RBBM_READ_ERROR); @@ -550,7 +545,7 @@ kgsl_yamato_getproperty(gsl_device_t *device, gsl_property_type_t type, void *va { gsl_devinfo_t *devinfo = (gsl_devinfo_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_devinfo_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_devinfo_t)); devinfo->device_id = device->id; devinfo->chip_id = (gsl_chipid_t)device->chip_id; @@ -581,7 +576,7 @@ kgsl_yamato_setproperty(gsl_device_t *device, gsl_property_type_t type, void *va { gsl_powerprop_t *power = (gsl_powerprop_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_powerprop_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_powerprop_t)); if (!(device->flags & GSL_FLAGS_SAFEMODE)) { @@ -607,7 +602,7 @@ kgsl_yamato_setproperty(gsl_device_t *device, gsl_property_type_t type, void *va { gsl_dmiprop_t *dmi = (gsl_dmiprop_t *) value; - KOS_ASSERT(sizebytes == sizeof(gsl_dmiprop_t)); + DEBUG_ASSERT(sizebytes == sizeof(gsl_dmiprop_t)); // // In order to enable DMI, it must not already be enabled. @@ -721,7 +716,7 @@ kgsl_yamato_setproperty(gsl_device_t *device, gsl_property_type_t type, void *va } // issue the commands - kgsl_ringbuffer_issuecmds(device, 1, &cmdbuf[0], size, GSL_CALLER_PROCESSID_GET()); + kgsl_ringbuffer_issuecmds(device, 1, &cmdbuf[0], size, current->tgid); gsl_driver.dmi_frame %= gsl_driver.dmi_max_frame; status = GSL_SUCCESS; @@ -749,8 +744,6 @@ kgsl_yamato_idle(gsl_device_t *device, unsigned int timeout) KGSL_DEBUG(GSL_DBGFLAGS_DUMPX, KGSL_DEBUG_DUMPX(BB_DUMP_REGPOLL, device->id, mmRBBM_STATUS, 0x80000000, "kgsl_yamato_idle")); - GSL_RB_MUTEX_LOCK(); - // first, wait until the CP has consumed all the commands in the ring buffer if (rb->flags & GSL_FLAGS_STARTED) { @@ -773,8 +766,6 @@ kgsl_yamato_idle(gsl_device_t *device, unsigned int timeout) } } - - GSL_RB_MUTEX_UNLOCK(); return (status); } @@ -832,7 +823,14 @@ kgsl_yamato_waitirq(gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *co if (kgsl_intr_isenabled(&device->intr, intr_id) == GSL_SUCCESS) { // wait until intr completion event is received - if (kos_event_wait(device->intr.evnt[intr_id], timeout) == OS_SUCCESS) + int complete = OS_SUCCESS; + + if (timeout != OS_INFINITE) + complete = wait_for_completion_timeout(&device->intr.evnt[intr_id], msecs_to_jiffies(timeout)); + else + wait_for_completion_killable(&device->intr.evnt[intr_id]); + + if (complete == OS_SUCCESS) { *count = 1; status = GSL_SUCCESS; @@ -867,9 +865,6 @@ int kgsl_yamato_waittimestamp(gsl_device_t *device, gsl_timestamp_t timestamp, unsigned int timeout) { #if defined GSL_RB_TIMESTAMP_INTERUPT -#ifndef _LINUX - return kos_event_wait( device->timestamp_event, timeout ); -#else int status = wait_event_interruptible_timeout(device->timestamp_waitq, kgsl_yamato_check_timestamp(device->id, timestamp), msecs_to_jiffies(timeout)); @@ -877,7 +872,6 @@ kgsl_yamato_waittimestamp(gsl_device_t *device, gsl_timestamp_t timestamp, unsig return GSL_SUCCESS; else return GSL_FAILURE; -#endif #else return (GSL_SUCCESS); #endif diff --git a/drivers/mxc/amd-gpu/include/api/gsl_displayapi.h b/drivers/mxc/amd-gpu/include/api/gsl_displayapi.h index 7ec10b0c255..aa770b3e143 100644 --- a/drivers/mxc/amd-gpu/include/api/gsl_displayapi.h +++ b/drivers/mxc/amd-gpu/include/api/gsl_displayapi.h @@ -25,7 +25,7 @@ * POSSIBILITY OF SUCH DAMAGE. * */ - + #ifndef __GSL_DISPLAYAPI_H #define __GSL_DISPLAYAPI_H @@ -33,19 +33,7 @@ extern "C" { #endif // __cplusplus -////////////////////////////////////////////////////////////////////////////// -// entrypoints -////////////////////////////////////////////////////////////////////////////// -#ifdef __GSLDISPLAY_EXPORTS -#define DISP_API OS_DLLEXPORT -#else -#define DISP_API OS_DLLIMPORT -#endif // __GSLDISPLAY_EXPORTS - - -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// +// defines #define GSL_DISPLAY_PANEL_TOSHIBA_640x480 0 #define GSL_DISPLAY_PANEL_HITACHI_240x320 1 #define GSL_DISPLAY_PANEL_DEFAULT GSL_DISPLAY_PANEL_TOSHIBA_640x480 @@ -70,14 +58,14 @@ typedef struct _gsl_displaymode_t { ////////////////////////////////////////////////////////////////////////////// // prototypes ////////////////////////////////////////////////////////////////////////////// -DISP_API gsl_display_id_t gsl_display_open(gsl_devhandle_t devhandle, int panel_id); -DISP_API int gsl_display_close(gsl_display_id_t display_id); -DISP_API int gsl_display_getcount(void); -DISP_API int gsl_display_setmode(gsl_display_id_t display_id, gsl_displaymode_t displaymode); -DISP_API int gsl_display_getmode(gsl_display_id_t display_id, gsl_displaymode_t *displaymode); -DISP_API gsl_surface_id_t gsl_display_setsurface(gsl_display_id_t display_id, void *buffer); -DISP_API int gsl_display_getactivesurface(gsl_display_id_t display_id, void **buffer); -DISP_API int gsl_display_flipsurface(gsl_display_id_t display_id, gsl_surface_id_t surface_id); +extern gsl_display_id_t gsl_display_open(gsl_devhandle_t devhandle, int panel_id); +extern int gsl_display_close(gsl_display_id_t display_id); +extern int gsl_display_getcount(void); +extern int gsl_display_setmode(gsl_display_id_t display_id, gsl_displaymode_t displaymode); +extern int gsl_display_getmode(gsl_display_id_t display_id, gsl_displaymode_t *displaymode); +extern gsl_surface_id_t gsl_display_setsurface(gsl_display_id_t display_id, void *buffer); +extern int gsl_display_getactivesurface(gsl_display_id_t display_id, void **buffer); +extern int gsl_display_flipsurface(gsl_display_id_t display_id, gsl_surface_id_t surface_id); #ifdef __cplusplus } diff --git a/drivers/mxc/amd-gpu/include/api/gsl_klibapi.h b/drivers/mxc/amd-gpu/include/api/gsl_klibapi.h index c8831840ad1..82ddbaaf91a 100644 --- a/drivers/mxc/amd-gpu/include/api/gsl_klibapi.h +++ b/drivers/mxc/amd-gpu/include/api/gsl_klibapi.h @@ -36,23 +36,8 @@ extern "C" { #include "gsl_types.h" #include "gsl_properties.h" - -////////////////////////////////////////////////////////////////////////////// -// entrypoints -////////////////////////////////////////////////////////////////////////////// -#ifdef __KGSLLIB_EXPORTS -#define KGSL_API OS_DLLEXPORT -#else -#ifdef __KERNEL_MODE__ -#define KGSL_API extern -#else -#define KGSL_API OS_DLLIMPORT -#endif -#endif // __KGSLLIB_EXPORTS - - ////////////////////////////////////////////////////////////////////////////// -// version control +// version control ////////////////////////////////////////////////////////////////////////////// #define KGSLLIB_NAME "AMD GSL Kernel Library" #define KGSLLIB_VERSION "0.1" @@ -61,73 +46,73 @@ extern "C" { ////////////////////////////////////////////////////////////////////////////// // library API ////////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_driver_init(void); -KGSL_API int kgsl_driver_close(void); -KGSL_API int kgsl_driver_entry(gsl_flags_t flags); -KGSL_API int kgsl_driver_exit(void); -KGSL_API int kgsl_driver_destroy(unsigned int pid); +int kgsl_driver_init(void); +int kgsl_driver_close(void); +int kgsl_driver_entry(gsl_flags_t flags); +int kgsl_driver_exit(void); +int kgsl_driver_destroy(unsigned int pid); //////////////////////////////////////////////////////////////////////////// // device API //////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags); -KGSL_API int kgsl_device_stop(gsl_deviceid_t device_id); -KGSL_API int kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout); -KGSL_API int kgsl_device_isidle(gsl_deviceid_t device_id); -KGSL_API int kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes); -KGSL_API int kgsl_device_setproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes); -KGSL_API int kgsl_device_regread(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int *value); -KGSL_API int kgsl_device_regwrite(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int value); -KGSL_API int kgsl_device_waitirq(gsl_deviceid_t device_id, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); +int kgsl_device_start(gsl_deviceid_t device_id, gsl_flags_t flags); +int kgsl_device_stop(gsl_deviceid_t device_id); +int kgsl_device_idle(gsl_deviceid_t device_id, unsigned int timeout); +int kgsl_device_isidle(gsl_deviceid_t device_id); +int kgsl_device_getproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes); +int kgsl_device_setproperty(gsl_deviceid_t device_id, gsl_property_type_t type, void *value, unsigned int sizebytes); +int kgsl_device_regread(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int *value); +int kgsl_device_regwrite(gsl_deviceid_t device_id, unsigned int offsetwords, unsigned int value); +int kgsl_device_waitirq(gsl_deviceid_t device_id, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); //////////////////////////////////////////////////////////////////////////// // command API //////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_cmdstream_issueibcmds(gsl_deviceid_t device_id, int drawctxt_index, gpuaddr_t ibaddr, int sizedwords, gsl_timestamp_t *timestamp, gsl_flags_t flags); -KGSL_API gsl_timestamp_t kgsl_cmdstream_readtimestamp(gsl_deviceid_t device_id, gsl_timestamp_type_t type); -KGSL_API int kgsl_cmdstream_freememontimestamp(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); -KGSL_API int kgsl_cmdstream_waittimestamp(gsl_deviceid_t device_id, gsl_timestamp_t timestamp, unsigned int timeout); -KGSL_API int kgsl_cmdwindow_write(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned int addr, unsigned int data); -KGSL_API int kgsl_add_timestamp(gsl_deviceid_t device_id, gsl_timestamp_t *timestamp); -KGSL_API int kgsl_cmdstream_check_timestamp(gsl_deviceid_t device_id, gsl_timestamp_t timestamp); +int kgsl_cmdstream_issueibcmds(gsl_deviceid_t device_id, int drawctxt_index, gpuaddr_t ibaddr, int sizedwords, gsl_timestamp_t *timestamp, gsl_flags_t flags); +gsl_timestamp_t kgsl_cmdstream_readtimestamp(gsl_deviceid_t device_id, gsl_timestamp_type_t type); +int kgsl_cmdstream_freememontimestamp(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); +int kgsl_cmdstream_waittimestamp(gsl_deviceid_t device_id, gsl_timestamp_t timestamp, unsigned int timeout); +int kgsl_cmdwindow_write(gsl_deviceid_t device_id, gsl_cmdwindow_t target, unsigned int addr, unsigned int data); +int kgsl_add_timestamp(gsl_deviceid_t device_id, gsl_timestamp_t *timestamp); +int kgsl_cmdstream_check_timestamp(gsl_deviceid_t device_id, gsl_timestamp_t timestamp); //////////////////////////////////////////////////////////////////////////// // context API //////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_context_create(gsl_deviceid_t device_id, gsl_context_type_t type, unsigned int *drawctxt_id, gsl_flags_t flags); -KGSL_API int kgsl_context_destroy(gsl_deviceid_t device_id, unsigned int drawctxt_id); -KGSL_API int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned int drawctxt_id, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id); +int kgsl_context_create(gsl_deviceid_t device_id, gsl_context_type_t type, unsigned int *drawctxt_id, gsl_flags_t flags); +int kgsl_context_destroy(gsl_deviceid_t device_id, unsigned int drawctxt_id); +int kgsl_drawctxt_bind_gmem_shadow(gsl_deviceid_t device_id, unsigned int drawctxt_id, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id); //////////////////////////////////////////////////////////////////////////// // sharedmem API //////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_sharedmem_alloc(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes, gsl_memdesc_t *memdesc); -KGSL_API int kgsl_sharedmem_free(gsl_memdesc_t *memdesc); -KGSL_API int kgsl_sharedmem_read(const gsl_memdesc_t *memdesc, void *dst, unsigned int offsetbytes, unsigned int sizebytes, unsigned int touserspace); -KGSL_API int kgsl_sharedmem_write(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, void *src, unsigned int sizebytes, unsigned int fromuserspace); -KGSL_API int kgsl_sharedmem_set(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int value, unsigned int sizebytes); -KGSL_API unsigned int kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags); -KGSL_API int kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatterlist_t *scatterlist, gsl_memdesc_t *memdesc); -KGSL_API int kgsl_sharedmem_unmap(gsl_memdesc_t *memdesc); -KGSL_API int kgsl_sharedmem_getmap(const gsl_memdesc_t *memdesc, gsl_scatterlist_t *scatterlist); -KGSL_API int kgsl_sharedmem_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int sizebytes, unsigned int operation); -KGSL_API int kgsl_sharedmem_fromhostpointer(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, void* hostptr); +int kgsl_sharedmem_alloc(gsl_deviceid_t device_id, gsl_flags_t flags, int sizebytes, gsl_memdesc_t *memdesc); +int kgsl_sharedmem_free(gsl_memdesc_t *memdesc); +int kgsl_sharedmem_read(const gsl_memdesc_t *memdesc, void *dst, unsigned int offsetbytes, unsigned int sizebytes, unsigned int touserspace); +int kgsl_sharedmem_write(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, void *src, unsigned int sizebytes, unsigned int fromuserspace); +int kgsl_sharedmem_set(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int value, unsigned int sizebytes); +unsigned int kgsl_sharedmem_largestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags); +int kgsl_sharedmem_map(gsl_deviceid_t device_id, gsl_flags_t flags, const gsl_scatterlist_t *scatterlist, gsl_memdesc_t *memdesc); +int kgsl_sharedmem_unmap(gsl_memdesc_t *memdesc); +int kgsl_sharedmem_getmap(const gsl_memdesc_t *memdesc, gsl_scatterlist_t *scatterlist); +int kgsl_sharedmem_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int sizebytes, unsigned int operation); +int kgsl_sharedmem_fromhostpointer(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, void* hostptr); //////////////////////////////////////////////////////////////////////////// // interrupt API //////////////////////////////////////////////////////////////////////////// -KGSL_API void kgsl_intr_isr(gsl_device_t *device); +void kgsl_intr_isr(gsl_device_t *device); //////////////////////////////////////////////////////////////////////////// // TB dump API //////////////////////////////////////////////////////////////////////////// -KGSL_API int kgsl_tbdump_waitirq(void); -KGSL_API int kgsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride, unsigned int width, unsigned int height); +int kgsl_tbdump_waitirq(void); +int kgsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride, unsigned int width, unsigned int height); #ifdef __cplusplus } diff --git a/drivers/mxc/amd-gpu/include/api/gsl_libapi.h b/drivers/mxc/amd-gpu/include/api/gsl_libapi.h index 3d359e24f57..973d9fbbd81 100644 --- a/drivers/mxc/amd-gpu/include/api/gsl_libapi.h +++ b/drivers/mxc/amd-gpu/include/api/gsl_libapi.h @@ -35,106 +35,67 @@ extern "C" { #include "gsl_types.h" -////////////////////////////////////////////////////////////////////////////// -// entrypoints -////////////////////////////////////////////////////////////////////////////// -#ifdef __GSLLIB_EXPORTS -#define GSL_API OS_DLLEXPORT -#else -#define GSL_API OS_DLLIMPORT -#endif // __GSLLIB_EXPORTS - - -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// +// defines #define GSLLIB_NAME "AMD GSL User Library" #define GSLLIB_VERSION "0.1" -////////////////////////////////////////////////////////////////////////////// // libary API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_library_open(gsl_flags_t flags); -GSL_API int gsl_library_close(void); +int gsl_library_open(gsl_flags_t flags); +int gsl_library_close(void); -//////////////////////////////////////////////////////////////////////////// // device API -//////////////////////////////////////////////////////////////////////////// -GSL_API gsl_devhandle_t gsl_device_open(gsl_deviceid_t device_id, gsl_flags_t flags); -GSL_API int gsl_device_close(gsl_devhandle_t devhandle); -GSL_API int gsl_device_idle(gsl_devhandle_t devhandle, unsigned int timeout); -GSL_API int gsl_device_isidle(gsl_devhandle_t devhandle); -GSL_API int gsl_device_getcount(void); -GSL_API int gsl_device_getinfo(gsl_devhandle_t devhandle, gsl_devinfo_t *devinfo); -GSL_API int gsl_device_setpowerstate(gsl_devhandle_t devhandle, gsl_flags_t flags); -GSL_API int gsl_device_setdmistate(gsl_devhandle_t devhandle, gsl_flags_t flags); -GSL_API int gsl_device_waitirq(gsl_devhandle_t devhandle, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); -GSL_API int gsl_device_waittimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t timestamp, unsigned int timeout); -GSL_API int gsl_device_addtimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t *timestamp); - -////////////////////////////////////////////////////////////////////////////// +gsl_devhandle_t gsl_device_open(gsl_deviceid_t device_id, gsl_flags_t flags); +int gsl_device_close(gsl_devhandle_t devhandle); +int gsl_device_idle(gsl_devhandle_t devhandle, unsigned int timeout); +int gsl_device_isidle(gsl_devhandle_t devhandle); +int gsl_device_getcount(void); +int gsl_device_getinfo(gsl_devhandle_t devhandle, gsl_devinfo_t *devinfo); +int gsl_device_setpowerstate(gsl_devhandle_t devhandle, gsl_flags_t flags); +int gsl_device_setdmistate(gsl_devhandle_t devhandle, gsl_flags_t flags); +int gsl_device_waitirq(gsl_devhandle_t devhandle, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); +int gsl_device_waittimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t timestamp, unsigned int timeout); +int gsl_device_addtimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t *timestamp); + // direct register API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_register_read(gsl_devhandle_t devhandle, unsigned int offsetwords, unsigned int *data); +int gsl_register_read(gsl_devhandle_t devhandle, unsigned int offsetwords, unsigned int *data); -////////////////////////////////////////////////////////////////////////////// // command API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_cp_issueibcommands(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle, gpuaddr_t ibaddr, unsigned int sizewords, gsl_timestamp_t *timestamp, gsl_flags_t flags); -GSL_API gsl_timestamp_t gsl_cp_readtimestamp(gsl_devhandle_t devhandle, gsl_timestamp_type_t type); -GSL_API int gsl_cp_checktimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); -GSL_API int gsl_cp_freememontimestamp(gsl_devhandle_t devhandle, gsl_memdesc_t *memdesc, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); -GSL_API int gsl_v3_issuecommand(gsl_devhandle_t devhandle, gsl_cmdwindow_t target, unsigned int addr, unsigned int data); - +int gsl_cp_issueibcommands(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle, gpuaddr_t ibaddr, unsigned int sizewords, gsl_timestamp_t *timestamp, gsl_flags_t flags); +gsl_timestamp_t gsl_cp_readtimestamp(gsl_devhandle_t devhandle, gsl_timestamp_type_t type); +int gsl_cp_checktimestamp(gsl_devhandle_t devhandle, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); +int gsl_cp_freememontimestamp(gsl_devhandle_t devhandle, gsl_memdesc_t *memdesc, gsl_timestamp_t timestamp, gsl_timestamp_type_t type); +int gsl_v3_issuecommand(gsl_devhandle_t devhandle, gsl_cmdwindow_t target, unsigned int addr, unsigned int data); -////////////////////////////////////////////////////////////////////////////// // context API -////////////////////////////////////////////////////////////////////////////// -GSL_API gsl_ctxthandle_t gsl_context_create(gsl_devhandle_t devhandle, gsl_context_type_t type, gsl_flags_t flags); -GSL_API int gsl_context_destroy(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle); -GSL_API int gsl_context_bind_gmem_shadow(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id); - +gsl_ctxthandle_t gsl_context_create(gsl_devhandle_t devhandle, gsl_context_type_t type, gsl_flags_t flags); +int gsl_context_destroy(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle); +int gsl_context_bind_gmem_shadow(gsl_devhandle_t devhandle, gsl_ctxthandle_t ctxthandle, const gsl_rect_t* gmem_rect, unsigned int shadow_x, unsigned int shadow_y, const gsl_buffer_desc_t* shadow_buffer, unsigned int buffer_id); -////////////////////////////////////////////////////////////////////////////// // sharedmem API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_memory_alloc(gsl_deviceid_t device_id, unsigned int sizebytes, gsl_flags_t flags, gsl_memdesc_t *memdesc); -GSL_API int gsl_memory_free(gsl_memdesc_t *memdesc); -GSL_API int gsl_memory_read(const gsl_memdesc_t *memdesc, void *dst, unsigned int sizebytes, unsigned int offsetbytes); -GSL_API int gsl_memory_write(const gsl_memdesc_t *memdesc, void *src, unsigned int sizebytes, unsigned int offsetbytes); -GSL_API int gsl_memory_write_multiple(const gsl_memdesc_t *memdesc, void *src, unsigned int srcstridebytes, unsigned int dststridebytes, unsigned int blocksizebytes, unsigned int numblocks, unsigned int offsetbytes); -GSL_API unsigned int gsl_memory_getlargestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags); -GSL_API int gsl_memory_set(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int value, unsigned int sizebytes); -GSL_API int gsl_memory_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int sizebytes, unsigned int operation); -GSL_API int gsl_memory_fromhostpointer(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, void* hostptr); +int gsl_memory_alloc(gsl_deviceid_t device_id, unsigned int sizebytes, gsl_flags_t flags, gsl_memdesc_t *memdesc); +int gsl_memory_free(gsl_memdesc_t *memdesc); +int gsl_memory_read(const gsl_memdesc_t *memdesc, void *dst, unsigned int sizebytes, unsigned int offsetbytes); +int gsl_memory_write(const gsl_memdesc_t *memdesc, void *src, unsigned int sizebytes, unsigned int offsetbytes); +int gsl_memory_write_multiple(const gsl_memdesc_t *memdesc, void *src, unsigned int srcstridebytes, unsigned int dststridebytes, unsigned int blocksizebytes, unsigned int numblocks, unsigned int offsetbytes); +unsigned int gsl_memory_getlargestfreeblock(gsl_deviceid_t device_id, gsl_flags_t flags); +int gsl_memory_set(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int value, unsigned int sizebytes); +int gsl_memory_cacheoperation(const gsl_memdesc_t *memdesc, unsigned int offsetbytes, unsigned int sizebytes, unsigned int operation); +int gsl_memory_fromhostpointer(gsl_deviceid_t device_id, gsl_memdesc_t *memdesc, void* hostptr); #ifdef _DIRECT_MAPPED -GSL_API unsigned int gsl_sharedmem_gethostaddr(const gsl_memdesc_t *memdesc); +unsigned int gsl_sharedmem_gethostaddr(const gsl_memdesc_t *memdesc); #endif // _DIRECT_MAPPED -////////////////////////////////////////////////////////////////////////////// // address translation API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_translate_physaddr(void* virtAddr, unsigned int* physAddr); +int gsl_translate_physaddr(void* virtAddr, unsigned int* physAddr); - -////////////////////////////////////////////////////////////////////////////// // TB dump API -////////////////////////////////////////////////////////////////////////////// -GSL_API int gsl_tbdump_waitirq(); -GSL_API int gsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride, unsigned int width, unsigned int height); - -////////////////////////////////////////////////////////////////////////////// -// OS specific APIs - need to go into their own gsl_libapi_platform.h file -////////////////////////////////////////////////////////////////////////////// -#ifdef WM7 -GSL_API int gsl_kos_wm7_surfobjfromhbitmap(HBITMAP hbitmap, SURFOBJ *surfobj); -#endif // WM7 - +int gsl_tbdump_waitirq(); +int gsl_tbdump_exportbmp(const void* addr, unsigned int format, unsigned int stride, unsigned int width, unsigned int height); #ifdef __cplusplus } diff --git a/drivers/mxc/amd-gpu/include/api/gsl_types.h b/drivers/mxc/amd-gpu/include/api/gsl_types.h index 99d98496611..5121945e5af 100644 --- a/drivers/mxc/amd-gpu/include/api/gsl_types.h +++ b/drivers/mxc/amd-gpu/include/api/gsl_types.h @@ -29,9 +29,51 @@ #ifndef __GSL_TYPES_H #define __GSL_TYPES_H +#include #include "stddef.h" +////////////////////////////////////////////////////////////////////////////// +// Operating System values +////////////////////////////////////////////////////////////////////////////// +#define OS_SUCCESS 0 +#define OS_FAILURE -1 +#define OS_FAILURE_SYSTEMERROR -2 +#define OS_FAILURE_DEVICEERROR -3 +#define OS_FAILURE_OUTOFMEM -4 +#define OS_FAILURE_BADPARAM -5 +#define OS_FAILURE_NOTSUPPORTED -6 +#define OS_FAILURE_NOMOREAVAILABLE -7 +#define OS_FAILURE_NOTINITIALIZED -8 +#define OS_FAILURE_ALREADYINITIALIZED -9 +#define OS_FAILURE_TIMEOUT -10 + + +#define OS_INFINITE 0xFFFFFFFF +#define OS_TLS_OUTOFINDEXES 0xFFFFFFFF +#define OS_TRUE 1 +#define OS_FALSE 0 + + + +typedef enum { + OS_PROTECTION_GLOBAL, // inter process + OS_PROTECTION_LOCAL, // process local + OS_PROTECTION_NONE, // none +} os_protection_t; + +typedef struct _os_cputimer_t { + int refcount; // Reference count + int enabled; // Counter is enabled + int size; // Number of counters + __s64 start_time; // start time in cpu ticks + __s64 end_time; // end time in cpu ticks + __s64 timer_frequency; // cpu ticks per second + __s64 *counter_array; // number of ticks for each counter +} os_cputimer_t; + + + ////////////////////////////////////////////////////////////////////////////// // status ////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/mxc/amd-gpu/include/gsl.h b/drivers/mxc/amd-gpu/include/gsl.h index 07d8e97dcee..efb2f7afdff 100644 --- a/drivers/mxc/amd-gpu/include/gsl.h +++ b/drivers/mxc/amd-gpu/include/gsl.h @@ -29,7 +29,6 @@ #ifndef __GSL_H #define __GSL_H -//#define __KGSLLIB_EXPORTS #define __KERNEL_MODE__ @@ -45,8 +44,6 @@ typedef struct _gsl_device_t gsl_device_t; ////////////////////////////////////////////////////////////////////////////// #include "gsl_buildconfig.h" -#include "kos_libapi.h" - #include "gsl_klibapi.h" #ifdef GSL_BLD_YAMATO @@ -76,4 +73,7 @@ typedef struct _gsl_device_t gsl_device_t; #include "gsl_config.h" + +#define DEBUG_ASSERT(x) + #endif // __GSL_H diff --git a/drivers/mxc/amd-gpu/include/gsl_buildconfig.h b/drivers/mxc/amd-gpu/include/gsl_buildconfig.h index 4e6be4da7dc..87a56624b74 100644 --- a/drivers/mxc/amd-gpu/include/gsl_buildconfig.h +++ b/drivers/mxc/amd-gpu/include/gsl_buildconfig.h @@ -50,6 +50,6 @@ /* #define GSL_MMU_PAGETABLE_PERPROCESS */ #define GSL_CALLER_PROCESS_MAX 10 -#define GSL_SHMEM_MAX_APERTURES 3 +#define GSL_SHMEM_MAX_APERTURES 2 #endif /* __GSL__BUILDCONFIG_H */ diff --git a/drivers/mxc/amd-gpu/include/gsl_cmdstream.h b/drivers/mxc/amd-gpu/include/gsl_cmdstream.h index 550d5d0005a..a757b286613 100644 --- a/drivers/mxc/amd-gpu/include/gsl_cmdstream.h +++ b/drivers/mxc/amd-gpu/include/gsl_cmdstream.h @@ -29,31 +29,9 @@ #ifndef __GSL_CMDSTREAM_H #define __GSL_CMDSTREAM_H - -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// - -#ifdef VG_HDK -#define GSL_CMDSTREAM_GET_SOP_TIMESTAMP(device, data) -#else #define GSL_CMDSTREAM_GET_SOP_TIMESTAMP(device, data) kgsl_sharedmem_read0(&device->memstore, (data), GSL_DEVICE_MEMSTORE_OFFSET(soptimestamp), 4, false) -#endif - -#ifdef VG_HDK -#define GSL_CMDSTREAM_GET_EOP_TIMESTAMP(device, data) (*((int*)data) = (gsl_driver.device[GSL_DEVICE_G12-1]).timestamp) -#else #define GSL_CMDSTREAM_GET_EOP_TIMESTAMP(device, data) kgsl_sharedmem_read0(&device->memstore, (data), GSL_DEVICE_MEMSTORE_OFFSET(eoptimestamp), 4, false) -#endif - - -////////////////////////////////////////////////////////////////////////////// -// types -////////////////////////////////////////////////////////////////////////////// -////////////////////////////////////////////////////////////////////////////// -// functions -////////////////////////////////////////////////////////////////////////////// gsl_timestamp_t kgsl_cmdstream_readtimestamp0(gsl_deviceid_t device_id, gsl_timestamp_type_t type); void kgsl_cmdstream_memqueue_drain(gsl_device_t *device); int kgsl_cmdstream_init(gsl_device_t *device); diff --git a/drivers/mxc/amd-gpu/include/gsl_config.h b/drivers/mxc/amd-gpu/include/gsl_config.h index aa911b4096a..f921ef7eeeb 100644 --- a/drivers/mxc/amd-gpu/include/gsl_config.h +++ b/drivers/mxc/amd-gpu/include/gsl_config.h @@ -72,7 +72,7 @@ static const REG_MH_ARBITER_CONFIG gsl_cfg_g12_mharb = { 1, /* PAGE_SIZE */ 1, /* TC_REORDER_ENABLE */ 1, /* TC_ARB_HOLD_ENABLE */ - 0, /* IN_FLIGHT_LIMIT_ENABLE */ + 1, /* IN_FLIGHT_LIMIT_ENABLE */ 0x8, /* IN_FLIGHT_LIMIT */ 1, /* CP_CLNT_ENABLE */ 1, /* VGT_CLNT_ENABLE */ diff --git a/drivers/mxc/amd-gpu/include/gsl_context.h b/drivers/mxc/amd-gpu/include/gsl_context.h deleted file mode 100644 index 6e83bdb3403..00000000000 --- a/drivers/mxc/amd-gpu/include/gsl_context.h +++ /dev/null @@ -1,45 +0,0 @@ -/* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices nor - * the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __GSL_CONTEXT_H -#define __GSL_CONTEXT_H - - -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// - -////////////////////////////////////////////////////////////////////////////// -// types -////////////////////////////////////////////////////////////////////////////// - -////////////////////////////////////////////////////////////////////////////// -// functions -////////////////////////////////////////////////////////////////////////////// - -#endif // __GSL_CONTEXT_H diff --git a/drivers/mxc/amd-gpu/include/gsl_debug.h b/drivers/mxc/amd-gpu/include/gsl_debug.h index 1275278f9ea..5c550c428d5 100644 --- a/drivers/mxc/amd-gpu/include/gsl_debug.h +++ b/drivers/mxc/amd-gpu/include/gsl_debug.h @@ -116,9 +116,6 @@ void Yamato_DumpWriteMemory(unsigned int dwAddress, unsigned int dwSi void Yamato_DumpSetMemory(unsigned int dwAddress, unsigned int dwSize, unsigned int pData); void Yamato_DumpFbStart(gsl_device_t *device); void Yamato_DumpRegSpace(gsl_device_t *device); -#ifdef _WIN32 -void Yamato_DumpWindow(unsigned int addr, unsigned int width, unsigned int height); -#endif #endif #ifdef _DEBUG int kgsl_dumpx_parse_ibs(gpuaddr_t gpuaddr, int sizedwords); diff --git a/drivers/mxc/amd-gpu/include/gsl_device.h b/drivers/mxc/amd-gpu/include/gsl_device.h index 07c1438994f..6f27d71ddee 100644 --- a/drivers/mxc/amd-gpu/include/gsl_device.h +++ b/drivers/mxc/amd-gpu/include/gsl_device.h @@ -29,10 +29,8 @@ #ifndef __GSL_DEVICE_H #define __GSL_DEVICE_H -#ifdef _LINUX #include #include -#endif ////////////////////////////////////////////////////////////////////////////// // types @@ -42,96 +40,76 @@ // function table // -------------- typedef struct _gsl_functable_t { - int (*device_init) (gsl_device_t *device); - int (*device_close) (gsl_device_t *device); - int (*device_destroy) (gsl_device_t *device); - int (*device_start) (gsl_device_t *device, gsl_flags_t flags); - int (*device_stop) (gsl_device_t *device); - int (*device_getproperty) (gsl_device_t *device, gsl_property_type_t type, void *value, unsigned int sizebytes); - int (*device_setproperty) (gsl_device_t *device, gsl_property_type_t type, void *value, unsigned int sizebytes); - int (*device_idle) (gsl_device_t *device, unsigned int timeout); - int (*device_regread) (gsl_device_t *device, unsigned int offsetwords, unsigned int *value); - int (*device_regwrite) (gsl_device_t *device, unsigned int offsetwords, unsigned int value); - int (*device_waitirq) (gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); + int (*device_init) (gsl_device_t *device); + int (*device_close) (gsl_device_t *device); + int (*device_destroy) (gsl_device_t *device); + int (*device_start) (gsl_device_t *device, gsl_flags_t flags); + int (*device_stop) (gsl_device_t *device); + int (*device_getproperty) (gsl_device_t *device, gsl_property_type_t type, void *value, unsigned int sizebytes); + int (*device_setproperty) (gsl_device_t *device, gsl_property_type_t type, void *value, unsigned int sizebytes); + int (*device_idle) (gsl_device_t *device, unsigned int timeout); + int (*device_regread) (gsl_device_t *device, unsigned int offsetwords, unsigned int *value); + int (*device_regwrite) (gsl_device_t *device, unsigned int offsetwords, unsigned int value); + int (*device_waitirq) (gsl_device_t *device, gsl_intrid_t intr_id, unsigned int *count, unsigned int timeout); int (*device_waittimestamp) (gsl_device_t *device, gsl_timestamp_t timestamp, unsigned int timeout); - int (*device_runpending) (gsl_device_t *device); - int (*device_addtimestamp) (gsl_device_t *device_id, gsl_timestamp_t *timestamp); - int (*intr_isr) (gsl_device_t *device); + int (*device_runpending) (gsl_device_t *device); + int (*device_addtimestamp) (gsl_device_t *device_id, gsl_timestamp_t *timestamp); + int (*intr_isr) (gsl_device_t *device); int (*mmu_tlbinvalidate) (gsl_device_t *device, unsigned int reg_invalidate, unsigned int pid); int (*mmu_setpagetable) (gsl_device_t *device, unsigned int reg_ptbase, gpuaddr_t ptbase, unsigned int pid); - int (*cmdstream_issueibcmds) (gsl_device_t *device, int drawctxt_index, gpuaddr_t ibaddr, int sizedwords, gsl_timestamp_t *timestamp, gsl_flags_t flags); - int (*context_create) (gsl_device_t *device, gsl_context_type_t type, unsigned int *drawctxt_id, gsl_flags_t flags); - int (*context_destroy) (gsl_device_t *device_id, unsigned int drawctxt_id); + int (*cmdstream_issueibcmds) (gsl_device_t *device, int drawctxt_index, gpuaddr_t ibaddr, int sizedwords, gsl_timestamp_t *timestamp, gsl_flags_t flags); + int (*context_create) (gsl_device_t *device, gsl_context_type_t type, unsigned int *drawctxt_id, gsl_flags_t flags); + int (*context_destroy) (gsl_device_t *device_id, unsigned int drawctxt_id); } gsl_functable_t; -// ------------- -// device object -// ------------- +// device object struct _gsl_device_t { - - unsigned int refcnt; - unsigned int callerprocess[GSL_CALLER_PROCESS_MAX]; // caller process table - gsl_functable_t ftbl; - gsl_flags_t flags; - gsl_deviceid_t id; - unsigned int chip_id; - gsl_memregion_t regspace; - gsl_intr_t intr; - gsl_memdesc_t memstore; - gsl_memqueue_t memqueue; // queue of memfrees pending timestamp elapse + unsigned int refcnt; + unsigned int callerprocess[GSL_CALLER_PROCESS_MAX]; // caller process table + gsl_functable_t ftbl; + gsl_flags_t flags; + gsl_deviceid_t id; + unsigned int chip_id; + gsl_memregion_t regspace; + gsl_intr_t intr; + gsl_memdesc_t memstore; + gsl_memqueue_t memqueue; // queue of memfrees pending timestamp elapse #ifdef GSL_DEVICE_SHADOW_MEMSTORE_TO_USER - unsigned int memstoreshadow[GSL_CALLER_PROCESS_MAX]; + unsigned int memstoreshadow[GSL_CALLER_PROCESS_MAX]; #endif // GSL_DEVICE_SHADOW_MEMSTORE_TO_USER #ifndef GSL_NO_MMU - gsl_mmu_t mmu; + gsl_mmu_t mmu; #endif // GSL_NO_MMU #ifdef GSL_BLD_YAMATO - gsl_memregion_t gmemspace; - gsl_ringbuffer_t ringbuffer; -#ifdef GSL_LOCKING_FINEGRAIN - oshandle_t drawctxt_mutex; -#endif - unsigned int drawctxt_count; - gsl_drawctxt_t *drawctxt_active; - gsl_drawctxt_t drawctxt[GSL_CONTEXT_MAX]; + gsl_memregion_t gmemspace; + gsl_ringbuffer_t ringbuffer; + unsigned int drawctxt_count; + gsl_drawctxt_t *drawctxt_active; + gsl_drawctxt_t drawctxt[GSL_CONTEXT_MAX]; #endif // GSL_BLD_YAMATO #ifdef GSL_BLD_G12 -#ifdef GSL_LOCKING_FINEGRAIN - oshandle_t cmdwindow_mutex; -#endif - unsigned int intrcnt[GSL_G12_INTR_COUNT]; - gsl_timestamp_t current_timestamp; - gsl_timestamp_t timestamp; -#ifndef _LINUX - unsigned int irq_thread; - oshandle_t irq_thread_handle; -#endif + unsigned int intrcnt[GSL_G12_INTR_COUNT]; + gsl_timestamp_t current_timestamp; + gsl_timestamp_t timestamp; #ifdef IRQTHREAD_POLL - oshandle_t irqthread_event; + struct completion irqthread_event; #endif #endif // GSL_BLD_G12 -#ifdef GSL_LOCKING_FINEGRAIN - oshandle_t cmdstream_mutex; -#endif -#ifndef _LINUX - oshandle_t timestamp_event; -#else + wait_queue_head_t timestamp_waitq; struct workqueue_struct *irq_workq; - struct work_struct irq_work; + struct work_struct irq_work; struct work_struct irq_err_work; -#endif - void *autogate; + + void *autogate; }; -////////////////////////////////////////////////////////////////////////////// // prototypes -////////////////////////////////////////////////////////////////////////////// int kgsl_device_init(gsl_device_t *device, gsl_deviceid_t device_id); int kgsl_device_close(gsl_device_t *device); int kgsl_device_destroy(gsl_device_t *device); diff --git a/drivers/mxc/amd-gpu/include/gsl_driver.h b/drivers/mxc/amd-gpu/include/gsl_driver.h index 9c908ce4696..9fbd0106b1b 100644 --- a/drivers/mxc/amd-gpu/include/gsl_driver.h +++ b/drivers/mxc/amd-gpu/include/gsl_driver.h @@ -29,42 +29,20 @@ #ifndef __GSL_DRIVER_H #define __GSL_DRIVER_H - -///////////////////////////////////////////////////////////////////////////// -// macros -////////////////////////////////////////////////////////////////////////////// -#ifdef GSL_DEDICATED_PROCESS -#define GSL_CALLER_PROCESSID_GET() kos_callerprocess_getid() -#else -#define GSL_CALLER_PROCESSID_GET() kos_process_getid() -#endif // GSL_DEDICATED_PROCESS - -#ifdef GSL_LOCKING_COARSEGRAIN -#define GSL_API_MUTEX_CREATE() gsl_driver.mutex = kos_mutex_create("gsl_global"); \ - if (!gsl_driver.mutex) {return (GSL_FAILURE);} -#define GSL_API_MUTEX_LOCK() kos_mutex_lock(gsl_driver.mutex) -#define GSL_API_MUTEX_UNLOCK() kos_mutex_unlock(gsl_driver.mutex) -#define GSL_API_MUTEX_FREE() kos_mutex_free(gsl_driver.mutex); gsl_driver.mutex = 0; -#else -#define GSL_API_MUTEX_CREATE() -#define GSL_API_MUTEX_LOCK() -#define GSL_API_MUTEX_UNLOCK() -#define GSL_API_MUTEX_FREE() -#endif - +#include ////////////////////////////////////////////////////////////////////////////// // types ////////////////////////////////////////////////////////////////////////////// // ------------- -// driver object +// driver object // ------------- typedef struct _gsl_driver_t { gsl_flags_t flags_debug; int refcnt; unsigned int callerprocess[GSL_CALLER_PROCESS_MAX]; // caller process table - oshandle_t mutex; // global API mutex + struct mutex lock; // global API mutex void *hal; gsl_sharedmem_t shmem; gsl_device_t device[GSL_DEVICE_MAX]; @@ -85,7 +63,7 @@ extern gsl_driver_t gsl_driver; ////////////////////////////////////////////////////////////////////////////// // inline functions ////////////////////////////////////////////////////////////////////////////// -OSINLINE int +static __inline int kgsl_driver_getcallerprocessindex(unsigned int pid, int *index) { int i; @@ -95,7 +73,7 @@ kgsl_driver_getcallerprocessindex(unsigned int pid, int *index) { if (gsl_driver.callerprocess[i] == pid) { - *index = i; + *index = i; return (GSL_SUCCESS); } } diff --git a/drivers/mxc/amd-gpu/include/gsl_hal.h b/drivers/mxc/amd-gpu/include/gsl_hal.h index fcf9f0891f1..b378d40569a 100644 --- a/drivers/mxc/amd-gpu/include/gsl_hal.h +++ b/drivers/mxc/amd-gpu/include/gsl_hal.h @@ -33,19 +33,6 @@ extern "C" { #endif // __cplusplus -/* -#include "gsl_buildconfig.h" -#include "kos_libapi.h" -#include "gsl_klibapi.h" -#ifdef GSL_BLD_YAMATO -#include -#endif -#ifdef GSL_BLD_G12 -#include -#endif -#include "gsl_hwaccess.h" -*/ - #include "gsl.h" #include "gsl_hwaccess.h" @@ -61,7 +48,7 @@ extern "C" { ////////////////////////////////////////////////////////////////////////////// -// version control +// version control ////////////////////////////////////////////////////////////////////////////// #define KGSLHAL_NAME "AMD GSL Kernel HAL" #define KGSLHAL_VERSION "0.1" diff --git a/drivers/mxc/amd-gpu/include/gsl_halconfig.h b/drivers/mxc/amd-gpu/include/gsl_halconfig.h old mode 100644 new mode 100755 index 363474b7a6b..658c4219807 --- a/drivers/mxc/amd-gpu/include/gsl_halconfig.h +++ b/drivers/mxc/amd-gpu/include/gsl_halconfig.h @@ -27,23 +27,20 @@ */ /* - * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. */ #ifndef __GSL_HALCONFIG_H #define __GSL_HALCONFIG_H #define GSL_HAL_GPUBASE_REG_YDX 0x30000000 -#define GSL_HAL_SIZE_REG_YDX 0x00020000 /* 128KB */ +#define GSL_HAL_SIZE_REG_YDX SZ_128K /* 128KB */ -#define GSL_HAL_SIZE_REG_G12 0x00001000 /* 4KB */ +#define GSL_HAL_SIZE_REG_G12 SZ_4K /* 4KB */ -#define GSL_HAL_SHMEM_SIZE_EMEM1_MMU 0x01800000 /* 24MB */ -#define GSL_HAL_SHMEM_SIZE_EMEM2_MMU 0x00400000 /* 4MB */ -#define GSL_HAL_SHMEM_SIZE_PHYS_MMU 0x00400000 /* 4MB */ +#define GSL_HAL_SHMEM_SIZE_EMEM_MMU SZ_128M -#define GSL_HAL_SHMEM_SIZE_EMEM1_NOMMU 0x00A00000 /* 10MB */ -#define GSL_HAL_SHMEM_SIZE_EMEM2_NOMMU 0x00200000 /* 2MB */ -#define GSL_HAL_SHMEM_SIZE_PHYS_NOMMU 0x00100000 /* 1MB */ +#define GSL_HAL_SHMEM_SIZE_EMEM_NOMMU (10*SZ_1M) +#define GSL_HAL_SHMEM_SIZE_PHYS_NOMMU SZ_1M #endif /* __GSL_HALCONFIG_H */ diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h b/drivers/mxc/amd-gpu/include/gsl_hwaccess.h similarity index 93% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h rename to drivers/mxc/amd-gpu/include/gsl_hwaccess.h index 305b2ee9066..88e8a39a2e0 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h +++ b/drivers/mxc/amd-gpu/include/gsl_hwaccess.h @@ -29,15 +29,13 @@ #ifndef __GSL_HWACCESS_LINUX_H #define __GSL_HWACCESS_LINUX_H -#ifdef _LINUX -#include "gsl_linux_map.h" -#endif - #include #include #include -OSINLINE void +#include "gsl_linux_map.h" + +static __inline void kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, unsigned int sizebytes, unsigned int touserspace) { if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { @@ -54,7 +52,7 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u } else { - kos_memcpy(dst, (void *) (gpubase + gpuoffset), sizebytes); + memcpy(dst, (void *) (gpubase + gpuoffset), sizebytes); } mb(); dsb(); @@ -63,7 +61,7 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u //---------------------------------------------------------------------------- -OSINLINE void +static __inline void kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src, unsigned int sizebytes, unsigned int fromuserspace) { if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { @@ -80,7 +78,7 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src, } else { - kos_memcpy((void *)(gpubase + gpuoffset), src, sizebytes); + memcpy((void *)(gpubase + gpuoffset), src, sizebytes); } mb(); dsb(); @@ -89,7 +87,7 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src, //---------------------------------------------------------------------------- -OSINLINE void +static __inline void kgsl_hwaccess_memset(unsigned int gpubase, unsigned int gpuoffset, unsigned int value, unsigned int sizebytes) { if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { @@ -97,7 +95,7 @@ kgsl_hwaccess_memset(unsigned int gpubase, unsigned int gpuoffset, unsigned int } else { mb(); dsb(); - kos_memset((void *)(gpubase + gpuoffset), value, sizebytes); + memset((void *)(gpubase + gpuoffset), value, sizebytes); mb(); dsb(); } @@ -105,7 +103,7 @@ kgsl_hwaccess_memset(unsigned int gpubase, unsigned int gpuoffset, unsigned int //---------------------------------------------------------------------------- -OSINLINE void +static __inline void kgsl_hwaccess_regread(gsl_deviceid_t device_id, unsigned int gpubase, unsigned int offsetwords, unsigned int *data) { unsigned int *reg; @@ -124,7 +122,7 @@ kgsl_hwaccess_regread(gsl_deviceid_t device_id, unsigned int gpubase, unsigned i //---------------------------------------------------------------------------- -OSINLINE void +static __inline void kgsl_hwaccess_regwrite(gsl_deviceid_t device_id, unsigned int gpubase, unsigned int offsetwords, unsigned int data) { unsigned int *reg; diff --git a/drivers/mxc/amd-gpu/include/gsl_intrmgr.h b/drivers/mxc/amd-gpu/include/gsl_intrmgr.h index f46f6d8e6a8..6ced6b1af96 100644 --- a/drivers/mxc/amd-gpu/include/gsl_intrmgr.h +++ b/drivers/mxc/amd-gpu/include/gsl_intrmgr.h @@ -29,6 +29,7 @@ #ifndef __GSL_INTRMGR_H #define __GSL_INTRMGR_H +#include ////////////////////////////////////////////////////////////////////////////// // types @@ -85,7 +86,7 @@ typedef struct _gsl_intr_t gsl_device_t *device; unsigned int enabled[GSL_INTR_BLOCK_COUNT]; gsl_intr_handler_t handler[GSL_INTR_COUNT]; - oshandle_t evnt[GSL_INTR_COUNT]; + struct completion evnt[GSL_INTR_COUNT]; } gsl_intr_t; diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.h b/drivers/mxc/amd-gpu/include/gsl_linux_map.h similarity index 98% rename from drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.h rename to drivers/mxc/amd-gpu/include/gsl_linux_map.h index ebbe94a75e1..bdab64e9737 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.h +++ b/drivers/mxc/amd-gpu/include/gsl_linux_map.h @@ -32,7 +32,7 @@ #include "gsl_halconfig.h" #define GSL_LINUX_MAP_RANGE_START (1024*1024) -#define GSL_LINUX_MAP_RANGE_END (GSL_LINUX_MAP_RANGE_START+GSL_HAL_SHMEM_SIZE_EMEM1_MMU) +#define GSL_LINUX_MAP_RANGE_END (GSL_LINUX_MAP_RANGE_START+GSL_HAL_SHMEM_SIZE_EMEM_MMU) int gsl_linux_map_init(void); void *gsl_linux_map_alloc(unsigned int gpu_addr, unsigned int size); diff --git a/drivers/mxc/amd-gpu/include/gsl_log.h b/drivers/mxc/amd-gpu/include/gsl_log.h index dbb7e4c6ef9..6b47dafd803 100644 --- a/drivers/mxc/amd-gpu/include/gsl_log.h +++ b/drivers/mxc/amd-gpu/include/gsl_log.h @@ -50,24 +50,16 @@ #ifdef GSL_LOG -int kgsl_log_init(void); -int kgsl_log_close(void); -int kgsl_log_open_stdout( unsigned int log_flags ); +int kgsl_log_finish(void); +int kgsl_log_start( unsigned int log_flags ); int kgsl_log_write( unsigned int log_flags, char* format, ... ); -int kgsl_log_open_membuf( int* memBufId, unsigned int log_flags ); -int kgsl_log_open_file( char* filename, unsigned int log_flags ); -int kgsl_log_flush_membuf( char* filename, int memBufId ); #else // Empty function definitions -OSINLINE int kgsl_log_init(void) { return GSL_SUCCESS; } -OSINLINE int kgsl_log_close(void) { return GSL_SUCCESS; } -OSINLINE int kgsl_log_open_stdout( unsigned int log_flags ) { (void)log_flags; return GSL_SUCCESS; } -OSINLINE int kgsl_log_write( unsigned int log_flags, char* format, ... ) { (void)log_flags; (void)format; return GSL_SUCCESS; } -OSINLINE int kgsl_log_open_membuf( int* memBufId, unsigned int log_flags ) { (void)memBufId; (void)log_flags; return GSL_SUCCESS; } -OSINLINE int kgsl_log_open_file( char* filename, unsigned int log_flags ) { (void)filename; (void)log_flags; return GSL_SUCCESS; } -OSINLINE int kgsl_log_flush_membuf( char* filename, int memBufId ) { (void) filename; (void) memBufId; return GSL_SUCCESS; } +static __inline int kgsl_log_finish(void) { return GSL_SUCCESS; } +static __inline int kgsl_log_start( unsigned int log_flags ) { (void)log_flags; return GSL_SUCCESS; } +static __inline int kgsl_log_write( unsigned int log_flags, char* format, ... ) { (void)log_flags; (void)format; return GSL_SUCCESS; } #endif diff --git a/drivers/mxc/amd-gpu/include/gsl_memmgr.h b/drivers/mxc/amd-gpu/include/gsl_memmgr.h index ef9ad93ea96..f0739fc2d27 100644 --- a/drivers/mxc/amd-gpu/include/gsl_memmgr.h +++ b/drivers/mxc/amd-gpu/include/gsl_memmgr.h @@ -30,6 +30,8 @@ #define __GSL_MEMMGR_H +#include + ////////////////////////////////////////////////////////////////////////////// // defines ////////////////////////////////////////////////////////////////////////////// @@ -48,13 +50,13 @@ // memory arena stats // ------------------ typedef struct _gsl_memarena_stats_t { - __int64 bytes_read; - __int64 bytes_written; - __int64 allocs_success; - __int64 allocs_fail; - __int64 frees; - __int64 allocs_pagedistribution[GSL_MEMARENA_PAGE_DIST_MAX]; // 0=0--(4K-1), 1=4--(8K-1), 2=8--(16K-1),... max-1=(GSL_PAGESIZE<<(max-1))--infinity - __int64 frees_pagedistribution[GSL_MEMARENA_PAGE_DIST_MAX]; + __s64 bytes_read; + __s64 bytes_written; + __s64 allocs_success; + __s64 allocs_fail; + __s64 frees; + __s64 allocs_pagedistribution[GSL_MEMARENA_PAGE_DIST_MAX]; // 0=0--(4K-1), 1=4--(8K-1), 2=8--(16K-1),... max-1=(GSL_PAGESIZE<<(max-1))--infinity + __s64 frees_pagedistribution[GSL_MEMARENA_PAGE_DIST_MAX]; } gsl_memarena_stats_t; // ------------ @@ -91,7 +93,7 @@ typedef struct _gsl_nodepool_t { // memory arena object // ------------------- typedef struct _gsl_memarena_t { - oshandle_t mutex; + struct mutex lock; unsigned int gpubaseaddr; unsigned int hostbaseaddr; unsigned int sizebytes; diff --git a/drivers/mxc/amd-gpu/include/gsl_mmu.h b/drivers/mxc/amd-gpu/include/gsl_mmu.h index ddb2243b58d..1171ee33d1b 100644 --- a/drivers/mxc/amd-gpu/include/gsl_mmu.h +++ b/drivers/mxc/amd-gpu/include/gsl_mmu.h @@ -97,9 +97,9 @@ typedef struct _gsl_mh_intr_t // page table stats // ---------------- typedef struct _gsl_ptstats_t { - __int64 maps; - __int64 unmaps; - __int64 switches; + __s64 maps; + __s64 unmaps; + __s64 switches; } gsl_ptstats_t; // --------- @@ -107,7 +107,7 @@ typedef struct _gsl_ptstats_t { // --------- typedef struct _gsl_mmustats_t { gsl_ptstats_t pt; - __int64 tlbflushes; + __s64 tlbflushes; } gsl_mmustats_t; // ----------------- @@ -135,9 +135,6 @@ typedef struct _gsl_tlbflushfilter_t { // mmu object // ---------- typedef struct _gsl_mmu_t { -#ifdef GSL_LOCKING_FINEGRAIN - oshandle_t mutex; -#endif unsigned int refcnt; gsl_flags_t flags; gsl_device_t *device; @@ -159,7 +156,7 @@ typedef struct _gsl_mmu_t { ////////////////////////////////////////////////////////////////////////////// // inline functions ////////////////////////////////////////////////////////////////////////////// -OSINLINE int +static __inline int kgsl_mmu_isenabled(gsl_mmu_t *mmu) { // address translation enabled diff --git a/drivers/mxc/amd-gpu/include/gsl_ringbuffer.h b/drivers/mxc/amd-gpu/include/gsl_ringbuffer.h index 57f6297735e..c463fca2730 100644 --- a/drivers/mxc/amd-gpu/include/gsl_ringbuffer.h +++ b/drivers/mxc/amd-gpu/include/gsl_ringbuffer.h @@ -123,9 +123,9 @@ typedef struct _gsl_rbmemptrs_t { // stats // ----- typedef struct _gsl_rbstats_t { - __int64 wraps; - __int64 issues; - __int64 wordstotal; + __s64 wraps; + __s64 issues; + __s64 wordstotal; } gsl_rbstats_t; @@ -136,9 +136,6 @@ typedef struct _gsl_ringbuffer_t { gsl_device_t *device; gsl_flags_t flags; -#ifdef GSL_LOCKING_FINEGRAIN - oshandle_t mutex; -#endif gsl_memdesc_t buffer_desc; // allocated memory descriptor gsl_memdesc_t memptrs_desc; @@ -161,23 +158,6 @@ typedef struct _gsl_ringbuffer_t { } gsl_ringbuffer_t; -////////////////////////////////////////////////////////////////////////////// -// macros -////////////////////////////////////////////////////////////////////////////// - -#ifdef GSL_LOCKING_FINEGRAIN -#define GSL_RB_MUTEX_CREATE() rb->mutex = kos_mutex_create("gsl_ringbuffer"); \ - if (!rb->mutex) {return (GSL_FAILURE);} -#define GSL_RB_MUTEX_LOCK() kos_mutex_lock(rb->mutex) -#define GSL_RB_MUTEX_UNLOCK() kos_mutex_unlock(rb->mutex) -#define GSL_RB_MUTEX_FREE() kos_mutex_free(rb->mutex); rb->mutex = 0; -#else -#define GSL_RB_MUTEX_CREATE() -#define GSL_RB_MUTEX_LOCK() -#define GSL_RB_MUTEX_UNLOCK() -#define GSL_RB_MUTEX_FREE() -#endif - // ---------- // ring write // ---------- diff --git a/drivers/mxc/amd-gpu/include/reg/vgc/vgregs_z160.h b/drivers/mxc/amd-gpu/include/reg/vgc/vgregs_z160.h index 1660bc1c12a..1dd73e8e391 100644 --- a/drivers/mxc/amd-gpu/include/reg/vgc/vgregs_z160.h +++ b/drivers/mxc/amd-gpu/include/reg/vgc/vgregs_z160.h @@ -30,13 +30,9 @@ #ifndef __REGS_G4X_DRIVER_H #define __REGS_G4X_DRIVER_H -#ifndef _LINUX -#include -#else #ifndef assert #define assert(expr) #endif -#endif //----------------------------------------------------- // REGISTER ADDRESSES @@ -1049,7 +1045,7 @@ typedef struct _REG_MH_ARBITER_CONFIG { unsigned L1_ARB_ENABLE : 1; unsigned L1_ARB_HOLD_ENABLE : 1; unsigned L2_ARB_CONTROL : 1; - unsigned PAGE_SIZE : 3; + unsigned MH_PAGE_SIZE : 3; unsigned TC_REORDER_ENABLE : 1; unsigned TC_ARB_HOLD_ENABLE : 1; unsigned IN_FLIGHT_LIMIT_ENABLE : 1; diff --git a/drivers/mxc/amd-gpu/include/reg/yamato.h b/drivers/mxc/amd-gpu/include/reg/yamato.h index 05cae6c4640..af23c0517e9 100644 --- a/drivers/mxc/amd-gpu/include/reg/yamato.h +++ b/drivers/mxc/amd-gpu/include/reg/yamato.h @@ -34,9 +34,6 @@ #endif #if defined(_YDX14) -#if defined(_WIN32) && !defined(__SYMBIAN32__) -#pragma message("YDX 14 header files\r\n") -#endif #include "yamato/14/yamato_enum.h" #include "yamato/14/yamato_ipt.h" #include "yamato/14/yamato_mask.h" @@ -48,9 +45,6 @@ #define _YAMATO_GENENUM_H "reg/yamato/14/yamato_genenum.h" #define _YAMATO_GENREG_H "reg/yamato/14/yamato_genreg.h" #else -#if defined(_WIN32) && !defined(__SYMBIAN32__) -#pragma message("YDX 22 header files\r\n") -#endif #include "yamato/22/yamato_enum.h" #include "yamato/22/yamato_ipt.h" #include "yamato/22/yamato_mask.h" diff --git a/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_genreg.h b/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_genreg.h index d04379887b7..727fc35955a 100644 --- a/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_genreg.h +++ b/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_genreg.h @@ -1877,7 +1877,7 @@ START_REGISTER(MH_ARBITER_CONFIG) GENERATE_FIELD(L1_ARB_ENABLE, bool) GENERATE_FIELD(L1_ARB_HOLD_ENABLE, int) GENERATE_FIELD(L2_ARB_CONTROL, int) - GENERATE_FIELD(PAGE_SIZE, int) + GENERATE_FIELD(MH_PAGE_SIZE, int) GENERATE_FIELD(TC_REORDER_ENABLE, bool) GENERATE_FIELD(TC_ARB_HOLD_ENABLE, bool) GENERATE_FIELD(IN_FLIGHT_LIMIT_ENABLE, bool) diff --git a/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_registers.h b/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_registers.h index bcc28f133b0..f3a435f3854 100644 --- a/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_registers.h +++ b/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_registers.h @@ -7787,7 +7787,7 @@ unsigned int L1_ARB_ENABLE : 1; unsigned int L1_ARB_HOLD_ENABLE : 1; unsigned int L2_ARB_CONTROL : 1; - unsigned int PAGE_SIZE : 3; + unsigned int MH_PAGE_SIZE : 3; unsigned int TC_REORDER_ENABLE : 1; unsigned int TC_ARB_HOLD_ENABLE : 1; unsigned int IN_FLIGHT_LIMIT_ENABLE : 1; @@ -7809,7 +7809,7 @@ unsigned int IN_FLIGHT_LIMIT_ENABLE : 1; unsigned int TC_ARB_HOLD_ENABLE : 1; unsigned int TC_REORDER_ENABLE : 1; - unsigned int PAGE_SIZE : 3; + unsigned int MH_PAGE_SIZE : 3; unsigned int L2_ARB_CONTROL : 1; unsigned int L1_ARB_HOLD_ENABLE : 1; unsigned int L1_ARB_ENABLE : 1; diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/misc.c b/drivers/mxc/amd-gpu/misc.c similarity index 99% rename from drivers/mxc/amd-gpu/platform/hal/linux/misc.c rename to drivers/mxc/amd-gpu/misc.c index b3a4582bb15..88324c1526e 100644 --- a/drivers/mxc/amd-gpu/platform/hal/linux/misc.c +++ b/drivers/mxc/amd-gpu/misc.c @@ -27,7 +27,7 @@ #include typedef struct _gsl_autogate_t { - struct timer_list timer; + struct timer_list timer; spinlock_t lock; int active; /* pending indicate the timer has been fired but clock not yet disabled. */ diff --git a/drivers/mxc/amd-gpu/os/include/os_types.h b/drivers/mxc/amd-gpu/os/include/os_types.h deleted file mode 100644 index e7ecd90f895..00000000000 --- a/drivers/mxc/amd-gpu/os/include/os_types.h +++ /dev/null @@ -1,138 +0,0 @@ - /* Copyright (c) 2008-2010, QUALCOMM Incorporated. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of QUALCOMM Incorporated nor - * the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __OSTYPES_H -#define __OSTYPES_H - -////////////////////////////////////////////////////////////////////////////// -// status -////////////////////////////////////////////////////////////////////////////// -#define OS_SUCCESS 0 -#define OS_FAILURE -1 -#define OS_FAILURE_SYSTEMERROR -2 -#define OS_FAILURE_DEVICEERROR -3 -#define OS_FAILURE_OUTOFMEM -4 -#define OS_FAILURE_BADPARAM -5 -#define OS_FAILURE_NOTSUPPORTED -6 -#define OS_FAILURE_NOMOREAVAILABLE -7 -#define OS_FAILURE_NOTINITIALIZED -8 -#define OS_FAILURE_ALREADYINITIALIZED -9 -#define OS_FAILURE_TIMEOUT -10 - - -////////////////////////////////////////////////////////////////////////////// -// inline -////////////////////////////////////////////////////////////////////////////// -#ifndef OSINLINE -#ifdef _LINUX -#define OSINLINE static __inline -#else -#define OSINLINE __inline -#endif -#endif // OSINLINE - - -////////////////////////////////////////////////////////////////////////////// -// values -////////////////////////////////////////////////////////////////////////////// -#define OS_INFINITE 0xFFFFFFFF -#define OS_TLS_OUTOFINDEXES 0xFFFFFFFF -#define OS_TRUE 1 -#define OS_FALSE 0 - -#ifndef NULL -#define NULL (void *)0x0 -#endif // !NULL - -////////////////////////////////////////////////////////////////////////////// -// types -////////////////////////////////////////////////////////////////////////////// - - -// -// oshandle_t -// -typedef void * oshandle_t; -#define OS_HANDLE_NULL (oshandle_t)0x0 - -// -// os_sysinfo_t -// -typedef struct _os_sysinfo_t { - int cpu_mhz; - int cpu_type; - int cpu_version; - int os_type; - int os_version; - int sysmem_size; - int page_size; - int max_path; - int tls_slots; - int endianness; // 0 == little_endian, 1 == big_endian -} os_sysinfo_t; - - -// -// os_stats_t -// -#ifdef _LINUX -typedef long long __int64; -typedef unsigned long long __uint64; -#else -typedef unsigned __int64 __uint64; -#endif - -typedef struct _os_stats_t { - __int64 heap_allocs; - __int64 heap_frees; - __int64 heap_alloc_bytes; - __int64 shared_heap_allocs; - __int64 shared_heap_frees; - __int64 shared_heap_alloc_bytes; - __int64 objects_alloc; - __int64 objects_free; -} os_stats_t; - - -typedef enum { - OS_PROTECTION_GLOBAL, // inter process - OS_PROTECTION_LOCAL, // process local - OS_PROTECTION_NONE, // none -} os_protection_t; - -typedef struct _os_cputimer_t { - int refcount; // Reference count - int enabled; // Counter is enabled - int size; // Number of counters - __int64 start_time; // start time in cpu ticks - __int64 end_time; // end time in cpu ticks - __int64 timer_frequency; // cpu ticks per second - __int64 *counter_array; // number of ticks for each counter -} os_cputimer_t; - -#endif // __OSTYPES_H diff --git a/drivers/mxc/amd-gpu/os/kernel/include/kos_libapi.h b/drivers/mxc/amd-gpu/os/kernel/include/kos_libapi.h deleted file mode 100644 index a02c396c22a..00000000000 --- a/drivers/mxc/amd-gpu/os/kernel/include/kos_libapi.h +++ /dev/null @@ -1,813 +0,0 @@ -/* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices nor - * the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __KOSAPI_H -#define __KOSAPI_H - -#ifdef __cplusplus -extern "C" { -#endif // __cplusplus - -#include "os_types.h" - - -////////////////////////////////////////////////////////////////////////////// -// entrypoint abstraction -////////////////////////////////////////////////////////////////////////////// - - -#if defined(_WIN32) && !defined (_WIN32_WCE) && !defined(__SYMBIAN32__) -#define KOS_DLLEXPORT __declspec(dllexport) -#define KOS_DLLIMPORT __declspec(dllimport) -#elif defined(_WIN32) && defined (_WIN32_WCE) -#define KOS_DLLEXPORT __declspec(dllexport) -#define KOS_DLLIMPORT -#else -#define KOS_DLLEXPORT extern -#define KOS_DLLIMPORT -#endif // _WIN32 - - -////////////////////////////////////////////////////////////////////////////// -// KOS lib entrypoints -////////////////////////////////////////////////////////////////////////////// -#ifdef __KOSLIB_EXPORTS -#define KOS_API KOS_DLLEXPORT -#else -#define KOS_API KOS_DLLIMPORT -#endif // __KOSLIB_EXPORTS - -////////////////////////////////////////////////////////////////////////////// -// assert API -////////////////////////////////////////////////////////////////////////////// -KOS_API void kos_assert_hook(const char* file, int line, int expression); - -#if defined(DEBUG) || defined(DBG) || defined (_DBG) || defined (_DEBUG) - -#if defined(_WIN32) && !defined(__SYMBIAN32__) || defined(_WIN32_WCE) -#include -#define KOS_ASSERT(expression) assert(expression) -#elif defined(_BREW) -#include -#define KOS_ASSERT(expression) kos_assert_hook(__FILE__, __LINE__, expression) -#elif defined(__SYMBIAN32__) -//#include -//#define KOS_ASSERT(expression) assert(expression) -#define KOS_ASSERT(expression) /**/ -#elif defined(__ARM__) -#define KOS_ASSERT(expression) -#elif defined(_LINUX) -#define KOS_ASSERT(expression) //kos_assert_hook(__FILE__, __LINE__, (int)(expression)) -#endif - -#else - -#define KOS_ASSERT(expression) - -#endif // DEBUG || DBG || _DBG - -#if defined(_WIN32) && defined(_DEBUG) && !defined(_WIN32_WCE) && !defined(__SYMBIAN32__) -#pragma warning ( push, 3 ) -#include -#pragma warning (pop) -#define KOS_MALLOC_DBG(size) _malloc_dbg(size, _NORMAL_BLOCK, __FILE__, __LINE__) -#else -#define KOS_MALLOC_DBG(size) kos_malloc(int size) -#endif // _WIN32 _DEBUG - -#define kos_assert(expression) KOS_ASSERT(expression) -#define kos_malloc_dbg(size) KOS_MALLOC_DBG(size) - -#ifdef UNDER_CE -#define KOS_PAGE_SIZE 0x1000 -#endif - -typedef enum mutexIndex mutexIndex_t; -////////////////////////////////////////////////////////////////////////////// -// Interprocess shared memory initialization -////////////////////////////////////////////////////////////////////////////// -// TODO: still valid? -KOS_API int kos_sharedmem_create(unsigned int map_addr, unsigned int size); -KOS_API int kos_sharedmem_destroy(void); - -////////////////////////////////////////////////////////////////////////////// -// heap API (per process) -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocate memory for a kernel side process. - * - * - * \param int size Amount of bytes to be allocated. - * \return Pointer to the reserved memory, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_malloc(int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocate memory for a kernel side process. Clears the reserved memory. - * - * - * \param int num Number of elements to allocate. - * \param int size Element size in bytes. - * \return Pointer to the reserved memory, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_calloc(int num, int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Re-allocate an existing memory for a kernel side process. - * Contents of the old block will be copied to the new block - * taking the sizes of both blocks into account. - * - * - * \param void* memblock Pointer to the old memory block. - * \param int size Size of the new block in bytes. - * \return Pointer to the new memory block, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_realloc(void* memblock, int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Free a reserved memory block from the kernel side process. - * - * - * \param void* memblock Pointer to the memory block. - *//*-------------------------------------------------------------------*/ -KOS_API void kos_free(void* memblock); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Enable automatic memory leak checking performed at program exit. - * - * - *//*-------------------------------------------------------------------*/ -KOS_API void kos_enable_memoryleakcheck(void); - - -////////////////////////////////////////////////////////////////////////////// -// shared heap API (cross process) -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocate memory that can be shared between user and kernel - * side processes. - * - * - * \param int size Amount of bytes to be allocated. - * \return Pointer to the new memory block, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_shared_malloc(int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocate memory that can be shared between user and kernel - * side processes. Clears the reserved memory. - * - * - * \param int num Number of elements to allocate. - * \param int size Element size in bytes. - * \return Pointer to the reserved memory, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_shared_calloc(int num, int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Re-allocate an existing user/kernel shared memory block. - * Contents of the old block will be copied to the new block - * taking the sizes of both blocks into account. - * - * - * \param void* ptr Pointer to the old memory block. - * \param int size Size of the new block in bytes. - * \return Pointer to the new memory block, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_shared_realloc(void* ptr, int size); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Free a reserved shared memory block. - * - * - * \param void* ptr Pointer to the memory block. - *//*-------------------------------------------------------------------*/ - KOS_API void kos_shared_free(void* ptr); - - -////////////////////////////////////////////////////////////////////////////// -// memory API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Copies the values of num bytes from the location pointed by src - * directly to the memory block pointed by dst. - * - * - * \param void* dst Pointer to the destination memory block. - * \param void* src Pointer to the source memory block. - * \param void* count Amount of bytes to copy. - * \return Returns the dst pointer, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_memcpy(void* dst, const void* src, int count); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Fills the destination memory block with the given value. - * - * - * \param void* dst Pointer to the destination memory block. - * \param int value Value to be written to each destination address. - * \param void* count Number of bytes to be set to the value. - * \return Returns the dst pointer, NULL if any error. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_memset(void* dst, int value, int count); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Compares two memory blocks. - * - * - * \param void* dst Pointer to the destination memory block. - * \param void* src Pointer to the source memory block. - * \param void* count Number of bytes to compare. - * \return Zero if identical, >0 if first nonmatching byte is greater in dst. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_memcmp(void* dst, void* src, int count); - - -////////////////////////////////////////////////////////////////////////////// -// physical memory API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocates a physically contiguous memory block. - * - * - * \param void** virt_addr Pointer where to store the virtual address of the reserved block. - * \param void** phys_addr Pointer where to store the physical address of the reserved block. - * \param int pages Number of pages to reserve (default page size = 4096 bytes). - * \return Zero if ok, othervise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_alloc_physical(void** virt_addr, void** phys_addr, int pages); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Free a physically contiguous allocated memory block. - * - * - * \param void* virt_addr Virtual address of the memory block. - * \param int pages Number of pages. - * \return Zero if ok, othervise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_free_physical(void* virt_addr, int pages); - -KOS_API void kos_memoryfence(void); - - -////////////////////////////////////////////////////////////////////////////// -// string API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Perform a string copy. - * - * - * \param void* strdestination Pointer to destination memory. - * \param void* strsource Pointer to the source string. - * \return Zero if ok, othervise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API char* kos_strcpy(char* strdestination, const char* strsource); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Perform a string copy with given length. - * - * - * \param void* destination Pointer to destination memory. - * \param void* source Pointer to the source string. - * \param int length Amount of bytes to copy. - * \return Returns the destination pointer. - *//*-------------------------------------------------------------------*/ -KOS_API char* kos_strncpy(char* destination, const char* source, int length); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Append source string to destination string. - * - * - * \param void* strdestination Pointer to destination string. - * \param void* strsource Pointer to the source string. - * \return Returns the destination pointer. - *//*-------------------------------------------------------------------*/ -KOS_API char* kos_strcat(char* strdestination, const char* strsource); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Compare two strings. - * - * - * \param void* string1 Pointer to first string. - * \param void* string2 Pointer to second string. - * \param void* length Number of bytes to compare. - * \return Zero if identical, >0 if first string is lexically greater <0 if not. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_strcmp(const char* string1, const char* string2); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Compares two strings of given length. - * - * - * \param void* string1 Pointer to first string. - * \param void* string2 Pointer to second string. - * \param void* length Number of bytes to compare. - * \return Zero if identical, >0 if first string is lexically greater <0 if not. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_strncmp(const char* string1, const char* string2, int length); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Calculates the length of a string.. - * - * - * \param void* string Pointer to the string. - * \return Lenght of the string in bytes. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_strlen(const char* string); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Convert an numeric ascii string to integer value. - * - * - * \param void* string Pointer to the string. - * \return Integer value extracted from the string. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_atoi(const char* string); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Convert string to unsigned long integer. - * - * - * \param void* nptr Pointer to the string. - * \param char** endptr If not null, will be set to point to the next character after the number. - * \param int base Base defining the type of the numeric string. - * \return Unsigned integer value extracted from the string. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_strtoul(const char* nptr, char** endptr, int base); - - -////////////////////////////////////////////////////////////////////////////// -// sync API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Create a mutex instance. - * - * - * \param void* name Name string for the new mutex. - * \return Returns a handle to the mutex. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_mutex_create(const char* name); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get a handle to an already existing mutex. - * - * - * \param void* name Name string for the new mutex. - * \return Returns a handle to the mutex. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_mutex_open(const char* name); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Free the given mutex. - * - * - * \param oshandle_t mutexhandle Handle to the mutex. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_mutex_free(oshandle_t mutexhandle); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Lock the given mutex. - * - * - * \param oshandle_t mutexhandle Handle to the mutex. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_mutex_lock(oshandle_t mutexhandle); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Try to lock the given mutex, if already locked returns immediately. - * - * - * \param oshandle_t mutexhandle Handle to the mutex. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_mutex_locktry(oshandle_t mutexhandle); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Try to lock the given mutex by waiting for its release. Returns without locking if the - * mutex is already locked and cannot be acquired within the given period. - * - * - * \param oshandle_t mutexhandle Handle to the mutex. - * \param int millisecondstowait Time to wait for the mutex to be available. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_mutex_lockwait(oshandle_t mutexhandle, int millisecondstowait); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Unlock the given mutex. - * - * - * \param oshandle_t mutexhandle Handle to the mutex. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_mutex_unlock(oshandle_t mutexhandle); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Increments (increases by one) the value of the specified 32-bit variable as an atomic operation. - * - * - * \param int* ptr Pointer to the value to be incremented. - * \return Returns the new incremented value. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interlock_incr(int* ptr); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Decrements (decreases by one) the value of the specified 32-bit variable as an atomic operation. - * - * - * \param int* ptr Pointer to the value to be decremented. - * \return Returns the new decremented value. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interlock_decr(int* ptr); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Atomic replacement of a value. - * - * - * \param int* ptr Pointer to the value to be replaced. - * \param int value The new value. - * \return Returns the old value. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interlock_xchg(int* ptr, int value); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Perform an atomic compare-and-exchange operation on the specified values. Compares the two specified 32-bit values and exchanges -* with another 32-bit value based on the outcome of the comparison. - * - * - * \param int* ptr Pointer to the value to be replaced. - * \param int value The new value. - * \param int compvalue Value to be compared with. - * \return Returns the initial value of the first given parameter. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interlock_compxchg(int* ptr, int value, int compvalue); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Atomic addition of two 32-bit values. - * - * - * \param int* ptr Pointer to the target value. - * \param int value Value to be added to the target. - * \return Returns the initial value of the target. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interlock_xchgadd(int* ptr, int value); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Create an event semaphore. - * - * - * \param int a_manualReset Selection for performing reset manually (or by the system). - * \return Returns an handle to the created semaphore. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_event_create(int a_manualReset); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Destroy an event semaphore. - * - * - * \param oshandle_t a_event Handle to the semaphore. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_event_destroy(oshandle_t a_event); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Signal an event semaphore. - * - * - * \param oshandle_t a_event Handle to the semaphore. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_event_signal(oshandle_t a_event); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Reset an event semaphore. - * - * - * \param oshandle_t a_event Handle to the semaphore. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_event_reset(oshandle_t a_event); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Wait for an event semaphore to be freed and acquire it. - * - * - * \param oshandle_t a_event Handle to the semaphore. - * \param int a_milliSeconds Time to wait. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_event_wait(oshandle_t a_event, int a_milliSeconds); - - -////////////////////////////////////////////////////////////////////////////// -// interrupt handler API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Enable an interrupt with specified id. - * - * - * \param int interrupt Identification number for the interrupt. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interrupt_enable(int interrupt); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Disable an interrupt with specified id. - * - * - * \param int interrupt Identification number for the interrupt. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interrupt_disable(int interrupt); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Set the callback function for an interrupt. - * - * - * \param int interrupt Identification number for the interrupt. - * \param void* handler Pointer to the callback function. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interrupt_setcallback(int interrupt, void* handler); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Remove a callback function from an interrupt. - * - * - * \param int interrupt Identification number for the interrupt. - * \param void* handler Pointer to the callback function. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_interrupt_clearcallback(int interrupt, void* handler); - - -////////////////////////////////////////////////////////////////////////////// -// thread and process API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Allocate an entry from the thread local storage table. - * - * - * \return Index of the reserved entry. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_tls_alloc(void); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Free an entry from the thread local storage table. - * - * - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_tls_free(unsigned int tlsindex); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Read the value of an entry in the thread local storage table. - * - * - * \param unsigned int tlsindex Index of the entry. - * \return Returns the value of the entry. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_tls_read(unsigned int tlsindex); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Write a value to an entry in the thread local storage table. - * - * - * \param unsigned int tlsindex Index of the entry. - * \param void* tlsvalue Value to be written. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_tls_write(unsigned int tlsindex, void* tlsvalue); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Put the thread to sleep for the given time period. - * - * - * \param unsigned int milliseconds Time in milliseconds. - *//*-------------------------------------------------------------------*/ -KOS_API void kos_sleep(unsigned int milliseconds); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get the id of the current process. - * - * - * \return Returns the process id. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_process_getid(void); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get the id of the current caller process. - * - * - * \return Returns the caller process id. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_callerprocess_getid(void); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get the id of the current thread. - * - * - * \return Returns the thread id. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_thread_getid(void); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Create a new thread. - * - * - * \param oshandle_t a_function Handle to the function to be executed in the thread. - * \param unsigned int* a_threadId Pointer to a value where to store the ID of the new thread. - * \return Returns an handle to the created thread. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_thread_create(oshandle_t a_function, unsigned int* a_threadId); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Destroy the given thread. - * - * - * \param oshandle_t a_task Handle to the thread to be destroyed. - *//*-------------------------------------------------------------------*/ -KOS_API void kos_thread_destroy( oshandle_t a_task ); - -////////////////////////////////////////////////////////////////////////////// -// timing API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get the current time as a timestamp. - * - * - * \return Returns the timestamp. - *//*-------------------------------------------------------------------*/ -KOS_API unsigned int kos_timestamp(void); - - -////////////////////////////////////////////////////////////////////////////// -// libary API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Map the given library (not required an all OS'es). - * - * - * \param char* libraryname The name string of the lib. - * \return Returns a handle for the lib. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_lib_map(char* libraryname); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Unmap the given library. - * - * \param oshandle_t libhandle Handle to the lib. - * \return Returns an error code incase of an error. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_lib_unmap(oshandle_t libhandle); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get the address of a lib. - * - * \param oshandle_t libhandle Handle to the lib. - * \return Returns a pointer to the lib. - *//*-------------------------------------------------------------------*/ -KOS_API void* kos_lib_getaddr(oshandle_t libhandle, char* procname); - - -////////////////////////////////////////////////////////////////////////////// -// query API -////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get device system info. - * - * \param os_sysinfo_t* sysinfo Pointer to the destination sysinfo structure. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_get_sysinfo(os_sysinfo_t* sysinfo); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Get system status info. - * - * \param os_stats_t* stats Pointer to the destination stats structure. - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_get_stats(os_stats_t* stats); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block start - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_syncblock_start(void); -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block end - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_syncblock_end(void); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block start with argument - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_syncblock_start_ex( mutexIndex_t a_index ); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block start with argument - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_syncblock_end_ex( mutexIndex_t a_index ); - -////////////////////////////////////////////////////////////////////////////// -// file API -////////////////////////////////////////////////////////////////////////////// - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Opens a file - * - * \param const char* filename Name of the file to open. - * \param const char* mode Mode used for file opening. See fopen. - * \return Returns file handle or NULL if error. - *//*-------------------------------------------------------------------*/ -KOS_API oshandle_t kos_fopen(const char* filename, const char* mode); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Writes to a file - * - * \param oshandle_t file Handle of the file to write to. - * \param const char* format Format string. See fprintf. - * \return Returns the number of bytes written - *//*-------------------------------------------------------------------*/ -KOS_API int kos_fprintf(oshandle_t file, const char* format, ...); - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Closes a file - * - * \param oshandle_t file Handle of the file to close. - * \return Returns zero if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_fclose(oshandle_t file); - -#ifdef __SYMBIAN32__ -KOS_API void kos_create_dfc(void); -KOS_API void kos_signal_dfc(void); -KOS_API void kos_enter_critical_section(); -KOS_API void kos_leave_critical_section(); -#endif // __SYMBIAN32__ - -#ifdef __cplusplus -} -#endif // __cplusplus -#endif // __KOSAPI_H diff --git a/drivers/mxc/amd-gpu/os/kernel/src/linux/kos_lib.c b/drivers/mxc/amd-gpu/os/kernel/src/linux/kos_lib.c deleted file mode 100644 index 4ead84ffe0d..00000000000 --- a/drivers/mxc/amd-gpu/os/kernel/src/linux/kos_lib.c +++ /dev/null @@ -1,661 +0,0 @@ -/* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "kos_libapi.h" - -////////////////////////////////////////////////////////////////////////////// -// defines -////////////////////////////////////////////////////////////////////////////// -//#define KOS_STATS_ENABLE - -////////////////////////////////////////////////////////////////////////////// -// macros -////////////////////////////////////////////////////////////////////////////// -#define KOS_MALLOC(s) kmalloc(s, GFP_KERNEL) -#define KOS_CALLOC(num, size) kcalloc(num, size, GFP_KERNEL) -#define KOS_REALLOC(p, s) krealloc(p, s, GFP_KERNEL) -#define KOS_FREE(p) kfree(p); p = 0 -#define KOS_DBGFLAGS_SET(flag) - -////////////////////////////////////////////////////////////////////////////// -// stats -////////////////////////////////////////////////////////////////////////////// -#ifdef KOS_STATS_ENABLE -os_stats_t kos_stats = {0, 0, 0, 0, 0, 0, 0, 0}; -#define KOS_STATS(x) x -#else -#define KOS_STATS(x) -#endif - -////////////////////////////////////////////////////////////////////////////// -// assert API -////////////////////////////////////////////////////////////////////////////// -KOS_API void -kos_assert_hook(const char* file, int line, int expression) -{ - if (expression) - { - return; - } - else - { - printk(KERN_ERR "Assertion failed at %s:%d!\n", file, line); - //BUG(); - } - - // put breakpoint here -} - - -////////////////////////////////////////////////////////////////////////////// -// heap API (per process) -////////////////////////////////////////////////////////////////////////////// -KOS_API void* -kos_malloc(int size) -{ - void* ptr = KOS_MALLOC(size); - - KOS_ASSERT(ptr); - KOS_STATS(kos_stats.heap_allocs++); - KOS_STATS(kos_stats.heap_alloc_bytes += size); - - return (ptr); -} - - -//---------------------------------------------------------------------------- - -KOS_API void* -kos_calloc(int num, int size) -{ - void* ptr = KOS_CALLOC(num, size); - - KOS_ASSERT(ptr); - KOS_STATS(kos_stats.heap_allocs++); - KOS_STATS(kos_stats.heap_alloc_bytes += (size * num)); - - return (ptr); -} - -//---------------------------------------------------------------------------- - -KOS_API void* -kos_realloc(void* ptr, int size) -{ - void* newptr; - - KOS_ASSERT(ptr); - newptr = KOS_REALLOC(ptr, size); - - KOS_ASSERT(newptr); - - return (newptr); -} - -//---------------------------------------------------------------------------- - -KOS_API void -kos_free(void* ptr) -{ - KOS_STATS(kos_stats.heap_frees++); - - KOS_FREE(ptr); -} - - -////////////////////////////////////////////////////////////////////////////// -// shared heap API (cross process) -////////////////////////////////////////////////////////////////////////////// -KOS_API void* -kos_shared_malloc(int size) -{ - void* ptr; - - ptr = NULL; // shared alloc - - KOS_ASSERT(ptr); - KOS_STATS(kos_stats.shared_heap_allocs++); - KOS_STATS(kos_stats.shared_heap_alloc_bytes += size); - - return (ptr); -} - -//---------------------------------------------------------------------------- - -KOS_API void* -kos_shared_calloc(int num, int size) -{ - void* ptr; - - ptr = NULL; // shared calloc - - KOS_ASSERT(ptr); - KOS_STATS(kos_stats.shared_heap_allocs++); - KOS_STATS(kos_stats.shared_heap_alloc_bytes += (size * num)); - return (ptr); -} - -//---------------------------------------------------------------------------- - -KOS_API void* -kos_shared_realloc(void* ptr, int size) -{ - void* newptr; - (void) ptr; // unreferenced formal parameter - (void) size; // unreferenced formal parameter - - newptr = NULL; // shared realloc - - KOS_ASSERT(newptr); - - return (newptr); -} - -//---------------------------------------------------------------------------- - -KOS_API void -kos_shared_free(void* ptr) -{ - (void) ptr; // unreferenced formal parameter - KOS_ASSERT(0); // not implemented - - KOS_STATS(kos_stats.shared_heap_frees++); - - // shared free -} - -////////////////////////////////////////////////////////////////////////////// -// memory access API -////////////////////////////////////////////////////////////////////////////// -KOS_API void* -kos_memcpy(void* dst, const void* src, int count) -{ - KOS_ASSERT(src); - KOS_ASSERT(dst); - return memcpy(dst, src, count); -} - -//---------------------------------------------------------------------------- - -KOS_API void* -kos_memset(void* dst, int value, int count) -{ - KOS_ASSERT(dst); - return memset(dst, value, count); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_memcmp(void* dst, void* src, int count) -{ - KOS_ASSERT(src); - KOS_ASSERT(dst); - return memcmp(dst, src, count); -} - -////////////////////////////////////////////////////////////////////////////// -// physical memory API -////////////////////////////////////////////////////////////////////////////// -KOS_API int -kos_alloc_physical(void** virt_addr, void** phys_addr, int pages) -{ - *virt_addr = dma_alloc_coherent(NULL, pages*PAGE_SIZE, (dma_addr_t*)*phys_addr, GFP_DMA | GFP_KERNEL); - return *virt_addr ? OS_SUCCESS : OS_FAILURE; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_free_physical(void* virt_addr, int pages) -{ - (void) virt_addr; // unreferenced formal parameter - (void) pages; // unreferenced formal parameter - - return (OS_SUCCESS); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_map_physical(void** virt_addr, void** phys_addr, int pages) -{ - (void) virt_addr; // unreferenced formal parameter - (void) phys_addr; // unreferenced formal parameter - (void) pages; // unreferenced formal parameter - - return (OS_SUCCESS); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_unmap_physical(void* virt_addr, int pages) -{ - (void) virt_addr; // unreferenced formal parameter - (void) pages; // unreferenced formal parameter - - return (OS_SUCCESS); -} - -//---------------------------------------------------------------------------- - -KOS_API void -kos_memoryfence(void) -{ -} - -//---------------------------------------------------------------------------- - -KOS_API void -kos_enable_memoryleakcheck(void) -{ - // perform automatic leak checking at program exit - KOS_DBGFLAGS_SET(_CRTDBG_ALLOC_MEM_DF | _CRTDBG_LEAK_CHECK_DF); -} - -////////////////////////////////////////////////////////////////////////////// -// string API -////////////////////////////////////////////////////////////////////////////// - -KOS_API char* -kos_strcpy(char* strdestination, const char* strsource) -{ - KOS_ASSERT(strdestination); - KOS_ASSERT(strsource); - return strcpy(strdestination, strsource); -} - -//---------------------------------------------------------------------------- - -KOS_API char* -kos_strncpy(char* destination, const char* source, int length) -{ - KOS_ASSERT(destination); - KOS_ASSERT(source); - return strncpy(destination, source, length); -} - -//---------------------------------------------------------------------------- - -KOS_API char* -kos_strcat(char* strdestination, const char* strsource) -{ - KOS_ASSERT(strdestination); - KOS_ASSERT(strsource); - return strcat(strdestination, strsource); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_strcmp(const char* string1, const char* string2) -{ - KOS_ASSERT(string1); - KOS_ASSERT(string2); - return strcmp(string1, string2); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_strncmp(const char* string1, const char* string2, int length) -{ - KOS_ASSERT(string1); - KOS_ASSERT(string2); - return strncmp(string1, string2, length); -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_strlen(const char* string) -{ - KOS_ASSERT(string); - return strlen(string); -} - -////////////////////////////////////////////////////////////////////////////// -// sync API -////////////////////////////////////////////////////////////////////////////// - -KOS_API oshandle_t -kos_mutex_create(const char *name) -{ - struct mutex *mutex = KOS_MALLOC(sizeof(struct mutex)); - if (!mutex) - return 0; - mutex_init(mutex); - return mutex; -} - -//---------------------------------------------------------------------------- - -KOS_API oshandle_t -kos_mutex_open(const char *name) -{ - // not implemented - return 0; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_mutex_free(oshandle_t mutexhandle) -{ - struct mutex *mutex = (struct mutex *)mutexhandle; - if (!mutex) - return OS_FAILURE; - KOS_FREE(mutex); - return OS_SUCCESS; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_mutex_lock(oshandle_t mutexhandle) -{ - struct mutex *mutex = (struct mutex *)mutexhandle; - if (!mutex) - return OS_FAILURE; - if (mutex_lock_interruptible(mutex) == -EINTR) - return OS_FAILURE; - return OS_SUCCESS; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_mutex_locktry(oshandle_t mutexhandle) -{ - struct mutex *mutex = (struct mutex *)mutexhandle; - if (!mutex) - return OS_FAILURE; - if (!mutex_trylock(mutex)) - return OS_FAILURE; - return OS_SUCCESS; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_mutex_unlock(oshandle_t mutexhandle) -{ - struct mutex *mutex = (struct mutex *)mutexhandle; - if (!mutex) - return OS_FAILURE; - KOS_ASSERT(mutex_is_locked(mutex)); - mutex_unlock(mutex); - return OS_SUCCESS; -} - -//---------------------------------------------------------------------------- - -KOS_API unsigned int -kos_process_getid(void) -{ - return current->tgid; -} - -//---------------------------------------------------------------------------- - -/* ------------------------------------------------------------------- *//* - * \brief Creates new event semaphore - * \param uint32 a_manualReset - * When this param is zero, system automatically resets the - * event state to nonsignaled after waiting thread has been - * released - * \return oshandle_t -*//* ------------------------------------------------------------------- */ -KOS_API oshandle_t -kos_event_create(int a_manualReset) -{ - struct completion *comp = KOS_MALLOC(sizeof(struct completion)); - - KOS_ASSERT(comp); - if(!comp) - { - return (oshandle_t)NULL; - } - - init_completion(comp); - - return (oshandle_t)comp; -} - -/* ------------------------------------------------------------------- *//* - * \brief Frees event semaphore - * \param oshandle_t a_event, event semaphore - * \return int -*//* ------------------------------------------------------------------- */ -KOS_API int -kos_event_destroy(oshandle_t a_event) -{ - struct completion *comp = (struct completion *)a_event; - - KOS_ASSERT(comp); -// KOS_ASSERT(completion_done(comp)); - - KOS_FREE(comp); - return (OS_SUCCESS); -} - -/* ------------------------------------------------------------------- *//* - * \brief Signals event semaphore - * \param oshandle_t a_event, event semaphore - * \return int -*//* ------------------------------------------------------------------- */ -KOS_API int -kos_event_signal(oshandle_t a_event) -{ - struct completion *comp = (struct completion *)a_event; - - KOS_ASSERT(comp); - complete_all(comp); // perhaps complete_all? - return (OS_SUCCESS); -} - -/* ------------------------------------------------------------------- *//* - * \brief Resets event semaphore state to nonsignaled - * \param oshandle_t a_event, event semaphore - * \return int -*//* ------------------------------------------------------------------- */ -KOS_API int -kos_event_reset(oshandle_t a_event) -{ - struct completion *comp = (struct completion *)a_event; - - KOS_ASSERT(comp); - INIT_COMPLETION(*comp); - return (OS_SUCCESS); -} - -/* ------------------------------------------------------------------- *//* - * \brief Waits event semaphore to be signaled - * \param oshandle_t a_event, event semaphore - * \return int -*//* ------------------------------------------------------------------- */ -KOS_API int -kos_event_wait(oshandle_t a_event, int a_milliSeconds) -{ - struct completion *comp = (struct completion *)a_event; - - KOS_ASSERT(comp); - if(a_milliSeconds == OS_INFINITE) - { - wait_for_completion_killable(comp); - } - else - { - // should interpret milliseconds really to jiffies? - if(!wait_for_completion_timeout(comp, msecs_to_jiffies(a_milliSeconds))) - { - return (OS_FAILURE); - } - } - return (OS_SUCCESS); -} - -//---------------------------------------------------------------------------- - -KOS_API void -kos_sleep(unsigned int milliseconds) -{ - msleep(milliseconds); -} - -////////////////////////////////////////////////////////////////////////////// -// query API -////////////////////////////////////////////////////////////////////////////// - -static int -kos_get_endianness(void) -{ - int value; - char* ptr; - - value = 0x01FFFF00; - - ptr = (char*)&value; - - KOS_ASSERT((*ptr == 0x00) || (*ptr == 0x01)); - - return (int)*ptr; -} - -//---------------------------------------------------------------------------- - -KOS_API int -kos_get_sysinfo(os_sysinfo_t* sysinfo) -{ - KOS_ASSERT(sysinfo); - if (!sysinfo) return (OS_FAILURE); - - sysinfo->cpu_mhz = 0; - sysinfo->cpu_type = 0; - sysinfo->cpu_version = 0; - sysinfo->os_type = 0; - sysinfo->os_version = 0; - sysinfo->sysmem_size = 0; - sysinfo->page_size = 0x1000; - sysinfo->max_path = PATH_MAX; -// sysinfo->tls_slots = TLS_MINIMUM_AVAILABLE - 1; - sysinfo->endianness = kos_get_endianness(); - - return (OS_SUCCESS); -} - -//---------------------------------------------------------------------------- - -#ifdef KOS_STATS_ENABLE -KOS_API int -kos_get_stats(os_stats_t* stats) -{ - kos_memcpy(stats, &kos_stats, sizeof(os_stats_t)); - return (OS_SUCCESS); -} -#else -KOS_API int -kos_get_stats(os_stats_t* stats) -{ - return (OS_FAILURE); -} -#endif // KOS_STATS - -/*-------------------------------------------------------------------*//*! - * \brief Sync block API - * Same mutex needed from different blocks of driver - *//*-------------------------------------------------------------------*/ - -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block start - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ - -static struct mutex* syncblock_mutex = 0; - -KOS_API int kos_syncblock_start(void) -{ - int return_value; - - if(!syncblock_mutex) - { - syncblock_mutex = kos_mutex_create("syncblock"); - } - - if(syncblock_mutex) - { - return_value = kos_mutex_lock(syncblock_mutex); - } - else - { - return_value = -1; - } - - return return_value; -} -/*-------------------------------------------------------------------*//*! - * \external - * \brief Sync block end - * - * \param void - * \return Returns NULL if no error, otherwise an error code. - *//*-------------------------------------------------------------------*/ -KOS_API int kos_syncblock_end(void) -{ - int return_value; - - if(syncblock_mutex) - { - return_value = kos_mutex_unlock(syncblock_mutex); - } - else - { - return_value = -1; - } - - return return_value; -} - -KOS_API oshandle_t kos_thread_create(oshandle_t a_function, unsigned int* a_threadId) -{ - struct task_struct *task = kthread_run(a_function, 0, "kos_thread_%p", a_threadId); - *a_threadId = (unsigned int)task; - return (oshandle_t)task; -} - -KOS_API void kos_thread_destroy( oshandle_t a_task ) -{ - kthread_stop((struct task_struct *)a_task); -} diff --git a/drivers/mxc/amd-gpu/common/pfp_microcode_nrt.inl b/drivers/mxc/amd-gpu/pfp_microcode_nrt.inl similarity index 100% rename from drivers/mxc/amd-gpu/common/pfp_microcode_nrt.inl rename to drivers/mxc/amd-gpu/pfp_microcode_nrt.inl diff --git a/drivers/mxc/amd-gpu/common/pm4_microcode.inl b/drivers/mxc/amd-gpu/pm4_microcode.inl similarity index 96% rename from drivers/mxc/amd-gpu/common/pm4_microcode.inl rename to drivers/mxc/amd-gpu/pm4_microcode.inl index 03f6f4cd35e..aa7c9fc9d00 100644 --- a/drivers/mxc/amd-gpu/common/pm4_microcode.inl +++ b/drivers/mxc/amd-gpu/pm4_microcode.inl @@ -29,7 +29,7 @@ #ifndef PM4_MICROCODE_H #define PM4_MICROCODE_H -#define PM4_MICROCODE_VERSION 300684 +#define PM4_MICROCODE_VERSION 322696 #define PM4_MICROCODE_SIZE 768 @@ -56,11 +56,11 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x0000ffff, 0xc0284620, 0x000 }, { 0x00000000, 0xd9004800, 0x000 }, { 0x00000000, 0x00400000, 0x000 }, - { 0x00000000, 0x00600000, 0x2a8 }, + { 0x00000000, 0x00600000, 0x2b0 }, { 0x00000000, 0xc0200c00, 0x000 }, { 0x000021fc, 0x0029462c, 0x000 }, { 0x00000000, 0x00404803, 0x021 }, - { 0x00000000, 0x00600000, 0x2a8 }, + { 0x00000000, 0x00600000, 0x2b0 }, { 0x00000000, 0xc0200000, 0x000 }, { 0x00000000, 0xc0200c00, 0x000 }, { 0x000021fc, 0x0029462c, 0x000 }, @@ -78,7 +78,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x0000000e, 0x00404811, 0x000 }, { 0x00000394, 0x00204411, 0x000 }, { 0x00000001, 0xc0404811, 0x000 }, - { 0x00000000, 0x00600000, 0x2a8 }, + { 0x00000000, 0x00600000, 0x2b0 }, { 0x000021f9, 0x0029462c, 0x000 }, { 0x00000008, 0xc0210a20, 0x000 }, { 0x00000000, 0x14e00000, 0x02d }, @@ -134,7 +134,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0xc0204800, 0x000 }, { 0x000021f9, 0x0029462c, 0x000 }, { 0x00000000, 0x00404802, 0x000 }, - { 0x0000001f, 0xc0680a20, 0x2a8 }, + { 0x0000001f, 0xc0680a20, 0x2b0 }, { 0x000021f9, 0x0029462c, 0x000 }, { 0x00000000, 0x00404802, 0x000 }, { 0x8100ffff, 0x00204411, 0x000 }, @@ -142,19 +142,19 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00001fff, 0x40280a20, 0x000 }, { 0x80000000, 0x40280e20, 0x000 }, { 0x40000000, 0xc0281220, 0x000 }, - { 0x00040000, 0x00694622, 0x2b2 }, + { 0x00040000, 0x00694622, 0x2ba }, { 0x00000000, 0x00201410, 0x000 }, { 0x00000000, 0x002f0223, 0x000 }, { 0x00000000, 0x0ae00000, 0x06d }, { 0x00000000, 0xc0401800, 0x070 }, { 0x00001fff, 0xc0281a20, 0x000 }, - { 0x00040000, 0x00694626, 0x2b2 }, + { 0x00040000, 0x00694626, 0x2ba }, { 0x00000000, 0x00201810, 0x000 }, { 0x00000000, 0x002f0224, 0x000 }, { 0x00000000, 0x0ae00000, 0x073 }, { 0x00000000, 0xc0401c00, 0x076 }, { 0x00001fff, 0xc0281e20, 0x000 }, - { 0x00040000, 0x00694627, 0x2b2 }, + { 0x00040000, 0x00694627, 0x2ba }, { 0x00000000, 0x00201c10, 0x000 }, { 0x00000000, 0x00204402, 0x000 }, { 0x00000000, 0x002820c5, 0x000 }, @@ -233,7 +233,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x00400000, 0x0a4 }, { 0x8100ffff, 0x00204411, 0x000 }, { 0x00000001, 0x00204811, 0x000 }, - { 0x00040578, 0x00604411, 0x2b2 }, + { 0x00040578, 0x00604411, 0x2ba }, { 0x00000000, 0xc0400000, 0x000 }, { 0x00000000, 0xc0200c00, 0x000 }, { 0x00000000, 0xc0201000, 0x000 }, @@ -249,7 +249,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x0ce00000, 0x0d5 }, { 0x8100ffff, 0x00204411, 0x000 }, { 0x00000001, 0x00204811, 0x000 }, - { 0x00040000, 0x00694624, 0x2b2 }, + { 0x00040000, 0x00694624, 0x2ba }, { 0x00000000, 0x00400000, 0x0d6 }, { 0x00000000, 0x00600000, 0x135 }, { 0x00000000, 0x002820d0, 0x000 }, @@ -304,7 +304,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x17000000, 0x000 }, { 0x8100ffff, 0x00204411, 0x000 }, { 0x00000001, 0x00204811, 0x000 }, - { 0x00040000, 0x00694624, 0x2b2 }, + { 0x00040000, 0x00694624, 0x2ba }, { 0x00000000, 0x002820d0, 0x000 }, { 0x00000000, 0x002f00a8, 0x000 }, { 0x00000000, 0x0ce00000, 0x000 }, @@ -316,7 +316,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x17000000, 0x000 }, { 0x8100ffff, 0x00204411, 0x000 }, { 0x00000001, 0x00204811, 0x000 }, - { 0x00040000, 0x00694624, 0x2b2 }, + { 0x00040000, 0x00694624, 0x2ba }, { 0x00000000, 0x002820d0, 0x000 }, { 0x00000000, 0x002f00a8, 0x000 }, { 0x00000000, 0x06e00000, 0x000 }, @@ -335,7 +335,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000001, 0x00204811, 0x000 }, { 0x00000000, 0xc0200800, 0x000 }, { 0x00007fff, 0x00281a22, 0x000 }, - { 0x00040000, 0x00694626, 0x2b2 }, + { 0x00040000, 0x00694626, 0x2ba }, { 0x00000000, 0x00200c10, 0x000 }, { 0x00000000, 0xc0201000, 0x000 }, { 0x80000000, 0x00281a22, 0x000 }, @@ -416,7 +416,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0xc0200800, 0x000 }, { 0x00000009, 0x00210222, 0x000 }, { 0x00000000, 0x14c00000, 0x17d }, - { 0x00000000, 0x00600000, 0x2af }, + { 0x00000000, 0x00600000, 0x2b7 }, { 0x00000000, 0x00200c11, 0x000 }, { 0x00000016, 0x00203623, 0x000 }, { 0x00000000, 0x00210222, 0x000 }, @@ -482,7 +482,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x0000000a, 0xc0220e20, 0x000 }, { 0x00000011, 0x00203623, 0x000 }, { 0x000021f4, 0x00204411, 0x000 }, - { 0x0000000a, 0x00614a2c, 0x2af }, + { 0x0000000a, 0x00614a2c, 0x2b7 }, { 0x00000005, 0x00210222, 0x000 }, { 0x00000000, 0x14c00000, 0x1c0 }, { 0x00000000, 0xc0200000, 0x000 }, @@ -626,7 +626,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00040000, 0x00494624, 0x24c }, { 0x000021f7, 0x0029122c, 0x000 }, { 0x00040000, 0x00294624, 0x000 }, - { 0x00000000, 0x00600000, 0x2b2 }, + { 0x00000000, 0x00600000, 0x2ba }, { 0x00000000, 0x002f0222, 0x000 }, { 0x00000000, 0x0ce00000, 0x252 }, { 0x00000001, 0x002f0222, 0x000 }, @@ -638,7 +638,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x002f0226, 0x000 }, { 0x00000000, 0x0ae00000, 0x258 }, { 0x00000000, 0xc0400000, 0x000 }, - { 0x00040d02, 0x00604411, 0x2b2 }, + { 0x00040d02, 0x00604411, 0x2ba }, { 0x00000000, 0x002f0222, 0x000 }, { 0x00000000, 0x0ae00000, 0x25d }, { 0x00000010, 0x00211e30, 0x000 }, @@ -662,13 +662,13 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0xc0204800, 0x000 }, { 0x00000000, 0x00204806, 0x000 }, { 0x00005000, 0x00302225, 0x000 }, - { 0x00040000, 0x00694628, 0x2b2 }, + { 0x00040000, 0x00694628, 0x2ba }, { 0x00000001, 0x00302228, 0x000 }, { 0x00000000, 0x00202810, 0x000 }, - { 0x00040000, 0x00694628, 0x2b2 }, + { 0x00040000, 0x00694628, 0x2ba }, { 0x00000001, 0x00302228, 0x000 }, { 0x00000000, 0x00200810, 0x000 }, - { 0x00040000, 0x00694628, 0x2b2 }, + { 0x00040000, 0x00694628, 0x2ba }, { 0x00000001, 0x00302228, 0x000 }, { 0x00000000, 0x00201410, 0x000 }, { 0x0000060d, 0x00204411, 0x000 }, @@ -707,6 +707,10 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x14c00000, 0x29d }, { 0xa500ffff, 0x00204411, 0x000 }, { 0x00000001, 0x00404811, 0x299 }, + { 0x8100ffff, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042294, 0x00604411, 0x2ba }, + { 0x00000000, 0x00200010, 0x000 }, { 0xa500ffff, 0x00204411, 0x000 }, { 0x00000000, 0x00204811, 0x000 }, { 0x000021f4, 0x0029462c, 0x000 }, @@ -717,6 +721,10 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000002, 0x00204811, 0x000 }, { 0x00000000, 0x00210130, 0x000 }, { 0xdf7fffff, 0x00283a2e, 0x000 }, + { 0x8100ffff, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042294, 0x00604411, 0x2ba }, + { 0x00000000, 0x00200010, 0x000 }, { 0x00000010, 0x0080362a, 0x000 }, { 0x9700ffff, 0x00204411, 0x000 }, { 0x00000000, 0x0020480c, 0x000 }, @@ -728,10 +736,10 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x00203011, 0x000 }, { 0x00000010, 0x0080362c, 0x000 }, { 0x00000000, 0xc0400000, 0x000 }, - { 0x00000000, 0x1ac00000, 0x2b2 }, + { 0x00000000, 0x1ac00000, 0x2ba }, { 0x9f00ffff, 0x00204411, 0x000 }, { 0xdeadbeef, 0x00204811, 0x000 }, - { 0x00000000, 0x1ae00000, 0x2b5 }, + { 0x00000000, 0x1ae00000, 0x2bd }, { 0x00000000, 0x00800000, 0x000 }, { 0x00000000, 0x00000000, 0x000 }, { 0x00000000, 0x00000000, 0x000 }, @@ -770,14 +778,6 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00000000, 0x00000000, 0x000 }, { 0x00000000, 0x00000000, 0x000 }, { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, - { 0x00000000, 0x00000000, 0x000 }, { 0x00020143, 0x00020002, 0x000 }, { 0x00020002, 0x00020002, 0x000 }, { 0x00020002, 0x00020002, 0x000 }, @@ -805,7 +805,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={ { 0x00020002, 0x00020002, 0x000 }, { 0x00020002, 0x00020002, 0x000 }, { 0x00020002, 0x00020002, 0x000 }, - { 0x000502b1, 0x00020008, 0x000 }, + { 0x000502b9, 0x00020008, 0x000 }, }; #endif @@ -813,3 +813,4 @@ static const uint32 ME_JUMP_TABLE_START = 740; static const uint32 ME_JUMP_TABLE_END = 768; #endif + diff --git a/drivers/mxc/dam/dam.c b/drivers/mxc/dam/dam.c index 9e57e1a260e..8f61350e844 100644 --- a/drivers/mxc/dam/dam.c +++ b/drivers/mxc/dam/dam.c @@ -32,9 +32,11 @@ */ #include +#define AUDMUX_BASE_ADDR MX53_AUDMUX_BASE_ADDR + #define ModifyRegister32(a, b, c) (c = (((c)&(~(a))) | (b))) -#define DAM_VIRT_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR) +#define DAM_VIRT_BASE_ADDR MX53_IO_ADDRESS(AUDMUX_BASE_ADDR) #ifndef _reg_DAM_PTCR1 #define _reg_DAM_PTCR1 (*((volatile unsigned long *) \ diff --git a/drivers/mxc/ssi/ssi.c b/drivers/mxc/ssi/ssi.c index da09631283e..d26fd82840a 100644 --- a/drivers/mxc/ssi/ssi.c +++ b/drivers/mxc/ssi/ssi.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -127,11 +128,11 @@ void *get_ssi_base_addr(unsigned int ssi) { if (ssi_platform_data->ssi_num == 2) { if (ssi == SSI1) - return IO_ADDRESS(base_addr_1); + return MX53_IO_ADDRESS(base_addr_1); else - return IO_ADDRESS(base_addr_2); + return MX53_IO_ADDRESS(base_addr_2); } - return IO_ADDRESS(base_addr_1); + return MX53_IO_ADDRESS(base_addr_1); } void set_register_bits(unsigned int mask, unsigned int data, @@ -565,11 +566,11 @@ unsigned char ssi_rx_fifo_counter(ssi_mod module, fifo_nb fifo) if (ssi_fifo_0 == fifo) { result = getreg_value(MXC_SSISFCSR, module); - result &= (0xF << SSI_RX_FIFO_0_COUNT_SHIFT); + result &= (unsigned char)(0xF << SSI_RX_FIFO_0_COUNT_SHIFT); result = result >> SSI_RX_FIFO_0_COUNT_SHIFT; } else { result = getreg_value(MXC_SSISFCSR, module); - result &= (0xF << SSI_RX_FIFO_1_COUNT_SHIFT); + result &= (unsigned char)(0xF << SSI_RX_FIFO_1_COUNT_SHIFT); result = result >> SSI_RX_FIFO_1_COUNT_SHIFT; } @@ -936,11 +937,11 @@ unsigned char ssi_tx_fifo_counter(ssi_mod module, fifo_nb fifo) if (ssi_fifo_0 == fifo) { result = getreg_value(MXC_SSISFCSR, module); - result &= (0xF << SSI_TX_FIFO_0_COUNT_SHIFT); + result &= (unsigned char)(0xF << SSI_TX_FIFO_0_COUNT_SHIFT); result >>= SSI_TX_FIFO_0_COUNT_SHIFT; } else { result = getreg_value(MXC_SSISFCSR, module); - result &= (0xF << SSI_TX_FIFO_1_COUNT_SHIFT); + result &= (unsigned char)(0xF << SSI_TX_FIFO_1_COUNT_SHIFT); result >>= SSI_TX_FIFO_1_COUNT_SHIFT; } diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 9431c806119..8882b761039 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -999,4 +999,13 @@ config RTC_DRV_DA9052 Say y here to support the RTC found on Dialog Semiconductor DA9052 PMIC. +config RTC_SPPP + tristate "SPPP RTC driver" + depends on MACH_MX53_EFIKASB + help + Say Y here if you have a Genesi MX53 EfikaSB based + System. These systems use the SPPP protocol to + communicate with a housekeeper chip responsible + for keyboard and trackpad among others. + endif # RTC_CLASS diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index c769a034ac2..c34b0e73d48 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -103,3 +103,4 @@ obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_MXC_V2) += rtc-mxc_v2.o obj-$(CONFIG_RTC_DRV_DA9052) += rtc-da9052.o +obj-$(CONFIG_RTC_SPPP) += sppp_rtc.o diff --git a/drivers/rtc/sppp_rtc.c b/drivers/rtc/sppp_rtc.c new file mode 100644 index 00000000000..9aa9edb2954 --- /dev/null +++ b/drivers/rtc/sppp_rtc.c @@ -0,0 +1,166 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static struct sppp_client sppp_rtc_client; + +struct rtc_sppp { + struct rtc_device *rtc; +}; + +uint32_t rawtime; + +/* Callback for incoming data from SPM */ +static void sppp_get_data(sppp_rx_t *packet) +{ + uint32_t time; + + time = packet->input[0] << 24; + time |= (packet->input[1] << 16); + time |= (packet->input[2] << 8); + time |= (packet->input[3] << 0); + + rawtime = time; +} + +/* Send read sequence to SPM and get data when it arrives */ +static int sppp_rtc_readtime(struct device *dev, struct rtc_time *tm) +{ + sppp_tx_t sppp_tx_g; + + sppp_start(&sppp_tx_g, SPPP_RTC_ID); + sppp_data(&sppp_tx_g, RTC_ID_GET); + sppp_stop(&sppp_tx_g); + + while + (rawtime == 0); + + rtc_time_to_tm(rawtime, tm); + + rawtime = 0; + + return rtc_valid_tm(tm); +} + +static int sppp_rtc_settime(struct device *dev, struct rtc_time *tm) +{ + sppp_tx_t sppp_tx_g; + unsigned long now; + + rtc_tm_to_time(tm, &now); + + sppp_start(&sppp_tx_g, SPPP_RTC_ID); + sppp_data(&sppp_tx_g, RTC_ID_SET); + sppp_data(&sppp_tx_g, (now&0xFF000000) >> 24); + sppp_data(&sppp_tx_g, (now&0x00FF0000) >> 16); + sppp_data(&sppp_tx_g, (now&0x0000FF00) >> 8); + sppp_data(&sppp_tx_g, (now&0x000000FF) >> 0); + sppp_stop(&sppp_tx_g); + + return 0; +} + +static struct rtc_class_ops sppp_rtc_ops = { + .read_time = sppp_rtc_readtime, + .set_time = sppp_rtc_settime, +}; + +static int __init sppp_rtc_probe(struct platform_device *pdev) +{ + struct rtc_sppp *rtc; + + rtc = kzalloc(sizeof(struct rtc_sppp), GFP_KERNEL); + if (!rtc) { + dev_dbg(&pdev->dev, "out of memory\n"); + return -ENOMEM; + } + + platform_set_drvdata(pdev, rtc); + + rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, + &sppp_rtc_ops, THIS_MODULE); + + if (IS_ERR(rtc->rtc)) { + dev_dbg(&pdev->dev, "could not register rtc device\n"); + return PTR_ERR(rtc->rtc); + } + + dev_info(&pdev->dev, "SPPP RTC for Genesi EfikaSB\n"); + + sppp_rtc_client.id = RTC; + sppp_rtc_client.decode = sppp_get_data; + sppp_client_register(&sppp_rtc_client); + + return 0; +} + + +static int __exit sppp_rtc_remove(struct platform_device *pdev) +{ + struct rtc_sppp *rtc = platform_get_drvdata(pdev); + + rtc_device_unregister(rtc->rtc); + kfree(rtc); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver sppp_rtc_driver = { + .remove = __exit_p(sppp_rtc_remove), + .driver = { + .name = "sppp_rtc", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device sppp_rtc = { + .name = "sppp_rtc", + .id = -1, +}; + +static int __init sppp_rtc_init(void) +{ + platform_device_register(&sppp_rtc); + return platform_driver_probe(&sppp_rtc_driver, sppp_rtc_probe); +} + +static void __exit sppp_rtc_exit(void) +{ + sppp_client_remove(&sppp_rtc_client); + platform_driver_unregister(&sppp_rtc_driver); + platform_device_unregister(&sppp_rtc); +} + +module_init(sppp_rtc_init); +module_exit(sppp_rtc_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SPPP RTC client"); +MODULE_AUTHOR("Johan Dams "); + diff --git a/drivers/video/mxc/ldb.c b/drivers/video/mxc/ldb.c index 5e67e682113..729cbc9ea83 100644 --- a/drivers/video/mxc/ldb.c +++ b/drivers/video/mxc/ldb.c @@ -131,6 +131,14 @@ struct fb_videomode mxcfb_ldb_modedb[] = { 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_DETAILED,}, + { + "WSVGA", 60, 1024, 600, 22800, + 80, 40, + 20, 21, + 4, 4, + 0, + FB_VMODE_NONINTERLACED, + FB_MODE_IS_DETAILED,}, }; int mxcfb_ldb_modedb_sz = ARRAY_SIZE(mxcfb_ldb_modedb); @@ -486,6 +494,18 @@ static int ldb_fb_pre_setup(struct fb_info *fbi) dev_warn(g_ldb_dev, "default di1 single mode\n"); } + } else if (fb_mode_is_equal(fbi->mode, &mxcfb_ldb_modedb[2])) { + if (ipu_di == 0) { + ldb.chan_mode_opt = LDB_SIN_DI0; + ldb.chan_bit_map[0] = LDB_BIT_MAP_SPWG; + dev_warn(g_ldb_dev, + "default di0 single mode\n"); + } else { + ldb.chan_mode_opt = LDB_SIN_DI1; + ldb.chan_bit_map[1] = LDB_BIT_MAP_SPWG; + dev_warn(g_ldb_dev, + "default di1 single mode\n"); + } } } diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index adb4888248b..245b641fef2 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -125,7 +125,8 @@ struct mmc_card { #define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */ /* (missing CIA registers) */ #define MMC_QUIRK_BROKEN_CLK_GATING (1<<3) /* clock gating the sdio bus will make card fail */ - +#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */ + /* byte mode */ unsigned int erase_size; /* erase size in sectors */ unsigned int erase_shift; /* if erase unit is power 2 */ unsigned int pref_erase; /* in sectors */ @@ -180,6 +181,11 @@ static inline int mmc_blksz_for_byte_mode(const struct mmc_card *c) return c->quirks & MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; } +static inline int mmc_card_broken_byte_mode_512(const struct mmc_card *c) +{ + return c->quirks & MMC_QUIRK_BROKEN_BYTE_MODE_512; +} + #define mmc_card_name(c) ((c)->cid.prod_name) #define mmc_card_id(c) (dev_name(&(c)->dev)) diff --git a/include/linux/sppp.h b/include/linux/sppp.h new file mode 100755 index 00000000000..c530385a059 --- /dev/null +++ b/include/linux/sppp.h @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2011 Genesi USA, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + + +#ifndef _SPPP_H_ +#define _SPPP_H_ + +#define MAX_RECV_PKG_SIZE 1024 +#define MAX_PKG_SIZE MAX_RECV_PKG_SIZE + +#define SPPP_PKT_ID_MASK 0x3F +#define SPPP_PKT_START 0x80 +#define SPPP_PKT_STOP 0xC0 +#define IsBitSet(val, bit) ((val) & (1 << (bit))) + +#define SPPP_IDENTIFICATION_ID 0 +#define SPPP_KEY_ID 1 +#define SPPP_PS2_ID 2 +#define SPPP_RTC_ID 3 + #define RTC_ID_SET 0x73 + #define RTC_ID_GET 0xAA +#define SPPP_PWR_ID 4 + #define PWR_ID_SET_RTC_ALARM 2 + #define PWR_ID_GET_RTC_ALARM 3 + #define PWR_ID_GOTO_STANDY 4 + +#define SPPP_STRING_ID 60 +#define SPPP_BINARY_ID 61 + +#define SPPP_NOSYNC 0x00 +#define SPPP_SYNC 0xff + +#define FLASH_FW_START_PAGE 8 + +typedef struct { + uint8_t input[MAX_RECV_PKG_SIZE]; + uint8_t id; + uint8_t crc; + uint8_t pos; + uint8_t num; + uint8_t carry; + uint8_t sync; +} sppp_rx_t; + +typedef struct { + uint8_t crc; + uint8_t pos; + uint8_t carry; + int comd; +} sppp_tx_t; + +/* Possible SPPP clients */ +enum clients { + KEYBOARD = 0, + TRACKPAD, + RTC, + POWER, +}; + +/* Each SPPP client has these */ +struct sppp_client { + unsigned int id; + void (*decode)(sppp_rx_t *); +}; + +int sppp_recv(int comd, sppp_rx_t *sppp_rx); +void sppp_start(sppp_tx_t *sppp_tx, uint8_t pkg_id); +void sppp_data(sppp_tx_t *sppp_tx, uint8_t data); +void sppp_stop(sppp_tx_t *sppp_tx); + +void sppp_send(sppp_tx_t *sppp_tx, unsigned char *buf, int size, int pkg_id); + +void sppp_client_register(struct sppp_client *client); +void sppp_client_remove(struct sppp_client *client); + +#endif /* _SPPP_H_ */ diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index fbd28480eba..3e21943e256 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -25,6 +25,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_ALC5623 if I2C select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC select SND_SOC_CS42L51 if I2C + select SND_SOC_CS42L52 if I2C select SND_SOC_CS4270 if I2C select SND_SOC_CX20442 select SND_SOC_DA7210 if I2C @@ -144,6 +145,9 @@ config SND_SOC_CQ0093VC config SND_SOC_CS42L51 tristate +config SND_SOC_CS42L52 + tristate + # Cirrus Logic CS4270 Codec config SND_SOC_CS4270 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 303c738a82a..b0f39f81a60 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -11,6 +11,7 @@ snd-soc-ak4642-objs := ak4642.o snd-soc-ak4671-objs := ak4671.o snd-soc-cq93vc-objs := cq93vc.o snd-soc-cs42l51-objs := cs42l51.o +snd-soc-cs42l52-objs := cs42l52.o snd-soc-cs4270-objs := cs4270.o snd-soc-cx20442-objs := cx20442.o snd-soc-da7210-objs := da7210.o @@ -92,6 +93,7 @@ obj-$(CONFIG_SND_SOC_AK4642) += snd-soc-ak4642.o obj-$(CONFIG_SND_SOC_AK4671) += snd-soc-ak4671.o obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o +obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c new file mode 100644 index 00000000000..ec3a0f58792 --- /dev/null +++ b/sound/soc/codecs/cs42l52.c @@ -0,0 +1,1101 @@ +/* + * cs42l52.c -- CS42L52 ALSA SoC audio driver + * + * Copyright 2011 CirrusLogic, Inc. + * + * Author: Brian Austin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cs42l52.h" + +struct sp_config { + u8 spc, format, spfs; + u32 srate; +}; + +struct cs42l52_private { + enum snd_soc_control_type control_type; + void *control_data; + u8 reg_cache[CS42L52_CACHEREGNUM]; + u32 sysclk; /* external MCLK */ + u8 mclksel; /* MCLKx */ + u32 mclk; /* internal MCLK */ + u8 flags; + struct sp_config config; +}; + +/* + * CS42L52 register default value + */ + +static const u8 cs42l52_reg[] = { + 0x00, 0xE0, 0x01, 0x07, 0x05, /*4*/ + 0xa0, 0x00, 0x00, 0x81, /*8*/ + 0x81, 0xa5, 0x00, 0x00, /*12*/ + 0x60, 0x02, 0x00, 0x00, /*16*/ + 0x00, 0x00, 0x00, 0x00, /*20*/ + 0x00, 0x00, 0x00, 0x80, /*24*/ + 0x80, 0x00, 0x00, 0x00, /*28*/ + 0x00, 0x00, 0x88, 0x00, /*32*/ + 0x00, 0x00, 0x00, 0x00, /*36*/ + 0x00, 0x00, 0x00, 0x7f, /*40*/ + 0xc0, 0x00, 0x3f, 0x00, /*44*/ + 0x00, 0x00, 0x00, 0x00, /*48*/ + 0x00, 0x3b, 0x00, 0x5f, /*52*/ +}; + +static inline int cs42l52_read_reg_cache(struct snd_soc_codec *codec, + u_int reg) +{ + u8 *cache = codec->reg_cache; + + return reg > CS42L52_CACHEREGNUM ? -EINVAL : cache[reg]; +} + +static inline void cs42l52_write_reg_cache(struct snd_soc_codec *codec, + u_int reg, u_int val) +{ + u8 *cache = codec->reg_cache; + + if(reg > CS42L52_CACHEREGNUM) + return; + cache[reg] = val & 0xff; +} + +static inline int cs42l52_get_revison(struct snd_soc_codec *codec) +{ + u8 data; + u8 addr; + int ret; + + //struct cs42l52_private *info = snd_soc_codec_get_drvdata(codec); + + + if(codec->hw_write(codec->control_data, &addr, 1) == 1) + { + if(codec->hw_read(codec->control_data, 1) == 1) + { + if((data & CHIP_ID_MASK) != CHIP_ID ) + { + ret = -ENODEV; + } + } + else + ret = -EIO; + } + else + ret = -EIO; + + return ret < 0 ? ret : data; +} + +/** + * snd_soc_get_volsw - single mixer get callback + * @kcontrol: mixer control + * @uinfo: control element information + * + * Callback to get the value of a single mixer control. + * + * Returns 0 for success. + */ +int cs42l52_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + + unsigned int reg = mc->reg; + unsigned int shift = mc->shift; + unsigned int rshift = mc->rshift; + int max = mc->max; + int min = mc->min; + int mmax = (max > min) ? max:min; + unsigned int mask = (1 << fls(mmax)) - 1; + + ucontrol->value.integer.value[0] = + ((snd_soc_read(codec, reg) >> shift) - min) & mask; + if (shift != rshift) + ucontrol->value.integer.value[1] = + ((snd_soc_read(codec, reg) >> rshift) - min) & mask; + + return 0; +} + +/** + * snd_soc_put_volsw - single mixer put callback + * @kcontrol: mixer control + * @uinfo: control element information + * + * Callback to set the value of a single mixer control. + * + * Returns 0 for success. + */ +int cs42l52_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + + unsigned int reg = mc->reg; + unsigned int shift = mc->shift; + unsigned int rshift = mc->rshift; + int max = mc->max; + int min = mc->min; + int mmax = (max > min) ? max:min; + unsigned int mask = (1 << fls(mmax)) - 1; + unsigned short val, val2, val_mask; + + val = ((ucontrol->value.integer.value[0] + min) & mask); + + val_mask = mask << shift; + val = val << shift; + if (shift != rshift) { + val2 = ((ucontrol->value.integer.value[1] + min) & mask); + val_mask |= mask << rshift; + val |= val2 << rshift; + } + return snd_soc_update_bits(codec, reg, val_mask, val); +} + +/** + * snd_soc_info_volsw_2r - double mixer info callback + * @kcontrol: mixer control + * @uinfo: control element information + * + * Callback to provide information about a double mixer control that + * spans 2 codec registers. + * + * Returns 0 for success. + */ +int cs42l52_info_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + + int max = mc->max; + + if (max == 1) + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + else + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + + uinfo->count = 2; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = max; + return 0; +} + +/** + * snd_soc_get_volsw_2r - double mixer get callback + * @kcontrol: mixer control + * @uinfo: control element information + * + * Callback to get the value of a double mixer control that spans 2 registers. + * + * Returns 0 for success. + */ +int cs42l52_get_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + + unsigned int reg = mc->reg; + unsigned int reg2 = mc->rreg; + int max = mc->max; + int min = mc->min; + int mmax = (max > min) ? max:min; + unsigned int mask = (1 << fls(mmax)) - 1; + int val, val2; + + val = snd_soc_read(codec, reg); + val2 = snd_soc_read(codec, reg2); + ucontrol->value.integer.value[0] = (val - min) & mask; + ucontrol->value.integer.value[1] = (val2 - min) & mask; + return 0; +} + +/** + * snd_soc_put_volsw_2r - double mixer set callback + * @kcontrol: mixer control + * @uinfo: control element information + * + * Callback to set the value of a double mixer control that spans 2 registers. + * + * Returns 0 for success. + */ +int cs42l52_put_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + + unsigned int reg = mc->reg; + unsigned int reg2 = mc->rreg; + int max = mc->max; + int min = mc->min; + int mmax = (max > min) ? max:min; + unsigned int mask = (1 << fls(mmax)) - 1; + int err; + unsigned short val, val2; + + val = (ucontrol->value.integer.value[0] + min) & mask; + val2 = (ucontrol->value.integer.value[1] + min) & mask; + + if ((err = snd_soc_update_bits(codec, reg, mask, val)) < 0) + return err; + + return snd_soc_update_bits(codec, reg2, mask, val2); +} + +#define SOC_SINGLE_S8_C_TLV(xname, xreg, xshift, xmax, xmin, tlv_array) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ + SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .info = snd_soc_info_volsw, .get = cs42l52_get_volsw,\ + .put = cs42l52_put_volsw, .tlv.p = (tlv_array),\ + .private_value = (unsigned long)&(struct soc_mixer_control) \ + {.reg = xreg, .shift = xshift, .rshift = xshift, \ + .max = xmax, .min = xmin} } + +#define SOC_DOUBLE_R_S8_C_TLV(xname, xreg, xrreg, xmax, xmin, tlv_array) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ + .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ + SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .info = cs42l52_info_volsw_2r, \ + .get = cs42l52_get_volsw_2r, .put = cs42l52_put_volsw_2r, \ + .tlv.p = (tlv_array), \ + .private_value = (unsigned long)&(struct soc_mixer_control) \ + {.reg = xreg, .rreg = xrreg, .max = xmax, .min = xmin} } + +/* Analog Input PGA Mux */ +static const char *cs42l52_pgaa_text[] = { "INPUT1A", "INPUT2A", "INPUT3A", "INPUT4A", "MICA" }; +static const char *cs42l52_pgab_text[] = { "INPUT1B", "INPUT2B", "INPUT3B", "INPUT4B", "MICB" }; + +static const struct soc_enum pgaa_enum = + SOC_ENUM_SINGLE(ADC_PGA_A, 0, + ARRAY_SIZE(cs42l52_pgaa_text), cs42l52_pgaa_text); + +static const struct soc_enum pgab_enum = + SOC_ENUM_SINGLE(ADC_PGA_B, 0, + ARRAY_SIZE (cs42l52_pgab_text), cs42l52_pgab_text); + +static const struct snd_kcontrol_new pgaa_mux = +SOC_DAPM_ENUM("Left Analog Input Capture Mux", pgaa_enum); + +static const struct snd_kcontrol_new pgab_mux = +SOC_DAPM_ENUM("Right Analog Input Capture Mux", pgab_enum); + +/* + HP,LO Analog Volume TLV + -76dB ... -50 dB in 2dB steps + -50dB ... 12dB in 1dB steps +*/ +static const unsigned int hpaloa_tlv[] = { + TLV_DB_RANGE_HEAD(2), + 0, 13, TLV_DB_SCALE_ITEM(-7600, 200, 0), + 14,75, TLV_DB_SCALE_ITEM(-4900, 100, 0), +}; + +/* -102dB ... 12 dB in 0.5 dB steps */ +static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0); + +/* -96dB ... 12 dB in 1 dB steps */ +static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0); + +/* -6dB ... 12 dB in 0.5 dB steps */ +static DECLARE_TLV_DB_SCALE(micpga_tlv, -600, 50, 0); + +/* + HL, ESL, SPK, Limiter Threshold/Cushion TLV + 0dB -12 dB in -3dB steps + -12dB -30dB in -6dB steps +*/ +static const unsigned int limiter_tlv[] = { + TLV_DB_RANGE_HEAD(2), + 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0), + 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0), +}; + +/* + * Stereo Mixer Input Attenuation (regs 35h-54h) TLV + * Mono Mixer Input Attenuation (regs 56h-5Dh) + + -62dB ... 0dB in 1dB steps, < -62dB = mute +*/ +static const DECLARE_TLV_DB_SCALE(attn_tlv, -6300, 100, 1); + +/* NG */ +static const char *cs42l52_ng_delay_text[] = + { "50ms", "100ms", "150ms", "200ms" }; + +static const struct soc_enum ng_delay_enum = + SOC_ENUM_SINGLE(NOISE_GATE_CTL, 0, + ARRAY_SIZE (cs42l52_ng_delay_text), cs42l52_ng_delay_text); + +static const char *cs42l52_ng_type_text[] = + {"Apply Specific", "Apply All"}; + +static const struct soc_enum ng_type_enum = + SOC_ENUM_SINGLE(NOISE_GATE_CTL, 6, + ARRAY_SIZE (cs42l52_ng_type_text), cs42l52_ng_type_text); + + +static const struct snd_kcontrol_new cs42l52_snd_controls[] = { + +SOC_DOUBLE_R_S8_C_TLV("Master Playback Volume", MASTERA_VOL, + MASTERB_VOL, 0xe4, 0x34, hl_tlv), + +/* Headphone */ +SOC_DOUBLE_R_S8_C_TLV("HP Digital Playback Volume", HPA_VOL, + HPB_VOL, 0xff, 0x1, hl_tlv), + +SOC_SINGLE_S8_C_TLV("HP Analog Playback Volume", + PB_CTL1, 5, 7, 0, hpaloa_tlv), + +SOC_SINGLE_S8_C_TLV("HP Digital Playback Switch", + PB_CTL2, 6, 7, 1, NULL), + +/* Speaker */ +SOC_DOUBLE_R_S8_C_TLV("Speaker Playback Volume", SPKA_VOL, + SPKB_VOL, 0xff, 0x1, hl_tlv), +SOC_SINGLE_S8_C_TLV("Speaker Playback Switch", + PB_CTL2, 4, 5, 1, NULL), + +/* Passthrough */ +SOC_DOUBLE_R_S8_C_TLV("Passthru Playback Volume", PASSTHRUA_VOL, + PASSTHRUB_VOL, 0x90, 0x88, hl_tlv), +SOC_SINGLE("Passthru Playback Switch", MISC_CTL, 4, 5, 1), + +/* Mic LineIN */ +SOC_DOUBLE_R_S8_C_TLV("Mic Gain Capture Volume", MICA_CTL, + MICB_CTL, 0, 31, micpga_tlv), + +/* ADC */ +SOC_DOUBLE_R_S8_C_TLV("ADC Capture Volume", ADCA_VOL, + ADCB_VOL, 0x80, 0xA0, ipd_tlv), +SOC_DOUBLE_R_S8_C_TLV("ADC Mixer Capture Volume", + ADCA_MIXER_VOL, ADCB_MIXER_VOL, 0x7f, 0x19, ipd_tlv), + +SOC_DOUBLE("ADC Switch", ADC_MISC_CTL, 0, 1, 1, 1), + +SOC_DOUBLE_R("ADC Mixer Switch", + ADCA_MIXER_VOL, ADCB_MIXER_VOL, 7, 1, 1), + +SOC_DOUBLE_R_S8_C_TLV("PGA Volume", PGAA_CTL, PGAB_CTL, 0x30, 0x18, micpga_tlv), + + +SOC_DOUBLE_R("PCM Mixer Playback Switch", + PCMA_MIXER_VOL, PCMB_MIXER_VOL, 7, 1, 1), + + + +SOC_DOUBLE_R_S8_C_TLV("PCM Mixer Playback Volume", + PCMA_MIXER_VOL, PCMB_MIXER_VOL, 0x7f, 0x19, hl_tlv), + +SOC_SINGLE_S8_C_TLV("Beep Volume", BEEP_VOL, 0, 0x1f, 0x07, hl_tlv), + +SOC_SINGLE_S8_C_TLV("Treble Gain Playback Volume", + TONE_CTL, 4, 15, 1, hl_tlv), +SOC_SINGLE_S8_C_TLV("Bass Gain Playback Volume", + TONE_CTL, 0, 15, 1, hl_tlv), + + + + + +/* Limiter */ +SOC_SINGLE_TLV("Limiter Max Threshold Volume", + LIMITER_CTL1, 5, 7, 0, limiter_tlv), +SOC_SINGLE_TLV("Limiter Cushion Threshold Volume", + LIMITER_CTL1, 2, 7, 0, limiter_tlv), +SOC_SINGLE_TLV("Limiter Release Rate Volume", + LIMITER_CTL2, 0, 63, 0, limiter_tlv), +SOC_SINGLE_TLV("Limiter Attack Rate Volume", + LIMITER_AT_RATE, 0, 63, 0, limiter_tlv), + +SOC_SINGLE("Limiter SR Switch", + LIMITER_CTL1, 1, 1, 0), +SOC_SINGLE("Limiter ZC Switch", + LIMITER_CTL1, 0, 1, 0), +SOC_SINGLE("Limiter Switch", + LIMITER_CTL2, 7, 1, 0), + +/* ALC */ +SOC_SINGLE_TLV("ALC Attack Rate Volume", + ALC_CTL, 0, 63, 0, limiter_tlv), +SOC_SINGLE_TLV("ALC Release Rate Volume", + ALC_RATE, 0, 63, 0, limiter_tlv), +SOC_SINGLE_TLV("ALC Max Threshold Volume", + ALC_THRESHOLD, 5, 7, 0, limiter_tlv), +SOC_SINGLE_TLV("ALC Min Threshold Volume", + ALC_THRESHOLD, 2, 7, 0, limiter_tlv), + +SOC_DOUBLE_R("ALC SR Capture Switch", PGAA_CTL, + PGAB_CTL, 7, 1, 1), /*20*/ +SOC_DOUBLE_R("ALC ZC Capture Switch", PGAA_CTL, + PGAB_CTL, 6, 1, 1), +SOC_DOUBLE("ALC Capture Switch",ALC_CTL, + 6, 7, 1, 0), + +/* Noise gate */ +SOC_ENUM("NG Type Switch", ng_type_enum), +SOC_SINGLE("NG Enable Switch", NOISE_GATE_CTL, 6, 1, 0), +SOC_SINGLE("NG Boost Switch", NOISE_GATE_CTL, 5, 1, 1), +SOC_SINGLE("NG Threshold", NOISE_GATE_CTL, 2, 7, 0), +SOC_ENUM("NG Delay", ng_delay_enum), + + +SOC_DOUBLE("HPF Switch", ANALOG_HPF_CTL, 5, 7, 1, 0), + +SOC_DOUBLE("Analog SR Switch", ANALOG_HPF_CTL, 1, 3, 1, 1), +SOC_DOUBLE("Analog ZC Switch", ANALOG_HPF_CTL, 0, 2, 1, 1), + +SOC_SINGLE("Batt Compensation Switch", BATT_COMPEN, 7, 1, 0), +SOC_SINGLE("Batt VP Monitor Switch", BATT_COMPEN, 6, 1, 0), +SOC_SINGLE("Batt VP ref", BATT_COMPEN, 0, 0x0f, 0), +SOC_SINGLE("Playback Charge Pump Freq", CHARGE_PUMP, 4, 15, 0), + +}; + +static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { + + SND_SOC_DAPM_INPUT("INPUT1A"), + SND_SOC_DAPM_INPUT("INPUT2A"), + SND_SOC_DAPM_INPUT("INPUT3A"), + SND_SOC_DAPM_INPUT("INPUT4A"), + SND_SOC_DAPM_INPUT("INPUT1B"), + SND_SOC_DAPM_INPUT("INPUT2B"), + SND_SOC_DAPM_INPUT("INPUT3B"), + SND_SOC_DAPM_INPUT("INPUT4B"), + SND_SOC_DAPM_INPUT("MICA"), + SND_SOC_DAPM_INPUT("MICB"), + + /* Input path */ + SND_SOC_DAPM_ADC("ADC Left", "Capture", PWRCTL1, 1, 1), + SND_SOC_DAPM_ADC("ADC Right", "Capture", PWRCTL1, 2, 1), + /* PGA Power */ + SND_SOC_DAPM_PGA("PGA Left", PWRCTL1, 3, 1, NULL, 0), + SND_SOC_DAPM_PGA("PGA Right", PWRCTL1, 4, 1, NULL, 0), + + + /* MIC PGA Power */ + SND_SOC_DAPM_PGA("PGA MICA", PWRCTL2, 1, 1, NULL, 0), + SND_SOC_DAPM_PGA("PGA MICB", PWRCTL2, 2, 1, NULL, 0), + /* MIC bias */ + SND_SOC_DAPM_MICBIAS("Mic-Bias", PWRCTL2, 0, 1), + + SND_SOC_DAPM_DAC("DAC Left", "Playback", SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC Right", "Playback", SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_PGA("HP Amp Left", PWRCTL3, 4, 1, NULL, 0), + SND_SOC_DAPM_PGA("HP Amp Right", PWRCTL3, 6, 1, NULL, 0), + + SND_SOC_DAPM_PGA("SPK Pwr Left", PWRCTL3, 0, 1, NULL, 0), + SND_SOC_DAPM_PGA("SPK Pwr Right", PWRCTL3, 2, 1, NULL, 0), + + SND_SOC_DAPM_OUTPUT("HPA"), + SND_SOC_DAPM_OUTPUT("HPB"), + SND_SOC_DAPM_OUTPUT("SPKA"), + SND_SOC_DAPM_OUTPUT("SPKB"), + +}; + +static const struct snd_soc_dapm_route cs42l52_audio_map[] = { + + /* adc select path */ + {"ADC Left", "AIN1", "INPUT1A"}, + {"ADC Right", "AIN1", "INPUT1B"}, + {"ADC Left", "AIN2", "INPUT2A"}, + {"ADC Right", "AIN2", "INPUT2B"}, + {"ADC Left", "AIN3", "INPUT3A"}, + {"ADC Right", "AIN3", "INPUT3B"}, + {"ADC Left", "AIN4", "INPUT4A"}, + {"ADC Right", "AIN4", "INPUT4B"}, + + /* left capture part */ + {"AIN1A Switch", NULL, "INPUT1A"}, + {"AIN2A Switch", NULL, "INPUT2A"}, + {"AIN3A Switch", NULL, "INPUT3A"}, + {"AIN4A Switch", NULL, "INPUT4A"}, + {"MICA Switch", NULL, "MICA"}, + {"PGA MICA", NULL, "MICA Switch"}, + + {"PGA Left", NULL, "AIN1A Switch"}, + {"PGA Left", NULL, "AIN2A Switch"}, + {"PGA Left", NULL, "AIN3A Switch"}, + {"PGA Left", NULL, "AIN4A Switch"}, + {"PGA Left", NULL, "PGA MICA"}, + + /* right capture part */ + {"AIN1B Switch", NULL, "INPUT1B"}, + {"AIN2B Switch", NULL, "INPUT2B"}, + {"AIN3B Switch", NULL, "INPUT3B"}, + {"AIN4B Switch", NULL, "INPUT4B"}, + {"MICB Switch", NULL, "MICB"}, + {"PGA MICB", NULL, "MICB Switch"}, + + {"PGA Right", NULL, "AIN1B Switch"}, + {"PGA Right", NULL, "AIN2B Switch"}, + {"PGA Right", NULL, "AIN3B Switch"}, + {"PGA Right", NULL, "AIN4B Switch"}, + {"PGA Right", NULL, "PGA MICB"}, + + {"ADC Mux Left", "PGA", "PGA Left"}, + {"ADC Mux Right", "PGA", "PGA Right"}, + {"ADC Left", NULL, "ADC Mux Left"}, + {"ADC Right", NULL, "ADC Mux Right"}, + +/* Output map */ + /* Headphone */ + {"HP Amp Left", NULL, "Passthrough Left"}, + {"HP Amp Right", NULL, "Passthrough Right"}, + {"HPA", NULL, "HP Amp Left"}, + {"HPB", NULL, "HP Amp Right"}, + + /* Speakers */ + + {"SPK Pwr Left", NULL, "DAC Left"}, + {"SPK Pwr Right", NULL, "DAC Right"}, + {"SPKA", NULL, "SPK Pwr Left"}, + {"SPKB", NULL, "SPK Pwr Right"}, + +}; + +static int cs42l52_add_widgets(struct snd_soc_codec *codec) +{ + struct snd_soc_dapm_context *dapm = &codec->dapm; + + snd_soc_dapm_new_controls(dapm, cs42l52_dapm_widgets, + ARRAY_SIZE(cs42l52_dapm_widgets)); + + snd_soc_dapm_add_routes(dapm,cs42l52_audio_map, + ARRAY_SIZE(cs42l52_audio_map)); + + return 0; +} + +#define SOC_CS42L52_RATES ( SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_96000 ) /*refer to cs42l52 datasheet page35*/ + +#define SOC_CS42L52_FORMATS ( SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ + SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_U18_3LE | \ + SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE ) + + +struct cs42l52_clk_para { + u32 mclk; + u32 rate; + u8 speed; + u8 group; + u8 videoclk; + u8 ratio; + u8 mclkdiv2; +}; + +static const struct cs42l52_clk_para clk_map_table[] = { + /*8k*/ + {12288000, 8000, CLK_CTL_S_QS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {18432000, 8000, CLK_CTL_S_QS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {12000000, 8000, CLK_CTL_S_QS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 0}, + {24000000, 8000, CLK_CTL_S_QS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 1}, + {27000000, 8000, CLK_CTL_S_QS_MODE, CLK_CTL_32K_SR, CLK_CTL_27M_MCLK, CLK_CTL_RATIO_125, 0}, /*4*/ + + /*11.025k*/ + {11289600, 11025, CLK_CTL_S_QS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {16934400, 11025, CLK_CTL_S_QS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + + /*16k*/ + {12288000, 16000, CLK_CTL_S_HS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {18432000, 16000, CLK_CTL_S_HS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {12000000, 16000, CLK_CTL_S_HS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 0},/*9*/ + {24000000, 16000, CLK_CTL_S_HS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 1}, + {27000000, 16000, CLK_CTL_S_HS_MODE, CLK_CTL_32K_SR, CLK_CTL_27M_MCLK, CLK_CTL_RATIO_125, 1}, + + /*22.05k*/ + {11289600, 22050, CLK_CTL_S_HS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {16934400, 22050, CLK_CTL_S_HS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + + /* 32k */ + {12288000, 32000, CLK_CTL_S_SS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0},/*14*/ + {18432000, 32000, CLK_CTL_S_SS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {12000000, 32000, CLK_CTL_S_SS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 0}, + {24000000, 32000, CLK_CTL_S_SS_MODE, CLK_CTL_32K_SR, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 1}, + {27000000, 32000, CLK_CTL_S_SS_MODE, CLK_CTL_32K_SR, CLK_CTL_27M_MCLK, CLK_CTL_RATIO_125, 0}, + + /* 44.1k */ + {11289600, 44100, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0},/*19*/ + {16934400, 44100, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + + /* 48k */ + {12288000, 48000, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {18432000, 48000, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {12000000, 48000, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 0}, + {24000000, 48000, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 1},/*24*/ + {27000000, 48000, CLK_CTL_S_SS_MODE, CLK_CTL_NOT_32K, CLK_CTL_27M_MCLK, CLK_CTL_RATIO_125, 1}, + + /* 88.2k */ + {11289600, 88200, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {16934400, 88200, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + + /* 96k */ + {12288000, 96000, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0}, + {18432000, 96000, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_128, 0},/*29*/ + {12000000, 96000, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 0}, + {24000000, 96000, CLK_CTL_S_DS_MODE, CLK_CTL_NOT_32K, CLK_CTL_NOT_27M, CLK_CTL_RATIO_125, 1}, +}; + +static int cs42l52_get_clk(int mclk, int rate) +{ + + int i , ret = 0; + u_int mclk1, mclk2 = 0; + + for(i = 0; i < ARRAY_SIZE(clk_map_table); i++) + { + if(clk_map_table[i].rate == rate) + { + mclk1 = clk_map_table[i].mclk; + { + if(abs(mclk - mclk1) < abs(mclk - mclk2)) + { + mclk2 = mclk1; + ret = i; + } + } + } + } + + return ret < ARRAY_SIZE(clk_map_table) ? ret : -EINVAL; +} + + +static int cs42l52_set_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs42l52_private *info = snd_soc_codec_get_drvdata(codec); + + if((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) + { + info->sysclk = freq; + dev_info(codec->dev,"sysclk %d\n", info->sysclk); + } + else{ + dev_err(codec->dev,"invalid paramter\n"); + return -EINVAL; + } + return 0; +} + +static int cs42l52_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs42l52_private *priv = snd_soc_codec_get_drvdata(codec); + int ret = 0; + u8 iface = 0; + + dev_info(codec->dev,"Enter soc_cs42l52_set_fmt\n"); + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + + case SND_SOC_DAIFMT_CBM_CFM: + dev_info(codec->dev,"codec dai fmt master\n"); + iface = IFACE_CTL1_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + dev_info(codec->dev,"codec dai fmt slave\n"); + break; + default: + dev_err(codec->dev,"invaild formate\n"); + return -EINVAL; + } + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + + case SND_SOC_DAIFMT_I2S: + iface |= (IFACE_CTL1_ADC_FMT_I2S | IFACE_CTL1_DAC_FMT_I2S); + break; + case SND_SOC_DAIFMT_RIGHT_J: + iface |= IFACE_CTL1_DAC_FMT_RIGHT_J; + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= (IFACE_CTL1_ADC_FMT_LEFT_J | IFACE_CTL1_DAC_FMT_LEFT_J); + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= IFACE_CTL1_DSP_MODE_EN; + break; + case SND_SOC_DAIFMT_DSP_B: + dev_err(codec->dev,"unsupported format\n"); + return -EINVAL; + default: + dev_err(codec->dev,"invaild format\n"); + return -EINVAL; + } + + /* clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { /*tonyliu*/ + + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= IFACE_CTL1_INV_SCLK; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= IFACE_CTL1_INV_SCLK; + break; + case SND_SOC_DAIFMT_NB_IF: + break; + default: + dev_err(codec->dev,"unsupported format\n"); + ret = -EINVAL; + } + + priv->config.format = iface; + + return 0; + +} + +static int cs42l52_digital_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_codec *soc_codec = dai->codec; + u8 mute_val = snd_soc_read(soc_codec, PB_CTL1) & PB_CTL1_MUTE_MASK; + + if(mute) + { + snd_soc_write(soc_codec, PB_CTL1, mute_val | PB_CTL1_MSTB_MUTE | PB_CTL1_MSTA_MUTE); + } + else{ + snd_soc_write(soc_codec, PB_CTL1, mute_val ); + } + + return 0; +} + +#define CONFIG_MANUAL_CLK +static int cs42l52_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->codec; + struct cs42l52_private *priv = snd_soc_codec_get_drvdata(codec); + u32 clk = 0; + int index = cs42l52_get_clk(priv->sysclk, params_rate(params)); + + if(index >= 0) + { + priv->sysclk = clk_map_table[index].mclk; + clk |= (clk_map_table[index].speed << CLK_CTL_SPEED_SHIFT) | + (clk_map_table[index].group << CLK_CTL_32K_SR_SHIFT) | + (clk_map_table[index].videoclk << CLK_CTL_27M_MCLK_SHIFT) | + (clk_map_table[index].ratio << CLK_CTL_RATIO_SHIFT) | + clk_map_table[index].mclkdiv2; +#ifdef CONFIG_MANUAL_CLK + snd_soc_write(codec, CLK_CTL, clk); +#else + snd_soc_write(codec, CLK_CTL, 0xa0); +#endif + snd_soc_write(codec, IFACE_CTL1, priv->config.format ); + + } + else{ + dev_err(codec->dev,"can't find out right mclk\n"); + return -EINVAL; + } + + return 0; +} + +static int cs42l52_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + + u8 pwrctl1 = snd_soc_read(codec, PWRCTL1) & 0x9f; + u8 pwrctl2 = snd_soc_read(codec, PWRCTL2) & 0x07; + + switch (level) { + case SND_SOC_BIAS_ON: /* full On */ + break; + case SND_SOC_BIAS_PREPARE: /* partial On */ + pwrctl1 &= ~(PWRCTL1_PDN_CHRG | PWRCTL1_PDN_CODEC); + snd_soc_write(codec, PWRCTL1, pwrctl1); + break; + case SND_SOC_BIAS_STANDBY: /* Off, with power */ + pwrctl1 &= ~(PWRCTL1_PDN_CHRG | PWRCTL1_PDN_CODEC); + snd_soc_write(codec, PWRCTL1, pwrctl1); + break; + case SND_SOC_BIAS_OFF: /* Off, without power */ + snd_soc_write(codec, PWRCTL1, pwrctl1 | 0x9f); + snd_soc_write(codec, PWRCTL2, pwrctl2 | 0x07); + break; + } + codec->dapm.bias_level = level; + return 0; +} + +#define CS42L52_RATES ( SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_96000 ) /*refer to cs42l52 datasheet page35*/ + +#define CS42L52_FORMATS ( SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ + SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_U18_3LE | \ + SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE ) + +static struct snd_soc_dai_ops cs42l52_ops = { + .hw_params = cs42l52_pcm_hw_params, + .digital_mute = cs42l52_digital_mute, + .set_fmt = cs42l52_set_fmt, + .set_sysclk = cs42l52_set_sysclk, +}; + +struct snd_soc_dai_driver cs42l52_dai = { + .name = "cs42l52-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = CS42L52_RATES, + .formats = CS42L52_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS42L52_RATES, + .formats = CS42L52_FORMATS, + }, + .ops = &cs42l52_ops, +}; + + +static int cs42l52_suspend(struct snd_soc_codec *codec, pm_message_t state) +{ + cs42l52_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static int cs42l52_resume(struct snd_soc_codec *codec) +{ + + int i;//, reg; + u8 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = PWRCTL1; i < ARRAY_SIZE(cs42l52_reg); i++) { + snd_soc_write(codec, i, cache[i]); + } + + cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + + return 0; + +} + +/* page 37 from cs42l52 datasheet */ +static void cs42l52_required_setup(struct snd_soc_codec *codec) +{ + u8 data; + snd_soc_write(codec, 0x00, 0x99); + snd_soc_write(codec, 0x3e, 0xba); + snd_soc_write(codec, 0x47, 0x80); + data = snd_soc_read(codec, 0x32); + snd_soc_write(codec, 0x32, data | 0x80); + snd_soc_write(codec, 0x32, data & 0x7f); + snd_soc_write(codec, 0x00, 0x00); +} + + +static int cs42l52_probe(struct snd_soc_codec *codec) +{ + + struct cs42l52_private *info = snd_soc_codec_get_drvdata(codec); + //int i, ret = 0; + + info->sysclk = CS42L52_DEFAULT_CLK; + info->config.format = CS42L52_DEFAULT_FORMAT; + + cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + + cs42l52_required_setup(codec); + + info->flags |= CS42L52_CHIP_SWICTH; + /*initialize codec*/ +/* + for(i = 0; i < codec->num_dai; i++) + { + info->flags |= i; + + ret = cs42l52_get_revison(codec); + if(ret < 0) + { + dev_err(codec->dev,"get chip id failed\n"); + return 0; + } + + dev_info(codec->dev,"Cirrus CS42L52 codec , revision %d\n", ret & CHIP_REV_MASK); + + + } +*/ + info->flags |= 0; + + info->flags &= ~(CS42L52_CHIP_SWICTH); + info->flags |= CS42L52_ALL_IN_ONE; + + /*init done*/ + snd_soc_add_controls(codec, cs42l52_snd_controls, + ARRAY_SIZE(cs42l52_snd_controls)); + + cs42l52_add_widgets(codec); + + return 0; +} + +/* power down chip */ +static int cs42l52_remove(struct snd_soc_codec *codec) +{ + cs42l52_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + + +struct i2c_client *cs_control; + +static inline unsigned int cs42l52_read(struct snd_soc_codec *codec, unsigned int reg){ + return i2c_smbus_read_byte_data(cs_control, reg); +} +static inline int cs42l52_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int val){ + i2c_smbus_write_byte_data(cs_control, reg, val); + return 0; +} + +struct snd_soc_codec_driver soc_codec_dev_cs42l52 = { + .probe = cs42l52_probe, + .remove = cs42l52_remove, + .suspend = cs42l52_suspend, + .resume = cs42l52_resume, + .set_bias_level = cs42l52_set_bias_level, + .reg_cache_size = CS42L52_CACHEREGNUM, + .reg_cache_default = cs42l52_reg, + .read = cs42l52_read, + .write = cs42l52_write, +}; + +static int cs42l52_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + + struct cs42l52_private *cs42l52; + int ret; + +/* DEBUG + ret = i2c_smbus_read_byte_data(i2c_client, CS42L52_CHIP); + printk(KERN_ERR "We have %x from CS42L52_CHIP \n", ret); +*/ + cs42l52 = kzalloc(sizeof(struct cs42l52_private), GFP_KERNEL); + if (!cs42l52) { + dev_err(&i2c_client->dev, "could not allocate codec\n"); + return -ENOMEM; + } + + i2c_set_clientdata(i2c_client, cs42l52); + cs42l52->control_data = i2c_client; + cs42l52->control_type = SND_SOC_I2C; + + cs_control = i2c_client; + + ret = snd_soc_register_codec(&i2c_client->dev, + &soc_codec_dev_cs42l52, &cs42l52_dai, 1); + if (ret < 0){ + kfree(cs42l52); + } + return ret; +} + +static int cs42l52_i2c_remove(struct i2c_client *client) +{ + struct cs42l52_private *cs42l52 = i2c_get_clientdata(client); + snd_soc_unregister_codec(&client->dev); + kfree(cs42l52); + + return 0; +} + +static const struct i2c_device_id cs42l52_id[] = { + { "cs42l52", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cs42l52_id); + +static struct i2c_driver cs42l52_i2c_driver = { + .driver = { + .name = "cs42l52-codec", + .owner = THIS_MODULE, + }, + .probe = cs42l52_i2c_probe, + .remove = __devexit_p(cs42l52_i2c_remove), + .id_table = cs42l52_id, + +}; + +static int __init cs42l52_modinit(void) +{ + int ret; + ret = i2c_add_driver(&cs42l52_i2c_driver); + if (ret != 0) { + printk(KERN_ERR "%s: can't add i2c driver\n", __func__); + return ret; + } + return 0; +} + +module_init(cs42l52_modinit); + +static void __exit cs42l52_exit(void) +{ + i2c_del_driver(&cs42l52_i2c_driver); +} + +module_exit(cs42l52_exit); + +MODULE_DESCRIPTION("ASoC CS42L52 driver"); +MODULE_AUTHOR("Georgi Vlaev, Nucleus Systems Ltd, "); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs42l52.h b/sound/soc/codecs/cs42l52.h new file mode 100644 index 00000000000..bbe42ac1941 --- /dev/null +++ b/sound/soc/codecs/cs42l52.h @@ -0,0 +1,297 @@ +/* + * cs42l52.h -- CS42L52 ALSA SoC audio driver + * + * Copyright 2010 CirrusLogic, Inc. + * + * Author: Brian Austin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * Revision history + * Nov 2007 Initial version. + * Feb 2010 Update to latest asoc git tree + */ + +#ifndef __CS42L52_H__ +#define __CS42L52_H__ + +#include +#include + + +#define CS42L52_NAME "CS42L52" +#define CS42L52_DEFAULT_CLK 12000000 +#define CS42L52_MIN_CLK 11000000 +#define CS42L52_MAX_CLK 27000000 +#define CS42L52_DEFAULT_FORMAT SNDRV_PCM_FMTBIT_S16_LE +#define CS42L52_DEFAULT_MAX_CHANS 2 +#define CS42L52_SYSCLK 0x01 + +#define CS42L52_CHIP_SWICTH (1 << 17) +#define CS42L52_ALL_IN_ONE (1 << 16) +#define CS42L52_CHIP_ONE 0x00 +#define CS42L52_CHIP_TWO 0x01 +#define CS42L52_CHIP_THR 0x02 +#define CS42L52_CHIP_MASK 0x0f + +/* + *CS42L52 internal registers + */ +#define CS42L52_CHIP 0x01 +#define CHIP_ID 0xE0 +#define CHIP_ID_MASK 0xF8 +#define CHIP_REV_A0 0x00 +#define CHIP_REV_A1 0x01 +#define CHIP_REV_B0 0x02 +#define CHIP_REV_MASK 0x03 + +#define PWRCTL1 0x02 //0x01 +#define PWRCTL1_PDN_CHRG (1 << 7) +#define PWRCTL1_PDN_PGAB (1 << 4) +#define PWRCTL1_PDN_PGAB_SHIFT 4 +#define PWRCTL1_PDN_PGAA (1 << 3) +#define PWRCTL1_PDN_PGAA_SHIFT 3 +#define PWRCTL1_PDN_ADCB (1 << 2) +#define PWRCTL1_PDN_ADCB_SHIFT 2 +#define PWRCTL1_PDN_ADCA (1 << 1) +#define PWRCTL1_PDN_ADCA_SHIFT 1 +#define PWRCTL1_PDN_CODEC (1 << 0) + +#define PWRCTL2 0x03 //0x07 +#define PWRCTL2_OVRDB (1 << 4) +#define PWRCTL2_OVRDA (1 << 3) +#define PWRCTL2_PDN_MICB (1 << 2) +#define PWRCTL2_PDN_MICB_SHIFT 2 +#define PWRCTL2_PDN_MICA (1 << 1) +#define PWRCTL2_PDN_MICA_SHIFT 1 +#define PWRCTL2_PDN_MICBIAS (1 << 0) +#define PWRCTL2_PDN_MICBIAS_SHIFT 0 + +#define PWRCTL3 0x04 //0x08 +#define PWRCTL3_HPB_PDN_SHIFT 6 +#define PWRCTL3_HPB_ON_LOW 0x00 +#define PWRCTL3_HPB_ON_HIGH 0x01 +#define PWRCTL3_HPB_ALWAYS_ON 0x02 +#define PWRCTL3_HPB_ALWAYS_OFF 0x03 +#define PWRCTL3_HPA_PDN_SHIFT 4 +#define PWRCTL3_HPA_ON_LOW 0x00 +#define PWRCTL3_HPA_ON_HIGH 0x01 +#define PWRCTL3_HPA_ALWAYS_ON 0x02 +#define PWRCTL3_HPA_ALWAYS_OFF 0x03 +#define PWRCTL3_SPKB_PDN_SHIFT 2 +#define PWRCTL3_SPKB_ON_LOW 0x00 +#define PWRCTL3_SPKB_ON_HIGH 0x01 +#define PWRCTL3_SPKB_ALWAYS_ON 0x02 +#define PWRCTL3_SPKB_ALWAYS_OFF 0x03 +#define PWRCTL3_SPKA_PDN_SHIFT 0 +#define PWRCTL3_SPKA_ON_LOW 0x00 +#define PWRCTL3_SPKA_ON_HIGH 0x01 +#define PWRCTL3_SPKA_ALWAYS_ON 0x02 +#define PWRCTL3_SPKA_ALWAYS_OFF 0x03 +#define DEFAULT_OUTPUT_STATE 0x05 +#define PWRCTL3_CONF_MASK 0x03 + + + +#define CLK_CTL 0x05 //0xa0 +#define CLK_CTL_AUTODECT_ENABLE (1 << 7) +#define CLK_CTL_SPEED_SHIFT 5 +#define CLK_CTL_S_DS_MODE 0x00 +#define CLK_CTL_S_SS_MODE 0x01 +#define CLK_CTL_S_HS_MODE 0x02 +#define CLK_CTL_S_QS_MODE 0x03 +#define CLK_CTL_32K_SR_SHIFT 4 +#define CLK_CTL_32K_SR 1 +#define CLK_CTL_NOT_32K 0 +#define CLK_CTL_27M_MCLK_SHIFT 3 +#define CLK_CTL_27M_MCLK 1 +#define CLK_CTL_NOT_27M 0 +#define CLK_CTL_RATIO_SHIFT 1 +#define CLK_CTL_RATIO_128 0x00 +#define CLK_CTL_RATIO_125 0x01 +#define CLK_CTL_RATIO_132 0x02 +#define CLK_CTL_RATIO_136 0x03 +#define CLK_CTL_MCLKDIV2 1 +#define CLK_CTL_NOT_MCLKDIV2 0 + + +#define IFACE_CTL1 0x06 //0 +#define IFACE_CTL1_MASTER (1 << 7) +#define IFACE_CTL1_INV_SCLK (1 << 6) +#define IFACE_CTL1_ADC_FMT_I2S (1 << 5) +#define IFACE_CTL1_ADC_FMT_LEFT_J (0 << 5) +#define IFACE_CTL1_DSP_MODE_EN (1 << 4) +#define IFACE_CTL1_DAC_FMT_LEFT_J (0 << 2) +#define IFACE_CTL1_DAC_FMT_I2S (1 << 2) +#define IFACE_CTL1_DAC_FMT_RIGHT_J (2 << 2) +#define IFACE_CTL1_WL_32BIT (0x00) +#define IFACE_CTL1_WL_24BIT (0x01) +#define IFACE_CTL1_WL_20BIT (0x02) +#define IFACE_CTL1_WL_16BIT (0x03) +#define IFACE_CTL1_WL_MASK 0xFFFF + + +#define IFACE_CTL2 0x07 //0 +#define IFACE_CTL2_SC_MC_EQ (1 << 6) +#define IFACE_CTL2_LOOPBACK (1 << 5) +#define IFACE_CTL2_S_MODE_OUTPUT_EN (0 << 4) +#define IFACE_CTL2_S_MODE_OUTPUT_HIZ (1 << 4) +#define IFACE_CTL2_HP_SW_INV (1 << 3) +#define IFACE_CTL2_MIC_BIAS_5X 0x00 +#define IFACE_CTL2_MIC_BIAS_6X 0x01 +#define IFACE_CTL2_MIC_BIAS_7X 0x02 +#define IFACE_CTL2_MIC_BIAS_8X 0x03 +#define IFACE_CTL2_MIC_BIAS_83X 0x04 +#define IFACE_CTL2_MIC_BIAS_91X 0x05 + +#define ADC_PGA_A 0x08 //0x81 +#define ADC_PGA_B 0x09 //0x81 +#define ADC_SEL_SHIFT 5 +#define PGA_SEL_SHIFT 0 +#define ADC_SEL_AIN1 0x00 +#define ADC_SEL_AIN2 0x01 +#define ADC_SEL_AIN3 0x02 +#define ADC_SEL_AIN4 0x03 +#define ADC_SEL_PGA 0x04 +#define PGA_SEL_NONE 0x00 +#define PGA_SEL_AIN1 0x01 +#define PGA_SEL_AIN2 0x02 +#define PGA_SEL_AIN3 0x04 +#define PGA_SEL_AIN4 0x08 +#define PGA_SEL_MIC 0x10 +#define PGA_SEL_MIC_AIN1 0x11 +#define PGA_SEL_MIC_AIN1_AIN2 0x13 + +#define ANALOG_HPF_CTL 0x0A //0xa5 +#define HPF_CTL_ANLGSFTB (1 << 3) +#define HPF_CTL_ANLGSFTA (1 << 0) + + +#define ADC_HPF_FREQ 0x0B //0 +#define ADC_MISC_CTL 0x0C //0 +#define ADC_MISC_CTL_SOURCE_DSP (1 << 6) + + +#define PB_CTL1 0x0D //0x60 +#define PB_CTL1_HP_GAIN_SHIFT 5 +#define PB_CTL1_HP_GAIN_03959 0x00 +#define PB_CTL1_HP_GAIN_04571 0x01 +#define PB_CTL1_HP_GAIN_05111 0x02 +#define PB_CTL1_HP_GAIN_06047 0x03 +#define PB_CTL1_HP_GAIN_07099 0x04 +#define PB_CTL1_HP_GAIN_08399 0x05 +#define PB_CTL1_HP_GAIN_10000 0x06 +#define PB_CTL1_HP_GAIN_11430 0x07 +#define PB_CTL1_INV_PCMB (1 << 3) +#define PB_CTL1_INV_PCMA (1 << 2) +#define PB_CTL1_MSTB_MUTE (1 << 1) +#define PB_CTL1_MSTA_MUTE (1 << 0) +#define PB_CTL1_MUTE_MASK 0xFFFC//0xFFFD + +#define MISC_CTL 0x0E //0x02 +#define MISC_CTL_DEEMPH (1 << 2) +#define MISC_CTL_DIGSFT (1 << 1) +#define MISC_CTL_DIGZC (1 << 0) + + +#define PB_CTL2 0x0F //0 +#define PB_CTL2_HPB_MUTE (1 << 7) +#define PB_CTL2_HPA_MUTE (1 << 6) +#define PB_CTL2_SPKB_MUTE (1 << 5) +#define PB_CTL2_SPKA_MUTE (1 << 4) +#define PB_CTL2_SPK_SWAP (1 << 2) +#define PB_CTL2_SPK_MONO (1 << 1) +#define PB_CTL2_SPK_MUTE50 (1 << 0) + +#define MICA_CTL 0x10 //0 +#define MICB_CTL 0x11 //0 +#define MIC_CTL_SEL_MIC1 (0 << 6) +#define MIC_CTL_SEL_MIC2 (1 << 6) +#define MIC_CTL_SEL_DIFF (1 << 5) + +#define PGAA_CTL 0x12 //0 +#define PGAB_CTL 0x13 //0 +#define PGAX_CTL_VOL_12DB 24 +#define PGAX_CTL_VOL_6DB 12 /*step size 0.5db*/ + +#define PASSTHRUA_VOL 0x14 //0 +#define PASSTHRUB_VOL 0x15 //0 + +#define ADCA_VOL 0x16 //0 +#define ADCB_VOL 0x17 //0 +#define ADCX_VOL_24DB 24 /*step size 1db*/ +#define ADCX_VOL_12DB 12 +#define ADCX_VOL_6DB 6 + +#define ADCA_MIXER_VOL 0x18 // 0x80 +#define ADCB_MIXER_VOL 0x19 //0x80 +#define ADC_MIXER_VOL_12DB 0x18 + +#define PCMA_MIXER_VOL 0x1A //0 +#define PCMB_MIXER_VOL 0x1B //0 + +#define BEEP_FREQ 0x1C //0 +#define BEEP_VOL 0x1D //0 +#define BEEP_VOL_12DB 0x06 + + +#define BEEP_TONE_CTL 0x1E //0 + +#define TONE_CTL 0x1F //0x88 + +#define MASTERA_VOL 0x20 //0 +#define MASTERB_VOL 0x21 //0 + +#define HPA_VOL 0x22 //0 +#define HPB_VOL 0x23 //0 +#define DEFAULT_HP_VOL 0xF0 + +#define SPKA_VOL 0x24 //0 +#define SPKB_VOL 0x25 //0 +#define DEFAULT_SPK_VOL 0xF0 + +#define ADC_PCM_MIXER 0x26 //0 + +#define LIMITER_CTL1 0x27 //0 +#define LIMITER_CTL2 0x28 //0x7f +#define LIMITER_AT_RATE 0x29 //0xc0 + +#define ALC_CTL 0x2A //0 +#define ALC_CTL_ALCB_ENABLE (1 << 7) +#define ALC_CTL_ALCA_ENABLE (1 << 6) +#define ALC_CTL_FASTEST_ATTACK 0 + +#define ALC_RATE 0x2B //0x3f +#define ALC_SLOWEST_RELEASE 0x3F + +#define ALC_THRESHOLD 0x2C //0 +#define ALC_MAX_RATE_SHIFT 5 +#define ALC_MIN_RATE_SHIFT 2 +#define ALC_RATE_0DB 0 +#define ALC_RATE_3DB 1 +#define ALC_RATE_6DB 2 + +#define NOISE_GATE_CTL 0x2D //0 +#define NG_ENABLE (1 << 6) +#define NG_THRESHOLD_SHIFT 2 +#define NG_MIN_70DB 2 +#define NG_DELAY_SHIFT 0 +#define NG_DELAY_100MS 1 + +#define CLK_STATUS 0x2E //0 +#define BATT_COMPEN 0x2F //0 + +#define BATT_LEVEL 0x30 //0 +#define SPK_STATUS 0x31 //0 +#define SPK_STATUS_PIN_SHIFT 3 +#define SPK_STATUS_PIN_HIGH 1 + +#define TEM_CTL 0x32 //0x3b +#define THE_FOLDBACK 0x33 //0 +#define CHARGE_PUMP 0x34 //0x5f + + +#define CS42L52_CACHEREGNUM 56 + +#endif diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig index 36a8fb4894b..70eb7e9d123 100644 --- a/sound/soc/imx/Kconfig +++ b/sound/soc/imx/Kconfig @@ -52,6 +52,15 @@ config SND_SOC_IMX_SGTL5000 Say Y if you want to add support for SoC audio on an i.MX board with a sgtl5000 codec. +config SND_SOC_IMX_CS42L52 + tristate "SoC Audio support for i.MX efikasb with cs42l52" + depends on MACH_MX53_EFIKASB + select SND_SOC_CS42L52 + select SND_MXC_SOC_MX2 + help + Say Y if you want to add support for SoC audio on an efikasb board with + a cs42l52 codec + config SND_SOC_EUKREA_TLV320 tristate "Eukrea TLV320" depends on MACH_EUKREA_MBIMX27_BASEBOARD \ diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile index aa0097dcc9d..516d958e961 100644 --- a/sound/soc/imx/Makefile +++ b/sound/soc/imx/Makefile @@ -14,10 +14,13 @@ snd-soc-eukrea-tlv320-objs := eukrea-tlv320.o snd-soc-phycore-ac97-objs := phycore-ac97.o snd-soc-wm1133-ev1-objs := wm1133-ev1.o snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o +snd-soc-imx-cs42l52-objs := imx-cs42l52.o snd-soc-imx-spdif-objs := imx-spdif.o obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o +obj-$(CONFIG_SND_SOC_IMX_CS42L52) += snd-soc-imx-cs42l52.o obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o + diff --git a/sound/soc/imx/imx-cs42l52.c b/sound/soc/imx/imx-cs42l52.c new file mode 100644 index 00000000000..19c09fb9dfd --- /dev/null +++ b/sound/soc/imx/imx-cs42l52.c @@ -0,0 +1,224 @@ +/* + * imx-cs42l52.c -- SoC audio for IMX / Cirrus platform + * + * Author: Johan Dams, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "imx-ssi.h" + +#include "../codecs/cs42l52.h" + + +static struct imx_cs42l52_priv { + int sysclk; + struct platform_device *pdev; +} card_priv; + +static int imx_efikasb_cs42l52_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int ret; + + unsigned int channels = params_channels(params); + + /* Set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, + SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM); + + if (ret < 0) { + printk(KERN_ERR "can't set codec DAI configuration\n"); + return ret; + } + + /* Set the codec system clock */ + ret = snd_soc_dai_set_sysclk(codec_dai, CS42L52_SYSCLK, + card_priv.sysclk, + SND_SOC_CLOCK_IN); + if (ret < 0) { + printk(KERN_ERR "can't set codec system clock\n"); + return ret; + } + + /* TODO: The SSI driver should figure this out for us */ + switch (channels) { + case 2: + snd_soc_dai_set_tdm_slot(cpu_dai, 0xfffffffc, 0xfffffffc, 2, 0); + break; + case 1: + snd_soc_dai_set_tdm_slot(cpu_dai, 0xfffffffe, 0xfffffffe, 1, 0); + break; + default: + return -EINVAL; + } + + /* Set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, + SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM); + if (ret < 0) { + printk(KERN_ERR "can't set cpu DAI configuration\n"); + return ret; + } + + return ret; +} + +/* EfikaSB I2S */ +static struct snd_soc_ops efikasbcs42l52_ops = { + .hw_params = imx_efikasb_cs42l52_hw_params, +}; + + +/* Digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link efikasb_cs42l52_dai = { + .name = "cs42l52", + .stream_name = "CS42L52", + .cpu_dai_name = "imx-ssi.1", + .platform_name = "imx-pcm-audio.1", + .codec_dai_name = "cs42l52-hifi", + .codec_name = "cs42l52-codec.0-004a", + .ops = &efikasbcs42l52_ops, +}; + +/* Audio machine driver */ +static struct snd_soc_card snd_soc_efikasb_cs42l52 = { + .name = "efikasb-cs42l52", + .dai_link = &efikasb_cs42l52_dai, + .num_links = 1, +}; + +/* Configure the AUDMUX */ +static int imx_audmux_config(int slave, int master) +{ + unsigned int ptcr, pdcr; + slave = slave - 1; + master = master - 1; + + ptcr = MXC_AUDMUX_V2_PTCR_SYN | + MXC_AUDMUX_V2_PTCR_TFSDIR | + MXC_AUDMUX_V2_PTCR_TFSEL(master) | + MXC_AUDMUX_V2_PTCR_TCLKDIR | + MXC_AUDMUX_V2_PTCR_TCSEL(master); + pdcr = MXC_AUDMUX_V2_PDCR_RXDSEL(master); + mxc_audmux_v2_configure_port(slave, ptcr, pdcr); + + ptcr = MXC_AUDMUX_V2_PTCR_SYN; + pdcr = MXC_AUDMUX_V2_PDCR_RXDSEL(slave); + mxc_audmux_v2_configure_port(master, ptcr, pdcr); + + return 0; +} + +static int __devinit imx_cs42l52_probe(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + + card_priv.pdev = pdev; + + imx_audmux_config(plat->src_port, plat->ext_port); + + card_priv.sysclk = plat->sysclk; + + + return 0; +} + +static int imx_cs42l52_remove(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver imx_cs42l52_audio_driver = { + .probe = imx_cs42l52_probe, + .remove = imx_cs42l52_remove, + .driver = { + .name = "imx-cs42l52", + }, +}; + +static struct platform_device *efikasb_cs42l52_snd_device; + +static int __init efikasb_cs42l52_soc_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_cs42l52_audio_driver); + if (ret) + return -ENOMEM; + efikasb_cs42l52_snd_device = platform_device_alloc("soc-audio", -1); + + if (!efikasb_cs42l52_snd_device) { + printk(KERN_ERR "Platform device allocation failed\n"); + return -ENOMEM; + } + + platform_set_drvdata(efikasb_cs42l52_snd_device, + &snd_soc_efikasb_cs42l52); + + ret = platform_device_add(efikasb_cs42l52_snd_device); + if (ret) + goto err1; + + return 0; + +err1: + pr_err("Unable to add platform device\n"); + platform_device_put(efikasb_cs42l52_snd_device); + + return ret; +} + +static void __exit efikasb_cs42l52_soc_exit(void) +{ + platform_device_unregister(efikasb_cs42l52_snd_device); +} + +module_init(efikasb_cs42l52_soc_init); +module_exit(efikasb_cs42l52_soc_exit); + + +MODULE_AUTHOR("Johan Dams "); +MODULE_DESCRIPTION("ALSA SoC IMX / Cirrus"); +MODULE_LICENSE("GPL");