[Bug][VMI] vcvt(si16 → f16) fails: sitofp requires 32-bit integer source

[sundyCoder]

[Bug][VMI] vcvt(si16 → f16) fails: sitofp requires 32-bit integer source

Summary

pto.vmi.vcvt from si16 → f16 fails VPTO emission / MLIR verify:

'pto.vmi.sitofp' op requires 32-bit integer source element type

CCE supports this cast natively (vcvt(f16, s16, …)). VMI/DSL cannot express the Ascend quant chain f32 → s16 → f16 → s8 1:1.

Environment

• Target: a5 / Ascend950
• Backend: vpto
• PTODSL JIT + ptoas VPTO emission
• Repro kernel: B2ToB1CastKernel (CCE: cce/B2ToB1CastKernel/b2_to_b1_cast_kernel.cpp)

CCE reference (works)

vcvt(regInt16, regFloatY, pFull, ROUND_Z, RS_DISABLE, PART_EVEN, MODE_ZEROING); // f32→s16
vcvt(regHalf, regInt16, pFull, ROUND_R, MODE_ZEROING);                          // s16→f16
vcvt(regS8, regHalf, pFull, ROUND_R, RS_DISABLE, PART_EVEN, MODE_ZEROING);      // f16→s8

Minimal VMI repro (fails)

s16 = pto.vmi.vcvt(add_f32, to_dtype=pto.si16, rounding="Z", saturate="NOSAT")
h16 = pto.vmi.vcvt(s16, to_dtype=pto.f16)  # FAIL

Emitted / verified op roughly:

%10 = pto.vmi.vcvt %9 {rounding = "Z", saturate = "NOSAT"}
  : !pto.vmi.vreg<64xf32> -> !pto.vmi.vreg<64xsi16>
%11 = pto.vmi.vcvt %10
  : !pto.vmi.vreg<64xsi16> -> !pto.vmi.vreg<64xf16>
; error: 'pto.vmi.sitofp' op requires 32-bit integer source element type

Expected

vcvt(si16 → f16) should lower (e.g. widen to i32 then sitofp, or a native s16→f16 path), matching CCE.

Actual

VPTO emission pipeline fails with:

error: 'pto.vmi.sitofp' op requires 32-bit integer source element type
Error: VPTO emission pipeline failed.

Related / also blocked

Attempting si16 → si32 → f16 then hits another issue: si32 → f16 gets saturate = "SAT", which is rejected (saturate only valid for fp-narrow / int-narrow).

Workarounds used in DSL today

Replace CCE f32→s16→f16→s8 with:

f32 → si32 (ROUND_Z) → f32 → f16 → si8 (ROUND_R, NOSAT)

This preserves trunc + f16→s8 numerically for the B2ToB1 cases, but is not a 1:1 instruction mapping.

Ask

1. Allow sitofp from si16 (auto-widen), or
2. Lower vcvt(si16→f16) to a legal MI sequence without requiring the programmer to insert si32/f32 hops.