Skip to content

Commit 8713bf5

Browse files
iveceraNipaLocal
authored andcommitted
dt-bindings: dpll: support acting as pin provider
Enable DPLL devices to act as pin providers for consumers (such as Ethernet controllers or PHYs). Add the '#dpll-pin-cells' property to the generic dpll-device.yaml schema and mark it as required. This allows DPLL nodes to define pin specifiers for their connected consumers. Introduce a new header '<dt-bindings/dpll/dpll.h>' to define pin direction macros (`DPLL_PIN_INPUT` and `DPLL_PIN_OUTPUT`). These macros are intended to be used in the DT pin specifiers (inside 'dpll-pins' properties of consumers) to describe the direction of the signal. Update the 'microchip,zl30731.yaml' examples to include the new '#dpll-pin-cells' property. The core schema definitions for these properties are being added to dt-schema in PR torvalds#183. Link: devicetree-org/dt-schema#183 Signed-off-by: Ivan Vecera <[email protected]> Signed-off-by: NipaLocal <nipa@local>
1 parent c98ef55 commit 8713bf5

File tree

4 files changed

+28
-0
lines changed

4 files changed

+28
-0
lines changed

Documentation/devicetree/bindings/dpll/dpll-device.yaml

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,13 @@ properties:
2727
"#size-cells":
2828
const: 0
2929

30+
"#dpll-pin-cells":
31+
const: 2
32+
description: |
33+
- Specified pin index
34+
- Specified pin direction. The macros are defined in
35+
dt-bindings/dpll/dpll.h
36+
3037
dpll-types:
3138
description: List of DPLL channel types, one per DPLL instance.
3239
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
@@ -73,4 +80,7 @@ properties:
7380
- "#address-cells"
7481
- "#size-cells"
7582

83+
required:
84+
- "#dpll-pin-cells"
85+
7686
additionalProperties: true

Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,8 @@ examples:
4444
#size-cells = <0>;
4545
4646
dpll@70 {
47+
#dpll-pin-cells = <2>;
48+
4749
compatible = "microchip,zl30732";
4850
reg = <0x70>;
4951
dpll-types = "pps", "eec";
@@ -80,6 +82,8 @@ examples:
8082
#size-cells = <0>;
8183
8284
dpll@70 {
85+
#dpll-pin-cells = <2>;
86+
8387
compatible = "microchip,zl30731";
8488
reg = <0x70>;
8589
spi-max-frequency = <12500000>;

MAINTAINERS

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7663,6 +7663,7 @@ F: Documentation/devicetree/bindings/dpll/dpll-device.yaml
76637663
F: Documentation/devicetree/bindings/dpll/dpll-pin.yaml
76647664
F: Documentation/driver-api/dpll.rst
76657665
F: drivers/dpll/
7666+
F: include/dt-bindings/dpll/dpll.h
76667667
F: include/linux/dpll.h
76677668
F: include/uapi/linux/dpll.h
76687669

include/dt-bindings/dpll/dpll.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
2+
/*
3+
* This header provides constants for DPLL bindings.
4+
*/
5+
6+
#ifndef _DT_BINDINGS_DPLL_DPLL_H
7+
#define _DT_BINDINGS_DPLL_DPLL_H
8+
9+
/* DPLL pin direction */
10+
#define DPLL_PIN_INPUT 0
11+
#define DPLL_PIN_OUTPUT 1
12+
13+
#endif

0 commit comments

Comments
 (0)