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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/net/micrel,gigabit.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Micrel series Gigabit Ethernet PHYs |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Andrew Lunn <andrew@lunn.ch> |
| 11 | + - Stefan Eichenberger <eichest@gmail.com> |
| 12 | + |
| 13 | +description: |
| 14 | + Some boards require special skew tuning values, particularly when it comes |
| 15 | + to clock delays. These values can be specified in the device tree using |
| 16 | + the properties listed here. |
| 17 | + |
| 18 | +properties: |
| 19 | + compatible: |
| 20 | + enum: |
| 21 | + - ethernet-phy-id0022.1610 # KSZ9021 |
| 22 | + - ethernet-phy-id0022.1611 # KSZ9021RLRN |
| 23 | + - ethernet-phy-id0022.1620 # KSZ9031 |
| 24 | + - ethernet-phy-id0022.1631 # KSZ9477 |
| 25 | + - ethernet-phy-id0022.1640 # KSZ9131 |
| 26 | + - ethernet-phy-id0022.1650 # LAN8841 |
| 27 | + - ethernet-phy-id0022.1660 # LAN8814 |
| 28 | + - ethernet-phy-id0022.1670 # LAN8804 |
| 29 | + |
| 30 | + micrel,force-master: |
| 31 | + type: boolean |
| 32 | + description: | |
| 33 | + Force phy to master mode. Only set this option if the phy reference |
| 34 | + clock provided at CLK125_NDO pin is used as MAC reference clock |
| 35 | + because the clock jitter in slave mode is too high (errata#2). |
| 36 | + Attention: The link partner must be configurable as slave otherwise |
| 37 | + no link will be established. |
| 38 | +
|
| 39 | + coma-mode-gpios: |
| 40 | + maxItems: 1 |
| 41 | + description: | |
| 42 | + If present the given gpio will be deasserted when the PHY is probed. |
| 43 | +
|
| 44 | + Some PHYs have a COMA mode input pin which puts the PHY into |
| 45 | + isolate and power-down mode. On some boards this input is connected |
| 46 | + to a GPIO of the SoC. |
| 47 | +
|
| 48 | + micrel,led-mode: |
| 49 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 50 | + description: | |
| 51 | + LED mode value to set for PHYs with configurable LEDs. |
| 52 | +
|
| 53 | + Configure the LED mode with single value. The list of PHYs and the |
| 54 | + bits that are currently supported: |
| 55 | +
|
| 56 | + LAN8814: register EP5.0, bit 6 |
| 57 | +
|
| 58 | + See the respective PHY datasheet for the mode values. |
| 59 | + minimum: 0 |
| 60 | + maximum: 1 |
| 61 | + |
| 62 | +patternProperties: |
| 63 | + '^([rt]xc)-skew-psec$': |
| 64 | + $ref: /schemas/types.yaml#/definitions/int32 |
| 65 | + description: |
| 66 | + Skew control of the pad in picoseconds. |
| 67 | + minimum: -700 |
| 68 | + maximum: 2400 |
| 69 | + multipleOf: 100 |
| 70 | + default: 0 |
| 71 | + |
| 72 | + '^([rt]xd[0-3]|rxdv|txen)-skew-psec$': |
| 73 | + $ref: /schemas/types.yaml#/definitions/int32 |
| 74 | + description: | |
| 75 | + Skew control of the pad in picoseconds. |
| 76 | + minimum: -700 |
| 77 | + maximum: 800 |
| 78 | + multipleOf: 100 |
| 79 | + default: 0 |
| 80 | + |
| 81 | +allOf: |
| 82 | + - $ref: ethernet-phy.yaml# |
| 83 | + - if: |
| 84 | + properties: |
| 85 | + compatible: |
| 86 | + contains: |
| 87 | + enum: |
| 88 | + - ethernet-phy-id0022.1610 |
| 89 | + - ethernet-phy-id0022.1611 |
| 90 | + then: |
| 91 | + patternProperties: |
| 92 | + '^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-ps$': |
| 93 | + description: | |
| 94 | + Skew control of the pad in picoseconds. |
| 95 | + The actual increment on the chip is 120ps ranging from -840ps to |
| 96 | + 960ps, this mismatch comes from a documentation error before |
| 97 | + datasheet revision 1.2 (Feb 2014). |
| 98 | +
|
| 99 | + The device tree value to delay mapping looks as follows: |
| 100 | + Device Tree Value Delay |
| 101 | + -------------------------- |
| 102 | + 0 -840ps |
| 103 | + 200 -720ps |
| 104 | + 400 -600ps |
| 105 | + 600 -480ps |
| 106 | + 800 -360ps |
| 107 | + 1000 -240ps |
| 108 | + 1200 -120ps |
| 109 | + 1400 0ps |
| 110 | + 1600 120ps |
| 111 | + 1800 240ps |
| 112 | + 2000 360ps |
| 113 | + 2200 480ps |
| 114 | + 2400 600ps |
| 115 | + 2600 720ps |
| 116 | + 2800 840ps |
| 117 | + 3000 960ps |
| 118 | + minimum: 0 |
| 119 | + maximum: 3000 |
| 120 | + multipleOf: 200 |
| 121 | + default: 1400 |
| 122 | + - if: |
| 123 | + properties: |
| 124 | + compatible: |
| 125 | + contains: |
| 126 | + const: ethernet-phy-id0022.1620 |
| 127 | + then: |
| 128 | + patternProperties: |
| 129 | + '^([rt]xc)-skew-ps$': |
| 130 | + description: | |
| 131 | + Skew control of the pad in picoseconds. |
| 132 | +
|
| 133 | + The device tree value to delay mapping is as follows: |
| 134 | + Device Tree Value Delay |
| 135 | + -------------------------- |
| 136 | + 0 -900ps |
| 137 | + 60 -840ps |
| 138 | + 120 -780ps |
| 139 | + 180 -720ps |
| 140 | + 240 -660ps |
| 141 | + 300 -600ps |
| 142 | + 360 -540ps |
| 143 | + 420 -480ps |
| 144 | + 480 -420ps |
| 145 | + 540 -360ps |
| 146 | + 600 -300ps |
| 147 | + 660 -240ps |
| 148 | + 720 -180ps |
| 149 | + 780 -120ps |
| 150 | + 840 -60ps |
| 151 | + 900 0ps |
| 152 | + 960 60ps |
| 153 | + 1020 120ps |
| 154 | + 1080 180ps |
| 155 | + 1140 240ps |
| 156 | + 1200 300ps |
| 157 | + 1260 360ps |
| 158 | + 1320 420ps |
| 159 | + 1380 480ps |
| 160 | + 1440 540ps |
| 161 | + 1500 600ps |
| 162 | + 1560 660ps |
| 163 | + 1620 720ps |
| 164 | + 1680 780ps |
| 165 | + 1740 840ps |
| 166 | + 1800 900ps |
| 167 | + 1860 960ps |
| 168 | + minimum: 0 |
| 169 | + maximum: 1860 |
| 170 | + multipleOf: 60 |
| 171 | + default: 900 |
| 172 | + '^([rt]xd[0-3]|rxdv|txen)-skew-ps$': |
| 173 | + description: | |
| 174 | + Skew control of the pad in picoseconds. |
| 175 | +
|
| 176 | + The device tree value to delay mapping is as follows: |
| 177 | + Device Tree Value Delay |
| 178 | + -------------------------- |
| 179 | + 0 -420ps |
| 180 | + 60 -360ps |
| 181 | + 120 -300ps |
| 182 | + 180 -240ps |
| 183 | + 240 -180ps |
| 184 | + 300 -120ps |
| 185 | + 360 -60ps |
| 186 | + 420 0ps |
| 187 | + 480 60ps |
| 188 | + 540 120ps |
| 189 | + 600 180ps |
| 190 | + 660 240ps |
| 191 | + 720 300ps |
| 192 | + 780 360ps |
| 193 | + 840 420ps |
| 194 | + 900 480ps |
| 195 | + minimum: 0 |
| 196 | + maximum: 900 |
| 197 | + multipleOf: 60 |
| 198 | + default: 420 |
| 199 | + - if: |
| 200 | + not: |
| 201 | + properties: |
| 202 | + compatible: |
| 203 | + contains: |
| 204 | + enum: |
| 205 | + - ethernet-phy-id0022.1640 |
| 206 | + - ethernet-phy-id0022.1650 |
| 207 | + then: |
| 208 | + patternProperties: |
| 209 | + '^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-psec$': false |
| 210 | + - if: |
| 211 | + not: |
| 212 | + properties: |
| 213 | + compatible: |
| 214 | + contains: |
| 215 | + const: ethernet-phy-id0022.1620 |
| 216 | + then: |
| 217 | + properties: |
| 218 | + micrel,force-master: false |
| 219 | + - if: |
| 220 | + not: |
| 221 | + properties: |
| 222 | + compatible: |
| 223 | + contains: |
| 224 | + const: ethernet-phy-id0022.1660 |
| 225 | + then: |
| 226 | + properties: |
| 227 | + coma-mode-gpios: false |
| 228 | + micrel,led-mode: false |
| 229 | + |
| 230 | +unevaluatedProperties: false |
| 231 | + |
| 232 | +examples: |
| 233 | + - | |
| 234 | + mdio { |
| 235 | + #address-cells = <1>; |
| 236 | + #size-cells = <0>; |
| 237 | +
|
| 238 | + ethernet-phy@7 { |
| 239 | + compatible = "ethernet-phy-id0022.1610"; |
| 240 | + reg = <7>; |
| 241 | + rxc-skew-ps = <3000>; |
| 242 | + rxdv-skew-ps = <0>; |
| 243 | + txc-skew-ps = <3000>; |
| 244 | + txen-skew-ps = <0>; |
| 245 | + }; |
| 246 | +
|
| 247 | + ethernet-phy@9 { |
| 248 | + compatible = "ethernet-phy-id0022.1640"; |
| 249 | + reg = <9>; |
| 250 | + rxc-skew-psec = <(-100)>; |
| 251 | + txc-skew-psec = <(-100)>; |
| 252 | + }; |
| 253 | + }; |
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