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Merge tag 'v5.10.110' into linux-5.10-mchp
This is the 5.10.110 stable release
2 parents 9fdcb0a + 3238bff commit 17afa4e

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‎Documentation/admin-guide/sysctl/kernel.rst

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -787,6 +787,7 @@ bit 1 print system memory info
787787
bit 2 print timer info
788788
bit 3 print locks info if ``CONFIG_LOCKDEP`` is on
789789
bit 4 print ftrace buffer
790+
bit 5 print all printk messages in buffer
790791
===== ============================================
791792

792793
So for example to print tasks and memory info on panic, user can::

‎Documentation/core-api/dma-attributes.rst

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Original file line numberDiff line numberDiff line change
@@ -130,3 +130,11 @@ accesses to DMA buffers in both privileged "supervisor" and unprivileged
130130
subsystem that the buffer is fully accessible at the elevated privilege
131131
level (and ideally inaccessible or at least read-only at the
132132
lesser-privileged levels).
133+
134+
DMA_ATTR_OVERWRITE
135+
------------------
136+
137+
This is a hint to the DMA-mapping subsystem that the device is expected to
138+
overwrite the entire mapped size, thus the caller does not require any of the
139+
previous buffer contents to be preserved. This allows bounce-buffering
140+
implementations to optimise DMA_FROM_DEVICE transfers.

‎Documentation/devicetree/bindings/mtd/nand-controller.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ patternProperties:
4444
properties:
4545
reg:
4646
description:
47-
Contains the native Ready/Busy IDs.
47+
Contains the chip-select IDs.
4848

4949
nand-ecc-mode:
5050
description:
@@ -174,6 +174,6 @@ examples:
174174
nand-ecc-mode = "soft";
175175
nand-ecc-algo = "bch";
176176
177-
/* controller specific properties */
177+
/* NAND chip specific properties */
178178
};
179179
};

‎Documentation/devicetree/bindings/spi/spi-mxic.txt

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,13 @@ Required properties:
88
- reg: should contain 2 entries, one for the registers and one for the direct
99
mapping area
1010
- reg-names: should contain "regs" and "dirmap"
11-
- interrupts: interrupt line connected to the SPI controller
1211
- clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
1312
- clocks: should contain 3 entries for the "ps_clk", "send_clk" and
1413
"send_dly_clk" clocks
1514

15+
Optional properties:
16+
- interrupts: interrupt line connected to the SPI controller
17+
1618
Example:
1719

1820
spi@43c30000 {

‎Documentation/process/stable-kernel-rules.rst

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,16 @@ Trees
168168
- The finalized and tagged releases of all stable kernels can be found
169169
in separate branches per version at:
170170

171-
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
171+
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
172+
173+
- The release candidate of all stable kernel versions can be found at:
174+
175+
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/
176+
177+
.. warning::
178+
The -stable-rc tree is a snapshot in time of the stable-queue tree and
179+
will change frequently, hence will be rebased often. It should only be
180+
used for testing purposes (e.g. to be consumed by CI systems).
172181

173182

174183
Review committee

‎Documentation/sound/hd-audio/models.rst

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Original file line numberDiff line numberDiff line change
@@ -261,6 +261,10 @@ alc-sense-combo
261261
huawei-mbx-stereo
262262
Enable initialization verbs for Huawei MBX stereo speakers;
263263
might be risky, try this at your own risk
264+
alc298-samsung-headphone
265+
Samsung laptops with ALC298
266+
alc256-samsung-headphone
267+
Samsung laptops with ALC256
264268

265269
ALC66x/67x/892
266270
==============

‎Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
22
VERSION = 5
33
PATCHLEVEL = 10
4-
SUBLEVEL = 109
4+
SUBLEVEL = 110
55
EXTRAVERSION = -linux4microchip-2021.10
66
NAME = Dare mighty things
77

‎arch/arc/kernel/process.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ SYSCALL_DEFINE0(arc_gettls)
4343
return task_thread_info(current)->thr_ptr;
4444
}
4545

46-
SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new)
46+
SYSCALL_DEFINE3(arc_usr_cmpxchg, int __user *, uaddr, int, expected, int, new)
4747
{
4848
struct pt_regs *regs = current_pt_regs();
4949
u32 uval;

‎arch/arm/boot/dts/bcm2711.dtsi

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -433,12 +433,26 @@
433433
#size-cells = <0>;
434434
enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
435435

436+
/* Source for d/i-cache-line-size and d/i-cache-sets
437+
* https://developer.arm.com/documentation/100095/0003
438+
* /Level-1-Memory-System/About-the-L1-memory-system?lang=en
439+
* Source for d/i-cache-size
440+
* https://www.raspberrypi.com/documentation/computers
441+
* /processors.html#bcm2711
442+
*/
436443
cpu0: cpu@0 {
437444
device_type = "cpu";
438445
compatible = "arm,cortex-a72";
439446
reg = <0>;
440447
enable-method = "spin-table";
441448
cpu-release-addr = <0x0 0x000000d8>;
449+
d-cache-size = <0x8000>;
450+
d-cache-line-size = <64>;
451+
d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
452+
i-cache-size = <0xc000>;
453+
i-cache-line-size = <64>;
454+
i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
455+
next-level-cache = <&l2>;
442456
};
443457

444458
cpu1: cpu@1 {
@@ -447,6 +461,13 @@
447461
reg = <1>;
448462
enable-method = "spin-table";
449463
cpu-release-addr = <0x0 0x000000e0>;
464+
d-cache-size = <0x8000>;
465+
d-cache-line-size = <64>;
466+
d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
467+
i-cache-size = <0xc000>;
468+
i-cache-line-size = <64>;
469+
i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
470+
next-level-cache = <&l2>;
450471
};
451472

452473
cpu2: cpu@2 {
@@ -455,6 +476,13 @@
455476
reg = <2>;
456477
enable-method = "spin-table";
457478
cpu-release-addr = <0x0 0x000000e8>;
479+
d-cache-size = <0x8000>;
480+
d-cache-line-size = <64>;
481+
d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
482+
i-cache-size = <0xc000>;
483+
i-cache-line-size = <64>;
484+
i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
485+
next-level-cache = <&l2>;
458486
};
459487

460488
cpu3: cpu@3 {
@@ -463,6 +491,28 @@
463491
reg = <3>;
464492
enable-method = "spin-table";
465493
cpu-release-addr = <0x0 0x000000f0>;
494+
d-cache-size = <0x8000>;
495+
d-cache-line-size = <64>;
496+
d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
497+
i-cache-size = <0xc000>;
498+
i-cache-line-size = <64>;
499+
i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
500+
next-level-cache = <&l2>;
501+
};
502+
503+
/* Source for d/i-cache-line-size and d/i-cache-sets
504+
* https://developer.arm.com/documentation/100095/0003
505+
* /Level-2-Memory-System/About-the-L2-memory-system?lang=en
506+
* Source for d/i-cache-size
507+
* https://www.raspberrypi.com/documentation/computers
508+
* /processors.html#bcm2711
509+
*/
510+
l2: l2-cache0 {
511+
compatible = "cache";
512+
cache-size = <0x100000>;
513+
cache-line-size = <64>;
514+
cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set
515+
cache-level = <2>;
466516
};
467517
};
468518

‎arch/arm/boot/dts/bcm2837.dtsi

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,26 @@
4040
#size-cells = <0>;
4141
enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
4242

43+
/* Source for d/i-cache-line-size and d/i-cache-sets
44+
* https://developer.arm.com/documentation/ddi0500/e/level-1-memory-system
45+
* /about-the-l1-memory-system?lang=en
46+
*
47+
* Source for d/i-cache-size
48+
* https://magpi.raspberrypi.com/articles/raspberry-pi-3-specs-benchmarks
49+
*/
4350
cpu0: cpu@0 {
4451
device_type = "cpu";
4552
compatible = "arm,cortex-a53";
4653
reg = <0>;
4754
enable-method = "spin-table";
4855
cpu-release-addr = <0x0 0x000000d8>;
56+
d-cache-size = <0x8000>;
57+
d-cache-line-size = <64>;
58+
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
59+
i-cache-size = <0x8000>;
60+
i-cache-line-size = <64>;
61+
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
62+
next-level-cache = <&l2>;
4963
};
5064

5165
cpu1: cpu@1 {
@@ -54,6 +68,13 @@
5468
reg = <1>;
5569
enable-method = "spin-table";
5670
cpu-release-addr = <0x0 0x000000e0>;
71+
d-cache-size = <0x8000>;
72+
d-cache-line-size = <64>;
73+
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
74+
i-cache-size = <0x8000>;
75+
i-cache-line-size = <64>;
76+
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
77+
next-level-cache = <&l2>;
5778
};
5879

5980
cpu2: cpu@2 {
@@ -62,6 +83,13 @@
6283
reg = <2>;
6384
enable-method = "spin-table";
6485
cpu-release-addr = <0x0 0x000000e8>;
86+
d-cache-size = <0x8000>;
87+
d-cache-line-size = <64>;
88+
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
89+
i-cache-size = <0x8000>;
90+
i-cache-line-size = <64>;
91+
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
92+
next-level-cache = <&l2>;
6593
};
6694

6795
cpu3: cpu@3 {
@@ -70,6 +98,27 @@
7098
reg = <3>;
7199
enable-method = "spin-table";
72100
cpu-release-addr = <0x0 0x000000f0>;
101+
d-cache-size = <0x8000>;
102+
d-cache-line-size = <64>;
103+
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
104+
i-cache-size = <0x8000>;
105+
i-cache-line-size = <64>;
106+
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
107+
next-level-cache = <&l2>;
108+
};
109+
110+
/* Source for cache-line-size + cache-sets
111+
* https://developer.arm.com/documentation/ddi0500
112+
* /e/level-2-memory-system/about-the-l2-memory-system?lang=en
113+
* Source for cache-size
114+
* https://datasheets.raspberrypi.com/cm/cm1-and-cm3-datasheet.pdf
115+
*/
116+
l2: l2-cache0 {
117+
compatible = "cache";
118+
cache-size = <0x80000>;
119+
cache-line-size = <64>;
120+
cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
121+
cache-level = <2>;
73122
};
74123
};
75124
};

‎arch/arm/boot/dts/dra7-l4.dtsi

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3448,8 +3448,7 @@
34483448
ti,timer-pwm;
34493449
};
34503450
};
3451-
3452-
target-module@2c000 { /* 0x4882c000, ap 17 02.0 */
3451+
timer15_target: target-module@2c000 { /* 0x4882c000, ap 17 02.0 */
34533452
compatible = "ti,sysc-omap4-timer", "ti,sysc";
34543453
reg = <0x2c000 0x4>,
34553454
<0x2c010 0x4>;
@@ -3477,7 +3476,7 @@
34773476
};
34783477
};
34793478

3480-
target-module@2e000 { /* 0x4882e000, ap 19 14.0 */
3479+
timer16_target: target-module@2e000 { /* 0x4882e000, ap 19 14.0 */
34813480
compatible = "ti,sysc-omap4-timer", "ti,sysc";
34823481
reg = <0x2e000 0x4>,
34833482
<0x2e010 0x4>;

‎arch/arm/boot/dts/dra7.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1093,20 +1093,20 @@
10931093
};
10941094

10951095
/* Local timers, see ARM architected timer wrap erratum i940 */
1096-
&timer3_target {
1096+
&timer15_target {
10971097
ti,no-reset-on-init;
10981098
ti,no-idle;
10991099
timer@0 {
1100-
assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>;
1100+
assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
11011101
assigned-clock-parents = <&timer_sys_clk_div>;
11021102
};
11031103
};
11041104

1105-
&timer4_target {
1105+
&timer16_target {
11061106
ti,no-reset-on-init;
11071107
ti,no-idle;
11081108
timer@0 {
1109-
assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>;
1109+
assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
11101110
assigned-clock-parents = <&timer_sys_clk_div>;
11111111
};
11121112
};

‎arch/arm/boot/dts/exynos5250-pinctrl.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -260,7 +260,7 @@
260260
};
261261

262262
uart3_data: uart3-data {
263-
samsung,pins = "gpa1-4", "gpa1-4";
263+
samsung,pins = "gpa1-4", "gpa1-5";
264264
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
265265
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
266266
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

‎arch/arm/boot/dts/exynos5250-smdk5250.dts

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -118,6 +118,9 @@
118118
status = "okay";
119119
ddc = <&i2c_2>;
120120
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
121+
vdd-supply = <&ldo8_reg>;
122+
vdd_osc-supply = <&ldo10_reg>;
123+
vdd_pll-supply = <&ldo8_reg>;
121124
};
122125

123126
&i2c_0 {

‎arch/arm/boot/dts/exynos5420-smdk5420.dts

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,9 @@
124124
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
125125
pinctrl-names = "default";
126126
pinctrl-0 = <&hdmi_hpd_irq>;
127+
vdd-supply = <&ldo6_reg>;
128+
vdd_osc-supply = <&ldo7_reg>;
129+
vdd_pll-supply = <&ldo6_reg>;
127130
};
128131

129132
&hsi2c_4 {

‎arch/arm/boot/dts/imx53-m53menlo.dts

Lines changed: 27 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,31 @@
5353
};
5454
};
5555

56+
lvds-decoder {
57+
compatible = "ti,ds90cf364a", "lvds-decoder";
58+
59+
ports {
60+
#address-cells = <1>;
61+
#size-cells = <0>;
62+
63+
port@0 {
64+
reg = <0>;
65+
66+
lvds_decoder_in: endpoint {
67+
remote-endpoint = <&lvds0_out>;
68+
};
69+
};
70+
71+
port@1 {
72+
reg = <1>;
73+
74+
lvds_decoder_out: endpoint {
75+
remote-endpoint = <&panel_in>;
76+
};
77+
};
78+
};
79+
};
80+
5681
panel {
5782
compatible = "edt,etm0700g0dh6";
5883
pinctrl-0 = <&pinctrl_display_gpio>;
@@ -61,7 +86,7 @@
6186

6287
port {
6388
panel_in: endpoint {
64-
remote-endpoint = <&lvds0_out>;
89+
remote-endpoint = <&lvds_decoder_out>;
6590
};
6691
};
6792
};
@@ -450,7 +475,7 @@
450475
reg = <2>;
451476

452477
lvds0_out: endpoint {
453-
remote-endpoint = <&panel_in>;
478+
remote-endpoint = <&lvds_decoder_in>;
454479
};
455480
};
456481
};

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