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add some defines and replace constants with more meaningful definitions
1 parent 2a11710 commit d6e9493

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3 files changed

+96
-56
lines changed

3 files changed

+96
-56
lines changed

bc_def.h

+50-2
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,9 @@
22
#define BC_DEF_H
33

44
/*
5-
* These constants are taken from boot_prog/boot_prog_flash_bc.h
6-
* found in bluesuite source code.
5+
* These constants are taken from boot_prog/boot_prog_flash_bc.h,
6+
* pttransport/io_map_public_bc.h and pttransport/io_defs_bc.h,
7+
* all found in bluesuite source code.
78
*/
89

910
static unsigned short boot_prog_code[] = {
@@ -578,4 +579,51 @@ static unsigned short boot_prog_data[] = {
578579
#define boot_flash_type 0xC001
579580
#define boot_test_mode 0xC003
580581

582+
#define RST_WATCHDOG_EN_MASK 0x0001
583+
#define RST_UART_EN_MASK 0x0002
584+
#define RST_FULL_CHIP_RESET 0x0004
585+
586+
#define SPI_EMU_CMD_XAP_STEP_MASK 0x0001
587+
#define SPI_EMU_CMD_XAP_RUN_B_MASK 0x0002
588+
#define SPI_EMU_CMD_XAP_BRK_MASK 0x0004
589+
#define SPI_EMU_CMD_XAP_WAKEUP_MASK 0x0008
590+
591+
#define SPI_EMU_CMD 0x006A /* RW 8 bits */
592+
#define SPI_USER_CMD 0x006B /* RW 8 bits */
593+
#define SPI_BRK_DATA_ADDR 0x006C /* RW 16 bits */
594+
#define SPI_BRK_DATA_RW_EN 0x006D /* RW 2 bits */
595+
#define MMU_FREE_LIST_ADDR 0x0070 /* RW 16 bits */
596+
#define MMU_FLASH_BANK_SELECT 0x0073 /* RW 12 bits */
597+
#define MMU_CONST_BANK_SELECT 0x0074 /* RW 9 bits */
598+
#define MMU_FREE_LIST_NEXT_ADDR 0xFFCF /* R 16 bits */
599+
#define RSTGEN_WATCHDOG_DELAY 0x0076 /* RW 16 bits */
600+
#define RSTGEN_WATCHDOG_KICK 0x0077 /* RW 1 bit */
601+
#define ANA_VERSION_ID 0xFF7D /* R 16 bits */
602+
#define ANA_CONFIG2 0xFF7E /* RW 16 bits */
603+
#define ANA_LO_FREQ 0xFF82 /* RW 16 bits */
604+
#define ANA_LO_FTRIM 0xFF83 /* RW 16 bits */
605+
#define GBL_RST_ENABLES 0xFF91 /* RW 2 bits */
606+
#define GBL_TIMER_ENABLES 0xFF94 /* RW 4 bits */
607+
#define GBL_MISC_ENABLES 0xFF97 /* RW 8 bits */
608+
#define GBL_MISC2_ENABLES 0xFF52 /* RW 4 bits */
609+
#define GBL_CHIP_VERSION 0xFF9A /* R 16 bits */
610+
#define GBL_CLK_RATE 0xFFDE /* RW 5 bits */
611+
#define TIMER_SLOW_TIMER_PERIOD 0xFFB9 /* R 13 bits */
612+
#define XAP_AH 0xFFE0 /* RW 16 bits */
613+
#define XAP_AL 0xFFE1 /* RW 16 bits */
614+
#define XAP_UXH 0xFFE2 /* RW 8 bits */
615+
#define XAP_UXL 0xFFE3 /* RW 16 bits */
616+
#define XAP_UY 0xFFE4 /* RW 16 bits */
617+
#define XAP_IXH 0xFFE5 /* RW 8 bits */
618+
#define XAP_IXL 0xFFE6 /* RW 16 bits */
619+
#define XAP_IY 0xFFE7 /* RW 16 bits */
620+
#define XAP_FLAGS 0xFFE8 /* RW 8 bits */
621+
#define XAP_PCH 0xFFE9 /* RW 8 bits */
622+
#define XAP_PCL 0xFFEA /* RW 16 bits */
623+
#define XAP_BRK_REGH 0xFFEB /* RW 8 bits */
624+
#define XAP_BRK_REGL 0xFFEC /* RW 16 bits */
625+
#define XAP_RSVD_13 0xFFED /* RW 16 bits */
626+
#define XAP_RSVD_14 0xFFEE /* RW 16 bits */
627+
#define XAP_RSVD_15 0xFFEF /* RW 16 bits */
628+
581629
#endif // BC_DEF_H

devicemanager.cpp

+42-50
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
#include "devicemanager.h"
22
#include "stopwatch.h"
33
#include "usbprogrammer.h"
4+
#include "bc_def.h"
45
#include <cstring>
56

67
DeviceManager::DeviceManager()
@@ -11,7 +12,7 @@ DeviceManager::DeviceManager()
1112
bool DeviceManager::IsSupported()
1213
{
1314
uint16_t id;
14-
if(!programmer->Read(0xff9a, &id)) return false;
15+
if(!programmer->Read(GBL_CHIP_VERSION, &id)) return false;
1516
return id == 0x4826;
1617
}
1718

@@ -22,44 +23,46 @@ bool DeviceManager::XapResetAndGo()
2223
int reset_count = 0;
2324
StopWatch timer;
2425
uint16_t tmp;
25-
int xx = 0x540000;
2626

2727
programmer->SetTransferSpeed(0x189);
28-
programmer->Write(0x6A, 2);
28+
programmer->Write(SPI_EMU_CMD, SPI_EMU_CMD_XAP_RUN_B_MASK);
2929
timer.start();
30-
while (timer.elapsedmsec() < 0x10 )
31-
programmer->Write(0x6A, 2);
30+
while (timer.elapsedmsec() < 16 )
31+
programmer->Write(SPI_EMU_CMD, SPI_EMU_CMD_XAP_RUN_B_MASK);
3232

3333
programmer->SetTransferSpeed(4);
3434
for(int i=0;i<100;i++)
3535
{
36-
if ( !programmer->Read(0x73, &tmp) )
36+
if ( !programmer->Read(MMU_FLASH_BANK_SELECT, &tmp) )
3737
{
38-
if ( tmp >= 0x200u )
39-
programmer->Write(0x73u, 0);
38+
if ( tmp >= 0x200 )
39+
programmer->Write(MMU_FLASH_BANK_SELECT, 0);
4040
if(++reset_count >= 10)
4141
break;
4242
}
4343
}
4444

45+
/* write instructions - endless loop and execute it */
46+
uint32_t xx = 0x540000;
4547
uint32_t address = 0xa000 + xx - 0x140000;
46-
programmer->Write(address,0);
47-
programmer->Write(address + 1, 0);
48-
programmer->Write(address + 2, 0xE0u);
49-
programmer->Write(0xFFE9, xx >> 16);
50-
programmer->Write(0xFFEA, xx);
48+
programmer->Write(address, 0x0000); //nop
49+
programmer->Write(address+1, 0x0000); //nop
50+
programmer->Write(address+2, 0x00E0); //x: bra x
51+
programmer->Write(XAP_PCH, xx >> 16);
52+
programmer->Write(XAP_PCL, xx);
5153

52-
programmer->Read(0xFF7E, &tmp);
54+
programmer->Read(ANA_CONFIG2, &tmp);
5355
tmp &= 0xEFFF;
54-
programmer->Write(0xFF7E, tmp);
55-
programmer->Write(0xFFDE, 0);
56-
programmer->Read(0xFFE8, &tmp);
57-
tmp &= 0x20u;
58-
programmer->Write(0xFFE8, tmp);
59-
programmer->Write(0x76, 2);
60-
programmer->Write(0xFF91, 5);
61-
programmer->Write(0x77, 1);
62-
programmer->Write(0x6A, 0);
56+
programmer->Write(ANA_CONFIG2, tmp);
57+
programmer->Write(GBL_CLK_RATE, 0);
58+
programmer->Read(XAP_FLAGS, &tmp);
59+
tmp &= 0x20;
60+
programmer->Write(XAP_FLAGS, tmp);
61+
programmer->Write(RSTGEN_WATCHDOG_DELAY, 2);
62+
programmer->Write(GBL_RST_ENABLES, RST_WATCHDOG_EN_MASK |
63+
RST_FULL_CHIP_RESET);
64+
programmer->Write(RSTGEN_WATCHDOG_KICK, 1);
65+
programmer->Write(SPI_EMU_CMD, 0);
6366

6467
return true;
6568
}
@@ -69,14 +72,14 @@ bool DeviceManager::XapResetAndStop()
6972
if(!IsSupported()) return false;
7073

7174
int status;
72-
uint16_t data[0x6B],tmp;
75+
uint16_t tmp;
7376
StopWatch timer;
7477

7578
XapResetAndGo();
7679
timer.start();
7780
do
7881
{
79-
programmer->ReadBlock(0xFF91, 1, &tmp);
82+
programmer->Read(GBL_RST_ENABLES, &tmp);
8083
if ( tmp )
8184
status = 0;
8285
else
@@ -87,29 +90,18 @@ bool DeviceManager::XapResetAndStop()
8790
if(status < 2)
8891
return false;
8992

90-
for (int i = 0; i < 20; ++i )
91-
programmer->Write(0x6A, 2);
92-
93-
memset(data, 0, 0xD6);
94-
95-
programmer->WriteBlock(0, 0x6B, data);
96-
programmer->Write(0x6A, 2);
97-
programmer->Write(0x6A, 2);
98-
programmer->WriteBlock(0xFFE0, 16, data);
99-
programmer->Write(0xFFEB, 0xff);
100-
programmer->Write(0xFFEC, 0xffff);
101-
102-
return true;
93+
return XapStop();
10394
}
10495

10596
bool DeviceManager::XapGo()
10697
{
10798
if(!IsSupported()) return false;
10899

109-
programmer->Write(0x6A,2);
110-
programmer->Write(0x6A,3);
111-
programmer->Write(0x6A,2);
112-
programmer->Write(0x6A,1);
100+
programmer->Write(SPI_EMU_CMD,SPI_EMU_CMD_XAP_RUN_B_MASK);
101+
programmer->Write(SPI_EMU_CMD,SPI_EMU_CMD_XAP_STEP_MASK |
102+
SPI_EMU_CMD_XAP_RUN_B_MASK);
103+
programmer->Write(SPI_EMU_CMD,SPI_EMU_CMD_XAP_RUN_B_MASK);
104+
programmer->Write(SPI_EMU_CMD,SPI_EMU_CMD_XAP_STEP_MASK);
113105

114106
return true;
115107
}
@@ -121,18 +113,18 @@ bool DeviceManager::XapStop()
121113
uint16_t data[0x6B];//,tmp;
122114

123115
for (int i = 0; i < 20; ++i )
124-
programmer->Write(0x6A, 2);
116+
programmer->Write(SPI_EMU_CMD, SPI_EMU_CMD_XAP_RUN_B_MASK);
125117

126118
memset(data, 0, sizeof(data));
127119

128120
programmer->WriteBlock(0, 0x6B, data);
129-
programmer->Write(0x6A, 2);
130-
programmer->Write(0x6A, 2);
131-
/*programmer->Read(0xFFEB, &tmp);
132-
programmer->Read(0xFFEC, &tmp)*/
133-
programmer->WriteBlock(0xFFE0, 16, data);
134-
programmer->Write(0xFFEB, 0xff);
135-
programmer->Write(0xFFEC, 0xffff);
121+
programmer->Write(SPI_EMU_CMD, SPI_EMU_CMD_XAP_RUN_B_MASK);
122+
programmer->Write(SPI_EMU_CMD, SPI_EMU_CMD_XAP_RUN_B_MASK);
123+
124+
/* reset all register to their default values */
125+
programmer->WriteBlock(XAP_AH, 16, data);
126+
programmer->Write(XAP_BRK_REGH, 0xff);
127+
programmer->Write(XAP_BRK_REGL, 0xffff);
136128

137129
return true;
138130
}

flash.cpp

+4-4
Original file line numberDiff line numberDiff line change
@@ -144,13 +144,13 @@ bool Flash::bootprog_run()
144144
// set xtal speed to 26 MHz
145145
int xtalsetting1 = 0x6F00;
146146
int xtalsetting2 = 0x0E00;
147-
programmer->Write(boot_addr,xtalsetting1 | 0x10);
147+
programmer->Write(boot_addr, xtalsetting1 | 0x10);
148148
programmer->Write(boot_addr+2,xtalsetting2 | 0x10);
149149

150150
//run bootprog
151151
int address = (boot_addr-0xA000)+0x140000;
152-
programmer->Write(0xFFE9, address >> 16);
153-
programmer->Write(0xFFEA, address);
152+
programmer->Write(XAP_PCH, address >> 16);
153+
programmer->Write(XAP_PCL, address);
154154

155155
if(!manager.XapGo()) return false;
156156
return wait_to_stop(3000);
@@ -163,7 +163,7 @@ bool Flash::bootprog_load_and_run()
163163
cout << "Downloading Flash Stub..." << endl;
164164
for(int i=0; i<3; i++) {
165165
// load boot program
166-
programmer->Write(0xFF52,0);
166+
programmer->Write(GBL_MISC2_ENABLES,0);
167167
programmer->WriteBlock(prog_data_addr,
168168
prog_data_length,
169169
boot_prog_data);

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