We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 85c40ff commit d9b77aeCopy full SHA for d9b77ae
scripts/opentitan/darjeeling-ocd.cfg
@@ -13,10 +13,10 @@ transport select jtag
13
set _IRLENGTH 5
14
15
# DMI addresses
16
-set _OT_DJ_DEBUG_RV_DM_ADDR 0x0
17
-set _OT_DJ_DEBUG_MBX_JTAG_ADDR 0x880
18
-set _OT_DJ_DEBUG_SOCDBG_CTRL_ADDR 0x8c0
19
-set _OT_DJ_DEBUG_LC_CTRL_ADDR 0xc00
+set _OT_DJ_DEBUG_RV_DM_ADDR 0x0
+set _OT_DJ_DEBUG_MBX_JTAG_ADDR 0x880
+set _OT_DJ_DEBUG_SOC_DBG_CTRL_ADDR 0x8c0
+set _OT_DJ_DEBUG_LC_CTRL_ADDR 0xc00
20
21
set _CHIPNAME riscv
22
# part 1, ver 0, lowRISC
0 commit comments