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1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ __pycache__
*~

venv/
.venv/
release/
.vscode/extensions.json
/compile_commands.json
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11 changes: 11 additions & 0 deletions src/mesh/SX126xInterface.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -194,6 +194,17 @@ template <typename T> bool SX126xInterface<T>::init()
LOG_INFO("Set RX gain to power saving mode (boosted mode off); result: %d", result);
}

#ifdef USE_GC1109_PA
// Undocumented SX1262 register patch recommended by Heltec/Semtech for improved RX sensitivity
// on boards with the GC1109 FEM. Sets bit 0 of register 0x8B5.
// Reference: https://github.com/meshcore-dev/MeshCore/pull/1398
if (module.SPIsetRegValue(0x8B5, 0x01, 0, 0) == RADIOLIB_ERR_NONE) {
LOG_INFO("Applied SX1262 register 0x8B5 patch for GC1109 RX improvement");
} else {
LOG_WARN("Failed to apply SX1262 register 0x8B5 patch for GC1109");
}
#endif

#if 0
// Read/write a register we are not using (only used for FSK mode) to test SPI comms
uint8_t crcLSB = 0;
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