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ArmPkg/Drivers/CpuDxe: Use lower and upper attributes
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`GetNextEntryAttribute()` is currently applying the 64-bit mask to a
32-bit descriptor value (the lower attributes).

`EntryType` (and `EntryTypeAttribute`) are 32-bit and
`TT_ATTRIBUTES_MASK` is 64-bit:

  #define TT_ATTRIBUTES_MASK  ((0xFFFULL << 52) | (0x3FFULL << 2))

In the 64-bit descriptor, there are 10 bits of lower attributes and
12 bits of upper attributes.

The descriptor is converted to a 32-bit value and assigned to
`EntryAttribute`.

This is assigned to `PrevEntryAttribute`:

        *PrevEntryAttribute = EntryAttribute;

Where `PrevEntryAttribute` is also a `UINT32`:

    IN OUT UINT32  *PrevEntryAttribute,

Which is passed to `PageAttributeToGcdAttribute()`:

          SetGcdMemorySpaceAttributes (
            MemorySpaceMap,
            NumberOfDescriptors,
            *StartGcdRegion,
            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
            PageAttributeToGcdAttribute (*PrevEntryAttribute)
            );

Which accepts a `UINT64`:

STATIC
UINT64
PageAttributeToGcdAttribute (
  IN UINT64  PageAttributes
  );

Which sets `EFI_MEMORY_XP` based on `TT_PXN_MASK | TT_UXN_MASK`:

  // Process eXecute Never attribute
  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {
    GcdAttributes |= EFI_MEMORY_XP;
  }

Where those bits are in the upper attributes:

This change uses a 64-bit integer to hold the attributes to set
`EFI_MEMORY_XP`.

Signed-off-by: Michael Kubacki <[email protected]>
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makubacki committed Nov 21, 2023
1 parent fa3856b commit f58b704
Showing 1 changed file with 7 additions and 6 deletions.
13 changes: 7 additions & 6 deletions ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Chipset/AArch64Mmu.h> // MU_CHANGE: Include header used in file
#include "CpuDxe.h"

#define INVALID_ENTRY ((UINT32)~0)
#define INVALID_ENTRY ((UINT64)~0) // MU_CHANGE: Use 64-bit entry value

#define MIN_T0SZ 16
#define BITS_PER_LEVEL 9
Expand Down Expand Up @@ -134,13 +134,13 @@ GetNextEntryAttribute (
IN UINTN EntryCount,
IN UINTN TableLevel,
IN UINT64 BaseAddress,
IN OUT UINT32 *PrevEntryAttribute,
IN OUT UINT64 *PrevEntryAttribute, // MU_CHANGE: Use 64-bit entry value
IN OUT UINT64 *StartGcdRegion
)
{
UINTN Index;
UINT64 Entry;
UINT32 EntryAttribute;
UINT64 EntryAttribute; // MU_CHANGE: Use 64-bit entry value
UINT32 EntryType;
EFI_STATUS Status;
UINTN NumberOfDescriptors;
Expand Down Expand Up @@ -169,7 +169,8 @@ GetNextEntryAttribute (

// MU_CHANGE [BEGIN]: Add UINT32 cast
EntryType = (UINT32)(Entry & TT_TYPE_MASK);
EntryAttribute = (UINT32)(Entry & TT_ATTRIBUTES_MASK); // MU_CHANGE: Return all attributes from page table
EntryAttribute = Entry & TT_ATTRIBUTES_MASK; // MU_CHANGE: Return all attributes from page table
// MU_CHANGE: Use 64-bit entry value
// MU_CHANGE [END]: Add UINT32 cast

// If Entry is a Table Descriptor type entry then go through the sub-level table
Expand Down Expand Up @@ -236,7 +237,7 @@ SyncCacheConfig (
)
{
EFI_STATUS Status;
UINT32 PageAttribute;
UINT64 PageAttribute; // MU_CHANGE: Use 64-bit entry value
UINT64 *FirstLevelTableAddress;
UINTN TableLevel;
UINTN TableCount;
Expand Down Expand Up @@ -275,7 +276,7 @@ SyncCacheConfig (
GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);

// First Attribute of the Page Tables
PageAttribute = (UINT32)GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);
PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel); // MU_CHANGE: Use 64-bit entry value

// We scan from the start of the memory map (ie: at the address 0x0)
BaseAddressGcdRegion = 0x0;
Expand Down

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