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Refactoring spi sram class
1 parent c9eb35b commit a86a4fb

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4 files changed

+99
-180
lines changed

4 files changed

+99
-180
lines changed

examples/Benchmarks/AT24CXX/AT24CXX.ino

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,8 @@
5454
#define USE_HARDWARE_TWI
5555

5656
// Configure: Hardware TWI bus clock frequency
57-
#define FREQ 800000UL
58-
// #define FREQ 400000UL
57+
// #define FREQ 800000UL
58+
#define FREQ 400000UL
5959
// #define FREQ 100000UL
6060

6161
#if defined(USE_SOFTWARE_TWI)

examples/Benchmarks/MC23LC1024/MC23LC1024.ino renamed to examples/Benchmarks/MC23LCXXX/MC23LCXXX.ino

Lines changed: 4 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,33 +1,15 @@
1-
/*
2-
* spi.FREQ(MHz) = 8
3-
* sram.SIZE(kbyte) = 128
4-
*
5-
* write(N, us, us/byte, kbyte/s)
6-
* 1, 24, 24.00, 41.67
7-
* 10, 40, 4.00, 250.00
8-
* 100, 172, 1.72, 581.40
9-
* 1000, 1468, 1.47, 681.20
10-
*
11-
* read(N, us, us/byte, kbyte/s)
12-
* 1, 24, 24.00, 41.67
13-
* 10, 36, 3.60, 277.78
14-
* 100, 156, 1.56, 641.03
15-
* 1000, 1344, 1.34, 744.05
16-
*/
17-
181
#include "Storage.h"
192
#include "GPIO.h"
203
#include "SPI.h"
21-
#include "Driver/MC23LC1024.h"
4+
#include "Driver/MC23LCXXX.h"
225

23-
// Select SPI bus manager implementation
24-
// #define USE_SOFTWARE_SPI
25-
#define USE_HARDWARE_SPI
6+
// Configure: SPI bus manager implementation
7+
#define USE_SOFTWARE_SPI
268

279
#if defined(USE_SOFTWARE_SPI)
2810
#include "Software/SPI.h"
2911
Software::SPI<BOARD::D11, BOARD::D12, BOARD::D13> spi;
30-
#elif defined(USE_HARDWARE_SPI)
12+
#else
3113
#include "Hardware/SPI.h"
3214
Hardware::SPI spi;
3315
#endif

src/Driver/MC23LC512.h

Lines changed: 0 additions & 128 deletions
This file was deleted.

src/Driver/MC23LC1024.h renamed to src/Driver/MC23LCXXX.h

Lines changed: 93 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* @file MC23LC1024.h
2+
* @file MC23LCXXX.h
33
* @version 1.0
44
*
55
* @section License
@@ -16,30 +16,20 @@
1616
* Lesser General Public License for more details.
1717
*/
1818

19-
#ifndef MC23LC1024_H
20-
#define MC23LC1024_H
19+
#ifndef MC23LCXXX_H
20+
#define MC23LCXXX_H
2121

2222
#include "SPI.h"
2323
#include "Storage.h"
2424

2525
/**
26-
* Storage device driver for Microchip 23LC1024, 1M bit SPI Serial
27-
* SRAM.
26+
* Storage device driver for Microchip 23LCXXX, SPI Serial SRAM.
27+
* @param[in] KBYTE size.
2828
* @param[in] SS_PIN slave select board pin.
2929
* @param[in] FREQ max bus frequency for device (default 16 MHz).
30-
* @section Circuit
31-
* @code
32-
* 23LC1024
33-
* +------------+
34-
* (SS)----------------1-|CS U VCC|-8----------------(VCC)
35-
* (MISO)--------------2-|SO HOLD|-7---------(VCC/PULLUP)
36-
* (VCC/PULLUP)--------3-|NU SCK|-6----------------(SCK)
37-
* (GND)---------------4-|VSS SI|-5---------------(MOSI)
38-
* +------------+
39-
* @endcode
4030
*/
41-
template<BOARD::pin_t SS_PIN, uint32_t FREQ = 16000000L>
42-
class MC23LC1024 : public Storage,
31+
template<uint16_t KBYTE, BOARD::pin_t SS_PIN, uint32_t FREQ = 16000000L>
32+
class MC23LCXXX : public Storage,
4333
protected SPI::Device<0, MSBFIRST, FREQ, SS_PIN>
4434
{
4535
public:
@@ -49,9 +39,10 @@ class MC23LC1024 : public Storage,
4939
/**
5040
* Construct and initiate device driver with given slave select
5141
* board pin, max bus frequency, and bus manager.
42+
* @param[in] spi bus manager.
5243
*/
53-
MC23LC1024(SPI& spi) :
54-
Storage(128 * 1024UL),
44+
MC23LCXXX(SPI& spi) :
45+
Storage(KBYTE * 1024UL),
5546
SPI::Device<0, MSBFIRST, FREQ, SS_PIN>(spi)
5647
{}
5748

@@ -69,12 +60,21 @@ class MC23LC1024 : public Storage,
6960
{
7061
uint8_t* sp = (uint8_t*) &src;
7162
header_t header;
63+
size_t size;
7264
header.cmd = READ;
73-
header.addr[0] = sp[2];
74-
header.addr[1] = sp[1];
75-
header.addr[2] = sp[0];
65+
if (KBYTE > 64) {
66+
header.addr[0] = sp[2];
67+
header.addr[1] = sp[1];
68+
header.addr[2] = sp[0];
69+
size = sizeof(header);
70+
}
71+
else {
72+
header.addr[0] = sp[1];
73+
header.addr[1] = sp[0];
74+
size = sizeof(header) - 1;
75+
}
7676
acquire();
77-
write(&header, sizeof(header));
77+
write(&header, size);
7878
read(dst, count);
7979
release();
8080
return (count);
@@ -94,12 +94,21 @@ class MC23LC1024 : public Storage,
9494
{
9595
uint8_t* dp = (uint8_t*) &dst;
9696
header_t header;
97+
size_t size;
9798
header.cmd = WRITE;
98-
header.addr[0] = dp[2];
99-
header.addr[1] = dp[1];
100-
header.addr[2] = dp[0];
99+
if (KBYTE > 64) {
100+
header.addr[0] = dp[2];
101+
header.addr[1] = dp[1];
102+
header.addr[2] = dp[0];
103+
size = sizeof(header);
104+
}
105+
else {
106+
header.addr[0] = dp[1];
107+
header.addr[1] = dp[0];
108+
size = sizeof(header) - 1;
109+
}
101110
acquire();
102-
write(&header, sizeof(header));
111+
write(&header, size);
103112
write(src, count);
104113
release();
105114
return (count);
@@ -109,7 +118,7 @@ class MC23LC1024 : public Storage,
109118
/** Command and address header. */
110119
struct header_t {
111120
uint8_t cmd; //!< Command code.
112-
uint8_t addr[3]; //!< 24-bit address in MSB order.
121+
uint8_t addr[3]; //!< 16/24-bit address in MSB order.
113122
} __attribute__((packed));
114123

115124
/** Command codes. */
@@ -126,4 +135,60 @@ class MC23LC1024 : public Storage,
126135
using SPI::Device<0,MSBFIRST,FREQ,SS_PIN>::write;
127136
using SPI::Device<0,MSBFIRST,FREQ,SS_PIN>::release;
128137
};
138+
139+
/**
140+
* Storage device driver for Microchip 23LC512, 512 Kbit SPI Serial
141+
* SRAM.
142+
* @param[in] SS_PIN slave select board pin.
143+
* @param[in] FREQ max bus frequency for device (default 16 MHz).
144+
* @section Circuit
145+
* @code
146+
* 23LC512
147+
* +------------+
148+
* (SS)----------------1-|CS U VCC|-8----------------(VCC)
149+
* (MISO)--------------2-|SO HOLD|-7---------(VCC/PULLUP)
150+
* (VCC/PULLUP)--------3-|NU SCK|-6----------------(SCK)
151+
* (GND)---------------4-|VSS SI|-5---------------(MOSI)
152+
* +------------+
153+
* @endcode
154+
*/
155+
template<BOARD::pin_t SS_PIN, uint32_t FREQ = 16000000L>
156+
class MC23LC512 : public MC23LCXXX<64, SS_PIN, FREQ> {
157+
public:
158+
/**
159+
* Construct and initiate device driver with given slave select
160+
* board pin, max bus frequency, and bus manager.
161+
* @param[in] spi bus manager.
162+
*/
163+
MC23LC512(SPI& spi) : MC23LCXXX<64, SS_PIN, FREQ>(spi) {}
164+
};
165+
166+
/**
167+
* Storage device driver for Microchip 23LC1024, 1M bit SPI Serial
168+
* SRAM.
169+
* @param[in] SS_PIN slave select board pin.
170+
* @param[in] FREQ max bus frequency for device (default 16 MHz).
171+
* @section Circuit
172+
* @code
173+
* 23LC1024
174+
* +------------+
175+
* (SS)----------------1-|CS U VCC|-8----------------(VCC)
176+
* (MISO)--------------2-|SO HOLD|-7---------(VCC/PULLUP)
177+
* (VCC/PULLUP)--------3-|NU SCK|-6----------------(SCK)
178+
* (GND)---------------4-|VSS SI|-5---------------(MOSI)
179+
* +------------+
180+
* @endcode
181+
*/
182+
template<BOARD::pin_t SS_PIN, uint32_t FREQ = 16000000L>
183+
class MC23LC1024 : public MC23LCXXX<128, SS_PIN, FREQ>
184+
{
185+
public:
186+
/**
187+
* Construct and initiate device driver with given slave select
188+
* board pin, max bus frequency, and bus manager.
189+
* @param[in] spi bus manager.
190+
*/
191+
MC23LC1024(SPI& spi) : MC23LCXXX<128, SS_PIN, FREQ>(spi) {}
192+
};
193+
129194
#endif

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