[Feature] b4 Narrow-to-Widen Cast Problem

[jyc-coding]

Summary

b4 (4-bit) to wider type (b8/b16) casts work in hand-written CCE kernels but are unsupported in VMI/DSL. The root cause spans three layers: missing VMI types, missing VPTO auto-lowering for packed4 part family, and A5 hardware limits.

Motivation / use case

b4 dequant case

Proposed API / behavior

CCE Results (what works)

Conversion	CCE Ticks	Status	Mechanism
INT4→INT8	2,359	PASS	vlds(UNPK4_B8) unpack (no vcvt needed)
FP4→FP8	—	FAIL (A5)	vcvt(bf16→fp8e4m3, PART_EVEN) is A6-only
INT4→FP16	2,358	PASS	vlds(UNPK4_B8) + vcvt(PART_P0)
FP4→BF16	2,520	PASS	vlds(UNPK4_B8) + vcvt(PART_P0)

All working CCE kernels use UNPK4_B8 load (A5-required, since direct NORM load on 4-bit types is A6-only) and are load/store-bound (~74-79 ticks/iter vs ~3-cycle theoretical).

DSL/VMI Gaps (why no DSL support)

Gap 1: No b4 register types

VMI has no vector_f4e2m1x2 / vector_s4x2 types. Cannot declare b4 vectors or write DSL for any b4 cast.

Gap 2: No UNPK4_B8 in vload

vload cannot load packed 4-bit data via UNPK4_B8. CCE kernels rely on this instruction to unpack 4-bit into 8-bit before casting.

Gap 3: VPTO cannot auto-lower part_family="packed4"

Even if b4 types existed, VPTO cannot split a widening cast with part_family="packed4" (4-way P0/P1/P2/P3 split) into multiple hardware instructions. This is the same root cause blocking fp8→fp32 at VL=256.

Conversion	part_family	VMI types?	Auto-lowers?
u8→u32	None (EVEN/ODD)	Yes	Yes
si8→si32	None (EVEN/ODD)	Yes	Yes
f8e4m3→f32	"packed4"	Yes	No (25% valid output)
f4e2m1x2→bf16	"packed4"	No	N/A
s4x2→f16	N/A	No	N/A

VPTO handles 2-way EVEN/ODD split but not 4-way packed4 split.

Gap 4: No part parameter in VMI vcvt

VMI vcvt has no part parameter. Even with b4 types, users cannot manually specify part="P0".."P3" for packed4 family casts.

Alternatives considered

No response

Additional context

No response