Found by the third fresh review of #1408, the pull request that closed #1010. W0 of LTX25-DEVICE-RESIDENCY landed as 89261c955. Its containment case asserts four things about each carrying phase — containment, coverage, exclusivity, non-overlap — and all four are ratios taken against the sub-scope anchor, so an anchor that moves WITH the leaf defeats all four at once.
Two mutations against 89261c955, both compiling clean, both exit 0 on both gates:
- M12 — the circularity. Emit
denoise.step for step_index == 0 only, close denoise after step 0, open phase.finish over steps 1-7. Containment case exit 0, 1/1, 106/106; SUMS case exit 0, 350/350. Emitted table: phase.finish 28.73% of named leaves against denoise 6.11%, on a run whose honest denoise was 39.3%. 82% of the largest phase re-labelled onto its neighbour — M7's defect, on M7's phase, through the gate M7 produced.
- M11 — the writer, which had no anchor at all. Leave the
write(2)s inside decode.video and emit artifacts.frames covering nothing. Containment exit 0, 124/124, SUMS exit 0, 422/422, coverage still 99.68%. artifacts.frames reports 4 microseconds while nine PPM files are written (honest: 0.000186 s), and the whole writer is charged to decode.video — the leaf W5's lever is measured from. Exclusivity is blind because artifacts.frames is a declared partner; non-overlap is blind because the leaves stay disjoint. The driver's own comment above the sink states this must not happen.
Three smaller findings in the same review:
- The case name claimed more than it checked, and
load.dit had no anchor. The case was titled "each named phase CONTAINS the work it is named after" and checked three of about fourteen. Swapping the load.dit and load.prompt_embeds scope NAMES — two lines — moves 96% of the load's seconds onto the wrong name with every gate green. On the shipped 21B that name holds roughly 7.5 minutes of DiT staging, and it is the phase W2 and W3 both act on. ### Owed out of W0 listed seven sub-millisecond leaves as unproven and did not list load.*, conditioning.tower or conditioning.connector — the last two being the 39-100% bound #1269 is about, which W4 acts on.
- A recorded justification pointed the wrong way. The
denoise coverage margin was argued as "a percent of a 40 ms leaf". The per-boundary cost is FIXED while the leaf shrinks, so the ratio degrades as the hardware gets faster: measured 99.228% on a quiet box at a 20 ms leaf against the 0.95 threshold. That is a false-RED risk on faster hardware, not a false pass.
benchmarks/demo/ltx25_phase_log_fixture_cpu.json's _caveat said "Across five such runs" and listed six walls.
Not a correctness defect in the instrument, which three reviews have each found reachable on the shipped default and honest in its records. It is a defect in what the GATE can detect, and it matters because W1 ranks this campaign's levers off this very table.
Found by the third fresh review of #1408, the pull request that closed #1010. W0 of
LTX25-DEVICE-RESIDENCYlanded as89261c955. Its containment case asserts four things about each carrying phase — containment, coverage, exclusivity, non-overlap — and all four are ratios taken against the sub-scope anchor, so an anchor that moves WITH the leaf defeats all four at once.Two mutations against
89261c955, both compiling clean, both exit 0 on both gates:denoise.stepforstep_index == 0only, closedenoiseafter step 0, openphase.finishover steps 1-7. Containment case exit 0, 1/1, 106/106; SUMS case exit 0, 350/350. Emitted table:phase.finish28.73% of named leaves againstdenoise6.11%, on a run whose honest denoise was 39.3%. 82% of the largest phase re-labelled onto its neighbour — M7's defect, on M7's phase, through the gate M7 produced.write(2)s insidedecode.videoand emitartifacts.framescovering nothing. Containment exit 0, 124/124, SUMS exit 0, 422/422, coverage still 99.68%.artifacts.framesreports 4 microseconds while nine PPM files are written (honest: 0.000186 s), and the whole writer is charged todecode.video— the leaf W5's lever is measured from. Exclusivity is blind becauseartifacts.framesis a declared partner; non-overlap is blind because the leaves stay disjoint. The driver's own comment above the sink states this must not happen.Three smaller findings in the same review:
load.dithad no anchor. The case was titled "each named phase CONTAINS the work it is named after" and checked three of about fourteen. Swapping theload.ditandload.prompt_embedsscope NAMES — two lines — moves 96% of the load's seconds onto the wrong name with every gate green. On the shipped 21B that name holds roughly 7.5 minutes of DiT staging, and it is the phase W2 and W3 both act on.### Owed out of W0listed seven sub-millisecond leaves as unproven and did not listload.*,conditioning.towerorconditioning.connector— the last two being the 39-100% bound #1269 is about, which W4 acts on.denoisecoverage margin was argued as "a percent of a 40 ms leaf". The per-boundary cost is FIXED while the leaf shrinks, so the ratio degrades as the hardware gets faster: measured 99.228% on a quiet box at a 20 ms leaf against the 0.95 threshold. That is a false-RED risk on faster hardware, not a false pass.benchmarks/demo/ltx25_phase_log_fixture_cpu.json's_caveatsaid "Across five such runs" and listed six walls.Not a correctness defect in the instrument, which three reviews have each found reachable on the shipped default and honest in its records. It is a defect in what the GATE can detect, and it matters because W1 ranks this campaign's levers off this very table.