Fix Blackwell Roofline

PiperOrigin-RevId: 816766361

Author: Becker-ZH

xprof/utils/hardware_type_utils.cc

@@ -35,6 +35,7 @@ namespace {
 // Below data are calculated from the various NVidia whitepapers/specs.
 
 // https://resources.nvidia.com/en-us-blackwell-architecture?ncid=pa-srch-goog-585983-Intel-Brand-Broad
+// Dense Compute as default.
 const GpuFlopCapabilities kComputeCap_PerSM_PerCycle_10_0 = {
     .cuda_core =
         {
@@ -47,11 +48,11 @@ const GpuFlopCapabilities kComputeCap_PerSM_PerCycle_10_0 = {
     .tensor_core =
         {
             .fp64_tflops = 148,
-            .fp32_tflops = 8192,
-            .bf16_tflops = 16384,
-            .fp16_tflops = 16384,
-            .fp8_tflops = 32768,
-            .int8_tops = 32768,
+            .fp32_tflops = 4096,
+            .bf16_tflops = 8192,
+            .fp16_tflops = 8192,
+            .fp8_tflops = 16384,
+            .int8_tops = 16384,
         },
     .has_tensor_core_sparsity_support = true,
 };

xprof/utils/hardware_type_utils_test.cc

@@ -39,7 +39,7 @@ TEST(HardwareTypeUtilsTest, B200PeakComputTFlops) {
   // Get target TFLOPS per SM and check.
   double peak_tflops =
       GetFlopMaxThroughputPerSM(device_cap) * device_cap.num_cores() / 1000.0;
-  EXPECT_NEAR(peak_tflops, 4438, /*abs_error=*/1.0);
+  EXPECT_NEAR(peak_tflops, 2218, /*abs_error=*/1.0);
 }
 
 // It should fall back to the highest compute cap less than 10.9.
@@ -59,7 +59,7 @@ TEST(HardwareTypeUtilsTest, FutureBlackwellPeakComputTFlops) {
   // Get target TFLOPS per SM and check.
   double peak_tflops =
       GetFlopMaxThroughputPerSM(device_cap) * device_cap.num_cores() / 1000.0;
-  EXPECT_NEAR(peak_tflops, 4438, /*abs_error=*/1.0);
+  EXPECT_NEAR(peak_tflops, 2218, /*abs_error=*/1.0);
 }
 
 TEST(HardwareTypeUtilsTest, H100PeakComputTFlops) {