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Perf-only micro-optimizations — do these only when perf is the actual bottleneck #8

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@DennisSmolek

A holding issue for optimizations that were assessed and deliberately not taken, so they don't get rediscovered as if they were oversights. None of them improves image quality; each adds risk to a core path.

  • textureGather tap packing. EASU/RCAS use per-tap textureLoad. These are the AMD-faithful ports — changing their sampling pattern risks subtle artifacts in exactly the code whose fidelity to ffx_fsr1.h is the project's provenance claim.
  • f16 arithmetic (shader-f16). Needs feature detection plus a full f32 fallback path, doubling the shader matrix, with precision risk in the accumulation math where we've just finished stabilizing convergence.
  • Bind-group caching. Bind groups are rebuilt per dispatch — wasteful but correct. Caching introduces stale-view-on-resize bugs into the core, which is a bad trade for CPU-side time we haven't measured as a bottleneck.
  • Half-res luma analysis. Cheaper, but the shading detector's noise floors were GPU-tuned at the current scale (five iterations, bench/docs/NEXT-STEPS.md item 4) and would need re-tuning.

Do not take these speculatively. Open with a profile showing the pass is the bottleneck on a real workload, then A/B it: node scripts/run-benchmark.mjs --smoke --variant <A> --comparison <B>, plus capture comparison to prove no visual change. The project's own bar is ≥5% repeatable = actionable, <3% = noise, any visual regression rejects.

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