From 7a49675d6fd6f0df9e3c028d042130e467ec2647 Mon Sep 17 00:00:00 2001 From: Abhinaba Rakshit Date: Mon, 19 Jan 2026 13:35:55 +0530 Subject: [PATCH] FROMGIT: arm64: dts: qcom: monaco: add QCrypto node Add Qualcomm Crypto Engine device node for Monaco platform. QCE and Crypto DMA nodes patch was applied as part of commit a86d84409947 ("arm64: dts: qcom: qcs8300: add QCrypto nodes"), however was partially reverted by commit cdc117c40537 ("arm64: dts: qcom: qcs8300: Partially revert "arm64: dts: qcom: qcs8300: add QCrypto nodes"") due to compatible string being mismatched against schema. Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/all/20251224-enable-qualcomm-crypto-engine-for-monaco-v3-1-6073430bbc13@oss.qualcomm.com/ Signed-off-by: Abhinaba Rakshit --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 04d1fea53ea1..dea447857bb5 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -2665,6 +2665,18 @@ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; }; + crypto: crypto@1dfa000 { + compatible = "qcom,qcs8300-qce", "qcom,sm8150-qce", "qcom,qce"; + reg = <0x0 0x01dfa000 0x0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x481 0x0>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "memory"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x20000>;