From 70fe3254b7b8832b58b2293eb5647b9e2fe0cdc1 Mon Sep 17 00:00:00 2001 From: Yang Bo Date: Wed, 28 May 2025 11:18:19 +0800 Subject: [PATCH 1/9] Add amdgpu support for arm SoC Change-Id: Ic95c8514271d246dd668631810e8dee210f7f1b4 Signed-off-by: Yanghaku --- drivers/gpu/drm/ttm/ttm_bo_util.c | 14 +------------- drivers/gpu/drm/ttm/ttm_module.c | 5 +++++ 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index acbbca9d5c92f0..543e4544520d58 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -348,8 +348,6 @@ static int ttm_bo_kmap_ttm(struct ttm_buffer_object *bo, .no_wait_gpu = false }; struct ttm_tt *ttm = bo->ttm; - struct ttm_resource_manager *man = - ttm_manager_type(bo->bdev, bo->resource->mem_type); pgprot_t prot; int ret; @@ -359,17 +357,7 @@ static int ttm_bo_kmap_ttm(struct ttm_buffer_object *bo, if (ret) return ret; - if (num_pages == 1 && ttm->caching == ttm_cached && - !(man->use_tt && (ttm->page_flags & TTM_TT_FLAG_DECRYPTED))) { - /* - * We're mapping a single page, and the desired - * page protection is consistent with the bo. - */ - - map->bo_kmap_type = ttm_bo_map_kmap; - map->page = ttm->pages[start_page]; - map->virtual = kmap(map->page); - } else { + { /* * We need to use vmap to get the desired page protection * or to make the buffer object look contiguous. diff --git a/drivers/gpu/drm/ttm/ttm_module.c b/drivers/gpu/drm/ttm/ttm_module.c index b3fffe7b5062a9..9f3e425626b580 100644 --- a/drivers/gpu/drm/ttm/ttm_module.c +++ b/drivers/gpu/drm/ttm/ttm_module.c @@ -63,7 +63,12 @@ pgprot_t ttm_prot_from_caching(enum ttm_caching caching, pgprot_t tmp) { /* Cached mappings need no adjustment */ if (caching == ttm_cached) + { +#ifdef CONFIG_ARM64 + return pgprot_dmacoherent(tmp); +#endif return tmp; + } #if defined(__i386__) || defined(__x86_64__) if (caching == ttm_write_combined) From e2502c368263642a0e17c1ed4af41545baaf7640 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 30 Sep 2025 10:12:32 +0100 Subject: [PATCH 2/9] drm/i915: Doesn't depend on being X86 --- drivers/gpu/drm/i915/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 5e939004b6463c..7845c8b079a0bf 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -2,7 +2,7 @@ config DRM_I915 tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics" depends on DRM - depends on X86 && PCI + depends on PCI depends on !PREEMPT_RT select INTEL_GTT if X86 select INTERVAL_TREE From 39bc587faa30a5ff4e1ce4a6961e8dd987187458 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 30 Sep 2025 15:02:52 +0100 Subject: [PATCH 3/9] defconfig: Add amdgpu, nouveau, and xe drivers Signed-off-by: Dave Stevenson --- arch/arm64/configs/bcm2711_defconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/configs/bcm2711_defconfig b/arch/arm64/configs/bcm2711_defconfig index af33b8f1b46b48..38518d4567b1be 100644 --- a/arch/arm64/configs/bcm2711_defconfig +++ b/arch/arm64/configs/bcm2711_defconfig @@ -1063,6 +1063,11 @@ CONFIG_AUXDISPLAY=y CONFIG_HD44780=m CONFIG_DRM=m CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_XE=m CONFIG_DRM_UDL=m CONFIG_DRM_PANEL_LVDS=m CONFIG_DRM_PANEL_ILITEK_ILI9806E=m @@ -1619,7 +1624,6 @@ CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_IOCHARSET="ascii" CONFIG_EXFAT_FS=m CONFIG_NTFS3_FS=m -CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_ECRYPT_FS=m CONFIG_HFS_FS=m From 94d0c72ec917c15470e30668d0641493ec7a5b84 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 Oct 2025 15:48:14 +0100 Subject: [PATCH 4/9] drm/i915: Only reset console if enabled Taken from https://github.com/chimera-linux/cports/blob/master/main/linux-stable/patches/xe-nonx86.patch Signed-off-by: Dave Stevenson --- drivers/gpu/drm/i915/display/intel_vga.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 6e125564db34c9..31d3f1f504d26f 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -78,6 +78,7 @@ void intel_vga_disable(struct intel_display *display) void intel_vga_reset_io_mem(struct intel_display *display) { +#if defined(CONFIG_VGA_CONSOLE) struct pci_dev *pdev = to_pci_dev(display->drm->dev); /* @@ -93,6 +94,7 @@ void intel_vga_reset_io_mem(struct intel_display *display) vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); outb(inb(VGA_MIS_R), VGA_MIS_W); vga_put(pdev, VGA_RSRC_LEGACY_IO); +#endif } int intel_vga_register(struct intel_display *display) From 4133b89aa20863b14f7ab4031838fbc18a7abcf7 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 Oct 2025 17:36:34 +0100 Subject: [PATCH 5/9] Fixup 5769e049d5d1 ("fbdev: Allow client to request a particular /dev/fbN node") We lost a line in the forward port, which meant that it always used /dev/fb0, and complained that the sysfs nodes already existed. Fixes: 5769e049d5d1 ("fbdev: Allow client to request a particular /dev/fbN node") Signed-off-by: Dave Stevenson --- drivers/video/fbdev/core/fbmem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c index 676e17b024fb54..b733860a847f06 100644 --- a/drivers/video/fbdev/core/fbmem.c +++ b/drivers/video/fbdev/core/fbmem.c @@ -463,6 +463,7 @@ static int do_register_framebuffer(struct fb_info *fb_info) if (err < 0) return err; + fb_info->node = i; refcount_set(&fb_info->count, 1); mutex_init(&fb_info->lock); mutex_init(&fb_info->mm_lock); From 7f620e2ad8d6c425c9667e81dab078b7d209580c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 Oct 2025 18:42:42 +0100 Subject: [PATCH 6/9] drm/i915: Another legacy path to be nuked Signed-off-by: Dave Stevenson --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ae021942aff874..7002d31d3106ec 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7636,6 +7636,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, * FIXME: Cut over to (async) commit helpers instead of hand-rolling * everything. */ +#if defined(CONFIG_VGA_CONSOLE) if (state->base.legacy_cursor_update) { struct intel_crtc_state *new_crtc_state; struct intel_crtc *crtc; @@ -7644,7 +7645,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) complete_all(&new_crtc_state->uapi.commit->flip_done); } - +#endif ret = intel_atomic_prepare_commit(state); if (ret) { drm_dbg_atomic(display->drm, From 115429b9d31e8a1fb3422a5ba92b67a8a970b6c9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 8 Oct 2025 10:57:31 +0100 Subject: [PATCH 7/9] drm/nouveau: HACK: kill the .sysmem.flush_page_init hook for gk110 --- drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c index 4dc283dedf8b5b..9e8efacd8a6759 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c @@ -59,7 +59,7 @@ gk110_fb = { .init = gf100_fb_init, .init_page = gf100_fb_init_page, .intr = gf100_fb_intr, - .sysmem.flush_page_init = gf100_fb_sysmem_flush_page_init, + //.sysmem.flush_page_init = gf100_fb_sysmem_flush_page_init, .ram_new = gk104_ram_new, .default_bigpage = 17, .clkgate_pack = gk110_fb_clkgate_pack, From 01d0a2e50d1f67235ecb7143d92168a56ad7f5d9 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Wed, 5 Feb 2025 10:24:16 +0000 Subject: [PATCH 8/9] PCI: Release unused bridge resources during resize Resizing BARs can be blocked when a device in the bridge hierarchy itself consumes resources from the resized range. This scenario is common with Intel Arc DG2 GPUs where the following is a typical topology: +-[0000:5d]-+-00.0-[5e-61]----00.0-[5f-61]--+-01.0-[60]----00.0 Intel Corporation DG2 [Arc A380] \-04.0-[61]----00.0 Intel Corporation DG2 Audio Controller Here the system BIOS has provided a large 64bit, prefetchable window: pci_bus 0000:5d: root bus resource [mem 0xb000000000-0xbfffffffff window] But only a small portion is programmed into the root port aperture: pci 0000:5d:00.0: bridge window [mem 0xbfe0000000-0xbff07fffff 64bit pref] The upstream port then provides the following aperture: pci 0000:5e:00.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref] With the missing range found to be consumed by the switch port itself: pci 0000:5e:00.0: BAR 0 [mem 0xbff0000000-0xbff07fffff 64bit pref] The downstream port above the GPU provides the same aperture as upstream: pci 0000:5f:01.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref] Which is entirely consumed by the GPU: pci 0000:60:00.0: BAR 2 [mem 0xbfe0000000-0xbfefffffff 64bit pref] In summary, iomem reports the following: b000000000-bfffffffff : PCI Bus 0000:5d bfe0000000-bff07fffff : PCI Bus 0000:5e bfe0000000-bfefffffff : PCI Bus 0000:5f bfe0000000-bfefffffff : PCI Bus 0000:60 bfe0000000-bfefffffff : 0000:60:00.0 bff0000000-bff07fffff : 0000:5e:00.0 The GPU at 0000:60:00.0 supports a Resizable BAR: Capabilities: [420 v1] Physical Resizable BAR BAR 2: current size: 256MB, supported: 256MB 512MB 1GB 2GB 4GB 8GB However when attempting a resize we get -ENOSPC: pci 0000:60:00.0: BAR 2 [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pcieport 0000:5f:01.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pcieport 0000:5e:00.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pcieport 0000:5e:00.0: bridge window [mem size 0x200000000 64bit pref]: can't assign; no space pcieport 0000:5e:00.0: bridge window [mem size 0x200000000 64bit pref]: failed to assign pcieport 0000:5f:01.0: bridge window [mem size 0x200000000 64bit pref]: can't assign; no space pcieport 0000:5f:01.0: bridge window [mem size 0x200000000 64bit pref]: failed to assign pci 0000:60:00.0: BAR 2 [mem size 0x200000000 64bit pref]: can't assign; no space pci 0000:60:00.0: BAR 2 [mem size 0x200000000 64bit pref]: failed to assign pcieport 0000:5d:00.0: PCI bridge to [bus 5e-61] pcieport 0000:5d:00.0: bridge window [mem 0xb9000000-0xba0fffff] pcieport 0000:5d:00.0: bridge window [mem 0xbfe0000000-0xbff07fffff 64bit pref] pcieport 0000:5e:00.0: PCI bridge to [bus 5f-61] pcieport 0000:5e:00.0: bridge window [mem 0xb9000000-0xba0fffff] pcieport 0000:5e:00.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref] pcieport 0000:5f:01.0: PCI bridge to [bus 60] pcieport 0000:5f:01.0: bridge window [mem 0xb9000000-0xb9ffffff] pcieport 0000:5f:01.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref] pci 0000:60:00.0: BAR 2 [mem 0xbfe0000000-0xbfefffffff 64bit pref]: assigned In this example we need to resize all the way up to the root port aperture, but we refuse to change the root port aperture while resources are allocated for the upstream port BAR. The solution proposed here builds on the idea in commit 91fa127794ac ("PCI: Expose PCIe Resizable BAR support via sysfs") where the BAR can be resized while there is no driver attached. In this case, when there is no driver bound to the upstream switch port we'll release resources of the bridge which match the reallocation. Therefore we can achieve the below successful resize operation by unbinding 0000:5e:00.0 from the pcieport driver before invoking the resource2_resize interface on the GPU at 0000:60:00.0. pci 0000:60:00.0: BAR 2 [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pcieport 0000:5f:01.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pci 0000:5e:00.0: bridge window [mem 0xbfe0000000-0xbfefffffff 64bit pref]: releasing pci 0000:5e:00.0: BAR 0 [mem 0xbff0000000-0xbff07fffff 64bit pref]: releasing pcieport 0000:5d:00.0: bridge window [mem 0xbfe0000000-0xbff07fffff 64bit pref]: releasing pcieport 0000:5d:00.0: bridge window [mem 0xb000000000-0xb2ffffffff 64bit pref]: assigned pci 0000:5e:00.0: bridge window [mem 0xb000000000-0xb1ffffffff 64bit pref]: assigned pci 0000:5e:00.0: BAR 0 [mem 0xb200000000-0xb2007fffff 64bit pref]: assigned pcieport 0000:5f:01.0: bridge window [mem 0xb000000000-0xb1ffffffff 64bit pref]: assigned pci 0000:60:00.0: BAR 2 [mem 0xb000000000-0xb1ffffffff 64bit pref]: assigned pci 0000:5e:00.0: PCI bridge to [bus 5f-61] pci 0000:5e:00.0: bridge window [mem 0xb9000000-0xba0fffff] pci 0000:5e:00.0: bridge window [mem 0xb000000000-0xb1ffffffff 64bit pref] pcieport 0000:5d:00.0: PCI bridge to [bus 5e-61] pcieport 0000:5d:00.0: bridge window [mem 0xb9000000-0xba0fffff] pcieport 0000:5d:00.0: bridge window [mem 0xb000000000-0xb2ffffffff 64bit pref] pci 0000:5e:00.0: PCI bridge to [bus 5f-61] pci 0000:5e:00.0: bridge window [mem 0xb9000000-0xba0fffff] pci 0000:5e:00.0: bridge window [mem 0xb000000000-0xb1ffffffff 64bit pref] pcieport 0000:5f:01.0: PCI bridge to [bus 60] pcieport 0000:5f:01.0: bridge window [mem 0xb9000000-0xb9ffffff] pcieport 0000:5f:01.0: bridge window [mem 0xb000000000-0xb1ffffffff 64bit pref] Link: https://patchwork.kernel.org/project/linux-pci/patch/20240507213125.804474-1-alex.williamson@redhat.com/ Signed-off-by: Alex Williamson Signed-off-by: Jonathan Bell --- drivers/pci/setup-bus.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 7853ac6999e2ca..33d000c3c00331 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -2389,6 +2389,26 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) } EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); +static void pci_release_resource_type(struct pci_dev *pdev, unsigned long type) +{ + int i; + + if (!device_trylock(&pdev->dev)) + return; + + if (pdev->dev.driver) + goto unlock; + + for (i = 0; i < PCI_STD_NUM_BARS; i++) { + if (pci_resource_len(pdev, i) && + !((pci_resource_flags(pdev, i) ^ type) & PCI_RES_TYPE_MASK)) + pci_release_resource(pdev, i); + } + +unlock: + device_unlock(&pdev->dev); +} + int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type) { struct pci_dev_resource *dev_res; @@ -2423,8 +2443,10 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type) pci_info(bridge, "%s %pR: releasing\n", res_name, res); - if (res->parent) + if (res->parent) { release_resource(res); + pci_release_resource_type(bridge, type); + } res->start = 0; res->end = 0; break; From fe3d35cee77b8b670bf933c85016cef12d6ff27f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 8 Oct 2025 11:00:19 +0100 Subject: [PATCH 9/9] defconfig: Add radeon to bcm2711_defconfig --- arch/arm64/configs/bcm2711_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/bcm2711_defconfig b/arch/arm64/configs/bcm2711_defconfig index 38518d4567b1be..2899b5f9928942 100644 --- a/arch/arm64/configs/bcm2711_defconfig +++ b/arch/arm64/configs/bcm2711_defconfig @@ -1063,6 +1063,7 @@ CONFIG_AUXDISPLAY=y CONFIG_HD44780=m CONFIG_DRM=m CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_RADEON=m CONFIG_DRM_AMDGPU=m CONFIG_DRM_AMDGPU_SI=y CONFIG_DRM_AMDGPU_CIK=y