src/mte*: add rules supervisor access to user page and hv loads and stores (#66)

Author: deepak0414

src/mte_tag.adoc

@@ -383,6 +383,38 @@ accesses or self modifying code do not need `MTAG` bit. Thus `MTAG` bit is
 kept as reserved for such page table encodings.
 ====
 
+==== Tag checks on supervisor accesses to user pages
+
+Supervisor accesses to user pages do not generate checked accesses and if
+memory tagging is enabled for user mode then MTAG bit in first stage page
+tables is ignored.
+
+[[HYPERVISOR_LDST]]
+=== Memory tagging and hypervisor memory accesses
+
+HLVX* instructions always generate unchecked loads. HLV*/HSV* instructions in
+HS and HU mode may generate checked accesses depending on effective privilege
+of VS or VU (as defined in privileged specification). Memory accesses generated
+from HLV*/HSV* instructions in HU mode may generate checked accesses when
+`hstatus.HU` is set.
+
+`xMT_MODE` (see <<MEM_TAG_EN>>) for HLV* and HSV* instructions is defined based
+on the effective privilege of VS or VU (as defined in privileged specification),
+execution environment privilege (HS or HU) and may generate checked memory
+accesses (see below).
+
+- Execution environment HS/HU and effective privilege VS : `henvcfg.MT_MODE`
+- Execution environment HS and effective privilege VU : `senvcfg.MT_MODE`
+- Execution environment HU and effective privilege VU : `hstatus.VUMT_MODE`
+
+If page based virtual memory is enabled for V=1, HLV*/HSV* generate checked
+memory accesses based on rules specified by paging bit `MTAG` in first stage
+page tables (see <<TAGGED_PAGE>>).
+
+If HLV*/HSV* instructions result in a tag mismatch, software check exception is
+delivered to HS mode with tval = 4 and hstatus.GVA set. In case of tag mismatch,
+software check exception is always delivered synchronously.
+
 [[MEMTAG_CSR_CTRL]]
 === CSR bits for memory tagging
 
@@ -398,8 +430,26 @@ can be reported asynchronously (see <<ASYNC_SW_CHECK>>).
 [[MEM_TAG_EN]]
 ==== Memory tagging enable and pointer_tag_width
 
-The term `xMT_MODE` is used to determine if memory tagging is enabled in
-current execution environment (privilege mode).
+The term `xMT_MODE` for effective privilege is used to determine if memory
+tagging is enabled on memory accesses. In some cases like hypervisor load and
+store instructions (HLV*/HSV*), effective privilege will be different from
+underlying execution environment privilege. Following table determines source
+for `xMT_MODE` depending on effective privilege.
+
+.`xMT_MODE` source
+[width=100%]
+[%header, cols="^4,^12"]
+|===
+|`Privilege`     | Memory tagging state
+|  M             | mseccfg.MT_MODE
+|  S/HS          | menvcfg.MT_MODE
+|  U/HU          | senvcfg.MT_MODE
+|  VS            | henvcfg.MT_MODE
+|  VU            | senvcfg.MT_MODE
+|  VS(HLV*/HSV*) | henvcfg.MT_MODE
+|  VU(HLV*/HSV* in HS) | senvcfg.MT_MODE
+|  VU(HLV*/HSV* in HU) | hstatus.VUMT_MODE
+|===
 
 Following table describes different encodings of `MT_MODE` and corresponding
 configuration
@@ -544,6 +594,37 @@ When `MT_MODE` is `0b00`, the following rules apply to VS-mode:
 
 * Zimt instructions will revert to their behavior as defined by Zimop.
 
+==== Hypervisor Status Register (`hstatus`)
+
+.Hypervisor status register (`hstatus`)
+[wavedrom, ,svg]
+....
+{reg: [
+  {bits:  5, name: 'WPRI'},
+  {bits:  1, name: 'VSBE'},
+  {bits:  1, name: 'GVA'},
+  {bits:  1, name: 'SPV'},
+  {bits:  1, name: 'SPVP'},
+  {bits:  1, name: 'HU'},
+  {bits:  2, name: 'WPRI'},
+  {bits:  6, name: 'VGEIN'},
+  {bits:  2, name: 'WPRI'},
+  {bits:  1, name: 'VTVM'},
+  {bits:  1, name: 'VTW'},
+  {bits:  1, name: 'VTSR'},
+  {bits:  9, name: 'WPRI'},
+  {bits:  2, name: 'VSXL'},
+  {bits: 14, name: 'WPRI'},
+  {bits:  2, name: 'HUPMM'},
+  {bits:  2, name: 'VUMT_MODE'},
+  {bits: 12, name: 'WPRI'},
+], config:{lanes: 4, hspace:1024}}
+....
+
+The Zimt extension adds `VUMT_MODE` (bit 51:50) to `hstatus`. When the `HU`
+field is set, HLV*/HSV* may generate checked accesses in HU mode. `VUMT_MODE`
+selects the `xMT_MODE` if effective privilege mode is VU.
+
 <<<
 
 === Appendix

src/mte_vatag.adoc

@@ -76,11 +76,12 @@ privileged CSRs.
 |  U             | `svittu`
 |  S / HS        | `svitts`
 |  VS            | `vsvitts`
+|  VU            | `vsvittu`
 |  M             | `mvitt`
 |===
 
-`Svatag` defines the `svittu`, `svitts` and `vsvitts` CSRs while `Smvatag`
-defines `mvitt`.
+`Svatag` defines the `svittu`, `svitts`, `vsvittu`` and `vsvitts` CSRs while
+`Smvatag` defines `mvitt`.
 
 [[TAG_MEM_PROTECTION]]
 === Protection of tag storage
@@ -114,3 +115,6 @@ are implementation defined.
 address space between user and supervisor with user address space spanning
 from zero to maxium positive address while supervisor address space spanning
 from minimum negative value to maximum negative value.
+
+HLV* and HSV* instructions use `vsvittu` or `vsvitts` as base of the tag table
+depending on if `hstatus.SPVP=0` or `hstatus.SPVP=1`, respectively.