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riscv: bump MSRV to 1.67.0
Bumps the MSRV to 1.67.0 for the name change of the integer log functions from `log` to `ilog` variants.
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-14
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.github/workflows/riscv-rt.yaml

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@@ -10,8 +10,8 @@ jobs:
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build-riscv:
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strategy:
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matrix:
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# All generated code should be running on stable now, MRSV is 1.61.0
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toolchain: [ stable, nightly, 1.61.0 ]
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# All generated code should be running on stable now, MRSV is 1.67.0
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toolchain: [ stable, nightly, 1.67.0 ]
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target:
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- riscv32i-unknown-none-elf
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- riscv32im-unknown-none-elf
@@ -28,9 +28,9 @@ jobs:
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- toolchain: nightly
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experimental: true
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exclude:
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- toolchain: 1.61.0
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- toolchain: 1.67.0
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target: riscv32im-unknown-none-elf
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- toolchain: 1.61.0
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- toolchain: 1.67.0
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target: riscv32imafc-unknown-none-elf
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runs-on: ubuntu-latest
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continue-on-error: ${{ matrix.experimental || false }}

.github/workflows/riscv-semihosting.yaml

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@@ -11,8 +11,8 @@ jobs:
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build-riscv:
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strategy:
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matrix:
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# All generated code should be running on stable now, MRSV is 1.61.0
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toolchain: [ stable, nightly, 1.61.0 ]
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# All generated code should be running on stable now, MRSV is 1.67.0
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toolchain: [ stable, nightly, 1.67.0 ]
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target:
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- riscv32i-unknown-none-elf
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- riscv32imc-unknown-none-elf

.github/workflows/riscv-target-parser.yaml

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@@ -11,7 +11,7 @@ jobs:
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strategy:
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matrix:
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os: [ macos-latest, ubuntu-latest, windows-latest ]
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toolchain: [ stable, nightly, 1.61.0 ]
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toolchain: [ stable, nightly, 1.67.0 ]
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include:
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# Nightly is only for reference and allowed to fail
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- rust: nightly

.github/workflows/riscv.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ jobs:
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build-riscv:
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strategy:
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matrix:
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# All generated code should be running on stable now, MRSV is 1.61.0
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toolchain: [ stable, nightly, 1.61.0 ]
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# All generated code should be running on stable now, MRSV is 1.67.0
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toolchain: [ stable, nightly, 1.67.0 ]
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target:
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- riscv32i-unknown-none-elf
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- riscv32imc-unknown-none-elf

.github/workflows/tests.yaml

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@@ -20,8 +20,8 @@ jobs:
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run-build:
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strategy:
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matrix:
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# All generated code should be running on stable now, MRSV is 1.61.0
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toolchain: [ stable, nightly, 1.61.0 ]
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# All generated code should be running on stable now, MRSV is 1.67.0
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toolchain: [ stable, nightly, 1.67.0 ]
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target:
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- riscv32i-unknown-none-elf
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- riscv32im-unknown-none-elf
@@ -37,9 +37,9 @@ jobs:
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- toolchain: nightly
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experimental: true
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exclude:
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- toolchain: 1.61.0
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- toolchain: 1.67.0
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target: riscv32im-unknown-none-elf
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- toolchain: 1.61.0
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- toolchain: 1.67.0
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target: riscv32imafc-unknown-none-elf
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runs-on: ubuntu-latest
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continue-on-error: ${{ matrix.experimental || false }}

riscv/CHANGELOG.md

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@@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Add `senvcfg` CSR
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- Add `scontext` CSR
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- Add `mconfigptr` CSR
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- Bump MSRV to 1.67.0 for `log` to `ilog` name change
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### Changed
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riscv/Cargo.toml

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@@ -2,7 +2,7 @@
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name = "riscv"
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version = "0.13.0"
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edition = "2021"
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rust-version = "1.61"
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rust-version = "1.67"
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repository = "https://github.com/rust-embedded/riscv"
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authors = ["The RISC-V Team <[email protected]>"]
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categories = ["embedded", "hardware-support", "no-std"]

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