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andre-richterandre-richter
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Improve some func/var naming
1 parent 57c6f72 commit 431b18d

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16 files changed

+179
-133
lines changed

16 files changed

+179
-133
lines changed

‎14_virtual_mem_part2_mmio_remap/README.md

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -463,13 +463,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
463463
/// Create an instance.
464464
- pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
465465
+ pub fn from_output_page(
466-
+ phys_output_page: *const Page<Physical>,
466+
+ phys_output_page_ptr: *const Page<Physical>,
467467
+ attribute_fields: &AttributeFields,
468468
+ ) -> Self {
469469
let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
470470

471471
- let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
472-
+ let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
472+
+ let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
473473
val.write(
474474
STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
475475
+ STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -544,9 +544,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
544544
+ #[inline(always)]
545545
+ fn lvl2_lvl3_index_from_page(
546546
+ &self,
547-
+ virt_page: *const Page<Virtual>,
547+
+ virt_page_ptr: *const Page<Virtual>,
548548
+ ) -> Result<(usize, usize), &'static str> {
549-
+ let addr = virt_page as usize;
549+
+ let addr = virt_page_ptr as usize;
550550
+ let lvl2_index = addr >> Granule512MiB::SHIFT;
551551
+ let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
552552
+
@@ -568,10 +568,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
568568
+ #[inline(always)]
569569
+ fn set_page_descriptor_from_page(
570570
+ &mut self,
571-
+ virt_page: *const Page<Virtual>,
571+
+ virt_page_ptr: *const Page<Virtual>,
572572
+ new_desc: &PageDescriptor,
573573
+ ) -> Result<(), &'static str> {
574-
+ let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
574+
+ let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
575575
+ let desc = &mut self.lvl3[lvl2_index][lvl3_index];
576576

577577
- for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
@@ -637,7 +637,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
637637
+ return Err("Tried to map page slices with unequal sizes");
638638
+ }
639639
+
640-
+ if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
640+
+ if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
641641
+ return Err("Tried to map outside of physical address space");
642642
+ }
643643
+
@@ -1624,7 +1624,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
16241624
+}
16251625
+
16261626
+/// Pointer to the last page of the physical address space.
1627-
+pub fn phys_addr_space_end_page() -> *const Page<Physical> {
1627+
+pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
16281628
+ common::align_down(
16291629
+ super::phys_addr_space_end().into_usize(),
16301630
+ KernelGranule::SIZE,
@@ -2582,7 +2582,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
25822582
+ }
25832583
+
25842584
+ /// Return a pointer to the first page of the described slice.
2585-
+ const fn first_page(&self) -> *const Page<ATYPE> {
2585+
+ const fn first_page_ptr(&self) -> *const Page<ATYPE> {
25862586
+ self.start.into_usize() as *const _
25872587
+ }
25882588
+
@@ -2622,7 +2622,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
26222622
+ ///
26232623
+ /// - Same as applies for `core::slice::from_raw_parts`.
26242624
+ pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
2625-
+ core::slice::from_raw_parts(self.first_page(), self.num_pages)
2625+
+ core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
26262626
+ }
26272627
+}
26282628
+

‎14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -230,12 +230,12 @@ impl PageDescriptor {
230230

231231
/// Create an instance.
232232
pub fn from_output_page(
233-
phys_output_page: *const Page<Physical>,
233+
phys_output_page_ptr: *const Page<Physical>,
234234
attribute_fields: &AttributeFields,
235235
) -> Self {
236236
let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
237237

238-
let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
238+
let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
239239
val.write(
240240
STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
241241
+ STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -310,9 +310,9 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
310310
#[inline(always)]
311311
fn lvl2_lvl3_index_from_page(
312312
&self,
313-
virt_page: *const Page<Virtual>,
313+
virt_page_ptr: *const Page<Virtual>,
314314
) -> Result<(usize, usize), &'static str> {
315-
let addr = virt_page as usize;
315+
let addr = virt_page_ptr as usize;
316316
let lvl2_index = addr >> Granule512MiB::SHIFT;
317317
let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
318318

@@ -329,10 +329,10 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
329329
#[inline(always)]
330330
fn set_page_descriptor_from_page(
331331
&mut self,
332-
virt_page: *const Page<Virtual>,
332+
virt_page_ptr: *const Page<Virtual>,
333333
new_desc: &PageDescriptor,
334334
) -> Result<(), &'static str> {
335-
let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
335+
let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
336336
let desc = &mut self.lvl3[lvl2_index][lvl3_index];
337337

338338
if desc.is_valid() {
@@ -392,7 +392,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
392392
return Err("Tried to map page slices with unequal sizes");
393393
}
394394

395-
if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
395+
if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
396396
return Err("Tried to map outside of physical address space");
397397
}
398398

‎14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
101101
}
102102

103103
/// Pointer to the last page of the physical address space.
104-
pub fn phys_addr_space_end_page() -> *const Page<Physical> {
104+
pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
105105
common::align_down(
106106
super::phys_addr_space_end().into_usize(),
107107
KernelGranule::SIZE,

‎14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
9292
}
9393

9494
/// Return a pointer to the first page of the described slice.
95-
const fn first_page(&self) -> *const Page<ATYPE> {
95+
const fn first_page_ptr(&self) -> *const Page<ATYPE> {
9696
self.start.into_usize() as *const _
9797
}
9898

@@ -132,7 +132,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
132132
///
133133
/// - Same as applies for `core::slice::from_raw_parts`.
134134
pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
135-
core::slice::from_raw_parts(self.first_page(), self.num_pages)
135+
core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
136136
}
137137
}
138138

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