diff --git a/src/util.rs b/src/util.rs index a90b83b0..9caf0dc5 100644 --- a/src/util.rs +++ b/src/util.rs @@ -179,11 +179,24 @@ pub fn escape_brackets(s: &str) -> String { /// Escape basic html tags and brackets pub fn escape_special_chars(s: &str) -> Cow<'_, str> { - if s.contains('[') { - escape_brackets(s).into() - } else { - s.into() + if !s.contains('[') && !s.contains('&') && !s.contains('<') && !s.contains('>'){ + return s.into(); + } + let mut escaped = s.to_string(); + if escaped.contains('&') { + escaped = escaped.replace('&', "&"); + } + if escaped.contains('<') { + escaped = escaped.replace('<', "<"); + } + if escaped.contains('>') { + escaped = escaped.replace('>', ">"); + } + if escaped.contains('[') { + escaped = escape_brackets(&escaped); } + escaped.into() + } pub fn name_of(maybe_array: &MaybeArray, ignore_group: bool) -> String { @@ -513,3 +526,16 @@ fn pascalcase() { assert_eq!(to_pascal_case("FOO_BAR_1_2"), "FooBar1_2"); assert_eq!(to_pascal_case("FOO_BAR_1_2_"), "FooBar1_2_"); } + +#[test] +fn test_escape_special_chars() { + assert_eq!(escape_special_chars("Array[0]"), "Array\\[0\\]"); + assert_eq!(escape_special_chars("Enable & disable"), "Enable & disable"); + assert_eq!(escape_special_chars("Wait < 10"), "Wait < 10"); + assert_eq!(escape_special_chars("Delay > 5"), "Delay > 5"); + assert_eq!( + escape_special_chars("Flags & [Status] > 100"), + "Flags & \\[Status\\] > 100" + ); +} + diff --git a/svd2rust-regress/src/tests.rs b/svd2rust-regress/src/tests.rs index f6c2f73d..68135b2b 100644 --- a/svd2rust-regress/src/tests.rs +++ b/svd2rust-regress/src/tests.rs @@ -27,6 +27,8 @@ pub enum Manufacturer { RaspberryPi, Renesas, Unknown, + GigaDevice, + WCH, } impl Manufacturer { @@ -51,6 +53,8 @@ impl Manufacturer { Renesas, TexasInstruments, Espressif, + GigaDevice, + WCH, ] } } diff --git a/svd2rust-regress/tests.yml b/svd2rust-regress/tests.yml index bf17e088..6b50d249 100644 --- a/svd2rust-regress/tests.yml +++ b/svd2rust-regress/tests.yml @@ -443,7 +443,11 @@ mfgr: SiFive chip: fu540 svd_url: https://raw.githubusercontent.com/riscv-rust/fu540-pac/master/fu540.svd - +- arch: riscv + mfgr: WCH + chip: ch32v30x + svd_url: https://raw.githubusercontent.com/ch32-rs/ch32v30x/main/ch32v30x.svd + # SiliconLabs - arch: cortex-m mfgr: SiliconLabs