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committedNov 27, 2023
Auto merge of #117947 - Dirbaio:drop-llvm-15, r=cuviper
Update the minimum external LLVM to 16. With this change, we'll have stable support for LLVM 16 and 17. For reference, the previous increase to LLVM 15 was #114148 [Relevant zulip discussion](https://rust-lang.zulipchat.com/#narrow/stream/131828-t-compiler/topic/riscv.20forced-atomics)
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‎.github/workflows/ci.yml

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@@ -56,7 +56,7 @@ jobs:
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- name: mingw-check-tidy
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os: ubuntu-20.04-4core-16gb
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env: {}
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- name: x86_64-gnu-llvm-15
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- name: x86_64-gnu-llvm-16
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env:
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ENABLE_GCC_CODEGEN: "1"
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os: ubuntu-20.04-16core-64gb
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env:
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RUST_BACKTRACE: 1
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os: ubuntu-20.04-8core-32gb
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- name: x86_64-gnu-llvm-15
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env:
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RUST_BACKTRACE: 1
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os: ubuntu-20.04-8core-32gb
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- name: x86_64-gnu-nopt
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os: ubuntu-20.04-4core-16gb
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env: {}

‎compiler/rustc_codegen_llvm/src/context.rs

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@@ -134,18 +134,6 @@ pub unsafe fn create_module<'ll>(
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let mut target_data_layout = sess.target.data_layout.to_string();
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let llvm_version = llvm_util::get_version();
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if llvm_version < (16, 0, 0) {
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if sess.target.arch == "s390x" {
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// LLVM 16 data layout changed to always set 64-bit vector alignment,
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// which is conditional in earlier LLVM versions.
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// https://reviews.llvm.org/D131158 for the discussion.
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target_data_layout = target_data_layout.replace("-v128:64", "");
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} else if sess.target.arch == "riscv64" {
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// LLVM 16 introduced this change so as to produce more efficient code.
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// See https://reviews.llvm.org/D116735 for the discussion.
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target_data_layout = target_data_layout.replace("-n32:64-", "-n64-");
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}
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}
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if llvm_version < (17, 0, 0) {
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if sess.target.arch.starts_with("powerpc") {
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// LLVM 17 specifies function pointer alignment for ppc:

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