@@ -24470,6 +24470,73 @@ pub fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
2447024470#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s16)"]
2447124471#[inline]
2447224472#[target_feature(enable = "neon")]
24473+ #[cfg(target_endian = "little")]
24474+ #[cfg_attr(test, assert_instr(rsubhn2))]
24475+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24476+ pub fn vrsubhn_high_s16(a: int8x8_t, b: int16x8_t, c: int16x8_t) -> int8x16_t {
24477+ let x: int8x8_t = vrsubhn_s16(b, c);
24478+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) }
24479+ }
24480+ #[doc = "Rounding subtract returning high narrow"]
24481+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s32)"]
24482+ #[inline]
24483+ #[target_feature(enable = "neon")]
24484+ #[cfg(target_endian = "little")]
24485+ #[cfg_attr(test, assert_instr(rsubhn2))]
24486+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24487+ pub fn vrsubhn_high_s32(a: int16x4_t, b: int32x4_t, c: int32x4_t) -> int16x8_t {
24488+ let x: int16x4_t = vrsubhn_s32(b, c);
24489+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3, 4, 5, 6, 7]) }
24490+ }
24491+ #[doc = "Rounding subtract returning high narrow"]
24492+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s64)"]
24493+ #[inline]
24494+ #[target_feature(enable = "neon")]
24495+ #[cfg(target_endian = "little")]
24496+ #[cfg_attr(test, assert_instr(rsubhn2))]
24497+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24498+ pub fn vrsubhn_high_s64(a: int32x2_t, b: int64x2_t, c: int64x2_t) -> int32x4_t {
24499+ let x: int32x2_t = vrsubhn_s64(b, c);
24500+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3]) }
24501+ }
24502+ #[doc = "Rounding subtract returning high narrow"]
24503+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u16)"]
24504+ #[inline]
24505+ #[target_feature(enable = "neon")]
24506+ #[cfg(target_endian = "little")]
24507+ #[cfg_attr(test, assert_instr(rsubhn2))]
24508+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24509+ pub fn vrsubhn_high_u16(a: uint8x8_t, b: uint16x8_t, c: uint16x8_t) -> uint8x16_t {
24510+ let x: uint8x8_t = vrsubhn_u16(b, c);
24511+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) }
24512+ }
24513+ #[doc = "Rounding subtract returning high narrow"]
24514+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u32)"]
24515+ #[inline]
24516+ #[target_feature(enable = "neon")]
24517+ #[cfg(target_endian = "little")]
24518+ #[cfg_attr(test, assert_instr(rsubhn2))]
24519+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24520+ pub fn vrsubhn_high_u32(a: uint16x4_t, b: uint32x4_t, c: uint32x4_t) -> uint16x8_t {
24521+ let x: uint16x4_t = vrsubhn_u32(b, c);
24522+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3, 4, 5, 6, 7]) }
24523+ }
24524+ #[doc = "Rounding subtract returning high narrow"]
24525+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u64)"]
24526+ #[inline]
24527+ #[target_feature(enable = "neon")]
24528+ #[cfg(target_endian = "little")]
24529+ #[cfg_attr(test, assert_instr(rsubhn2))]
24530+ #[stable(feature = "neon_intrinsics", since = "1.59.0")]
24531+ pub fn vrsubhn_high_u64(a: uint32x2_t, b: uint64x2_t, c: uint64x2_t) -> uint32x4_t {
24532+ let x: uint32x2_t = vrsubhn_u64(b, c);
24533+ unsafe { simd_shuffle!(a, x, [0, 1, 2, 3]) }
24534+ }
24535+ #[doc = "Rounding subtract returning high narrow"]
24536+ #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s16)"]
24537+ #[inline]
24538+ #[target_feature(enable = "neon")]
24539+ #[cfg(target_endian = "big")]
2447324540#[cfg_attr(test, assert_instr(rsubhn))]
2447424541#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2447524542pub fn vrsubhn_high_s16(a: int8x8_t, b: int16x8_t, c: int16x8_t) -> int8x16_t {
@@ -24480,6 +24547,7 @@ pub fn vrsubhn_high_s16(a: int8x8_t, b: int16x8_t, c: int16x8_t) -> int8x16_t {
2448024547#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s32)"]
2448124548#[inline]
2448224549#[target_feature(enable = "neon")]
24550+ #[cfg(target_endian = "big")]
2448324551#[cfg_attr(test, assert_instr(rsubhn))]
2448424552#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2448524553pub fn vrsubhn_high_s32(a: int16x4_t, b: int32x4_t, c: int32x4_t) -> int16x8_t {
@@ -24490,6 +24558,7 @@ pub fn vrsubhn_high_s32(a: int16x4_t, b: int32x4_t, c: int32x4_t) -> int16x8_t {
2449024558#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s64)"]
2449124559#[inline]
2449224560#[target_feature(enable = "neon")]
24561+ #[cfg(target_endian = "big")]
2449324562#[cfg_attr(test, assert_instr(rsubhn))]
2449424563#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2449524564pub fn vrsubhn_high_s64(a: int32x2_t, b: int64x2_t, c: int64x2_t) -> int32x4_t {
@@ -24500,6 +24569,7 @@ pub fn vrsubhn_high_s64(a: int32x2_t, b: int64x2_t, c: int64x2_t) -> int32x4_t {
2450024569#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u16)"]
2450124570#[inline]
2450224571#[target_feature(enable = "neon")]
24572+ #[cfg(target_endian = "big")]
2450324573#[cfg_attr(test, assert_instr(rsubhn))]
2450424574#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2450524575pub fn vrsubhn_high_u16(a: uint8x8_t, b: uint16x8_t, c: uint16x8_t) -> uint8x16_t {
@@ -24510,6 +24580,7 @@ pub fn vrsubhn_high_u16(a: uint8x8_t, b: uint16x8_t, c: uint16x8_t) -> uint8x16_
2451024580#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u32)"]
2451124581#[inline]
2451224582#[target_feature(enable = "neon")]
24583+ #[cfg(target_endian = "big")]
2451324584#[cfg_attr(test, assert_instr(rsubhn))]
2451424585#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2451524586pub fn vrsubhn_high_u32(a: uint16x4_t, b: uint32x4_t, c: uint32x4_t) -> uint16x8_t {
@@ -24520,6 +24591,7 @@ pub fn vrsubhn_high_u32(a: uint16x4_t, b: uint32x4_t, c: uint32x4_t) -> uint16x8
2452024591#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u64)"]
2452124592#[inline]
2452224593#[target_feature(enable = "neon")]
24594+ #[cfg(target_endian = "big")]
2452324595#[cfg_attr(test, assert_instr(rsubhn))]
2452424596#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2452524597pub fn vrsubhn_high_u64(a: uint32x2_t, b: uint64x2_t, c: uint64x2_t) -> uint32x4_t {
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