diff --git a/src/capability/mod.rs b/src/capability/mod.rs index a8c1176..58463ce 100644 --- a/src/capability/mod.rs +++ b/src/capability/mod.rs @@ -87,6 +87,28 @@ impl PciCapability { _ => Some(PciCapability::Unknown { address, id }), } } + + pub fn address(&self) -> PciCapabilityAddress { + match *self { + PciCapability::PowerManagement(address) => address, + PciCapability::AcceleratedGraphicsPort(address) => address, + PciCapability::VitalProductData(address) => address, + PciCapability::SlotIdentification(address) => address, + PciCapability::Msi(msi_cap) => msi_cap.address, + PciCapability::CompactPCIHotswap(address) => address, + PciCapability::PciX(address) => address, + PciCapability::HyperTransport(address) => address, + PciCapability::Vendor(address) => address, + PciCapability::DebugPort(address) => address, + PciCapability::CompactPCICentralResourceControl(address) => address, + PciCapability::PciHotPlugControl(address) => address, + PciCapability::BridgeSubsystemVendorId(address) => address, + PciCapability::AGP3(address) => address, + PciCapability::PciExpress(address) => address, + PciCapability::MsiX(msix_cap) => msix_cap.address, + PciCapability::Unknown { address, id: _ } => address, + } + } } pub struct CapabilityIterator { diff --git a/src/capability/msi.rs b/src/capability/msi.rs index 72a52a9..6ec65a1 100644 --- a/src/capability/msi.rs +++ b/src/capability/msi.rs @@ -47,7 +47,7 @@ pub enum TriggerMode { #[derive(Debug, Clone, Copy)] pub struct MsiCapability { - address: PciCapabilityAddress, + pub(super) address: PciCapabilityAddress, per_vector_masking: bool, is_64bit: bool, multiple_message_capable: MultipleMessageSupport, diff --git a/src/capability/msix.rs b/src/capability/msix.rs index 50b3a63..b60c89f 100644 --- a/src/capability/msix.rs +++ b/src/capability/msix.rs @@ -4,7 +4,7 @@ use bit_field::BitField; #[derive(Clone, Copy, Debug)] pub struct MsixCapability { - address: PciCapabilityAddress, + pub(super) address: PciCapabilityAddress, table_size: u16, /// Table BAR in bits 0..3 and offset into that BAR in bits 3..31 table: u32,