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Merge pull request #109 from siliconcompiler/interposer
interposer pdk
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‎README.md

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Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ Supported PDKs:
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* [Skywater130](lambdapdk/sky130/base/README.md)
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* [Global Foundries 180](lambdapdk/gf180/README.md)
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* [IHP 180](https://github.com/IHP-GmbH/IHP-Open-PDK)
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* [interposer](lambdapdk/interposer/README.md)
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# License
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‎lambdapdk/__init__.py

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@@ -20,10 +20,10 @@ def get_pdks():
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Returns a list of pdk names in lambdapdk
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'''
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from lambdapdk import asap7, freepdk45, sky130, gf180, ihp130
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from lambdapdk import asap7, freepdk45, sky130, gf180, ihp130, interposer
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all_pdks = []
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for pdk_mod in [asap7, freepdk45, sky130, gf180, ihp130]:
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for pdk_mod in [asap7, freepdk45, sky130, gf180, ihp130, interposer]:
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pdks = pdk_mod.setup()
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if not isinstance(pdks, (list, tuple)):
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pdks = [pdks]
@@ -43,14 +43,16 @@ def get_libs():
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from lambdapdk.sky130.libs import sky130sc, sky130io, sky130sram
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from lambdapdk.gf180.libs import gf180mcu, gf180io, gf180sram
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from lambdapdk.ihp130.libs import sg13g2_stdcell, sg13g2_sram
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from lambdapdk.interposer.libs import bumps as interposer_bumps
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all_libs = []
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for lib_mod in [
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asap7sc7p5t, fakeram7, fakeio7,
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nangate45, fakeram45,
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sky130sc, sky130io, sky130sram,
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gf180mcu, gf180io, gf180sram,
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sg13g2_stdcell, sg13g2_sram]:
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sg13g2_stdcell, sg13g2_sram,
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interposer_bumps]:
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libs = lib_mod.setup()
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if not isinstance(libs, (list, tuple)):
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libs = [libs]

‎lambdapdk/ihp130/libs/sg13g2_sram.py

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@@ -15,7 +15,7 @@ def setup():
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path_base = 'ihp-sg13g2/libs.ref/sg13g2_sram'
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lib.add('output', stackup, 'lef', f'{path_base}/lef/{mem_name}.lef')
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lib.add('output', stackup, 'gds', f'{path_base}/gds/{mem_name}.gds')
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lib.add('output', stackup, 'cdl', f'{path_base}/spice/{mem_name}.cdl')
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lib.add('output', stackup, 'cdl', f'{path_base}/cdl/{mem_name}.cdl')
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lib.add('output', 'typ', 'nldm', f'{path_base}/lib/{mem_name}_typ_1p20V_25C.lib')
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lib.add('output', 'slow', 'nldm', f'{path_base}/lib/{mem_name}_slow_1p08V_125C.lib')

‎lambdapdk/interposer/README.md

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# Interposer
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The interposer PDK is a passive technology with a number of
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simulated stackups. The PDK contains enablement for place and
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route tools and design rule signoff.
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Note that this process design kit is provided as an academic
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and research aid only and the resulting designs are not manufacturable.
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## Stackups
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### 3ML_0400
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 400nm | 400nm
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------------------------------ | ------- | -------
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metal2 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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### 4ML_0400
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 400nm | 400nm
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------------------------------ | ------- | -------
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metal3 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal2 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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### 5ML_0400
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 400nm | 400nm
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------------------------------ | ------- | -------
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metal4 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal3 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal2 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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### 3ML_0800
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 800nm | 800nm
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------------------------------ | ------- | -------
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metal2 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal1 | 800nm | 800nm
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------------------------------ | ------- | -------
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```
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### 4ML_0800
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 800nm | 800nm
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------------------------------ | ------- | -------
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metal3 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal2 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal1 | 800nm | 800nm
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------------------------------ | ------- | -------
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```
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### 5ML_0800
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 800nm | 800nm
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------------------------------ | ------- | -------
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metal4 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal3 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal2 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal1 | 800nm | 800nm
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------------------------------ | ------- | -------
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```
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### 3ML_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal2 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal1 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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```
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### 4ML_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal3 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal2 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal1 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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```
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### 5ML_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal4 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal3 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal2 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal1 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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```
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### 3ML_0400_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal2 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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### 4ML_0400_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal3 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal2 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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### 5ML_0400_2000
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```
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metal name | width | spacing
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------------------------------ | ------- | -------
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topmetal | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal4 | 2000nm | 2000nm
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------------------------------ | ------- | -------
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metal3 | 800nm | 800nm
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------------------------------ | ------- | -------
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metal2 | 400nm | 400nm
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------------------------------ | ------- | -------
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metal1 | 400nm | 400nm
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------------------------------ | ------- | -------
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```
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## License
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```
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Copyright 2024 ZeroASIC Corp
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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https://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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```

‎lambdapdk/interposer/__init__.py

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import os
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import siliconcompiler
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from lambdapdk import register_data_source
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stackups = []
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for m in ("3ML", "4ML", "5ML"):
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for w in ("0400", "0800", "2000", "0400_2000"):
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stackups.append(f'{m}_{w}')
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####################################################
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# PDK Setup
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####################################################
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def setup():
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'''
17+
The interposer PDK is a passive technology with a number of
18+
simulated stackups. The PDK contains enablement for place and
19+
route tools and design rule signoff.
20+
Note that this process design kit is provided as an academic
21+
and research aid only and the resulting designs are not manufacturable.
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'''
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24+
foundry = 'virtual'
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process = 'interposer'
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libtype = 'none'
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node = 130
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# TODO: dummy numbers, only matter for cost estimation
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wafersize = 300
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hscribe = 0.1
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vscribe = 0.1
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edgemargin = 2
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pdkdir = os.path.join('lambdapdk', 'interposer', 'base')
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pdk = siliconcompiler.PDK(process, package='lambdapdk')
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register_data_source(pdk)
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# process name
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pdk.set('pdk', process, 'foundry', foundry)
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pdk.set('pdk', process, 'node', node)
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pdk.set('pdk', process, 'version', 'v0.0.1')
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pdk.set('pdk', process, 'stackup', stackups)
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pdk.set('pdk', process, 'wafersize', wafersize)
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pdk.set('pdk', process, 'edgemargin', edgemargin)
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pdk.set('pdk', process, 'scribe', (hscribe, vscribe))
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# APR Setup
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for stackup in stackups:
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for tool in ('openroad', 'klayout', 'magic'):
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pdk.set('pdk', process, 'aprtech', tool, stackup, libtype, 'lef',
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pdkdir + f'/apr/{stackup}.lef')
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pdk.set('pdk', process, 'minlayer', stackup, 'metal1')
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pdk.set('pdk', process, 'maxlayer', stackup, 'topmetal')
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# DRC Runsets
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pdk.set('pdk', process, 'drc', 'runset', 'klayout', stackup, 'drc',
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pdkdir + f'/setup/klayout/{stackup}.drc')
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key = 'drc_params:drc'
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pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'input=<input>')
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pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'topcell=<topcell>')
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pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'report=<report>')
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pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'threads=<threads>')
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# Layer map and display file
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pdk.set('pdk', process, 'layermap', 'klayout', 'def', 'gds', stackup,
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pdkdir + f'/apr/{stackup}.layermap')
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pdk.set('pdk', process, 'display', 'klayout', stackup,
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pdkdir + f'/setup/klayout/{stackup}.lyp')
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pdk.set('pdk', process, 'aprtech', 'openroad', stackup, libtype, 'fill',
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pdkdir + f'/dfm/openroad/{stackup}.fill.json')
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# Openroad global routing grid derating
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openroad_layer_adjustments = {
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'metal1': 0.20,
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'metal2': 0.20,
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'metal3': 0.20,
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'metal4': 0.20,
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'metal5': 0.20,
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'metal6': 0.20,
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'topmetal': 0.20
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}
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for layer, adj in openroad_layer_adjustments.items():
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if layer != 'topmetal' and int(layer[-1]) >= int(stackup[0]):
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continue
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pdk.set('pdk', process, 'var', 'openroad', f'{layer}_adjustment', stackup, adj)
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pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'metal2')
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pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'metal2')
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'metal2')
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'metal3')
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# PEX
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for corner in ["minimum", "typical", "maximum"]:
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pdk.set('pdk', process, 'pexmodel', 'openroad', stackup, corner,
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pdkdir + '/pex/openroad/' + stackup + '.' + corner + '.tcl')
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return pdk
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#########################
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if __name__ == "__main__":
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pdk = setup()
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pdk.write_manifest(f'{pdk.top()}.json')
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pdk.check_filepaths()

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