Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

v1.3.1 Changelog #105

Open
maciejprzybysz opened this issue Dec 21, 2021 · 0 comments
Open

v1.3.1 Changelog #105

maciejprzybysz opened this issue Dec 21, 2021 · 0 comments

Comments

@maciejprzybysz
Copy link
Member

Validation errors fixed #100
USB ID line connected to ESD diode #101
ETH termination resistors designators fixed #99
Board outline fixed #102
3D models moved from Mechanical1 to Mechanical13 #102
Top overlay changed not to overlap SMD pads #103
VIAs tenting added (rule) #104
FTG4 footprint fixed
Minor layout changes
PCB synchronized with SCH, component links updated
Revision number changed to v1.3.1 (on sch, pcb & panel)

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant