Packages (Footprints)

Footprints/Packages

• Name/Value

  • All footprints need >Name (on the tNames layer). Size should be 0.024", 20% ratio, vector.
  • All footprints need >Value (on the tValues layer). Size should be 0.024", 20% ratio, vector.
  • Align as follows:
    • Resistors: Centered, above and below
    • Capacitors: Centered, left and right
    • Headers:
      • Name position: origin point bottom left, X:-0.5, Y:0.055 (this ensures clearance from silk outline wire)
      • Value position: origin point bottom left, X:-0.5, Y:.-0.08 (this ensures clearance from silk outline wire)

• Part Outline

  • All footprints need silkscreen or tDocu indicators showing mechanical sizes, dimensions or anything weird about the part.
  • Silkscreen within a footprint or board should NOT go over pads or metal that will be exposed.
  • Silkscreen of footprint should have a width of 0.008". 0.005" is allowed for 0603 or smaller packages. Make it look good.
  • Avoid silkscreen under part - this may affect reflow negatively.

• IPC defines standards for courtyard excess for component footprints. Examples of these can be seen on our small SMC packages used for resistors and capacitors. These are drawn as rectangles (0.002" wide lines) on the tKeepout, or possibly bKeepout layers.
  • The courtyard is defined as the smallest rectangular area that can contain the component and its land pattern.
  • Courtyard excess is a buffer around this to mark the minimum electrical and mechanical clearances around the courtyard.
  • IPC 7351 defines 3 sizes of courtyard excess; minimum (least 0.1 mm), medium (nominal 0.25 mm), and maximum (most 0.5 mm)
  • At SparkFun we use 0.2 mm courtyard excess rounded to the nearest 0.05 mm. This is roughly the nominal defined by the standard.

• Pins

  • Make pin names numeric.
    • BGA pins should be labeled by their standard alphanumeric code.
  • Components with exposed pads on the underside should use "EPAD" for that pin.
  • Include a polarity/pin 1 marking on the silkscreen.
    • Ensure this marking is visible after the component is placed on board.
    • Draw with a zero width circle. 5 mil might make a good radius depending on the part. Command line way to make one at the origin:
      • GRID MIL 1;
      • SET WIDTH 0;
      • LAYER 21;
      • CIRCLE (0 0) (5 0);

• Every new footprint and part will have a description containing part information and whether the footprint has been proven.

• Before you make a new footprint, check the existing SparkFun and built-in EAGLE libraries to see if it exists.

• If possible, compare a 1:1 printout with a sample of the part you created before you order prototypes.

• Be sure that pads have the "Thermals" box checked- this ensures thermal relief traces will connect the pad to planes, make it easier to solder.

• If you're making custom solder mask regions, a filled circle can be created by setting the line width of the circle tool to 0.

• For very tight packages, consult QC about getting an AOI-derived footprint made.

• Footprint origin set as follows:

  • Headers: Pin 1 position: 0,0 in the center of the drill hit. Additional pins grow to the right. (Y: 0) (X: 0.1, 0.2, 0.3 etc)
  • Resistors: Center of device
  • Capacitors: Center of device
  • Boards: Center of device

• Description:

• Use the following format:

  [Package Name] - [Package Short Description]

  Specifications:

  • Pin count: [PIN COUNT]
  • Pin pitch: [PIN PITCH]
  • Area: [WIDTH x LENGTH]

  Datasheet referenced for footprint

  Example device(s):

  • [EXAMPLE DEVICE 1]
  • [EXAMPLE DEVICE 2]