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Merge pull request #2586 from fpistm/stm32cubeH5_update
chore(h5): update to latest STM32CubeH5 v1.4.0
2 parents d7b460f + 62168c0 commit 0314f80

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‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h503xx.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@ typedef enum
186186
/** @} */ /* End of group Configuration_of_CMSIS */
187187

188188

189-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
189+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
190190
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
191191

192192

@@ -13300,7 +13300,7 @@ typedef struct
1330013300
/******************************** SPI Instances *******************************/
1330113301
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1_NS) || ((INSTANCE) == SPI2_NS) || ((INSTANCE) == SPI3_NS))
1330213302

13303-
#define IS_SPI_LIMITED_INSTANCE(INSTANCE) ((INSTANCE) == NULL)
13303+
#define IS_SPI_LIMITED_INSTANCE(INSTANCE) ((INSTANCE) == ((SPI_TypeDef *) 0xDEADDEADUL))
1330413304

1330513305
#define IS_SPI_FULL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1_NS) || ((INSTANCE) == SPI2_NS) || ((INSTANCE) == SPI3_NS))
1330613306

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h523xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -215,7 +215,7 @@ typedef enum
215215
/** @} */ /* End of group Configuration_of_CMSIS */
216216

217217

218-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
218+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
219219
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
220220

221221

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h533xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ typedef enum
218218
/** @} */ /* End of group Configuration_of_CMSIS */
219219

220220

221-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
221+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
222222
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
223223

224224

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h562xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@ typedef enum
234234
/** @} */ /* End of group Configuration_of_CMSIS */
235235

236236

237-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
237+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
238238
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
239239

240240

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h563xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@ typedef enum
239239
/** @} */ /* End of group Configuration_of_CMSIS */
240240

241241

242-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
242+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
243243
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
244244

245245

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h573xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -242,7 +242,7 @@ typedef enum
242242
/** @} */ /* End of group Configuration_of_CMSIS */
243243

244244

245-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
245+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
246246
#include "system_stm32h5xx.h" /*!< STM32H5xx System */
247247

248248

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h5xx.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@
5757
application
5858
*/
5959

60-
#if !defined (STM32H573xx) && !defined (STM32H563xx) \
60+
#if !defined (STM32H573xx) && !defined (STM32H563xx) \
6161
&& !defined (STM32H562xx) && !defined (STM32H503xx) \
6262
&& !defined (STM32H533xx) && !defined (STM32H523xx)
6363
/* #define STM32H573xx */ /*!< STM32H573xx Devices */
@@ -81,12 +81,12 @@
8181
#endif /* USE_HAL_DRIVER */
8282

8383
/**
84-
* @brief CMSIS Device version number 1.3.0
84+
* @brief CMSIS Device version number 1.3.1
8585
*/
86-
#define __STM32H5_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
87-
#define __STM32H5_CMSIS_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */
88-
#define __STM32H5_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
89-
#define __STM32H5_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
86+
#define __STM32H5_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
87+
#define __STM32H5_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
88+
#define __STM32H5_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
89+
#define __STM32H5_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
9090
#define __STM32H5_CMSIS_VERSION ((__STM32H5_CMSIS_VERSION_MAIN << 24U)\
9191
|(__STM32H5_CMSIS_VERSION_SUB1 << 16U)\
9292
|(__STM32H5_CMSIS_VERSION_SUB2 << 8U )\

‎system/Drivers/CMSIS/Device/ST/STM32H5xx/Release_Notes.html

Lines changed: 15 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,11 +30,22 @@ <h1 id="release-notes-for-stm32h5xx-cmsis">Release Notes for <mark> STM32H5xx C
3030
<div class="col-sm-12 col-lg-8">
3131
<h1 id="update-history"><strong>Update History</strong></h1>
3232
<div class="collapse">
33-
<input type="checkbox" id="collapse-section4" Checked aria-hidden="true"> <label for="collapse-section4" checked aria-hidden="true"><strong>V1.3.0 / 05-June-2024</strong></label>
33+
<input type="checkbox" id="collapse-section5" Checked aria-hidden="true"> <label for="collapse-section5" checked aria-hidden="true"><strong>V1.3.1 / 30-October-2024</strong></label>
3434
<div>
3535
<h2 id="main-changes">Main Changes</h2>
3636
<p>CMSIS Device Maintenance Release version of bits and registers definition aligned with <strong>RM0481</strong> (STM32H5 reference manual)</p>
3737
<ul>
38+
<li>Update to use #include "core_cm33.h" instead of #include &lt;core_cm33.h&gt; to force the first searches for the core_cm33.h file in the same directory as the file that contains the #include directive (Drivers\CMSIS\Core\Include)</li>
39+
<li>Update IS_SPI_LIMITED macro to return an essential boolean</li>
40+
</ul>
41+
</div>
42+
</div>
43+
<div class="collapse">
44+
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" checked aria-hidden="true"><strong>V1.3.0 / 05-June-2024</strong></label>
45+
<div>
46+
<h2 id="main-changes-1">Main Changes</h2>
47+
<p>CMSIS Device Maintenance Release version of bits and registers definition aligned with <strong>RM0481</strong> (STM32H5 reference manual)</p>
48+
<ul>
3849
<li>Add RNG_CR_NIST_VALUE, RNG_NSCR_NIST_VALUE and RNG_HTCR_NIST_VALUE defines</li>
3950
<li>Add Bits definition for RNG_NSCR register : Add RNG_NSCR_EN_OSC1, RNG_NSCR_EN_OSC2, RNG_NSCR_EN_OSC3, RNG_NSCR_EN_OSC4, RNG_NSCR_EN_OSC5 and RNG_NSCR_EN_OSC6 defines</li>
4051
<li>Add USART_DMAREQUESTS_SW_WA define</li>
@@ -50,7 +61,7 @@ <h2 id="main-changes">Main Changes</h2>
5061
<div class="collapse">
5162
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" checked aria-hidden="true"><strong>V1.2.0 / 09-February-2024</strong></label>
5263
<div>
53-
<h2 id="main-changes-1">Main Changes</h2>
64+
<h2 id="main-changes-2">Main Changes</h2>
5465
<ul>
5566
<li>First official release of STM32H5xx CMSIS drivers to support <strong>STM32H533xx and STM32H523xx</strong> devices</li>
5667
<li>Add bit definition for I3C_BCR register</li>
@@ -69,7 +80,7 @@ <h2 id="main-changes-1">Main Changes</h2>
6980
<div class="collapse">
7081
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" checked aria-hidden="true"><strong>V1.1.0 / 07-June-2023</strong></label>
7182
<div>
72-
<h2 id="main-changes-2">Main Changes</h2>
83+
<h2 id="main-changes-3">Main Changes</h2>
7384
<ul>
7485
<li>Add DUA addresses constants definitions for STM32H573xx devices only</li>
7586
<li>Fix wrong definition of IS_TIM_CLOCKSOURCE_TIX_INSTANCE &amp; IS_TIM_TISEL_INSTANCE macros</li>
@@ -80,7 +91,7 @@ <h2 id="main-changes-2">Main Changes</h2>
8091
<div class="collapse">
8192
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" checked aria-hidden="true"><strong>V1.0.0 / 10-February-2023</strong></label>
8293
<div>
83-
<h2 id="main-changes-3">Main Changes</h2>
94+
<h2 id="main-changes-4">Main Changes</h2>
8495
<ul>
8596
<li>First official release version of bits and registers definition aligned with RM0481 and RM0492 (STM32H5 reference manuals)</li>
8697
</ul>

‎system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
* STM32F7: 1.2.9
1010
* STM32G0: 1.4.4
1111
* STM32G4: 1.2.5
12-
* STM32H5: 1.3.0
12+
* STM32H5: 1.3.1
1313
* STM32H7: 1.10.4
1414
* STM32L0: 1.9.3
1515
* STM32L1: 2.3.3

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 67 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -472,7 +472,9 @@ extern "C" {
472472
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473473
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474474
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475+
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)
475476
#define PAGESIZE FLASH_PAGE_SIZE
477+
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
476478
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
477479
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
478480
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -601,6 +603,15 @@ extern "C" {
601603
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
602604
#endif /* STM32G4 */
603605

606+
#if defined(STM32U5)
607+
608+
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster
609+
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster
610+
#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection
611+
#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection
612+
613+
#endif /* STM32U5 */
614+
604615
#if defined(STM32H5)
605616
#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
606617
#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
@@ -806,6 +817,21 @@ extern "C" {
806817
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
807818
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
808819
#endif /* STM32U5 */
820+
821+
#if defined(STM32WBA)
822+
#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
823+
#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
824+
#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
825+
#define GPIO_AF11_RF_IO1 GPIO_AF11_RF
826+
#define GPIO_AF11_RF_IO2 GPIO_AF11_RF
827+
#define GPIO_AF11_RF_IO3 GPIO_AF11_RF
828+
#define GPIO_AF11_RF_IO4 GPIO_AF11_RF
829+
#define GPIO_AF11_RF_IO5 GPIO_AF11_RF
830+
#define GPIO_AF11_RF_IO6 GPIO_AF11_RF
831+
#define GPIO_AF11_RF_IO7 GPIO_AF11_RF
832+
#define GPIO_AF11_RF_IO8 GPIO_AF11_RF
833+
#define GPIO_AF11_RF_IO9 GPIO_AF11_RF
834+
#endif /* STM32WBA */
809835
/**
810836
* @}
811837
*/
@@ -860,6 +886,10 @@ extern "C" {
860886
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
861887
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
862888

889+
#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7)
890+
#define HRTIMInterruptResquests HRTIMInterruptRequests
891+
#endif /* STM32F3 || STM32G4 || STM32H7 */
892+
863893
#if defined(STM32G4)
864894
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
865895
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
@@ -997,8 +1027,8 @@ extern "C" {
9971027
#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
9981028
#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
9991029
#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
1000-
10011030
#endif /* STM32F3 */
1031+
10021032
/**
10031033
* @}
10041034
*/
@@ -1249,10 +1279,10 @@ extern "C" {
12491279
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12501280
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12511281

1252-
#if defined(STM32H5) || defined(STM32H7RS)
1282+
#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6)
12531283
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12541284
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1255-
#endif /* STM32H5 || STM32H7RS */
1285+
#endif /* STM32H5 || STM32H7RS || STM32N6 */
12561286

12571287
#if defined(STM32WBA)
12581288
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1264,10 +1294,10 @@ extern "C" {
12641294
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12651295
#endif /* STM32WBA */
12661296

1267-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
1297+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
12681298
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12691299
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1270-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
1300+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
12711301

12721302
#if defined(STM32F7)
12731303
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1999,12 +2029,12 @@ extern "C" {
19992029
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
20002030
* @{
20012031
*/
2002-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
2032+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
20032033
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
20042034
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
20052035
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
20062036
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
2007-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
2037+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
20082038

20092039
/**
20102040
* @}
@@ -3665,7 +3695,7 @@ extern "C" {
36653695
#endif
36663696

36673697
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3668-
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
3698+
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0)
36693699
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36703700
#else
36713701
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3916,8 +3946,8 @@ extern "C" {
39163946
*/
39173947
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39183948
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3919-
defined (STM32WBA) || defined (STM32H5) || \
3920-
defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
3949+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || \
3950+
defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)
39213951
#else
39223952
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39233953
#endif
@@ -4211,6 +4241,33 @@ extern "C" {
42114241

42124242
#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
42134243
#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
4244+
#if defined(STM32U5)
4245+
#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD
4246+
#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK
4247+
#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC
4248+
#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST
4249+
#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF
4250+
#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT
4251+
#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM
4252+
#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM
4253+
#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK
4254+
#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ
4255+
#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT
4256+
#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0
4257+
#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1
4258+
#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM
4259+
#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG
4260+
#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM
4261+
#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM
4262+
#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT
4263+
#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM
4264+
#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM
4265+
#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID
4266+
#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0
4267+
#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1
4268+
#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK
4269+
#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK
4270+
#endif
42144271
/**
42154272
* @}
42164273
*/

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -320,10 +320,10 @@ extern HAL_TickFreqTypeDef uwTickFreq;
320320
#define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP)
321321
#endif /* DBGMCU_APB1FZR1_DBG_TIM4_STOP */
322322

323-
#if defined(DBGMCU_APB1FZR1_DBG_TIM4_STOP)
323+
#if defined(DBGMCU_APB1FZR1_DBG_TIM5_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP)
326-
#endif /* DBGMCU_APB1FZR1_DBG_TIM4_STOP */
326+
#endif /* DBGMCU_APB1FZR1_DBG_TIM5_STOP */
327327

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#if defined(DBGMCU_APB1FZR1_DBG_TIM6_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP)

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