From e23cc318c922d5b4f00acbd8a3807022d930b72b Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 14:06:26 -0700 Subject: [PATCH 1/8] Add all ti-sysblocks chip recommendations --- README.md | 60 +- biome.json | 3 + index.ts | 2 + lib/chips/ADC101C021CIMM_NOPB.circuit.tsx | 48 + lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx | 51 + lib/chips/ADS1015LIDGSR.circuit.tsx | 46 + lib/chips/ADS1114IDGST.circuit.tsx | 46 + lib/chips/ADS1118IDGSR.circuit.tsx | 46 + lib/chips/ADS114S08IRHBT.circuit.tsx | 73 + lib/chips/ADS122S14IRTER.circuit.tsx | 57 + lib/chips/ADS124S08IRHBT.circuit.tsx | 73 + lib/chips/ADS131M03IRUKR.circuit.tsx | 63 + lib/chips/ADS7042IDCUT.circuit.tsx | 47 + lib/chips/ADS7142IRUGR.circuit.tsx | 206 + lib/chips/ADS7885SDBVT.circuit.tsx | 47 + lib/chips/ADS8885IDGSR.circuit.tsx | 45 + lib/chips/AM26C31IDR.circuit.tsx | 52 + lib/chips/AM26C32CDR.circuit.tsx | 52 + lib/chips/AM3352BZCZ100.circuit.tsx | 649 + lib/chips/AM3357BZCZA80.circuit.tsx | 649 + lib/chips/AM4376BZDND80.circuit.tsx | 4762 ++ lib/chips/AM4378BZDND100.circuit.tsx | 4762 ++ lib/chips/AM4379BZDNA100.circuit.tsx | 4762 ++ lib/chips/AM5726BABCXA.circuit.tsx | 7208 ++ lib/chips/AM62A32AOMHIAMBR.circuit.tsx | 1197 + lib/chips/AM62A74AUMHAAMBR.circuit.tsx | 1149 + lib/chips/AM62L32BEGHAANBR.circuit.tsx | 3605 + lib/chips/AM6442BSEFHAALV.circuit.tsx | 862 + lib/chips/AM67A74AKGHIAMWR.circuit.tsx | 5619 ++ lib/chips/AMC0300DDWVR.circuit.tsx | 47 + lib/chips/AMC0311DQDWVRQ1.circuit.tsx | 47 + lib/chips/AMC1211AQDWVQ1.circuit.tsx | 51 + lib/chips/AMC1351QDWVRQ1.circuit.tsx | 47 + lib/chips/ATL431LIBQDBZR.circuit.tsx | 37 + lib/chips/A_74ACT16244DGGR.circuit.tsx | 135 + lib/chips/A_74LVC1G332DBVRG4.circuit.tsx | 46 + lib/chips/BQ24600RVAR.circuit.tsx | 58 + lib/chips/BQ24725ARGRR.circuit.tsx | 62 + lib/chips/BQ24780SRUYR.circuit.tsx | 70 + lib/chips/BQ25185DLHR.circuit.tsx | 55 + lib/chips/BQ25188YBGR.circuit.tsx | 161 + lib/chips/BQ25622RYKR.circuit.tsx | 306 + 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mode 100644 scripts/cache-ti-sysblocks-pinouts.ts create mode 100644 scripts/enrich-ti-array-pin-labels.test.ts create mode 100644 scripts/enrich-ti-array-pin-labels.ts create mode 100644 scripts/generate-ti-sysblocks-exports.ts create mode 100644 scripts/materialize-ti-datasheet-components.test.ts create mode 100644 scripts/materialize-ti-datasheet-components.ts create mode 100644 scripts/ti-document-viewer-pinout.test.ts create mode 100644 scripts/ti-document-viewer-pinout.ts create mode 100644 scripts/validate-ti-sysblocks-catalog.ts diff --git a/README.md b/README.md index d12ff1dc..3bc359d3 100644 --- a/README.md +++ b/README.md @@ -57,6 +57,49 @@ export default () => ( chip footprint for that short-name export. New code should use readable package names such as `vqfn_16_ep_3x3` or `sot_23_5`. +### TI sysblocks catalog + +Every TI product recommendation referenced by +[`tscircuit/ti-sysblocks`](https://github.com/tscircuit/ti-sysblocks) is +available as a raw chip export. The source diagrams contain generic TI product +numbers rather than orderable package variants, so this package records one +canonical exact manufacturer part number and package for each of the 800 +generated family entries, while reusing the repository's 10 existing family +definitions. Import the family name for convenience or the exact MPN-named +component when the package choice must be explicit. + +```tsx +import { + AMC0300D, + AMC0300DDWVR, + TiSysblocksChipComponents, +} from "@tsci/tscircuit.ti" + +const CanonicalFamilyPart = AMC0300D +const ExactPackagePart = AMC0300DDWVR +const SameFamilyFromMap = TiSysblocksChipComponents.AMC0300D +``` + +The complete mapping and TI links for all 810 families are in +[`lib/chips/ti-sysblocks-chip-catalog.json`](lib/chips/ti-sysblocks-chip-catalog.json). +It also records the canonical MPN, package code, pin count, package drawing, +and supplier provenance for the 800 generated entries. The migration uses 689 +direct JLCPCB imports, 111 official TI datasheet package selections, and 10 +definitions that were already present in this repository. + +Some TI names are not valid JavaScript identifiers. Family exports replace +punctuation with underscores (for example, `AMC0311D-Q1` becomes +`AMC0311D_Q1`), and a leading digit gets the `TI_` prefix (for example, +`74ACT16244` becomes `TI_74ACT16244`). The catalog is the authoritative mapping. + +Generated schematic boxes group power pins on top, ground and exposed-pad pins +on the bottom, inputs and controls on the left, and outputs on the right. Pins +inside a functional group retain tscircuit's standard 0.2 mm adjacent spacing; +only a 0.2 mm margin is added between distinct groups. Footprints imported from +JLCPCB retain their LCSC number and CAD model. Datasheet-sourced components use +the exact TI package-drawing identifier, never package code and pin count alone, +so mechanically different drawing revisions are not conflated. + ## Connecting to Pins Inside a Subcircuit Imported TI parts are subcircuits. To connect an external component to a pin @@ -138,9 +181,10 @@ The package currently exports these subcircuit components: ## Exported Chips -The package also exports these low-level chip components from `lib/chips`. Each -chip is listed individually below, including whether it supports a -`footprintVariant` selector on the short-name export. +In addition to the complete sysblocks catalog above, the package retains its +hand-written short-name wrappers and legacy raw-chip exports. The table below +highlights those wrappers, including whether they support a `footprintVariant` +selector. It is not the complete 810-family catalog. | Chip Export | `footprintVariant` | Underlying Component Export | | --- | --- | --- | @@ -161,7 +205,7 @@ chip is listed individually below, including whether it supports a | `MSP430G2230ID` | `-` | `MSP430G2230ID` | | `MSP430F5229` | `-` | `MSP430F5229IRGCR` | | `MSPM0G3507` | `lqfp_64` | `MSPM0G3507SPMR` | -| `TLV755P` | `sot_23_5` | `TLV75533PDBVR` | +| `TLV755P` | `sot_23_5` | `TLV75533PDBVR` | | `TAS2505` | `-` | `TAS2505` | | `TMP1827` | `-` | `TMP1827` | | `TMP1075` | `wson_8_ep_2x2` | `TMP1075DSGR` | @@ -258,6 +302,14 @@ Run TypeScript checks: bun run typecheck ``` +Regenerate and validate the sysblocks export surface after changing the +machine-readable catalog: + +```bash +bun run generate:ti-sysblocks +bun run validate:ti-sysblocks +``` + Update visual snapshots when intentional schematic, PCB, or simulation output changes: diff --git a/biome.json b/biome.json index 4c3cdc4e..07b5fbdc 100644 --- a/biome.json +++ b/biome.json @@ -5,6 +5,9 @@ "clientKind": "git", "useIgnoreFile": true }, + "files": { + "maxSize": 3000000 + }, "formatter": { "indentStyle": "space" } diff --git a/index.ts b/index.ts index f31def34..bd7ba699 100644 --- a/index.ts +++ b/index.ts @@ -34,6 +34,7 @@ import { TPS7A02, TPS7A20, TPSM82823, + TiSysblocksChipComponents, TRF7960RHB, TXB0104, TXS0102, @@ -128,6 +129,7 @@ export { }; export const TiChipComponents = { + ...TiSysblocksChipComponents, AM62L32, BQ24072, BQ24073, diff --git a/lib/chips/ADC101C021CIMM_NOPB.circuit.tsx b/lib/chips/ADC101C021CIMM_NOPB.circuit.tsx new file mode 100644 index 00000000..87afd75d --- /dev/null +++ b/lib/chips/ADC101C021CIMM_NOPB.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["ALERT"], + pin3: ["ADR0"], + pin4: ["VIN"], + pin5: ["VA"], + pin6: ["ADR1"], + pin7: ["GND"], + pin8: ["SDA"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const ADC101C021CIMM_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default ADC101C021CIMM_NOPB; diff --git a/lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx b/lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx new file mode 100644 index 00000000..83945924 --- /dev/null +++ b/lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CS"], + pin2: ["VA"], + pin3: ["AGND"], + pin4: ["IN0"], + pin5: ["IN1"], + pin6: ["IN2"], + pin7: ["IN3"], + pin8: ["IN4"], + pin9: ["IN5"], + pin10: ["IN6"], + pin11: ["IN7"], + pin12: ["DGND"], + pin13: ["VD"], + pin14: ["DIN"], + pin15: ["DOUT"], + pin16: ["SCLK"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const ADC128S022CIMTX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default ADC128S022CIMTX_NOPB; diff --git a/lib/chips/ADS1015LIDGSR.circuit.tsx b/lib/chips/ADS1015LIDGSR.circuit.tsx new file mode 100644 index 00000000..088f19af --- /dev/null +++ b/lib/chips/ADS1015LIDGSR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ADDR"], + pin2: ["pin2"], + pin3: ["GND"], + pin4: ["AIN0"], + pin5: ["AIN1"], + pin6: ["AIN2"], + pin7: ["AIN3"], + pin8: ["VDD"], + pin9: ["SDA"], + pin10: ["SCL"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ADS1015LIDGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS1015LIDGSR; diff --git a/lib/chips/ADS1114IDGST.circuit.tsx b/lib/chips/ADS1114IDGST.circuit.tsx new file mode 100644 index 00000000..8e3759af --- /dev/null +++ b/lib/chips/ADS1114IDGST.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ADDR"], + pin2: ["pin2"], + pin3: ["GND"], + pin4: ["AIN0"], + pin5: ["AIN1"], + pin6: ["AIN2"], + pin7: ["AIN3"], + pin8: ["VDD"], + pin9: ["SDA"], + pin10: ["SCL"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ADS1114IDGST = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS1114IDGST; diff --git a/lib/chips/ADS1118IDGSR.circuit.tsx b/lib/chips/ADS1118IDGSR.circuit.tsx new file mode 100644 index 00000000..6b49eb99 --- /dev/null +++ b/lib/chips/ADS1118IDGSR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCLK"], + pin2: ["pin2"], + pin3: ["GND"], + pin4: ["AIN0"], + pin5: ["AIN1"], + pin6: ["AIN2"], + pin7: ["AIN3"], + pin8: ["VDD"], + pin9: ["pin9"], + pin10: ["DIN"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ADS1118IDGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS1118IDGSR; diff --git a/lib/chips/ADS114S08IRHBT.circuit.tsx b/lib/chips/ADS114S08IRHBT.circuit.tsx new file mode 100644 index 00000000..f92598bd --- /dev/null +++ b/lib/chips/ADS114S08IRHBT.circuit.tsx @@ -0,0 +1,73 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AINCOM"], + pin2: ["AIN5"], + pin3: ["AIN4"], + pin4: ["AIN3"], + pin5: ["AIN2"], + pin6: ["AIN1"], + pin7: ["AIN0"], + pin8: ["pin8"], + pin9: ["CS"], + pin10: ["DIN"], + pin11: ["SCLK"], + pin12: ["pin12"], + pin13: ["DRDY"], + pin14: ["DGND"], + pin15: ["IOVDD"], + pin16: ["DVDD"], + pin17: ["CLK"], + pin18: ["RESET"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["REFOUT"], + pin24: ["REFCOM"], + pin25: ["NC"], + pin26: ["AVDD"], + pin27: ["AVSS"], + pin28: ["AVSS_SW"], + pin29: ["REFN0"], + pin30: ["REFP0"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin25: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const ADS114S08IRHBT = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS114S08IRHBT; diff --git a/lib/chips/ADS122S14IRTER.circuit.tsx b/lib/chips/ADS122S14IRTER.circuit.tsx new file mode 100644 index 00000000..9a15a38f --- /dev/null +++ b/lib/chips/ADS122S14IRTER.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AIN0"], + pin2: ["AIN1"], + pin3: ["AIN2"], + pin4: ["AIN3"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["CS"], + pin10: ["pin10"], + pin11: ["SDI"], + pin12: ["SCLK"], + pin13: ["DVDD"], + pin14: ["GND"], + pin15: ["AVDD"], + pin16: ["REFOUT"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin14: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const ADS122S14IRTER = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS122S14IRTER; diff --git a/lib/chips/ADS124S08IRHBT.circuit.tsx b/lib/chips/ADS124S08IRHBT.circuit.tsx new file mode 100644 index 00000000..c9921828 --- /dev/null +++ b/lib/chips/ADS124S08IRHBT.circuit.tsx @@ -0,0 +1,73 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AINCOM"], + pin2: ["AIN5"], + pin3: ["AIN4"], + pin4: ["AIN3"], + pin5: ["AIN2"], + pin6: ["AIN1"], + pin7: ["AIN0"], + pin8: ["pin8"], + pin9: ["CS"], + pin10: ["DIN"], + pin11: ["SCLK"], + pin12: ["pin12"], + pin13: ["DRDY"], + pin14: ["DGND"], + pin15: ["IOVDD"], + pin16: ["DVDD"], + pin17: ["CLK"], + pin18: ["RESET"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["REFOUT"], + pin24: ["REFCOM"], + pin25: ["NC"], + pin26: ["AVDD"], + pin27: ["AVSS"], + pin28: ["AVSS_SW"], + pin29: ["REFN0"], + pin30: ["REFP0"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin25: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const ADS124S08IRHBT = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS124S08IRHBT; diff --git a/lib/chips/ADS131M03IRUKR.circuit.tsx b/lib/chips/ADS131M03IRUKR.circuit.tsx new file mode 100644 index 00000000..ffc8e1ce --- /dev/null +++ b/lib/chips/ADS131M03IRUKR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AIN0P"], + pin2: ["AIN0N"], + pin3: ["AIN1N"], + pin4: ["AIN1P"], + pin5: ["AIN2P"], + pin6: ["AIN2N"], + pin7: ["NC1"], + pin8: ["NC2"], + pin9: ["pin9"], + pin10: ["CS"], + pin11: ["DRDY"], + pin12: ["SCLK"], + pin13: ["DOUT"], + pin14: ["DIN"], + pin15: ["CLKIN"], + pin16: ["CAP"], + pin17: ["DGND"], + pin18: ["DVDD"], + pin19: ["AVDD"], + pin20: ["AGND"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin7: { doNotConnect: true }, + pin8: { doNotConnect: true }, + pin20: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const ADS131M03IRUKR = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS131M03IRUKR; diff --git a/lib/chips/ADS7042IDCUT.circuit.tsx b/lib/chips/ADS7042IDCUT.circuit.tsx new file mode 100644 index 00000000..bdb281ea --- /dev/null +++ b/lib/chips/ADS7042IDCUT.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DVDD"], + pin2: ["SCLK"], + pin3: ["SDO"], + pin4: ["CS"], + pin5: ["AINM"], + pin6: ["AINP"], + pin7: ["AVDD"], + pin8: ["GND"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +export const ADS7042IDCUT = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS7042IDCUT; diff --git a/lib/chips/ADS7142IRUGR.circuit.tsx b/lib/chips/ADS7142IRUGR.circuit.tsx new file mode 100644 index 00000000..61294730 --- /dev/null +++ b/lib/chips/ADS7142IRUGR.circuit.tsx @@ -0,0 +1,206 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AVDD"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["ADDR"], + pin5: ["pin5"], + pin6: ["ALERT"], + pin7: ["SDA"], + pin8: ["SCL"], + pin9: ["DVDD"], + pin10: ["GND"], +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, +} as const; + +export const ADS7142IRUGR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2669859.obj?uuid=06d848c39838422d8100eb441be481f5", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2669859.step?uuid=06d848c39838422d8100eb441be481f5", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.00006350000001020817, y: 0, z: -0.01 }, + }} + {...props} + /> + ); +}; + +export default ADS7142IRUGR; diff --git a/lib/chips/ADS7885SDBVT.circuit.tsx b/lib/chips/ADS7885SDBVT.circuit.tsx new file mode 100644 index 00000000..8a84bcfb --- /dev/null +++ b/lib/chips/ADS7885SDBVT.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["VIN"], + pin4: ["SCLK"], + pin5: ["SDO"], + pin6: ["CS"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const ADS7885SDBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS7885SDBVT; diff --git a/lib/chips/ADS8885IDGSR.circuit.tsx b/lib/chips/ADS8885IDGSR.circuit.tsx new file mode 100644 index 00000000..f23a6bf4 --- /dev/null +++ b/lib/chips/ADS8885IDGSR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["AVDD"], + pin3: ["AINP"], + pin4: ["AINN"], + pin5: ["GND"], + pin6: ["CONVST"], + pin7: ["DOUT"], + pin8: ["SCLK"], + pin9: ["DIN"], + pin10: ["DVDD"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, +} as const; + +export const ADS8885IDGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default ADS8885IDGSR; diff --git a/lib/chips/AM26C31IDR.circuit.tsx b/lib/chips/AM26C31IDR.circuit.tsx new file mode 100644 index 00000000..a683e947 --- /dev/null +++ b/lib/chips/AM26C31IDR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1Y"], + pin3: ["1Z"], + pin4: ["G1"], + pin5: ["2Z"], + pin6: ["2Y"], + pin7: ["2A"], + pin8: ["GND"], + pin9: ["3A"], + pin10: ["3Y"], + pin11: ["3Z"], + pin12: ["G2"], + pin13: ["4Z"], + pin14: ["4Y"], + pin15: ["4A"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const AM26C31IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default AM26C31IDR; diff --git a/lib/chips/AM26C32CDR.circuit.tsx b/lib/chips/AM26C32CDR.circuit.tsx new file mode 100644 index 00000000..2cfe7aa9 --- /dev/null +++ b/lib/chips/AM26C32CDR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1B"], + pin2: ["1A"], + pin3: ["1Y"], + pin4: ["G2"], + pin5: ["2Y"], + pin6: ["2A"], + pin7: ["2B"], + pin8: ["GND"], + pin9: ["3B"], + pin10: ["3A"], + pin11: ["3Y"], + pin12: ["G1"], + pin13: ["4Y"], + pin14: ["4A"], + pin15: ["4B"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const AM26C32CDR = (props: ChipProps) => { + return ( + + ); +}; + +export default AM26C32CDR; diff --git a/lib/chips/AM3352BZCZ100.circuit.tsx b/lib/chips/AM3352BZCZ100.circuit.tsx new file mode 100644 index 00000000..a471cb06 --- /dev/null +++ b/lib/chips/AM3352BZCZ100.circuit.tsx @@ -0,0 +1,649 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin307: ["VSS", "A18", "VSS_A18"], + pin308: ["EXTINTn", "B18"], + pin309: ["ECAP0_IN_PWM0_OUT", "C18"], + pin310: ["UART1_CTSn", "D18"], + pin311: ["UART0_CTSn", "E18"], + pin312: ["MMC0_DAT2", "F18"], + pin289: ["SPI0_SCLK", "A17"], + pin290: ["SPI0_D0", "B17"], + pin291: ["I2C0_SDA", "C17"], + pin292: ["UART1_RTSn", "D17"], + pin293: ["UART0_RTSn", "E17"], + pin294: ["MMC0_DAT3", "F17"], + pin271: ["SPI0_CS0", "A16"], + pin272: ["SPI0_D1", "B16"], + pin273: ["I2C0_SCL", "C16"], + pin274: ["UART1_RXD", "D16"], + pin275: ["UART0_TXD", "E16"], + pin276: ["USB0_DRVVBUS", "F16"], + pin253: ["XDMA_EVENT_INTR0", "A15"], + pin254: ["PWRONRSTn", "B15"], + pin255: ["SPI0_CS1", "C15"], + pin256: ["UART1_TXD", "D15"], + pin257: ["UART0_RXD", "E15"], + pin258: ["USB1_DRVVBUS", "F15"], + pin235: ["MCASP0_AHCLKX", "A14"], + pin236: ["EMU1", "B14"], + pin237: ["EMU0", "C14"], + pin238: ["XDMA_EVENT_INTR1", "D14"], + pin239: ["VDDS", "E14", "VDDS_E14"], + pin240: ["VDDSHV6", "F14", "VDDSHV6_F14"], + pin217: ["MCASP0_ACLKX", "A13"], + pin218: ["MCASP0_FSX", "B13"], + pin219: ["MCASP0_FSR", "C13"], + pin220: ["MCASP0_AXR1", "D13"], + pin221: ["VDDSHV6", "E13", "VDDSHV6_E13"], + pin222: ["VDD_MPU", "F13", "VDD_MPU_F13"], + pin199: ["TCK", "A12"], + pin200: ["MCASP0_ACLKR", "B12"], + pin201: ["MCASP0_AHCLKR", "C12"], + pin202: ["MCASP0_AXR0", "D12"], + pin203: ["VDDSHV6", "E12", "VDDSHV6_E12"], + pin204: ["VDD_MPU", "F12", "VDD_MPU_F12"], + pin181: ["TDO", "A11"], + pin182: ["TDI", "B11"], + pin183: ["TMS", "C11"], + pin184: ["CAP_VDD_SRAM_MPU", "D11"], + pin185: ["VDDSHV6", "E11", "VDDSHV6_E11"], + pin186: ["VDD_MPU", "F11", "VDD_MPU_F11"], + pin163: ["WARMRSTn", "A10"], + pin164: ["TRSTn", "B10"], + pin165: ["CAP_VBB_MPU", "C10"], + pin166: ["VDDS_SRAM_MPU_BB", "D10"], + pin167: ["VDDSHV6", "E10", "VDDSHV6_E10"], + pin168: ["VDD_MPU", "F10", "VDD_MPU_F10"], + pin145: ["VREFN", "A9"], + pin146: ["VREFP", "B9"], + pin147: ["AIN7", "C9"], + pin148: ["CAP_VDD_SRAM_CORE", "D9"], + pin149: ["VDDS_SRAM_CORE_BG", "E9"], + pin150: ["VDDS", "F9", "VDDS_F9"], + pin127: ["AIN6", "A8"], + pin128: ["AIN5", "B8"], + pin129: ["AIN4", "C8"], + pin130: ["VDDA_ADC", "D8"], + pin131: ["VSSA_ADC", "E8"], + pin132: ["VSS", "F8", "VSS_F8"], + pin109: ["AIN3", "A7"], + pin110: ["AIN2", "B7"], + pin111: ["AIN1", "C7"], + pin112: ["VDDS_RTC", "D7"], + pin113: ["VDDS_PLL_DDR", "E7"], + pin114: ["VDD_CORE", "F7", "VDD_CORE_F7"], + pin91: ["RTC_XTALIN", "A6"], + pin92: ["AIN0", "B6"], + pin93: ["PMIC_POWER_EN", "C6"], + pin94: ["CAP_VDD_RTC", "D6"], + pin95: ["VDDS", "E6", "VDDS_E6"], + pin96: ["VDD_CORE", "F6", "VDD_CORE_F6"], + pin73: ["VSS_RTC", "A5"], + pin74: ["RTC_PWRONRSTn", "B5"], + pin75: ["EXT_WAKEUP", "C5"], + pin76: ["DDR_A6", "D5"], + pin77: ["VDDS_DDR", "E5", "VDDS_DDR_E5"], + pin78: ["VDDS_DDR", "F5", "VDDS_DDR_F5"], + pin55: ["RTC_XTALOUT", "A4"], + pin56: ["RTC_KALDO_ENn", "B4"], + pin57: ["DDR_BA0", "C4"], + pin58: ["DDR_A8", "D4"], + pin59: ["DDR_A2", "E4"], + pin60: ["DDR_A10", "F4"], + pin37: ["RESERVED", "A3"], + pin38: ["DDR_BA2", "B3"], + pin39: ["DDR_A3", "C3"], + pin40: ["DDR_A15", "D3"], + pin41: ["DDR_A12", "E3"], + pin42: ["DDR_A0", "F3"], + pin19: ["VDD_MPU_MON", "A2"], + pin20: ["DDR_WEn", "B2"], + pin21: ["DDR_A4", "C2"], + pin22: ["DDR_CK", "D2"], + pin23: ["DDR_A7", "E2"], + pin24: ["DDR_A11", "F2"], + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["DDR_A5", "B1"], + pin3: ["DDR_A9", "C1"], + pin4: ["DDR_CKn", "D1"], + pin5: ["DDR_BA1", "E1"], + pin6: ["DDR_CASn", "F1"], + pin313: ["MMC0_CMD", "G18"], + pin314: ["RMII1_REF_CLK", "H18"], + pin315: ["MII1_TXD3", "J18"], + pin316: ["MII1_TX_CLK", "K18"], + pin317: ["MII1_RX_CLK", "L18"], + pin318: ["MDC", "M18"], + pin295: ["MMC0_CLK", "G17"], + pin296: ["MII1_CRS", "H17"], + pin297: ["MII1_RX_DV", "J17"], + pin298: ["MII1_TXD0", "K17"], + pin299: ["MII1_RXD3", "L17"], + pin300: ["MDIO", "M17"], + pin277: ["MMC0_DAT0", "G16"], + pin278: ["MII1_COL", "H16"], + pin279: ["MII1_TX_EN", "J16"], + pin280: ["MII1_TXD1", "K16"], + pin281: ["MII1_RXD2", "L16"], + pin282: ["MII1_RXD0", "M16"], + pin259: ["MMC0_DAT1", "G15"], + pin260: ["VDDS_PLL_MPU", "H15"], + pin261: ["MII1_RX_ER", "J15"], + pin262: ["MII1_TXD2", "K15"], + pin263: ["MII1_RXD1", "L15"], + pin264: ["USB0_CE", "M15"], + pin241: ["VDDSHV6", "G14", "VDDSHV6_G14"], + pin242: ["VDDSHV4", "H14", "VDDSHV4_H14"], + pin243: ["VDDSHV4", "J14", "VDDSHV4_J14"], + pin244: ["VDDSHV5", "K14", "VDDSHV5_K14"], + pin245: ["VDDSHV5", "L14", "VDDSHV5_L14"], + pin246: ["VSSA_USB", "M14", "VSSA_USB_M14"], + pin223: ["VDD_MPU", "G13", "VDD_MPU_G13"], + pin224: ["VDD_MPU", "H13", "VDD_MPU_H13"], + pin225: ["VDD_MPU", "J13", "VDD_MPU_J13"], + pin226: ["VDDS", "K13", "VDDS_K13"], + pin227: ["VSS", "L13", "VSS_L13"], + pin228: ["VDD_CORE", "M13", "VDD_CORE_M13"], + pin205: ["VSS", "G12", "VSS_G12"], + pin206: ["VSS", "H12", "VSS_H12"], + pin207: ["VDD_CORE", "J12", "VDD_CORE_J12"], + pin208: ["VDD_CORE", "K12", "VDD_CORE_K12"], + pin209: ["VSS", "L12", "VSS_L12"], + pin210: ["VSS", "M12", "VSS_M12"], + pin187: ["VSS", "G11", "VSS_G11"], + pin188: ["VDD_CORE", "H11", "VDD_CORE_H11"], + pin189: ["VSS", "J11", "VSS_J11"], + pin190: ["VSS", "K11", "VSS_K11"], + pin191: ["VSS", "L11", "VSS_L11"], + pin192: ["VDD_CORE", "M11", "VDD_CORE_M11"], + pin169: ["VDD_CORE", "G10", "VDD_CORE_G10"], + pin170: ["VSS", "H10", "VSS_H10"], + pin171: ["VSS", "J10", "VSS_J10"], + pin172: ["VSS", "K10", "VSS_K10"], + pin173: ["VSS", "L10", "VSS_L10"], + pin174: ["VSS", "M10", "VSS_M10"], + pin151: ["VSS", "G9", "VSS_G9"], + pin152: ["VSS", "H9", "VSS_H9"], + pin153: ["VSS", "J9", "VSS_J9"], + pin154: ["VSS", "K9", "VSS_K9"], + pin155: ["VDD_CORE", "L9", "VDD_CORE_L9"], + pin156: ["VSS", "M9", "VSS_M9"], + pin133: ["VSS", "G8", "VSS_G8"], + pin134: ["VSS", "H8", "VSS_H8"], + pin135: ["VSS", "J8", "VSS_J8"], + pin136: ["VDD_CORE", "K8", "VDD_CORE_K8"], + pin137: ["VDD_CORE", "L8", "VDD_CORE_L8"], + pin138: ["VSS", "M8", "VSS_M8"], + pin115: ["VDD_CORE", "G7", "VDD_CORE_G7"], + pin116: ["VSS", "H7", "VSS_H7"], + pin117: ["VSS", "J7", "VSS_J7"], + pin118: ["VSS", "K7", "VSS_K7"], + pin119: ["VDD_CORE", "L7", "VDD_CORE_L7"], + pin120: ["VSS", "M7", "VSS_M7"], + pin97: ["VDD_CORE", "G6", "VDD_CORE_G6"], + pin98: ["VSS", "H6", "VSS_H6"], + pin99: ["VSS", "J6", "VSS_J6"], + pin100: ["VDD_CORE", "K6", "VDD_CORE_K6"], + pin101: ["VDD_CORE", "L6", "VDD_CORE_L6"], + pin102: ["VSS", "M6", "VSS_M6"], + pin79: ["VDDS_DDR", "G5", "VDDS_DDR_G5"], + pin80: ["VDDS_DDR", "H5", "VDDS_DDR_H5"], + pin81: ["VDDS_DDR", "J5", "VDDS_DDR_J5"], + pin82: ["VDDS_DDR", "K5", "VDDS_DDR_K5"], + pin83: ["VDDS_DDR", "L5", "VDDS_DDR_L5"], + pin84: ["VPP", "M5"], + pin61: ["DDR_RASn", "G4"], + pin62: ["DDR_A14", "H4"], + pin63: ["DDR_VREF", "J4"], + pin64: ["DDR_D12", "K4"], + pin65: ["DDR_D14", "L4"], + pin66: ["DDR_D1", "M4"], + pin43: ["DDR_CKE", "G3"], + pin44: ["DDR_A13", "H3"], + pin45: ["DDR_VTP", "J3"], + pin46: ["DDR_D11", "K3"], + pin47: ["DDR_D13", "L3"], + pin48: ["DDR_D0", "M3"], + pin25: ["DDR_RESETn", "G2"], + pin26: ["DDR_CSn0", "H2"], + pin27: ["DDR_DQM1", "J2"], + pin28: ["DDR_D10", "K2"], + pin29: ["DDR_DQSn1", "L2"], + pin30: ["DDR_DQM0", "M2"], + pin7: ["DDR_ODT", "G1"], + pin8: ["DDR_A1", "H1"], + pin9: ["DDR_D8", "J1"], + pin10: ["DDR_D9", "K1"], + pin11: ["DDR_DQS1", "L1"], + pin12: ["DDR_D15", "M1"], + pin319: ["USB0_DM", "N18"], + pin320: ["USB1_CE", "P18"], + pin321: ["USB1_DM", "R18"], + pin322: ["USB1_VBUS", "T18"], + pin323: ["GPMC_BEn1", "U18"], + pin324: ["VSS", "V18", "VSS_V18"], + pin301: ["USB0_DP", "N17"], + pin302: ["USB1_ID", "P17"], + pin303: ["USB1_DP", "R17"], + pin304: ["GPMC_WAIT0", "T17"], + pin305: ["GPMC_WPn", "U17"], + pin306: ["GPMC_A11", "V17"], + pin283: ["VDDA1P8V_USB0", "N16"], + pin284: ["USB0_ID", "P16"], + pin285: ["VDDA1P8V_USB1", "R16"], + pin286: ["GPMC_A10", "T16"], + pin287: ["GPMC_A9", "U16"], + pin288: ["GPMC_A8", "V16"], + pin265: ["VDDA3P3V_USB0", "N15"], + pin266: ["USB0_VBUS", "P15"], + pin267: ["VDDA3P3V_USB1", "R15"], + pin268: ["GPMC_A7", "T15"], + pin269: ["GPMC_A6", "U15"], + pin270: ["GPMC_A5", "V15"], + pin247: ["VSSA_USB", "N14", "VSSA_USB_N14"], + pin248: ["VDDS", "P14", "VDDS_P14"], + pin249: ["GPMC_A4", "R14"], + pin250: ["GPMC_A3", "T14"], + pin251: ["GPMC_A2", "U14"], + pin252: ["GPMC_A1", "V14"], + pin229: ["VDD_CORE", "N13", "VDD_CORE_N13"], + pin230: ["VDDSHV3", "P13", "VDDSHV3_P13"], + pin231: ["GPMC_A0", "R13"], + pin232: ["GPMC_CSn3", "T13"], + pin233: ["GPMC_AD15", "U13"], + pin234: ["GPMC_AD14", "V13"], + pin211: ["VDD_CORE", "N12", "VDD_CORE_N12"], + pin212: ["VDDSHV3", "P12", "VDDSHV3_P12"], + pin213: ["GPMC_AD13", "R12"], + pin214: ["GPMC_AD12", "T12"], + pin215: ["GPMC_AD11", "U12"], + pin216: ["GPMC_CLK", "V12"], + pin193: ["VSS", "N11", "VSS_N11"], + pin194: ["VDDSHV2", "P11", "VDDSHV2_P11"], + pin195: ["VDDS_OSC", "R11"], + pin196: ["GPMC_AD10", "T11"], + pin197: ["XTALOUT", "U11"], + pin198: ["VSS_OSC", "V11"], + pin175: ["VSS", "N10", "VSS_N10"], + pin176: ["VDDSHV2", "P10", "VDDSHV2_P10"], + pin177: ["VDDS_PLL_CORE_LCD", "R10"], + pin178: ["GPMC_AD9", "T10"], + pin179: ["GPMC_AD8", "U10"], + pin180: ["XTALIN", "V10"], + pin157: ["VDD_CORE", "N9", "VDD_CORE_N9"], + pin158: ["VDDS", "P9", "VDDS_P9"], + pin159: ["GPMC_AD6", "R9"], + pin160: ["GPMC_AD7", "T9"], + pin161: ["GPMC_CSn1", "U9"], + pin162: ["GPMC_CSn2", "V9"], + pin139: ["VDD_CORE", "N8", "VDD_CORE_N8"], + pin140: ["VDDSHV1", "P8", "VDDSHV1_P8"], + pin141: ["GPMC_AD2", "R8"], + pin142: ["GPMC_AD3", "T8"], + pin143: ["GPMC_AD4", "U8"], + pin144: ["GPMC_AD5", "V8"], + pin121: ["VSS", "N7", "VSS_N7"], + pin122: ["VDDSHV1", "P7", "VDDSHV1_P7"], + pin123: ["GPMC_ADVn_ALE", "R7"], + pin124: ["GPMC_OEn_REn", "T7"], + pin125: ["GPMC_AD0", "U7"], + pin126: ["GPMC_AD1", "V7"], + pin103: ["VDDS", "N6", "VDDS_N6"], + pin104: ["VDDSHV6", "P6", "VDDSHV6_P6"], + pin105: ["LCD_AC_BIAS_EN", "R6"], + pin106: ["GPMC_BEn0_CLE", "T6"], + pin107: ["GPMC_WEn", "U6"], + pin108: ["GPMC_CSn0", "V6"], + pin85: ["VDDSHV6", "N5", "VDDSHV6_N5"], + pin86: ["VDDSHV6", "P5", "VDDSHV6_P5"], + pin87: ["LCD_HSYNC", "R5"], + pin88: ["LCD_DATA15", "T5"], + pin89: ["LCD_VSYNC", "U5"], + pin90: ["LCD_PCLK", "V5"], + pin67: ["DDR_D5", "N4"], + pin68: ["DDR_D7", "P4"], + pin69: ["LCD_DATA3", "R4"], + pin70: ["LCD_DATA7", "T4"], + pin71: ["LCD_DATA11", "U4"], + pin72: ["LCD_DATA14", "V4"], + pin49: ["DDR_D4", "N3"], + pin50: ["DDR_D6", "P3"], + pin51: ["LCD_DATA2", "R3"], + pin52: ["LCD_DATA6", "T3"], + pin53: ["LCD_DATA10", "U3"], + pin54: ["LCD_DATA13", "V3"], + pin31: ["DDR_D3", "N2"], + pin32: ["DDR_DQSn0", "P2"], + pin33: ["LCD_DATA1", "R2"], + pin34: ["LCD_DATA5", "T2"], + pin35: ["LCD_DATA9", "U2"], + pin36: ["LCD_DATA12", "V2"], + pin13: ["DDR_D2", "N1"], + pin14: ["DDR_DQS0", "P1"], + pin15: ["LCD_DATA0", "R1"], + pin16: ["LCD_DATA4", "T1"], + pin17: ["LCD_DATA8", "U1"], + pin18: ["VSS", "V1", "VSS_V1"], +} as const; + +const pinRoles = { + pin307: "ground", + pin222: "power", + pin204: "power", + pin186: "power", + pin168: "power", + pin131: "ground", + pin132: "ground", + pin114: "power", + pin96: "power", + pin73: "ground", + pin37: "no-connect", + pin19: "power", + pin1: "ground", + pin246: "ground", + pin223: "power", + pin224: "power", + pin225: "power", + pin227: "ground", + pin228: "power", + pin205: "ground", + pin206: "ground", + pin207: "power", + pin208: "power", + pin209: "ground", + pin210: "ground", + pin187: "ground", + pin188: "power", + pin189: "ground", + pin190: "ground", + pin191: "ground", + pin192: "power", + pin169: "power", + pin170: "ground", + pin171: "ground", + pin172: "ground", + pin173: "ground", + pin174: "ground", + pin151: "ground", + pin152: "ground", + pin153: "ground", + pin154: "ground", + pin155: "power", + pin156: "ground", + pin133: "ground", + pin134: "ground", + pin135: "ground", + pin136: "power", + pin137: "power", + pin138: "ground", + pin115: "power", + pin116: "ground", + pin117: "ground", + pin118: "ground", + pin119: "power", + pin120: "ground", + pin97: "power", + pin98: "ground", + pin99: "ground", + pin100: "power", + pin101: "power", + pin102: "ground", + pin324: "ground", + pin247: "ground", + pin229: "power", + pin211: "power", + pin193: "ground", + pin198: "ground", + pin175: "ground", + pin157: "power", + pin139: "power", + pin121: "ground", + pin18: "ground", +} as const; + +const pinAttributes = { + pin307: { + requiresGround: true, + }, + pin222: { + requiresPower: true, + }, + pin204: { + requiresPower: true, + }, + pin186: { + requiresPower: true, + }, + pin168: { + requiresPower: true, + }, + pin131: { + requiresGround: true, + }, + pin132: { + requiresGround: true, + }, + pin114: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin73: { + requiresGround: true, + }, + pin37: { + doNotConnect: true, + }, + pin19: { + requiresPower: true, + }, + pin1: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin223: { + requiresPower: true, + }, + pin224: { + requiresPower: true, + }, + pin225: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin228: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin207: { + requiresPower: true, + }, + pin208: { + requiresPower: true, + }, + pin209: { + requiresGround: true, + }, + pin210: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin188: { + requiresPower: true, + }, + pin189: { + requiresGround: true, + }, + pin190: { + requiresGround: true, + }, + pin191: { + requiresGround: true, + }, + pin192: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresGround: true, + }, + pin171: { + requiresGround: true, + }, + pin172: { + requiresGround: true, + }, + pin173: { + requiresGround: true, + }, + pin174: { + requiresGround: true, + }, + pin151: { + requiresGround: true, + }, + pin152: { + requiresGround: true, + }, + pin153: { + requiresGround: true, + }, + pin154: { + requiresGround: true, + }, + pin155: { + requiresPower: true, + }, + pin156: { + requiresGround: true, + }, + pin133: { + requiresGround: true, + }, + pin134: { + requiresGround: true, + }, + pin135: { + requiresGround: true, + }, + pin136: { + requiresPower: true, + }, + pin137: { + requiresPower: true, + }, + pin138: { + requiresGround: true, + }, + pin115: { + requiresPower: true, + }, + pin116: { + requiresGround: true, + }, + pin117: { + requiresGround: true, + }, + pin118: { + requiresGround: true, + }, + pin119: { + requiresPower: true, + }, + pin120: { + requiresGround: true, + }, + pin97: { + requiresPower: true, + }, + pin98: { + requiresGround: true, + }, + pin99: { + requiresGround: true, + }, + pin100: { + requiresPower: true, + }, + pin101: { + requiresPower: true, + }, + pin102: { + requiresGround: true, + }, + pin324: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin229: { + requiresPower: true, + }, + pin211: { + requiresPower: true, + }, + pin193: { + requiresGround: true, + }, + pin198: { + requiresGround: true, + }, + pin175: { + requiresGround: true, + }, + pin157: { + requiresPower: true, + }, + pin139: { + requiresPower: true, + }, + pin121: { + requiresGround: true, + }, + pin18: { + requiresGround: true, + }, +} as const; + +export const AM3352BZCZ100 = (props: ChipProps) => { + return ( + + ); +}; + +export default AM3352BZCZ100; diff --git a/lib/chips/AM3357BZCZA80.circuit.tsx b/lib/chips/AM3357BZCZA80.circuit.tsx new file mode 100644 index 00000000..2c35564e --- /dev/null +++ b/lib/chips/AM3357BZCZA80.circuit.tsx @@ -0,0 +1,649 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin307: ["VSS", "A18", "VSS_A18"], + pin308: ["EXTINTn", "B18"], + pin309: ["ECAP0_IN_PWM0_OUT", "C18"], + pin310: ["UART1_CTSn", "D18"], + pin311: ["UART0_CTSn", "E18"], + pin312: ["MMC0_DAT2", "F18"], + pin289: ["SPI0_SCLK", "A17"], + pin290: ["SPI0_D0", "B17"], + pin291: ["I2C0_SDA", "C17"], + pin292: ["UART1_RTSn", "D17"], + pin293: ["UART0_RTSn", "E17"], + pin294: ["MMC0_DAT3", "F17"], + pin271: ["SPI0_CS0", "A16"], + pin272: ["SPI0_D1", "B16"], + pin273: ["I2C0_SCL", "C16"], + pin274: ["UART1_RXD", "D16"], + pin275: ["UART0_TXD", "E16"], + pin276: ["USB0_DRVVBUS", "F16"], + pin253: ["XDMA_EVENT_INTR0", "A15"], + pin254: ["PWRONRSTn", "B15"], + pin255: ["SPI0_CS1", "C15"], + pin256: ["UART1_TXD", "D15"], + pin257: ["UART0_RXD", "E15"], + pin258: ["USB1_DRVVBUS", "F15"], + pin235: ["MCASP0_AHCLKX", "A14"], + pin236: ["EMU1", "B14"], + pin237: ["EMU0", "C14"], + pin238: ["XDMA_EVENT_INTR1", "D14"], + pin239: ["VDDS", "E14", "VDDS_E14"], + pin240: ["VDDSHV6", "F14", "VDDSHV6_F14"], + pin217: ["MCASP0_ACLKX", "A13"], + pin218: ["MCASP0_FSX", "B13"], + pin219: ["MCASP0_FSR", "C13"], + pin220: ["MCASP0_AXR1", "D13"], + pin221: ["VDDSHV6", "E13", "VDDSHV6_E13"], + pin222: ["VDD_MPU", "F13", "VDD_MPU_F13"], + pin199: ["TCK", "A12"], + pin200: ["MCASP0_ACLKR", "B12"], + pin201: ["MCASP0_AHCLKR", "C12"], + pin202: ["MCASP0_AXR0", "D12"], + pin203: ["VDDSHV6", "E12", "VDDSHV6_E12"], + pin204: ["VDD_MPU", "F12", "VDD_MPU_F12"], + pin181: ["TDO", "A11"], + pin182: ["TDI", "B11"], + pin183: ["TMS", "C11"], + pin184: ["CAP_VDD_SRAM_MPU", "D11"], + pin185: ["VDDSHV6", "E11", "VDDSHV6_E11"], + pin186: ["VDD_MPU", "F11", "VDD_MPU_F11"], + pin163: ["WARMRSTn", "A10"], + pin164: ["TRSTn", "B10"], + pin165: ["CAP_VBB_MPU", "C10"], + pin166: ["VDDS_SRAM_MPU_BB", "D10"], + pin167: ["VDDSHV6", "E10", "VDDSHV6_E10"], + pin168: ["VDD_MPU", "F10", "VDD_MPU_F10"], + pin145: ["VREFN", "A9"], + pin146: ["VREFP", "B9"], + pin147: ["AIN7", "C9"], + pin148: ["CAP_VDD_SRAM_CORE", "D9"], + pin149: ["VDDS_SRAM_CORE_BG", "E9"], + pin150: ["VDDS", "F9", "VDDS_F9"], + pin127: ["AIN6", "A8"], + pin128: ["AIN5", "B8"], + pin129: ["AIN4", "C8"], + pin130: ["VDDA_ADC", "D8"], + pin131: ["VSSA_ADC", "E8"], + pin132: ["VSS", "F8", "VSS_F8"], + pin109: ["AIN3", "A7"], + pin110: ["AIN2", "B7"], + pin111: ["AIN1", "C7"], + pin112: ["VDDS_RTC", "D7"], + pin113: ["VDDS_PLL_DDR", "E7"], + pin114: ["VDD_CORE", "F7", "VDD_CORE_F7"], + pin91: ["RTC_XTALIN", "A6"], + pin92: ["AIN0", "B6"], + pin93: ["PMIC_POWER_EN", "C6"], + pin94: ["CAP_VDD_RTC", "D6"], + pin95: ["VDDS", "E6", "VDDS_E6"], + pin96: ["VDD_CORE", "F6", "VDD_CORE_F6"], + pin73: ["VSS_RTC", "A5"], + pin74: ["RTC_PWRONRSTn", "B5"], + pin75: ["EXT_WAKEUP", "C5"], + pin76: ["DDR_A6", "D5"], + pin77: ["VDDS_DDR", "E5", "VDDS_DDR_E5"], + pin78: ["VDDS_DDR", "F5", "VDDS_DDR_F5"], + pin55: ["RTC_XTALOUT", "A4"], + pin56: ["RTC_KALDO_ENn", "B4"], + pin57: ["DDR_BA0", "C4"], + pin58: ["DDR_A8", "D4"], + pin59: ["DDR_A2", "E4"], + pin60: ["DDR_A10", "F4"], + pin37: ["RESERVED", "A3"], + pin38: ["DDR_BA2", "B3"], + pin39: ["DDR_A3", "C3"], + pin40: ["DDR_A15", "D3"], + pin41: ["DDR_A12", "E3"], + pin42: ["DDR_A0", "F3"], + pin19: ["VDD_MPU_MON", "A2"], + pin20: ["DDR_WEn", "B2"], + pin21: ["DDR_A4", "C2"], + pin22: ["DDR_CK", "D2"], + pin23: ["DDR_A7", "E2"], + pin24: ["DDR_A11", "F2"], + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["DDR_A5", "B1"], + pin3: ["DDR_A9", "C1"], + pin4: ["DDR_CKn", "D1"], + pin5: ["DDR_BA1", "E1"], + pin6: ["DDR_CASn", "F1"], + pin313: ["MMC0_CMD", "G18"], + pin314: ["RMII1_REF_CLK", "H18"], + pin315: ["MII1_TXD3", "J18"], + pin316: ["MII1_TX_CLK", "K18"], + pin317: ["MII1_RX_CLK", "L18"], + pin318: ["MDC", "M18"], + pin295: ["MMC0_CLK", "G17"], + pin296: ["MII1_CRS", "H17"], + pin297: ["MII1_RX_DV", "J17"], + pin298: ["MII1_TXD0", "K17"], + pin299: ["MII1_RXD3", "L17"], + pin300: ["MDIO", "M17"], + pin277: ["MMC0_DAT0", "G16"], + pin278: ["MII1_COL", "H16"], + pin279: ["MII1_TX_EN", "J16"], + pin280: ["MII1_TXD1", "K16"], + pin281: ["MII1_RXD2", "L16"], + pin282: ["MII1_RXD0", "M16"], + pin259: ["MMC0_DAT1", "G15"], + pin260: ["VDDS_PLL_MPU", "H15"], + pin261: ["MII1_RX_ER", "J15"], + pin262: ["MII1_TXD2", "K15"], + pin263: ["MII1_RXD1", "L15"], + pin264: ["USB0_CE", "M15"], + pin241: ["VDDSHV6", "G14", "VDDSHV6_G14"], + pin242: ["VDDSHV4", "H14", "VDDSHV4_H14"], + pin243: ["VDDSHV4", "J14", "VDDSHV4_J14"], + pin244: ["VDDSHV5", "K14", "VDDSHV5_K14"], + pin245: ["VDDSHV5", "L14", "VDDSHV5_L14"], + pin246: ["VSSA_USB", "M14", "VSSA_USB_M14"], + pin223: ["VDD_MPU", "G13", "VDD_MPU_G13"], + pin224: ["VDD_MPU", "H13", "VDD_MPU_H13"], + pin225: ["VDD_MPU", "J13", "VDD_MPU_J13"], + pin226: ["VDDS", "K13", "VDDS_K13"], + pin227: ["VSS", "L13", "VSS_L13"], + pin228: ["VDD_CORE", "M13", "VDD_CORE_M13"], + pin205: ["VSS", "G12", "VSS_G12"], + pin206: ["VSS", "H12", "VSS_H12"], + pin207: ["VDD_CORE", "J12", "VDD_CORE_J12"], + pin208: ["VDD_CORE", "K12", "VDD_CORE_K12"], + pin209: ["VSS", "L12", "VSS_L12"], + pin210: ["VSS", "M12", "VSS_M12"], + pin187: ["VSS", "G11", "VSS_G11"], + pin188: ["VDD_CORE", "H11", "VDD_CORE_H11"], + pin189: ["VSS", "J11", "VSS_J11"], + pin190: ["VSS", "K11", "VSS_K11"], + pin191: ["VSS", "L11", "VSS_L11"], + pin192: ["VDD_CORE", "M11", "VDD_CORE_M11"], + pin169: ["VDD_CORE", "G10", "VDD_CORE_G10"], + pin170: ["VSS", "H10", "VSS_H10"], + pin171: ["VSS", "J10", "VSS_J10"], + pin172: ["VSS", "K10", "VSS_K10"], + pin173: ["VSS", "L10", "VSS_L10"], + pin174: ["VSS", "M10", "VSS_M10"], + pin151: ["VSS", "G9", "VSS_G9"], + pin152: ["VSS", "H9", "VSS_H9"], + pin153: ["VSS", "J9", "VSS_J9"], + pin154: ["VSS", "K9", "VSS_K9"], + pin155: ["VDD_CORE", "L9", "VDD_CORE_L9"], + pin156: ["VSS", "M9", "VSS_M9"], + pin133: ["VSS", "G8", "VSS_G8"], + pin134: ["VSS", "H8", "VSS_H8"], + pin135: ["VSS", "J8", "VSS_J8"], + pin136: ["VDD_CORE", "K8", "VDD_CORE_K8"], + pin137: ["VDD_CORE", "L8", "VDD_CORE_L8"], + pin138: ["VSS", "M8", "VSS_M8"], + pin115: ["VDD_CORE", "G7", "VDD_CORE_G7"], + pin116: ["VSS", "H7", "VSS_H7"], + pin117: ["VSS", "J7", "VSS_J7"], + pin118: ["VSS", "K7", "VSS_K7"], + pin119: ["VDD_CORE", "L7", "VDD_CORE_L7"], + pin120: ["VSS", "M7", "VSS_M7"], + pin97: ["VDD_CORE", "G6", "VDD_CORE_G6"], + pin98: ["VSS", "H6", "VSS_H6"], + pin99: ["VSS", "J6", "VSS_J6"], + pin100: ["VDD_CORE", "K6", "VDD_CORE_K6"], + pin101: ["VDD_CORE", "L6", "VDD_CORE_L6"], + pin102: ["VSS", "M6", "VSS_M6"], + pin79: ["VDDS_DDR", "G5", "VDDS_DDR_G5"], + pin80: ["VDDS_DDR", "H5", "VDDS_DDR_H5"], + pin81: ["VDDS_DDR", "J5", "VDDS_DDR_J5"], + pin82: ["VDDS_DDR", "K5", "VDDS_DDR_K5"], + pin83: ["VDDS_DDR", "L5", "VDDS_DDR_L5"], + pin84: ["VPP", "M5"], + pin61: ["DDR_RASn", "G4"], + pin62: ["DDR_A14", "H4"], + pin63: ["DDR_VREF", "J4"], + pin64: ["DDR_D12", "K4"], + pin65: ["DDR_D14", "L4"], + pin66: ["DDR_D1", "M4"], + pin43: ["DDR_CKE", "G3"], + pin44: ["DDR_A13", "H3"], + pin45: ["DDR_VTP", "J3"], + pin46: ["DDR_D11", "K3"], + pin47: ["DDR_D13", "L3"], + pin48: ["DDR_D0", "M3"], + pin25: ["DDR_RESETn", "G2"], + pin26: ["DDR_CSn0", "H2"], + pin27: ["DDR_DQM1", "J2"], + pin28: ["DDR_D10", "K2"], + pin29: ["DDR_DQSn1", "L2"], + pin30: ["DDR_DQM0", "M2"], + pin7: ["DDR_ODT", "G1"], + pin8: ["DDR_A1", "H1"], + pin9: ["DDR_D8", "J1"], + pin10: ["DDR_D9", "K1"], + pin11: ["DDR_DQS1", "L1"], + pin12: ["DDR_D15", "M1"], + pin319: ["USB0_DM", "N18"], + pin320: ["USB1_CE", "P18"], + pin321: ["USB1_DM", "R18"], + pin322: ["USB1_VBUS", "T18"], + pin323: ["GPMC_BEn1", "U18"], + pin324: ["VSS", "V18", "VSS_V18"], + pin301: ["USB0_DP", "N17"], + pin302: ["USB1_ID", "P17"], + pin303: ["USB1_DP", "R17"], + pin304: ["GPMC_WAIT0", "T17"], + pin305: ["GPMC_WPn", "U17"], + pin306: ["GPMC_A11", "V17"], + pin283: ["VDDA1P8V_USB0", "N16"], + pin284: ["USB0_ID", "P16"], + pin285: ["VDDA1P8V_USB1", "R16"], + pin286: ["GPMC_A10", "T16"], + pin287: ["GPMC_A9", "U16"], + pin288: ["GPMC_A8", "V16"], + pin265: ["VDDA3P3V_USB0", "N15"], + pin266: ["USB0_VBUS", "P15"], + pin267: ["VDDA3P3V_USB1", "R15"], + pin268: ["GPMC_A7", "T15"], + pin269: ["GPMC_A6", "U15"], + pin270: ["GPMC_A5", "V15"], + pin247: ["VSSA_USB", "N14", "VSSA_USB_N14"], + pin248: ["VDDS", "P14", "VDDS_P14"], + pin249: ["GPMC_A4", "R14"], + pin250: ["GPMC_A3", "T14"], + pin251: ["GPMC_A2", "U14"], + pin252: ["GPMC_A1", "V14"], + pin229: ["VDD_CORE", "N13", "VDD_CORE_N13"], + pin230: ["VDDSHV3", "P13", "VDDSHV3_P13"], + pin231: ["GPMC_A0", "R13"], + pin232: ["GPMC_CSn3", "T13"], + pin233: ["GPMC_AD15", "U13"], + pin234: ["GPMC_AD14", "V13"], + pin211: ["VDD_CORE", "N12", "VDD_CORE_N12"], + pin212: ["VDDSHV3", "P12", "VDDSHV3_P12"], + pin213: ["GPMC_AD13", "R12"], + pin214: ["GPMC_AD12", "T12"], + pin215: ["GPMC_AD11", "U12"], + pin216: ["GPMC_CLK", "V12"], + pin193: ["VSS", "N11", "VSS_N11"], + pin194: ["VDDSHV2", "P11", "VDDSHV2_P11"], + pin195: ["VDDS_OSC", "R11"], + pin196: ["GPMC_AD10", "T11"], + pin197: ["XTALOUT", "U11"], + pin198: ["VSS_OSC", "V11"], + pin175: ["VSS", "N10", "VSS_N10"], + pin176: ["VDDSHV2", "P10", "VDDSHV2_P10"], + pin177: ["VDDS_PLL_CORE_LCD", "R10"], + pin178: ["GPMC_AD9", "T10"], + pin179: ["GPMC_AD8", "U10"], + pin180: ["XTALIN", "V10"], + pin157: ["VDD_CORE", "N9", "VDD_CORE_N9"], + pin158: ["VDDS", "P9", "VDDS_P9"], + pin159: ["GPMC_AD6", "R9"], + pin160: ["GPMC_AD7", "T9"], + pin161: ["GPMC_CSn1", "U9"], + pin162: ["GPMC_CSn2", "V9"], + pin139: ["VDD_CORE", "N8", "VDD_CORE_N8"], + pin140: ["VDDSHV1", "P8", "VDDSHV1_P8"], + pin141: ["GPMC_AD2", "R8"], + pin142: ["GPMC_AD3", "T8"], + pin143: ["GPMC_AD4", "U8"], + pin144: ["GPMC_AD5", "V8"], + pin121: ["VSS", "N7", "VSS_N7"], + pin122: ["VDDSHV1", "P7", "VDDSHV1_P7"], + pin123: ["GPMC_ADVn_ALE", "R7"], + pin124: ["GPMC_OEn_REn", "T7"], + pin125: ["GPMC_AD0", "U7"], + pin126: ["GPMC_AD1", "V7"], + pin103: ["VDDS", "N6", "VDDS_N6"], + pin104: ["VDDSHV6", "P6", "VDDSHV6_P6"], + pin105: ["LCD_AC_BIAS_EN", "R6"], + pin106: ["GPMC_BEn0_CLE", "T6"], + pin107: ["GPMC_WEn", "U6"], + pin108: ["GPMC_CSn0", "V6"], + pin85: ["VDDSHV6", "N5", "VDDSHV6_N5"], + pin86: ["VDDSHV6", "P5", "VDDSHV6_P5"], + pin87: ["LCD_HSYNC", "R5"], + pin88: ["LCD_DATA15", "T5"], + pin89: ["LCD_VSYNC", "U5"], + pin90: ["LCD_PCLK", "V5"], + pin67: ["DDR_D5", "N4"], + pin68: ["DDR_D7", "P4"], + pin69: ["LCD_DATA3", "R4"], + pin70: ["LCD_DATA7", "T4"], + pin71: ["LCD_DATA11", "U4"], + pin72: ["LCD_DATA14", "V4"], + pin49: ["DDR_D4", "N3"], + pin50: ["DDR_D6", "P3"], + pin51: ["LCD_DATA2", "R3"], + pin52: ["LCD_DATA6", "T3"], + pin53: ["LCD_DATA10", "U3"], + pin54: ["LCD_DATA13", "V3"], + pin31: ["DDR_D3", "N2"], + pin32: ["DDR_DQSn0", "P2"], + pin33: ["LCD_DATA1", "R2"], + pin34: ["LCD_DATA5", "T2"], + pin35: ["LCD_DATA9", "U2"], + pin36: ["LCD_DATA12", "V2"], + pin13: ["DDR_D2", "N1"], + pin14: ["DDR_DQS0", "P1"], + pin15: ["LCD_DATA0", "R1"], + pin16: ["LCD_DATA4", "T1"], + pin17: ["LCD_DATA8", "U1"], + pin18: ["VSS", "V1", "VSS_V1"], +} as const; + +const pinRoles = { + pin307: "ground", + pin222: "power", + pin204: "power", + pin186: "power", + pin168: "power", + pin131: "ground", + pin132: "ground", + pin114: "power", + pin96: "power", + pin73: "ground", + pin37: "no-connect", + pin19: "power", + pin1: "ground", + pin246: "ground", + pin223: "power", + pin224: "power", + pin225: "power", + pin227: "ground", + pin228: "power", + pin205: "ground", + pin206: "ground", + pin207: "power", + pin208: "power", + pin209: "ground", + pin210: "ground", + pin187: "ground", + pin188: "power", + pin189: "ground", + pin190: "ground", + pin191: "ground", + pin192: "power", + pin169: "power", + pin170: "ground", + pin171: "ground", + pin172: "ground", + pin173: "ground", + pin174: "ground", + pin151: "ground", + pin152: "ground", + pin153: "ground", + pin154: "ground", + pin155: "power", + pin156: "ground", + pin133: "ground", + pin134: "ground", + pin135: "ground", + pin136: "power", + pin137: "power", + pin138: "ground", + pin115: "power", + pin116: "ground", + pin117: "ground", + pin118: "ground", + pin119: "power", + pin120: "ground", + pin97: "power", + pin98: "ground", + pin99: "ground", + pin100: "power", + pin101: "power", + pin102: "ground", + pin324: "ground", + pin247: "ground", + pin229: "power", + pin211: "power", + pin193: "ground", + pin198: "ground", + pin175: "ground", + pin157: "power", + pin139: "power", + pin121: "ground", + pin18: "ground", +} as const; + +const pinAttributes = { + pin307: { + requiresGround: true, + }, + pin222: { + requiresPower: true, + }, + pin204: { + requiresPower: true, + }, + pin186: { + requiresPower: true, + }, + pin168: { + requiresPower: true, + }, + pin131: { + requiresGround: true, + }, + pin132: { + requiresGround: true, + }, + pin114: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin73: { + requiresGround: true, + }, + pin37: { + doNotConnect: true, + }, + pin19: { + requiresPower: true, + }, + pin1: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin223: { + requiresPower: true, + }, + pin224: { + requiresPower: true, + }, + pin225: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin228: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin207: { + requiresPower: true, + }, + pin208: { + requiresPower: true, + }, + pin209: { + requiresGround: true, + }, + pin210: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin188: { + requiresPower: true, + }, + pin189: { + requiresGround: true, + }, + pin190: { + requiresGround: true, + }, + pin191: { + requiresGround: true, + }, + pin192: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresGround: true, + }, + pin171: { + requiresGround: true, + }, + pin172: { + requiresGround: true, + }, + pin173: { + requiresGround: true, + }, + pin174: { + requiresGround: true, + }, + pin151: { + requiresGround: true, + }, + pin152: { + requiresGround: true, + }, + pin153: { + requiresGround: true, + }, + pin154: { + requiresGround: true, + }, + pin155: { + requiresPower: true, + }, + pin156: { + requiresGround: true, + }, + pin133: { + requiresGround: true, + }, + pin134: { + requiresGround: true, + }, + pin135: { + requiresGround: true, + }, + pin136: { + requiresPower: true, + }, + pin137: { + requiresPower: true, + }, + pin138: { + requiresGround: true, + }, + pin115: { + requiresPower: true, + }, + pin116: { + requiresGround: true, + }, + pin117: { + requiresGround: true, + }, + pin118: { + requiresGround: true, + }, + pin119: { + requiresPower: true, + }, + pin120: { + requiresGround: true, + }, + pin97: { + requiresPower: true, + }, + pin98: { + requiresGround: true, + }, + pin99: { + requiresGround: true, + }, + pin100: { + requiresPower: true, + }, + pin101: { + requiresPower: true, + }, + pin102: { + requiresGround: true, + }, + pin324: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin229: { + requiresPower: true, + }, + pin211: { + requiresPower: true, + }, + pin193: { + requiresGround: true, + }, + pin198: { + requiresGround: true, + }, + pin175: { + requiresGround: true, + }, + pin157: { + requiresPower: true, + }, + pin139: { + requiresPower: true, + }, + pin121: { + requiresGround: true, + }, + pin18: { + requiresGround: true, + }, +} as const; + +export const AM3357BZCZA80 = (props: ChipProps) => { + return ( + + ); +}; + +export default AM3357BZCZA80; diff --git a/lib/chips/AM4376BZDND80.circuit.tsx b/lib/chips/AM4376BZDND80.circuit.tsx new file mode 100644 index 00000000..0d12f195 --- /dev/null +++ b/lib/chips/AM4376BZDND80.circuit.tsx @@ -0,0 +1,4762 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["gpmc_wait0", "A2"], + pin3: ["gpmc_be1n", "A3"], + pin4: ["gpmc_a3", "A4"], + pin5: ["gpmc_ad1", "A5"], + pin6: ["gpmc_ad3", "A6"], + pin7: ["gpmc_ad5", "A7"], + pin8: ["gpmc_csn0", "A8"], + pin9: ["gpmc_advn_ale", "A9"], + pin10: ["gpmc_ad9", "A10"], + pin11: ["gpmc_ad15", "A11"], + pin12: ["gpmc_clk", "A12"], + pin13: ["mii1_tx_en", "A13"], + pin14: ["mii1_txd1", "A14"], + pin15: ["mii1_rx_dv", "A15"], + pin16: ["rmii1_ref_clk", "A16"], + pin17: ["mdio_data", "A17"], + pin18: ["dss_data10", "A18"], + pin19: ["dss_data8", "A19"], + pin20: ["dss_data4", "A20"], + pin21: ["dss_data1", "A21"], + pin22: ["dss_pclk", "A22"], + pin23: ["dss_hsync", "A23"], + pin24: ["dss_ac_bias_en", "A24"], + pin25: ["VSS", "A25", "VSS_A25"], + pin394: ["ddr_dqs3", "AA1"], + pin395: ["ddr_dqsn3", "AA2"], + pin396: ["ddr_d27", "AA3"], + pin397: ["Reserved", "AA7", "Reserved_AA7"], + pin398: ["Reserved", "AA9", "Reserved_AA9"], + pin399: ["Reserved", "AA10", "Reserved_AA10"], + pin400: ["ADC0_AIN0", "AA12"], + pin401: ["ADC0_AIN3", "AA13"], + pin402: ["ADC1_AIN4", "AA15"], + pin403: ["ADC1_AIN2", "AA16"], + pin404: ["cam0_data3", "AA18"], + pin405: ["cam0_data9", "AA19"], + pin406: ["VSS", "AA23", "VSS_AA23"], + pin407: ["TDO", "AA24"], + pin408: ["TCK", "AA25"], + pin409: ["ddr_d29", "AB1"], + pin410: ["ddr_d28", "AB2"], + pin411: ["Reserved", "AB6", "Reserved_AB6"], + pin412: ["Reserved", "AB7", "Reserved_AB7"], + pin413: ["Reserved", "AB9", "Reserved_AB9"], + pin414: ["Reserved", "AB10", "Reserved_AB10"], + pin415: ["VDDA_ADC0", "AB12"], + pin416: ["ADC0_AIN4", "AB13"], + pin417: ["ADC1_AIN3", "AB15"], + pin418: ["ADC1_AIN1", "AB16"], + pin419: ["cam0_data1", "AB18"], + pin420: ["cam0_data8", "AB19"], + pin421: ["cam1_data0", "AB20"], + pin422: ["I2C0_SDA", "AB24"], + pin423: ["cam1_wen", "AB25"], + pin424: ["ddr_d30", "AC1"], + pin425: ["ddr_d31", "AC2"], + pin426: ["ddr_vtp", "AC3"], + pin427: ["Reserved", "AC5", "Reserved_AC5"], + pin428: ["Reserved", "AC6", "Reserved_AC6"], + pin429: ["Reserved", "AC7", "Reserved_AC7"], + pin430: ["Reserved", "AC9", "Reserved_AC9"], + pin431: ["Reserved", "AC10", "Reserved_AC10"], + pin432: ["Reserved", "AC12", "Reserved_AC12"], + pin433: ["ADC0_AIN5", "AC13"], + pin434: ["VSSA_ADC", "AC15"], + pin435: ["ADC1_AIN0", "AC16"], + pin436: ["cam0_field", "AC18"], + pin437: ["cam0_pclk", "AC20"], + pin438: ["cam1_data1", "AC21"], + pin439: ["cam1_vd", "AC23"], + pin440: ["cam1_data9", "AC24"], + pin441: ["cam1_field", "AC25"], + pin442: ["Reserved", "AD1", "Reserved_AD1"], + pin443: ["Reserved", "AD2", "Reserved_AD2"], + pin444: ["CAP_VDD_RTC", "AD3"], + pin445: ["VSS_RTC", "AD4"], + pin446: ["VDDS_RTC", "AD5"], + pin447: ["RTC_PMIC_EN", "AD6"], + pin448: ["Reserved", "AD7", "Reserved_AD7"], + pin449: ["VDDS", "AD8", "VDDS_AD8"], + pin450: ["VDD_CORE", "AD9", "VDD_CORE_AD9"], + pin451: ["Reserved", "AD10", "Reserved_AD10"], + pin452: ["Reserved", "AD11", "Reserved_AD11"], + pin453: ["VDDS", "AD12", "VDDS_AD12"], + pin454: ["ADC0_AIN6", "AD13"], + pin455: ["ADC0_VREFP", "AD14"], + pin456: ["ADC1_VREFN", "AD15"], + pin457: ["ADC1_AIN7", "AD16"], + pin458: ["cam0_wen", "AD17"], + pin459: ["cam0_vd", "AD18"], + pin460: ["cam0_data5", "AD19"], + pin461: ["cam0_data7", "AD20"], + pin462: ["cam1_data2", "AD21"], + pin463: ["cam1_data4", "AD22"], + pin464: ["cam1_data6", "AD23"], + pin465: ["cam1_data8", "AD24"], + pin466: ["cam1_hd", "AD25"], + pin467: ["VSS", "AE1", "VSS_AE1"], + pin468: ["RTC_KALDO_EN", "AE2"], + pin469: ["RTC_WAKEUP", "AE3"], + pin470: ["RTC_XTALOUT", "AE4"], + pin471: ["RTC_XTALIN", "AE5"], + pin472: ["RTC_PWRONRST", "AE6"], + pin473: ["VSS", "AE7", "VSS_AE7"], + pin474: ["VSS", "AE8", "VSS_AE8"], + pin475: ["Reserved", "AE9", "Reserved_AE9"], + pin476: ["VSS", "AE10", "VSS_AE10"], + pin477: ["Reserved", "AE11", "Reserved_AE11"], + pin478: ["Reserved", "AE12", "Reserved_AE12"], + pin479: ["ADC0_AIN7", "AE13"], + pin480: ["ADC0_VREFN", "AE14"], + pin481: ["ADC1_VREFP", "AE15"], + pin482: ["ADC1_AIN6", "AE16"], + pin483: ["cam0_hd", "AE17"], + pin484: ["cam0_data0", "AE18"], + pin485: ["cam0_data4", "AE19"], + pin486: ["cam0_data6", "AE20"], + pin487: ["cam1_pclk", "AE21"], + pin488: ["cam1_data3", "AE22"], + pin489: ["cam1_data5", "AE23"], + pin490: ["cam1_data7", "AE24"], + pin491: ["VSS", "AE25", "VSS_AE25"], + pin26: ["mmc0_dat3", "B1"], + pin27: ["mmc0_dat2", "B2"], + pin28: ["gpmc_wpn", "B3"], + pin29: ["gpmc_a9", "B4"], + pin30: ["gpmc_ad0", "B5"], + pin31: ["gpmc_ad2", "B6"], + pin32: ["gpmc_ad4", "B7"], + pin33: ["gpmc_ad7", "B8"], + pin34: ["gpmc_csn1", "B9"], + pin35: ["gpmc_ad8", "B10"], + pin36: ["gpmc_ad14", "B11"], + pin37: ["gpmc_csn3", "B12"], + pin38: ["mii1_rx_er", "B13"], + pin39: ["mii1_crs", "B14"], + pin40: ["mii1_txd0", "B15"], + pin41: ["mii1_rxd1", "B16"], + pin42: ["mdio_clk", "B17"], + pin43: ["dss_data11", "B18"], + pin44: ["dss_data9", "B19"], + pin45: ["dss_data5", "B20"], + pin46: ["dss_data2", "B21"], + pin47: ["dss_data0", "B22"], + pin48: ["dss_vsync", "B23"], + pin49: ["VSS_OSC", "B24"], + pin50: ["XTALOUT", "B25"], + pin51: ["mmc0_dat0", "C1"], + pin52: ["mmc0_dat1", "C2"], + pin53: ["gpmc_a0", "C3"], + pin54: ["gpmc_a1", "C5"], + pin55: ["gpmc_a2", "C6"], + pin56: ["gpmc_ad6", "C8"], + pin57: ["gpmc_be0n_cle", "C10"], + pin58: ["gpmc_ad13", "C11"], + pin59: ["mii1_txd2", "C13"], + pin60: ["mii1_rxd3", "C14"], + pin61: ["mii1_txd3", "C16"], + pin62: ["dss_data14", "C17"], + pin63: ["dss_data12", "C19"], + pin64: ["dss_data6", "C20"], + pin65: ["dss_data3", "C21"], + pin66: ["VDDS_OSC", "C23"], + pin67: ["xdma_event_intr1", "C24"], + pin68: ["XTALIN", "C25"], + pin69: ["mmc0_clk", "D1"], + pin70: ["mmc0_cmd", "D2"], + pin71: ["CAP_VDDS1P8V_IO", "D6"], + pin72: ["gpmc_a4", "D7"], + pin73: ["gpmc_a11", "D8"], + pin74: ["gpmc_wen", "D10"], + pin75: ["gpmc_ad11", "D11"], + pin76: ["mii1_rx_clk", "D13"], + pin77: ["mii1_tx_clk", "D14"], + pin78: ["mii1_col", "D16"], + pin79: ["dss_data15", "D17"], + pin80: ["dss_data13", "D19"], + pin81: ["vdd_mpu_mon", "D20"], + pin82: ["xdma_event_intr0", "D24"], + pin83: ["gpio5_8", "D25"], + pin84: ["ddr_d2", "E1"], + pin85: ["ddr_d1", "E2"], + pin86: ["ddr_d0", "E3"], + pin87: ["gpmc_a5", "E7"], + pin88: ["gpmc_a6", "E8"], + pin89: ["gpmc_oen_ren", "E10"], + pin90: ["gpmc_ad12", "E11"], + pin91: ["CAP_VDD_SRAM_C", "E13"], + pin92: ["CAP_VDD_SRAM", "E14"], + pin93: ["mii1_rxd2", "E16"], + pin94: ["VDDS_PLL_MPU", "E17"], + pin95: ["dss_data7", "E19"], + pin96: ["VDDS_CLKOUT", "E23"], + pin97: ["gpio5_13", "E24"], + pin98: ["gpio5_12", "E25"], + pin99: ["ddr_dqsn0", "F1"], + pin100: ["ddr_dqs0", "F2"], + pin101: ["ddr_d3", "F3"], + pin102: ["ddr_dqm0", "F4"], + pin103: ["gpmc_a7", "F6"], + pin104: ["gpmc_a8", "F7"], + pin105: ["VDDS3P3V_IOLDO", "F8"], + pin106: ["gpmc_csn2", "F10"], + pin107: ["gpmc_ad10", "F11"], + pin108: ["VDDS_SRAM_COR", "F13"], + pin109: ["VDDS_SRAM_MPU", "F14"], + pin110: ["VDDSHV7", "F16"], + pin111: ["mii1_rxd0", "F17"], + pin112: ["CAP_VBB_MPU", "F19"], + pin113: ["VDDS", "F20", "VDDS_F20"], + pin114: ["VDDSHV5", "F22"], + pin115: ["gpio5_11", "F23"], + pin116: ["gpio5_9", "F24"], + pin117: ["USB1_DRVVBUS", "F25"], + pin118: ["ddr_d7", "G1"], + pin119: ["ddr_d6", "G2"], + pin120: ["ddr_d5", "G3"], + pin121: ["ddr_d4", "G4"], + pin122: ["VDDS_PLL_DDR", "G5"], + pin123: ["VDDS", "G6", "VDDS_G6"], + pin124: ["gpmc_a10", "G8"], + pin125: ["VDDSHV10", "G10", "VDDSHV10_G10"], + pin126: ["VDDSHV9", "G11", "VDDSHV9_G11"], + pin127: ["VDDSHV8", "G13", "VDDSHV8_G13"], + pin128: ["VDDSHV8", "G14", "VDDSHV8_G14"], + pin129: ["VDDSHV6", "G16", "VDDSHV6_G16"], + pin130: ["VDDSHV6", "G17", "VDDSHV6_G17"], + pin131: ["gpio5_10", "G20"], + pin132: ["USB0_DRVVBUS", "G21"], + pin133: ["WARMRSTn", "G22"], + pin134: ["eCAP0_in_PWM0_o", "G24"], + pin135: ["EXTINTn", "G25"], + pin136: ["ddr_d8", "H1"], + pin137: ["ddr_dqm1", "H2"], + pin138: ["VDDSHV11", "H8", "VDDSHV11_H8"], + pin139: ["VDDSHV11", "H9", "VDDSHV11_H9"], + pin140: ["VDDSHV10", "H10", "VDDSHV10_H10"], + pin141: ["VDDSHV9", "H11", "VDDSHV9_H11"], + pin142: ["VDDS", "H12", "VDDS_H12"], + pin143: ["VDD_MPU", "H13", "VDD_MPU_H13"], + pin144: ["VDD_MPU", "H14", "VDD_MPU_H14"], + pin145: ["VSS", "H15", "VSS_H15"], + pin146: ["VDD_MPU", "H16", "VDD_MPU_H16"], + pin147: ["VDDSHV6", "H17", "VDDSHV6_H17"], + pin148: ["VSS", "H18", "VSS_H18"], + pin149: ["Reserved", "H19", "Reserved_H19"], + pin150: ["clkreq", "H20"], + pin151: ["Reserved", "H21", "Reserved_H21"], + pin152: ["uart3_ctsn", "H22"], + pin153: ["mcasp0_axr0", "H23"], + pin154: ["uart3_txd", "H24"], + pin155: ["uart3_rxd", "H25"], + pin156: ["ddr_dqsn1", "J1"], + pin157: ["ddr_dqs1", "J2"], + pin158: ["ddr_d12", "J3"], + pin159: ["ddr_d11", "J4"], + pin160: ["ddr_d10", "J5"], + pin161: ["ddr_d9", "J6"], + pin162: ["VDDSHV1", "J7", "VDDSHV1_J7"], + pin163: ["VDDSHV1", "J8", "VDDSHV1_J8"], + pin164: ["VSS", "J9", "VSS_J9"], + pin165: ["VDD_CORE", "J10", "VDD_CORE_J10"], + pin166: ["VDD_CORE", "J11", "VDD_CORE_J11"], + pin167: ["VSS", "J12", "VSS_J12"], + pin168: ["VDD_MPU", "J13", "VDD_MPU_J13"], + pin169: ["VDD_MPU", "J14", "VDD_MPU_J14"], + pin170: ["VSS", "J15", "VSS_J15"], + pin171: ["VDD_MPU", "J16", "VDD_MPU_J16"], + pin172: ["VSS", "J17", "VSS_J17"], + pin173: ["VDDSHV3", "J18", "VDDSHV3_J18"], + pin174: ["uart0_txd", "J24"], + pin175: ["uart0_rtsn", "J25"], + pin176: ["ddr_ba0", "K1"], + pin177: ["ddr_ba1", "K2"], + pin178: ["ddr_ba2", "K3"], + pin179: ["ddr_d15", "K4"], + pin180: ["ddr_d14", "K5"], + pin181: ["ddr_d13", "K6"], + pin182: ["VDDS_DDR", "K7", "VDDS_DDR_K7"], + pin183: ["VDDS_DDR", "K8", "VDDS_DDR_K8"], + pin184: ["VSS", "K9", "VSS_K9"], + pin185: ["VSS", "K11", "VSS_K11"], + pin186: ["VSS", "K12", "VSS_K12"], + pin187: ["VSS", "K14", "VSS_K14"], + pin188: ["VSS", "K15", "VSS_K15"], + pin189: ["VDDSHV3", "K17", "VDDSHV3_K17"], + pin190: ["VDDSHV3", "K18", "VDDSHV3_K18"], + pin191: ["VDD_MPU", "K19", "VDD_MPU_K19"], + pin192: ["VDD_MPU", "K20", "VDD_MPU_K20"], + pin193: ["uart1_rxd", "K21"], + pin194: ["uart1_ctsn", "K22"], + pin195: ["mcasp0_fsr", "K23"], + pin196: ["uart3_rtsn", "K24"], + pin197: ["uart0_rxd", "K25"], + pin198: ["ddr_a1", "L1"], + pin199: ["ddr_a2", "L2"], + pin200: ["VSS", "L8", "VSS_L8"], + pin201: ["VSS", "L9", "VSS_L9"], + pin202: ["VSS", "L11", "VSS_L11"], + pin203: ["VDD_CORE", "L12", "VDD_CORE_L12"], + pin204: ["VDD_CORE", "L14", "VDD_CORE_L14"], + pin205: ["VSS", "L15", "VSS_L15"], + pin206: ["VSS", "L17", "VSS_L17"], + pin207: ["VSS", "L18", "VSS_L18"], + pin208: ["VDD_MPU", "L19", "VDD_MPU_L19"], + pin209: ["VDD_MPU", "L20", "VDD_MPU_L20"], + pin210: ["uart1_txd", "L21"], + pin211: ["uart1_rtsn", "L22"], + pin212: ["mcasp0_aclkr", "L23"], + pin213: ["mcasp0_ahclkx", "L24"], + pin214: ["uart0_ctsn", "L25"], + pin215: ["ddr_nck", "M1"], + pin216: ["ddr_ck", "M2"], + pin217: ["ddr_cke0", "M3"], + pin218: ["ddr_csn1", "M4"], + pin219: ["ddr_csn0", "M5"], + pin220: ["ddr_a10", "M6"], + pin221: ["VDDS_DDR", "M7", "VDDS_DDR_M7"], + pin222: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin223: ["VDD_CORE", "M9", "VDD_CORE_M9"], + pin224: ["VSS", "M10", "VSS_M10"], + pin225: ["VSS", "M11", "VSS_M11"], + pin226: ["VDD_CORE", "M12", "VDD_CORE_M12"], + pin227: ["VSS", "M13", "VSS_M13"], + pin228: ["VDD_CORE", "M14", "VDD_CORE_M14"], + pin229: ["VSS", "M15", "VSS_M15"], + pin230: ["VSS", "M16", "VSS_M16"], + pin231: ["VDD_MPU", "M17", "VDD_MPU_M17"], + pin232: ["VDD_MPU", "M18", "VDD_MPU_M18"], + pin233: ["mcasp0_ahclkr", "M24"], + pin234: ["mcasp0_axr1", "M25"], + pin235: ["ddr_a0", "N1"], + pin236: ["ddr_rasn", "N2"], + pin237: ["ddr_casn", "N3"], + pin238: ["ddr_wen", "N4"], + pin239: ["ddr_a13", "N5"], + pin240: ["ddr_cke1", "N6"], + pin241: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin242: ["VDDS_DDR", "N8", "VDDS_DDR_N8"], + pin243: ["VDD_CORE", "N9", "VDD_CORE_N9"], + pin244: ["VSS", "N10", "VSS_N10"], + pin245: ["VSS", "N11", "VSS_N11"], + pin246: ["VSS", "N12", "VSS_N12"], + pin247: ["VSS", "N13", "VSS_N13"], + pin248: ["VSS", "N14", "VSS_N14"], + pin249: ["VSS", "N15", "VSS_N15"], + pin250: ["VDD_CORE", "N16", "VDD_CORE_N16"], + pin251: ["VDD_CORE", "N17", "VDD_CORE_N17"], + pin252: ["VDDSHV3", "N18", "VDDSHV3_N18"], + pin253: ["VDDSHV3", "N19", "VDDSHV3_N19"], + pin254: ["spi2_sclk", "N20"], + pin255: ["VDDS_PLL_CORE", "N21"], + pin256: ["mcasp0_fsx", "N22"], + pin257: ["EMU0", "N23"], + pin258: ["mcasp0_aclkx", "N24"], + pin259: ["spi4_cs0", "N25"], + pin260: ["ddr_a4", "P1"], + pin261: ["ddr_a3", "P2"], + pin262: ["VSS", "P8", "VSS_P8"], + pin263: ["VSS", "P9", "VSS_P9"], + pin264: ["VSS", "P10", "VSS_P10"], + pin265: ["VSS", "P11", "VSS_P11"], + pin266: ["VSS", "P12", "VSS_P12"], + pin267: ["VSS", "P13", "VSS_P13"], + pin268: ["VSS", "P14", "VSS_P14"], + pin269: ["VSS", "P15", "VSS_P15"], + pin270: ["VDD_CORE", "P16", "VDD_CORE_P16"], + pin271: ["VDD_CORE", "P17", "VDD_CORE_P17"], + pin272: ["VDDSHV3", "P18", "VDDSHV3_P18"], + pin273: ["VDDS", "P19", "VDDS_P19"], + pin274: ["spi2_d1", "P20"], + pin275: ["VPP", "P21"], + pin276: ["spi2_d0", "P22"], + pin277: ["spi0_sclk", "P23"], + pin278: ["spi4_d1", "P24"], + pin279: ["spi4_sclk", "P25"], + pin280: ["ddr_a9", "R1"], + pin281: ["ddr_a8", "R2"], + pin282: ["ddr_a7", "R3"], + pin283: ["ddr_a6", "R4"], + pin284: ["ddr_a5", "R5"], + pin285: ["VDDS_DDR", "R6", "VDDS_DDR_R6"], + pin286: ["VDDS_DDR", "R7", "VDDS_DDR_R7"], + pin287: ["VDDS_DDR", "R8", "VDDS_DDR_R8"], + pin288: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin289: ["VDD_CORE", "R11", "VDD_CORE_R11"], + pin290: ["VSS", "R12", "VSS_R12"], + pin291: ["VDD_CORE", "R14", "VDD_CORE_R14"], + pin292: ["VSS", "R15", "VSS_R15"], + pin293: ["VSS", "R17", "VSS_R17"], + pin294: ["VSS", "R18", "VSS_R18"], + pin295: ["spi4_d0", "R24"], + pin296: ["spi0_cs1", "R25"], + pin297: ["ddr_resetn", "T1"], + pin298: ["ddr_a15", "T2"], + pin299: ["ddr_a14", "T3"], + pin300: ["ddr_a12", "T4"], + pin301: ["ddr_a11", "T5"], + pin302: ["ddr_vref", "T6"], + pin303: ["VDDS_DDR", "T7", "VDDS_DDR_T7"], + pin304: ["VDDS_DDR", "T8", "VDDS_DDR_T8"], + pin305: ["VDD_CORE", "T9", "VDD_CORE_T9"], + pin306: ["VDD_CORE", "T11", "VDD_CORE_T11"], + pin307: ["VSS", "T12", "VSS_T12"], + pin308: ["VDD_CORE", "T14", "VDD_CORE_T14"], + pin309: ["VSS", "T15", "VSS_T15"], + pin310: ["VSS", "T17", "VSS_T17"], + pin311: ["VDD_CORE", "T18", "VDD_CORE_T18"], + pin312: ["VDD_CORE", "T19", "VDD_CORE_T19"], + pin313: ["spi0_cs0", "T20"], + pin314: ["spi0_d1", "T21"], + pin315: ["spi0_d0", "T22"], + pin316: ["spi2_cs0", "T23"], + pin317: ["EMU1", "T24"], + pin318: ["USB1_VBUS", "T25"], + pin319: ["ddr_odt0", "U1"], + pin320: ["ddr_odt1", "U2"], + pin321: ["VSS", "U8", "VSS_U8"], + pin322: ["VSS", "U9", "VSS_U9"], + pin323: ["VSS", "U10", "VSS_U10"], + pin324: ["VSS", "U11", "VSS_U11"], + pin325: ["VSS", "U12", "VSS_U12"], + pin326: ["VSS", "U13", "VSS_U13"], + pin327: ["VSS", "U14", "VSS_U14"], + pin328: ["VDD_CORE", "U15", "VDD_CORE_U15"], + pin329: ["VSS", "U16", "VSS_U16"], + pin330: ["VSS", "U17", "VSS_U17"], + pin331: ["VSS", "U18", "VSS_U18"], + pin352: ["VSS", "U19", "VSS_U19"], + pin353: ["VDDA3P3V_USB1", "U20"], + pin354: ["VDDA1P8V_USB1", "U21"], + pin355: ["USB1_CE", "U22"], + pin356: ["USB0_VBUS", "U23"], + pin332: ["USB0_ID", "U24"], + pin333: ["USB1_ID", "U25"], + pin334: ["ddr_d20", "V1"], + pin335: ["ddr_d19", "V2"], + pin336: ["ddr_d18", "V3"], + pin337: ["ddr_d17", "V4"], + pin338: ["ddr_d16", "V5"], + pin339: ["ddr_dqm2", "V6"], + pin340: ["VDDS_DDR", "V7", "VDDS_DDR_V7"], + pin341: ["VDDS_DDR", "V8", "VDDS_DDR_V8"], + pin342: ["VSS", "V9", "VSS_V9"], + pin343: ["VSS", "V10", "VSS_V10"], + pin344: ["VSS", "V11", "VSS_V11"], + pin345: ["VSS", "V12", "VSS_V12"], + pin346: ["VSS", "V13", "VSS_V13"], + pin347: ["VSS", "V14", "VSS_V14"], + pin348: ["VDD_CORE", "V15", "VDD_CORE_V15"], + pin349: ["VDDSHV2", "V16", "VDDSHV2_V16"], + pin350: ["VDDSHV2", "V17", "VDDSHV2_V17"], + pin351: ["VSS", "V18", "VSS_V18"], + pin357: ["USB1_DP", "V24"], + pin358: ["USB1_DM", "V25"], + pin359: ["ddr_dqs2", "W1"], + pin360: ["ddr_dqsn2", "W2"], + pin361: ["ddr_d21", "W4"], + pin362: ["ddr_d22", "W5"], + pin363: ["ddr_d23", "W6"], + pin364: ["Reserved", "W10", "Reserved_W10"], + pin365: ["VDD_CORE", "W12", "VDD_CORE_W12"], + pin366: ["VDD_CORE", "W13", "VDD_CORE_W13"], + pin367: ["VDDS", "W15", "VDDS_W15"], + pin368: ["VDDSHV2", "W16", "VDDSHV2_W16"], + pin369: ["VDDSHV3", "W18", "VDDSHV3_W18"], + pin370: ["VDDA3P3V_USB0", "W20"], + pin371: ["VDDA1P8V_USB0", "W21"], + pin372: ["USB0_CE", "W22"], + pin373: ["VSSA_USB", "W23"], + pin374: ["USB0_DM", "W24"], + pin375: ["USB0_DP", "W25"], + pin376: ["ddr_dqm3", "Y1"], + pin377: ["ddr_d24", "Y2"], + pin378: ["ddr_d25", "Y3"], + pin379: ["ddr_d26", "Y4"], + pin380: ["Reserved", "Y6", "Reserved_Y6"], + pin381: ["Reserved", "Y7", "Reserved_Y7"], + pin382: ["Reserved", "Y10", "Reserved_Y10"], + pin383: ["ADC0_AIN1", "Y12"], + pin384: ["ADC0_AIN2", "Y13"], + pin385: ["ADC1_AIN5", "Y15"], + pin386: ["VDDA_ADC1", "Y16"], + pin387: ["cam0_data2", "Y18"], + pin388: ["VDDS", "Y19", "VDDS_Y19"], + pin389: ["TDI", "Y20"], + pin390: ["I2C0_SCL", "Y22"], + pin391: ["PWRONRSTn", "Y23"], + pin392: ["TMS", "Y24"], + pin393: ["nTRST", "Y25"], +} as const; + +const pinRoles = { + pin1: "ground", + pin25: "ground", + pin397: "no-connect", + pin398: "no-connect", + pin399: "no-connect", + pin406: "ground", + pin411: "no-connect", + pin412: "no-connect", + pin413: "no-connect", + pin414: "no-connect", + pin415: "power", + pin427: "no-connect", + pin428: "no-connect", + pin429: "no-connect", + pin430: "no-connect", + pin431: "no-connect", + pin432: "no-connect", + pin434: "ground", + pin442: "no-connect", + pin443: "no-connect", + pin445: "ground", + pin446: "power", + pin448: "no-connect", + pin449: "power", + pin450: "power", + pin451: "no-connect", + pin452: "no-connect", + pin453: "power", + pin467: "ground", + pin473: "ground", + pin474: "ground", + pin475: "no-connect", + pin476: "ground", + pin477: "no-connect", + pin478: "no-connect", + pin491: "ground", + pin49: "ground", + pin66: "power", + pin81: "power", + pin94: "power", + pin96: "power", + pin105: "power", + pin108: "power", + pin109: "power", + pin113: "power", + pin122: "power", + pin123: "power", + pin142: "power", + pin143: "power", + pin144: "power", + pin145: "ground", + pin146: "power", + pin148: "ground", + pin149: "no-connect", + pin151: "no-connect", + pin164: "ground", + pin165: "power", + pin166: "power", + pin167: "ground", + pin168: "power", + pin169: "power", + pin170: "ground", + pin171: "power", + pin172: "ground", + pin182: "power", + pin183: "power", + pin184: "ground", + pin185: "ground", + pin186: "ground", + pin187: "ground", + pin188: "ground", + pin191: "power", + pin192: "power", + pin200: "ground", + pin201: "ground", + pin202: "ground", + pin203: "power", + pin204: "power", + pin205: "ground", + pin206: "ground", + pin207: "ground", + pin208: "power", + pin209: "power", + pin221: "power", + pin222: "power", + pin223: "power", + pin224: "ground", + pin225: "ground", + pin226: "power", + pin227: "ground", + pin228: "power", + pin229: "ground", + pin230: "ground", + pin231: "power", + pin232: "power", + pin241: "power", + pin242: "power", + pin243: "power", + pin244: "ground", + pin245: "ground", + pin246: "ground", + pin247: "ground", + pin248: "ground", + pin249: "ground", + pin250: "power", + pin251: "power", + pin255: "power", + pin262: "ground", + pin263: "ground", + pin264: "ground", + pin265: "ground", + pin266: "ground", + pin267: "ground", + pin268: "ground", + pin269: "ground", + pin270: "power", + pin271: "power", + pin273: "power", + pin275: "power", + pin285: "power", + pin286: "power", + pin287: "power", + pin288: "power", + pin289: "power", + pin290: "ground", + pin291: "power", + pin292: "ground", + pin293: "ground", + pin294: "ground", + pin303: "power", + pin304: "power", + pin305: "power", + pin306: "power", + pin307: "ground", + pin308: "power", + pin309: "ground", + pin310: "ground", + pin311: "power", + pin312: "power", + pin321: "ground", + pin322: "ground", + pin323: "ground", + pin324: "ground", + pin325: "ground", + pin326: "ground", + pin327: "ground", + pin328: "power", + pin329: "ground", + pin330: "ground", + pin331: "ground", + pin352: "ground", + pin353: "power", + pin354: "power", + pin340: "power", + pin341: "power", + pin342: "ground", + pin343: "ground", + pin344: "ground", + pin345: "ground", + pin346: "ground", + pin347: "ground", + pin348: "power", + pin351: "ground", + pin364: "no-connect", + pin365: "power", + pin366: "power", + pin367: "power", + pin370: "power", + pin371: "power", + pin373: "ground", + pin380: "no-connect", + pin381: "no-connect", + pin382: "no-connect", + pin386: "power", + pin388: "power", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin25: { + requiresGround: true, + }, + pin397: { + doNotConnect: true, + }, + pin398: { + doNotConnect: true, + }, + pin399: { + doNotConnect: true, + }, + pin406: { + requiresGround: true, + }, + pin411: { + doNotConnect: true, + }, + pin412: { + doNotConnect: true, + }, + pin413: { + doNotConnect: true, + }, + pin414: { + doNotConnect: true, + }, + pin415: { + requiresPower: true, + }, + pin427: { + doNotConnect: true, + }, + pin428: { + doNotConnect: true, + }, + pin429: { + doNotConnect: true, + }, + pin430: { + doNotConnect: true, + }, + pin431: { + doNotConnect: true, + }, + pin432: { + doNotConnect: true, + }, + pin434: { + requiresGround: true, + }, + pin442: { + doNotConnect: true, + }, + pin443: { + doNotConnect: true, + }, + pin445: { + requiresGround: true, + }, + pin446: { + requiresPower: true, + }, + pin448: { + doNotConnect: true, + }, + pin449: { + requiresPower: true, + }, + pin450: { + requiresPower: true, + }, + pin451: { + doNotConnect: true, + }, + pin452: { + doNotConnect: true, + }, + pin453: { + requiresPower: true, + }, + pin467: { + requiresGround: true, + }, + pin473: { + requiresGround: true, + }, + pin474: { + requiresGround: true, + }, + pin475: { + doNotConnect: true, + }, + pin476: { + requiresGround: true, + }, + pin477: { + doNotConnect: true, + }, + pin478: { + doNotConnect: true, + }, + pin491: { + requiresGround: true, + }, + pin49: { + requiresGround: true, + }, + pin66: { + requiresPower: true, + }, + pin81: { + requiresPower: true, + }, + pin94: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin105: { + requiresPower: true, + }, + pin108: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin113: { + requiresPower: true, + }, + pin122: { + requiresPower: true, + }, + pin123: { + requiresPower: true, + }, + pin142: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin145: { + requiresGround: true, + }, + pin146: { + requiresPower: true, + }, + pin148: { + requiresGround: true, + }, + pin149: { + doNotConnect: true, + }, + pin151: { + doNotConnect: true, + }, + pin164: { + requiresGround: true, + }, + pin165: { + requiresPower: true, + }, + pin166: { + requiresPower: true, + }, + pin167: { + requiresGround: true, + }, + pin168: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresGround: true, + }, + pin171: { + requiresPower: true, + }, + pin172: { + requiresGround: true, + }, + pin182: { + requiresPower: true, + }, + pin183: { + requiresPower: true, + }, + pin184: { + requiresGround: true, + }, + pin185: { + requiresGround: true, + }, + pin186: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin188: { + requiresGround: true, + }, + pin191: { + requiresPower: true, + }, + pin192: { + requiresPower: true, + }, + pin200: { + requiresGround: true, + }, + pin201: { + requiresGround: true, + }, + pin202: { + requiresGround: true, + }, + pin203: { + requiresPower: true, + }, + pin204: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin207: { + requiresGround: true, + }, + pin208: { + requiresPower: true, + }, + pin209: { + requiresPower: true, + }, + pin221: { + requiresPower: true, + }, + pin222: { + requiresPower: true, + }, + pin223: { + requiresPower: true, + }, + pin224: { + requiresGround: true, + }, + pin225: { + requiresGround: true, + }, + pin226: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin228: { + requiresPower: true, + }, + pin229: { + requiresGround: true, + }, + pin230: { + requiresGround: true, + }, + pin231: { + requiresPower: true, + }, + pin232: { + requiresPower: true, + }, + pin241: { + requiresPower: true, + }, + pin242: { + requiresPower: true, + }, + pin243: { + requiresPower: true, + }, + pin244: { + requiresGround: true, + }, + pin245: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin248: { + requiresGround: true, + }, + pin249: { + requiresGround: true, + }, + pin250: { + requiresPower: true, + }, + pin251: { + requiresPower: true, + }, + pin255: { + requiresPower: true, + }, + pin262: { + requiresGround: true, + }, + pin263: { + requiresGround: true, + }, + pin264: { + requiresGround: true, + }, + pin265: { + requiresGround: true, + }, + pin266: { + requiresGround: true, + }, + pin267: { + requiresGround: true, + }, + pin268: { + requiresGround: true, + }, + pin269: { + requiresGround: true, + }, + pin270: { + requiresPower: true, + }, + pin271: { + requiresPower: true, + }, + pin273: { + requiresPower: true, + }, + pin275: { + requiresPower: true, + }, + pin285: { + requiresPower: true, + }, + pin286: { + requiresPower: true, + }, + pin287: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin289: { + requiresPower: true, + }, + pin290: { + requiresGround: true, + }, + pin291: { + requiresPower: true, + }, + pin292: { + requiresGround: true, + }, + pin293: { + requiresGround: true, + }, + pin294: { + requiresGround: true, + }, + pin303: { + requiresPower: true, + }, + pin304: { + requiresPower: true, + }, + pin305: { + requiresPower: true, + }, + pin306: { + requiresPower: true, + }, + pin307: { + requiresGround: true, + }, + pin308: { + requiresPower: true, + }, + pin309: { + requiresGround: true, + }, + pin310: { + requiresGround: true, + }, + pin311: { + requiresPower: true, + }, + pin312: { + requiresPower: true, + }, + pin321: { + requiresGround: true, + }, + pin322: { + requiresGround: true, + }, + pin323: { + requiresGround: true, + }, + pin324: { + requiresGround: true, + }, + pin325: { + requiresGround: true, + }, + pin326: { + requiresGround: true, + }, + pin327: { + requiresGround: true, + }, + pin328: { + requiresPower: true, + }, + pin329: { + requiresGround: true, + }, + pin330: { + requiresGround: true, + }, + pin331: { + requiresGround: true, + }, + pin352: { + requiresGround: true, + }, + pin353: { + requiresPower: true, + }, + pin354: { + requiresPower: true, + }, + pin340: { + requiresPower: true, + }, + pin341: { + requiresPower: true, + }, + pin342: { + requiresGround: true, + }, + pin343: { + requiresGround: true, + }, + pin344: { + requiresGround: true, + }, + pin345: { + requiresGround: true, + }, + pin346: { + requiresGround: true, + }, + pin347: { + requiresGround: true, + }, + pin348: { + requiresPower: true, + }, + pin351: { + requiresGround: true, + }, + pin364: { + doNotConnect: true, + }, + pin365: { + requiresPower: true, + }, + pin366: { + requiresPower: true, + }, + pin367: { + requiresPower: true, + }, + pin370: { + requiresPower: true, + }, + pin371: { + requiresPower: true, + }, + pin373: { + requiresGround: true, + }, + pin380: { + doNotConnect: true, + }, + pin381: { + doNotConnect: true, + }, + pin382: { + doNotConnect: true, + }, + pin386: { + requiresPower: true, + }, + pin388: { + requiresPower: true, + }, +} as const; + +export const AM4376BZDND80 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1522435.obj?uuid=31ff4bad0f934917b11ca31c0ffdb105", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1522435.step?uuid=31ff4bad0f934917b11ca31c0ffdb105", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00005079999999679785, + y: -0.00005079999999679785, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default AM4376BZDND80; diff --git a/lib/chips/AM4378BZDND100.circuit.tsx b/lib/chips/AM4378BZDND100.circuit.tsx new file mode 100644 index 00000000..e558533b --- /dev/null +++ b/lib/chips/AM4378BZDND100.circuit.tsx @@ -0,0 +1,4762 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["gpmc_wait0", "A2"], + pin3: ["gpmc_be1n", "A3"], + pin4: ["gpmc_a3", "A4"], + pin5: ["gpmc_ad1", "A5"], + pin6: ["gpmc_ad3", "A6"], + pin7: ["gpmc_ad5", "A7"], + pin8: ["gpmc_csn0", "A8"], + pin9: ["gpmc_advn_ale", "A9"], + pin10: ["gpmc_ad9", "A10"], + pin11: ["gpmc_ad15", "A11"], + pin12: ["gpmc_clk", "A12"], + pin13: ["mii1_tx_en", "A13"], + pin14: ["mii1_txd1", "A14"], + pin15: ["mii1_rx_dv", "A15"], + pin16: ["rmii1_ref_clk", "A16"], + pin17: ["mdio_data", "A17"], + pin18: ["dss_data10", "A18"], + pin19: ["dss_data8", "A19"], + pin20: ["dss_data4", "A20"], + pin21: ["dss_data1", "A21"], + pin22: ["dss_pclk", "A22"], + pin23: ["dss_hsync", "A23"], + pin24: ["dss_ac_bias_en", "A24"], + pin25: ["VSS", "A25", "VSS_A25"], + pin394: ["ddr_dqs3", "AA1"], + pin395: ["ddr_dqsn3", "AA2"], + pin396: ["ddr_d27", "AA3"], + pin397: ["Reserved", "AA7", "Reserved_AA7"], + pin398: ["Reserved", "AA9", "Reserved_AA9"], + pin399: ["Reserved", "AA10", "Reserved_AA10"], + pin400: ["ADC0_AIN0", "AA12"], + pin401: ["ADC0_AIN3", "AA13"], + pin402: ["ADC1_AIN4", "AA15"], + pin403: ["ADC1_AIN2", "AA16"], + pin404: ["cam0_data3", "AA18"], + pin405: ["cam0_data9", "AA19"], + pin406: ["VSS", "AA23", "VSS_AA23"], + pin407: ["TDO", "AA24"], + pin408: ["TCK", "AA25"], + pin409: ["ddr_d29", "AB1"], + pin410: ["ddr_d28", "AB2"], + pin411: ["Reserved", "AB6", "Reserved_AB6"], + pin412: ["Reserved", "AB7", "Reserved_AB7"], + pin413: ["Reserved", "AB9", "Reserved_AB9"], + pin414: ["Reserved", "AB10", "Reserved_AB10"], + pin415: ["VDDA_ADC0", "AB12"], + pin416: ["ADC0_AIN4", "AB13"], + pin417: ["ADC1_AIN3", "AB15"], + pin418: ["ADC1_AIN1", "AB16"], + pin419: ["cam0_data1", "AB18"], + pin420: ["cam0_data8", "AB19"], + pin421: ["cam1_data0", "AB20"], + pin422: ["I2C0_SDA", "AB24"], + pin423: ["cam1_wen", "AB25"], + pin424: ["ddr_d30", "AC1"], + pin425: ["ddr_d31", "AC2"], + pin426: ["ddr_vtp", "AC3"], + pin427: ["Reserved", "AC5", "Reserved_AC5"], + pin428: ["Reserved", "AC6", "Reserved_AC6"], + pin429: ["Reserved", "AC7", "Reserved_AC7"], + pin430: ["Reserved", "AC9", "Reserved_AC9"], + pin431: ["Reserved", "AC10", "Reserved_AC10"], + pin432: ["Reserved", "AC12", "Reserved_AC12"], + pin433: ["ADC0_AIN5", "AC13"], + pin434: ["VSSA_ADC", "AC15"], + pin435: ["ADC1_AIN0", "AC16"], + pin436: ["cam0_field", "AC18"], + pin437: ["cam0_pclk", "AC20"], + pin438: ["cam1_data1", "AC21"], + pin439: ["cam1_vd", "AC23"], + pin440: ["cam1_data9", "AC24"], + pin441: ["cam1_field", "AC25"], + pin442: ["Reserved", "AD1", "Reserved_AD1"], + pin443: ["Reserved", "AD2", "Reserved_AD2"], + pin444: ["CAP_VDD_RTC", "AD3"], + pin445: ["VSS_RTC", "AD4"], + pin446: ["VDDS_RTC", "AD5"], + pin447: ["RTC_PMIC_EN", "AD6"], + pin448: ["Reserved", "AD7", "Reserved_AD7"], + pin449: ["VDDS", "AD8", "VDDS_AD8"], + pin450: ["VDD_CORE", "AD9", "VDD_CORE_AD9"], + pin451: ["Reserved", "AD10", "Reserved_AD10"], + pin452: ["Reserved", "AD11", "Reserved_AD11"], + pin453: ["VDDS", "AD12", "VDDS_AD12"], + pin454: ["ADC0_AIN6", "AD13"], + pin455: ["ADC0_VREFP", "AD14"], + pin456: ["ADC1_VREFN", "AD15"], + pin457: ["ADC1_AIN7", "AD16"], + pin458: ["cam0_wen", "AD17"], + pin459: ["cam0_vd", "AD18"], + pin460: ["cam0_data5", "AD19"], + pin461: ["cam0_data7", "AD20"], + pin462: ["cam1_data2", "AD21"], + pin463: ["cam1_data4", "AD22"], + pin464: ["cam1_data6", "AD23"], + pin465: ["cam1_data8", "AD24"], + pin466: ["cam1_hd", "AD25"], + pin467: ["VSS", "AE1", "VSS_AE1"], + pin468: ["RTC_KALDO_EN", "AE2"], + pin469: ["RTC_WAKEUP", "AE3"], + pin470: ["RTC_XTALOUT", "AE4"], + pin471: ["RTC_XTALIN", "AE5"], + pin472: ["RTC_PWRONRST", "AE6"], + pin473: ["VSS", "AE7", "VSS_AE7"], + pin474: ["VSS", "AE8", "VSS_AE8"], + pin475: ["Reserved", "AE9", "Reserved_AE9"], + pin476: ["VSS", "AE10", "VSS_AE10"], + pin477: ["Reserved", "AE11", "Reserved_AE11"], + pin478: ["Reserved", "AE12", "Reserved_AE12"], + pin479: ["ADC0_AIN7", "AE13"], + pin480: ["ADC0_VREFN", "AE14"], + pin481: ["ADC1_VREFP", "AE15"], + pin482: ["ADC1_AIN6", "AE16"], + pin483: ["cam0_hd", "AE17"], + pin484: ["cam0_data0", "AE18"], + pin485: ["cam0_data4", "AE19"], + pin486: ["cam0_data6", "AE20"], + pin487: ["cam1_pclk", "AE21"], + pin488: ["cam1_data3", "AE22"], + pin489: ["cam1_data5", "AE23"], + pin490: ["cam1_data7", "AE24"], + pin491: ["VSS", "AE25", "VSS_AE25"], + pin26: ["mmc0_dat3", "B1"], + pin27: ["mmc0_dat2", "B2"], + pin28: ["gpmc_wpn", "B3"], + pin29: ["gpmc_a9", "B4"], + pin30: ["gpmc_ad0", "B5"], + pin31: ["gpmc_ad2", "B6"], + pin32: ["gpmc_ad4", "B7"], + pin33: ["gpmc_ad7", "B8"], + pin34: ["gpmc_csn1", "B9"], + pin35: ["gpmc_ad8", "B10"], + pin36: ["gpmc_ad14", "B11"], + pin37: ["gpmc_csn3", "B12"], + pin38: ["mii1_rx_er", "B13"], + pin39: ["mii1_crs", "B14"], + pin40: ["mii1_txd0", "B15"], + pin41: ["mii1_rxd1", "B16"], + pin42: ["mdio_clk", "B17"], + pin43: ["dss_data11", "B18"], + pin44: ["dss_data9", "B19"], + pin45: ["dss_data5", "B20"], + pin46: ["dss_data2", "B21"], + pin47: ["dss_data0", "B22"], + pin48: ["dss_vsync", "B23"], + pin49: ["VSS_OSC", "B24"], + pin50: ["XTALOUT", "B25"], + pin51: ["mmc0_dat0", "C1"], + pin52: ["mmc0_dat1", "C2"], + pin53: ["gpmc_a0", "C3"], + pin54: ["gpmc_a1", "C5"], + pin55: ["gpmc_a2", "C6"], + pin56: ["gpmc_ad6", "C8"], + pin57: ["gpmc_be0n_cle", "C10"], + pin58: ["gpmc_ad13", "C11"], + pin59: ["mii1_txd2", "C13"], + pin60: ["mii1_rxd3", "C14"], + pin61: ["mii1_txd3", "C16"], + pin62: ["dss_data14", "C17"], + pin63: ["dss_data12", "C19"], + pin64: ["dss_data6", "C20"], + pin65: ["dss_data3", "C21"], + pin66: ["VDDS_OSC", "C23"], + pin67: ["xdma_event_intr1", "C24"], + pin68: ["XTALIN", "C25"], + pin69: ["mmc0_clk", "D1"], + pin70: ["mmc0_cmd", "D2"], + pin71: ["CAP_VDDS1P8V_IO", "D6"], + pin72: ["gpmc_a4", "D7"], + pin73: ["gpmc_a11", "D8"], + pin74: ["gpmc_wen", "D10"], + pin75: ["gpmc_ad11", "D11"], + pin76: ["mii1_rx_clk", "D13"], + pin77: ["mii1_tx_clk", "D14"], + pin78: ["mii1_col", "D16"], + pin79: ["dss_data15", "D17"], + pin80: ["dss_data13", "D19"], + pin81: ["vdd_mpu_mon", "D20"], + pin82: ["xdma_event_intr0", "D24"], + pin83: ["gpio5_8", "D25"], + pin84: ["ddr_d2", "E1"], + pin85: ["ddr_d1", "E2"], + pin86: ["ddr_d0", "E3"], + pin87: ["gpmc_a5", "E7"], + pin88: ["gpmc_a6", "E8"], + pin89: ["gpmc_oen_ren", "E10"], + pin90: ["gpmc_ad12", "E11"], + pin91: ["CAP_VDD_SRAM_C", "E13"], + pin92: ["CAP_VDD_SRAM", "E14"], + pin93: ["mii1_rxd2", "E16"], + pin94: ["VDDS_PLL_MPU", "E17"], + pin95: ["dss_data7", "E19"], + pin96: ["VDDS_CLKOUT", "E23"], + pin97: ["gpio5_13", "E24"], + pin98: ["gpio5_12", "E25"], + pin99: ["ddr_dqsn0", "F1"], + pin100: ["ddr_dqs0", "F2"], + pin101: ["ddr_d3", "F3"], + pin102: ["ddr_dqm0", "F4"], + pin103: ["gpmc_a7", "F6"], + pin104: ["gpmc_a8", "F7"], + pin105: ["VDDS3P3V_IOLDO", "F8"], + pin106: ["gpmc_csn2", "F10"], + pin107: ["gpmc_ad10", "F11"], + pin108: ["VDDS_SRAM_COR", "F13"], + pin109: ["VDDS_SRAM_MPU", "F14"], + pin110: ["VDDSHV7", "F16"], + pin111: ["mii1_rxd0", "F17"], + pin112: ["CAP_VBB_MPU", "F19"], + pin113: ["VDDS", "F20", "VDDS_F20"], + pin114: ["VDDSHV5", "F22"], + pin115: ["gpio5_11", "F23"], + pin116: ["gpio5_9", "F24"], + pin117: ["USB1_DRVVBUS", "F25"], + pin118: ["ddr_d7", "G1"], + pin119: ["ddr_d6", "G2"], + pin120: ["ddr_d5", "G3"], + pin121: ["ddr_d4", "G4"], + pin122: ["VDDS_PLL_DDR", "G5"], + pin123: ["VDDS", "G6", "VDDS_G6"], + pin124: ["gpmc_a10", "G8"], + pin125: ["VDDSHV10", "G10", "VDDSHV10_G10"], + pin126: ["VDDSHV9", "G11", "VDDSHV9_G11"], + pin127: ["VDDSHV8", "G13", "VDDSHV8_G13"], + pin128: ["VDDSHV8", "G14", "VDDSHV8_G14"], + pin129: ["VDDSHV6", "G16", "VDDSHV6_G16"], + pin130: ["VDDSHV6", "G17", "VDDSHV6_G17"], + pin131: ["gpio5_10", "G20"], + pin132: ["USB0_DRVVBUS", "G21"], + pin133: ["WARMRSTn", "G22"], + pin134: ["eCAP0_in_PWM0_o", "G24"], + pin135: ["EXTINTn", "G25"], + pin136: ["ddr_d8", "H1"], + pin137: ["ddr_dqm1", "H2"], + pin138: ["VDDSHV11", "H8", "VDDSHV11_H8"], + pin139: ["VDDSHV11", "H9", "VDDSHV11_H9"], + pin140: ["VDDSHV10", "H10", "VDDSHV10_H10"], + pin141: ["VDDSHV9", "H11", "VDDSHV9_H11"], + pin142: ["VDDS", "H12", "VDDS_H12"], + pin143: ["VDD_MPU", "H13", "VDD_MPU_H13"], + pin144: ["VDD_MPU", "H14", "VDD_MPU_H14"], + pin145: ["VSS", "H15", "VSS_H15"], + pin146: ["VDD_MPU", "H16", "VDD_MPU_H16"], + pin147: ["VDDSHV6", "H17", "VDDSHV6_H17"], + pin148: ["VSS", "H18", "VSS_H18"], + pin149: ["Reserved", "H19", "Reserved_H19"], + pin150: ["clkreq", "H20"], + pin151: ["Reserved", "H21", "Reserved_H21"], + pin152: ["uart3_ctsn", "H22"], + pin153: ["mcasp0_axr0", "H23"], + pin154: ["uart3_txd", "H24"], + pin155: ["uart3_rxd", "H25"], + pin156: ["ddr_dqsn1", "J1"], + pin157: ["ddr_dqs1", "J2"], + pin158: ["ddr_d12", "J3"], + pin159: ["ddr_d11", "J4"], + pin160: ["ddr_d10", "J5"], + pin161: ["ddr_d9", "J6"], + pin162: ["VDDSHV1", "J7", "VDDSHV1_J7"], + pin163: ["VDDSHV1", "J8", "VDDSHV1_J8"], + pin164: ["VSS", "J9", "VSS_J9"], + pin165: ["VDD_CORE", "J10", "VDD_CORE_J10"], + pin166: ["VDD_CORE", "J11", "VDD_CORE_J11"], + pin167: ["VSS", "J12", "VSS_J12"], + pin168: ["VDD_MPU", "J13", "VDD_MPU_J13"], + pin169: ["VDD_MPU", "J14", "VDD_MPU_J14"], + pin170: ["VSS", "J15", "VSS_J15"], + pin171: ["VDD_MPU", "J16", "VDD_MPU_J16"], + pin172: ["VSS", "J17", "VSS_J17"], + pin173: ["VDDSHV3", "J18", "VDDSHV3_J18"], + pin174: ["uart0_txd", "J24"], + pin175: ["uart0_rtsn", "J25"], + pin176: ["ddr_ba0", "K1"], + pin177: ["ddr_ba1", "K2"], + pin178: ["ddr_ba2", "K3"], + pin179: ["ddr_d15", "K4"], + pin180: ["ddr_d14", "K5"], + pin181: ["ddr_d13", "K6"], + pin182: ["VDDS_DDR", "K7", "VDDS_DDR_K7"], + pin183: ["VDDS_DDR", "K8", "VDDS_DDR_K8"], + pin184: ["VSS", "K9", "VSS_K9"], + pin185: ["VSS", "K11", "VSS_K11"], + pin186: ["VSS", "K12", "VSS_K12"], + pin187: ["VSS", "K14", "VSS_K14"], + pin188: ["VSS", "K15", "VSS_K15"], + pin189: ["VDDSHV3", "K17", "VDDSHV3_K17"], + pin190: ["VDDSHV3", "K18", "VDDSHV3_K18"], + pin191: ["VDD_MPU", "K19", "VDD_MPU_K19"], + pin192: ["VDD_MPU", "K20", "VDD_MPU_K20"], + pin193: ["uart1_rxd", "K21"], + pin194: ["uart1_ctsn", "K22"], + pin195: ["mcasp0_fsr", "K23"], + pin196: ["uart3_rtsn", "K24"], + pin197: ["uart0_rxd", "K25"], + pin198: ["ddr_a1", "L1"], + pin199: ["ddr_a2", "L2"], + pin200: ["VSS", "L8", "VSS_L8"], + pin201: ["VSS", "L9", "VSS_L9"], + pin202: ["VSS", "L11", "VSS_L11"], + pin203: ["VDD_CORE", "L12", "VDD_CORE_L12"], + pin204: ["VDD_CORE", "L14", "VDD_CORE_L14"], + pin205: ["VSS", "L15", "VSS_L15"], + pin206: ["VSS", "L17", "VSS_L17"], + pin207: ["VSS", "L18", "VSS_L18"], + pin208: ["VDD_MPU", "L19", "VDD_MPU_L19"], + pin209: ["VDD_MPU", "L20", "VDD_MPU_L20"], + pin210: ["uart1_txd", "L21"], + pin211: ["uart1_rtsn", "L22"], + pin212: ["mcasp0_aclkr", "L23"], + pin213: ["mcasp0_ahclkx", "L24"], + pin214: ["uart0_ctsn", "L25"], + pin215: ["ddr_nck", "M1"], + pin216: ["ddr_ck", "M2"], + pin217: ["ddr_cke0", "M3"], + pin218: ["ddr_csn1", "M4"], + pin219: ["ddr_csn0", "M5"], + pin220: ["ddr_a10", "M6"], + pin221: ["VDDS_DDR", "M7", "VDDS_DDR_M7"], + pin222: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin223: ["VDD_CORE", "M9", "VDD_CORE_M9"], + pin224: ["VSS", "M10", "VSS_M10"], + pin225: ["VSS", "M11", "VSS_M11"], + pin226: ["VDD_CORE", "M12", "VDD_CORE_M12"], + pin227: ["VSS", "M13", "VSS_M13"], + pin228: ["VDD_CORE", "M14", "VDD_CORE_M14"], + pin229: ["VSS", "M15", "VSS_M15"], + pin230: ["VSS", "M16", "VSS_M16"], + pin231: ["VDD_MPU", "M17", "VDD_MPU_M17"], + pin232: ["VDD_MPU", "M18", "VDD_MPU_M18"], + pin233: ["mcasp0_ahclkr", "M24"], + pin234: ["mcasp0_axr1", "M25"], + pin235: ["ddr_a0", "N1"], + pin236: ["ddr_rasn", "N2"], + pin237: ["ddr_casn", "N3"], + pin238: ["ddr_wen", "N4"], + pin239: ["ddr_a13", "N5"], + pin240: ["ddr_cke1", "N6"], + pin241: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin242: ["VDDS_DDR", "N8", "VDDS_DDR_N8"], + pin243: ["VDD_CORE", "N9", "VDD_CORE_N9"], + pin244: ["VSS", "N10", "VSS_N10"], + pin245: ["VSS", "N11", "VSS_N11"], + pin246: ["VSS", "N12", "VSS_N12"], + pin247: ["VSS", "N13", "VSS_N13"], + pin248: ["VSS", "N14", "VSS_N14"], + pin249: ["VSS", "N15", "VSS_N15"], + pin250: ["VDD_CORE", "N16", "VDD_CORE_N16"], + pin251: ["VDD_CORE", "N17", "VDD_CORE_N17"], + pin252: ["VDDSHV3", "N18", "VDDSHV3_N18"], + pin253: ["VDDSHV3", "N19", "VDDSHV3_N19"], + pin254: ["spi2_sclk", "N20"], + pin255: ["VDDS_PLL_CORE", "N21"], + pin256: ["mcasp0_fsx", "N22"], + pin257: ["EMU0", "N23"], + pin258: ["mcasp0_aclkx", "N24"], + pin259: ["spi4_cs0", "N25"], + pin260: ["ddr_a4", "P1"], + pin261: ["ddr_a3", "P2"], + pin262: ["VSS", "P8", "VSS_P8"], + pin263: ["VSS", "P9", "VSS_P9"], + pin264: ["VSS", "P10", "VSS_P10"], + pin265: ["VSS", "P11", "VSS_P11"], + pin266: ["VSS", "P12", "VSS_P12"], + pin267: ["VSS", "P13", "VSS_P13"], + pin268: ["VSS", "P14", "VSS_P14"], + pin269: ["VSS", "P15", "VSS_P15"], + pin270: ["VDD_CORE", "P16", "VDD_CORE_P16"], + pin271: ["VDD_CORE", "P17", "VDD_CORE_P17"], + pin272: ["VDDSHV3", "P18", "VDDSHV3_P18"], + pin273: ["VDDS", "P19", "VDDS_P19"], + pin274: ["spi2_d1", "P20"], + pin275: ["VPP", "P21"], + pin276: ["spi2_d0", "P22"], + pin277: ["spi0_sclk", "P23"], + pin278: ["spi4_d1", "P24"], + pin279: ["spi4_sclk", "P25"], + pin280: ["ddr_a9", "R1"], + pin281: ["ddr_a8", "R2"], + pin282: ["ddr_a7", "R3"], + pin283: ["ddr_a6", "R4"], + pin284: ["ddr_a5", "R5"], + pin285: ["VDDS_DDR", "R6", "VDDS_DDR_R6"], + pin286: ["VDDS_DDR", "R7", "VDDS_DDR_R7"], + pin287: ["VDDS_DDR", "R8", "VDDS_DDR_R8"], + pin288: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin289: ["VDD_CORE", "R11", "VDD_CORE_R11"], + pin290: ["VSS", "R12", "VSS_R12"], + pin291: ["VDD_CORE", "R14", "VDD_CORE_R14"], + pin292: ["VSS", "R15", "VSS_R15"], + pin293: ["VSS", "R17", "VSS_R17"], + pin294: ["VSS", "R18", "VSS_R18"], + pin295: ["spi4_d0", "R24"], + pin296: ["spi0_cs1", "R25"], + pin297: ["ddr_resetn", "T1"], + pin298: ["ddr_a15", "T2"], + pin299: ["ddr_a14", "T3"], + pin300: ["ddr_a12", "T4"], + pin301: ["ddr_a11", "T5"], + pin302: ["ddr_vref", "T6"], + pin303: ["VDDS_DDR", "T7", "VDDS_DDR_T7"], + pin304: ["VDDS_DDR", "T8", "VDDS_DDR_T8"], + pin305: ["VDD_CORE", "T9", "VDD_CORE_T9"], + pin306: ["VDD_CORE", "T11", "VDD_CORE_T11"], + pin307: ["VSS", "T12", "VSS_T12"], + pin308: ["VDD_CORE", "T14", "VDD_CORE_T14"], + pin309: ["VSS", "T15", "VSS_T15"], + pin310: ["VSS", "T17", "VSS_T17"], + pin311: ["VDD_CORE", "T18", "VDD_CORE_T18"], + pin312: ["VDD_CORE", "T19", "VDD_CORE_T19"], + pin313: ["spi0_cs0", "T20"], + pin314: ["spi0_d1", "T21"], + pin315: ["spi0_d0", "T22"], + pin316: ["spi2_cs0", "T23"], + pin317: ["EMU1", "T24"], + pin318: ["USB1_VBUS", "T25"], + pin319: ["ddr_odt0", "U1"], + pin320: ["ddr_odt1", "U2"], + pin321: ["VSS", "U8", "VSS_U8"], + pin322: ["VSS", "U9", "VSS_U9"], + pin323: ["VSS", "U10", "VSS_U10"], + pin324: ["VSS", "U11", "VSS_U11"], + pin325: ["VSS", "U12", "VSS_U12"], + pin326: ["VSS", "U13", "VSS_U13"], + pin327: ["VSS", "U14", "VSS_U14"], + pin328: ["VDD_CORE", "U15", "VDD_CORE_U15"], + pin329: ["VSS", "U16", "VSS_U16"], + pin330: ["VSS", "U17", "VSS_U17"], + pin331: ["VSS", "U18", "VSS_U18"], + pin352: ["VSS", "U19", "VSS_U19"], + pin353: ["VDDA3P3V_USB1", "U20"], + pin354: ["VDDA1P8V_USB1", "U21"], + pin355: ["USB1_CE", "U22"], + pin356: ["USB0_VBUS", "U23"], + pin332: ["USB0_ID", "U24"], + pin333: ["USB1_ID", "U25"], + pin334: ["ddr_d20", "V1"], + pin335: ["ddr_d19", "V2"], + pin336: ["ddr_d18", "V3"], + pin337: ["ddr_d17", "V4"], + pin338: ["ddr_d16", "V5"], + pin339: ["ddr_dqm2", "V6"], + pin340: ["VDDS_DDR", "V7", "VDDS_DDR_V7"], + pin341: ["VDDS_DDR", "V8", "VDDS_DDR_V8"], + pin342: ["VSS", "V9", "VSS_V9"], + pin343: ["VSS", "V10", "VSS_V10"], + pin344: ["VSS", "V11", "VSS_V11"], + pin345: ["VSS", "V12", "VSS_V12"], + pin346: ["VSS", "V13", "VSS_V13"], + pin347: ["VSS", "V14", "VSS_V14"], + pin348: ["VDD_CORE", "V15", "VDD_CORE_V15"], + pin349: ["VDDSHV2", "V16", "VDDSHV2_V16"], + pin350: ["VDDSHV2", "V17", "VDDSHV2_V17"], + pin351: ["VSS", "V18", "VSS_V18"], + pin357: ["USB1_DP", "V24"], + pin358: ["USB1_DM", "V25"], + pin359: ["ddr_dqs2", "W1"], + pin360: ["ddr_dqsn2", "W2"], + pin361: ["ddr_d21", "W4"], + pin362: ["ddr_d22", "W5"], + pin363: ["ddr_d23", "W6"], + pin364: ["Reserved", "W10", "Reserved_W10"], + pin365: ["VDD_CORE", "W12", "VDD_CORE_W12"], + pin366: ["VDD_CORE", "W13", "VDD_CORE_W13"], + pin367: ["VDDS", "W15", "VDDS_W15"], + pin368: ["VDDSHV2", "W16", "VDDSHV2_W16"], + pin369: ["VDDSHV3", "W18", "VDDSHV3_W18"], + pin370: ["VDDA3P3V_USB0", "W20"], + pin371: ["VDDA1P8V_USB0", "W21"], + pin372: ["USB0_CE", "W22"], + pin373: ["VSSA_USB", "W23"], + pin374: ["USB0_DM", "W24"], + pin375: ["USB0_DP", "W25"], + pin376: ["ddr_dqm3", "Y1"], + pin377: ["ddr_d24", "Y2"], + pin378: ["ddr_d25", "Y3"], + pin379: ["ddr_d26", "Y4"], + pin380: ["Reserved", "Y6", "Reserved_Y6"], + pin381: ["Reserved", "Y7", "Reserved_Y7"], + pin382: ["Reserved", "Y10", "Reserved_Y10"], + pin383: ["ADC0_AIN1", "Y12"], + pin384: ["ADC0_AIN2", "Y13"], + pin385: ["ADC1_AIN5", "Y15"], + pin386: ["VDDA_ADC1", "Y16"], + pin387: ["cam0_data2", "Y18"], + pin388: ["VDDS", "Y19", "VDDS_Y19"], + pin389: ["TDI", "Y20"], + pin390: ["I2C0_SCL", "Y22"], + pin391: ["PWRONRSTn", "Y23"], + pin392: ["TMS", "Y24"], + pin393: ["nTRST", "Y25"], +} as const; + +const pinRoles = { + pin1: "ground", + pin25: "ground", + pin397: "no-connect", + pin398: "no-connect", + pin399: "no-connect", + pin406: "ground", + pin411: "no-connect", + pin412: "no-connect", + pin413: "no-connect", + pin414: "no-connect", + pin415: "power", + pin427: "no-connect", + pin428: "no-connect", + pin429: "no-connect", + pin430: "no-connect", + pin431: "no-connect", + pin432: "no-connect", + pin434: "ground", + pin442: "no-connect", + pin443: "no-connect", + pin445: "ground", + pin446: "power", + pin448: "no-connect", + pin449: "power", + pin450: "power", + pin451: "no-connect", + pin452: "no-connect", + pin453: "power", + pin467: "ground", + pin473: "ground", + pin474: "ground", + pin475: "no-connect", + pin476: "ground", + pin477: "no-connect", + pin478: "no-connect", + pin491: "ground", + pin49: "ground", + pin66: "power", + pin81: "power", + pin94: "power", + pin96: "power", + pin105: "power", + pin108: "power", + pin109: "power", + pin113: "power", + pin122: "power", + pin123: "power", + pin142: "power", + pin143: "power", + pin144: "power", + pin145: "ground", + pin146: "power", + pin148: "ground", + pin149: "no-connect", + pin151: "no-connect", + pin164: "ground", + pin165: "power", + pin166: "power", + pin167: "ground", + pin168: "power", + pin169: "power", + pin170: "ground", + pin171: "power", + pin172: "ground", + pin182: "power", + pin183: "power", + pin184: "ground", + pin185: "ground", + pin186: "ground", + pin187: "ground", + pin188: "ground", + pin191: "power", + pin192: "power", + pin200: "ground", + pin201: "ground", + pin202: "ground", + pin203: "power", + pin204: "power", + pin205: "ground", + pin206: "ground", + pin207: "ground", + pin208: "power", + pin209: "power", + pin221: "power", + pin222: "power", + pin223: "power", + pin224: "ground", + pin225: "ground", + pin226: "power", + pin227: "ground", + pin228: "power", + pin229: "ground", + pin230: "ground", + pin231: "power", + pin232: "power", + pin241: "power", + pin242: "power", + pin243: "power", + pin244: "ground", + pin245: "ground", + pin246: "ground", + pin247: "ground", + pin248: "ground", + pin249: "ground", + pin250: "power", + pin251: "power", + pin255: "power", + pin262: "ground", + pin263: "ground", + pin264: "ground", + pin265: "ground", + pin266: "ground", + pin267: "ground", + pin268: "ground", + pin269: "ground", + pin270: "power", + pin271: "power", + pin273: "power", + pin275: "power", + pin285: "power", + pin286: "power", + pin287: "power", + pin288: "power", + pin289: "power", + pin290: "ground", + pin291: "power", + pin292: "ground", + pin293: "ground", + pin294: "ground", + pin303: "power", + pin304: "power", + pin305: "power", + pin306: "power", + pin307: "ground", + pin308: "power", + pin309: "ground", + pin310: "ground", + pin311: "power", + pin312: "power", + pin321: "ground", + pin322: "ground", + pin323: "ground", + pin324: "ground", + pin325: "ground", + pin326: "ground", + pin327: "ground", + pin328: "power", + pin329: "ground", + pin330: "ground", + pin331: "ground", + pin352: "ground", + pin353: "power", + pin354: "power", + pin340: "power", + pin341: "power", + pin342: "ground", + pin343: "ground", + pin344: "ground", + pin345: "ground", + pin346: "ground", + pin347: "ground", + pin348: "power", + pin351: "ground", + pin364: "no-connect", + pin365: "power", + pin366: "power", + pin367: "power", + pin370: "power", + pin371: "power", + pin373: "ground", + pin380: "no-connect", + pin381: "no-connect", + pin382: "no-connect", + pin386: "power", + pin388: "power", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin25: { + requiresGround: true, + }, + pin397: { + doNotConnect: true, + }, + pin398: { + doNotConnect: true, + }, + pin399: { + doNotConnect: true, + }, + pin406: { + requiresGround: true, + }, + pin411: { + doNotConnect: true, + }, + pin412: { + doNotConnect: true, + }, + pin413: { + doNotConnect: true, + }, + pin414: { + doNotConnect: true, + }, + pin415: { + requiresPower: true, + }, + pin427: { + doNotConnect: true, + }, + pin428: { + doNotConnect: true, + }, + pin429: { + doNotConnect: true, + }, + pin430: { + doNotConnect: true, + }, + pin431: { + doNotConnect: true, + }, + pin432: { + doNotConnect: true, + }, + pin434: { + requiresGround: true, + }, + pin442: { + doNotConnect: true, + }, + pin443: { + doNotConnect: true, + }, + pin445: { + requiresGround: true, + }, + pin446: { + requiresPower: true, + }, + pin448: { + doNotConnect: true, + }, + pin449: { + requiresPower: true, + }, + pin450: { + requiresPower: true, + }, + pin451: { + doNotConnect: true, + }, + pin452: { + doNotConnect: true, + }, + pin453: { + requiresPower: true, + }, + pin467: { + requiresGround: true, + }, + pin473: { + requiresGround: true, + }, + pin474: { + requiresGround: true, + }, + pin475: { + doNotConnect: true, + }, + pin476: { + requiresGround: true, + }, + pin477: { + doNotConnect: true, + }, + pin478: { + doNotConnect: true, + }, + pin491: { + requiresGround: true, + }, + pin49: { + requiresGround: true, + }, + pin66: { + requiresPower: true, + }, + pin81: { + requiresPower: true, + }, + pin94: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin105: { + requiresPower: true, + }, + pin108: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin113: { + requiresPower: true, + }, + pin122: { + requiresPower: true, + }, + pin123: { + requiresPower: true, + }, + pin142: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin145: { + requiresGround: true, + }, + pin146: { + requiresPower: true, + }, + pin148: { + requiresGround: true, + }, + pin149: { + doNotConnect: true, + }, + pin151: { + doNotConnect: true, + }, + pin164: { + requiresGround: true, + }, + pin165: { + requiresPower: true, + }, + pin166: { + requiresPower: true, + }, + pin167: { + requiresGround: true, + }, + pin168: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresGround: true, + }, + pin171: { + requiresPower: true, + }, + pin172: { + requiresGround: true, + }, + pin182: { + requiresPower: true, + }, + pin183: { + requiresPower: true, + }, + pin184: { + requiresGround: true, + }, + pin185: { + requiresGround: true, + }, + pin186: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin188: { + requiresGround: true, + }, + pin191: { + requiresPower: true, + }, + pin192: { + requiresPower: true, + }, + pin200: { + requiresGround: true, + }, + pin201: { + requiresGround: true, + }, + pin202: { + requiresGround: true, + }, + pin203: { + requiresPower: true, + }, + pin204: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin207: { + requiresGround: true, + }, + pin208: { + requiresPower: true, + }, + pin209: { + requiresPower: true, + }, + pin221: { + requiresPower: true, + }, + pin222: { + requiresPower: true, + }, + pin223: { + requiresPower: true, + }, + pin224: { + requiresGround: true, + }, + pin225: { + requiresGround: true, + }, + pin226: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin228: { + requiresPower: true, + }, + pin229: { + requiresGround: true, + }, + pin230: { + requiresGround: true, + }, + pin231: { + requiresPower: true, + }, + pin232: { + requiresPower: true, + }, + pin241: { + requiresPower: true, + }, + pin242: { + requiresPower: true, + }, + pin243: { + requiresPower: true, + }, + pin244: { + requiresGround: true, + }, + pin245: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin248: { + requiresGround: true, + }, + pin249: { + requiresGround: true, + }, + pin250: { + requiresPower: true, + }, + pin251: { + requiresPower: true, + }, + pin255: { + requiresPower: true, + }, + pin262: { + requiresGround: true, + }, + pin263: { + requiresGround: true, + }, + pin264: { + requiresGround: true, + }, + pin265: { + requiresGround: true, + }, + pin266: { + requiresGround: true, + }, + pin267: { + requiresGround: true, + }, + pin268: { + requiresGround: true, + }, + pin269: { + requiresGround: true, + }, + pin270: { + requiresPower: true, + }, + pin271: { + requiresPower: true, + }, + pin273: { + requiresPower: true, + }, + pin275: { + requiresPower: true, + }, + pin285: { + requiresPower: true, + }, + pin286: { + requiresPower: true, + }, + pin287: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin289: { + requiresPower: true, + }, + pin290: { + requiresGround: true, + }, + pin291: { + requiresPower: true, + }, + pin292: { + requiresGround: true, + }, + pin293: { + requiresGround: true, + }, + pin294: { + requiresGround: true, + }, + pin303: { + requiresPower: true, + }, + pin304: { + requiresPower: true, + }, + pin305: { + requiresPower: true, + }, + pin306: { + requiresPower: true, + }, + pin307: { + requiresGround: true, + }, + pin308: { + requiresPower: true, + }, + pin309: { + requiresGround: true, + }, + pin310: { + requiresGround: true, + }, + pin311: { + requiresPower: true, + }, + pin312: { + requiresPower: true, + }, + pin321: { + requiresGround: true, + }, + pin322: { + requiresGround: true, + }, + pin323: { + requiresGround: true, + }, + pin324: { + requiresGround: true, + }, + pin325: { + requiresGround: true, + }, + pin326: { + requiresGround: true, + }, + pin327: { + requiresGround: true, + }, + pin328: { + requiresPower: true, + }, + pin329: { + requiresGround: true, + }, + pin330: { + requiresGround: true, + }, + pin331: { + requiresGround: true, + }, + pin352: { + requiresGround: true, + }, + pin353: { + requiresPower: true, + }, + pin354: { + requiresPower: true, + }, + pin340: { + requiresPower: true, + }, + pin341: { + requiresPower: true, + }, + pin342: { + requiresGround: true, + }, + pin343: { + requiresGround: true, + }, + pin344: { + requiresGround: true, + }, + pin345: { + requiresGround: true, + }, + pin346: { + requiresGround: true, + }, + pin347: { + requiresGround: true, + }, + pin348: { + requiresPower: true, + }, + pin351: { + requiresGround: true, + }, + pin364: { + doNotConnect: true, + }, + pin365: { + requiresPower: true, + }, + pin366: { + requiresPower: true, + }, + pin367: { + requiresPower: true, + }, + pin370: { + requiresPower: true, + }, + pin371: { + requiresPower: true, + }, + pin373: { + requiresGround: true, + }, + pin380: { + doNotConnect: true, + }, + pin381: { + doNotConnect: true, + }, + pin382: { + doNotConnect: true, + }, + pin386: { + requiresPower: true, + }, + pin388: { + requiresPower: true, + }, +} as const; + +export const AM4378BZDND100 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2879669.obj?uuid=31ff4bad0f934917b11ca31c0ffdb105", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2879669.step?uuid=31ff4bad0f934917b11ca31c0ffdb105", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00005079999999679785, + y: -0.00005079999999679785, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default AM4378BZDND100; diff --git a/lib/chips/AM4379BZDNA100.circuit.tsx b/lib/chips/AM4379BZDNA100.circuit.tsx new file mode 100644 index 00000000..04d484a7 --- /dev/null +++ b/lib/chips/AM4379BZDNA100.circuit.tsx @@ -0,0 +1,4762 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["gpmc_wait0", "A2"], + pin3: ["gpmc_be1n", "A3"], + pin4: ["gpmc_a3", "A4"], + pin5: ["gpmc_ad1", "A5"], + pin6: ["gpmc_ad3", "A6"], + pin7: ["gpmc_ad5", "A7"], + pin8: ["gpmc_csn0", "A8"], + pin9: ["gpmc_advn_ale", "A9"], + pin10: ["gpmc_ad9", "A10"], + pin11: ["gpmc_ad15", "A11"], + pin12: ["gpmc_clk", "A12"], + pin13: ["mii1_tx_en", "A13"], + pin14: ["mii1_txd1", "A14"], + pin15: ["mii1_rx_dv", "A15"], + pin16: ["rmii1_ref_clk", "A16"], + pin17: ["mdio_data", "A17"], + pin18: ["dss_data10", "A18"], + pin19: ["dss_data8", "A19"], + pin20: ["dss_data4", "A20"], + pin21: ["dss_data1", "A21"], + pin22: ["dss_pclk", "A22"], + pin23: ["dss_hsync", "A23"], + pin24: ["dss_ac_bias_en", "A24"], + pin25: ["VSS", "A25", "VSS_A25"], + pin394: ["ddr_dqs3", "AA1"], + pin395: ["ddr_dqsn3", "AA2"], + pin396: ["ddr_d27", "AA3"], + pin397: ["Reserved", "AA7", "Reserved_AA7"], + pin398: ["Reserved", "AA9", "Reserved_AA9"], + pin399: ["Reserved", "AA10", "Reserved_AA10"], + pin400: ["ADC0_AIN0", "AA12"], + pin401: ["ADC0_AIN3", "AA13"], + pin402: ["ADC1_AIN4", "AA15"], + pin403: ["ADC1_AIN2", "AA16"], + pin404: ["cam0_data3", "AA18"], + pin405: ["cam0_data9", "AA19"], + pin406: ["VSS", "AA23", "VSS_AA23"], + pin407: ["TDO", "AA24"], + pin408: ["TCK", "AA25"], + pin409: ["ddr_d29", "AB1"], + pin410: ["ddr_d28", "AB2"], + pin411: ["Reserved", "AB6", "Reserved_AB6"], + pin412: ["Reserved", "AB7", "Reserved_AB7"], + pin413: ["Reserved", "AB9", "Reserved_AB9"], + pin414: ["Reserved", "AB10", "Reserved_AB10"], + pin415: ["VDDA_ADC0", "AB12"], + pin416: ["ADC0_AIN4", "AB13"], + pin417: ["ADC1_AIN3", "AB15"], + pin418: ["ADC1_AIN1", "AB16"], + pin419: ["cam0_data1", "AB18"], + pin420: ["cam0_data8", "AB19"], + pin421: ["cam1_data0", "AB20"], + pin422: ["I2C0_SDA", "AB24"], + pin423: ["cam1_wen", "AB25"], + pin424: ["ddr_d30", "AC1"], + pin425: ["ddr_d31", "AC2"], + pin426: ["ddr_vtp", "AC3"], + pin427: ["Reserved", "AC5", "Reserved_AC5"], + pin428: ["Reserved", "AC6", "Reserved_AC6"], + pin429: ["Reserved", "AC7", "Reserved_AC7"], + pin430: ["Reserved", "AC9", "Reserved_AC9"], + pin431: ["Reserved", "AC10", "Reserved_AC10"], + pin432: ["Reserved", "AC12", "Reserved_AC12"], + pin433: ["ADC0_AIN5", "AC13"], + pin434: ["VSSA_ADC", "AC15"], + pin435: ["ADC1_AIN0", "AC16"], + pin436: ["cam0_field", "AC18"], + pin437: ["cam0_pclk", "AC20"], + pin438: ["cam1_data1", "AC21"], + pin439: ["cam1_vd", "AC23"], + pin440: ["cam1_data9", "AC24"], + pin441: ["cam1_field", "AC25"], + pin442: ["Reserved", "AD1", "Reserved_AD1"], + pin443: ["Reserved", "AD2", "Reserved_AD2"], + pin444: ["CAP_VDD_RTC", "AD3"], + pin445: ["VSS_RTC", "AD4"], + pin446: ["VDDS_RTC", "AD5"], + pin447: ["RTC_PMIC_EN", "AD6"], + pin448: ["Reserved", "AD7", "Reserved_AD7"], + pin449: ["VDDS", "AD8", "VDDS_AD8"], + pin450: ["VDD_CORE", "AD9", "VDD_CORE_AD9"], + pin451: ["Reserved", "AD10", "Reserved_AD10"], + pin452: ["Reserved", "AD11", "Reserved_AD11"], + pin453: ["VDDS", "AD12", "VDDS_AD12"], + pin454: ["ADC0_AIN6", "AD13"], + pin455: ["ADC0_VREFP", "AD14"], + pin456: ["ADC1_VREFN", "AD15"], + pin457: ["ADC1_AIN7", "AD16"], + pin458: ["cam0_wen", "AD17"], + pin459: ["cam0_vd", "AD18"], + pin460: ["cam0_data5", "AD19"], + pin461: ["cam0_data7", "AD20"], + pin462: ["cam1_data2", "AD21"], + pin463: ["cam1_data4", "AD22"], + pin464: ["cam1_data6", "AD23"], + pin465: ["cam1_data8", "AD24"], + pin466: ["cam1_hd", "AD25"], + pin467: ["VSS", "AE1", "VSS_AE1"], + pin468: ["RTC_KALDO_EN", "AE2"], + pin469: ["RTC_WAKEUP", "AE3"], + pin470: ["RTC_XTALOUT", "AE4"], + pin471: ["RTC_XTALIN", "AE5"], + pin472: ["RTC_PWRONRST", "AE6"], + pin473: ["VSS", "AE7", "VSS_AE7"], + pin474: ["VSS", "AE8", "VSS_AE8"], + pin475: ["Reserved", "AE9", "Reserved_AE9"], + pin476: ["VSS", "AE10", "VSS_AE10"], + pin477: ["Reserved", "AE11", "Reserved_AE11"], + pin478: ["Reserved", "AE12", "Reserved_AE12"], + pin479: ["ADC0_AIN7", "AE13"], + pin480: ["ADC0_VREFN", "AE14"], + pin481: ["ADC1_VREFP", "AE15"], + pin482: ["ADC1_AIN6", "AE16"], + pin483: ["cam0_hd", "AE17"], + pin484: ["cam0_data0", "AE18"], + pin485: ["cam0_data4", "AE19"], + pin486: ["cam0_data6", "AE20"], + pin487: ["cam1_pclk", "AE21"], + pin488: ["cam1_data3", "AE22"], + pin489: ["cam1_data5", "AE23"], + pin490: ["cam1_data7", "AE24"], + pin491: ["VSS", "AE25", "VSS_AE25"], + pin26: ["mmc0_dat3", "B1"], + pin27: ["mmc0_dat2", "B2"], + pin28: ["gpmc_wpn", "B3"], + pin29: ["gpmc_a9", "B4"], + pin30: ["gpmc_ad0", "B5"], + pin31: ["gpmc_ad2", "B6"], + pin32: ["gpmc_ad4", "B7"], + pin33: ["gpmc_ad7", "B8"], + pin34: ["gpmc_csn1", "B9"], + pin35: ["gpmc_ad8", "B10"], + pin36: ["gpmc_ad14", "B11"], + pin37: ["gpmc_csn3", "B12"], + pin38: ["mii1_rx_er", "B13"], + pin39: ["mii1_crs", "B14"], + pin40: ["mii1_txd0", "B15"], + pin41: ["mii1_rxd1", "B16"], + pin42: ["mdio_clk", "B17"], + pin43: ["dss_data11", "B18"], + pin44: ["dss_data9", "B19"], + pin45: ["dss_data5", "B20"], + pin46: ["dss_data2", "B21"], + pin47: ["dss_data0", "B22"], + pin48: ["dss_vsync", "B23"], + pin49: ["VSS_OSC", "B24"], + pin50: ["XTALOUT", "B25"], + pin51: ["mmc0_dat0", "C1"], + pin52: ["mmc0_dat1", "C2"], + pin53: ["gpmc_a0", "C3"], + pin54: ["gpmc_a1", "C5"], + pin55: ["gpmc_a2", "C6"], + pin56: ["gpmc_ad6", "C8"], + pin57: ["gpmc_be0n_cle", "C10"], + pin58: ["gpmc_ad13", "C11"], + pin59: ["mii1_txd2", "C13"], + pin60: ["mii1_rxd3", "C14"], + pin61: ["mii1_txd3", "C16"], + pin62: ["dss_data14", "C17"], + pin63: ["dss_data12", "C19"], + pin64: ["dss_data6", "C20"], + pin65: ["dss_data3", "C21"], + pin66: ["VDDS_OSC", "C23"], + pin67: ["xdma_event_intr1", "C24"], + pin68: ["XTALIN", "C25"], + pin69: ["mmc0_clk", "D1"], + pin70: ["mmc0_cmd", "D2"], + pin71: ["CAP_VDDS1P8V_IO", "D6"], + pin72: ["gpmc_a4", "D7"], + pin73: ["gpmc_a11", "D8"], + pin74: ["gpmc_wen", "D10"], + pin75: ["gpmc_ad11", "D11"], + pin76: ["mii1_rx_clk", "D13"], + pin77: ["mii1_tx_clk", "D14"], + pin78: ["mii1_col", "D16"], + pin79: ["dss_data15", "D17"], + pin80: ["dss_data13", "D19"], + pin81: ["vdd_mpu_mon", "D20"], + pin82: ["xdma_event_intr0", "D24"], + pin83: ["gpio5_8", "D25"], + pin84: ["ddr_d2", "E1"], + pin85: ["ddr_d1", "E2"], + pin86: ["ddr_d0", "E3"], + pin87: ["gpmc_a5", "E7"], + pin88: ["gpmc_a6", "E8"], + pin89: ["gpmc_oen_ren", "E10"], + pin90: ["gpmc_ad12", "E11"], + pin91: ["CAP_VDD_SRAM_C", "E13"], + pin92: ["CAP_VDD_SRAM", "E14"], + pin93: ["mii1_rxd2", "E16"], + pin94: ["VDDS_PLL_MPU", "E17"], + pin95: ["dss_data7", "E19"], + pin96: ["VDDS_CLKOUT", "E23"], + pin97: ["gpio5_13", "E24"], + pin98: ["gpio5_12", "E25"], + pin99: ["ddr_dqsn0", "F1"], + pin100: ["ddr_dqs0", "F2"], + pin101: ["ddr_d3", "F3"], + pin102: ["ddr_dqm0", "F4"], + pin103: ["gpmc_a7", "F6"], + pin104: ["gpmc_a8", "F7"], + pin105: ["VDDS3P3V_IOLDO", "F8"], + pin106: ["gpmc_csn2", "F10"], + pin107: ["gpmc_ad10", "F11"], + pin108: ["VDDS_SRAM_COR", "F13"], + pin109: ["VDDS_SRAM_MPU", "F14"], + pin110: ["VDDSHV7", "F16"], + pin111: ["mii1_rxd0", "F17"], + pin112: ["CAP_VBB_MPU", "F19"], + pin113: ["VDDS", "F20", "VDDS_F20"], + pin114: ["VDDSHV5", "F22"], + pin115: ["gpio5_11", "F23"], + pin116: ["gpio5_9", "F24"], + pin117: ["USB1_DRVVBUS", "F25"], + pin118: ["ddr_d7", "G1"], + pin119: ["ddr_d6", "G2"], + pin120: ["ddr_d5", "G3"], + pin121: ["ddr_d4", "G4"], + pin122: ["VDDS_PLL_DDR", "G5"], + pin123: ["VDDS", "G6", "VDDS_G6"], + pin124: ["gpmc_a10", "G8"], + pin125: ["VDDSHV10", "G10", "VDDSHV10_G10"], + pin126: ["VDDSHV9", "G11", "VDDSHV9_G11"], + pin127: ["VDDSHV8", "G13", "VDDSHV8_G13"], + pin128: ["VDDSHV8", "G14", "VDDSHV8_G14"], + pin129: ["VDDSHV6", "G16", "VDDSHV6_G16"], + pin130: ["VDDSHV6", "G17", "VDDSHV6_G17"], + pin131: ["gpio5_10", "G20"], + pin132: ["USB0_DRVVBUS", "G21"], + pin133: ["WARMRSTn", "G22"], + pin134: ["eCAP0_in_PWM0_o", "G24"], + pin135: ["EXTINTn", "G25"], + pin136: ["ddr_d8", "H1"], + pin137: ["ddr_dqm1", "H2"], + pin138: ["VDDSHV11", "H8", "VDDSHV11_H8"], + pin139: ["VDDSHV11", "H9", "VDDSHV11_H9"], + pin140: ["VDDSHV10", "H10", "VDDSHV10_H10"], + pin141: ["VDDSHV9", "H11", "VDDSHV9_H11"], + pin142: ["VDDS", "H12", "VDDS_H12"], + pin143: ["VDD_MPU", "H13", "VDD_MPU_H13"], + pin144: ["VDD_MPU", "H14", "VDD_MPU_H14"], + pin145: ["VSS", "H15", "VSS_H15"], + pin146: ["VDD_MPU", "H16", "VDD_MPU_H16"], + pin147: ["VDDSHV6", "H17", "VDDSHV6_H17"], + pin148: ["VSS", "H18", "VSS_H18"], + pin149: ["Reserved", "H19", "Reserved_H19"], + pin150: ["clkreq", "H20"], + pin151: ["Reserved", "H21", "Reserved_H21"], + pin152: ["uart3_ctsn", "H22"], + pin153: ["mcasp0_axr0", "H23"], + pin154: ["uart3_txd", "H24"], + pin155: ["uart3_rxd", "H25"], + pin156: ["ddr_dqsn1", "J1"], + pin157: ["ddr_dqs1", "J2"], + pin158: ["ddr_d12", "J3"], + pin159: ["ddr_d11", "J4"], + pin160: ["ddr_d10", "J5"], + pin161: ["ddr_d9", "J6"], + pin162: ["VDDSHV1", "J7", "VDDSHV1_J7"], + pin163: ["VDDSHV1", "J8", "VDDSHV1_J8"], + pin164: ["VSS", "J9", "VSS_J9"], + pin165: ["VDD_CORE", "J10", "VDD_CORE_J10"], + pin166: ["VDD_CORE", "J11", "VDD_CORE_J11"], + pin167: ["VSS", "J12", "VSS_J12"], + pin168: ["VDD_MPU", "J13", "VDD_MPU_J13"], + pin169: ["VDD_MPU", "J14", "VDD_MPU_J14"], + pin170: ["VSS", "J15", "VSS_J15"], + pin171: ["VDD_MPU", "J16", "VDD_MPU_J16"], + pin172: ["VSS", "J17", "VSS_J17"], + pin173: ["VDDSHV3", "J18", "VDDSHV3_J18"], + pin174: ["uart0_txd", "J24"], + pin175: ["uart0_rtsn", "J25"], + pin176: ["ddr_ba0", "K1"], + pin177: ["ddr_ba1", "K2"], + pin178: ["ddr_ba2", "K3"], + pin179: ["ddr_d15", "K4"], + pin180: ["ddr_d14", "K5"], + pin181: ["ddr_d13", "K6"], + pin182: ["VDDS_DDR", "K7", "VDDS_DDR_K7"], + pin183: ["VDDS_DDR", "K8", "VDDS_DDR_K8"], + pin184: ["VSS", "K9", "VSS_K9"], + pin185: ["VSS", "K11", "VSS_K11"], + pin186: ["VSS", "K12", "VSS_K12"], + pin187: ["VSS", "K14", "VSS_K14"], + pin188: ["VSS", "K15", "VSS_K15"], + pin189: ["VDDSHV3", "K17", "VDDSHV3_K17"], + pin190: ["VDDSHV3", "K18", "VDDSHV3_K18"], + pin191: ["VDD_MPU", "K19", "VDD_MPU_K19"], + pin192: ["VDD_MPU", "K20", "VDD_MPU_K20"], + pin193: ["uart1_rxd", "K21"], + pin194: ["uart1_ctsn", "K22"], + pin195: ["mcasp0_fsr", "K23"], + pin196: ["uart3_rtsn", "K24"], + pin197: ["uart0_rxd", "K25"], + pin198: ["ddr_a1", "L1"], + pin199: ["ddr_a2", "L2"], + pin200: ["VSS", "L8", "VSS_L8"], + pin201: ["VSS", "L9", "VSS_L9"], + pin202: ["VSS", "L11", "VSS_L11"], + pin203: ["VDD_CORE", "L12", "VDD_CORE_L12"], + pin204: ["VDD_CORE", "L14", "VDD_CORE_L14"], + pin205: ["VSS", "L15", "VSS_L15"], + pin206: ["VSS", "L17", "VSS_L17"], + pin207: ["VSS", "L18", "VSS_L18"], + pin208: ["VDD_MPU", "L19", "VDD_MPU_L19"], + pin209: ["VDD_MPU", "L20", "VDD_MPU_L20"], + pin210: ["uart1_txd", "L21"], + pin211: ["uart1_rtsn", "L22"], + pin212: ["mcasp0_aclkr", "L23"], + pin213: ["mcasp0_ahclkx", "L24"], + pin214: ["uart0_ctsn", "L25"], + pin215: ["ddr_nck", "M1"], + pin216: ["ddr_ck", "M2"], + pin217: ["ddr_cke0", "M3"], + pin218: ["ddr_csn1", "M4"], + pin219: ["ddr_csn0", "M5"], + pin220: ["ddr_a10", "M6"], + pin221: ["VDDS_DDR", "M7", "VDDS_DDR_M7"], + pin222: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin223: ["VDD_CORE", "M9", "VDD_CORE_M9"], + pin224: ["VSS", "M10", "VSS_M10"], + pin225: ["VSS", "M11", "VSS_M11"], + pin226: ["VDD_CORE", "M12", "VDD_CORE_M12"], + pin227: ["VSS", "M13", "VSS_M13"], + pin228: ["VDD_CORE", "M14", "VDD_CORE_M14"], + pin229: ["VSS", "M15", "VSS_M15"], + pin230: ["VSS", "M16", "VSS_M16"], + pin231: ["VDD_MPU", "M17", "VDD_MPU_M17"], + pin232: ["VDD_MPU", "M18", "VDD_MPU_M18"], + pin233: ["mcasp0_ahclkr", "M24"], + pin234: ["mcasp0_axr1", "M25"], + pin235: ["ddr_a0", "N1"], + pin236: ["ddr_rasn", "N2"], + pin237: ["ddr_casn", "N3"], + pin238: ["ddr_wen", "N4"], + pin239: ["ddr_a13", "N5"], + pin240: ["ddr_cke1", "N6"], + pin241: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin242: ["VDDS_DDR", "N8", "VDDS_DDR_N8"], + pin243: ["VDD_CORE", "N9", "VDD_CORE_N9"], + pin244: ["VSS", "N10", "VSS_N10"], + pin245: ["VSS", "N11", "VSS_N11"], + pin246: ["VSS", "N12", "VSS_N12"], + pin247: ["VSS", "N13", "VSS_N13"], + pin248: ["VSS", "N14", "VSS_N14"], + pin249: ["VSS", "N15", "VSS_N15"], + pin250: ["VDD_CORE", "N16", "VDD_CORE_N16"], + pin251: ["VDD_CORE", "N17", "VDD_CORE_N17"], + pin252: ["VDDSHV3", "N18", "VDDSHV3_N18"], + pin253: ["VDDSHV3", "N19", "VDDSHV3_N19"], + pin254: ["spi2_sclk", "N20"], + pin255: ["VDDS_PLL_CORE", "N21"], + pin256: ["mcasp0_fsx", "N22"], + pin257: ["EMU0", "N23"], + pin258: ["mcasp0_aclkx", "N24"], + pin259: ["spi4_cs0", "N25"], + pin260: ["ddr_a4", "P1"], + pin261: ["ddr_a3", "P2"], + pin262: ["VSS", "P8", "VSS_P8"], + pin263: ["VSS", "P9", "VSS_P9"], + pin264: ["VSS", "P10", "VSS_P10"], + pin265: ["VSS", "P11", "VSS_P11"], + pin266: ["VSS", "P12", "VSS_P12"], + pin267: ["VSS", "P13", "VSS_P13"], + pin268: ["VSS", "P14", "VSS_P14"], + pin269: ["VSS", "P15", "VSS_P15"], + pin270: ["VDD_CORE", "P16", "VDD_CORE_P16"], + pin271: ["VDD_CORE", "P17", "VDD_CORE_P17"], + pin272: ["VDDSHV3", "P18", "VDDSHV3_P18"], + pin273: ["VDDS", "P19", "VDDS_P19"], + pin274: ["spi2_d1", "P20"], + pin275: ["VPP", "P21"], + pin276: ["spi2_d0", "P22"], + pin277: ["spi0_sclk", "P23"], + pin278: ["spi4_d1", "P24"], + pin279: ["spi4_sclk", "P25"], + pin280: ["ddr_a9", "R1"], + pin281: ["ddr_a8", "R2"], + pin282: ["ddr_a7", "R3"], + pin283: ["ddr_a6", "R4"], + pin284: ["ddr_a5", "R5"], + pin285: ["VDDS_DDR", "R6", "VDDS_DDR_R6"], + pin286: ["VDDS_DDR", "R7", "VDDS_DDR_R7"], + pin287: ["VDDS_DDR", "R8", "VDDS_DDR_R8"], + pin288: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin289: ["VDD_CORE", "R11", "VDD_CORE_R11"], + pin290: ["VSS", "R12", "VSS_R12"], + pin291: ["VDD_CORE", "R14", "VDD_CORE_R14"], + pin292: ["VSS", "R15", "VSS_R15"], + pin293: ["VSS", "R17", "VSS_R17"], + pin294: ["VSS", "R18", "VSS_R18"], + pin295: ["spi4_d0", "R24"], + pin296: ["spi0_cs1", "R25"], + pin297: ["ddr_resetn", "T1"], + pin298: ["ddr_a15", "T2"], + pin299: ["ddr_a14", "T3"], + pin300: ["ddr_a12", "T4"], + pin301: ["ddr_a11", "T5"], + pin302: ["ddr_vref", "T6"], + pin303: ["VDDS_DDR", "T7", "VDDS_DDR_T7"], + pin304: ["VDDS_DDR", "T8", "VDDS_DDR_T8"], + pin305: ["VDD_CORE", "T9", "VDD_CORE_T9"], + pin306: ["VDD_CORE", "T11", "VDD_CORE_T11"], + pin307: ["VSS", "T12", "VSS_T12"], + pin308: ["VDD_CORE", "T14", "VDD_CORE_T14"], + pin309: ["VSS", "T15", "VSS_T15"], + pin310: ["VSS", "T17", "VSS_T17"], + pin311: ["VDD_CORE", "T18", "VDD_CORE_T18"], + pin312: ["VDD_CORE", "T19", "VDD_CORE_T19"], + pin313: ["spi0_cs0", "T20"], + pin314: ["spi0_d1", "T21"], + pin315: ["spi0_d0", "T22"], + pin316: ["spi2_cs0", "T23"], + pin317: ["EMU1", "T24"], + pin318: ["USB1_VBUS", "T25"], + pin319: ["ddr_odt0", "U1"], + pin320: ["ddr_odt1", "U2"], + pin321: ["VSS", "U8", "VSS_U8"], + pin322: ["VSS", "U9", "VSS_U9"], + pin323: ["VSS", "U10", "VSS_U10"], + pin324: ["VSS", "U11", "VSS_U11"], + pin325: ["VSS", "U12", "VSS_U12"], + pin326: ["VSS", "U13", "VSS_U13"], + pin327: ["VSS", "U14", "VSS_U14"], + pin328: ["VDD_CORE", "U15", "VDD_CORE_U15"], + pin329: ["VSS", "U16", "VSS_U16"], + pin330: ["VSS", "U17", "VSS_U17"], + pin331: ["VSS", "U18", "VSS_U18"], + pin352: ["VSS", "U19", "VSS_U19"], + pin353: ["VDDA3P3V_USB1", "U20"], + pin354: ["VDDA1P8V_USB1", "U21"], + pin355: ["USB1_CE", "U22"], + pin356: ["USB0_VBUS", "U23"], + pin332: ["USB0_ID", "U24"], + pin333: ["USB1_ID", "U25"], + pin334: ["ddr_d20", "V1"], + pin335: ["ddr_d19", "V2"], + pin336: ["ddr_d18", "V3"], + pin337: ["ddr_d17", "V4"], + pin338: ["ddr_d16", "V5"], + pin339: ["ddr_dqm2", "V6"], + pin340: ["VDDS_DDR", "V7", "VDDS_DDR_V7"], + pin341: ["VDDS_DDR", "V8", "VDDS_DDR_V8"], + pin342: ["VSS", "V9", "VSS_V9"], + pin343: ["VSS", "V10", "VSS_V10"], + pin344: ["VSS", "V11", "VSS_V11"], + pin345: ["VSS", "V12", "VSS_V12"], + pin346: ["VSS", "V13", "VSS_V13"], + pin347: ["VSS", "V14", "VSS_V14"], + pin348: ["VDD_CORE", "V15", "VDD_CORE_V15"], + pin349: ["VDDSHV2", "V16", "VDDSHV2_V16"], + pin350: ["VDDSHV2", "V17", "VDDSHV2_V17"], + pin351: ["VSS", "V18", "VSS_V18"], + pin357: ["USB1_DP", "V24"], + pin358: ["USB1_DM", "V25"], + pin359: ["ddr_dqs2", "W1"], + pin360: ["ddr_dqsn2", "W2"], + pin361: ["ddr_d21", "W4"], + pin362: ["ddr_d22", "W5"], + pin363: ["ddr_d23", "W6"], + pin364: ["Reserved", "W10", "Reserved_W10"], + pin365: ["VDD_CORE", "W12", "VDD_CORE_W12"], + pin366: ["VDD_CORE", "W13", "VDD_CORE_W13"], + pin367: ["VDDS", "W15", "VDDS_W15"], + pin368: ["VDDSHV2", "W16", "VDDSHV2_W16"], + pin369: ["VDDSHV3", "W18", "VDDSHV3_W18"], + pin370: ["VDDA3P3V_USB0", "W20"], + pin371: ["VDDA1P8V_USB0", "W21"], + pin372: ["USB0_CE", "W22"], + pin373: ["VSSA_USB", "W23"], + pin374: ["USB0_DM", "W24"], + pin375: ["USB0_DP", "W25"], + pin376: ["ddr_dqm3", "Y1"], + pin377: ["ddr_d24", "Y2"], + pin378: ["ddr_d25", "Y3"], + pin379: ["ddr_d26", "Y4"], + pin380: ["Reserved", "Y6", "Reserved_Y6"], + pin381: ["Reserved", "Y7", "Reserved_Y7"], + pin382: ["Reserved", "Y10", "Reserved_Y10"], + pin383: ["ADC0_AIN1", "Y12"], + pin384: ["ADC0_AIN2", "Y13"], + pin385: ["ADC1_AIN5", "Y15"], + pin386: ["VDDA_ADC1", "Y16"], + pin387: ["cam0_data2", "Y18"], + pin388: ["VDDS", "Y19", "VDDS_Y19"], + pin389: ["TDI", "Y20"], + pin390: ["I2C0_SCL", "Y22"], + pin391: ["PWRONRSTn", "Y23"], + pin392: ["TMS", "Y24"], + pin393: ["nTRST", "Y25"], +} as const; + +const pinRoles = { + pin1: "ground", + pin25: "ground", + pin397: "no-connect", + pin398: "no-connect", + pin399: "no-connect", + pin406: "ground", + pin411: "no-connect", + pin412: "no-connect", + pin413: "no-connect", + pin414: "no-connect", + pin415: "power", + pin427: "no-connect", + pin428: "no-connect", + pin429: "no-connect", + pin430: "no-connect", + pin431: "no-connect", + pin432: "no-connect", + pin434: "ground", + pin442: "no-connect", + pin443: "no-connect", + pin445: "ground", + pin446: "power", + pin448: "no-connect", + pin449: "power", + pin450: "power", + pin451: "no-connect", + pin452: "no-connect", + pin453: "power", + pin467: "ground", + pin473: "ground", + pin474: "ground", + pin475: "no-connect", + pin476: "ground", + pin477: "no-connect", + pin478: "no-connect", + pin491: "ground", + pin49: "ground", + pin66: "power", + pin81: "power", + pin94: "power", + pin96: "power", + pin105: "power", + pin108: "power", + pin109: "power", + pin113: "power", + pin122: "power", + pin123: "power", + pin142: "power", + pin143: "power", + pin144: "power", + pin145: "ground", + pin146: "power", + pin148: "ground", + pin149: "no-connect", + pin151: "no-connect", + pin164: "ground", + pin165: "power", + pin166: "power", + pin167: "ground", + pin168: "power", + pin169: "power", + pin170: "ground", + pin171: "power", + pin172: "ground", + pin182: "power", + pin183: "power", + pin184: "ground", + pin185: "ground", + pin186: "ground", + pin187: "ground", + pin188: "ground", + pin191: "power", + pin192: "power", + pin200: "ground", + pin201: "ground", + pin202: "ground", + pin203: "power", + pin204: "power", + pin205: "ground", + pin206: "ground", + pin207: "ground", + pin208: "power", + pin209: "power", + pin221: "power", + pin222: "power", + pin223: "power", + pin224: "ground", + pin225: "ground", + pin226: "power", + pin227: "ground", + pin228: "power", + pin229: "ground", + pin230: "ground", + pin231: "power", + pin232: "power", + pin241: "power", + pin242: "power", + pin243: "power", + pin244: "ground", + pin245: "ground", + pin246: "ground", + pin247: "ground", + pin248: "ground", + pin249: "ground", + pin250: "power", + pin251: "power", + pin255: "power", + pin262: "ground", + pin263: "ground", + pin264: "ground", + pin265: "ground", + pin266: "ground", + pin267: "ground", + pin268: "ground", + pin269: "ground", + pin270: "power", + pin271: "power", + pin273: "power", + pin275: "power", + pin285: "power", + pin286: "power", + pin287: "power", + pin288: "power", + pin289: "power", + pin290: "ground", + pin291: "power", + pin292: "ground", + pin293: "ground", + pin294: "ground", + pin303: "power", + pin304: "power", + pin305: "power", + pin306: "power", + pin307: "ground", + pin308: "power", + pin309: "ground", + pin310: "ground", + pin311: "power", + pin312: "power", + pin321: "ground", + pin322: "ground", + pin323: "ground", + pin324: "ground", + pin325: "ground", + pin326: "ground", + pin327: "ground", + pin328: "power", + pin329: "ground", + pin330: "ground", + pin331: "ground", + pin352: "ground", + pin353: "power", + pin354: "power", + pin340: "power", + pin341: "power", + pin342: "ground", + pin343: "ground", + pin344: "ground", + pin345: "ground", + pin346: "ground", + pin347: "ground", + pin348: "power", + pin351: "ground", + pin364: "no-connect", + pin365: "power", + pin366: "power", + pin367: "power", + pin370: "power", + pin371: "power", + pin373: "ground", + pin380: "no-connect", + pin381: "no-connect", + pin382: "no-connect", + pin386: "power", + pin388: "power", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin25: { + requiresGround: true, + }, + pin397: { + doNotConnect: true, + }, + pin398: { + doNotConnect: true, + }, + pin399: { + doNotConnect: true, + }, + pin406: { + requiresGround: true, + }, + pin411: { + doNotConnect: true, + }, + pin412: { + doNotConnect: true, + }, + pin413: { + doNotConnect: true, + }, + pin414: { + doNotConnect: true, + }, + pin415: { + requiresPower: true, + }, + pin427: { + doNotConnect: true, + }, + pin428: { + doNotConnect: true, + }, + pin429: { + doNotConnect: true, + }, + pin430: { + doNotConnect: true, + }, + pin431: { + doNotConnect: true, + }, + pin432: { + doNotConnect: true, + }, + pin434: { + requiresGround: true, + }, + pin442: { + doNotConnect: true, + }, + pin443: { + doNotConnect: true, + }, + pin445: { + requiresGround: true, + }, + pin446: { + requiresPower: true, + }, + pin448: { + doNotConnect: true, + }, + pin449: { + requiresPower: true, + }, + pin450: { + requiresPower: true, + }, + pin451: { + doNotConnect: true, + }, + pin452: { + doNotConnect: true, + }, + pin453: { + requiresPower: true, + }, + pin467: { + requiresGround: true, + }, + pin473: { + requiresGround: true, + }, + pin474: { + requiresGround: true, + }, + pin475: { + doNotConnect: true, + }, + pin476: { + requiresGround: true, + }, + pin477: { + doNotConnect: true, + }, + pin478: { + doNotConnect: true, + }, + pin491: { + requiresGround: true, + }, + pin49: { + requiresGround: true, + }, + pin66: { + requiresPower: true, + }, + pin81: { + requiresPower: true, + }, + pin94: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin105: { + requiresPower: true, + }, + pin108: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin113: { + requiresPower: true, + }, + pin122: { + requiresPower: true, + }, + pin123: { + requiresPower: true, + }, + pin142: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin145: { + requiresGround: true, + }, + pin146: { + requiresPower: true, + }, + pin148: { + requiresGround: true, + }, + pin149: { + doNotConnect: true, + }, + pin151: { + doNotConnect: true, + }, + pin164: { + requiresGround: true, + }, + pin165: { + requiresPower: true, + }, + pin166: { + requiresPower: true, + }, + pin167: { + requiresGround: true, + }, + pin168: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresGround: true, + }, + pin171: { + requiresPower: true, + }, + pin172: { + requiresGround: true, + }, + pin182: { + requiresPower: true, + }, + pin183: { + requiresPower: true, + }, + pin184: { + requiresGround: true, + }, + pin185: { + requiresGround: true, + }, + pin186: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin188: { + requiresGround: true, + }, + pin191: { + requiresPower: true, + }, + pin192: { + requiresPower: true, + }, + pin200: { + requiresGround: true, + }, + pin201: { + requiresGround: true, + }, + pin202: { + requiresGround: true, + }, + pin203: { + requiresPower: true, + }, + pin204: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin207: { + requiresGround: true, + }, + pin208: { + requiresPower: true, + }, + pin209: { + requiresPower: true, + }, + pin221: { + requiresPower: true, + }, + pin222: { + requiresPower: true, + }, + pin223: { + requiresPower: true, + }, + pin224: { + requiresGround: true, + }, + pin225: { + requiresGround: true, + }, + pin226: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin228: { + requiresPower: true, + }, + pin229: { + requiresGround: true, + }, + pin230: { + requiresGround: true, + }, + pin231: { + requiresPower: true, + }, + pin232: { + requiresPower: true, + }, + pin241: { + requiresPower: true, + }, + pin242: { + requiresPower: true, + }, + pin243: { + requiresPower: true, + }, + pin244: { + requiresGround: true, + }, + pin245: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin248: { + requiresGround: true, + }, + pin249: { + requiresGround: true, + }, + pin250: { + requiresPower: true, + }, + pin251: { + requiresPower: true, + }, + pin255: { + requiresPower: true, + }, + pin262: { + requiresGround: true, + }, + pin263: { + requiresGround: true, + }, + pin264: { + requiresGround: true, + }, + pin265: { + requiresGround: true, + }, + pin266: { + requiresGround: true, + }, + pin267: { + requiresGround: true, + }, + pin268: { + requiresGround: true, + }, + pin269: { + requiresGround: true, + }, + pin270: { + requiresPower: true, + }, + pin271: { + requiresPower: true, + }, + pin273: { + requiresPower: true, + }, + pin275: { + requiresPower: true, + }, + pin285: { + requiresPower: true, + }, + pin286: { + requiresPower: true, + }, + pin287: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin289: { + requiresPower: true, + }, + pin290: { + requiresGround: true, + }, + pin291: { + requiresPower: true, + }, + pin292: { + requiresGround: true, + }, + pin293: { + requiresGround: true, + }, + pin294: { + requiresGround: true, + }, + pin303: { + requiresPower: true, + }, + pin304: { + requiresPower: true, + }, + pin305: { + requiresPower: true, + }, + pin306: { + requiresPower: true, + }, + pin307: { + requiresGround: true, + }, + pin308: { + requiresPower: true, + }, + pin309: { + requiresGround: true, + }, + pin310: { + requiresGround: true, + }, + pin311: { + requiresPower: true, + }, + pin312: { + requiresPower: true, + }, + pin321: { + requiresGround: true, + }, + pin322: { + requiresGround: true, + }, + pin323: { + requiresGround: true, + }, + pin324: { + requiresGround: true, + }, + pin325: { + requiresGround: true, + }, + pin326: { + requiresGround: true, + }, + pin327: { + requiresGround: true, + }, + pin328: { + requiresPower: true, + }, + pin329: { + requiresGround: true, + }, + pin330: { + requiresGround: true, + }, + pin331: { + requiresGround: true, + }, + pin352: { + requiresGround: true, + }, + pin353: { + requiresPower: true, + }, + pin354: { + requiresPower: true, + }, + pin340: { + requiresPower: true, + }, + pin341: { + requiresPower: true, + }, + pin342: { + requiresGround: true, + }, + pin343: { + requiresGround: true, + }, + pin344: { + requiresGround: true, + }, + pin345: { + requiresGround: true, + }, + pin346: { + requiresGround: true, + }, + pin347: { + requiresGround: true, + }, + pin348: { + requiresPower: true, + }, + pin351: { + requiresGround: true, + }, + pin364: { + doNotConnect: true, + }, + pin365: { + requiresPower: true, + }, + pin366: { + requiresPower: true, + }, + pin367: { + requiresPower: true, + }, + pin370: { + requiresPower: true, + }, + pin371: { + requiresPower: true, + }, + pin373: { + requiresGround: true, + }, + pin380: { + doNotConnect: true, + }, + pin381: { + doNotConnect: true, + }, + pin382: { + doNotConnect: true, + }, + pin386: { + requiresPower: true, + }, + pin388: { + requiresPower: true, + }, +} as const; + +export const AM4379BZDNA100 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1522310.obj?uuid=31ff4bad0f934917b11ca31c0ffdb105", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1522310.step?uuid=31ff4bad0f934917b11ca31c0ffdb105", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00005079999999679785, + y: -0.00005079999999679785, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default AM4379BZDNA100; diff --git a/lib/chips/AM5726BABCXA.circuit.tsx b/lib/chips/AM5726BABCXA.circuit.tsx new file mode 100644 index 00000000..ca8b8140 --- /dev/null +++ b/lib/chips/AM5726BABCXA.circuit.tsx @@ -0,0 +1,7208 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["VSS", "A2", "VSS_A2"], + pin3: ["VIN2A_D19", "A3"], + pin4: ["VIN2A_D23", "A4"], + pin5: ["VOUT1_D12", "A5"], + pin6: ["VSS", "A6", "VSS_A6"], + pin7: ["VOUT1_D18", "A7"], + pin8: ["VOUT1_D19", "A8"], + pin9: ["VOUT1_D21", "A9"], + pin10: ["VOUT1_D23", "A10"], + pin11: ["MCASP1_AXR9", "A11"], + pin12: ["MCASP1_AXR11", "A12"], + pin13: ["MCASP1_AXR13", "A13"], + pin14: ["VSS", "A14", "VSS_A14"], + pin15: ["MCASP2_AXR1", "A15"], + pin16: ["MCASP2_AXR3", "A16"], + pin17: ["MCASP2_AXR7", "A17"], + pin18: ["MCASP2_FSX", "A18"], + pin19: ["MCASP2_ACLKX", "A19"], + pin20: ["MCASP2_FSR", "A20"], + pin21: ["MCASP4_FSX", "A21"], + pin22: ["SPI1_CS1", "A22"], + pin23: ["VSS", "A23", "VSS_A23"], + pin24: ["SPI1_CS0", "A24"], + pin25: ["SPI1_SCLK", "A25"], + pin26: ["SPI2_SCLK", "A26"], + pin27: ["RESERVED", "A27", "RESERVED_A27"], + pin28: ["VSS", "A28", "VSS_A28"], + pin29: ["VSS", "B1", "VSS_B1"], + pin30: ["VIN2A_D16", "B2"], + pin31: ["VIN2A_D20", "B3"], + pin32: ["VIN2A_D21", "B4"], + pin33: ["VIN2A_D22", "B5"], + pin34: ["VDDSHV2", "B6", "VDDSHV2_B6"], + pin35: ["VOUT1_D16", "B7"], + pin36: ["VOUT1_D17", "B8"], + pin37: ["VOUT1_D22", "B9"], + pin38: ["VOUT1_DE", "B10"], + pin39: ["VOUT1_FLD", "B11"], + pin40: ["MCASP1_AXR8", "B12"], + pin41: ["MCASP1_AXR10", "B13"], + pin42: ["MCASP1_ACLKR", "B14"], + pin43: ["MCASP2_AXR0", "B15"], + pin44: ["MCASP2_AXR5", "B16"], + pin45: ["MCASP2_AXR6", "B17"], + pin46: ["MCASP3_ACLKX", "B18"], + pin47: ["MCASP3_AXR0", "B19"], + pin48: ["SPI1_CS3", "B20"], + pin49: ["SPI1_CS2", "B21"], + pin50: ["SPI2_D1", "B22"], + pin51: ["VDDSHV3", "B23", "VDDSHV3_B23"], + pin52: ["SPI2_CS0", "B24"], + pin53: ["SPI1_D0", "B25"], + pin54: ["XREF_CLK2", "B26"], + pin55: ["UART1_RXD", "B27"], + pin56: ["RESERVED", "B28", "RESERVED_B28"], + pin57: ["VIN2A_D6", "C1"], + pin58: ["VIN2A_D13", "C2"], + pin59: ["VIN2A_D14", "C3"], + pin60: ["VIN2A_D15", "C4"], + pin61: ["VIN2A_D18", "C5"], + pin62: ["VOUT1_D13", "C6"], + pin63: ["VOUT1_D15", "C7"], + pin64: ["VOUT1_D14", "C8"], + pin65: ["VOUT1_D20", "C9"], + pin66: ["VOUT1_HSYNC", "C11"], + pin67: ["MCASP1_AXR6", "C12"], + pin68: ["MCASP1_ACLKX", "C14"], + pin69: ["MCASP2_AXR2", "C15"], + pin70: ["MCASP3_AXR1", "C17"], + pin71: ["MCASP4_ACLKX", "C18"], + pin72: ["I2C1_SCL", "C20"], + pin73: ["I2C1_SDA", "C21"], + pin74: ["XREF_CLK3", "C23"], + pin75: ["VDDSHV4", "C24"], + pin76: ["I2C2_SDA", "C25"], + pin77: ["UART1_TXD", "C26"], + pin78: ["UART1_RTSN", "C27"], + pin79: ["UART2_RTSN", "C28"], + pin80: ["VIN2A_D2", "D1"], + pin81: ["VIN2A_D4", "D2"], + pin82: ["VIN2A_D10", "D3"], + pin83: ["VIN2A_D12", "D5"], + pin84: ["VIN2A_D17", "D6"], + pin85: ["VOUT1_D10", "D7"], + pin86: ["VOUT1_D11", "D8"], + pin87: ["VOUT1_D9", "D9"], + pin88: ["VDDSHV2", "D10", "VDDSHV2_D10"], + pin89: ["VOUT1_CLK", "D11"], + pin90: ["MCASP1_AXR7", "D12"], + pin91: ["VSS", "D13", "VSS_D13"], + pin92: ["MCASP1_FSX", "D14"], + pin93: ["MCASP2_AXR4", "D15"], + pin94: ["VDDSHV3", "D16", "VDDSHV3_D16"], + pin95: ["MCASP4_AXR1", "D17"], + pin96: ["XREF_CLK0", "D18"], + pin97: ["VSS", "D19", "VSS_D19"], + pin98: ["TRSTN", "D20"], + pin99: ["NMIN_DSP", "D21"], + pin100: ["VDDSHV3", "D22", "VDDSHV3_D22"], + pin101: ["TDI", "D23"], + pin102: ["EMU1", "D24"], + pin103: ["UART2_TXD", "D26"], + pin104: ["UART2_CTSN", "D27"], + pin105: ["UART2_RXD", "D28"], + pin106: ["VIN2A_CLK0", "E1"], + pin107: ["VIN2A_D3", "E2"], + pin108: ["VDDSHV1", "E3", "VDDSHV1_E3"], + pin109: ["VIN2A_D7", "E4"], + pin110: ["VDDSHV1", "E5", "VDDSHV1_E5"], + pin111: ["VIN2A_D9", "E6"], + pin112: ["VOUT1_D7", "E7"], + pin113: ["VOUT1_D8", "E8"], + pin114: ["VOUT1_D4", "E9"], + pin115: ["VDDSHV2", "E10", "VDDSHV2_E10"], + pin116: ["VOUT1_VSYNC", "E11"], + pin117: ["MCASP1_AXR4", "E12"], + pin118: ["VSS", "E13", "VSS_E13"], + pin119: ["MCASP1_AXR12", "E14"], + pin120: ["MCASP2_ACLKR", "E15"], + pin121: ["VDDSHV3", "E16", "VDDSHV3_E16"], + pin122: ["XREF_CLK1", "E17"], + pin123: ["RTCK", "E18"], + pin124: ["VSS", "E19", "VSS_E19"], + pin125: ["TCLK", "E20"], + pin126: ["GPIO6_14", "E21"], + pin127: ["VDDSHV3", "E22", "VDDSHV3_E22"], + pin128: ["RESETN", "E23"], + pin129: ["VDDS_DDR2", "E24", "VDDS_DDR2_E24"], + pin130: ["UART1_CTSN", "E25"], + pin131: ["DDR2_D0", "E26"], + pin132: ["DDR2_D6", "E27"], + pin133: ["DDR2_D7", "E28"], + pin134: ["VSS", "F1", "VSS_F1"], + pin135: ["VIN2A_D0", "F2"], + pin136: ["VIN2A_D1", "F3"], + pin137: ["VIN2A_D5", "F4"], + pin138: ["VIN2A_D8", "F5"], + pin139: ["VIN2A_D11", "F6"], + pin140: ["VSS", "F7", "VSS_F7"], + pin141: ["VOUT1_D6", "F8"], + pin142: ["VOUT1_D5", "F9"], + pin143: ["VOUT1_D2", "F10"], + pin144: ["VOUT1_D0", "F11"], + pin145: ["MCASP1_AXR1", "F12"], + pin146: ["MCASP1_AXR5", "F13"], + pin147: ["MCASP1_AXR15", "F14"], + pin148: ["MCASP3_FSX", "F15"], + pin149: ["SPI1_D1", "F16"], + pin150: ["I2C2_SCL", "F17"], + pin151: ["TMS", "F18"], + pin152: ["TDO", "F19"], + pin153: ["GPIO6_15", "F20"], + pin154: ["GPIO6_16", "F21"], + pin155: ["PORZ", "F22"], + pin156: ["RSTOUTN", "F23"], + pin157: ["DDR2_D3", "F24"], + pin158: ["DDR2_D2", "F25"], + pin159: ["DDR2_D4", "F26"], + pin160: ["DDR2_D5", "F27"], + pin161: ["DDR2_DQM0", "F28"], + pin162: ["VIN2A_HSYNC0", "G1"], + pin163: ["VIN2A_DE0", "G2"], + pin164: ["VDDSHV1", "G4", "VDDSHV1_G4"], + pin165: ["VDDSHV1", "G5", "VDDSHV1_G5"], + pin166: ["VIN2A_VSYNC0", "G6"], + pin167: ["VSS", "G7", "VSS_G7"], + pin168: ["VSS", "G8", "VSS_G8"], + pin169: ["VSS", "G9", "VSS_G9"], + pin170: ["VOUT1_D1", "G10"], + pin171: ["VOUT1_D3", "G11"], + pin172: ["MCASP1_AXR0", "G12"], + pin173: ["MCASP1_AXR2", "G13"], + pin174: ["MCASP1_AXR14", "G14"], + pin175: ["VDDSHV3", "G15", "VDDSHV3_G15"], + pin176: ["MCASP4_AXR0", "G16"], + pin177: ["SPI2_D0", "G17"], + pin178: ["VDDS18V", "G18", "VDDS18V_G18"], + pin179: ["DCAN1_RX", "G19"], + pin180: ["DCAN1_TX", "G20"], + pin181: ["EMU0", "G21"], + pin182: ["VDDS_DDR2", "G22", "VDDS_DDR2_G22"], + pin183: ["VDDS_DDR2", "G23", "VDDS_DDR2_G23"], + pin184: ["DDR2_DQM1", "G24"], + pin185: ["DDR2_D1", "G25"], + pin186: ["DDR2_D12", "G26"], + pin187: ["DDR2_DQSN0", "G27"], + pin188: ["DDR2_DQS0", "G28"], + pin189: ["GPMC_AD12", "H1"], + pin190: ["GPMC_AD14", "H2"], + pin191: ["GPMC_AD15", "H3"], + pin192: ["GPMC_A26", "H4"], + pin193: ["GPMC_A27", "H5"], + pin194: ["GPMC_CS1", "H6"], + pin195: ["VIN2A_FLD0", "H7"], + pin196: ["VDDSHV1", "H8", "VDDSHV1_H8"], + pin197: ["VDDSHV1", "H9", "VDDSHV1_H9"], + pin198: ["VDDSHV2", "H10", "VDDSHV2_H10"], + pin199: ["VDDSHV2", "H11", "VDDSHV2_H11"], + pin200: ["VSS", "H12", "VSS_H12"], + pin201: ["VDD", "H13", "VDD_H13"], + pin202: ["VDD", "H14", "VDD_H14"], + pin203: ["VDDSHV3", "H15", "VDDSHV3_H15"], + pin204: ["VDDSHV3", "H16", "VDDSHV3_H16"], + pin205: ["VDDS18V", "H17", "VDDS18V_H17"], + pin206: ["VDDSHV3", "H18", "VDDSHV3_H18"], + pin207: ["VDDSHV3", "H19", "VDDSHV3_H19"], + pin208: ["VDDS_DDR2", "H20", "VDDS_DDR2_H20"], + pin209: ["VDDS_DDR2", "H21", "VDDS_DDR2_H21"], + pin210: ["VDDS_DDR2", "H22", "VDDS_DDR2_H22"], + pin211: ["DDR2_D8", "H23"], + pin212: ["DDR2_D10", "H24"], + pin213: ["DDR2_D9", "H25"], + pin214: ["DDR2_D11", "H26"], + pin215: ["DDR2_DQS1", "H27"], + pin216: ["DDR2_DQSN1", "H28"], + pin217: ["GPMC_AD10", "J1"], + pin218: ["GPMC_AD11", "J2"], + pin219: ["GPMC_AD13", "J3"], + pin220: ["GPMC_A24", "J4"], + pin221: ["GPMC_A21", "J5"], + pin222: ["GPMC_A25", "J6"], + pin223: ["GPMC_A23", "J7"], + pin224: ["VDDSHV11", "J8", "VDDSHV11_J8"], + pin225: ["CAP_VDDRAM_DSPEVE2", "J9"], + pin226: ["CAP_VDDRAM_DSPEVE1", "J10"], + pin227: ["MCASP1_AXR3", "J11"], + pin228: ["VSS", "J12", "VSS_J12"], + pin229: ["VDD_DSPEVE", "J13", "VDD_DSPEVE_J13"], + pin230: ["MCASP1_FSR", "J14"], + pin231: ["VSS", "J15", "VSS_J15"], + pin232: ["CAP_VBBLDO_MPU", "J16"], + pin233: ["VDD", "J17", "VDD_J17"], + pin234: ["VDD", "J18", "VDD_J18"], + pin235: ["CAP_VDDRAM_CORE2", "J19"], + pin236: ["DDR2_D23", "J20"], + pin237: ["VDDS18V_DDR2", "J21", "VDDS18V_DDR2_J21"], + pin238: ["VDDS18V_DDR2", "J22", "VDDS18V_DDR2_J22"], + pin239: ["DDR2_D21", "J23"], + pin240: ["DDR2_D15", "J24"], + pin241: ["DDR2_D13", "J25"], + pin242: ["DDR2_D14", "J26"], + pin243: ["VDDS_DDR2", "J27", "VDDS_DDR2_J27"], + pin244: ["VSS", "J28", "VSS_J28"], + pin245: ["VSS", "K1", "VSS_K1"], + pin246: ["GPMC_AD9", "K2"], + pin247: ["VSS", "K4", "VSS_K4"], + pin248: ["VSS", "K5", "VSS_K5"], + pin249: ["GPMC_A22", "K6"], + pin250: ["GPMC_A19", "K7"], + pin251: ["VDDSHV11", "K8", "VDDSHV11_K8"], + pin252: ["CAP_VBBLDO_DSPEVE", "K9"], + pin253: ["VDD_DSPEVE", "K10", "VDD_DSPEVE_K10"], + pin254: ["VDD_DSPEVE", "K11", "VDD_DSPEVE_K11"], + pin255: ["VDD_DSPEVE", "K12", "VDD_DSPEVE_K12"], + pin256: ["VDD_DSPEVE", "K13", "VDD_DSPEVE_K13"], + pin257: ["RESERVED", "K14", "RESERVED_K14"], + pin258: ["VSS", "K15", "VSS_K15"], + pin259: ["CAP_VDDRAM_MPU1", "K16"], + pin260: ["VDD_MPU", "K17", "VDD_MPU_K17"], + pin261: ["VDD_MPU", "K18", "VDD_MPU_K18"], + pin262: ["CAP_VDDRAM_MPU2", "K19"], + pin263: ["DDR2_D17", "K20"], + pin264: ["DDR2_D18", "K21"], + pin265: ["DDR2_D22", "K22"], + pin266: ["DDR2_DQM2", "K23"], + pin267: ["VSS", "K24", "VSS_K24"], + pin268: ["VSS", "K25", "VSS_K25"], + pin269: ["DDR2_DQS2", "K27"], + pin270: ["DDR2_DQSN2", "K28"], + pin271: ["GPMC_AD8", "L1"], + pin272: ["GPMC_AD7", "L2"], + pin273: ["GPMC_AD6", "L3"], + pin274: ["GPMC_AD5", "L4"], + pin275: ["GPMC_AD2", "L5"], + pin276: ["GPMC_AD4", "L6"], + pin277: ["VDD", "L7", "VDD_L7"], + pin278: ["VDD", "L8", "VDD_L8"], + pin279: ["CAP_VDDRAM_CORE1", "L9"], + pin280: ["VDD_DSPEVE", "L10", "VDD_DSPEVE_L10"], + pin281: ["VDD_DSPEVE", "L11", "VDD_DSPEVE_L11"], + pin282: ["VDD_DSPEVE", "L12", "VDD_DSPEVE_L12"], + pin283: ["VSS", "L13", "VSS_L13"], + pin284: ["VSS", "L14", "VSS_L14"], + pin285: ["VDD_MPU", "L15", "VDD_MPU_L15"], + pin286: ["VDD_MPU", "L16", "VDD_MPU_L16"], + pin287: ["VDD_MPU", "L17", "VDD_MPU_L17"], + pin288: ["VDD_MPU", "L18", "VDD_MPU_L18"], + pin289: ["VDD_MPU", "L19", "VDD_MPU_L19"], + pin290: ["VDDS_DDR2", "L20", "VDDS_DDR2_L20"], + pin291: ["VDDS_DDR2", "L21", "VDDS_DDR2_L21"], + pin292: ["DDR2_D16", "L22"], + pin293: ["DDR2_D19", "L23"], + pin294: ["DDR2_D20", "L24"], + pin295: ["DDR2_D26", "L25"], + pin296: ["DDR2_D25", "L26"], + pin297: ["DDR2_D24", "L27"], + pin298: ["DDR2_D27", "L28"], + pin299: ["GPMC_AD3", "M1"], + pin300: ["GPMC_AD1", "M2"], + pin301: ["GPMC_WEN", "M3"], + pin302: ["GPMC_BEN1", "M4"], + pin303: ["GPMC_OEN_REN", "M5"], + pin304: ["GPMC_AD0", "M6"], + pin305: ["GPMC_A20", "M7"], + pin306: ["VDDS18V", "M8", "VDDS18V_M8"], + pin307: ["VDDS18V", "M9", "VDDS18V_M9"], + pin308: ["VDD_DSPEVE", "M10", "VDD_DSPEVE_M10"], + pin309: ["VDD_DSPEVE", "M11", "VDD_DSPEVE_M11"], + pin310: ["VDD_DSPEVE", "M12", "VDD_DSPEVE_M12"], + pin311: ["VDD_DSPEVE", "M13", "VDD_DSPEVE_M13"], + pin312: ["VDDA_ABE_PER", "M14"], + pin313: ["VDD_MPU", "M15", "VDD_MPU_M15"], + pin314: ["VDD_MPU", "M16", "VDD_MPU_M16"], + pin315: ["VDD_MPU", "M17", "VDD_MPU_M17"], + pin316: ["VDD_MPU", "M18", "VDD_MPU_M18"], + pin317: ["VSS", "M19", "VSS_M19"], + pin318: ["VDDS_DDR2", "M20", "VDDS_DDR2_M20"], + pin319: ["VDDS_DDR2", "M21", "VDDS_DDR2_M21"], + pin320: ["DDR2_DQM3", "M22"], + pin321: ["DDR2_D28", "M23"], + pin322: ["DDR2_D29", "M24"], + pin323: ["DDR2_D30", "M25"], + pin324: ["DDR2_D31", "M26"], + pin325: ["DDR2_DQSN3", "M27"], + pin326: ["DDR2_DQS3", "M28"], + pin327: ["GPMC_ADVN_ALE", "N1"], + pin328: ["GPMC_WAIT0", "N2"], + pin329: ["VDDSHV10", "N4", "VDDSHV10_N4"], + pin330: ["VDDSHV10", "N5", "VDDSHV10_N5"], + pin331: ["GPMC_BEN0", "N6"], + pin332: ["GPMC_A8", "N7"], + pin333: ["VDDS18V", "N8", "VDDS18V_N8"], + pin334: ["GPMC_A10", "N9"], + pin335: ["VDD", "N10", "VDD_N10"], + pin336: ["VDDA_DEBUG", "N11"], + pin337: ["VDDA_DSP_EVE", "N12"], + pin338: ["VDD", "N13", "VDD_N13"], + pin339: ["VSS", "N14", "VSS_N14"], + pin340: ["VSS", "N15", "VSS_N15"], + pin341: ["VDDA_MPU", "N16"], + pin342: ["VDD_MPU", "N17", "VDD_MPU_N17"], + pin343: ["VDD_MPU", "N18", "VDD_MPU_N18"], + pin344: ["VSS", "N19", "VSS_N19"], + pin345: ["DDR2_A7", "N20"], + pin346: ["VDDS18V_DDR2", "N21", "VDDS18V_DDR2_N21"], + pin347: ["DDR2_VREF0", "N22"], + pin348: ["DDR2_A10", "N23"], + pin349: ["VSS", "N24", "VSS_N24"], + pin350: ["VSS", "N25", "VSS_N25"], + pin351: ["DDR2_A9", "N27"], + pin352: ["DDR2_A12", "N28"], + pin353: ["GPMC_CS3", "P1"], + pin354: ["GPMC_CS2", "P2"], + pin355: ["GPMC_A17", "P3"], + pin356: ["GPMC_A12", "P4"], + pin357: ["GPMC_A7", "P5"], + pin358: ["GPMC_A4", "P6"], + pin359: ["GPMC_CLK", "P7"], + pin360: ["VDDS18V", "P8", "VDDS18V_P8"], + pin361: ["GPMC_A11", "P9"], + pin362: ["VDDSHV10", "P10", "VDDSHV10_P10"], + pin363: ["VDD", "P11", "VDD_P11"], + pin364: ["VDD", "P12", "VDD_P12"], + pin365: ["VDD", "P13", "VDD_P13"], + pin366: ["VDDA_VIDEO", "P14"], + pin367: ["VDDA_GMAC_CORE", "P15"], + pin368: ["VDDA_DDR", "P16"], + pin369: ["VDD_MPU", "P17", "VDD_MPU_P17"], + pin370: ["VDD_MPU", "P18", "VDD_MPU_P18"], + pin371: ["CAP_VDDRAM_CORE4", "P19"], + pin372: ["VDDS18V_DDR2", "P20", "VDDS18V_DDR2_P20"], + pin373: ["VDDS18V_DDR2", "P21", "VDDS18V_DDR2_P21"], + pin374: ["DDR2_A5", "P22"], + pin375: ["DDR2_A4", "P23"], + pin376: ["DDR2_CSN0", "P24"], + pin377: ["DDR2_A6", "P25"], + pin378: ["DDR2_A11", "P26"], + pin379: ["DDR2_A8", "P27"], + pin380: ["VSS", "P28", "VSS_P28"], + pin381: ["VSS", "R1", "VSS_R1"], + pin382: ["GPMC_A18", "R2"], + pin383: ["GPMC_A13", "R3"], + pin384: ["GPMC_A9", "R4"], + pin385: ["GPMC_A6", "R5"], + pin386: ["GPMC_A0", "R6"], + pin387: ["VDDSHV10", "R7", "VDDSHV10_R7"], + pin388: ["VDDS18V", "R8", "VDDS18V_R8"], + pin389: ["GPMC_A5", "R9"], + pin390: ["VDDSHV10", "R10", "VDDSHV10_R10"], + pin391: ["VDD", "R11", "VDD_R11"], + pin392: ["VSS", "R12", "VSS_R12"], + pin393: ["VSS", "R13", "VSS_R13"], + pin394: ["VDDA_GPU", "R14"], + pin395: ["VSS", "R15", "VSS_R15"], + pin396: ["VDD", "R16", "VDD_R16"], + pin397: ["VDDA_IVA", "R17"], + pin398: ["VDD_MPU", "R18", "VDD_MPU_R18"], + pin399: ["VDD", "R19", "VDD_R19"], + pin400: ["CAP_VBBLDO_IVA", "R20"], + pin401: ["VSS", "R21", "VSS_R21"], + pin402: ["DDR2_A14", "R22"], + pin403: ["DDR2_ODT0", "R23"], + pin404: ["DDR2_RST", "R24"], + pin405: ["DDR2_A0", "R25"], + pin406: ["DDR2_A1", "R26"], + pin407: ["DDR2_A3", "R27"], + pin408: ["DDR2_A2", "R28"], + pin409: ["GPMC_CS0", "T1"], + pin410: ["GPMC_A14", "T2"], + pin411: ["VDDSHV10", "T4", "VDDSHV10_T4"], + pin412: ["VDDSHV10", "T5", "VDDSHV10_T5"], + pin413: ["GPMC_A2", "T6"], + pin414: ["GPMC_A3", "T7"], + pin415: ["VDDS18V", "T8", "VDDS18V_T8"], + pin416: ["GPMC_A1", "T9"], + pin417: ["VSS", "T10", "VSS_T10"], + pin418: ["VSS", "T11", "VSS_T11"], + pin419: ["VSS", "T12", "VSS_T12"], + pin420: ["VDD", "T13", "VDD_T13"], + pin421: ["VSS", "T14", "VSS_T14"], + pin422: ["VSS", "T15", "VSS_T15"], + pin423: ["VDD", "T16", "VDD_T16"], + pin424: ["VSS", "T17", "VSS_T17"], + pin425: ["VSS", "T18", "VSS_T18"], + pin426: ["VDD", "T19", "VDD_T19"], + pin427: ["CAP_VDDRAM_IVA", "T20"], + pin428: ["VSS", "T21", "VSS_T21"], + pin429: ["DDR2_A13", "T22"], + pin430: ["DDR2_RASN", "T23"], + pin431: ["VDDS_DDR2", "T24", "VDDS_DDR2_T24"], + pin432: ["VDDS_DDR2", "T25", "VDDS_DDR2_T25"], + pin433: ["DDR2_NCK", "T27"], + pin434: ["DDR2_CK", "T28"], + pin435: ["GPMC_A16", "U1"], + pin436: ["GPMC_A15", "U2"], + pin437: ["RMII_MHZ_50_CLK", "U3"], + pin438: ["MDIO_D", "U4"], + pin439: ["RGMII0_RXC", "U5"], + pin440: ["RGMII0_TXD0", "U6"], + pin441: ["RGMII0_TXD2", "U7"], + pin442: ["VDD", "U8", "VDD_U8"], + pin443: ["VDD", "U9", "VDD_U9"], + pin444: ["VDDSHV9", "U10", "VDDSHV9_U10"], + pin445: ["VDD_GPU", "U11", "VDD_GPU_U11"], + pin446: ["VDD_GPU", "U12", "VDD_GPU_U12"], + pin447: ["VDD", "U13", "VDD_U13"], + pin448: ["VSSA_VIDEO", "U14"], + pin449: ["VSS", "U15", "VSS_U15"], + pin450: ["VDD", "U16", "VDD_U16"], + pin451: ["VSS", "U17", "VSS_U17"], + pin452: ["VDD_IVA", "U18", "VDD_IVA_U18"], + pin453: ["VDD_IVA", "U19", "VDD_IVA_U19"], + pin454: ["VSS", "U20", "VSS_U20"], + pin455: ["VSS", "U21", "VSS_U21"], + pin456: ["DDR2_A15", "U22"], + pin457: ["DDR2_BA0", "U23"], + pin458: ["DDR2_CKE", "U24"], + pin459: ["DDR2_WEN", "U25"], + pin460: ["DDR2_BA2", "U26"], + pin461: ["DDR2_BA1", "U27"], + pin462: ["DDR2_CASN", "U28"], + pin463: ["MDIO_MCLK", "V1"], + pin464: ["UART3_RXD", "V2"], + pin465: ["RGMII0_RXD2", "V3"], + pin466: ["RGMII0_RXD3", "V4"], + pin467: ["RGMII0_RXCTL", "V5"], + pin468: ["RGMII0_TXD1", "V6"], + pin469: ["RGMII0_TXD3", "V7"], + pin470: ["VDD", "V8", "VDD_V8"], + pin471: ["RGMII0_TXCTL", "V9"], + pin472: ["VDD_GPU", "V10", "VDD_GPU_V10"], + pin473: ["VDD_GPU", "V11", "VDD_GPU_V11"], + pin474: ["VDDSHV5", "V12"], + pin475: ["VDDA_SATA", "V13"], + pin476: ["VDD_GPU", "V14", "VDD_GPU_V14"], + pin477: ["VSS", "V15", "VSS_V15"], + pin478: ["VDD", "V16", "VDD_V16"], + pin479: ["VSS", "V17", "VSS_V17"], + pin480: ["VDD_IVA", "V18", "VDD_IVA_V18"], + pin481: ["VDD_IVA", "V19", "VDD_IVA_V19"], + pin482: ["DDR1_D16", "V20"], + pin483: ["VDDS18V", "V21", "VDDS18V_V21"], + pin484: ["VDDS18V", "V22", "VDDS18V_V22"], + pin485: ["DDR1_ECC_D1", "V23"], + pin486: ["DDR1_ECC_D5", "V24"], + pin487: ["DDR1_ECC_D6", "V25"], + pin488: ["DDR1_DQM_ECC", "V26"], + pin489: ["DDR1_DQS_ECC", "V27"], + pin490: ["DDR1_DQSN_ECC", "V28"], + pin491: ["VSS", "W1", "VSS_W1"], + pin492: ["RGMII0_RXD0", "W2"], + pin493: ["VDDSHV9", "W4", "VDDSHV9_W4"], + pin494: ["VDDSHV9", "W5", "VDDSHV9_W5"], + pin495: ["MMC1_CLK", "W6"], + pin496: ["MMC1_SDCD", "W7"], + pin497: ["VDDSHV8", "W8", "VDDSHV8_W8"], + pin498: ["RGMII0_TXC", "W9"], + pin499: ["VDD_GPU", "W10", "VDD_GPU_W10"], + pin500: ["VDD_GPU", "W11", "VDD_GPU_W11"], + pin501: ["VDDA_USB3", "W12"], + pin502: ["VDD_GPU", "W13", "VDD_GPU_W13"], + pin503: ["VDDA_PCIE", "W14"], + pin504: ["VSS", "W15", "VSS_W15"], + pin505: ["VDDS_DDR1", "W16", "VDDS_DDR1_W16"], + pin506: ["VDDS18V", "W17", "VDDS18V_W17"], + pin507: ["VDDS18V", "W18", "VDDS18V_W18"], + pin508: ["DDR1_ECC_D2", "W19"], + pin509: ["DDR1_D17", "W20"], + pin510: ["VDDS18V_DDR1", "W21", "VDDS18V_DDR1_W21"], + pin511: ["DDR1_ECC_D0", "W22"], + pin512: ["DDR1_ECC_D3", "W23"], + pin513: ["VSS", "W24", "VSS_W24"], + pin514: ["VSS", "W25", "VSS_W25"], + pin515: ["VDDS_DDR1", "W27", "VDDS_DDR1_W27"], + pin516: ["VSS", "W28", "VSS_W28"], + pin517: ["UART3_TXD", "Y1"], + pin518: ["RGMII0_RXD1", "Y2"], + pin519: ["MMC1_DAT3", "Y3"], + pin520: ["MMC1_DAT1", "Y4"], + pin521: ["RESERVED", "Y5", "RESERVED_Y5"], + pin522: ["MMC1_CMD", "Y6"], + pin523: ["VDDS_MLBP", "Y7", "VDDS_MLBP_Y7"], + pin524: ["VDDSHV8", "Y8", "VDDSHV8_Y8"], + pin525: ["MMC1_SDWP", "Y9"], + pin526: ["RESERVED", "Y10", "RESERVED_Y10"], + pin527: ["ON_OFF", "Y11"], + pin528: ["VDDA33V_USB2", "Y12"], + pin529: ["CAP_VDDRAM_GPU", "Y13"], + pin530: ["CAP_VBBLDO_GPU", "Y14"], + pin531: ["CAP_VDDRAM_CORE3", "Y15"], + pin532: ["CAP_VDDRAM_CORE5", "Y16"], + pin533: ["VDDA_HDMI", "Y17"], + pin534: ["DDR1_VREF0", "Y18"], + pin535: ["DDR1_D21", "Y19"], + pin536: ["DDR1_D23", "Y20"], + pin537: ["VDDS18V_DDR1", "Y21", "VDDS18V_DDR1_Y21"], + pin538: ["DDR1_D25", "Y22"], + pin539: ["DDR1_D26", "Y23"], + pin540: ["DDR1_D28", "Y24"], + pin541: ["DDR1_ECC_D4", "Y25"], + pin542: ["DDR1_ECC_D7", "Y26"], + pin543: ["DDR1_DQSN3", "Y27"], + pin544: ["DDR1_DQS3", "Y28"], + pin545: ["MLBP_DAT_P", "AA1"], + pin546: ["MLBP_DAT_N", "AA2"], + pin547: ["MCASP5_ACLKX", "AA3"], + pin548: ["MCASP5_AXR1", "AA4"], + pin549: ["MMC1_DAT2", "AA5"], + pin550: ["MMC1_DAT0", "AA6"], + pin551: ["VDDS_MLBP", "AA7", "VDDS_MLBP_AA7"], + pin552: ["VSS", "AA8", "VSS_AA8"], + pin553: ["VSS", "AA9", "VSS_AA9"], + pin554: ["VSS", "AA10", "VSS_AA10"], + pin555: ["VSSA_USB", "AA11", "VSSA_USB_AA11"], + pin556: ["VDDA33V_USB1", "AA12"], + pin557: ["VDDA_USB1", "AA13"], + pin558: ["VSS", "AA14", "VSS_AA14"], + pin559: ["VSS", "AA15", "VSS_AA15"], + pin560: ["VDDA_PCIE1", "AA16"], + pin561: ["VDDA_PCIE0", "AA17"], + pin562: ["VDDS18V_DDR1", "AA18", "VDDS18V_DDR1_AA18"], + pin563: ["VDDS18V_DDR1", "AA19", "VDDS18V_DDR1_AA19"], + pin564: ["VSS", "AA20", "VSS_AA20"], + pin565: ["VDDS_DDR1", "AA21", "VDDS_DDR1_AA21"], + pin566: ["VDDS_DDR1", "AA22", "VDDS_DDR1_AA22"], + pin567: ["DDR1_D24", "AA23"], + pin568: ["DDR1_D27", "AA24"], + pin569: ["DDR1_D30", "AA25"], + pin570: ["DDR1_D29", "AA26"], + pin571: ["DDR1_DQM3", "AA27"], + pin572: ["DDR1_D31", "AA28"], + pin573: ["MLBP_CLK_P", "AB1"], + pin574: ["MLBP_CLK_N", "AB2"], + pin575: ["MCASP5_AXR0", "AB3"], + pin576: ["GPIO6_11", "AB4"], + pin577: ["MMC3_DAT7", "AB5"], + pin578: ["VDDSHV7", "AB6", "VDDSHV7_AB6"], + pin579: ["VDDSHV7", "AB7", "VDDSHV7_AB7"], + pin580: ["MMC3_DAT6", "AB8"], + pin581: ["MCASP5_FSX", "AB9"], + pin582: ["USB1_DRVVBUS", "AB10"], + pin583: ["VSSA_USB", "AB11", "VSSA_USB_AB11"], + pin584: ["VDDA_USB2", "AB12"], + pin585: ["VDDA_RTC", "AB13"], + pin586: ["VSS", "AB14", "VSS_AB14"], + pin587: ["VDD_RTC", "AB15"], + pin588: ["WAKEUP2", "AB16"], + pin589: ["RTC_PORZ", "AB17"], + pin590: ["DDR1_BA2", "AB18"], + pin591: ["DDR1_A3", "AB19"], + pin592: ["VSS", "AB20", "VSS_AB20"], + pin593: ["VDDS_DDR1", "AB21", "VDDS_DDR1_AB21"], + pin594: ["VDDS_DDR1", "AB22", "VDDS_DDR1_AB22"], + pin595: ["DDR1_DQM1", "AB23"], + pin596: ["VDDS_DDR1", "AB24", "VDDS_DDR1_AB24"], + pin597: ["VDDS_DDR1", "AB25", "VDDS_DDR1_AB25"], + pin598: ["DDR1_D22", "AB27"], + pin599: ["DDR1_D18", "AB28"], + pin600: ["MLBP_SIG_P", "AC1"], + pin601: ["MLBP_SIG_N", "AC2"], + pin602: ["MMC3_DAT3", "AC3"], + pin603: ["MMC3_CMD", "AC4"], + pin604: ["GPIO6_10", "AC5"], + pin605: ["MMC3_DAT1", "AC6"], + pin606: ["MMC3_DAT0", "AC7"], + pin607: ["MMC3_DAT4", "AC8"], + pin608: ["MMC3_DAT2", "AC9"], + pin609: ["USB2_DRVVBUS", "AC10"], + pin610: ["USB_TXN0", "AC11"], + pin611: ["USB1_DM", "AC12"], + pin612: ["XO_OSC1", "AC13"], + pin613: ["VSSA_OSC1", "AC14"], + pin614: ["XI_OSC1", "AC15"], + pin615: ["WAKEUP3", "AC16"], + pin616: ["WAKEUP1", "AC17"], + pin617: ["DDR1_CASN", "AC18"], + pin618: ["DDR1_A1", "AC19"], + pin619: ["DDR1_A2", "AC20"], + pin620: ["DDR1_A12", "AC21"], + pin621: ["VDDS_DDR1", "AC22", "VDDS_DDR1_AC22"], + pin622: ["DDR1_D8", "AC23"], + pin623: ["DDR1_D14", "AC24"], + pin624: ["DDR1_D13", "AC25"], + pin625: ["DDR1_DQM2", "AC26"], + pin626: ["DDR1_D20", "AC27"], + pin627: ["DDR1_D19", "AC28"], + pin628: ["VSS", "AD1", "VSS_AD1"], + pin629: ["VIN1A_D22", "AD2"], + pin630: ["VIN1A_D23", "AD3"], + pin631: ["MMC3_CLK", "AD4"], + pin632: ["VDDSHV6", "AD5", "VDDSHV6_AD5"], + pin633: ["MMC3_DAT5", "AD6"], + pin634: ["VDDSHV6", "AD7", "VDDSHV6_AD7"], + pin635: ["VIN1A_D1", "AD8"], + pin636: ["VIN1A_DE0", "AD9"], + pin637: ["VSSA_USB3", "AD10"], + pin638: ["USB_TXP0", "AD11"], + pin639: ["USB1_DP", "AD12"], + pin640: ["VSSA_PCIE", "AD13", "VSSA_PCIE_AD13"], + pin641: ["RTC_OSC_XO", "AD14"], + pin642: ["XO_OSC0", "AD15"], + pin643: ["VDDA_OSC", "AD16", "VDDA_OSC_AD16"], + pin644: ["WAKEUP0", "AD17"], + pin645: ["DDR1_A15", "AD18"], + pin646: ["VSSA_HDMI", "AD19", "VSSA_HDMI_AD19"], + pin647: ["DDR1_A0", "AD20"], + pin648: ["DDR1_A10", "AD21"], + pin649: ["DDR1_A11", "AD22"], + pin650: ["DDR1_DQM0", "AD23"], + pin651: ["VSS", "AD24", "VSS_AD24"], + pin652: ["DDR1_D15", "AD25"], + pin653: ["VDDS_DDR1", "AD26", "VDDS_DDR1_AD26"], + pin654: ["DDR1_DQS2", "AD27"], + pin655: ["DDR1_DQSN2", "AD28"], + pin656: ["VIN1A_D19", "AE1"], + pin657: ["VIN1A_D20", "AE2"], + pin658: ["VIN1A_D17", "AE3"], + pin659: ["VIN1A_D18", "AE5"], + pin660: ["VIN1A_D21", "AE6"], + pin661: ["VDDSHV6", "AE7", "VDDSHV6_AE7"], + pin662: ["VIN1A_D0", "AE8"], + pin663: ["VIN1A_HSYNC0", "AE9"], + pin664: ["VSSA_SATA", "AE10"], + pin665: ["USB2_DP", "AE11"], + pin666: ["USB_RXP0", "AE12"], + pin667: ["VSSA_PCIE", "AE13", "VSSA_PCIE_AE13"], + pin668: ["RTC_OSC_XI_CLKIN32", "AE14"], + pin669: ["XI_OSC0", "AE15"], + pin670: ["VDDA_OSC", "AE16", "VDDA_OSC_AE16"], + pin671: ["DDR1_A14", "AE17"], + pin672: ["DDR1_BA1", "AE18"], + pin673: ["VSSA_HDMI", "AE19", "VSSA_HDMI_AE19"], + pin674: ["DDR1_ODT0", "AE20"], + pin675: ["DDR1_A7", "AE21"], + pin676: ["DDR1_A9", "AE22"], + pin677: ["DDR1_D7", "AE23"], + pin678: ["DDR1_D5", "AE24"], + pin679: ["DDR1_D12", "AE26"], + pin680: ["DDR1_DQS1", "AE27"], + pin681: ["DDR1_DQSN1", "AE28"], + pin682: ["VIN1A_D16", "AF1"], + pin683: ["VIN1A_D12", "AF2"], + pin684: ["VIN1A_D14", "AF3"], + pin685: ["VIN1A_D15", "AF4"], + pin686: ["VDDSHV6", "AF5", "VDDSHV6_AF5"], + pin687: ["VIN1A_D13", "AF6"], + pin688: ["VIN1A_VSYNC0", "AF8"], + pin689: ["VIN1A_FLD0", "AF9"], + pin690: ["USB2_DM", "AF11"], + pin691: ["USB_RXN0", "AF12"], + pin692: ["RTC_ISO", "AF14"], + pin693: ["VSSA_OSC0", "AF15"], + pin694: ["DDR1_BA0", "AF17"], + pin695: ["DDR1_A13", "AF18"], + pin696: ["DDR1_RASN", "AF20"], + pin697: ["DDR1_A4", "AF21"], + pin698: ["DDR1_A8", "AF22"], + pin699: ["DDR1_D6", "AF23"], + pin700: ["DDR1_D4", "AF24"], + pin701: ["DDR1_D0", "AF25"], + pin702: ["DDR1_D1", "AF26"], + pin703: ["DDR1_D9", "AF27"], + pin704: ["DDR1_D11", "AF28"], + pin705: ["VSS", "AG1", "VSS_AG1"], + pin706: ["VIN1A_D9", "AG2"], + pin707: ["VIN1A_D10", "AG3"], + pin708: ["VIN1A_D8", "AG4"], + pin709: ["VIN1A_D11", "AG5"], + pin710: ["VIN1A_D6", "AG6"], + pin711: ["VIN1A_D2", "AG7"], + pin712: ["VIN1A_CLK0", "AG8"], + pin713: ["SATA1_RXP0", "AG9"], + pin714: ["SATA1_TXN0", "AG10"], + pin715: ["PCIE_RXN1", "AG11"], + pin716: ["PCIE_TXN1", "AG12"], + pin717: ["PCIE_RXN0", "AG13"], + pin718: ["PCIE_TXN0", "AG14"], + pin719: ["LJCB_CLKP", "AG15"], + pin720: ["HDMI1_CLOCKX", "AG16"], + pin721: ["HDMI1_DATA0X", "AG17"], + pin722: ["HDMI1_DATA1X", "AG18"], + pin723: ["HDMI1_DATA2X", "AG19"], + pin724: ["VDDS_DDR1", "AG20", "VDDS_DDR1_AG20"], + pin725: ["DDR1_RST", "AG21"], + pin726: ["DDR1_CKE", "AG22"], + pin727: ["DDR1_A6", "AG23"], + pin728: ["DDR1_CK", "AG24"], + pin729: ["DDR1_DQSN0", "AG25"], + pin730: ["DDR1_D2", "AG26"], + pin731: ["DDR1_D10", "AG27"], + pin732: ["VDDS_DDR1", "AG28", "VDDS_DDR1_AG28"], + pin733: ["VSS", "AH1", "VSS_AH1"], + pin734: ["VSS", "AH2", "VSS_AH2"], + pin735: ["VIN1A_D4", "AH3"], + pin736: ["VIN1A_D7", "AH4"], + pin737: ["VIN1A_D5", "AH5"], + pin738: ["VIN1A_D3", "AH6"], + pin739: ["VIN1B_CLK1", "AH7"], + pin740: ["VSS", "AH8", "VSS_AH8"], + pin741: ["SATA1_RXN0", "AH9"], + pin742: ["SATA1_TXP0", "AH10"], + pin743: ["PCIE_RXP1", "AH11"], + pin744: ["PCIE_TXP1", "AH12"], + pin745: ["PCIE_RXP0", "AH13"], + pin746: ["PCIE_TXP0", "AH14"], + pin747: ["LJCB_CLKN", "AH15"], + pin748: ["HDMI1_CLOCKY", "AH16"], + pin749: ["HDMI1_DATA0Y", "AH17"], + pin750: ["HDMI1_DATA1Y", "AH18"], + pin751: ["HDMI1_DATA2Y", "AH19"], + pin752: ["VSS", "AH20", "VSS_AH20"], + pin753: ["DDR1_WEN", "AH21"], + pin754: ["DDR1_A5", "AH22"], + pin755: ["DDR1_CSN0", "AH23"], + pin756: ["DDR1_NCK", "AH24"], + pin757: ["DDR1_DQS0", "AH25"], + pin758: ["DDR1_D3", "AH26"], + pin759: ["VDDS_DDR1", "AH27", "VDDS_DDR1_AH27"], + pin760: ["VSS", "AH28", "VSS_AH28"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "power", + pin4: "power", + pin5: "output", + pin6: "ground", + pin7: "output", + pin8: "output", + pin9: "output", + pin10: "output", + pin11: "unknown", + pin12: "unknown", + pin13: "unknown", + pin14: "ground", + pin15: "unknown", + pin16: "unknown", + pin17: "unknown", + pin18: "unknown", + pin19: "unknown", + pin20: "unknown", + pin21: "unknown", + pin22: "control", + pin23: "ground", + pin24: "control", + pin25: "control", + pin26: "control", + pin27: "no-connect", + pin28: "ground", + pin29: "ground", + pin30: "power", + pin31: "power", + pin32: "power", + pin33: "power", + pin34: "power", + pin35: "output", + pin36: "output", + pin37: "output", + pin38: "output", + pin39: "output", + pin40: "unknown", + pin41: "unknown", + pin42: "unknown", + pin43: "unknown", + pin44: "unknown", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "control", + pin49: "control", + pin50: "unknown", + pin51: "power", + pin52: "control", + pin53: "unknown", + pin54: "control", + pin55: "input", + pin56: "no-connect", + pin57: "power", + pin58: "power", + pin59: "power", + pin60: "power", + pin61: "power", + pin62: "output", + pin63: "output", + pin64: "output", + pin65: "output", + pin66: "output", + pin67: "unknown", + pin68: "unknown", + pin69: "unknown", + pin70: "unknown", + pin71: "unknown", + pin72: "control", + pin73: "bidirectional", + pin74: "control", + pin75: "power", + pin76: "bidirectional", + pin77: "output", + pin78: "unknown", + pin79: "unknown", + pin80: "power", + pin81: "power", + pin82: "power", + pin83: "power", + pin84: "power", + pin85: "output", + pin86: "output", + pin87: "output", + pin88: "power", + pin89: "control", + pin90: "unknown", + pin91: "ground", + pin92: "unknown", + pin93: "unknown", + pin94: "power", + pin95: "unknown", + pin96: "control", + pin97: "ground", + pin98: "unknown", + pin99: "unknown", + pin100: "power", + pin101: "unknown", + pin102: "unknown", + pin103: "output", + pin104: "unknown", + pin105: "input", + pin106: "control", + pin107: "power", + pin108: "power", + pin109: "power", + pin110: "power", + pin111: "power", + pin112: "output", + pin113: "output", + pin114: "output", + pin115: "power", + pin116: "output", + pin117: "unknown", + pin118: "ground", + pin119: "unknown", + pin120: "unknown", + pin121: "power", + pin122: "control", + pin123: "unknown", + pin124: "ground", + pin125: "unknown", + pin126: "bidirectional", + pin127: "power", + pin128: "control", + pin129: "power", + pin130: "unknown", + pin131: "unknown", + pin132: "unknown", + pin133: "unknown", + pin134: "ground", + pin135: "power", + pin136: "power", + pin137: "power", + pin138: "power", + pin139: "power", + pin140: "ground", + pin141: "output", + pin142: "output", + pin143: "output", + pin144: "output", + pin145: "unknown", + pin146: "unknown", + pin147: "unknown", + pin148: "unknown", + pin149: "unknown", + pin150: "control", + pin151: "unknown", + pin152: "unknown", + pin153: "bidirectional", + pin154: "bidirectional", + pin155: "unknown", + pin156: "control", + pin157: "unknown", + pin158: "unknown", + pin159: "unknown", + pin160: "unknown", + pin161: "bidirectional", + pin162: "power", + pin163: "power", + pin164: "power", + pin165: "power", + pin166: "power", + pin167: "ground", + pin168: "ground", + pin169: "ground", + pin170: "output", + pin171: "output", + pin172: "unknown", + pin173: "unknown", + pin174: "unknown", + pin175: "power", + pin176: "unknown", + pin177: "unknown", + pin178: "power", + pin179: "input", + pin180: "output", + pin181: "unknown", + pin182: "power", + pin183: "power", + pin184: "bidirectional", + pin185: "unknown", + pin186: "unknown", + pin187: "bidirectional", + pin188: "bidirectional", + pin189: "unknown", + pin190: "unknown", + pin191: "unknown", + pin192: "unknown", + pin193: "unknown", + pin194: "control", + pin195: "power", + pin196: "power", + pin197: "power", + pin198: "power", + pin199: "power", + pin200: "ground", + pin201: "power", + pin202: "power", + pin203: "power", + pin204: "power", + pin205: "power", + pin206: "power", + pin207: "power", + pin208: "power", + pin209: "power", + pin210: "power", + pin211: "unknown", + pin212: "unknown", + pin213: "unknown", + pin214: "unknown", + pin215: "bidirectional", + pin216: "bidirectional", + pin217: "unknown", + pin218: "unknown", + pin219: "unknown", + pin220: "unknown", + pin221: "unknown", + pin222: "unknown", + pin223: "unknown", + pin224: "power", + pin225: "power", + pin226: "power", + pin227: "unknown", + pin228: "ground", + pin229: "power", + pin230: "unknown", + pin231: "ground", + pin232: "unknown", + pin233: "power", + pin234: "power", + pin235: "power", + pin236: "unknown", + pin237: "power", + pin238: "power", + pin239: "unknown", + pin240: "unknown", + pin241: "unknown", + pin242: "unknown", + pin243: "power", + pin244: "ground", + pin245: "ground", + pin246: "unknown", + pin247: "ground", + pin248: "ground", + pin249: "unknown", + pin250: "unknown", + pin251: "power", + pin252: "unknown", + pin253: "power", + pin254: "power", + pin255: "power", + pin256: "power", + pin257: "no-connect", + pin258: "ground", + pin259: "power", + pin260: "power", + pin261: "power", + pin262: "power", + pin263: "unknown", + pin264: "unknown", + pin265: "unknown", + pin266: "bidirectional", + pin267: "ground", + pin268: "ground", + pin269: "bidirectional", + pin270: "bidirectional", + pin271: "unknown", + pin272: "unknown", + pin273: "unknown", + pin274: "unknown", + pin275: "unknown", + pin276: "unknown", + pin277: "power", + pin278: "power", + pin279: "power", + pin280: "power", + pin281: "power", + pin282: "power", + pin283: "ground", + pin284: "ground", + pin285: "power", + pin286: "power", + pin287: "power", + pin288: "power", + pin289: "power", + pin290: "power", + pin291: "power", + pin292: "unknown", + pin293: "unknown", + pin294: "unknown", + pin295: "unknown", + pin296: "unknown", + pin297: "unknown", + pin298: "unknown", + pin299: "unknown", + pin300: "unknown", + pin301: "unknown", + pin302: "unknown", + pin303: "control", + pin304: "unknown", + pin305: "unknown", + pin306: "power", + pin307: "power", + pin308: "power", + pin309: "power", + pin310: "power", + pin311: "power", + pin312: "power", + pin313: "power", + pin314: "power", + pin315: "power", + pin316: "power", + pin317: "ground", + pin318: "power", + pin319: "power", + pin320: "bidirectional", + pin321: "unknown", + pin322: "unknown", + pin323: "unknown", + pin324: "unknown", + pin325: "bidirectional", + pin326: "bidirectional", + pin327: "unknown", + pin328: "unknown", + pin329: "power", + pin330: "power", + pin331: "unknown", + pin332: "unknown", + pin333: "power", + pin334: "unknown", + pin335: "power", + pin336: "power", + pin337: "power", + pin338: "power", + pin339: "ground", + pin340: "ground", + pin341: "power", + pin342: "power", + pin343: "power", + pin344: "ground", + pin345: "unknown", + pin346: "power", + pin347: "power", + pin348: "unknown", + pin349: "ground", + pin350: "ground", + pin351: "unknown", + pin352: "unknown", + pin353: "control", + pin354: "control", + pin355: "unknown", + pin356: "unknown", + pin357: "unknown", + pin358: "unknown", + pin359: "control", + pin360: "power", + pin361: "unknown", + pin362: "power", + pin363: "power", + pin364: "power", + pin365: "power", + pin366: "power", + pin367: "power", + pin368: "power", + pin369: "power", + pin370: "power", + pin371: "power", + pin372: "power", + pin373: "power", + pin374: "unknown", + pin375: "unknown", + pin376: "control", + pin377: "unknown", + pin378: "unknown", + pin379: "unknown", + pin380: "ground", + pin381: "ground", + pin382: "unknown", + pin383: "unknown", + pin384: "unknown", + pin385: "unknown", + pin386: "unknown", + pin387: "power", + pin388: "power", + pin389: "unknown", + pin390: "power", + pin391: "power", + pin392: "ground", + pin393: "ground", + pin394: "power", + pin395: "ground", + pin396: "power", + pin397: "power", + pin398: "power", + pin399: "power", + pin400: "unknown", + pin401: "ground", + pin402: "unknown", + pin403: "unknown", + pin404: "control", + pin405: "unknown", + pin406: "unknown", + pin407: "unknown", + pin408: "unknown", + pin409: "control", + pin410: "unknown", + pin411: "power", + pin412: "power", + pin413: "unknown", + pin414: "unknown", + pin415: "power", + pin416: "unknown", + pin417: "ground", + pin418: "ground", + pin419: "ground", + pin420: "power", + pin421: "ground", + pin422: "ground", + pin423: "power", + pin424: "ground", + pin425: "ground", + pin426: "power", + pin427: "power", + pin428: "ground", + pin429: "unknown", + pin430: "unknown", + pin431: "power", + pin432: "power", + pin433: "unknown", + pin434: "unknown", + pin435: "unknown", + pin436: "unknown", + pin437: "control", + pin438: "unknown", + pin439: "input", + pin440: "output", + pin441: "output", + pin442: "power", + pin443: "power", + pin444: "power", + pin445: "power", + pin446: "power", + pin447: "power", + pin448: "ground", + pin449: "ground", + pin450: "power", + pin451: "ground", + pin452: "power", + pin453: "power", + pin454: "ground", + pin455: "ground", + pin456: "unknown", + pin457: "unknown", + pin458: "unknown", + pin459: "unknown", + pin460: "unknown", + pin461: "unknown", + pin462: "unknown", + pin463: "unknown", + pin464: "input", + pin465: "input", + pin466: "input", + pin467: "input", + pin468: "output", + pin469: "output", + pin470: "power", + pin471: "output", + pin472: "power", + pin473: "power", + pin474: "power", + pin475: "power", + pin476: "power", + pin477: "ground", + pin478: "power", + pin479: "ground", + pin480: "power", + pin481: "power", + pin482: "unknown", + pin483: "power", + pin484: "power", + pin485: "unknown", + pin486: "unknown", + pin487: "unknown", + pin488: "bidirectional", + pin489: "bidirectional", + pin490: "bidirectional", + pin491: "ground", + pin492: "input", + pin493: "power", + pin494: "power", + pin495: "control", + pin496: "unknown", + pin497: "power", + pin498: "output", + pin499: "power", + pin500: "power", + pin501: "power", + pin502: "power", + pin503: "power", + pin504: "ground", + pin505: "power", + pin506: "power", + pin507: "power", + pin508: "unknown", + pin509: "unknown", + pin510: "power", + pin511: "unknown", + pin512: "unknown", + pin513: "ground", + pin514: "ground", + pin515: "power", + pin516: "ground", + pin517: "output", + pin518: "input", + pin519: "unknown", + pin520: "unknown", + pin521: "no-connect", + pin522: "unknown", + pin523: "power", + pin524: "power", + pin525: "unknown", + pin526: "no-connect", + pin527: "unknown", + pin528: "power", + pin529: "power", + pin530: "unknown", + pin531: "power", + pin532: "power", + pin533: "power", + pin534: "power", + pin535: "unknown", + pin536: "unknown", + pin537: "power", + pin538: "unknown", + pin539: "unknown", + pin540: "unknown", + pin541: "unknown", + pin542: "unknown", + pin543: "bidirectional", + pin544: "bidirectional", + pin545: "unknown", + pin546: "unknown", + pin547: "unknown", + pin548: "unknown", + pin549: "unknown", + pin550: "unknown", + pin551: "power", + pin552: "ground", + pin553: "ground", + pin554: "ground", + pin555: "ground", + pin556: "power", + pin557: "power", + pin558: "ground", + pin559: "ground", + pin560: "power", + pin561: "power", + pin562: "power", + pin563: "power", + pin564: "ground", + pin565: "power", + pin566: "power", + pin567: "unknown", + pin568: "unknown", + pin569: "unknown", + pin570: "unknown", + pin571: "bidirectional", + pin572: "unknown", + pin573: "control", + pin574: "control", + pin575: "unknown", + pin576: "bidirectional", + pin577: "unknown", + pin578: "power", + pin579: "power", + pin580: "unknown", + pin581: "unknown", + pin582: "output", + pin583: "ground", + pin584: "power", + pin585: "power", + pin586: "ground", + pin587: "power", + pin588: "control", + pin589: "unknown", + pin590: "unknown", + pin591: "unknown", + pin592: "ground", + pin593: "power", + pin594: "power", + pin595: "bidirectional", + pin596: "power", + pin597: "power", + pin598: "unknown", + pin599: "unknown", + pin600: "unknown", + pin601: "unknown", + pin602: "unknown", + pin603: "unknown", + pin604: "bidirectional", + pin605: "unknown", + pin606: "unknown", + pin607: "unknown", + pin608: "unknown", + pin609: "output", + pin610: "output", + pin611: "unknown", + pin612: "unknown", + pin613: "ground", + pin614: "unknown", + pin615: "control", + pin616: "control", + pin617: "unknown", + pin618: "unknown", + pin619: "unknown", + pin620: "unknown", + pin621: "power", + pin622: "unknown", + pin623: "unknown", + pin624: "unknown", + pin625: "bidirectional", + pin626: "unknown", + pin627: "unknown", + pin628: "ground", + pin629: "power", + pin630: "power", + pin631: "control", + pin632: "power", + pin633: "unknown", + pin634: "power", + pin635: "power", + pin636: "power", + pin637: "ground", + pin638: "output", + pin639: "unknown", + pin640: "ground", + pin641: "unknown", + pin642: "unknown", + pin643: "power", + pin644: "control", + pin645: "unknown", + pin646: "ground", + pin647: "unknown", + pin648: "unknown", + pin649: "unknown", + pin650: "bidirectional", + pin651: "ground", + pin652: "unknown", + pin653: "power", + pin654: "bidirectional", + pin655: "bidirectional", + pin656: "power", + pin657: "power", + pin658: "power", + pin659: "power", + pin660: "power", + pin661: "power", + pin662: "power", + pin663: "power", + pin664: "ground", + pin665: "unknown", + pin666: "input", + pin667: "ground", + pin668: "control", + pin669: "unknown", + pin670: "power", + pin671: "unknown", + pin672: "unknown", + pin673: "ground", + pin674: "unknown", + pin675: "unknown", + pin676: "unknown", + pin677: "unknown", + pin678: "unknown", + pin679: "unknown", + pin680: "bidirectional", + pin681: "bidirectional", + pin682: "power", + pin683: "power", + pin684: "power", + pin685: "power", + pin686: "power", + pin687: "power", + pin688: "power", + pin689: "power", + pin690: "unknown", + pin691: "input", + pin692: "unknown", + pin693: "ground", + pin694: "unknown", + pin695: "unknown", + pin696: "unknown", + pin697: "unknown", + pin698: "unknown", + pin699: "unknown", + pin700: "unknown", + pin701: "unknown", + pin702: "unknown", + pin703: "unknown", + pin704: "unknown", + pin705: "ground", + pin706: "power", + pin707: "power", + pin708: "power", + pin709: "power", + pin710: "power", + pin711: "power", + pin712: "control", + pin713: "input", + pin714: "output", + pin715: "input", + pin716: "output", + pin717: "input", + pin718: "output", + pin719: "control", + pin720: "control", + pin721: "bidirectional", + pin722: "bidirectional", + pin723: "bidirectional", + pin724: "power", + pin725: "control", + pin726: "unknown", + pin727: "unknown", + pin728: "unknown", + pin729: "bidirectional", + pin730: "unknown", + pin731: "unknown", + pin732: "power", + pin733: "ground", + pin734: "ground", + pin735: "power", + pin736: "power", + pin737: "power", + pin738: "power", + pin739: "control", + pin740: "ground", + pin741: "input", + pin742: "output", + pin743: "input", + pin744: "output", + pin745: "input", + pin746: "output", + pin747: "control", + pin748: "control", + pin749: "bidirectional", + pin750: "bidirectional", + pin751: "bidirectional", + pin752: "ground", + pin753: "unknown", + pin754: "unknown", + pin755: "control", + pin756: "unknown", + pin757: "bidirectional", + pin758: "unknown", + pin759: "power", + pin760: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, + pin4: { requiresPower: true }, + pin6: { requiresGround: true }, + pin14: { requiresGround: true }, + pin23: { requiresGround: true }, + pin27: { doNotConnect: true }, + pin28: { requiresGround: true }, + pin29: { requiresGround: true }, + pin30: { requiresPower: true }, + pin31: { requiresPower: true }, + pin32: { requiresPower: true }, + pin33: { requiresPower: true }, + pin34: { requiresPower: true }, + pin51: { requiresPower: true }, + pin56: { doNotConnect: true }, + pin57: { requiresPower: true }, + pin58: { requiresPower: true }, + pin59: { requiresPower: true }, + pin60: { requiresPower: true }, + pin61: { requiresPower: true }, + pin75: { requiresPower: true }, + pin80: { requiresPower: true }, + pin81: { requiresPower: true }, + pin82: { requiresPower: true }, + pin83: { requiresPower: true }, + pin84: { requiresPower: true }, + pin88: { requiresPower: true }, + pin91: { requiresGround: true }, + pin94: { requiresPower: true }, + pin97: { requiresGround: true }, + pin100: { requiresPower: true }, + pin107: { requiresPower: true }, + pin108: { requiresPower: true }, + pin109: { requiresPower: true }, + pin110: { requiresPower: true }, + pin111: { requiresPower: true }, + pin115: { requiresPower: true }, + pin118: { requiresGround: true }, + pin121: { requiresPower: true }, + pin124: { requiresGround: true }, + pin127: { requiresPower: true }, + pin129: { requiresPower: true }, + pin134: { requiresGround: true }, + pin135: { requiresPower: true }, + pin136: { requiresPower: true }, + pin137: { requiresPower: true }, + pin138: { requiresPower: true }, + pin139: { requiresPower: true }, + pin140: { requiresGround: true }, + pin162: { requiresPower: true }, + pin163: { requiresPower: true }, + pin164: { requiresPower: true }, + pin165: { requiresPower: true }, + pin166: { requiresPower: true }, + pin167: { requiresGround: true }, + pin168: { requiresGround: true }, + pin169: { requiresGround: true }, + pin175: { requiresPower: true }, + pin178: { requiresPower: true }, + pin182: { requiresPower: true }, + pin183: { requiresPower: true }, + pin195: { requiresPower: true }, + pin196: { requiresPower: true }, + pin197: { requiresPower: true }, + pin198: { requiresPower: true }, + pin199: { requiresPower: true }, + pin200: { requiresGround: true }, + pin201: { requiresPower: true }, + pin202: { requiresPower: true }, + pin203: { requiresPower: true }, + pin204: { requiresPower: true }, + pin205: { requiresPower: true }, + pin206: { requiresPower: true }, + pin207: { requiresPower: true }, + pin208: { requiresPower: true }, + pin209: { requiresPower: true }, + pin210: { requiresPower: true }, + pin224: { requiresPower: true }, + pin225: { requiresPower: true }, + pin226: { requiresPower: true }, + pin228: { requiresGround: true }, + pin229: { requiresPower: true }, + pin231: { requiresGround: true }, + pin233: { requiresPower: true }, + pin234: { requiresPower: true }, + pin235: { requiresPower: true }, + pin237: { requiresPower: true }, + pin238: { requiresPower: true }, + pin243: { requiresPower: true }, + pin244: { requiresGround: true }, + pin245: { requiresGround: true }, + pin247: { requiresGround: true }, + pin248: { requiresGround: true }, + pin251: { requiresPower: true }, + pin253: { requiresPower: true }, + pin254: { requiresPower: true }, + pin255: { requiresPower: true }, + pin256: { requiresPower: true }, + pin257: { doNotConnect: true }, + pin258: { requiresGround: true }, + pin259: { requiresPower: true }, + pin260: { requiresPower: true }, + pin261: { requiresPower: true }, + pin262: { requiresPower: true }, + pin267: { requiresGround: true }, + pin268: { requiresGround: true }, + pin277: { requiresPower: true }, + pin278: { requiresPower: true }, + pin279: { requiresPower: true }, + pin280: { requiresPower: true }, + pin281: { requiresPower: true }, + pin282: { requiresPower: true }, + pin283: { requiresGround: true }, + pin284: { requiresGround: true }, + pin285: { requiresPower: true }, + pin286: { requiresPower: true }, + pin287: { requiresPower: true }, + pin288: { requiresPower: true }, + pin289: { requiresPower: true }, + pin290: { requiresPower: true }, + pin291: { requiresPower: true }, + pin306: { requiresPower: true }, + pin307: { requiresPower: true }, + pin308: { requiresPower: true }, + pin309: { requiresPower: true }, + pin310: { requiresPower: true }, + pin311: { requiresPower: true }, + pin312: { requiresPower: true }, + pin313: { requiresPower: true }, + pin314: { requiresPower: true }, + pin315: { requiresPower: true }, + pin316: { requiresPower: true }, + pin317: { requiresGround: true }, + pin318: { requiresPower: true }, + pin319: { requiresPower: true }, + pin329: { requiresPower: true }, + pin330: { requiresPower: true }, + pin333: { requiresPower: true }, + pin335: { requiresPower: true }, + pin336: { requiresPower: true }, + pin337: { requiresPower: true }, + pin338: { requiresPower: true }, + pin339: { requiresGround: true }, + pin340: { requiresGround: true }, + pin341: { requiresPower: true }, + pin342: { requiresPower: true }, + pin343: { requiresPower: true }, + pin344: { requiresGround: true }, + pin346: { requiresPower: true }, + pin347: { requiresPower: true }, + pin349: { requiresGround: true }, + pin350: { requiresGround: true }, + pin360: { requiresPower: true }, + pin362: { requiresPower: true }, + pin363: { requiresPower: true }, + pin364: { requiresPower: true }, + pin365: { requiresPower: true }, + pin366: { requiresPower: true }, + pin367: { requiresPower: true }, + pin368: { requiresPower: true }, + pin369: { requiresPower: true }, + pin370: { requiresPower: true }, + pin371: { requiresPower: true }, + pin372: { requiresPower: true }, + pin373: { requiresPower: true }, + pin380: { requiresGround: true }, + pin381: { requiresGround: true }, + pin387: { requiresPower: true }, + pin388: { requiresPower: true }, + pin390: { requiresPower: true }, + pin391: { requiresPower: true }, + pin392: { requiresGround: true }, + pin393: { requiresGround: true }, + pin394: { requiresPower: true }, + pin395: { requiresGround: true }, + pin396: { requiresPower: true }, + pin397: { requiresPower: true }, + pin398: { requiresPower: true }, + pin399: { requiresPower: true }, + pin401: { requiresGround: true }, + pin411: { requiresPower: true }, + pin412: { requiresPower: true }, + pin415: { requiresPower: true }, + pin417: { requiresGround: true }, + pin418: { requiresGround: true }, + pin419: { requiresGround: true }, + pin420: { requiresPower: true }, + pin421: { requiresGround: true }, + pin422: { requiresGround: true }, + pin423: { requiresPower: true }, + pin424: { requiresGround: true }, + pin425: { requiresGround: true }, + pin426: { requiresPower: true }, + pin427: { requiresPower: true }, + pin428: { requiresGround: true }, + pin431: { requiresPower: true }, + pin432: { requiresPower: true }, + pin442: { requiresPower: true }, + pin443: { requiresPower: true }, + pin444: { requiresPower: true }, + pin445: { requiresPower: true }, + pin446: { requiresPower: true }, + pin447: { requiresPower: true }, + pin448: { requiresGround: true }, + pin449: { requiresGround: true }, + pin450: { requiresPower: true }, + pin451: { requiresGround: true }, + pin452: { requiresPower: true }, + pin453: { requiresPower: true }, + pin454: { requiresGround: true }, + pin455: { requiresGround: true }, + pin470: { requiresPower: true }, + pin472: { requiresPower: true }, + pin473: { requiresPower: true }, + pin474: { requiresPower: true }, + pin475: { requiresPower: true }, + pin476: { requiresPower: true }, + pin477: { requiresGround: true }, + pin478: { requiresPower: true }, + pin479: { requiresGround: true }, + pin480: { requiresPower: true }, + pin481: { requiresPower: true }, + pin483: { requiresPower: true }, + pin484: { requiresPower: true }, + pin491: { requiresGround: true }, + pin493: { requiresPower: true }, + pin494: { requiresPower: true }, + pin497: { requiresPower: true }, + pin499: { requiresPower: true }, + pin500: { requiresPower: true }, + pin501: { requiresPower: true }, + pin502: { requiresPower: true }, + pin503: { requiresPower: true }, + pin504: { requiresGround: true }, + pin505: { requiresPower: true }, + pin506: { requiresPower: true }, + pin507: { requiresPower: true }, + pin510: { requiresPower: true }, + pin513: { requiresGround: true }, + pin514: { requiresGround: true }, + pin515: { requiresPower: true }, + pin516: { requiresGround: true }, + pin521: { doNotConnect: true }, + pin523: { requiresPower: true }, + pin524: { requiresPower: true }, + pin526: { doNotConnect: true }, + pin528: { requiresPower: true }, + pin529: { requiresPower: true }, + pin531: { requiresPower: true }, + pin532: { requiresPower: true }, + pin533: { requiresPower: true }, + pin534: { requiresPower: true }, + pin537: { requiresPower: true }, + pin551: { requiresPower: true }, + pin552: { requiresGround: true }, + pin553: { requiresGround: true }, + pin554: { requiresGround: true }, + pin555: { requiresGround: true }, + pin556: { requiresPower: true }, + pin557: { requiresPower: true }, + pin558: { requiresGround: true }, + pin559: { requiresGround: true }, + pin560: { requiresPower: true }, + pin561: { requiresPower: true }, + pin562: { requiresPower: true }, + pin563: { requiresPower: true }, + pin564: { requiresGround: true }, + pin565: { requiresPower: true }, + pin566: { requiresPower: true }, + pin578: { requiresPower: true }, + pin579: { requiresPower: true }, + pin583: { requiresGround: true }, + pin584: { requiresPower: true }, + pin585: { requiresPower: true }, + pin586: { requiresGround: true }, + pin587: { requiresPower: true }, + pin592: { requiresGround: true }, + pin593: { requiresPower: true }, + pin594: { requiresPower: true }, + pin596: { requiresPower: true }, + pin597: { requiresPower: true }, + pin613: { requiresGround: true }, + pin621: { requiresPower: true }, + pin628: { requiresGround: true }, + pin629: { requiresPower: true }, + pin630: { requiresPower: true }, + pin632: { requiresPower: true }, + pin634: { requiresPower: true }, + pin635: { requiresPower: true }, + pin636: { requiresPower: true }, + pin637: { requiresGround: true }, + pin640: { requiresGround: true }, + pin643: { requiresPower: true }, + pin646: { requiresGround: true }, + pin651: { requiresGround: true }, + pin653: { requiresPower: true }, + pin656: { requiresPower: true }, + pin657: { requiresPower: true }, + pin658: { requiresPower: true }, + pin659: { requiresPower: true }, + pin660: { requiresPower: true }, + pin661: { requiresPower: true }, + pin662: { requiresPower: true }, + pin663: { requiresPower: true }, + pin664: { requiresGround: true }, + pin667: { requiresGround: true }, + pin670: { requiresPower: true }, + pin673: { requiresGround: true }, + pin682: { requiresPower: true }, + pin683: { requiresPower: true }, + pin684: { requiresPower: true }, + pin685: { requiresPower: true }, + pin686: { requiresPower: true }, + pin687: { requiresPower: true }, + pin688: { requiresPower: true }, + pin689: { requiresPower: true }, + pin693: { requiresGround: true }, + pin705: { requiresGround: true }, + pin706: { requiresPower: true }, + pin707: { requiresPower: true }, + pin708: { requiresPower: true }, + pin709: { requiresPower: true }, + pin710: { requiresPower: true }, + pin711: { requiresPower: true }, + pin724: { requiresPower: true }, + pin732: { requiresPower: true }, + pin733: { requiresGround: true }, + pin734: { requiresGround: true }, + pin735: { requiresPower: true }, + pin736: { requiresPower: true }, + pin737: { requiresPower: true }, + pin738: { requiresPower: true }, + pin740: { requiresGround: true }, + pin752: { requiresGround: true }, + pin759: { requiresPower: true }, + pin760: { requiresGround: true }, +} as const; + +export const AM5726BABCXA = (props: ChipProps) => { + // Footprint provenance: TI drawing ABC0760A; official source https://www.ti.com/lit/gpn/AM5726 pages 414,415,416 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default AM5726BABCXA; diff --git a/lib/chips/AM62A32AOMHIAMBR.circuit.tsx b/lib/chips/AM62A32AOMHIAMBR.circuit.tsx new file mode 100644 index 00000000..5595e6a7 --- /dev/null +++ b/lib/chips/AM62A32AOMHIAMBR.circuit.tsx @@ -0,0 +1,1197 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["VDDSHV_MCU", "B1", "VDDSHV_MCU_B1"], + pin3: ["DDR0_DQS0_N", "C1"], + pin4: ["DDR0_DQS0", "D1"], + pin5: ["VSS", "E1", "VSS_E1"], + pin6: ["DDR0_DQS1_N", "F1"], + pin7: ["DDR0_DQS1", "G1"], + pin8: ["VSS", "H1", "VSS_H1"], + pin9: ["DDR0_A4", "J1"], + pin10: ["VSS", "K1", "VSS_K1"], + pin11: ["DDR0_CK0_N", "L1"], + pin12: ["DDR0_CK0", "M1"], + pin13: ["VSS", "N1", "VSS_N1"], + pin14: ["DDR0_DQS2_N", "P1"], + pin15: ["DDR0_DQS2", "R1"], + pin16: ["VSS", "T1", "VSS_T1"], + pin17: ["DDR0_DM2", "U1"], + pin18: ["VSS", "V1", "VSS_V1"], + pin19: ["DDR0_DQS3", "W1"], + pin20: ["DDR0_DQS3_N", "Y1"], + pin21: ["VDDSHV_MCU", "AA1", "VDDSHV_MCU_AA1"], + pin22: ["VSS", "AB1", "VSS_AB1"], + pin23: ["VDDSHV_MCU", "A2", "VDDSHV_MCU_A2"], + pin24: ["DDR0_DQ6", "B2"], + pin25: ["DDR0_DM0", "C2"], + pin26: ["VSS", "D2", "VSS_D2"], + pin27: ["DDR0_DQ8", "E2"], + pin28: ["VSS", "F2", "VSS_F2"], + pin29: ["DDR0_DQ11", "G2"], + pin30: ["DDR0_A7", "H2"], + pin31: ["DDR0_A1", "J2"], + pin32: ["DDR0_A10", "K2"], + pin33: ["DDR0_A9", "L2"], + pin34: ["DDR0_A13", "M2"], + pin35: ["DDR0_PAR", "N2"], + pin36: ["DDR0_DQ20", "P2"], + pin37: ["VSS", "R2", "VSS_R2"], + pin38: ["DDR0_DQ22", "T2"], + pin39: ["VSS", "U2", "VSS_U2"], + pin40: ["DDR0_DQ25", "V2"], + pin41: ["VSS", "W2", "VSS_W2"], + pin42: ["DDR0_DQ24", "Y2"], + pin43: ["VSS", "AA2", "VSS_AA2"], + pin44: ["VDDSHV_MCU", "AB2", "VDDSHV_MCU_AB2"], + pin45: ["DDR0_DQ7", "A3"], + pin46: ["VSS", "B3", "VSS_B3"], + pin47: ["DDR0_DQ5", "C3"], + pin48: ["DDR0_DQ15", "D3"], + pin49: ["VSS", "E3", "VSS_E3"], + pin50: ["DDR0_DM1", "F3"], + pin51: ["VSS", "G3", "VSS_G3"], + pin52: ["DDR0_BA1", "H3"], + pin53: ["VSS", "J3", "VSS_J3"], + pin54: ["DDR0_A6", "K3"], + pin55: ["VSS", "L3", "VSS_L3"], + pin56: ["DDR0_A12", "M3"], + pin57: ["DDR0_ODT1", "N3"], + pin58: ["DDR0_CKE0", "P3"], + pin59: ["DDR0_DQ21", "R3"], + pin60: ["VSS", "T3", "VSS_T3"], + pin61: ["DDR0_DQ23", "U3"], + pin62: ["VSS", "V3", "VSS_V3"], + pin63: ["DDR0_DM3", "W3"], + pin64: ["VSS", "Y3", "VSS_Y3"], + pin65: ["DDR0_DQ29", "AA3"], + pin66: ["VSS", "AB3", "VSS_AB3"], + pin67: ["VSS", "A4", "VSS_A4"], + pin68: ["DDR0_DQ1", "B4"], + pin69: ["VSS", "C4", "VSS_C4"], + pin70: ["VSS", "D4", "VSS_D4"], + pin71: ["DDR0_DQ14", "E4"], + pin72: ["VSS", "F4", "VSS_F4"], + pin73: ["DDR0_DQ13", "G4"], + pin74: ["VSS", "H4", "VSS_H4"], + pin75: ["DDR0_A2", "J4"], + pin76: ["VSS", "K4", "VSS_K4"], + pin77: ["DDR0_A3", "L4"], + pin78: ["VSS", "M4", "VSS_M4"], + pin79: ["DDR0_CS1_N", "N4"], + pin80: ["DDR0_BG0", "P4"], + pin81: ["VSS", "R4", "VSS_R4"], + pin82: ["DDR0_DQ17", "T4"], + pin83: ["VSS", "U4", "VSS_U4"], + pin84: ["DDR0_DQ26", "V4"], + pin85: ["VSS", "W4", "VSS_W4"], + pin86: ["DDR0_DQ28", "Y4"], + pin87: ["VSS", "AA4", "VSS_AA4"], + pin88: ["DDR0_DQ31", "AB4"], + pin89: ["DDR0_DQ0", "A5"], + pin90: ["VSS", "B5", "VSS_B5"], + pin91: ["DDR0_DQ4", "C5"], + pin92: ["DDR0_DQ3", "D5"], + pin93: ["VSS", "E5", "VSS_E5"], + pin94: ["DDR0_DQ9", "F5"], + pin95: ["VSS", "G5", "VSS_G5"], + pin96: ["DDR0_ODT0", "H5"], + pin97: ["DDR0_A0", "J5"], + pin98: ["DDR0_A5", "K5"], + pin99: ["DDR0_A11", "L5"], + pin100: ["DDR0_CAS_N", "M5"], + pin101: ["DDR0_ACT_N", "N5"], + pin102: ["DDR0_CKE1", "P5"], + pin103: ["DDR0_DQ19", "R5"], + pin104: ["VSS", "T5", "VSS_T5"], + pin105: ["DDR0_DQ18", "U5"], + pin106: ["VSS", "V5", "VSS_V5"], + pin107: ["DDR0_DQ27", "W5"], + pin108: ["VSS", "Y5", "VSS_Y5"], + pin109: ["DDR0_DQ30", "AA5"], + pin110: ["VSS", "AB5", "VSS_AB5"], + pin111: ["VSS", "A6", "VSS_A6"], + pin112: ["DDR0_DQ2", "B6"], + pin113: ["RSVD0", "C6"], + pin114: ["RSVD1", "D6"], + pin115: ["DDR0_DQ10", "E6"], + pin116: ["RSVD3", "F6"], + pin117: ["DDR0_DQ12", "G6"], + pin118: ["DDR0_CAL0", "H6"], + pin119: ["DDR0_CS0_N", "J6"], + pin120: ["DDR0_BA0", "K6"], + pin121: ["DDR0_A8", "L6"], + pin122: ["DDR0_RAS_N", "M6"], + pin123: ["DDR0_WE_N", "N6"], + pin124: ["DDR0_RESET0_N", "P6"], + pin125: ["VSS", "R6", "VSS_R6"], + pin126: ["DDR0_DQ16", "T6"], + pin127: ["VSS", "U6", "VSS_U6"], + pin128: ["USB1_VBUS", "V6"], + pin129: ["VSS", "W6", "VSS_W6"], + pin130: ["PADCONFIG136", "Y6"], + pin131: ["MMC0_DAT0", "AA6"], + pin132: ["PADCONFIG132", "AB6"], + pin133: ["CU_PORZ", "A7"], + pin134: ["VSS", "B7", "VSS_B7"], + pin135: ["CU_PADCONFIG13", "C7"], + pin136: ["CU_MCAN1_TX", "D7"], + pin137: ["RSVD2", "E7"], + pin138: ["VPP", "F7"], + pin139: ["RSVD5", "G7"], + pin140: ["DDR0_ALERT_N", "H7"], + pin141: ["VDDS_DDR", "J7", "VDDS_DDR_J7"], + pin142: ["VSS", "K7", "VSS_K7"], + pin143: ["VDDS_DDR", "L7", "VDDS_DDR_L7"], + pin144: ["VSS", "M7", "VSS_M7"], + pin145: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin146: ["VSS", "P7", "VSS_P7"], + pin147: ["DDR0_BG1", "R7"], + pin148: ["VSS", "T7", "VSS_T7"], + pin149: ["USB1_RCALIB", "U7"], + pin150: ["VSS", "V7", "VSS_V7"], + pin151: ["MC0_DAT5", "W7"], + pin152: ["PADCONFIG131", "Y7"], + pin153: ["MMC0_DAT3", "AA7"], + pin154: ["PADCONFIG134", "AB7"], + pin155: ["WKUP_LFOSC0_XI", "A8"], + pin156: ["CU_ERRORN", "B8"], + pin157: ["CU_PADCONFIG12", "C8"], + pin158: ["MCU_UART0_RXD", "D8"], + pin159: ["CU_PADCONFIG14", "E8"], + pin160: ["MCU_UART0_TXD", "F8"], + pin161: ["CAP_VDDS_CANUART", "G8"], + pin162: ["VDDSHV_CANUART", "H8"], + pin163: ["VDDS_OSC0", "J8"], + pin164: ["VDDS_DDR", "K8", "VDDS_DDR_K8"], + pin165: ["VDDS_DDR_C", "L8"], + pin166: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin167: ["VSS", "N8", "VSS_N8"], + pin168: ["VDDS_DDR", "P8", "VDDS_DDR_P8"], + pin169: ["CAP_VDDS4", "R8"], + pin170: ["VDDSHV4", "T8", "VDDSHV4_T8"], + pin171: ["VDDSHV4", "U8", "VDDSHV4_U8"], + pin172: ["USB0_VBUS", "V8"], + pin173: ["VSS", "W8", "VSS_W8"], + pin174: ["MMC0_DAT4", "Y8"], + pin175: ["VSS", "AA8", "VSS_AA8"], + pin176: ["ADCONFIG126", "AB8"], + pin177: ["WKUP_LFOSC0_XO", "A9"], + pin178: ["CU_PADCONFIG16", "B9"], + pin179: ["WKUP_UART0_RXD", "C9"], + pin180: ["MCU_I2C0_SDA", "D9"], + pin181: ["WKUP_UART0_TXD", "E9"], + pin182: ["VMON_3P3_SOC", "F9"], + pin183: ["VSS", "G9", "VSS_G9"], + pin184: ["VDD_CANUART", "H9", "VDD_CANUART_H9"], + pin185: ["VDD_CANUART", "J9", "VDD_CANUART_J9"], + pin186: ["VSS", "K9", "VSS_K9"], + pin187: ["VDD_CANUART", "L9", "VDD_CANUART_L9"], + pin188: ["VDDA_DDR_PLL0", "M9"], + pin189: ["VDDA_PLL0", "N9"], + pin190: ["VDDR_CORE", "P9", "VDDR_CORE_P9"], + pin191: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin192: ["VDDA_CORE_USB", "T9"], + pin193: ["VSS", "U9", "VSS_U9"], + pin194: ["VSS", "V9", "VSS_V9"], + pin195: ["MC0_DAT6", "W9"], + pin196: ["VSS", "Y9", "VSS_Y9"], + pin197: ["USB0_DP", "AA9"], + pin198: ["VSS", "AB9", "VSS_AB9"], + pin199: ["VSS", "A10", "VSS_A10"], + pin200: ["WKUP_CLKOUT0", "B10"], + pin201: ["WKUP_UART0_CTSN", "C10"], + pin202: ["MCU_PADCONFIG8", "D10"], + pin203: ["MU1", "E10"], + pin204: ["RSVD4", "F10"], + pin205: ["CAP_VDDS_MCU", "G10"], + pin206: ["VDDSHV_MCU", "H10", "VDDSHV_MCU_H10"], + pin207: ["VDDA_MCU", "J10"], + pin208: ["VDDA_PLL4", "K10"], + pin209: ["VDDA_TEMP2", "L10"], + pin210: ["VDDR_CORE", "M10", "VDDR_CORE_M10"], + pin211: ["VSS", "N10", "VSS_N10"], + pin212: ["VDD_CORE", "P10", "VDD_CORE_P10"], + pin213: ["VSS", "R10", "VSS_R10"], + pin214: ["VDDA_1P8_USB", "T10"], + pin215: ["VDDA_3P3_USB", "U10"], + pin216: ["CSI0_RXRCALIB", "V10"], + pin217: ["USB0_RCALIB", "W10"], + pin218: ["USB1_DP", "Y10"], + pin219: ["USB0_DM", "AA10"], + pin220: ["CSI0_RXP3", "AB10"], + pin221: ["MCU_OSC0_XO", "A11"], + pin222: ["MCU_PADCONFIG7", "B11"], + pin223: ["CU_PADCONFIG1", "C11"], + pin224: ["VSS", "D11", "VSS_D11"], + pin225: ["MCU_SPI0_CS0", "E11"], + pin226: ["VSS", "F11", "VSS_F11"], + pin227: ["VDDSHV_MCU", "G11", "VDDSHV_MCU_G11"], + pin228: ["VSS", "H11", "VSS_H11"], + pin229: ["VDD_CANUART", "J11", "VDD_CANUART_J11"], + pin230: ["VSS", "K11", "VSS_K11"], + pin231: ["VDD_CANUART", "L11", "VDD_CANUART_L11"], + pin232: ["VSS", "M11", "VSS_M11"], + pin233: ["VDD_CORE", "N11", "VDD_CORE_N11"], + pin234: ["VSS", "P11", "VSS_P11"], + pin235: ["VDDA_PLL1", "R11"], + pin236: ["VDDA_CORE_CSIRX0", "T11"], + pin237: ["RSVD6", "U11"], + pin238: ["RSVD7", "V11"], + pin239: ["VSS", "W11", "VSS_W11"], + pin240: ["USB1_DM", "Y11"], + pin241: ["VSS", "AA11", "VSS_AA11"], + pin242: ["CSI0_RXN3", "AB11"], + pin243: ["MCU_OSC0_XI", "A12"], + pin244: ["MCU_SPI0_D1", "B12"], + pin245: ["CU_RESETZ", "C12"], + pin246: ["PMIC_LPM_EN0", "D12"], + pin247: ["MCU_I2C0_SCL", "E12"], + pin248: ["VMON_1P8_SOC", "F12"], + pin249: ["VSS", "G12", "VSS_G12"], + pin250: ["VMON_VSYS", "H12"], + pin251: ["VSS", "J12", "VSS_J12"], + pin252: ["VDDR_CORE", "K12", "VDDR_CORE_K12"], + pin253: ["VSS", "L12", "VSS_L12"], + pin254: ["VDD_CORE", "M12", "VDD_CORE_M12"], + pin255: ["VSS", "N12", "VSS_N12"], + pin256: ["VDDR_CORE", "P12", "VDDR_CORE_P12"], + pin257: ["VSS", "R12", "VSS_R12"], + pin258: ["VDDA_1P8_CSIRX0", "T12"], + pin259: ["VSS", "U12", "VSS_U12"], + pin260: ["MDIO0_MDC", "V12"], + pin261: ["CSI0_RXN0", "W12"], + pin262: ["VSS", "Y12", "VSS_Y12"], + pin263: ["CSI0_RXP2", "AA12"], + pin264: ["VSS", "AB12", "VSS_AB12"], + pin265: ["VSS", "A13", "VSS_A13"], + pin266: ["MCU_SPI0_CLK", "B13"], + pin267: ["MU0", "C13"], + pin268: ["WKUP_I2C0_SCL", "D13"], + pin269: ["WKUP_I2C0_SDA", "E13"], + pin270: ["VSS", "F13", "VSS_F13"], + pin271: ["CAP_VDDS0", "G13"], + pin272: ["VDDSHV0", "H13", "VDDSHV0_H13"], + pin273: ["VDD_CANUART", "J13", "VDD_CANUART_J13"], + pin274: ["VDDA_PLL3", "K13"], + pin275: ["VDD_CANUART", "L13", "VDD_CANUART_L13"], + pin276: ["VDDA_PLL2", "M13"], + pin277: ["VDD_CORE", "N13", "VDD_CORE_N13"], + pin278: ["VSS", "P13", "VSS_P13"], + pin279: ["VDDSHV2", "R13", "VDDSHV2_R13"], + pin280: ["VDDSHV2", "T13", "VDDSHV2_T13"], + pin281: ["VDDSHV2", "U13", "VDDSHV2_U13"], + pin282: ["MDIO0_MDIO", "V13"], + pin283: ["CSI0_RXP0", "W13"], + pin284: ["CSI0_RXN1", "Y13"], + pin285: ["CSI0_RXN2", "AA13"], + pin286: ["CSI0_RXCLKP", "AB13"], + pin287: ["CK", "A14"], + pin288: ["MS", "B14"], + pin289: ["DO", "C14"], + pin290: ["MCU_RESETSTATZ", "D14"], + pin291: ["UART0_RXD", "E14"], + pin292: ["ART0_CTSN", "F14"], + pin293: ["VDDSHV0", "G14", "VDDSHV0_G14"], + pin294: ["VSS", "H14", "VSS_H14"], + pin295: ["VDDR_CORE", "J14", "VDDR_CORE_J14"], + pin296: ["VDD_CANUART", "K14", "VDD_CANUART_K14"], + pin297: ["VSS", "L14", "VSS_L14"], + pin298: ["VDDR_CORE", "M14", "VDDR_CORE_M14"], + pin299: ["VSS", "N14", "VSS_N14"], + pin300: ["VDD_CORE", "P14", "VDD_CORE_P14"], + pin301: ["VSS", "R14", "VSS_R14"], + pin302: ["CAP_VDDS2", "T14"], + pin303: ["VSS", "U14", "VSS_U14"], + pin304: ["RGMII1_RD3", "V14"], + pin305: ["VSS", "W14", "VSS_W14"], + pin306: ["CSI0_RXP1", "Y14"], + pin307: ["VSS", "AA14", "VSS_AA14"], + pin308: ["CSI0_RXCLKN", "AB14"], + pin309: ["MCU_SPI0_D0", "A15"], + pin310: ["SPI0_D0", "B15"], + pin311: ["ART0_RTSN", "C15"], + pin312: ["UART0_TXD", "D15"], + pin313: ["ADCONFIG113", "E15"], + pin314: ["RSTN", "F15"], + pin315: ["CAP_VDDS5", "G15"], + pin316: ["VDDSHV5", "H15", "VDDSHV5_H15"], + pin317: ["VDD_CANUART", "J15", "VDD_CANUART_J15"], + pin318: ["VDDSHV1", "K15", "VDDSHV1_K15"], + pin319: ["VDDSHV3", "L15", "VDDSHV3_L15"], + pin320: ["VDDSHV3", "M15", "VDDSHV3_M15"], + pin321: ["VDDSHV3", "N15", "VDDSHV3_N15"], + pin322: ["VSS", "P15", "VSS_P15"], + pin323: ["VDD_CORE", "R15", "VDD_CORE_R15"], + pin324: ["VSS", "T15", "VSS_T15"], + pin325: ["VDD_CORE", "U15", "VDD_CORE_U15"], + pin326: ["RGMII1_RD1", "V15"], + pin327: ["RGMII1_RD2", "W15"], + pin328: ["VSS", "Y15", "VSS_Y15"], + pin329: ["RGMII1_RX_CTL", "AA15"], + pin330: ["VSS", "AB15", "VSS_AB15"], + pin331: ["DI", "A16"], + pin332: ["XT_REFCLK1", "B16"], + pin333: ["ADCONFIG110", "C16"], + pin334: ["SPI0_CS0", "D16"], + pin335: ["ADCONFIG121", "E16"], + pin336: ["VSS", "F16", "VSS_F16"], + pin337: ["VDDSHV5", "G16", "VDDSHV5_G16"], + pin338: ["VDDSHV6", "H16", "VDDSHV6_H16"], + pin339: ["CAP_VDDS6", "J16"], + pin340: ["CAP_VDDS1", "K16"], + pin341: ["VDDSHV1", "L16", "VDDSHV1_L16"], + pin342: ["CAP_VDDS3", "M16"], + pin343: ["VSS", "N16", "VSS_N16"], + pin344: ["VDDA_TEMP0", "P16"], + pin345: ["VSS", "R16", "VSS_R16"], + pin346: ["VDD_CORE", "T16", "VDD_CORE_T16"], + pin347: ["VSS", "U16", "VSS_U16"], + pin348: ["RGMII1_TD1", "V16"], + pin349: ["RGMII1_TX_CTL", "W16"], + pin350: ["RGMII1_TD2", "Y16"], + pin351: ["RGMII1_RXC", "AA16"], + pin352: ["RGMII1_RD0", "AB16"], + pin353: ["ADCONFIG111", "A17"], + pin354: ["CAN0_TX", "B17"], + pin355: ["ADCONFIG122", "C17"], + pin356: ["2C0_SCL", "D17"], + pin357: ["ADCONFIG123", "E17"], + pin358: ["EXTINTN", "F17"], + pin359: ["VSS", "G17", "VSS_G17"], + pin360: ["VDDSHV6", "H17", "VDDSHV6_H17"], + pin361: ["VSS", "J17", "VSS_J17"], + pin362: ["ADCONFIG40", "K17"], + pin363: ["ADCONFIG34", "L17"], + pin364: ["VSS", "M17", "VSS_M17"], + pin365: ["PMC0_AD4", "N17"], + pin366: ["VSS", "P17", "VSS_P17"], + pin367: ["ADCONFIG39", "R17"], + pin368: ["VSS", "T17", "VSS_T17"], + pin369: ["PADCONFIG63", "U17"], + pin370: ["PADCONFIG64", "V17"], + pin371: ["GMII2_TD3", "W17"], + pin372: ["RGMII1_TD0", "Y17"], + pin373: ["RGMII1_TD3", "AA17"], + pin374: ["RGMII1_TXC", "AB17"], + pin375: ["VSS", "A18", "VSS_A18"], + pin376: ["MCASP0_AXR1", "B18"], + pin377: ["CAN0_RX", "C18"], + pin378: ["MMC1_SDWP", "D18"], + pin379: ["MMC1_SDCD", "E18"], + pin380: ["ORZ_OUT", "F18"], + pin381: ["VDDA_TEMP1", "G18"], + pin382: ["OSPI0_D3", "H18"], + pin383: ["OSPI0_D1", "J18"], + pin384: ["PMC0_DIR", "K18"], + pin385: ["ADCONFIG33", "L18"], + pin386: ["ADCONFIG37", "M18"], + pin387: ["PMC0_AD3", "N18"], + pin388: ["PMC0_AD5", "P18"], + pin389: ["GPMC0_WAIT0", "R18"], + pin390: ["PADCONFIG62", "T18"], + pin391: ["PADCONFIG51", "U18"], + pin392: ["PADCONFIG55", "V18"], + pin393: ["ADCONFIG95", "W18"], + pin394: ["GMII2_TD1", "Y18"], + pin395: ["ADCONFIG93", "AA18"], + pin396: ["VSS", "AB18", "VSS_AB18"], + pin397: ["MCASP0_ACLKX", "A19"], + pin398: ["CASP0_AXR2", "B19"], + pin399: ["CASP0_AXR3", "C19"], + pin400: ["USB1_DRVVBUS", "D19"], + pin401: ["ESET_REQZ", "E19"], + pin402: ["ESETSTATZ", "F19"], + pin403: ["OSPI0_CSN1", "G19"], + pin404: ["OSPI0_D5", "H19"], + pin405: ["OSPI0_D2", "J19"], + pin406: ["ADCONFIG35", "K19"], + pin407: ["GPMC0_BE0N_CLE", "L19"], + pin408: ["ADCONFIG42", "M19"], + pin409: ["PMC0_AD2", "N19"], + pin410: ["PMC0_AD6", "P19"], + pin411: ["ADCONFIG24", "R19"], + pin412: ["PADCONFIG50", "T19"], + pin413: ["VOUT0_DATA3", "U19"], + pin414: ["PADCONFIG54", "V19"], + pin415: ["PADCONFIG59", "W19"], + pin416: ["ADCONFIG89", "Y19"], + pin417: ["ADCONFIG91", "AA19"], + pin418: ["RGMII2_TXC", "AB19"], + pin419: ["MCASP0_AFSX", "A20"], + pin420: ["MCASP0_AXR0", "B20"], + pin421: ["USB0_DRVVBUS", "C20"], + pin422: ["VSS", "D20", "VSS_D20"], + pin423: ["MMC2_DAT0", "E20"], + pin424: ["MMC2_DAT2", "F20"], + pin425: ["OSPI0_CSN3", "G20"], + pin426: ["VSS", "H20", "VSS_H20"], + pin427: ["SPI0_D6", "J20"], + pin428: ["OSPI0_CSN2", "K20"], + pin429: ["VSS", "L20", "VSS_L20"], + pin430: ["ADCONFIG45", "M20"], + pin431: ["PMC0_AD1", "N20"], + pin432: ["VSS", "P20", "VSS_P20"], + pin433: ["PMC0_AD10", "R20"], + pin434: ["ADCONFIG29", "T20"], + pin435: ["PADCONFIG48", "U20"], + pin436: ["VSS", "V20", "VSS_V20"], + pin437: ["VOUT0_DATA12", "W20"], + pin438: ["GMII2_RD1", "Y20"], + pin439: ["ADCONFIG96", "AA20"], + pin440: ["ADCONFIG100", "AB20"], + pin441: ["PADCONFIG108", "A21"], + pin442: ["PADCONFIG107", "B21"], + pin443: ["PADCONFIG143", "C21"], + pin444: ["ADCONFIG139", "D21"], + pin445: ["PADCONFIG74", "E21"], + pin446: ["MMC2_DAT1", "F21"], + pin447: ["ADCONFIG66", "G21"], + pin448: ["OSPI0_CSN0", "H21"], + pin449: ["OSPI0_D0", "J21"], + pin450: ["OSPI0_D4", "K21"], + pin451: ["OSPI0_DQS", "L21"], + pin452: ["ADCONFIG43", "M21"], + pin453: ["PMC0_AD0", "N21"], + pin454: ["PMC0_AD7", "P21"], + pin455: ["PMC0_AD13", "R21"], + pin456: ["ADCONFIG30", "T21"], + pin457: ["PADCONFIG47", "U21"], + pin458: ["VOUT0_DATA7", "V21"], + pin459: ["PADCONFIG57", "W21"], + pin460: ["PADCONFIG60", "Y21"], + pin461: ["ADCONFIG97", "AA21"], + pin462: ["ADCONFIG99", "AB21"], + pin463: ["VSS", "A22", "VSS_A22"], + pin464: ["ADCONFIG140", "B22"], + pin465: ["MC1_DAT2", "C22"], + pin466: ["MC1_DAT3", "D22"], + pin467: ["MMC1_CLK", "E22"], + pin468: ["PADCONFIG73", "F22"], + pin469: ["MMC2_CMD", "G22"], + pin470: ["MMC2_CLK", "H22"], + pin471: ["SPI0_D7", "J22"], + pin472: ["OSPI0_LBCLKO", "K22"], + pin473: ["OSPI0_CLK", "L22"], + pin474: ["PMC0_CSN2", "M22"], + pin475: ["PMC0_CLK", "N22"], + pin476: ["ADCONFIG23", "P22"], + pin477: ["PMC0_AD11", "R22"], + pin478: ["PMC0_AD12", "T22"], + pin479: ["PADCONFIG46", "U22"], + pin480: ["PADCONFIG52", "V22"], + pin481: ["PADCONFIG56", "W22"], + pin482: ["PADCONFIG61", "Y22"], + pin483: ["VOUT0_PCLK", "AA22"], + pin484: ["VSS", "AB22", "VSS_AB22"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "power", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "ground", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "ground", + pin9: "unknown", + pin10: "ground", + pin11: "unknown", + pin12: "unknown", + pin13: "ground", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "ground", + pin17: "unknown", + pin18: "ground", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "power", + pin22: "ground", + pin23: "power", + pin24: "bidirectional", + pin25: "unknown", + pin26: "ground", + pin27: "bidirectional", + pin28: "ground", + pin29: "bidirectional", + pin30: "unknown", + pin31: "unknown", + pin32: "unknown", + pin33: "unknown", + pin34: "unknown", + pin35: "unknown", + pin36: "bidirectional", + pin37: "ground", + pin38: "bidirectional", + pin39: "ground", + pin40: "bidirectional", + pin41: "ground", + pin42: "bidirectional", + pin43: "ground", + pin44: "power", + pin45: "bidirectional", + pin46: "ground", + pin47: "bidirectional", + pin48: "bidirectional", + pin49: "ground", + pin50: "unknown", + pin51: "ground", + pin52: "unknown", + pin53: "ground", + pin54: "unknown", + pin55: "ground", + pin56: "unknown", + pin57: "unknown", + pin58: "unknown", + pin59: "bidirectional", + pin60: "ground", + pin61: "bidirectional", + pin62: "ground", + pin63: "unknown", + pin64: "ground", + pin65: "bidirectional", + pin66: "ground", + pin67: "ground", + pin68: "bidirectional", + pin69: "ground", + pin70: "ground", + pin71: "bidirectional", + pin72: "ground", + pin73: "bidirectional", + pin74: "ground", + pin75: "unknown", + pin76: "ground", + pin77: "unknown", + pin78: "ground", + pin79: "control", + pin80: "unknown", + pin81: "ground", + pin82: "bidirectional", + pin83: "ground", + pin84: "bidirectional", + pin85: "ground", + pin86: "bidirectional", + pin87: "ground", + pin88: "bidirectional", + pin89: "bidirectional", + pin90: "ground", + pin91: "bidirectional", + pin92: "bidirectional", + pin93: "ground", + pin94: "bidirectional", + pin95: "ground", + pin96: "unknown", + pin97: "unknown", + pin98: "unknown", + pin99: "unknown", + pin100: "unknown", + pin101: "unknown", + pin102: "unknown", + pin103: "bidirectional", + pin104: "ground", + pin105: "bidirectional", + pin106: "ground", + pin107: "bidirectional", + pin108: "ground", + pin109: "bidirectional", + pin110: "ground", + pin111: "ground", + pin112: "bidirectional", + pin113: "no-connect", + pin114: "no-connect", + pin115: "bidirectional", + pin116: "no-connect", + pin117: "bidirectional", + pin118: "unknown", + pin119: "control", + pin120: "unknown", + pin121: "unknown", + pin122: "unknown", + pin123: "unknown", + pin124: "control", + pin125: "ground", + pin126: "bidirectional", + pin127: "ground", + pin128: "power", + pin129: "ground", + pin130: "unknown", + pin131: "unknown", + pin132: "unknown", + pin133: "unknown", + pin134: "ground", + pin135: "unknown", + pin136: "output", + pin137: "no-connect", + pin138: "power", + pin139: "no-connect", + pin140: "output", + pin141: "power", + pin142: "ground", + pin143: "power", + pin144: "ground", + pin145: "power", + pin146: "ground", + pin147: "unknown", + pin148: "ground", + pin149: "unknown", + pin150: "ground", + pin151: "unknown", + pin152: "unknown", + pin153: "unknown", + pin154: "unknown", + pin155: "unknown", + pin156: "unknown", + pin157: "unknown", + pin158: "input", + pin159: "unknown", + pin160: "output", + pin161: "power", + pin162: "power", + pin163: "power", + pin164: "power", + pin165: "power", + pin166: "power", + pin167: "ground", + pin168: "power", + pin169: "power", + pin170: "power", + pin171: "power", + pin172: "power", + pin173: "ground", + pin174: "unknown", + pin175: "ground", + pin176: "unknown", + pin177: "unknown", + pin178: "unknown", + pin179: "input", + pin180: "bidirectional", + pin181: "output", + pin182: "power", + pin183: "ground", + pin184: "power", + pin185: "power", + pin186: "ground", + pin187: "power", + pin188: "power", + pin189: "power", + pin190: "power", + pin191: "power", + pin192: "power", + pin193: "ground", + pin194: "ground", + pin195: "unknown", + pin196: "ground", + pin197: "unknown", + pin198: "ground", + pin199: "ground", + pin200: "control", + pin201: "unknown", + pin202: "unknown", + pin203: "unknown", + pin204: "no-connect", + pin205: "power", + pin206: "power", + pin207: "power", + pin208: "power", + pin209: "power", + pin210: "power", + pin211: "ground", + pin212: "power", + pin213: "ground", + pin214: "power", + pin215: "power", + pin216: "control", + pin217: "unknown", + pin218: "unknown", + pin219: "unknown", + pin220: "control", + pin221: "unknown", + pin222: "unknown", + pin223: "unknown", + pin224: "ground", + pin225: "control", + pin226: "ground", + pin227: "power", + pin228: "ground", + pin229: "power", + pin230: "ground", + pin231: "power", + pin232: "ground", + pin233: "power", + pin234: "ground", + pin235: "power", + pin236: "control", + pin237: "no-connect", + pin238: "no-connect", + pin239: "ground", + pin240: "unknown", + pin241: "ground", + pin242: "control", + pin243: "unknown", + pin244: "unknown", + pin245: "control", + pin246: "control", + pin247: "control", + pin248: "power", + pin249: "ground", + pin250: "power", + pin251: "ground", + pin252: "power", + pin253: "ground", + pin254: "power", + pin255: "ground", + pin256: "power", + pin257: "ground", + pin258: "control", + pin259: "ground", + pin260: "unknown", + pin261: "control", + pin262: "ground", + pin263: "control", + pin264: "ground", + pin265: "ground", + pin266: "control", + pin267: "unknown", + pin268: "control", + pin269: "bidirectional", + pin270: "ground", + pin271: "power", + pin272: "power", + pin273: "power", + pin274: "power", + pin275: "power", + pin276: "power", + pin277: "power", + pin278: "ground", + pin279: "power", + pin280: "power", + pin281: "power", + pin282: "unknown", + pin283: "control", + pin284: "control", + pin285: "control", + pin286: "control", + pin287: "unknown", + pin288: "unknown", + pin289: "unknown", + pin290: "control", + pin291: "input", + pin292: "unknown", + pin293: "power", + pin294: "ground", + pin295: "power", + pin296: "power", + pin297: "ground", + pin298: "power", + pin299: "ground", + pin300: "power", + pin301: "ground", + pin302: "power", + pin303: "ground", + pin304: "unknown", + pin305: "ground", + pin306: "control", + pin307: "ground", + pin308: "control", + pin309: "unknown", + pin310: "unknown", + pin311: "unknown", + pin312: "output", + pin313: "unknown", + pin314: "control", + pin315: "power", + pin316: "power", + pin317: "power", + pin318: "power", + pin319: "power", + pin320: "power", + pin321: "power", + pin322: "ground", + pin323: "power", + pin324: "ground", + pin325: "power", + pin326: "unknown", + pin327: "unknown", + pin328: "ground", + pin329: "input", + pin330: "ground", + pin331: "unknown", + pin332: "unknown", + pin333: "unknown", + pin334: "control", + pin335: "unknown", + pin336: "ground", + pin337: "power", + pin338: "power", + pin339: "power", + pin340: "power", + pin341: "power", + pin342: "power", + pin343: "ground", + pin344: "power", + pin345: "ground", + pin346: "power", + pin347: "ground", + pin348: "unknown", + pin349: "output", + pin350: "unknown", + pin351: "input", + pin352: "unknown", + pin353: "unknown", + pin354: "output", + pin355: "unknown", + pin356: "control", + pin357: "unknown", + pin358: "unknown", + pin359: "ground", + pin360: "power", + pin361: "ground", + pin362: "unknown", + pin363: "unknown", + pin364: "ground", + pin365: "unknown", + pin366: "ground", + pin367: "unknown", + pin368: "ground", + pin369: "unknown", + pin370: "unknown", + pin371: "unknown", + pin372: "unknown", + pin373: "unknown", + pin374: "output", + pin375: "ground", + pin376: "unknown", + pin377: "input", + pin378: "unknown", + pin379: "unknown", + pin380: "output", + pin381: "power", + pin382: "unknown", + pin383: "unknown", + pin384: "unknown", + pin385: "unknown", + pin386: "unknown", + pin387: "unknown", + pin388: "unknown", + pin389: "unknown", + pin390: "unknown", + pin391: "unknown", + pin392: "unknown", + pin393: "unknown", + pin394: "unknown", + pin395: "unknown", + pin396: "ground", + pin397: "unknown", + pin398: "unknown", + pin399: "unknown", + pin400: "output", + pin401: "unknown", + pin402: "unknown", + pin403: "control", + pin404: "unknown", + pin405: "unknown", + pin406: "unknown", + pin407: "unknown", + pin408: "unknown", + pin409: "unknown", + pin410: "unknown", + pin411: "unknown", + pin412: "unknown", + pin413: "bidirectional", + pin414: "unknown", + pin415: "unknown", + pin416: "unknown", + pin417: "unknown", + pin418: "output", + pin419: "unknown", + pin420: "unknown", + pin421: "output", + pin422: "ground", + pin423: "unknown", + pin424: "unknown", + pin425: "control", + pin426: "ground", + pin427: "unknown", + pin428: "control", + pin429: "ground", + pin430: "unknown", + pin431: "unknown", + pin432: "ground", + pin433: "unknown", + pin434: "unknown", + pin435: "unknown", + pin436: "ground", + pin437: "bidirectional", + pin438: "unknown", + pin439: "unknown", + pin440: "unknown", + pin441: "unknown", + pin442: "unknown", + pin443: "unknown", + pin444: "unknown", + pin445: "unknown", + pin446: "unknown", + pin447: "unknown", + pin448: "control", + pin449: "unknown", + pin450: "unknown", + pin451: "bidirectional", + pin452: "unknown", + pin453: "unknown", + pin454: "unknown", + pin455: "unknown", + pin456: "unknown", + pin457: "unknown", + pin458: "bidirectional", + pin459: "unknown", + pin460: "unknown", + pin461: "unknown", + pin462: "unknown", + pin463: "ground", + pin464: "unknown", + pin465: "unknown", + pin466: "unknown", + pin467: "control", + pin468: "unknown", + pin469: "unknown", + pin470: "control", + pin471: "unknown", + pin472: "unknown", + pin473: "control", + pin474: "control", + pin475: "control", + pin476: "unknown", + pin477: "unknown", + pin478: "unknown", + pin479: "unknown", + pin480: "unknown", + pin481: "unknown", + pin482: "unknown", + pin483: "output", + pin484: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin5: { requiresGround: true }, + pin8: { requiresGround: true }, + pin10: { requiresGround: true }, + pin13: { requiresGround: true }, + pin16: { requiresGround: true }, + pin18: { requiresGround: true }, + pin21: { requiresPower: true }, + pin22: { requiresGround: true }, + pin23: { requiresPower: true }, + pin26: { requiresGround: true }, + pin28: { requiresGround: true }, + pin37: { requiresGround: true }, + pin39: { requiresGround: true }, + pin41: { requiresGround: true }, + pin43: { requiresGround: true }, + pin44: { requiresPower: true }, + pin46: { requiresGround: true }, + pin49: { requiresGround: true }, + pin51: { requiresGround: true }, + pin53: { requiresGround: true }, + pin55: { requiresGround: true }, + pin60: { requiresGround: true }, + pin62: { requiresGround: true }, + pin64: { requiresGround: true }, + pin66: { requiresGround: true }, + pin67: { requiresGround: true }, + pin69: { requiresGround: true }, + pin70: { requiresGround: true }, + pin72: { requiresGround: true }, + pin74: { requiresGround: true }, + pin76: { requiresGround: true }, + pin78: { requiresGround: true }, + pin81: { requiresGround: true }, + pin83: { requiresGround: true }, + pin85: { requiresGround: true }, + pin87: { requiresGround: true }, + pin90: { requiresGround: true }, + pin93: { requiresGround: true }, + pin95: { requiresGround: true }, + pin104: { requiresGround: true }, + pin106: { requiresGround: true }, + pin108: { requiresGround: true }, + pin110: { requiresGround: true }, + pin111: { requiresGround: true }, + pin113: { doNotConnect: true }, + pin114: { doNotConnect: true }, + pin116: { doNotConnect: true }, + pin125: { requiresGround: true }, + pin127: { requiresGround: true }, + pin128: { requiresPower: true }, + pin129: { requiresGround: true }, + pin134: { requiresGround: true }, + pin137: { doNotConnect: true }, + pin138: { requiresPower: true }, + pin139: { doNotConnect: true }, + pin141: { requiresPower: true }, + pin142: { requiresGround: true }, + pin143: { requiresPower: true }, + pin144: { requiresGround: true }, + pin145: { requiresPower: true }, + pin146: { requiresGround: true }, + pin148: { requiresGround: true }, + pin150: { requiresGround: true }, + pin161: { requiresPower: true }, + pin162: { requiresPower: true }, + pin163: { requiresPower: true }, + pin164: { requiresPower: true }, + pin165: { requiresPower: true }, + pin166: { requiresPower: true }, + pin167: { requiresGround: true }, + pin168: { requiresPower: true }, + pin169: { requiresPower: true }, + pin170: { requiresPower: true }, + pin171: { requiresPower: true }, + pin172: { requiresPower: true }, + pin173: { requiresGround: true }, + pin175: { requiresGround: true }, + pin182: { requiresPower: true }, + pin183: { requiresGround: true }, + pin184: { requiresPower: true }, + pin185: { requiresPower: true }, + pin186: { requiresGround: true }, + pin187: { requiresPower: true }, + pin188: { requiresPower: true }, + pin189: { requiresPower: true }, + pin190: { requiresPower: true }, + pin191: { requiresPower: true }, + pin192: { requiresPower: true }, + pin193: { requiresGround: true }, + pin194: { requiresGround: true }, + pin196: { requiresGround: true }, + pin198: { requiresGround: true }, + pin199: { requiresGround: true }, + pin204: { doNotConnect: true }, + pin205: { requiresPower: true }, + pin206: { requiresPower: true }, + pin207: { requiresPower: true }, + pin208: { requiresPower: true }, + pin209: { requiresPower: true }, + pin210: { requiresPower: true }, + pin211: { requiresGround: true }, + pin212: { requiresPower: true }, + pin213: { requiresGround: true }, + pin214: { requiresPower: true }, + pin215: { requiresPower: true }, + pin224: { requiresGround: true }, + pin226: { requiresGround: true }, + pin227: { requiresPower: true }, + pin228: { requiresGround: true }, + pin229: { requiresPower: true }, + pin230: { requiresGround: true }, + pin231: { requiresPower: true }, + pin232: { requiresGround: true }, + pin233: { requiresPower: true }, + pin234: { requiresGround: true }, + pin235: { requiresPower: true }, + pin237: { doNotConnect: true }, + pin238: { doNotConnect: true }, + pin239: { requiresGround: true }, + pin241: { requiresGround: true }, + pin248: { requiresPower: true }, + pin249: { requiresGround: true }, + pin250: { requiresPower: true }, + pin251: { requiresGround: true }, + pin252: { requiresPower: true }, + pin253: { requiresGround: true }, + pin254: { requiresPower: true }, + pin255: { requiresGround: true }, + pin256: { requiresPower: true }, + pin257: { requiresGround: true }, + pin259: { requiresGround: true }, + pin262: { requiresGround: true }, + pin264: { requiresGround: true }, + pin265: { requiresGround: true }, + pin270: { requiresGround: true }, + pin271: { requiresPower: true }, + pin272: { requiresPower: true }, + pin273: { requiresPower: true }, + pin274: { requiresPower: true }, + pin275: { requiresPower: true }, + pin276: { requiresPower: true }, + pin277: { requiresPower: true }, + pin278: { requiresGround: true }, + pin279: { requiresPower: true }, + pin280: { requiresPower: true }, + pin281: { requiresPower: true }, + pin293: { requiresPower: true }, + pin294: { requiresGround: true }, + pin295: { requiresPower: true }, + pin296: { requiresPower: true }, + pin297: { requiresGround: true }, + pin298: { requiresPower: true }, + pin299: { requiresGround: true }, + pin300: { requiresPower: true }, + pin301: { requiresGround: true }, + pin302: { requiresPower: true }, + pin303: { requiresGround: true }, + pin305: { requiresGround: true }, + pin307: { requiresGround: true }, + pin315: { requiresPower: true }, + pin316: { requiresPower: true }, + pin317: { requiresPower: true }, + pin318: { requiresPower: true }, + pin319: { requiresPower: true }, + pin320: { requiresPower: true }, + pin321: { requiresPower: true }, + pin322: { requiresGround: true }, + pin323: { requiresPower: true }, + pin324: { requiresGround: true }, + pin325: { requiresPower: true }, + pin328: { requiresGround: true }, + pin330: { requiresGround: true }, + pin336: { requiresGround: true }, + pin337: { requiresPower: true }, + pin338: { requiresPower: true }, + pin339: { requiresPower: true }, + pin340: { requiresPower: true }, + pin341: { requiresPower: true }, + pin342: { requiresPower: true }, + pin343: { requiresGround: true }, + pin344: { requiresPower: true }, + pin345: { requiresGround: true }, + pin346: { requiresPower: true }, + pin347: { requiresGround: true }, + pin359: { requiresGround: true }, + pin360: { requiresPower: true }, + pin361: { requiresGround: true }, + pin364: { requiresGround: true }, + pin366: { requiresGround: true }, + pin368: { requiresGround: true }, + pin375: { requiresGround: true }, + pin381: { requiresPower: true }, + pin396: { requiresGround: true }, + pin422: { requiresGround: true }, + pin426: { requiresGround: true }, + pin429: { requiresGround: true }, + pin432: { requiresGround: true }, + pin436: { requiresGround: true }, + pin463: { requiresGround: true }, + pin484: { requiresGround: true }, +} as const; + +export const AM62A32AOMHIAMBR = (props: ChipProps) => { + // Footprint provenance: TI drawing AMB0484A; donor AM62A74AUMHAAMBR (JLCPCB C22452575) + return ( + + ); +}; + +export default AM62A32AOMHIAMBR; diff --git a/lib/chips/AM62A74AUMHAAMBR.circuit.tsx b/lib/chips/AM62A74AUMHAAMBR.circuit.tsx new file mode 100644 index 00000000..4119da85 --- /dev/null +++ b/lib/chips/AM62A74AUMHAAMBR.circuit.tsx @@ -0,0 +1,1149 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin23: ["VDDSHV_MCU", "A2", "VDDSHV_MCU_A2"], + pin45: ["DDR0_DQ7", "A3"], + pin67: ["VSS", "A4", "VSS_A4"], + pin89: ["DDR0_DQ0", "A5"], + pin111: ["VSS", "A6", "VSS_A6"], + pin133: ["CU_PORz", "A7"], + pin155: ["WKUP_LFOSC0_XI", "A8"], + pin177: ["WKUP_LFOSC0_XO", "A9"], + pin199: ["VSS", "A10", "VSS_A10"], + pin221: ["MCU_OSC0_XO", "A11"], + pin243: ["MCU_OSC0_XI", "A12"], + pin265: ["VSS", "A13", "VSS_A13"], + pin287: ["CK", "A14"], + pin309: ["MCU_SPI0_D0", "A15"], + pin331: ["DI", "A16"], + pin353: ["ADCONFIG111", "A17"], + pin375: ["VSS", "A18", "VSS_A18"], + pin397: ["MCASP0_ACLKX", "A19"], + pin419: ["MCASP0_AFSX", "A20"], + pin441: ["PADCONFIG108", "A21"], + pin463: ["VSS", "A22", "VSS_A22"], + pin21: ["VDDSHV_MCU", "AA1", "VDDSHV_MCU_AA1"], + pin43: ["VSS", "AA2", "VSS_AA2"], + pin65: ["DDR0_DQ29", "AA3"], + pin87: ["VSS", "AA4", "VSS_AA4"], + pin109: ["DDR0_DQ30", "AA5"], + pin131: ["MMC0_DAT0", "AA6"], + pin153: ["MMC0_DAT3", "AA7"], + pin175: ["VSS", "AA8", "VSS_AA8"], + pin197: ["USB0_DP", "AA9"], + pin219: ["USB0_DM", "AA10"], + pin241: ["VSS", "AA11", "VSS_AA11"], + pin263: ["CSI0_RXP2", "AA12"], + pin285: ["CSI0_RXN2", "AA13"], + pin307: ["VSS", "AA14", "VSS_AA14"], + pin329: ["RGMII1_RX_CTL", "AA15"], + pin351: ["RGMII1_RXC", "AA16"], + pin373: ["RGMII1_TD3", "AA17"], + pin395: ["ADCONFIG93", "AA18"], + pin417: ["ADCONFIG91", "AA19"], + pin439: ["ADCONFIG96", "AA20"], + pin461: ["ADCONFIG97", "AA21"], + pin483: ["VOUT0_PCLK", "AA22"], + pin22: ["VSS", "AB1", "VSS_AB1"], + pin44: ["VDDSHV_MCU", "AB2", "VDDSHV_MCU_AB2"], + pin66: ["VSS", "AB3", "VSS_AB3"], + pin88: ["DDR0_DQ31", "AB4"], + pin110: ["VSS", "AB5", "VSS_AB5"], + pin132: ["PADCONFIG132", "AB6"], + pin154: ["PADCONFIG134", "AB7"], + pin176: ["ADCONFIG126", "AB8"], + pin198: ["VSS", "AB9", "VSS_AB9"], + pin220: ["CSI0_RXP3", "AB10"], + pin242: ["CSI0_RXN3", "AB11"], + pin264: ["VSS", "AB12", "VSS_AB12"], + pin286: ["CSI0_RXCLKP", "AB13"], + pin308: ["CSI0_RXCLKN", "AB14"], + pin330: ["VSS", "AB15", "VSS_AB15"], + pin352: ["RGMII1_RD0", "AB16"], + pin374: ["RGMII1_TXC", "AB17"], + pin396: ["VSS", "AB18", "VSS_AB18"], + pin418: ["RGMII2_TXC", "AB19"], + pin440: ["ADCONFIG100", "AB20"], + pin462: ["ADCONFIG99", "AB21"], + pin484: ["VSS", "AB22", "VSS_AB22"], + pin2: ["VDDSHV_MCU", "B1", "VDDSHV_MCU_B1"], + pin24: ["DDR0_DQ6", "B2"], + pin46: ["VSS", "B3", "VSS_B3"], + pin68: ["DDR0_DQ1", "B4"], + pin90: ["VSS", "B5", "VSS_B5"], + pin112: ["DDR0_DQ2", "B6"], + pin134: ["VSS", "B7", "VSS_B7"], + pin156: ["CU_ERRORn", "B8"], + pin178: ["CU_PADCONFIG16", "B9"], + pin200: ["WKUP_CLKOUT0", "B10"], + pin222: ["MCU_PADCONFIG7", "B11"], + pin244: ["MCU_SPI0_D1", "B12"], + pin266: ["MCU_SPI0_CLK", "B13"], + pin288: ["MS", "B14"], + pin310: ["SPI0_D0", "B15"], + pin332: ["XT_REFCLK1", "B16"], + pin354: ["CAN0_TX", "B17"], + pin376: ["MCASP0_AXR1", "B18"], + pin398: ["CASP0_AXR2", "B19"], + pin420: ["MCASP0_AXR0", "B20"], + pin442: ["PADCONFIG107", "B21"], + pin464: ["ADCONFIG140", "B22"], + pin3: ["DDR0_DQS0_n", "C1"], + pin25: ["DDR0_DM0", "C2"], + pin47: ["DDR0_DQ5", "C3"], + pin69: ["VSS", "C4", "VSS_C4"], + pin91: ["DDR0_DQ4", "C5"], + pin113: ["RSVD0", "C6"], + pin135: ["CU_PADCONFIG13", "C7"], + pin157: ["CU_PADCONFIG12", "C8"], + pin179: ["WKUP_UART0_RXD", "C9"], + pin201: ["WKUP_UART0_CTSn", "C10"], + pin223: ["CU_PADCONFIG1", "C11"], + pin245: ["CU_RESETz", "C12"], + pin267: ["MU0", "C13"], + pin289: ["DO", "C14"], + pin311: ["ART0_RTSn", "C15"], + pin333: ["ADCONFIG110", "C16"], + pin355: ["ADCONFIG122", "C17"], + pin377: ["CAN0_RX", "C18"], + pin399: ["CASP0_AXR3", "C19"], + pin421: ["USB0_DRVVBUS", "C20"], + pin443: ["PADCONFIG143", "C21"], + pin465: ["MC1_DAT2", "C22"], + pin4: ["DDR0_DQS0", "D1"], + pin26: ["VSS", "D2", "VSS_D2"], + pin48: ["DDR0_DQ15", "D3"], + pin70: ["VSS", "D4", "VSS_D4"], + pin92: ["DDR0_DQ3", "D5"], + pin114: ["RSVD1", "D6"], + pin136: ["CU_MCAN1_TX", "D7"], + pin158: ["MCU_UART0_RXD", "D8"], + pin180: ["MCU_I2C0_SDA", "D9"], + pin202: ["MCU_PADCONFIG8", "D10"], + pin224: ["VSS", "D11", "VSS_D11"], + pin246: ["PMIC_LPM_EN0", "D12"], + pin268: ["WKUP_I2C0_SCL", "D13"], + pin290: ["MCU_RESETSTATz", "D14"], + pin312: ["UART0_TXD", "D15"], + pin334: ["SPI0_CS0", "D16"], + pin356: ["2C0_SCL", "D17"], + pin378: ["MMC1_SDWP", "D18"], + pin400: ["USB1_DRVVBUS", "D19"], + pin422: ["VSS", "D20", "VSS_D20"], + pin444: ["ADCONFIG139", "D21"], + pin466: ["MC1_DAT3", "D22"], + pin5: ["VSS", "E1", "VSS_E1"], + pin27: ["DDR0_DQ8", "E2"], + pin49: ["VSS", "E3", "VSS_E3"], + pin71: ["DDR0_DQ14", "E4"], + pin93: ["VSS", "E5", "VSS_E5"], + pin115: ["DDR0_DQ10", "E6"], + pin137: ["RSVD2", "E7"], + pin159: ["CU_PADCONFIG14", "E8"], + pin181: ["WKUP_UART0_TXD", "E9"], + pin203: ["MU1", "E10"], + pin225: ["MCU_SPI0_CS0", "E11"], + pin247: ["MCU_I2C0_SCL", "E12"], + pin269: ["WKUP_I2C0_SDA", "E13"], + pin291: ["UART0_RXD", "E14"], + pin313: ["ADCONFIG113", "E15"], + pin335: ["ADCONFIG121", "E16"], + pin357: ["ADCONFIG123", "E17"], + pin379: ["MMC1_SDCD", "E18"], + pin401: ["ESET_REQz", "E19"], + pin423: ["MMC2_DAT0", "E20"], + pin445: ["PADCONFIG74", "E21"], + pin467: ["MMC1_CLK", "E22"], + pin6: ["DDR0_DQS1_n", "F1"], + pin28: ["VSS", "F2", "VSS_F2"], + pin50: ["DDR0_DM1", "F3"], + pin72: ["VSS", "F4", "VSS_F4"], + pin94: ["DDR0_DQ9", "F5"], + pin116: ["RSVD3", "F6"], + pin138: ["VPP", "F7"], + pin160: ["MCU_UART0_TXD", "F8"], + pin182: ["VMON_3P3_SOC", "F9"], + pin204: ["RSVD4", "F10"], + pin226: ["VSS", "F11", "VSS_F11"], + pin248: ["VMON_1P8_SOC", "F12"], + pin270: ["VSS", "F13", "VSS_F13"], + pin292: ["ART0_CTSn", "F14"], + pin314: ["RSTn", "F15"], + pin336: ["VSS", "F16", "VSS_F16"], + pin358: ["EXTINTn", "F17"], + pin380: ["ORz_OUT", "F18"], + pin402: ["ESETSTATz", "F19"], + pin424: ["MMC2_DAT2", "F20"], + pin446: ["MMC2_DAT1", "F21"], + pin468: ["PADCONFIG73", "F22"], + pin7: ["DDR0_DQS1", "G1"], + pin29: ["DDR0_DQ11", "G2"], + pin51: ["VSS", "G3", "VSS_G3"], + pin73: ["DDR0_DQ13", "G4"], + pin95: ["VSS", "G5", "VSS_G5"], + pin117: ["DDR0_DQ12", "G6"], + pin139: ["RSVD5", "G7"], + pin161: ["CAP_VDDS_CANUART", "G8"], + pin183: ["VSS", "G9", "VSS_G9"], + pin205: ["CAP_VDDS_MCU", "G10"], + pin227: ["VDDSHV_MCU", "G11", "VDDSHV_MCU_G11"], + pin249: ["VSS", "G12", "VSS_G12"], + pin271: ["CAP_VDDS0", "G13"], + pin293: ["VDDSHV0", "G14", "VDDSHV0_G14"], + pin315: ["CAP_VDDS5", "G15"], + pin337: ["VDDSHV5", "G16", "VDDSHV5_G16"], + pin359: ["VSS", "G17", "VSS_G17"], + pin381: ["VDDA_TEMP1", "G18"], + pin403: ["OSPI0_CSn1", "G19"], + pin425: ["OSPI0_CSn3", "G20"], + pin447: ["ADCONFIG66", "G21"], + pin469: ["MMC2_CMD", "G22"], + pin8: ["VSS", "H1", "VSS_H1"], + pin30: ["DDR0_A7", "H2"], + pin52: ["DDR0_BA1", "H3"], + pin74: ["VSS", "H4", "VSS_H4"], + pin96: ["DDR0_ODT0", "H5"], + pin118: ["DDR0_CAL0", "H6"], + pin140: ["DDR0_ALERT_n", "H7"], + pin162: ["VDDSHV_CANUART", "H8"], + pin184: ["VDD_CANUART", "H9", "VDD_CANUART_H9"], + pin206: ["VDDSHV_MCU", "H10", "VDDSHV_MCU_H10"], + pin228: ["VSS", "H11", "VSS_H11"], + pin250: ["VMON_VSYS", "H12"], + pin272: ["VDDSHV0", "H13", "VDDSHV0_H13"], + pin294: ["VSS", "H14", "VSS_H14"], + pin316: ["VDDSHV5", "H15", "VDDSHV5_H15"], + pin338: ["VDDSHV6", "H16", "VDDSHV6_H16"], + pin360: ["VDDSHV6", "H17", "VDDSHV6_H17"], + pin382: ["OSPI0_D3", "H18"], + pin404: ["OSPI0_D5", "H19"], + pin426: ["VSS", "H20", "VSS_H20"], + pin448: ["OSPI0_CSn0", "H21"], + pin470: ["MMC2_CLK", "H22"], + pin9: ["DDR0_A4", "J1"], + pin31: ["DDR0_A1", "J2"], + pin53: ["VSS", "J3", "VSS_J3"], + pin75: ["DDR0_A2", "J4"], + pin97: ["DDR0_A0", "J5"], + pin119: ["DDR0_CS0_n", "J6"], + pin141: ["VDDS_DDR", "J7", "VDDS_DDR_J7"], + pin163: ["VDDS_OSC0", "J8"], + pin185: ["VDD_CANUART", "J9", "VDD_CANUART_J9"], + pin207: ["VDDA_MCU", "J10"], + pin229: ["VDD_CANUART", "J11", "VDD_CANUART_J11"], + pin251: ["VSS", "J12", "VSS_J12"], + pin273: ["VDD_CANUART", "J13", "VDD_CANUART_J13"], + pin295: ["VDDR_CORE", "J14", "VDDR_CORE_J14"], + pin317: ["VDD_CANUART", "J15", "VDD_CANUART_J15"], + pin339: ["CAP_VDDS6", "J16"], + pin361: ["VSS", "J17", "VSS_J17"], + pin383: ["OSPI0_D1", "J18"], + pin405: ["OSPI0_D2", "J19"], + pin427: ["SPI0_D6", "J20"], + pin449: ["OSPI0_D0", "J21"], + pin471: ["SPI0_D7", "J22"], + pin10: ["VSS", "K1", "VSS_K1"], + pin32: ["DDR0_A10", "K2"], + pin54: ["DDR0_A6", "K3"], + pin76: ["VSS", "K4", "VSS_K4"], + pin98: ["DDR0_A5", "K5"], + pin120: ["DDR0_BA0", "K6"], + pin142: ["VSS", "K7", "VSS_K7"], + pin164: ["VDDS_DDR", "K8", "VDDS_DDR_K8"], + pin186: ["VSS", "K9", "VSS_K9"], + pin208: ["VDDA_PLL4", "K10"], + pin230: ["VSS", "K11", "VSS_K11"], + pin252: ["VDDR_CORE", "K12", "VDDR_CORE_K12"], + pin274: ["VDDA_PLL3", "K13"], + pin296: ["VDD_CANUART", "K14", "VDD_CANUART_K14"], + pin318: ["VDDSHV1", "K15", "VDDSHV1_K15"], + pin340: ["CAP_VDDS1", "K16"], + pin362: ["ADCONFIG40", "K17"], + pin384: ["PMC0_DIR", "K18"], + pin406: ["ADCONFIG35", "K19"], + pin428: ["OSPI0_CSn2", "K20"], + pin450: ["OSPI0_D4", "K21"], + pin472: ["OSPI0_LBCLKO", "K22"], + pin11: ["DDR0_CK0_n", "L1"], + pin33: ["DDR0_A9", "L2"], + pin55: ["VSS", "L3", "VSS_L3"], + pin77: ["DDR0_A3", "L4"], + pin99: ["DDR0_A11", "L5"], + pin121: ["DDR0_A8", "L6"], + pin143: ["VDDS_DDR", "L7", "VDDS_DDR_L7"], + pin165: ["VDDS_DDR_C", "L8"], + pin187: ["VDD_CANUART", "L9", "VDD_CANUART_L9"], + pin209: ["VDDA_TEMP2", "L10"], + pin231: ["VDD_CANUART", "L11", "VDD_CANUART_L11"], + pin253: ["VSS", "L12", "VSS_L12"], + pin275: ["VDD_CANUART", "L13", "VDD_CANUART_L13"], + pin297: ["VSS", "L14", "VSS_L14"], + pin319: ["VDDSHV3", "L15", "VDDSHV3_L15"], + pin341: ["VDDSHV1", "L16", "VDDSHV1_L16"], + pin363: ["ADCONFIG34", "L17"], + pin385: ["ADCONFIG33", "L18"], + pin407: ["GPMC0_BE0n_CLE", "L19"], + pin429: ["VSS", "L20", "VSS_L20"], + pin451: ["OSPI0_DQS", "L21"], + pin473: ["OSPI0_CLK", "L22"], + pin12: ["DDR0_CK0", "M1"], + pin34: ["DDR0_A13", "M2"], + pin56: ["DDR0_A12", "M3"], + pin78: ["VSS", "M4", "VSS_M4"], + pin100: ["DDR0_CAS_n", "M5"], + pin122: ["DDR0_RAS_n", "M6"], + pin144: ["VSS", "M7", "VSS_M7"], + pin166: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin188: ["VDDA_DDR_PLL0", "M9"], + pin210: ["VDDR_CORE", "M10", "VDDR_CORE_M10"], + pin232: ["VSS", "M11", "VSS_M11"], + pin254: ["VDD_CORE", "M12", "VDD_CORE_M12"], + pin276: ["VDDA_PLL2", "M13"], + pin298: ["VDDR_CORE", "M14", "VDDR_CORE_M14"], + pin320: ["VDDSHV3", "M15", "VDDSHV3_M15"], + pin342: ["CAP_VDDS3", "M16"], + pin364: ["VSS", "M17", "VSS_M17"], + pin386: ["ADCONFIG37", "M18"], + pin408: ["ADCONFIG42", "M19"], + pin430: ["ADCONFIG45", "M20"], + pin452: ["ADCONFIG43", "M21"], + pin474: ["PMC0_CSn2", "M22"], + pin13: ["VSS", "N1", "VSS_N1"], + pin35: ["DDR0_PAR", "N2"], + pin57: ["DDR0_ODT1", "N3"], + pin79: ["DDR0_CS1_n", "N4"], + pin101: ["DDR0_ACT_n", "N5"], + pin123: ["DDR0_WE_n", "N6"], + pin145: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin167: ["VSS", "N8", "VSS_N8"], + pin189: ["VDDA_PLL0", "N9"], + pin211: ["VSS", "N10", "VSS_N10"], + pin233: ["VDD_CORE", "N11", "VDD_CORE_N11"], + pin255: ["VSS", "N12", "VSS_N12"], + pin277: ["VDD_CORE", "N13", "VDD_CORE_N13"], + pin299: ["VSS", "N14", "VSS_N14"], + pin321: ["VDDSHV3", "N15", "VDDSHV3_N15"], + pin343: ["VSS", "N16", "VSS_N16"], + pin365: ["PMC0_AD4", "N17"], + pin387: ["PMC0_AD3", "N18"], + pin409: ["PMC0_AD2", "N19"], + pin431: ["PMC0_AD1", "N20"], + pin453: ["PMC0_AD0", "N21"], + pin475: ["PMC0_CLK", "N22"], + pin14: ["DDR0_DQS2_n", "P1"], + pin36: ["DDR0_DQ20", "P2"], + pin58: ["DDR0_CKE0", "P3"], + pin80: ["DDR0_BG0", "P4"], + pin102: ["DDR0_CKE1", "P5"], + pin124: ["DDR0_RESET0_n", "P6"], + pin146: ["VSS", "P7", "VSS_P7"], + pin168: ["VDDS_DDR", "P8", "VDDS_DDR_P8"], + pin190: ["VDDR_CORE", "P9", "VDDR_CORE_P9"], + pin212: ["VDD_CORE", "P10", "VDD_CORE_P10"], + pin234: ["VSS", "P11", "VSS_P11"], + pin256: ["VDDR_CORE", "P12", "VDDR_CORE_P12"], + pin278: ["VSS", "P13", "VSS_P13"], + pin300: ["VDD_CORE", "P14", "VDD_CORE_P14"], + pin322: ["VSS", "P15", "VSS_P15"], + pin344: ["VDDA_TEMP0", "P16"], + pin366: ["VSS", "P17", "VSS_P17"], + pin388: ["PMC0_AD5", "P18"], + pin410: ["PMC0_AD6", "P19"], + pin432: ["VSS", "P20", "VSS_P20"], + pin454: ["PMC0_AD7", "P21"], + pin476: ["ADCONFIG23", "P22"], + pin15: ["DDR0_DQS2", "R1"], + pin37: ["VSS", "R2", "VSS_R2"], + pin59: ["DDR0_DQ21", "R3"], + pin81: ["VSS", "R4", "VSS_R4"], + pin103: ["DDR0_DQ19", "R5"], + pin125: ["VSS", "R6", "VSS_R6"], + pin147: ["DDR0_BG1", "R7"], + pin169: ["CAP_VDDS4", "R8"], + pin191: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin213: ["VSS", "R10", "VSS_R10"], + pin235: ["VDDA_PLL1", "R11"], + pin257: ["VSS", "R12", "VSS_R12"], + pin279: ["VDDSHV2", "R13", "VDDSHV2_R13"], + pin301: ["VSS", "R14", "VSS_R14"], + pin323: ["VDD_CORE", "R15", "VDD_CORE_R15"], + pin345: ["VSS", "R16", "VSS_R16"], + pin367: ["ADCONFIG39", "R17"], + pin389: ["GPMC0_WAIT0", "R18"], + pin411: ["ADCONFIG24", "R19"], + pin433: ["PMC0_AD10", "R20"], + pin455: ["PMC0_AD13", "R21"], + pin477: ["PMC0_AD11", "R22"], + pin16: ["VSS", "T1", "VSS_T1"], + pin38: ["DDR0_DQ22", "T2"], + pin60: ["VSS", "T3", "VSS_T3"], + pin82: ["DDR0_DQ17", "T4"], + pin104: ["VSS", "T5", "VSS_T5"], + pin126: ["DDR0_DQ16", "T6"], + pin148: ["VSS", "T7", "VSS_T7"], + pin170: ["VDDSHV4", "T8", "VDDSHV4_T8"], + pin192: ["VDDA_CORE_USB", "T9"], + pin214: ["VDDA_1P8_USB", "T10"], + pin236: ["VDDA_CORE_CSIRX0", "T11"], + pin258: ["VDDA_1P8_CSIRX0", "T12"], + pin280: ["VDDSHV2", "T13", "VDDSHV2_T13"], + pin302: ["CAP_VDDS2", "T14"], + pin324: ["VSS", "T15", "VSS_T15"], + pin346: ["VDD_CORE", "T16", "VDD_CORE_T16"], + pin368: ["VSS", "T17", "VSS_T17"], + pin390: ["PADCONFIG62", "T18"], + pin412: ["PADCONFIG50", "T19"], + pin434: ["ADCONFIG29", "T20"], + pin456: ["ADCONFIG30", "T21"], + pin478: ["PMC0_AD12", "T22"], + pin17: ["DDR0_DM2", "U1"], + pin39: ["VSS", "U2", "VSS_U2"], + pin61: ["DDR0_DQ23", "U3"], + pin83: ["VSS", "U4", "VSS_U4"], + pin105: ["DDR0_DQ18", "U5"], + pin127: ["VSS", "U6", "VSS_U6"], + pin149: ["USB1_RCALIB", "U7"], + pin171: ["VDDSHV4", "U8", "VDDSHV4_U8"], + pin193: ["VSS", "U9", "VSS_U9"], + pin215: ["VDDA_3P3_USB", "U10"], + pin237: ["RSVD6", "U11"], + pin259: ["VSS", "U12", "VSS_U12"], + pin281: ["VDDSHV2", "U13", "VDDSHV2_U13"], + pin303: ["VSS", "U14", "VSS_U14"], + pin325: ["VDD_CORE", "U15", "VDD_CORE_U15"], + pin347: ["VSS", "U16", "VSS_U16"], + pin369: ["PADCONFIG63", "U17"], + pin391: ["PADCONFIG51", "U18"], + pin413: ["VOUT0_DATA3", "U19"], + pin435: ["PADCONFIG48", "U20"], + pin457: ["PADCONFIG47", "U21"], + pin479: ["PADCONFIG46", "U22"], + pin18: ["VSS", "V1", "VSS_V1"], + pin40: ["DDR0_DQ25", "V2"], + pin62: ["VSS", "V3", "VSS_V3"], + pin84: ["DDR0_DQ26", "V4"], + pin106: ["VSS", "V5", "VSS_V5"], + pin128: ["USB1_VBUS", "V6"], + pin150: ["VSS", "V7", "VSS_V7"], + pin172: ["USB0_VBUS", "V8"], + pin194: ["VSS", "V9", "VSS_V9"], + pin216: ["CSI0_RXRCALIB", "V10"], + pin238: ["RSVD7", "V11"], + pin260: ["MDIO0_MDC", "V12"], + pin282: ["MDIO0_MDIO", "V13"], + pin304: ["RGMII1_RD3", "V14"], + pin326: ["RGMII1_RD1", "V15"], + pin348: ["RGMII1_TD1", "V16"], + pin370: ["PADCONFIG64", "V17"], + pin392: ["PADCONFIG55", "V18"], + pin414: ["PADCONFIG54", "V19"], + pin436: ["VSS", "V20", "VSS_V20"], + pin458: ["VOUT0_DATA7", "V21"], + pin480: ["PADCONFIG52", "V22"], + pin19: ["DDR0_DQS3", "W1"], + pin41: ["VSS", "W2", "VSS_W2"], + pin63: ["DDR0_DM3", "W3"], + pin85: ["VSS", "W4", "VSS_W4"], + pin107: ["DDR0_DQ27", "W5"], + pin129: ["VSS", "W6", "VSS_W6"], + pin151: ["MC0_DAT5", "W7"], + pin173: ["VSS", "W8", "VSS_W8"], + pin195: ["MC0_DAT6", "W9"], + pin217: ["USB0_RCALIB", "W10"], + pin239: ["VSS", "W11", "VSS_W11"], + pin261: ["CSI0_RXN0", "W12"], + pin283: ["CSI0_RXP0", "W13"], + pin305: ["VSS", "W14", "VSS_W14"], + pin327: ["RGMII1_RD2", "W15"], + pin349: ["RGMII1_TX_CTL", "W16"], + pin371: ["GMII2_TD3", "W17"], + pin393: ["ADCONFIG95", "W18"], + pin415: ["PADCONFIG59", "W19"], + pin437: ["VOUT0_DATA12", "W20"], + pin459: ["PADCONFIG57", "W21"], + pin481: ["PADCONFIG56", "W22"], + pin20: ["DDR0_DQS3_n", "Y1"], + pin42: ["DDR0_DQ24", "Y2"], + pin64: ["VSS", "Y3", "VSS_Y3"], + pin86: ["DDR0_DQ28", "Y4"], + pin108: ["VSS", "Y5", "VSS_Y5"], + pin130: ["PADCONFIG136", "Y6"], + pin152: ["PADCONFIG131", "Y7"], + pin174: ["MMC0_DAT4", "Y8"], + pin196: ["VSS", "Y9", "VSS_Y9"], + pin218: ["USB1_DP", "Y10"], + pin240: ["USB1_DM", "Y11"], + pin262: ["VSS", "Y12", "VSS_Y12"], + pin284: ["CSI0_RXN1", "Y13"], + pin306: ["CSI0_RXP1", "Y14"], + pin328: ["VSS", "Y15", "VSS_Y15"], + pin350: ["RGMII1_TD2", "Y16"], + pin372: ["RGMII1_TD0", "Y17"], + pin394: ["GMII2_TD1", "Y18"], + pin416: ["ADCONFIG89", "Y19"], + pin438: ["GMII2_RD1", "Y20"], + pin460: ["PADCONFIG60", "Y21"], + pin482: ["PADCONFIG61", "Y22"], +} as const; + +const pinRoles = { + pin1: "ground", + pin67: "ground", + pin111: "ground", + pin199: "ground", + pin265: "ground", + pin375: "ground", + pin463: "ground", + pin43: "ground", + pin87: "ground", + pin175: "ground", + pin241: "ground", + pin307: "ground", + pin483: "power", + pin22: "ground", + pin66: "ground", + pin110: "ground", + pin198: "ground", + pin264: "ground", + pin330: "ground", + pin396: "ground", + pin484: "ground", + pin46: "ground", + pin90: "ground", + pin134: "ground", + pin69: "ground", + pin26: "ground", + pin70: "ground", + pin224: "ground", + pin422: "ground", + pin5: "ground", + pin49: "ground", + pin93: "ground", + pin28: "ground", + pin72: "ground", + pin138: "power", + pin226: "ground", + pin270: "ground", + pin336: "ground", + pin51: "ground", + pin95: "ground", + pin183: "ground", + pin249: "ground", + pin359: "ground", + pin381: "power", + pin8: "ground", + pin74: "ground", + pin184: "power", + pin228: "ground", + pin294: "ground", + pin426: "ground", + pin53: "ground", + pin141: "power", + pin163: "power", + pin185: "power", + pin207: "power", + pin229: "power", + pin251: "ground", + pin273: "power", + pin317: "power", + pin361: "ground", + pin10: "ground", + pin76: "ground", + pin142: "ground", + pin164: "power", + pin186: "ground", + pin208: "power", + pin230: "ground", + pin274: "power", + pin296: "power", + pin55: "ground", + pin143: "power", + pin165: "power", + pin187: "power", + pin209: "power", + pin231: "power", + pin253: "ground", + pin275: "power", + pin297: "ground", + pin429: "ground", + pin78: "ground", + pin144: "ground", + pin166: "power", + pin188: "power", + pin232: "ground", + pin254: "power", + pin276: "power", + pin364: "ground", + pin13: "ground", + pin145: "power", + pin167: "ground", + pin189: "power", + pin211: "ground", + pin233: "power", + pin255: "ground", + pin277: "power", + pin299: "ground", + pin343: "ground", + pin146: "ground", + pin168: "power", + pin212: "power", + pin234: "ground", + pin278: "ground", + pin300: "power", + pin322: "ground", + pin344: "power", + pin366: "ground", + pin432: "ground", + pin37: "ground", + pin81: "ground", + pin125: "ground", + pin191: "power", + pin213: "ground", + pin235: "power", + pin257: "ground", + pin301: "ground", + pin323: "power", + pin345: "ground", + pin16: "ground", + pin60: "ground", + pin104: "ground", + pin148: "ground", + pin192: "power", + pin214: "power", + pin236: "power", + pin258: "power", + pin324: "ground", + pin346: "power", + pin368: "ground", + pin39: "ground", + pin83: "ground", + pin127: "ground", + pin193: "ground", + pin215: "power", + pin259: "ground", + pin303: "ground", + pin325: "power", + pin347: "ground", + pin413: "power", + pin18: "ground", + pin62: "ground", + pin106: "ground", + pin150: "ground", + pin194: "ground", + pin436: "ground", + pin458: "power", + pin41: "ground", + pin85: "ground", + pin129: "ground", + pin173: "ground", + pin239: "ground", + pin305: "ground", + pin437: "power", + pin64: "ground", + pin108: "ground", + pin196: "ground", + pin262: "ground", + pin328: "ground", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin67: { + requiresGround: true, + }, + pin111: { + requiresGround: true, + }, + pin199: { + requiresGround: true, + }, + pin265: { + requiresGround: true, + }, + pin375: { + requiresGround: true, + }, + pin463: { + requiresGround: true, + }, + pin43: { + requiresGround: true, + }, + pin87: { + requiresGround: true, + }, + pin175: { + requiresGround: true, + }, + pin241: { + requiresGround: true, + }, + pin307: { + requiresGround: true, + }, + pin483: { + requiresPower: true, + }, + pin22: { + requiresGround: true, + }, + pin66: { + requiresGround: true, + }, + pin110: { + requiresGround: true, + }, + pin198: { + requiresGround: true, + }, + pin264: { + requiresGround: true, + }, + pin330: { + requiresGround: true, + }, + pin396: { + requiresGround: true, + }, + pin484: { + requiresGround: true, + }, + pin46: { + requiresGround: true, + }, + pin90: { + requiresGround: true, + }, + pin134: { + requiresGround: true, + }, + pin69: { + requiresGround: true, + }, + pin26: { + requiresGround: true, + }, + pin70: { + requiresGround: true, + }, + pin224: { + requiresGround: true, + }, + pin422: { + requiresGround: true, + }, + pin5: { + requiresGround: true, + }, + pin49: { + requiresGround: true, + }, + pin93: { + requiresGround: true, + }, + pin28: { + requiresGround: true, + }, + pin72: { + requiresGround: true, + }, + pin138: { + requiresPower: true, + }, + pin226: { + requiresGround: true, + }, + pin270: { + requiresGround: true, + }, + pin336: { + requiresGround: true, + }, + pin51: { + requiresGround: true, + }, + pin95: { + requiresGround: true, + }, + pin183: { + requiresGround: true, + }, + pin249: { + requiresGround: true, + }, + pin359: { + requiresGround: true, + }, + pin381: { + requiresPower: true, + }, + pin8: { + requiresGround: true, + }, + pin74: { + requiresGround: true, + }, + pin184: { + requiresPower: true, + }, + pin228: { + requiresGround: true, + }, + pin294: { + requiresGround: true, + }, + pin426: { + requiresGround: true, + }, + pin53: { + requiresGround: true, + }, + pin141: { + requiresPower: true, + }, + pin163: { + requiresPower: true, + }, + pin185: { + requiresPower: true, + }, + pin207: { + requiresPower: true, + }, + pin229: { + requiresPower: true, + }, + pin251: { + requiresGround: true, + }, + pin273: { + requiresPower: true, + }, + pin317: { + requiresPower: true, + }, + pin361: { + requiresGround: true, + }, + pin10: { + requiresGround: true, + }, + pin76: { + requiresGround: true, + }, + pin142: { + requiresGround: true, + }, + pin164: { + requiresPower: true, + }, + pin186: { + requiresGround: true, + }, + pin208: { + requiresPower: true, + }, + pin230: { + requiresGround: true, + }, + pin274: { + requiresPower: true, + }, + pin296: { + requiresPower: true, + }, + pin55: { + requiresGround: true, + }, + pin143: { + requiresPower: true, + }, + pin165: { + requiresPower: true, + }, + pin187: { + requiresPower: true, + }, + pin209: { + requiresPower: true, + }, + pin231: { + requiresPower: true, + }, + pin253: { + requiresGround: true, + }, + pin275: { + requiresPower: true, + }, + pin297: { + requiresGround: true, + }, + pin429: { + requiresGround: true, + }, + pin78: { + requiresGround: true, + }, + pin144: { + requiresGround: true, + }, + pin166: { + requiresPower: true, + }, + pin188: { + requiresPower: true, + }, + pin232: { + requiresGround: true, + }, + pin254: { + requiresPower: true, + }, + pin276: { + requiresPower: true, + }, + pin364: { + requiresGround: true, + }, + pin13: { + requiresGround: true, + }, + pin145: { + requiresPower: true, + }, + pin167: { + requiresGround: true, + }, + pin189: { + requiresPower: true, + }, + pin211: { + requiresGround: true, + }, + pin233: { + requiresPower: true, + }, + pin255: { + requiresGround: true, + }, + pin277: { + requiresPower: true, + }, + pin299: { + requiresGround: true, + }, + pin343: { + requiresGround: true, + }, + pin146: { + requiresGround: true, + }, + pin168: { + requiresPower: true, + }, + pin212: { + requiresPower: true, + }, + pin234: { + requiresGround: true, + }, + pin278: { + requiresGround: true, + }, + pin300: { + requiresPower: true, + }, + pin322: { + requiresGround: true, + }, + pin344: { + requiresPower: true, + }, + pin366: { + requiresGround: true, + }, + pin432: { + requiresGround: true, + }, + pin37: { + requiresGround: true, + }, + pin81: { + requiresGround: true, + }, + pin125: { + requiresGround: true, + }, + pin191: { + requiresPower: true, + }, + pin213: { + requiresGround: true, + }, + pin235: { + requiresPower: true, + }, + pin257: { + requiresGround: true, + }, + pin301: { + requiresGround: true, + }, + pin323: { + requiresPower: true, + }, + pin345: { + requiresGround: true, + }, + pin16: { + requiresGround: true, + }, + pin60: { + requiresGround: true, + }, + pin104: { + requiresGround: true, + }, + pin148: { + requiresGround: true, + }, + pin192: { + requiresPower: true, + }, + pin214: { + requiresPower: true, + }, + pin236: { + requiresPower: true, + }, + pin258: { + requiresPower: true, + }, + pin324: { + requiresGround: true, + }, + pin346: { + requiresPower: true, + }, + pin368: { + requiresGround: true, + }, + pin39: { + requiresGround: true, + }, + pin83: { + requiresGround: true, + }, + pin127: { + requiresGround: true, + }, + pin193: { + requiresGround: true, + }, + pin215: { + requiresPower: true, + }, + pin259: { + requiresGround: true, + }, + pin303: { + requiresGround: true, + }, + pin325: { + requiresPower: true, + }, + pin347: { + requiresGround: true, + }, + pin413: { + requiresPower: true, + }, + pin18: { + requiresGround: true, + }, + pin62: { + requiresGround: true, + }, + pin106: { + requiresGround: true, + }, + pin150: { + requiresGround: true, + }, + pin194: { + requiresGround: true, + }, + pin436: { + requiresGround: true, + }, + pin458: { + requiresPower: true, + }, + pin41: { + requiresGround: true, + }, + pin85: { + requiresGround: true, + }, + pin129: { + requiresGround: true, + }, + pin173: { + requiresGround: true, + }, + pin239: { + requiresGround: true, + }, + pin305: { + requiresGround: true, + }, + pin437: { + requiresPower: true, + }, + pin64: { + requiresGround: true, + }, + pin108: { + requiresGround: true, + }, + pin196: { + requiresGround: true, + }, + pin262: { + requiresGround: true, + }, + pin328: { + requiresGround: true, + }, +} as const; + +export const AM62A74AUMHAAMBR = (props: ChipProps) => { + return ( + + ); +}; + +export default AM62A74AUMHAAMBR; diff --git a/lib/chips/AM62L32BEGHAANBR.circuit.tsx b/lib/chips/AM62L32BEGHAANBR.circuit.tsx new file mode 100644 index 00000000..a960496b --- /dev/null +++ b/lib/chips/AM62L32BEGHAANBR.circuit.tsx @@ -0,0 +1,3605 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin24: ["VSS", "A2", "VSS_A2"], + pin47: ["MC0_DAT6", "A3"], + pin60: ["VSS", "A4", "VSS_A4"], + pin76: ["USB1_DRVVBUS", "A5"], + pin87: ["ADCONFIG118", "A6"], + pin103: ["ADCONFIG116", "A7"], + pin116: ["CASP0_AXR3", "A8"], + pin137: ["ADCONFIG98", "A9"], + pin151: ["VSS", "A10", "VSS_A10"], + pin164: ["MCASP0_ACLKX", "A11"], + pin180: ["MCASP0_ACLKR", "A12"], + pin195: ["VSS", "A13", "VSS_A13"], + pin211: ["DSI0_TXCLKP", "A14"], + pin224: ["DSI0_TXCLKN", "A15"], + pin238: ["VSS", "A16", "VSS_A16"], + pin259: ["DSI0_TXP1", "A17"], + pin272: ["DSI0_TXN1", "A18"], + pin288: ["VSS", "A19", "VSS_A19"], + pin299: ["DSI0_TXN2", "A20"], + pin315: ["DSI0_TXP2", "A21"], + pin328: ["VSS", "A22", "VSS_A22"], + pin351: ["VSS", "A23", "VSS_A23"], + pin21: ["MMC1_DAT0", "AA1"], + pin44: ["PADCONFIG135", "AA2"], + pin73: ["VSS", "AA4", "VSS_AA4"], + pin100: ["RGMII1_RD1", "AA6"], + pin134: ["ADCONFIG80", "AA8"], + pin177: ["RGMII1_TD3", "AA11"], + pin192: ["ADCONFIG88", "AA12"], + pin208: ["ADCONFIG89", "AA13"], + pin256: ["EMU1", "AA16"], + pin285: ["PMIC_LPM_EN0", "AA18"], + pin312: ["VSS", "AA20", "VSS_AA20"], + pin348: ["WKUP_I2C0_SDA", "AA22"], + pin371: ["WKUP_UART0_TXD", "AA23"], + pin22: ["VSS", "AB1", "VSS_AB1"], + pin45: ["ADCONFIG134", "AB2"], + pin58: ["USB0_RCALIB", "AB3"], + pin74: ["USB0_DP", "AB4"], + pin85: ["USB1_DP", "AB5"], + pin101: ["USB1_VBUS", "AB6"], + pin114: ["VSS", "AB7", "VSS_AB7"], + pin135: ["ADCONFIG95", "AB8"], + pin149: ["ADCONFIG92", "AB9"], + pin162: ["ADCONFIG94", "AB10"], + pin178: ["RGMII1_TX_CTL", "AB11"], + pin193: ["ADCONFIG84", "AB12"], + pin209: ["GMII2_TD1", "AB13"], + pin222: ["CK", "AB14"], + pin236: ["DO", "AB15"], + pin257: ["RSTn", "AB16"], + pin270: ["RSVD0", "AB17"], + pin286: ["ORz", "AB18"], + pin297: ["EXT_WAKEUP0", "AB19"], + pin313: ["EXT_WAKEUP1", "AB20"], + pin326: ["VSS", "AB21", "VSS_AB21"], + pin349: ["WKUP_I2C0_SCL", "AB22"], + pin372: ["E8", "AB23", "E8_AB23"], + pin23: ["E8", "AC1", "E8_AC1"], + pin46: ["VSS", "AC2", "VSS_AC2"], + pin59: ["USB0_VBUS", "AC3"], + pin75: ["USB0_DM", "AC4"], + pin86: ["USB1_DM", "AC5"], + pin102: ["USB1_RCALIB", "AC6"], + pin115: ["ADCONFIG91", "AC7"], + pin136: ["ADCONFIG90", "AC8"], + pin150: ["GMII2_RD1", "AC9"], + pin163: ["RGMII1_TD0", "AC10"], + pin179: ["VSS", "AC11", "VSS_AC11"], + pin194: ["ADCONFIG86", "AC12"], + pin210: ["MDIO0_MDIO", "AC13"], + pin223: ["VSS", "AC14", "VSS_AC14"], + pin237: ["MDIO0_MDC", "AC15"], + pin258: ["DI", "AC16"], + pin271: ["WKUP_OSC0_XO", "AC17"], + pin287: ["WKUP_OSC0_XI", "AC18"], + pin298: ["VSS", "AC19", "VSS_AC19"], + pin314: ["LFOSC0_XO", "AC20"], + pin327: ["LFOSC0_XI", "AC21"], + pin350: ["VSS", "AC22", "VSS_AC22"], + pin373: ["VSS", "AC23", "VSS_AC23"], + pin2: ["VSS", "B1", "VSS_B1"], + pin25: ["MC0_CLK", "B2"], + pin48: ["ADCONFIG125", "B3"], + pin61: ["MMC0_DAT7", "B4"], + pin77: ["VSS", "B5", "VSS_B5"], + pin88: ["ADCONFIG141", "B6"], + pin104: ["I2C0_SCL", "B7"], + pin117: ["I2C2_SCL", "B8"], + pin138: ["CASP0_AXR0", "B9"], + pin152: ["ADCONFIG97", "B10"], + pin165: ["CASP0_AFSX", "B11"], + pin181: ["ADCONFIG108", "B12"], + pin196: ["PADCONFIG112", "B13"], + pin212: ["ADCONFIG111", "B14"], + pin225: ["MCAN0_RX", "B15"], + pin239: ["MCAN0_TX", "B16"], + pin260: ["VSS", "B17", "VSS_B17"], + pin273: ["DSI0_TXP0", "B18"], + pin289: ["DSI0_TXN0", "B19"], + pin300: ["VSS", "B20", "VSS_B20"], + pin316: ["DSI0_TXP3", "B21"], + pin329: ["DSI0_TXN3", "B22"], + pin352: ["VSS", "B23", "VSS_B23"], + pin3: ["MC0_DAT2", "C1"], + pin26: ["MC0_DAT3", "C2"], + pin62: ["MC0_DAT4", "C4"], + pin89: ["USB0_DRVVBUS", "C6"], + pin118: ["EXTINTn", "C8"], + pin166: ["MCASP0_AFSR", "C11"], + pin182: ["VSS", "C12", "VSS_C12"], + pin197: ["UART0_TXD", "C13"], + pin240: ["ESETSTATz", "C16"], + pin274: ["VSS", "C18", "VSS_C18"], + pin301: ["OSPI0_CSn0", "C20"], + pin330: ["OSPI0_D0", "C22"], + pin353: ["SPI0_CSn3", "C23"], + pin4: ["VSS", "D1", "VSS_D1"], + pin27: ["ADCONFIG133", "D2"], + pin49: ["MC0_DAT0", "D3"], + pin63: ["ADCONFIG129", "D4"], + pin90: ["MC1_SDWP", "D6"], + pin105: ["ADCONFIG117", "D7"], + pin119: ["I2C2_SDA", "D8"], + pin167: ["PI0_CS1", "D11"], + pin198: ["UART0_RXD", "D13"], + pin241: ["EXT_REFCLK1", "D16"], + pin261: ["DSI0_TXRCALIB", "D17"], + pin275: ["ADCONFIG28", "D18"], + pin302: ["OSPI0_CSn1", "D20"], + pin317: ["OSPI0_D1", "D21"], + pin331: ["OSPI0_CLK", "D22"], + pin354: ["OSPI0_D3", "D23"], + pin5: ["DDR0_DQ3", "E1"], + pin28: ["VSS", "E2", "VSS_E2"], + pin91: ["VSS", "E6", "VSS_E6"], + pin120: ["VSS", "E8", "VSS_E8"], + pin139: ["VSS", "E9", "VSS_E9"], + pin153: ["VSS", "E10", "VSS_E10"], + pin168: ["SPI0_CS0", "E11"], + pin183: ["ADCONFIG107", "E12"], + pin199: ["ADCONFIG106", "E13"], + pin213: ["VSS", "E14", "VSS_E14"], + pin226: ["VSS", "E15", "VSS_E15"], + pin242: ["ESETz", "E16"], + pin276: ["OSPI0_LBCLKO", "E18"], + pin332: ["OSPI0_DQS", "E22"], + pin355: ["OSPI0_D2", "E23"], + pin6: ["DDR0_DQ2", "F1"], + pin29: ["DDR0_DM0", "F2"], + pin50: ["DDR0_DQ1", "F3"], + pin64: ["DDR0_DQ0", "F4"], + pin78: ["VSS", "F5", "VSS_F5"], + pin92: ["VSS", "F6", "VSS_F6"], + pin277: ["VSS", "F18", "VSS_F18"], + pin290: ["SPI0_D5", "F19"], + pin303: ["SPI0_D7", "F20"], + pin318: ["SPI0_D4", "F21"], + pin333: ["GPMC0_AD14", "F22"], + pin356: ["GPMC0_AD15", "F23"], + pin7: ["DDR0_DQS0", "G1"], + pin30: ["DDR0_DQS0_n", "G2"], + pin65: ["DDR0_DQ4", "G4"], + pin106: ["VSS", "G7", "VSS_G7"], + pin121: ["VSS", "G8", "VSS_G8"], + pin140: ["VSS", "G9", "VSS_G9"], + pin154: ["VDDSHV1", "G10", "VDDSHV1_G10"], + pin169: ["CAP_VDDS_GENERAL1", "G11"], + pin184: ["VSS", "G12", "VSS_G12"], + pin200: ["VDDA_CORE_DSI", "G13"], + pin214: ["VDDA_1P8_DSI", "G14"], + pin227: ["VSS", "G15", "VSS_G15"], + pin243: ["VSS", "G16", "VSS_G16"], + pin262: ["VSS", "G17", "VSS_G17"], + pin304: ["SPI0_D6", "G20"], + pin334: ["PADCONFIG43", "G22"], + pin357: ["PADCONFIG42", "G23"], + pin8: ["VSS", "H1", "VSS_H1"], + pin31: ["DDR0_DQ6", "H2"], + pin51: ["DDR0_DQ7", "H3"], + pin66: ["DDR0_DQ5", "H4"], + pin79: ["DDR0_A5", "H5"], + pin93: ["DDR0_A1", "H6"], + pin107: ["VSS", "H7", "VSS_H7"], + pin122: ["VDDSHV2", "H8"], + pin155: ["VDDSHV1", "H10", "VDDSHV1_H10"], + pin185: ["VDDA_CORE_DSI_CLK", "H12"], + pin215: ["VSS", "H14", "VSS_H14"], + pin244: ["VDDS1", "H16"], + pin263: ["VSS", "H17", "VSS_H17"], + pin278: ["GPMC0_AD11", "H18"], + pin291: ["PADCONFIG38", "H19"], + pin305: ["PADCONFIG39", "H20"], + pin319: ["PADCONFIG40", "H21"], + pin335: ["PADCONFIG35", "H22"], + pin358: ["PADCONFIG36", "H23"], + pin9: ["DDR0_A4", "J1"], + pin32: ["DDR0_RESET0_n", "J2"], + pin123: ["CAP_VDDS_MMC0", "J8"], + pin141: ["VDDS_WKUP", "J9", "VDDS_WKUP_J9"], + pin170: ["VDDS_WKUP", "J11", "VDDS_WKUP_J11"], + pin201: ["VDDS_WKUP", "J13", "VDDS_WKUP_J13"], + pin228: ["VDDS_WKUP", "J15", "VDDS_WKUP_J15"], + pin245: ["VDDSHV0", "J16", "VDDSHV0_J16"], + pin336: ["GPMC0_AD7", "J22"], + pin359: ["GPMC0_AD3", "J23"], + pin10: ["DDR0_CKE0", "K1"], + pin33: ["DDR0_A3", "K2"], + pin124: ["VSS", "K8", "VSS_K8"], + pin142: ["VSS", "K9", "VSS_K9"], + pin156: ["VDDS_WKUP", "K10", "VDDS_WKUP_K10"], + pin186: ["VDDA_PLL1", "K12"], + pin216: ["VDDS_WKUP", "K14", "VDDS_WKUP_K14"], + pin229: ["VSS", "K15", "VSS_K15"], + pin246: ["CAP_VDDS_GPMC", "K16"], + pin337: ["PADCONFIG32", "K22"], + pin360: ["PADCONFIG34", "K23"], + pin11: ["DDR0_CAS_n", "L1"], + pin34: ["DDR0_WE_n", "L2"], + pin52: ["DDR0_CS0_n", "L3"], + pin67: ["DDR0_ODT0", "L4"], + pin80: ["DDR0_A0", "L5"], + pin94: ["DDR0_A2", "L6"], + pin108: ["VSS", "L7", "VSS_L7"], + pin125: ["VDDS_DDR", "L8", "VDDS_DDR_L8"], + pin143: ["VSS", "L9", "VSS_L9"], + pin171: ["VDDA_PLL0", "L11"], + pin202: ["VSS", "L13", "VSS_L13"], + pin230: ["VDD_CORE", "L15", "VDD_CORE_L15"], + pin247: ["VSS", "L16", "VSS_L16"], + pin264: ["VDDSHV0", "L17", "VDDSHV0_L17"], + pin279: ["VSS", "L18", "VSS_L18"], + pin292: ["GPMC0_CSn1", "L19"], + pin306: ["GPMC0_CSn0", "L20"], + pin320: ["GPMC0_CLK", "L21"], + pin338: ["GPMC0_AD0", "L22"], + pin361: ["GPMC0_AD1", "L23"], + pin12: ["VSS", "M1", "VSS_M1"], + pin35: ["DDR0_ACT_n", "M2"], + pin53: ["DDR0_CAL0", "M3"], + pin81: ["DDR0_RAS_n", "M5"], + pin109: ["VDDS_DDR", "M7", "VDDS_DDR_M7"], + pin126: ["VDDS_DDR", "M8", "VDDS_DDR_M8"], + pin157: ["VDDA_DDR_PLL0", "M10"], + pin187: ["VSS", "M12", "VSS_M12"], + pin217: ["VDD_CORE", "M14", "VDD_CORE_M14"], + pin248: ["CAP_VDDS_MMC2", "M16"], + pin265: ["VDDSHV4", "M17"], + pin293: ["GPMC0_WEn", "M19"], + pin321: ["GPMC0_DIR", "M21"], + pin339: ["GPMC0_CSn3", "M22"], + pin362: ["GPMC0_CSn2", "M23"], + pin13: ["DDR0_A9", "N1"], + pin36: ["DDR0_BA1", "N2"], + pin54: ["DDR0_BA0", "N3"], + pin68: ["DDR0_BG1", "N4"], + pin82: ["DDR0_BG0", "N5"], + pin95: ["DDR0_A7", "N6"], + pin110: ["VSS", "N7", "VSS_N7"], + pin127: ["VDDS_DDR", "N8", "VDDS_DDR_N8"], + pin144: ["VSS", "N9", "VSS_N9"], + pin172: ["VSS", "N11", "VSS_N11"], + pin203: ["VSS", "N13", "VSS_N13"], + pin231: ["VDD_CORE", "N15", "VDD_CORE_N15"], + pin249: ["VSS", "N16", "VSS_N16"], + pin266: ["VDDA_ADC", "N17"], + pin280: ["VPP", "N18"], + pin294: ["GPMC0_ADVn_ALE", "N19"], + pin307: ["GPMC0_OEn_REn", "N20"], + pin322: ["PADCONFIG55", "N21"], + pin340: ["GPMC0_WAIT1", "N22"], + pin363: ["GPMC0_WAIT0", "N23"], + pin14: ["DDR0_CK0", "P1"], + pin37: ["DDR0_CK0_n", "P2"], + pin128: ["VDDS_DDR", "P8", "VDDS_DDR_P8"], + pin145: ["VSS", "P9", "VSS_P9"], + pin158: ["VDD_CORE", "P10", "VDD_CORE_P10"], + pin188: ["VDD_CORE", "P12", "VDD_CORE_P12"], + pin218: ["VDD_CORE", "P14", "VDD_CORE_P14"], + pin232: ["VSS", "P15", "VSS_P15"], + pin250: ["VDDS_WKUP", "P16", "VDDS_WKUP_P16"], + pin341: ["GPMC0_BE1n", "P22"], + pin364: ["GPMC0_BE0n_CLE", "P23"], + pin15: ["VSS", "R1", "VSS_R1"], + pin38: ["DDR0_A6", "R2"], + pin129: ["VSS", "R8", "VSS_R8"], + pin146: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin173: ["VDD_CORE", "R11", "VDD_CORE_R11"], + pin204: ["VSS", "R13", "VSS_R13"], + pin233: ["VSS", "R15", "VSS_R15"], + pin251: ["VDDS_OSC0", "R16"], + pin342: ["ADCONFIG61", "R22"], + pin365: ["MC2_CLK", "R23"], + pin16: ["DDR0_DQ10", "T1"], + pin39: ["VSS", "T2", "VSS_T2"], + pin55: ["DDR0_DQ9", "T3"], + pin69: ["DDR0_A8", "T4"], + pin83: ["DDR0_A10", "T5"], + pin96: ["DDR0_A11", "T6"], + pin111: ["VSS", "T7", "VSS_T7"], + pin130: ["VSS", "T8", "VSS_T8"], + pin159: ["VDDSHV3", "T10"], + pin189: ["VDDA_1P8_USB", "T12"], + pin219: ["VDDS0", "T14"], + pin252: ["CAP_VDDSHV_MMC", "T16"], + pin267: ["VDD_RTC", "T17"], + pin281: ["VDDS_RTC", "T18"], + pin295: ["VSS", "T19", "VSS_T19"], + pin308: ["MMC2_SDCD", "T20"], + pin323: ["ADCONFIG69", "T21"], + pin343: ["MMC2_DAT1", "T22"], + pin366: ["ADCONFIG62", "T23"], + pin17: ["DDR0_DQ11", "U1"], + pin40: ["DDR0_DQ14", "U2"], + pin70: ["DDR0_DQ12", "U4"], + pin112: ["VSS", "U7", "VSS_U7"], + pin131: ["VSS", "U8", "VSS_U8"], + pin147: ["CAP_VDDS_MMC1", "U9"], + pin160: ["VSS", "U10", "VSS_U10"], + pin174: ["VDDA_CORE_USB", "U11"], + pin190: ["VDDA_3P3_USB", "U12"], + pin205: ["VSS", "U13", "VSS_U13"], + pin220: ["VSS", "U14", "VSS_U14"], + pin234: ["VSS", "U15", "VSS_U15"], + pin253: ["VDDA_3P3_SDIO", "U16"], + pin268: ["VSS", "U17", "VSS_U17"], + pin309: ["VSS", "U20", "VSS_U20"], + pin344: ["MMC2_DAT0", "U22"], + pin367: ["MC2_CMD", "U23"], + pin18: ["DDR0_DQS1", "V1"], + pin41: ["DDR0_DQS1_n", "V2"], + pin56: ["VSS", "V3", "VSS_V3"], + pin71: ["DDR0_DQ8", "V4"], + pin84: ["DDR0_DQ13", "V5"], + pin97: ["DDR0_A13", "V6"], + pin282: ["VSS", "V18", "VSS_V18"], + pin296: ["VSS", "V19", "VSS_V19"], + pin310: ["ADC0_AIN0", "V20"], + pin324: ["ADC0_AIN3", "V21"], + pin345: ["ADC0_AIN1", "V22"], + pin368: ["ADC0_AIN2", "V23"], + pin19: ["DDR0_DQ15", "W1"], + pin42: ["DDR0_DM1", "W2"], + pin98: ["DDR0_A12", "W6"], + pin132: ["ADCONFIG81", "W8"], + pin148: ["VSS", "W9", "VSS_W9"], + pin161: ["VSS", "W10", "VSS_W10"], + pin175: ["RGMII1_TXC", "W11"], + pin191: ["VSS", "W12", "VSS_W12"], + pin206: ["RGMII1_TD1", "W13"], + pin221: ["VSS", "W14", "VSS_W14"], + pin235: ["VSS", "W15", "VSS_W15"], + pin254: ["VSS", "W16", "VSS_W16"], + pin283: ["VSS", "W18", "VSS_W18"], + pin346: ["WKUP_UART0_RTSn", "W22"], + pin369: ["WKUP_UART0_CTSn", "W23"], + pin20: ["VSS", "Y1", "VSS_Y1"], + pin43: ["ADCONFIG138", "Y2"], + pin57: ["ADCONFIG140", "Y3"], + pin72: ["PADCONFIG136", "Y4"], + pin99: ["RGMII1_RX_CTL", "Y6"], + pin113: ["RGMII1_RXC", "Y7"], + pin133: ["RGMII1_RD0", "Y8"], + pin176: ["RGMII1_TD2", "Y11"], + pin207: ["ADCONFIG85", "Y13"], + pin255: ["EMU0", "Y16"], + pin269: ["MS", "Y17"], + pin284: ["RTC_PORz", "Y18"], + pin311: ["VSS", "Y20", "VSS_Y20"], + pin325: ["VSS", "Y21", "VSS_Y21"], + pin347: ["WKUP_UART0_RXD", "Y22"], + pin370: ["WKUP_CLKOUT0", "Y23"], +} as const; + +const pinRoles = { + pin1: "ground", + pin24: "ground", + pin60: "ground", + pin151: "ground", + pin195: "ground", + pin238: "ground", + pin288: "ground", + pin328: "ground", + pin351: "ground", + pin73: "ground", + pin312: "ground", + pin22: "ground", + pin114: "ground", + pin326: "ground", + pin46: "ground", + pin179: "ground", + pin223: "ground", + pin298: "ground", + pin350: "ground", + pin373: "ground", + pin2: "ground", + pin77: "ground", + pin260: "ground", + pin300: "ground", + pin352: "ground", + pin182: "ground", + pin274: "ground", + pin4: "ground", + pin28: "ground", + pin91: "ground", + pin120: "ground", + pin139: "ground", + pin153: "ground", + pin213: "ground", + pin226: "ground", + pin78: "ground", + pin92: "ground", + pin277: "ground", + pin106: "ground", + pin121: "ground", + pin140: "ground", + pin184: "ground", + pin200: "power", + pin214: "power", + pin227: "ground", + pin243: "ground", + pin262: "ground", + pin8: "ground", + pin107: "ground", + pin185: "power", + pin215: "ground", + pin244: "power", + pin263: "ground", + pin141: "power", + pin170: "power", + pin201: "power", + pin228: "power", + pin124: "ground", + pin142: "ground", + pin156: "power", + pin186: "power", + pin216: "power", + pin229: "ground", + pin108: "ground", + pin125: "power", + pin143: "ground", + pin171: "power", + pin202: "ground", + pin230: "power", + pin247: "ground", + pin279: "ground", + pin12: "ground", + pin109: "power", + pin126: "power", + pin157: "power", + pin187: "ground", + pin217: "power", + pin110: "ground", + pin127: "power", + pin144: "ground", + pin172: "ground", + pin203: "ground", + pin231: "power", + pin249: "ground", + pin266: "power", + pin280: "power", + pin128: "power", + pin145: "ground", + pin158: "power", + pin188: "power", + pin218: "power", + pin232: "ground", + pin250: "power", + pin15: "ground", + pin129: "ground", + pin146: "power", + pin173: "power", + pin204: "ground", + pin233: "ground", + pin251: "power", + pin39: "ground", + pin111: "ground", + pin130: "ground", + pin189: "power", + pin219: "power", + pin267: "power", + pin281: "power", + pin295: "ground", + pin112: "ground", + pin131: "ground", + pin160: "ground", + pin174: "power", + pin190: "power", + pin205: "ground", + pin220: "ground", + pin234: "ground", + pin253: "power", + pin268: "ground", + pin309: "ground", + pin56: "ground", + pin282: "ground", + pin296: "ground", + pin148: "ground", + pin161: "ground", + pin191: "ground", + pin221: "ground", + pin235: "ground", + pin254: "ground", + pin283: "ground", + pin20: "ground", + pin311: "ground", + pin325: "ground", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin24: { + requiresGround: true, + }, + pin60: { + requiresGround: true, + }, + pin151: { + requiresGround: true, + }, + pin195: { + requiresGround: true, + }, + pin238: { + requiresGround: true, + }, + pin288: { + requiresGround: true, + }, + pin328: { + requiresGround: true, + }, + pin351: { + requiresGround: true, + }, + pin73: { + requiresGround: true, + }, + pin312: { + requiresGround: true, + }, + pin22: { + requiresGround: true, + }, + pin114: { + requiresGround: true, + }, + pin326: { + requiresGround: true, + }, + pin46: { + requiresGround: true, + }, + pin179: { + requiresGround: true, + }, + pin223: { + requiresGround: true, + }, + pin298: { + requiresGround: true, + }, + pin350: { + requiresGround: true, + }, + pin373: { + requiresGround: true, + }, + pin2: { + requiresGround: true, + }, + pin77: { + requiresGround: true, + }, + pin260: { + requiresGround: true, + }, + pin300: { + requiresGround: true, + }, + pin352: { + requiresGround: true, + }, + pin182: { + requiresGround: true, + }, + pin274: { + requiresGround: true, + }, + pin4: { + requiresGround: true, + }, + pin28: { + requiresGround: true, + }, + pin91: { + requiresGround: true, + }, + pin120: { + requiresGround: true, + }, + pin139: { + requiresGround: true, + }, + pin153: { + requiresGround: true, + }, + pin213: { + requiresGround: true, + }, + pin226: { + requiresGround: true, + }, + pin78: { + requiresGround: true, + }, + pin92: { + requiresGround: true, + }, + pin277: { + requiresGround: true, + }, + pin106: { + requiresGround: true, + }, + pin121: { + requiresGround: true, + }, + pin140: { + requiresGround: true, + }, + pin184: { + requiresGround: true, + }, + pin200: { + requiresPower: true, + }, + pin214: { + requiresPower: true, + }, + pin227: { + requiresGround: true, + }, + pin243: { + requiresGround: true, + }, + pin262: { + requiresGround: true, + }, + pin8: { + requiresGround: true, + }, + pin107: { + requiresGround: true, + }, + pin185: { + requiresPower: true, + }, + pin215: { + requiresGround: true, + }, + pin244: { + requiresPower: true, + }, + pin263: { + requiresGround: true, + }, + pin141: { + requiresPower: true, + }, + pin170: { + requiresPower: true, + }, + pin201: { + requiresPower: true, + }, + pin228: { + requiresPower: true, + }, + pin124: { + requiresGround: true, + }, + pin142: { + requiresGround: true, + }, + pin156: { + requiresPower: true, + }, + pin186: { + requiresPower: true, + }, + pin216: { + requiresPower: true, + }, + pin229: { + requiresGround: true, + }, + pin108: { + requiresGround: true, + }, + pin125: { + requiresPower: true, + }, + pin143: { + requiresGround: true, + }, + pin171: { + requiresPower: true, + }, + pin202: { + requiresGround: true, + }, + pin230: { + requiresPower: true, + }, + pin247: { + requiresGround: true, + }, + pin279: { + requiresGround: true, + }, + pin12: { + requiresGround: true, + }, + pin109: { + requiresPower: true, + }, + pin126: { + requiresPower: true, + }, + pin157: { + requiresPower: true, + }, + pin187: { + requiresGround: true, + }, + pin217: { + requiresPower: true, + }, + pin110: { + requiresGround: true, + }, + pin127: { + requiresPower: true, + }, + pin144: { + requiresGround: true, + }, + pin172: { + requiresGround: true, + }, + pin203: { + requiresGround: true, + }, + pin231: { + requiresPower: true, + }, + pin249: { + requiresGround: true, + }, + pin266: { + requiresPower: true, + }, + pin280: { + requiresPower: true, + }, + pin128: { + requiresPower: true, + }, + pin145: { + requiresGround: true, + }, + pin158: { + requiresPower: true, + }, + pin188: { + requiresPower: true, + }, + pin218: { + requiresPower: true, + }, + pin232: { + requiresGround: true, + }, + pin250: { + requiresPower: true, + }, + pin15: { + requiresGround: true, + }, + pin129: { + requiresGround: true, + }, + pin146: { + requiresPower: true, + }, + pin173: { + requiresPower: true, + }, + pin204: { + requiresGround: true, + }, + pin233: { + requiresGround: true, + }, + pin251: { + requiresPower: true, + }, + pin39: { + requiresGround: true, + }, + pin111: { + requiresGround: true, + }, + pin130: { + requiresGround: true, + }, + pin189: { + requiresPower: true, + }, + pin219: { + requiresPower: true, + }, + pin267: { + requiresPower: true, + }, + pin281: { + requiresPower: true, + }, + pin295: { + requiresGround: true, + }, + pin112: { + requiresGround: true, + }, + pin131: { + requiresGround: true, + }, + pin160: { + requiresGround: true, + }, + pin174: { + requiresPower: true, + }, + pin190: { + requiresPower: true, + }, + pin205: { + requiresGround: true, + }, + pin220: { + requiresGround: true, + }, + pin234: { + requiresGround: true, + }, + pin253: { + requiresPower: true, + }, + pin268: { + requiresGround: true, + }, + pin309: { + requiresGround: true, + }, + pin56: { + requiresGround: true, + }, + pin282: { + requiresGround: true, + }, + pin296: { + requiresGround: true, + }, + pin148: { + requiresGround: true, + }, + pin161: { + requiresGround: true, + }, + pin191: { + requiresGround: true, + }, + pin221: { + requiresGround: true, + }, + pin235: { + requiresGround: true, + }, + pin254: { + requiresGround: true, + }, + pin283: { + requiresGround: true, + }, + pin20: { + requiresGround: true, + }, + pin311: { + requiresGround: true, + }, + pin325: { + requiresGround: true, + }, +} as const; + +export const AM62L32BEGHAANBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default AM62L32BEGHAANBR; diff --git a/lib/chips/AM6442BSEFHAALV.circuit.tsx b/lib/chips/AM6442BSEFHAALV.circuit.tsx new file mode 100644 index 00000000..417728f6 --- /dev/null +++ b/lib/chips/AM6442BSEFHAALV.circuit.tsx @@ -0,0 +1,862 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A5", "A1", "A5_A1"], + pin22: ["DDR0_DQ1", "A2"], + pin43: ["DDR0_DQ0", "A3"], + pin64: ["DDR0_DQ3", "A4"], + pin85: ["VSS", "A5", "VSS_A5"], + pin106: ["VSS", "A6", "VSS_A6"], + pin127: ["MCU_SPI1_CS0", "A7"], + pin148: ["MCU_UART0_TXD", "A8"], + pin169: ["MCU_UART0_RXD", "A9"], + pin190: ["MCU_I2C0_SDA", "A10"], + pin211: ["MCU_I2C1_SCL", "A11"], + pin232: ["TDO", "A12"], + pin253: ["SPI0_D0", "A13"], + pin274: ["SPI0_D1", "A14"], + pin295: ["SPI1_D1", "A15"], + pin316: ["UART0_RTSn", "A16"], + pin337: ["PADCONFIG148", "A17"], + pin358: ["I2C0_SCL", "A18"], + pin379: ["EXT_REFCLK1", "A19"], + pin400: ["MCU_SAFETY_ERRORn", "A20"], + pin421: ["VSS", "A21", "VSS_A21"], + pin21: ["VSS", "AA1", "VSS_AA1"], + pin42: ["PRG0_PRU0_GPO4", "AA2"], + pin63: ["PADCONFIG100", "AA3"], + pin84: ["PRG0_PRU1_GPO16", "AA4"], + pin105: ["PRG0_PRU0_GPO10", "AA5"], + pin126: ["PRG1_MDIO0_MDIO", "AA6"], + pin147: ["PADCONFIG52", "AA7"], + pin168: ["PADCONFIG57", "AA8"], + pin189: ["PRG1_PRU0_GPO14", "AA9"], + pin210: ["PRG1_PRU1_GPO11", "AA10"], + pin231: ["PRG1_PRU1_GPO14", "AA11"], + pin252: ["PRG1_PRU1_GPO2", "AA12"], + pin273: ["PRG1_PRU1_GPO5", "AA13"], + pin294: ["PRG1_PRU1_GPO17", "AA14"], + pin315: ["A5", "AA15", "A5_AA15"], + pin336: ["SERDES0_TX0_N", "AA16"], + pin357: ["SERDES0_TX0_P", "AA17"], + pin378: ["VSS", "AA18", "VSS_AA18"], + pin399: ["USB0_DP", "AA19"], + pin420: ["USB0_DM", "AA20"], + pin441: ["A5", "AA21", "A5_AA21"], + pin2: ["DDR0_DQS0_n", "B1"], + pin23: ["DDR0_DM0", "B2"], + pin44: ["DDR0_DQ4", "B3"], + pin65: ["DDR0_DQ7", "B4"], + pin86: ["DDR0_DQ2", "B5"], + pin107: ["MCU_SPI0_D1", "B6"], + pin128: ["MCU_SPI1_CS1", "B7"], + pin149: ["MCU_PADCONFIG16", "B8"], + pin170: ["MCU_PADCONFIG17", "B9"], + pin191: ["MCU_I2C1_SDA", "B10"], + pin212: ["TCK", "B11"], + pin233: ["MCU_RESETz", "B12"], + pin254: ["MCU_RESETSTATz", "B13"], + pin275: ["SPI1_CS0", "B14"], + pin296: ["SPI1_D0", "B15"], + pin317: ["UART0_CTSn", "B16"], + pin338: ["PADCONFIG149", "B17"], + pin359: ["I2C0_SDA", "B18"], + pin380: ["I2C1_SDA", "B19"], + pin401: ["MCU_OSC0_XO", "B20"], + pin422: ["MCU_PORz", "B21"], + pin3: ["DDR0_DQS0", "C1"], + pin24: ["DDR0_DQ6", "C2"], + pin45: ["VSS", "C3", "VSS_C3"], + pin66: ["DDR0_DQ5", "C4"], + pin87: ["DDR0_A1", "C5"], + pin108: ["MCU_PADCONFIG1", "C6"], + pin129: ["MCU_SPI1_D0", "C7"], + pin150: ["MCU_SPI1_D1", "C8"], + pin171: ["MCU_UART1_RXD", "C9"], + pin192: ["VSS", "C10", "VSS_C10"], + pin213: ["TDI", "C11"], + pin234: ["TMS", "C12"], + pin255: ["PADCONFIG131", "C13"], + pin276: ["SPI1_CLK", "C14"], + pin297: ["A5", "C15", "A5_C15"], + pin318: ["PADCONFIG141", "C16"], + pin339: ["PADCONFIG150", "C17"], + pin360: ["I2C1_SCL", "C18"], + pin381: ["EXTINTn", "C19"], + pin402: ["MMC1_SDWP", "C20"], + pin423: ["MCU_OSC0_XI", "C21"], + pin4: ["VSS", "D1", "VSS_D1"], + pin25: ["DDR0_A0", "D2"], + pin46: ["DDR0_A4", "D3"], + pin67: ["DDR0_A3", "D4"], + pin88: ["DDR0_RESET0_n", "D5"], + pin109: ["MCU_SPI0_CS0", "D6"], + pin130: ["MCU_SPI1_CLK", "D7"], + pin151: ["MCU_PADCONFIG12", "D8"], + pin172: ["MCU_UART1_TXD", "D9"], + pin193: ["EMU0", "D10"], + pin214: ["TRSTn", "D11"], + pin235: ["SPI0_CS0", "D12"], + pin256: ["SPI0_CLK", "D13"], + pin277: ["PADCONFIG136", "D14"], + pin298: ["PADCONFIG140", "D15"], + pin319: ["UART1_CTSn", "D16"], + pin340: ["MCAN1_RX", "D17"], + pin361: ["ECAP0_IN_APWM_OUT", "D18"], + pin382: ["MMC1_SDCD", "D19"], + pin403: ["ADC0_AIN3", "D20"], + pin424: ["RSVD1", "D21"], + pin5: ["DDR0_CK0_n", "E1"], + pin26: ["DDR0_A2", "E2"], + pin47: ["DDR0_CS0_n", "E3"], + pin68: ["DDR0_CS1_n", "E4"], + pin89: ["DDR0_ODT0", "E5"], + pin110: ["MCU_SPI0_CLK", "E6"], + pin131: ["MCU_SPI0_D0", "E7"], + pin152: ["MCU_PADCONFIG13", "E8"], + pin173: ["MCU_I2C0_SCL", "E9"], + pin194: ["EMU1", "E10"], + pin215: ["VSS", "E11", "VSS_E11"], + pin236: ["VMON_1P8_SOC", "E12"], + pin257: ["VSS", "E13", "VSS_E13"], + pin278: ["UART1_TXD", "E14"], + pin299: ["UART1_RXD", "E15"], + pin320: ["UART1_RTSn", "E16"], + pin341: ["PORz_OUT", "E17"], + pin362: ["RESET_REQz", "E18"], + pin383: ["USB0_DRVVBUS", "E19"], + pin404: ["ADC0_AIN7", "E20"], + pin425: ["ADC0_AIN2", "E21"], + pin6: ["DDR0_CK0", "F1"], + pin27: ["DDR0_A5", "F2"], + pin48: ["DDR0_CKE1", "F3"], + pin69: ["DDR0_CKE0", "F4"], + pin90: ["DDR0_ODT1", "F5"], + pin111: ["DDR0_RAS_n", "F6"], + pin132: ["VDDS_DDR", "F7", "VDDS_DDR_F7"], + pin153: ["VSS", "F8", "VSS_F8"], + pin174: ["VDDSHV_MCU", "F9", "VDDSHV_MCU_F9"], + pin195: ["A5", "F10", "A5_F10"], + pin216: ["VDDSHV0", "F11", "VDDSHV0_F11"], + pin237: ["RSVD8", "F12"], + pin258: ["VMON_3P3_MCU", "F13"], + pin279: ["VMON_3P3_SOC", "F14"], + pin300: ["VSS", "F15", "VSS_F15"], + pin321: ["RESETSTATz", "F16"], + pin342: ["RSVD3", "F17"], + pin363: ["MMC0_CALPAD", "F18"], + pin384: ["ADC0_AIN6", "F19"], + pin405: ["ADC0_AIN1", "F20"], + pin426: ["ADC0_AIN5", "F21"], + pin7: ["A5", "G1", "A5_G1"], + pin28: ["DDR0_BG0", "G2"], + pin49: ["VSS", "G3", "VSS_G3"], + pin70: ["DDR0_BA0", "G4"], + pin91: ["DDR0_BA1", "G5"], + pin112: ["VDDS_DDR", "G6", "VDDS_DDR_G6"], + pin133: ["A5", "G7", "A5_G7"], + pin154: ["VDDSHV_MCU", "G8", "VDDSHV_MCU_G8"], + pin175: ["VSS", "G9", "VSS_G9"], + pin196: ["VDDSHV_MCU", "G10", "VDDSHV_MCU_G10"], + pin217: ["VDDA_TEMP0", "G11"], + pin238: ["VDDSHV0", "G12", "VDDSHV0_G12"], + pin259: ["RSVD2", "G13"], + pin280: ["VDDSHV0", "G14", "VDDSHV0_G14"], + pin301: ["VPP", "G15"], + pin322: ["VSS", "G16", "VSS_G16"], + pin343: ["MMC0_DAT7", "G17"], + pin364: ["MMC0_CLK", "G18"], + pin385: ["MMC0_DS", "G19"], + pin406: ["ADC0_AIN0", "G20"], + pin427: ["ADC0_AIN4", "G21"], + pin8: ["DDR0_ALERT_n", "H1"], + pin29: ["DDR0_ACT_n", "H2"], + pin50: ["DDR0_BG1", "H3"], + pin71: ["DDR0_WE_n", "H4"], + pin92: ["DDR0_CAL0", "H5"], + pin113: ["A5", "H6", "A5_H6"], + pin134: ["VDDS_DDR", "H7", "VDDS_DDR_H7"], + pin155: ["VSS", "H8", "VSS_H8"], + pin176: ["VDDA_PLL1", "H9"], + pin197: ["CAP_VDDS_MCU", "H10"], + pin218: ["VSS", "H11", "VSS_H11"], + pin239: ["CAP_VDDS0", "H12"], + pin260: ["VDDS_OSC", "H13"], + pin281: ["VDD_DLL_MMC0", "H14"], + pin302: ["VDDA_3P3_SDIO", "H15"], + pin323: ["RSVD0", "H16"], + pin344: ["MMC0_DAT4", "H17"], + pin365: ["MMC0_DAT6", "H18"], + pin386: ["MMC0_DAT5", "H19"], + pin407: ["VSS", "H20", "VSS_H20"], + pin428: ["VSS", "H21", "VSS_H21"], + pin9: ["DDR0_A11", "J1"], + pin30: ["DDR0_A6", "J2"], + pin51: ["DDR0_A8", "J3"], + pin72: ["DDR0_A9", "J4"], + pin93: ["DDR0_CAS_n", "J5"], + pin114: ["VDDS_DDR", "J6", "VDDS_DDR_J6"], + pin135: ["VSS", "J7", "VSS_J7"], + pin156: ["VDDS_DDR_C", "J8"], + pin177: ["VSS", "J9", "VSS_J9"], + pin198: ["VDD_CORE", "J10", "VDD_CORE_J10"], + pin219: ["VDDA_PLL2", "J11"], + pin240: ["VDD_CORE", "J12", "VDD_CORE_J12"], + pin261: ["VDDA_ADC", "J13"], + pin282: ["VSS", "J14", "VSS_J14"], + pin303: ["ADC0_REFP", "J15"], + pin324: ["ADC0_REFN", "J16"], + pin345: ["MMC0_DAT3", "J17"], + pin366: ["MMC0_DAT2", "J18"], + pin387: ["MMC1_CMD", "J19"], + pin408: ["MMC0_DAT1", "J20"], + pin429: ["MMC0_CMD", "J21"], + pin10: ["RSVD7", "K1"], + pin31: ["RSVD6", "K2"], + pin52: ["DDR0_A10", "K3"], + pin73: ["DDR0_A13", "K4"], + pin94: ["DDR0_PAR", "K5"], + pin115: ["VSS", "K6", "VSS_K6"], + pin136: ["VDDS_DDR", "K7", "VDDS_DDR_K7"], + pin157: ["VSS", "K8", "VSS_K8"], + pin178: ["VDD_CORE", "K9", "VDD_CORE_K9"], + pin199: ["VMON_VSYS", "K10"], + pin220: ["VDD_CORE", "K11", "VDD_CORE_K11"], + pin241: ["VDDA_MCU", "K12"], + pin262: ["VDD_MMC0", "K13"], + pin283: ["VDDS_MMC0", "K14"], + pin304: ["CAP_VDDSHV_MMC1", "K15"], + pin325: ["VMON_1P8_MCU", "K16"], + pin346: ["OSPI0_CSn2", "K17"], + pin367: ["MMC1_DAT3", "K18"], + pin388: ["MMC1_DAT2", "K19"], + pin409: ["MMC0_DAT0", "K20"], + pin430: ["MMC1_DAT0", "K21"], + pin11: ["VSS", "L1", "VSS_L1"], + pin32: ["DDR0_DQ10", "L2"], + pin53: ["VSS", "L3", "VSS_L3"], + pin74: ["DDR0_DQ9", "L4"], + pin95: ["DDR0_A7", "L5"], + pin116: ["VDDS_DDR", "L6", "VDDS_DDR_L6"], + pin137: ["VSS", "L7", "VSS_L7"], + pin158: ["VDD_CORE", "L8", "VDD_CORE_L8"], + pin179: ["VSS", "L9", "VSS_L9"], + pin200: ["VDDR_CORE", "L10", "VDDR_CORE_L10"], + pin221: ["VDDA_TEMP1", "L11"], + pin242: ["VDD_CORE", "L12", "VDD_CORE_L12"], + pin263: ["CAP_VDDS5", "L13"], + pin284: ["VDDSHV5", "L14", "VDDSHV5_L14"], + pin305: ["VDDSHV5", "L15", "VDDSHV5_L15"], + pin326: ["VSS", "L16", "VSS_L16"], + pin347: ["PADCONFIG14", "L17"], + pin368: ["OSPI0_CSn1", "L18"], + pin389: ["OSPI0_CSn0", "L19"], + pin410: ["MMC1_CLK", "L20"], + pin431: ["MMC1_DAT1", "L21"], + pin12: ["DDR0_DQS1_n", "M1"], + pin33: ["DDR0_DM1", "M2"], + pin54: ["DDR0_DQ11", "M3"], + pin75: ["DDR0_DQ14", "M4"], + pin96: ["DDR0_A12", "M5"], + pin117: ["VSS", "M6", "VSS_M6"], + pin138: ["VDDSHV1", "M7", "VDDSHV1_M7"], + pin159: ["VSS", "M8", "VSS_M8"], + pin180: ["VDD_CORE", "M9", "VDD_CORE_M9"], + pin201: ["VSS", "M10", "VSS_M10"], + pin222: ["VDD_CORE", "M11", "VDD_CORE_M11"], + pin243: ["VSS", "M12", "VSS_M12"], + pin264: ["VDDR_CORE", "M13", "VDDR_CORE_M13"], + pin285: ["VDDSHV4", "M14", "VDDSHV4_M14"], + pin306: ["VDDSHV4", "M15", "VDDSHV4_M15"], + pin327: ["CAP_VDDS4", "M16"], + pin348: ["OSPI0_D7", "M17"], + pin369: ["OSPI0_D1", "M18"], + pin390: ["OSPI0_D0", "M19"], + pin411: ["OSPI0_D2", "M20"], + pin432: ["OSPI0_D3", "M21"], + pin13: ["DDR0_DQS1", "N1"], + pin34: ["DDR0_DQ15", "N2"], + pin55: ["DDR0_DQ13", "N3"], + pin76: ["DDR0_DQ12", "N4"], + pin97: ["DDR0_DQ8", "N5"], + pin118: ["VDDSHV1", "N6", "VDDSHV1_N6"], + pin139: ["VSS", "N7", "VSS_N7"], + pin160: ["VDD_CORE", "N8", "VDD_CORE_N8"], + pin181: ["VSS", "N9", "VSS_N9"], + pin202: ["VDD_CORE", "N10", "VDD_CORE_N10"], + pin223: ["VSS", "N11", "VSS_N11"], + pin244: ["VDDA_PLL0", "N12"], + pin265: ["VSS", "N13", "VSS_N13"], + pin286: ["CAP_VDDS3", "N14"], + pin307: ["VSS", "N15", "VSS_N15"], + pin328: ["PADCONFIG40", "N16"], + pin349: ["GPMC0_DIR", "N17"], + pin370: ["OSPI0_D6", "N18"], + pin391: ["OSPI0_DQS", "N19"], + pin412: ["OSPI0_CLK", "N20"], + pin433: ["OSPI0_LBCLKO", "N21"], + pin14: ["VSS", "P1", "VSS_P1"], + pin35: ["PRG0_MDIO0_MDIO", "P2"], + pin56: ["PRG0_MDIO0_MDC", "P3"], + pin77: ["PRG0_PRU1_GPO5", "P4"], + pin98: ["PRG0_PRU1_GPO18", "P5"], + pin119: ["VSS", "P6", "VSS_P6"], + pin140: ["VDDSHV1", "P7", "VDDSHV1_P7"], + pin161: ["VSS", "P8", "VSS_P8"], + pin182: ["VDD_CORE", "P9", "VDD_CORE_P9"], + pin203: ["VSS", "P10", "VSS_P10"], + pin224: ["VDDA_0P85_SERDES0_C", "P11"], + pin245: ["VDDA_0P85_SERDES0", "P12", "VDDA_0P85_SERDES0_P12"], + pin266: ["VDDA_0P85_SERDES0", "P13", "VDDA_0P85_SERDES0_P13"], + pin287: ["VDDSHV3", "P14", "VDDSHV3_P14"], + pin308: ["VDDSHV3", "P15", "VDDSHV3_P15"], + pin329: ["GPMC0_ADVn_ALE", "P16"], + pin350: ["PADCONFIG36", "P17"], + pin371: ["VSS", "P18", "VSS_P18"], + pin392: ["GPMC0_CSn2", "P19"], + pin413: ["OSPI0_D5", "P20"], + pin434: ["OSPI0_D4", "P21"], + pin15: ["PRG0_PRU1_GPO8", "R1"], + pin36: ["PRG0_PRU1_GPO19", "R2"], + pin57: ["PRG0_PRU0_GPO5", "R3"], + pin78: ["PRG0_PRU0_GPO1", "R4"], + pin99: ["PRG0_PRU1_GPO6", "R5"], + pin120: ["PRG0_PRU0_GPO13", "R6"], + pin141: ["VSS", "R7", "VSS_R7"], + pin162: ["VDDSHV2", "R8", "VDDSHV2_R8"], + pin183: ["VSS", "R9", "VSS_R9"], + pin204: ["VDDSHV2", "R10", "VDDSHV2_R10"], + pin225: ["CAP_VDDS2", "R11"], + pin246: ["VSS", "R12", "VSS_R12"], + pin267: ["VDDA_3P3_USB0", "R13"], + pin288: ["VDDA_1P8_SERDES0", "R14"], + pin309: ["VDDA_1P8_USB0", "R15"], + pin330: ["GPMC0_AD10", "R16"], + pin351: ["PADCONFIG31", "R17"], + pin372: ["GPMC0_OEn_REn", "R18"], + pin393: ["GPMC0_CSn0", "R19"], + pin414: ["GPMC0_CSn1", "R20"], + pin435: ["GPMC0_CSn3", "R21"], + pin16: ["PRG0_PRU0_GPO7", "T1"], + pin37: ["PADCONFIG96", "T2"], + pin58: ["PRG0_PRU0_GPO6", "T3"], + pin79: ["PRG0_PRU1_GPO3", "T4"], + pin100: ["PRG0_PRU0_GPO15", "T5"], + pin121: ["PADCONFIG121", "T6"], + pin142: ["CAP_VDDS1", "T7"], + pin163: ["VSS", "T8", "VSS_T8"], + pin184: ["VDDSHV2", "T9", "VDDSHV2_T9"], + pin205: ["VSS", "T10", "VSS_T10"], + pin226: ["VSS", "T11", "VSS_T11"], + pin247: ["VDDA_0P85_USB0", "T12"], + pin268: ["SERDES0_REXT", "T13"], + pin289: ["USB0_VBUS", "T14"], + pin310: ["VSS", "T15", "VSS_T15"], + pin331: ["VSS", "T16", "VSS_T16"], + pin352: ["PADCONFIG24", "T17"], + pin373: ["PADCONFIG17", "T18"], + pin394: ["PADCONFIG37", "T19"], + pin415: ["GPMC0_AD0", "T20"], + pin436: ["GPMC0_WEn", "T21"], + pin17: ["PADCONFIG105", "U1"], + pin38: ["PRG0_PRU0_GPO2", "U2"], + pin59: ["VSS", "U3", "VSS_U3"], + pin80: ["PRG0_PRU0_GPO16", "U4"], + pin101: ["PRG0_PRU1_GPO15", "U5"], + pin122: ["PADCONFIG122", "U6"], + pin143: ["PADCONFIG63", "U7"], + pin164: ["PADCONFIG47", "U8"], + pin185: ["PADCONFIG58", "U9"], + pin206: ["PRG1_PRU1_GPO13", "U10"], + pin227: ["PRG1_PRU1_GPO6", "U11"], + pin248: ["PADCONFIG74", "U12"], + pin269: ["PRG1_PRU0_GPO7", "U13"], + pin290: ["PRG1_PRU0_GPO10", "U14"], + pin311: ["PRG1_PRU0_GPO9", "U15"], + pin332: ["USB0_ID", "U16"], + pin353: ["USB0_RCALIB", "U17"], + pin374: ["GPMC0_AD4", "U18"], + pin395: ["PADCONFIG20", "U19"], + pin416: ["PADCONFIG18", "U20"], + pin437: ["PADCONFIG16", "U21"], + pin18: ["PRG0_PRU0_GPO18", "V1"], + pin39: ["PRG0_PRU0_GPO3", "V2"], + pin60: ["PRG0_PRU1_GPO2", "V3"], + pin81: ["PRG0_PRU0_GPO14", "V4"], + pin102: ["PRG0_PRU1_GPO17", "V5"], + pin123: ["PADCONFIG118", "V6"], + pin144: ["PADCONFIG64", "V7"], + pin165: ["PADCONFIG49", "V8"], + pin186: ["PADCONFIG62", "V9"], + pin207: ["PADCONFIG78", "V10"], + pin228: ["PRG1_PRU1_GPO1", "V11"], + pin249: ["PADCONFIG85", "V12"], + pin270: ["PADCONFIG51", "V13"], + pin291: ["PADCONFIG75", "V14"], + pin312: ["PADCONFIG73", "V15"], + pin333: ["RSVD5", "V16"], + pin354: ["VSS", "V17", "VSS_V17"], + pin375: ["GPMC0_AD13", "V18"], + pin396: ["PADCONFIG23", "V19"], + pin417: ["PADCONFIG21", "V20"], + pin438: ["GPMC0_AD7", "V21"], + pin19: ["PRG0_PRU0_GPO19", "W1"], + pin40: ["PADCONFIG109", "W2"], + pin61: ["PRG0_PRU1_GPO4", "W3"], + pin82: ["PADCONFIG119", "W4"], + pin103: ["PADCONFIG115", "W5"], + pin124: ["PRG0_PRU0_GPO9", "W6"], + pin145: ["PADCONFIG65", "W7"], + pin166: ["PADCONFIG48", "W8"], + pin187: ["PADCONFIG59", "W9"], + pin208: ["VSS", "W10", "VSS_W10"], + pin229: ["PRG1_PRU1_GPO0", "W11"], + pin250: ["PADCONFIG70", "W12"], + pin271: ["PADCONFIG54", "W13"], + pin292: ["PRG1_PRU1_GPO10", "W14"], + pin313: ["RSVD4", "W15"], + pin334: ["SERDES0_REFCLK0N", "W16"], + pin355: ["SERDES0_REFCLK0P", "W17"], + pin376: ["VSS", "W18", "VSS_W18"], + pin397: ["GPMC0_WAIT0", "W19"], + pin418: ["PADCONFIG26", "W20"], + pin439: ["PADCONFIG27", "W21"], + pin20: ["PADCONFIG88", "Y1"], + pin41: ["PADCONFIG108", "Y2"], + pin62: ["PADCONFIG99", "Y3"], + pin83: ["PADCONFIG120", "Y4"], + pin104: ["PRG0_PRU1_GPO9", "Y5"], + pin125: ["PRG1_MDIO0_MDC", "Y6"], + pin146: ["PADCONFIG46", "Y7"], + pin167: ["PADCONFIG50", "Y8"], + pin188: ["PADCONFIG61", "Y9"], + pin209: ["PRG1_PRU1_GPO16", "Y10"], + pin230: ["PADCONFIG81", "Y11"], + pin251: ["PADCONFIG69", "Y12"], + pin272: ["PRG1_PRU1_GPO18", "Y13"], + pin293: ["VSS", "Y14", "VSS_Y14"], + pin314: ["SERDES0_RX0_N", "Y15"], + pin335: ["SERDES0_RX0_P", "Y16"], + pin356: ["VSS", "Y17", "VSS_Y17"], + pin377: ["PADCONFIG39", "Y18"], + pin398: ["VSS", "Y19", "VSS_Y19"], + pin419: ["GPMC0_AD15", "Y20"], + pin440: ["PADCONFIG29", "Y21"], +} as const; + +const pinRoles = { + pin85: "ground", + pin106: "ground", + pin421: "ground", + pin21: "ground", + pin378: "ground", + pin45: "ground", + pin192: "ground", + pin4: "ground", + pin215: "ground", + pin257: "ground", + pin132: "power", + pin153: "ground", + pin300: "ground", + pin49: "ground", + pin112: "power", + pin175: "ground", + pin217: "power", + pin301: "power", + pin322: "ground", + pin134: "power", + pin155: "ground", + pin176: "power", + pin218: "ground", + pin260: "power", + pin281: "power", + pin302: "power", + pin407: "ground", + pin428: "ground", + pin114: "power", + pin135: "ground", + pin156: "power", + pin177: "ground", + pin198: "power", + pin219: "power", + pin240: "power", + pin261: "power", + pin282: "ground", + pin115: "ground", + pin136: "power", + pin157: "ground", + pin178: "power", + pin220: "power", + pin241: "power", + pin262: "power", + pin283: "power", + pin11: "ground", + pin53: "ground", + pin116: "power", + pin137: "ground", + pin158: "power", + pin179: "ground", + pin221: "power", + pin242: "power", + pin326: "ground", + pin117: "ground", + pin159: "ground", + pin180: "power", + pin201: "ground", + pin222: "power", + pin243: "ground", + pin139: "ground", + pin160: "power", + pin181: "ground", + pin202: "power", + pin223: "ground", + pin244: "power", + pin265: "ground", + pin307: "ground", + pin14: "ground", + pin119: "ground", + pin161: "ground", + pin182: "power", + pin203: "ground", + pin224: "power", + pin245: "power", + pin266: "power", + pin371: "ground", + pin141: "ground", + pin183: "ground", + pin246: "ground", + pin267: "power", + pin288: "power", + pin309: "power", + pin163: "ground", + pin205: "ground", + pin226: "ground", + pin247: "power", + pin310: "ground", + pin331: "ground", + pin59: "ground", + pin354: "ground", + pin208: "ground", + pin376: "ground", + pin293: "ground", + pin356: "ground", + pin398: "ground", +} as const; + +const pinAttributes = { + pin85: { + requiresGround: true, + }, + pin106: { + requiresGround: true, + }, + pin421: { + requiresGround: true, + }, + pin21: { + requiresGround: true, + }, + pin378: { + requiresGround: true, + }, + pin45: { + requiresGround: true, + }, + pin192: { + requiresGround: true, + }, + pin4: { + requiresGround: true, + }, + pin215: { + requiresGround: true, + }, + pin257: { + requiresGround: true, + }, + pin132: { + requiresPower: true, + }, + pin153: { + requiresGround: true, + }, + pin300: { + requiresGround: true, + }, + pin49: { + requiresGround: true, + }, + pin112: { + requiresPower: true, + }, + pin175: { + requiresGround: true, + }, + pin217: { + requiresPower: true, + }, + pin301: { + requiresPower: true, + }, + pin322: { + requiresGround: true, + }, + pin134: { + requiresPower: true, + }, + pin155: { + requiresGround: true, + }, + pin176: { + requiresPower: true, + }, + pin218: { + requiresGround: true, + }, + pin260: { + requiresPower: true, + }, + pin281: { + requiresPower: true, + }, + pin302: { + requiresPower: true, + }, + pin407: { + requiresGround: true, + }, + pin428: { + requiresGround: true, + }, + pin114: { + requiresPower: true, + }, + pin135: { + requiresGround: true, + }, + pin156: { + requiresPower: true, + }, + pin177: { + requiresGround: true, + }, + pin198: { + requiresPower: true, + }, + pin219: { + requiresPower: true, + }, + pin240: { + requiresPower: true, + }, + pin261: { + requiresPower: true, + }, + pin282: { + requiresGround: true, + }, + pin115: { + requiresGround: true, + }, + pin136: { + requiresPower: true, + }, + pin157: { + requiresGround: true, + }, + pin178: { + requiresPower: true, + }, + pin220: { + requiresPower: true, + }, + pin241: { + requiresPower: true, + }, + pin262: { + requiresPower: true, + }, + pin283: { + requiresPower: true, + }, + pin11: { + requiresGround: true, + }, + pin53: { + requiresGround: true, + }, + pin116: { + requiresPower: true, + }, + pin137: { + requiresGround: true, + }, + pin158: { + requiresPower: true, + }, + pin179: { + requiresGround: true, + }, + pin221: { + requiresPower: true, + }, + pin242: { + requiresPower: true, + }, + pin326: { + requiresGround: true, + }, + pin117: { + requiresGround: true, + }, + pin159: { + requiresGround: true, + }, + pin180: { + requiresPower: true, + }, + pin201: { + requiresGround: true, + }, + pin222: { + requiresPower: true, + }, + pin243: { + requiresGround: true, + }, + pin139: { + requiresGround: true, + }, + pin160: { + requiresPower: true, + }, + pin181: { + requiresGround: true, + }, + pin202: { + requiresPower: true, + }, + pin223: { + requiresGround: true, + }, + pin244: { + requiresPower: true, + }, + pin265: { + requiresGround: true, + }, + pin307: { + requiresGround: true, + }, + pin14: { + requiresGround: true, + }, + pin119: { + requiresGround: true, + }, + pin161: { + requiresGround: true, + }, + pin182: { + requiresPower: true, + }, + pin203: { + requiresGround: true, + }, + pin224: { + requiresPower: true, + }, + pin245: { + requiresPower: true, + }, + pin266: { + requiresPower: true, + }, + pin371: { + requiresGround: true, + }, + pin141: { + requiresGround: true, + }, + pin183: { + requiresGround: true, + }, + pin246: { + requiresGround: true, + }, + pin267: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin309: { + requiresPower: true, + }, + pin163: { + requiresGround: true, + }, + pin205: { + requiresGround: true, + }, + pin226: { + requiresGround: true, + }, + pin247: { + requiresPower: true, + }, + pin310: { + requiresGround: true, + }, + pin331: { + requiresGround: true, + }, + pin59: { + requiresGround: true, + }, + pin354: { + requiresGround: true, + }, + pin208: { + requiresGround: true, + }, + pin376: { + requiresGround: true, + }, + pin293: { + requiresGround: true, + }, + pin356: { + requiresGround: true, + }, + pin398: { + requiresGround: true, + }, +} as const; + +export const AM6442BSEFHAALV = (props: ChipProps) => { + return ( + + ); +}; + +export default AM6442BSEFHAALV; diff --git a/lib/chips/AM67A74AKGHIAMWR.circuit.tsx b/lib/chips/AM67A74AKGHIAMWR.circuit.tsx new file mode 100644 index 00000000..164d5dd7 --- /dev/null +++ b/lib/chips/AM67A74AKGHIAMWR.circuit.tsx @@ -0,0 +1,5619 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A21", "A1", "A21_A1"], + pin2: ["WKUP_LFOSC0_XO", "A2"], + pin3: ["WKUP_LFOSC0_XI", "A3"], + pin4: ["VSS", "A4", "VSS_A4"], + pin5: ["MCU_OSC0_XI", "A5"], + pin6: ["MCU_OSC0_XO", "A6"], + pin7: ["VSS", "A7", "VSS_A7"], + pin8: ["PMIC_LPM_EN0", "A8"], + pin9: ["MCU_SPI0_CLK", "A9"], + pin10: ["MCU_PADCONFIG1", "A10"], + pin11: ["TCK", "A11"], + pin12: ["SERDES1_TX0_N", "A13"], + pin13: ["SERDES1_TX0_P", "A14"], + pin14: ["SERDES0_REFCLK0P", "A16"], + pin15: ["SERDES0_REFCLK0N", "A17"], + pin16: ["VSS", "A18", "VSS_A18"], + pin17: ["SERDES0_RX0_P", "A19"], + pin18: ["SERDES0_RX0_N", "A20"], + pin19: ["VSS", "A21", "VSS_A21"], + pin20: ["PADCONFIG123", "A22"], + pin21: ["EXT_REFCLK1", "A23"], + pin22: ["MMC1_SDWP", "A24"], + pin23: ["MCASP0_AXR3", "A25"], + pin24: ["MCASP0_AXR2", "A26"], + pin25: ["A21", "A27", "A21_A27"], + pin26: ["MCU_PADCONFIG16", "B1"], + pin27: ["MCU_MCAN0_TX", "B2"], + pin28: ["WKUP_UART0_RXD", "B3"], + pin29: ["MCU_UART0_TXD", "B4"], + pin30: ["MCU_PADCONFIG7", "B5"], + pin31: ["RSVD16", "B6"], + pin32: ["MCU_ERRORN", "B7"], + pin33: ["MCU_UART0_RXD", "B8"], + pin34: ["WKUP_I2C0_SCL", "B9"], + pin35: ["TRSTN", "B10"], + pin36: ["MCU_SPI0_D0", "B12"], + pin37: ["MCU_I2C0_SCL", "B13"], + pin38: ["SERDES1_REFCLK0N", "B15"], + pin39: ["SERDES1_REFCLK0P", "B16"], + pin40: ["SERDES0_TX0_P", "B18"], + pin41: ["SERDES0_TX0_N", "B19"], + pin42: ["SPI0_CS0", "B20"], + pin43: ["UART0_RTSN", "B21"], + pin44: ["PADCONFIG121", "B22"], + pin45: ["EXTINTN", "B23"], + pin46: ["PADCONFIG144", "B24"], + pin47: ["MCASP0_AXR1", "B25"], + pin48: ["USB1_DRVVBUS", "B27"], + pin49: ["MCU_MCAN1_TX", "C1"], + pin50: ["VSS", "C2", "VSS_C2"], + pin51: ["MCU_PADCONFIG12", "C3"], + pin52: ["MCU_PADCONFIG11", "C4"], + pin53: ["MCU_UART0_RTSN", "C5"], + pin54: ["RSVD14", "C6"], + pin55: ["WKUP_UART0_TXD", "C8"], + pin56: ["EMU0", "C9"], + pin57: ["MCU_SPI0_D1", "C11"], + pin58: ["MCU_SPI0_CS0", "C12"], + pin59: ["SERDES1_RX0_N", "C14"], + pin60: ["SERDES1_RX0_P", "C15"], + pin61: ["RSVD17", "C17"], + pin62: ["SPI0_CS1", "C20"], + pin63: ["PADCONFIG119", "C22"], + pin64: ["VSS", "C23", "VSS_C23"], + pin65: ["I2C1_SCL", "C24"], + pin66: ["MCASP0_AFSX", "C26"], + pin67: ["MCASP0_AFSR", "C27"], + pin68: ["VDDSHV_MCU", "D1", "VDDSHV_MCU_D1"], + pin69: ["DDR0_DQ1", "D2"], + pin70: ["DDR0_DQ3", "D3"], + pin71: ["DDR0_DQ0", "D6"], + pin72: ["MCU_PADCONFIG14", "D8"], + pin73: ["MCU_RESETZ", "D10"], + pin74: ["WKUP_I2C0_SDA", "D11"], + pin75: ["RSVD20", "D13"], + pin76: ["RSVD19", "D14"], + pin77: ["RSVD18", "D16"], + pin78: ["USB1_DP", "D17"], + pin79: ["SPI0_CLK", "D20"], + pin80: ["PADCONFIG118", "D22"], + pin81: ["I2C0_SCL", "D23"], + pin82: ["MCASP0_ACLKX", "D25"], + pin83: ["A21", "D26", "A21_D26"], + pin84: ["PORZ_OUT", "D27"], + pin85: ["DDR0_DQS0", "E1"], + pin86: ["DDR0_DQ5", "E2"], + pin87: ["VSS", "E6", "VSS_E6"], + pin88: ["MCU_PORZ", "E8"], + pin89: ["RSVD0", "E9"], + pin90: ["MCU_I2C0_SDA", "E11"], + pin91: ["TDI", "E12"], + pin92: ["MCU_RESETSTATZ", "E13"], + pin93: ["SERDES0_REXT", "E15"], + pin94: ["USB1_DM", "E17"], + pin95: ["USB1_RCALIB", "E18"], + pin96: ["PADCONFIG112", "E19"], + pin97: ["PADCONFIG113", "E20"], + pin98: ["UART0_CTSN", "E22"], + pin99: ["USB0_DRVVBUS", "E25"], + pin100: ["RESET_REQZ", "E26"], + pin101: ["RESETSTATZ", "E27"], + pin102: ["DDR0_DQS0_N", "F1"], + pin103: ["VSS", "F2", "VSS_F2"], + pin104: ["DDR0_DQ7", "F3"], + pin105: ["DDR0_DQ2", "F6"], + pin106: ["RSVD15", "F8"], + pin107: ["EMU1", "F9"], + pin108: ["TDO", "F10"], + pin109: ["TMS", "F11"], + pin110: ["WKUP_CLKOUT0", "F12"], + pin111: ["SERDES1_REXT", "F14"], + pin112: ["VSS", "F15", "VSS_F15"], + pin113: ["A21", "F16", "A21_F16"], + pin114: ["VSS", "F17", "VSS_F17"], + pin115: ["USB1_VBUS", "F18"], + pin116: ["UART0_RXD", "F19"], + pin117: ["UART0_TXD", "F20"], + pin118: ["VSS", "F21", "VSS_F21"], + pin119: ["MCASP0_AXR0", "F23"], + pin120: ["PADCONFIG108", "F24"], + pin121: ["PCIE0_CLKREQN", "F25"], + pin122: ["PADCONFIG73", "F26"], + pin123: ["PADCONFIG72", "F27"], + pin124: ["VSS", "G1", "VSS_G1"], + pin125: ["DDR0_DM0", "G2"], + pin126: ["A21", "G3", "A21_G3"], + pin127: ["DDR0_DQ4", "G4"], + pin128: ["VSS", "G5", "VSS_G5"], + pin129: ["DDR0_DQ6", "G6"], + pin130: ["VMON_ER_VSYS", "G7"], + pin131: ["VSS", "G8", "VSS_G8"], + pin132: ["VPP", "G9"], + pin133: ["VSS", "G10", "VSS_G10"], + pin134: ["VDDA_MCU", "G11", "VDDA_MCU_G11"], + pin135: ["VSS", "G12", "VSS_G12"], + pin136: ["VDDA_1P8_SERDES", "G13"], + pin137: ["VSS", "G14", "VSS_G14"], + pin138: ["VDDA_3P3_USB1", "G15"], + pin139: ["VSS", "G16", "VSS_G16"], + pin140: ["VSS", "G17", "VSS_G17"], + pin141: ["VDDSHV0", "G18", "VDDSHV0_G18"], + pin142: ["CAP_VDDS5", "G19"], + pin143: ["VSS", "G20", "VSS_G20"], + pin144: ["PADCONFIG69", "G26"], + pin145: ["PADCONFIG68", "G27"], + pin146: ["DDR0_DQS1", "H1"], + pin147: ["DDR0_DQ9", "H2"], + pin148: ["DDR0_DQ15", "H3"], + pin149: ["VSS", "H4", "VSS_H4"], + pin150: ["DDR0_DQ8", "H5"], + pin151: ["DDR0_DM1", "H6"], + pin152: ["VSS", "H7", "VSS_H7"], + pin153: ["CAP_VDDS_CANUART", "H8"], + pin154: ["VDDSHV_CANUART", "H9"], + pin155: ["VDDSHV_MCU", "H10", "VDDSHV_MCU_H10"], + pin156: ["VDDA_MCU", "H11", "VDDA_MCU_H11"], + pin157: ["VDDA_0P85_SERDES", "H12", "VDDA_0P85_SERDES_H12"], + pin158: ["VDDA_0P85_SERDES", "H13", "VDDA_0P85_SERDES_H13"], + pin159: ["A21", "H14", "A21_H14"], + pin160: ["VDDA_CORE_USB1", "H15"], + pin161: ["VDDA_1P8_USB1", "H16"], + pin162: ["CAP_VDDS0", "H17"], + pin163: ["VDDSHV0", "H18", "VDDSHV0_H18"], + pin164: ["VDDSHV5", "H19"], + pin165: ["PADCONFIG139", "H20"], + pin166: ["PADCONFIG74", "H21"], + pin167: ["PADCONFIG143", "H22"], + pin168: ["MMC1_DAT0", "H23"], + pin169: ["PADCONFIG141", "H24"], + pin170: ["PADCONFIG137", "H25"], + pin171: ["MMC2_CLK", "H26"], + pin172: ["MMC2_DAT2", "H27"], + pin173: ["DDR0_DQS1_N", "J1"], + pin174: ["DDR0_DQ14", "J2"], + pin175: ["VSS", "J3", "VSS_J3"], + pin176: ["DDR0_DQ13", "J4"], + pin177: ["VSS", "J5", "VSS_J5"], + pin178: ["DDR0_DQ12", "J6"], + pin179: ["VMON_1P8_SOC", "J7"], + pin180: ["VDD_CANUART", "J8", "VDD_CANUART_J8"], + pin181: ["VSS", "J9", "VSS_J9"], + pin182: ["CAP_VDDS_MCU", "J10"], + pin183: ["J16", "J11", "J16_J11"], + pin184: ["A21", "J12", "A21_J12"], + pin185: ["VDDA_0P85_SERDES_C", "J13"], + pin186: ["VDD_CANUART", "J14", "VDD_CANUART_J14"], + pin187: ["VSS", "J15", "VSS_J15"], + pin188: ["VDD_CANUART", "J16", "VDD_CANUART_J16"], + pin189: ["VSS", "J17", "VSS_J17"], + pin190: ["VDD_CANUART", "J18", "VDD_CANUART_J18"], + pin191: ["A21", "J19", "A21_J19"], + pin192: ["CAP_VDDS6", "J20"], + pin193: ["VDDSHV6", "J21"], + pin194: ["OSPI0_CSN3", "J22"], + pin195: ["PADCONFIG138", "J23"], + pin196: ["VSS", "J26", "VSS_J26"], + pin197: ["PADCONFIG66", "J27"], + pin198: ["VSS", "K1", "VSS_K1"], + pin199: ["DDR0_DQ10", "K2"], + pin200: ["VMON_3P3_SOC", "K7"], + pin201: ["VDDS_OSC0", "K8"], + pin202: ["VDD_CANUART", "K9", "VDD_CANUART_K9"], + pin203: ["VDDA_PLL1", "K10"], + pin204: ["VDD_CANUART", "K11", "VDD_CANUART_K11"], + pin205: ["VDD_CANUART", "K12", "VDD_CANUART_K12"], + pin206: ["VSS", "K13", "VSS_K13"], + pin207: ["VDD_CANUART", "K14", "VDD_CANUART_K14"], + pin208: ["VSS", "K15", "VSS_K15"], + pin209: ["J16", "K16", "J16_K16"], + pin210: ["VSS", "K17", "VSS_K17"], + pin211: ["VDD_CANUART", "K18", "VDD_CANUART_K18"], + pin212: ["VSS", "K19", "VSS_K19"], + pin213: ["VDDSHV1", "K20", "VDDSHV1_K20"], + pin214: ["OSPI0_CSN2", "K22"], + pin215: ["OSPI0_CSN1", "K23"], + pin216: ["OSPI0_CSN0", "K26"], + pin217: ["OSPI0_D0", "K27"], + pin218: ["DDR0_DQ11", "L1"], + pin219: ["DDR0_A5", "L2"], + pin220: ["DDR0_A3", "L3"], + pin221: ["DDR0_A0", "L4"], + pin222: ["RSVD10", "L5"], + pin223: ["DDR0_A1", "L6"], + pin224: ["VDDSHV_MCU", "L7", "VDDSHV_MCU_L7"], + pin225: ["VDDS_DDR", "L8", "VDDS_DDR_L8"], + pin226: ["VDDA_TEMP2", "L9"], + pin227: ["VSS", "L10", "VSS_L10"], + pin228: ["VSS", "L11", "VSS_L11"], + pin229: ["VDD_CANUART", "L12", "VDD_CANUART_L12"], + pin230: ["VSS", "L13", "VSS_L13"], + pin231: ["VSS", "L14", "VSS_L14"], + pin232: ["VDDA_PLL0", "L15"], + pin233: ["A21", "L16", "A21_L16"], + pin234: ["VDD_CANUART", "L17", "VDD_CANUART_L17"], + pin235: ["VSS", "L18", "VSS_L18"], + pin236: ["CAP_VDDS1", "L19"], + pin237: ["VDDSHV1", "L20", "VDDSHV1_L20"], + pin238: ["OSPI0_D4", "L21"], + pin239: ["OSPI0_DQS", "L22"], + pin240: ["OSPI0_LBCLKO", "L23"], + pin241: ["OSPI0_CLK", "L24"], + pin242: ["OSPI0_D3", "L25"], + pin243: ["OSPI0_D2", "L26"], + pin244: ["OSPI0_D1", "L27"], + pin245: ["VSS", "M1", "VSS_M1"], + pin246: ["RSVD21", "M2"], + pin247: ["DDR0_RAS_N", "M3"], + pin248: ["DDR0_CAS_N", "M4"], + pin249: ["DDR0_A2", "M5"], + pin250: ["RSVD11", "M6"], + pin251: ["VSS", "M7", "VSS_M7"], + pin252: ["VSS", "M8", "VSS_M8"], + pin253: ["VDD_CANUART", "M9", "VDD_CANUART_M9"], + pin254: ["VDD_CANUART", "M10", "VDD_CANUART_M10"], + pin255: ["VSS", "M11", "VSS_M11"], + pin256: ["VDDA_PLL2", "M12"], + pin257: ["VDDR_CORE", "M13", "VDDR_CORE_M13"], + pin258: ["VSS", "M14", "VSS_M14"], + pin259: ["VDD_CANUART", "M15", "VDD_CANUART_M15"], + pin260: ["VSS", "M16", "VSS_M16"], + pin261: ["VDD_CANUART", "M17", "VDD_CANUART_M17"], + pin262: ["VSS", "M18", "VSS_M18"], + pin263: ["VDDR_CORE", "M19", "VDDR_CORE_M19"], + pin264: ["VDDSHV3", "M20", "VDDSHV3_M20"], + pin265: ["OSPI0_D5", "M26"], + pin266: ["OSPI0_D7", "M27"], + pin267: ["DDR0_CK0_N", "N1"], + pin268: ["DDR0_A4", "N2"], + pin269: ["VDDS_DDR", "N7", "VDDS_DDR_N7"], + pin270: ["VDDS_DDR", "N8", "VDDS_DDR_N8"], + pin271: ["VSS", "N9", "VSS_N9"], + pin272: ["VDD_CANUART", "N10", "VDD_CANUART_N10"], + pin273: ["VDD_CANUART", "N11", "VDD_CANUART_N11"], + pin274: ["VSS", "N12", "VSS_N12"], + pin275: ["VDDR_CORE", "N13", "VDDR_CORE_N13"], + pin276: ["VDD_CANUART", "N14", "VDD_CANUART_N14"], + pin277: ["VSS", "N15", "VSS_N15"], + pin278: ["VDD_CANUART", "N16", "VDD_CANUART_N16"], + pin279: ["VSS", "N17", "VSS_N17"], + pin280: ["VDD_CANUART", "N18", "VDD_CANUART_N18"], + pin281: ["VDDR_CORE", "N19", "VDDR_CORE_N19"], + pin282: ["CAP_VDDS3", "N20"], + pin283: ["PADCONFIG33", "N21"], + pin284: ["GPMC0_OEN_REN", "N22"], + pin285: ["PADCONFIG35", "N23"], + pin286: ["PADCONFIG40", "N24"], + pin287: ["PADCONFIG41", "N25"], + pin288: ["VSS", "N26", "VSS_N26"], + pin289: ["OSPI0_D6", "N27"], + pin290: ["DDR0_CK0", "P1"], + pin291: ["DDR0_CKE0", "P2"], + pin292: ["DDR0_CS1_N", "P3"], + pin293: ["DDR0_CS0_N", "P4"], + pin294: ["VSS", "P5", "VSS_P5"], + pin295: ["DDR0_CKE1", "P6"], + pin296: ["VSS", "P7", "VSS_P7"], + pin297: ["VDDS_DDR_C", "P8"], + pin298: ["VDDA_DDR_PLL0", "P9"], + pin299: ["VSS", "P10", "VSS_P10"], + pin300: ["VDD_CANUART", "P11", "VDD_CANUART_P11"], + pin301: ["VDD_CORE", "P12", "VDD_CORE_P12"], + pin302: ["VSS", "P13", "VSS_P13"], + pin303: ["VDD_CORE", "P14", "VDD_CORE_P14"], + pin304: ["VSS", "P15", "VSS_P15"], + pin305: ["VDDA_PLL5", "P16"], + pin306: ["VSS", "P17", "VSS_P17"], + pin307: ["VDD_CORE", "P18", "VDD_CORE_P18"], + pin308: ["VSS", "P19", "VSS_P19"], + pin309: ["VDDSHV3", "P20", "VDDSHV3_P20"], + pin310: ["GPMC0_CSN1", "P21"], + pin311: ["PADCONFIG44", "P22"], + pin312: ["GPMC0_CSN3", "P23"], + pin313: ["PADCONFIG37", "P26"], + pin314: ["PADCONFIG36", "P27"], + pin315: ["VSS", "R1", "VSS_R1"], + pin316: ["DDR0_DQ17", "R2"], + pin317: ["DDR0_DQ20", "R3"], + pin318: ["VSS", "R4", "VSS_R4"], + pin319: ["DDR0_DQ18", "R5"], + pin320: ["DDR0_CAL0", "R6"], + pin321: ["VSS", "R7", "VSS_R7"], + pin322: ["VSS", "R8", "VSS_R8"], + pin323: ["VDD_CORE", "R9", "VDD_CORE_R9"], + pin324: ["VSS", "R10", "VSS_R10"], + pin325: ["VDDA_PLL3", "R11"], + pin326: ["VDD_CORE", "R12", "VDD_CORE_R12"], + pin327: ["VDD_CORE", "R13", "VDD_CORE_R13"], + pin328: ["VSS", "R14", "VSS_R14"], + pin329: ["VDD_CORE", "R15", "VDD_CORE_R15"], + pin330: ["VSS", "R16", "VSS_R16"], + pin331: ["VDD_CORE", "R17", "VDD_CORE_R17"], + pin332: ["VSS", "R18", "VSS_R18"], + pin333: ["VSS", "R19", "VSS_R19"], + pin334: ["VDDSHV3", "R20", "VDDSHV3_R20"], + pin335: ["GPMC0_AD0", "R22"], + pin336: ["GPMC0_AD1", "R23"], + pin337: ["GPMC0_AD2", "R26"], + pin338: ["GPMC0_CSN0", "R27"], + pin339: ["DDR0_DQS2", "T1"], + pin340: ["DDR0_DQ19", "T2"], + pin341: ["VDDS_DDR", "T7", "VDDS_DDR_T7"], + pin342: ["VDDS_DDR", "T8", "VDDS_DDR_T8"], + pin343: ["VDD_CORE", "T9", "VDD_CORE_T9"], + pin344: ["VSS", "T10", "VSS_T10"], + pin345: ["VDDA_TEMP1", "T11"], + pin346: ["VSS", "T12", "VSS_T12"], + pin347: ["VDD_CORE", "T13", "VDD_CORE_T13"], + pin348: ["VSS", "T14", "VSS_T14"], + pin349: ["VDD_CORE", "T15", "VDD_CORE_T15"], + pin350: ["VSS", "T16", "VSS_T16"], + pin351: ["VDD_CORE", "T17", "VDD_CORE_T17"], + pin352: ["VSS", "T18", "VSS_T18"], + pin353: ["VDDSHV2", "T19", "VDDSHV2_T19"], + pin354: ["VDDSHV2", "T20", "VDDSHV2_T20"], + pin355: ["GPMC0_AD6", "T21"], + pin356: ["GPMC0_AD7", "T22"], + pin357: ["GPMC0_CLK", "T23"], + pin358: ["GPMC0_AD5", "T24"], + pin359: ["GPMC0_AD4", "T25"], + pin360: ["VSS", "T26", "VSS_T26"], + pin361: ["GPMC0_AD3", "T27"], + pin362: ["DDR0_DQS2_N", "U1"], + pin363: ["DDR0_DQ21", "U2"], + pin364: ["VSS", "U3", "VSS_U3"], + pin365: ["DDR0_DM2", "U4"], + pin366: ["DDR0_DQ22", "U5"], + pin367: ["DDR0_RESET0_N", "U6"], + pin368: ["VSS", "U7", "VSS_U7"], + pin369: ["VDD_CORE", "U8", "VDD_CORE_U8"], + pin370: ["VSS", "U9", "VSS_U9"], + pin371: ["VDDR_CORE", "U10", "VDDR_CORE_U10"], + pin372: ["VSS", "U11", "VSS_U11"], + pin373: ["VDD_CORE", "U12", "VDD_CORE_U12"], + pin374: ["VSS", "U13", "VSS_U13"], + pin375: ["VDD_CORE", "U14", "VDD_CORE_U14"], + pin376: ["VSS", "U15", "VSS_U15"], + pin377: ["VDD_CORE", "U16", "VDD_CORE_U16"], + pin378: ["VDDR_CORE", "U17", "VDDR_CORE_U17"], + pin379: ["VSS", "U18", "VSS_U18"], + pin380: ["VSS", "U19", "VSS_U19"], + pin381: ["CAP_VDDS2", "U20"], + pin382: ["PADCONFIG24", "U26"], + pin383: ["PADCONFIG23", "U27"], + pin384: ["VSS", "V1", "VSS_V1"], + pin385: ["DDR0_DQ23", "V2"], + pin386: ["DDR0_DQ16", "V3"], + pin387: ["VSS", "V4", "VSS_V4"], + pin388: ["DDR0_DQ26", "V5"], + pin389: ["DDR0_DQ28", "V6"], + pin390: ["VSS", "V7", "VSS_V7"], + pin391: ["VDD_CORE", "V8", "VDD_CORE_V8"], + pin392: ["VSS", "V9", "VSS_V9"], + pin393: ["VDDR_CORE", "V10", "VDDR_CORE_V10"], + pin394: ["VSS", "V11", "VSS_V11"], + pin395: ["VDD_CORE", "V12", "VDD_CORE_V12"], + pin396: ["VSS", "V13", "VSS_V13"], + pin397: ["VDD_CORE", "V14", "VDD_CORE_V14"], + pin398: ["VSS", "V15", "VSS_V15"], + pin399: ["VDD_CORE", "V16", "VDD_CORE_V16"], + pin400: ["VDDR_CORE", "V17", "VDDR_CORE_V17"], + pin401: ["VDDA_PLL4", "V18"], + pin402: ["VDD_CORE", "V19", "VDD_CORE_V19"], + pin403: ["VSS", "V20", "VSS_V20"], + pin404: ["PADCONFIG38", "V21"], + pin405: ["GPMC0_AD14", "V22"], + pin406: ["GPMC0_AD15", "V23"], + pin407: ["GPMC0_AD13", "V24"], + pin408: ["GPMC0_AD11", "V25"], + pin409: ["GPMC0_AD12", "V26"], + pin410: ["GPMC0_AD10", "V27"], + pin411: ["DDR0_DQS3", "W1"], + pin412: ["DDR0_DQ27", "W2"], + pin413: ["DDR0_DQ29", "W3"], + pin414: ["DDR0_DQ25", "W4"], + pin415: ["VSS", "W5", "VSS_W5"], + pin416: ["USB0_VBUS", "W7"], + pin417: ["VSS", "W8", "VSS_W8"], + pin418: ["VDDA_0P85_DLL_MMC0", "W9"], + pin419: ["VDD_MMC0", "W10"], + pin420: ["VDDA_CORE_USB0", "W11"], + pin421: ["VSS", "W12", "VSS_W12"], + pin422: ["VDDA_1P8_CSI_DSI", "W13", "VDDA_1P8_CSI_DSI_W13"], + pin423: ["VSS", "W14", "VSS_W14"], + pin424: ["VDDA_CORE_CSI_DSI", "W15", "VDDA_CORE_CSI_DSI_W15"], + pin425: ["VDDA_1P8_CSI_DSI", "W16", "VDDA_1P8_CSI_DSI_W16"], + pin426: ["VSS", "W17", "VSS_W17"], + pin427: ["VDDA_1P8_OLDI0", "W18", "VDDA_1P8_OLDI0_W18"], + pin428: ["VDD_CORE", "W19", "VDD_CORE_W19"], + pin429: ["VSS", "W20", "VSS_W20"], + pin430: ["PADCONFIG51", "W21"], + pin431: ["PADCONFIG50", "W22"], + pin432: ["VOUT0_DATA3", "W23"], + pin433: ["VOUT0_DATA2", "W24"], + pin434: ["VOUT0_DATA1", "W25"], + pin435: ["GPMC0_WAIT1", "W26"], + pin436: ["VOUT0_DATA0", "W27"], + pin437: ["DDR0_DQS3_N", "Y1"], + pin438: ["DDR0_DQ24", "Y2"], + pin439: ["VSS", "Y7", "VSS_Y7"], + pin440: ["VSS", "Y8", "VSS_Y8"], + pin441: ["VDDS_MMC0", "Y9"], + pin442: ["VSS", "Y10", "VSS_Y10"], + pin443: ["VDDA_3P3_USB0", "Y11"], + pin444: ["VDDA_1P8_USB0", "Y12"], + pin445: ["VDDA_1P8_CSI_DSI", "Y13", "VDDA_1P8_CSI_DSI_Y13"], + pin446: ["VSS", "Y14", "VSS_Y14"], + pin447: ["VDDA_CORE_CSI_DSI", "Y15", "VDDA_CORE_CSI_DSI_Y15"], + pin448: ["VDDA_CORE_CSI_DSI_CLK", "Y16"], + pin449: ["VDDA_TEMP0", "Y17"], + pin450: ["VSS", "Y18", "VSS_Y18"], + pin451: ["VDDA_1P8_OLDI0", "Y19", "VDDA_1P8_OLDI0_Y19"], + pin452: ["VDD_CORE", "Y20", "VDD_CORE_Y20"], + pin453: ["VDD_CORE", "Y21", "VDD_CORE_Y21"], + pin454: ["VOUT0_DATA6", "Y26"], + pin455: ["VOUT0_DATA7", "Y27"], + pin456: ["VSS", "AA1", "VSS_AA1"], + pin457: ["DDR0_DM3", "AA2"], + pin458: ["DDR0_DQ30", "AA3"], + pin459: ["VSS", "AA4", "VSS_AA4"], + pin460: ["DDR0_DQ31", "AA5"], + pin461: ["USB0_DP", "AA6"], + pin462: ["USB0_RCALIB", "AA8"], + pin463: ["CSI1_RXRCALIB", "AA10"], + pin464: ["RSVD5", "AA12"], + pin465: ["RSVD9", "AA14"], + pin466: ["RSVD8", "AA15"], + pin467: ["DSI0_TXRCALIB", "AA16"], + pin468: ["VSS", "AA18", "VSS_AA18"], + pin469: ["RSVD1", "AA19"], + pin470: ["OLDI0_A7P", "AA20"], + pin471: ["A21", "AA21", "A21_AA21"], + pin472: ["VOUT0_DATA13", "AA22"], + pin473: ["PADCONFIG58", "AA23"], + pin474: ["VOUT0_DATA8", "AA24"], + pin475: ["PADCONFIG56", "AA25"], + pin476: ["VSS", "AA26", "VSS_AA26"], + pin477: ["VOUT0_DATA9", "AA27"], + pin478: ["L7", "AB1"], + pin479: ["MMC0_DAT7", "AB2"], + pin480: ["MMC0_DAT5", "AB3"], + pin481: ["MMC0_DAT2", "AB4"], + pin482: ["USB0_DM", "AB5"], + pin483: ["RSVD2", "AB7"], + pin484: ["CSI0_RXRCALIB", "AB8"], + pin485: ["RSVD4", "AB10"], + pin486: ["RSVD6", "AB12"], + pin487: ["RSVD7", "AB13"], + pin488: ["CSI2_RXRCALIB", "AB14"], + pin489: ["CSI3_RXRCALIB", "AB15"], + pin490: ["RSVD12", "AB16"], + pin491: ["RSVD13", "AB18"], + pin492: ["OLDI0_A7N", "AB19"], + pin493: ["OLDI0_A2N", "AB20"], + pin494: ["OLDI0_A2P", "AB21"], + pin495: ["PADCONFIG64", "AB23"], + pin496: ["VOUT0_HSYNC", "AB24"], + pin497: ["PADCONFIG57", "AB25"], + pin498: ["VOUT0_DATA14", "AB26"], + pin499: ["VOUT0_DATA15", "AB27"], + pin500: ["MMC0_CALPAD", "AC1"], + pin501: ["MMC0_DAT3", "AC2"], + pin502: ["MMC0_DAT4", "AC3"], + pin503: ["RSVD3", "AC5"], + pin504: ["CSI0_RXCLKP", "AC6"], + pin505: ["CSI0_RXCLKN", "AC7"], + pin506: ["CSI1_RXP3", "AC9"], + pin507: ["CSI1_RXN3", "AC10"], + pin508: ["CSI2_RXP3", "AC12"], + pin509: ["CSI2_RXN3", "AC13"], + pin510: ["CSI3_RXN3", "AC15"], + pin511: ["CSI3_RXP3", "AC16"], + pin512: ["DSI0_TXN3", "AC18"], + pin513: ["DSI0_TXP3", "AC19"], + pin514: ["OLDI0_A4P", "AC21"], + pin515: ["MDIO0_MDC", "AC24"], + pin516: ["RGMII1_RD0", "AC25"], + pin517: ["VOUT0_PCLK", "AC26"], + pin518: ["VOUT0_DE", "AC27"], + pin519: ["MMC0_DS", "AD1"], + pin520: ["MMC0_DAT1", "AD2"], + pin521: ["MMC0_DAT0", "AD3"], + pin522: ["CSI0_RXP0", "AD5"], + pin523: ["CSI0_RXN0", "AD6"], + pin524: ["CSI1_RXP2", "AD8"], + pin525: ["CSI1_RXN2", "AD9"], + pin526: ["CSI2_RXN2", "AD11"], + pin527: ["CSI2_RXP2", "AD12"], + pin528: ["CSI3_RXP2", "AD14"], + pin529: ["CSI3_RXN2", "AD15"], + pin530: ["DSI0_TXN0", "AD17"], + pin531: ["DSI0_TXP0", "AD18"], + pin532: ["OLDI0_CLK1N", "AD20"], + pin533: ["OLDI0_A4N", "AD21"], + pin534: ["RGMII1_RX_CTL", "AD23"], + pin535: ["MDIO0_MDIO", "AD25"], + pin536: ["VSS", "AD26", "VSS_AD26"], + pin537: ["RGMII1_RD1", "AD27"], + pin538: ["MMC0_CLK", "AE1"], + pin539: ["MMC0_CMD", "AE2"], + pin540: ["CSI0_RXP1", "AE4"], + pin541: ["CSI0_RXN1", "AE5"], + pin542: ["CSI1_RXP1", "AE7"], + pin543: ["CSI1_RXN1", "AE8"], + pin544: ["CSI2_RXN1", "AE10"], + pin545: ["CSI2_RXP1", "AE11"], + pin546: ["CSI3_RXP1", "AE13"], + pin547: ["CSI3_RXN1", "AE14"], + pin548: ["DSI0_TXCLKN", "AE16"], + pin549: ["DSI0_TXCLKP", "AE17"], + pin550: ["OLDI0_CLK1P", "AE19"], + pin551: ["OLDI0_CLK0P", "AE20"], + pin552: ["RGMII1_TD1", "AE23"], + pin553: ["RGMII1_RD2", "AE24"], + pin554: ["RGMII1_RD3", "AE26"], + pin555: ["RGMII1_RXC", "AE27"], + pin556: ["MMC0_DAT6", "AF1"], + pin557: ["CSI0_RXP2", "AF3"], + pin558: ["CSI0_RXN2", "AF4"], + pin559: ["CSI1_RXP0", "AF6"], + pin560: ["CSI1_RXN0", "AF7"], + pin561: ["CSI2_RXN0", "AF9"], + pin562: ["CSI2_RXP0", "AF10"], + pin563: ["CSI3_RXP0", "AF12"], + pin564: ["CSI3_RXN0", "AF13"], + pin565: ["DSI0_TXN1", "AF15"], + pin566: ["DSI0_TXP1", "AF16"], + pin567: ["OLDI0_A5P", "AF18"], + pin568: ["OLDI0_A5N", "AF19"], + pin569: ["OLDI0_CLK0N", "AF21"], + pin570: ["OLDI0_A0N", "AF23"], + pin571: ["RGMII1_TD3", "AF24"], + pin572: ["RGMII1_TX_CTL", "AF25"], + pin573: ["RGMII1_TD0", "AF27"], + pin574: ["A21", "AG1", "A21_AG1"], + pin575: ["CSI0_RXP3", "AG2"], + pin576: ["CSI0_RXN3", "AG3"], + pin577: ["CSI1_RXCLKP", "AG5"], + pin578: ["CSI1_RXCLKN", "AG6"], + pin579: ["CSI2_RXCLKN", "AG8"], + pin580: ["CSI2_RXCLKP", "AG9"], + pin581: ["CSI3_RXCLKP", "AG11"], + pin582: ["CSI3_RXCLKN", "AG12"], + pin583: ["DSI0_TXN2", "AG14"], + pin584: ["DSI0_TXP2", "AG15"], + pin585: ["OLDI0_A6N", "AG17"], + pin586: ["OLDI0_A6P", "AG18"], + pin587: ["OLDI0_A3N", "AG20"], + pin588: ["OLDI0_A3P", "AG21"], + pin589: ["OLDI0_A1N", "AG22"], + pin590: ["OLDI0_A1P", "AG23"], + pin591: ["OLDI0_A0P", "AG24"], + pin592: ["RGMII1_TD2", "AG25"], + pin593: ["RGMII1_TXC", "AG26"], + pin594: ["VSS", "AG27", "VSS_AG27"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "unknown", + pin3: "unknown", + pin4: "ground", + pin5: "unknown", + pin6: "unknown", + pin7: "ground", + pin8: "control", + pin9: "control", + pin10: "unknown", + pin11: "unknown", + pin12: "output", + pin13: "output", + pin14: "unknown", + pin15: "unknown", + pin16: "ground", + pin17: "input", + pin18: "input", + pin19: "ground", + pin20: "unknown", + pin21: "unknown", + pin22: "unknown", + pin23: "unknown", + pin24: "unknown", + pin25: "unknown", + pin26: "unknown", + pin27: "output", + pin28: "input", + pin29: "output", + pin30: "unknown", + pin31: "no-connect", + pin32: "unknown", + pin33: "input", + pin34: "control", + pin35: "unknown", + pin36: "unknown", + pin37: "control", + pin38: "unknown", + pin39: "unknown", + pin40: "output", + pin41: "output", + pin42: "control", + pin43: "unknown", + pin44: "unknown", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "output", + pin49: "output", + pin50: "ground", + pin51: "unknown", + pin52: "unknown", + pin53: "unknown", + pin54: "no-connect", + pin55: "output", + pin56: "unknown", + pin57: "unknown", + pin58: "control", + pin59: "input", + pin60: "input", + pin61: "no-connect", + pin62: "control", + pin63: "unknown", + pin64: "ground", + pin65: "control", + pin66: "unknown", + pin67: "unknown", + pin68: "power", + pin69: "bidirectional", + pin70: "bidirectional", + pin71: "bidirectional", + pin72: "unknown", + pin73: "control", + pin74: "bidirectional", + pin75: "no-connect", + pin76: "no-connect", + pin77: "no-connect", + pin78: "unknown", + pin79: "control", + pin80: "unknown", + pin81: "control", + pin82: "unknown", + pin83: "unknown", + pin84: "output", + pin85: "bidirectional", + pin86: "bidirectional", + pin87: "ground", + pin88: "unknown", + pin89: "no-connect", + pin90: "bidirectional", + pin91: "unknown", + pin92: "control", + pin93: "unknown", + pin94: "unknown", + pin95: "unknown", + pin96: "unknown", + pin97: "unknown", + pin98: "unknown", + pin99: "output", + pin100: "control", + pin101: "control", + pin102: "bidirectional", + pin103: "ground", + pin104: "bidirectional", + pin105: "bidirectional", + pin106: "no-connect", + pin107: "unknown", + pin108: "unknown", + pin109: "unknown", + pin110: "control", + pin111: "unknown", + pin112: "ground", + pin113: "unknown", + pin114: "ground", + pin115: "power", + pin116: "input", + pin117: "output", + pin118: "ground", + pin119: "unknown", + pin120: "unknown", + pin121: "control", + pin122: "unknown", + pin123: "unknown", + pin124: "ground", + pin125: "unknown", + pin126: "unknown", + pin127: "bidirectional", + pin128: "ground", + pin129: "bidirectional", + pin130: "power", + pin131: "ground", + pin132: "power", + pin133: "ground", + pin134: "power", + pin135: "ground", + pin136: "power", + pin137: "ground", + pin138: "power", + pin139: "ground", + pin140: "ground", + pin141: "power", + pin142: "power", + pin143: "ground", + pin144: "unknown", + pin145: "unknown", + pin146: "bidirectional", + pin147: "bidirectional", + pin148: "bidirectional", + pin149: "ground", + pin150: "bidirectional", + pin151: "unknown", + pin152: "ground", + pin153: "power", + pin154: "power", + pin155: "power", + pin156: "power", + pin157: "power", + pin158: "power", + pin159: "unknown", + pin160: "power", + pin161: "power", + pin162: "power", + pin163: "power", + pin164: "power", + pin165: "unknown", + pin166: "unknown", + pin167: "unknown", + pin168: "unknown", + pin169: "unknown", + pin170: "unknown", + pin171: "control", + pin172: "unknown", + pin173: "bidirectional", + pin174: "bidirectional", + pin175: "ground", + pin176: "bidirectional", + pin177: "ground", + pin178: "bidirectional", + pin179: "power", + pin180: "power", + pin181: "ground", + pin182: "power", + pin183: "unknown", + pin184: "unknown", + pin185: "power", + pin186: "power", + pin187: "ground", + pin188: "power", + pin189: "ground", + pin190: "power", + pin191: "unknown", + pin192: "power", + pin193: "power", + pin194: "control", + pin195: "unknown", + pin196: "ground", + pin197: "unknown", + pin198: "ground", + pin199: "bidirectional", + pin200: "power", + pin201: "power", + pin202: "power", + pin203: "power", + pin204: "power", + pin205: "power", + pin206: "ground", + pin207: "power", + pin208: "ground", + pin209: "unknown", + pin210: "ground", + pin211: "power", + pin212: "ground", + pin213: "power", + pin214: "control", + pin215: "control", + pin216: "control", + pin217: "unknown", + pin218: "bidirectional", + pin219: "unknown", + pin220: "unknown", + pin221: "unknown", + pin222: "no-connect", + pin223: "unknown", + pin224: "power", + pin225: "power", + pin226: "power", + pin227: "ground", + pin228: "ground", + pin229: "power", + pin230: "ground", + pin231: "ground", + pin232: "power", + pin233: "unknown", + pin234: "power", + pin235: "ground", + pin236: "power", + pin237: "power", + pin238: "unknown", + pin239: "bidirectional", + pin240: "unknown", + pin241: "control", + pin242: "unknown", + pin243: "unknown", + pin244: "unknown", + pin245: "ground", + pin246: "no-connect", + pin247: "unknown", + pin248: "unknown", + pin249: "unknown", + pin250: "no-connect", + pin251: "ground", + pin252: "ground", + pin253: "power", + pin254: "power", + pin255: "ground", + pin256: "power", + pin257: "power", + pin258: "ground", + pin259: "power", + pin260: "ground", + pin261: "power", + pin262: "ground", + pin263: "power", + pin264: "power", + pin265: "unknown", + pin266: "unknown", + pin267: "unknown", + pin268: "unknown", + pin269: "power", + pin270: "power", + pin271: "ground", + pin272: "power", + pin273: "power", + pin274: "ground", + pin275: "power", + pin276: "power", + pin277: "ground", + pin278: "power", + pin279: "ground", + pin280: "power", + pin281: "power", + pin282: "power", + pin283: "unknown", + pin284: "control", + pin285: "unknown", + pin286: "unknown", + pin287: "unknown", + pin288: "ground", + pin289: "unknown", + pin290: "unknown", + pin291: "unknown", + pin292: "control", + pin293: "control", + pin294: "ground", + pin295: "unknown", + pin296: "ground", + pin297: "power", + pin298: "power", + pin299: "ground", + pin300: "power", + pin301: "power", + pin302: "ground", + pin303: "power", + pin304: "ground", + pin305: "power", + pin306: "ground", + pin307: "power", + pin308: "ground", + pin309: "power", + pin310: "control", + pin311: "unknown", + pin312: "control", + pin313: "unknown", + pin314: "unknown", + pin315: "ground", + pin316: "bidirectional", + pin317: "bidirectional", + pin318: "ground", + pin319: "bidirectional", + pin320: "unknown", + pin321: "ground", + pin322: "ground", + pin323: "power", + pin324: "ground", + pin325: "power", + pin326: "power", + pin327: "power", + pin328: "ground", + pin329: "power", + pin330: "ground", + pin331: "power", + pin332: "ground", + pin333: "ground", + pin334: "power", + pin335: "unknown", + pin336: "unknown", + pin337: "unknown", + pin338: "control", + pin339: "bidirectional", + pin340: "bidirectional", + pin341: "power", + pin342: "power", + pin343: "power", + pin344: "ground", + pin345: "power", + pin346: "ground", + pin347: "power", + pin348: "ground", + pin349: "power", + pin350: "ground", + pin351: "power", + pin352: "ground", + pin353: "power", + pin354: "power", + pin355: "unknown", + pin356: "unknown", + pin357: "control", + pin358: "unknown", + pin359: "unknown", + pin360: "ground", + pin361: "unknown", + pin362: "bidirectional", + pin363: "bidirectional", + pin364: "ground", + pin365: "unknown", + pin366: "bidirectional", + pin367: "control", + pin368: "ground", + pin369: "power", + pin370: "ground", + pin371: "power", + pin372: "ground", + pin373: "power", + pin374: "ground", + pin375: "power", + pin376: "ground", + pin377: "power", + pin378: "power", + pin379: "ground", + pin380: "ground", + pin381: "power", + pin382: "unknown", + pin383: "unknown", + pin384: "ground", + pin385: "bidirectional", + pin386: "bidirectional", + pin387: "ground", + pin388: "bidirectional", + pin389: "bidirectional", + pin390: "ground", + pin391: "power", + pin392: "ground", + pin393: "power", + pin394: "ground", + pin395: "power", + pin396: "ground", + pin397: "power", + pin398: "ground", + pin399: "power", + pin400: "power", + pin401: "power", + pin402: "power", + pin403: "ground", + pin404: "unknown", + pin405: "unknown", + pin406: "unknown", + pin407: "unknown", + pin408: "unknown", + pin409: "unknown", + pin410: "unknown", + pin411: "bidirectional", + pin412: "bidirectional", + pin413: "bidirectional", + pin414: "bidirectional", + pin415: "ground", + pin416: "power", + pin417: "ground", + pin418: "power", + pin419: "power", + pin420: "power", + pin421: "ground", + pin422: "control", + pin423: "ground", + pin424: "control", + pin425: "control", + pin426: "ground", + pin427: "power", + pin428: "power", + pin429: "ground", + pin430: "unknown", + pin431: "unknown", + pin432: "bidirectional", + pin433: "bidirectional", + pin434: "bidirectional", + pin435: "unknown", + pin436: "bidirectional", + pin437: "bidirectional", + pin438: "bidirectional", + pin439: "ground", + pin440: "ground", + pin441: "power", + pin442: "ground", + pin443: "power", + pin444: "power", + pin445: "control", + pin446: "ground", + pin447: "control", + pin448: "control", + pin449: "power", + pin450: "ground", + pin451: "power", + pin452: "power", + pin453: "power", + pin454: "bidirectional", + pin455: "bidirectional", + pin456: "ground", + pin457: "unknown", + pin458: "bidirectional", + pin459: "ground", + pin460: "bidirectional", + pin461: "unknown", + pin462: "unknown", + pin463: "control", + pin464: "no-connect", + pin465: "no-connect", + pin466: "no-connect", + pin467: "output", + pin468: "ground", + pin469: "no-connect", + pin470: "unknown", + pin471: "unknown", + pin472: "bidirectional", + pin473: "unknown", + pin474: "bidirectional", + pin475: "unknown", + pin476: "ground", + pin477: "bidirectional", + pin478: "unknown", + pin479: "unknown", + pin480: "unknown", + pin481: "unknown", + pin482: "unknown", + pin483: "no-connect", + pin484: "control", + pin485: "no-connect", + pin486: "no-connect", + pin487: "no-connect", + pin488: "control", + pin489: "control", + pin490: "no-connect", + pin491: "no-connect", + pin492: "unknown", + pin493: "unknown", + pin494: "unknown", + pin495: "unknown", + pin496: "output", + pin497: "unknown", + pin498: "bidirectional", + pin499: "bidirectional", + pin500: "unknown", + pin501: "unknown", + pin502: "unknown", + pin503: "no-connect", + pin504: "control", + pin505: "control", + pin506: "control", + pin507: "control", + pin508: "control", + pin509: "control", + pin510: "control", + pin511: "control", + pin512: "output", + pin513: "output", + pin514: "unknown", + pin515: "unknown", + pin516: "unknown", + pin517: "output", + pin518: "output", + pin519: "unknown", + pin520: "unknown", + pin521: "unknown", + pin522: "control", + pin523: "control", + pin524: "control", + pin525: "control", + pin526: "control", + pin527: "control", + pin528: "control", + pin529: "control", + pin530: "output", + pin531: "output", + pin532: "control", + pin533: "unknown", + pin534: "input", + pin535: "unknown", + pin536: "ground", + pin537: "unknown", + pin538: "control", + pin539: "unknown", + pin540: "control", + pin541: "control", + pin542: "control", + pin543: "control", + pin544: "control", + pin545: "control", + pin546: "control", + pin547: "control", + pin548: "output", + pin549: "output", + pin550: "control", + pin551: "control", + pin552: "unknown", + pin553: "unknown", + pin554: "unknown", + pin555: "input", + pin556: "unknown", + pin557: "control", + pin558: "control", + pin559: "control", + pin560: "control", + pin561: "control", + pin562: "control", + pin563: "control", + pin564: "control", + pin565: "output", + pin566: "output", + pin567: "unknown", + pin568: "unknown", + pin569: "control", + pin570: "unknown", + pin571: "unknown", + pin572: "output", + pin573: "unknown", + pin574: "unknown", + pin575: "control", + pin576: "control", + pin577: "control", + pin578: "control", + pin579: "control", + pin580: "control", + pin581: "control", + pin582: "control", + pin583: "output", + pin584: "output", + pin585: "unknown", + pin586: "unknown", + pin587: "unknown", + pin588: "unknown", + pin589: "unknown", + pin590: "unknown", + pin591: "unknown", + pin592: "unknown", + pin593: "output", + pin594: "ground", +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin7: { requiresGround: true }, + pin16: { requiresGround: true }, + pin19: { requiresGround: true }, + pin31: { doNotConnect: true }, + pin50: { requiresGround: true }, + pin54: { doNotConnect: true }, + pin61: { doNotConnect: true }, + pin64: { requiresGround: true }, + pin68: { requiresPower: true }, + pin75: { doNotConnect: true }, + pin76: { doNotConnect: true }, + pin77: { doNotConnect: true }, + pin87: { requiresGround: true }, + pin89: { doNotConnect: true }, + pin103: { requiresGround: true }, + pin106: { doNotConnect: true }, + pin112: { requiresGround: true }, + pin114: { requiresGround: true }, + pin115: { requiresPower: true }, + pin118: { requiresGround: true }, + pin124: { requiresGround: true }, + pin128: { requiresGround: true }, + pin130: { requiresPower: true }, + pin131: { requiresGround: true }, + pin132: { requiresPower: true }, + pin133: { requiresGround: true }, + pin134: { requiresPower: true }, + pin135: { requiresGround: true }, + pin136: { requiresPower: true }, + pin137: { requiresGround: true }, + pin138: { requiresPower: true }, + pin139: { requiresGround: true }, + pin140: { requiresGround: true }, + pin141: { requiresPower: true }, + pin142: { requiresPower: true }, + pin143: { requiresGround: true }, + pin149: { requiresGround: true }, + pin152: { requiresGround: true }, + pin153: { requiresPower: true }, + pin154: { requiresPower: true }, + pin155: { requiresPower: true }, + pin156: { requiresPower: true }, + pin157: { requiresPower: true }, + pin158: { requiresPower: true }, + pin160: { requiresPower: true }, + pin161: { requiresPower: true }, + pin162: { requiresPower: true }, + pin163: { requiresPower: true }, + pin164: { requiresPower: true }, + pin175: { requiresGround: true }, + pin177: { requiresGround: true }, + pin179: { requiresPower: true }, + pin180: { requiresPower: true }, + pin181: { requiresGround: true }, + pin182: { requiresPower: true }, + pin185: { requiresPower: true }, + pin186: { requiresPower: true }, + pin187: { requiresGround: true }, + pin188: { requiresPower: true }, + pin189: { requiresGround: true }, + pin190: { requiresPower: true }, + pin192: { requiresPower: true }, + pin193: { requiresPower: true }, + pin196: { requiresGround: true }, + pin198: { requiresGround: true }, + pin200: { requiresPower: true }, + pin201: { requiresPower: true }, + pin202: { requiresPower: true }, + pin203: { requiresPower: true }, + pin204: { requiresPower: true }, + pin205: { requiresPower: true }, + pin206: { requiresGround: true }, + pin207: { requiresPower: true }, + pin208: { requiresGround: true }, + pin210: { requiresGround: true }, + pin211: { requiresPower: true }, + pin212: { requiresGround: true }, + pin213: { requiresPower: true }, + pin222: { doNotConnect: true }, + pin224: { requiresPower: true }, + pin225: { requiresPower: true }, + pin226: { requiresPower: true }, + pin227: { requiresGround: true }, + pin228: { requiresGround: true }, + pin229: { requiresPower: true }, + pin230: { requiresGround: true }, + pin231: { requiresGround: true }, + pin232: { requiresPower: true }, + pin234: { requiresPower: true }, + pin235: { requiresGround: true }, + pin236: { requiresPower: true }, + pin237: { requiresPower: true }, + pin245: { requiresGround: true }, + pin246: { doNotConnect: true }, + pin250: { doNotConnect: true }, + pin251: { requiresGround: true }, + pin252: { requiresGround: true }, + pin253: { requiresPower: true }, + pin254: { requiresPower: true }, + pin255: { requiresGround: true }, + pin256: { requiresPower: true }, + pin257: { requiresPower: true }, + pin258: { requiresGround: true }, + pin259: { requiresPower: true }, + pin260: { requiresGround: true }, + pin261: { requiresPower: true }, + pin262: { requiresGround: true }, + pin263: { requiresPower: true }, + pin264: { requiresPower: true }, + pin269: { requiresPower: true }, + pin270: { requiresPower: true }, + pin271: { requiresGround: true }, + pin272: { requiresPower: true }, + pin273: { requiresPower: true }, + pin274: { requiresGround: true }, + pin275: { requiresPower: true }, + pin276: { requiresPower: true }, + pin277: { requiresGround: true }, + pin278: { requiresPower: true }, + pin279: { requiresGround: true }, + pin280: { requiresPower: true }, + pin281: { requiresPower: true }, + pin282: { requiresPower: true }, + pin288: { requiresGround: true }, + pin294: { requiresGround: true }, + pin296: { requiresGround: true }, + pin297: { requiresPower: true }, + pin298: { requiresPower: true }, + pin299: { requiresGround: true }, + pin300: { requiresPower: true }, + pin301: { requiresPower: true }, + pin302: { requiresGround: true }, + pin303: { requiresPower: true }, + pin304: { requiresGround: true }, + pin305: { requiresPower: true }, + pin306: { requiresGround: true }, + pin307: { requiresPower: true }, + pin308: { requiresGround: true }, + pin309: { requiresPower: true }, + pin315: { requiresGround: true }, + pin318: { requiresGround: true }, + pin321: { requiresGround: true }, + pin322: { requiresGround: true }, + pin323: { requiresPower: true }, + pin324: { requiresGround: true }, + pin325: { requiresPower: true }, + pin326: { requiresPower: true }, + pin327: { requiresPower: true }, + pin328: { requiresGround: true }, + pin329: { requiresPower: true }, + pin330: { requiresGround: true }, + pin331: { requiresPower: true }, + pin332: { requiresGround: true }, + pin333: { requiresGround: true }, + pin334: { requiresPower: true }, + pin341: { requiresPower: true }, + pin342: { requiresPower: true }, + pin343: { requiresPower: true }, + pin344: { requiresGround: true }, + pin345: { requiresPower: true }, + pin346: { requiresGround: true }, + pin347: { requiresPower: true }, + pin348: { requiresGround: true }, + pin349: { requiresPower: true }, + pin350: { requiresGround: true }, + pin351: { requiresPower: true }, + pin352: { requiresGround: true }, + pin353: { requiresPower: true }, + pin354: { requiresPower: true }, + pin360: { requiresGround: true }, + pin364: { requiresGround: true }, + pin368: { requiresGround: true }, + pin369: { requiresPower: true }, + pin370: { requiresGround: true }, + pin371: { requiresPower: true }, + pin372: { requiresGround: true }, + pin373: { requiresPower: true }, + pin374: { requiresGround: true }, + pin375: { requiresPower: true }, + pin376: { requiresGround: true }, + pin377: { requiresPower: true }, + pin378: { requiresPower: true }, + pin379: { requiresGround: true }, + pin380: { requiresGround: true }, + pin381: { requiresPower: true }, + pin384: { requiresGround: true }, + pin387: { requiresGround: true }, + pin390: { requiresGround: true }, + pin391: { requiresPower: true }, + pin392: { requiresGround: true }, + pin393: { requiresPower: true }, + pin394: { requiresGround: true }, + pin395: { requiresPower: true }, + pin396: { requiresGround: true }, + pin397: { requiresPower: true }, + pin398: { requiresGround: true }, + pin399: { requiresPower: true }, + pin400: { requiresPower: true }, + pin401: { requiresPower: true }, + pin402: { requiresPower: true }, + pin403: { requiresGround: true }, + pin415: { requiresGround: true }, + pin416: { requiresPower: true }, + pin417: { requiresGround: true }, + pin418: { requiresPower: true }, + pin419: { requiresPower: true }, + pin420: { requiresPower: true }, + pin421: { requiresGround: true }, + pin423: { requiresGround: true }, + pin426: { requiresGround: true }, + pin427: { requiresPower: true }, + pin428: { requiresPower: true }, + pin429: { requiresGround: true }, + pin439: { requiresGround: true }, + pin440: { requiresGround: true }, + pin441: { requiresPower: true }, + pin442: { requiresGround: true }, + pin443: { requiresPower: true }, + pin444: { requiresPower: true }, + pin446: { requiresGround: true }, + pin449: { requiresPower: true }, + pin450: { requiresGround: true }, + pin451: { requiresPower: true }, + pin452: { requiresPower: true }, + pin453: { requiresPower: true }, + pin456: { requiresGround: true }, + pin459: { requiresGround: true }, + pin464: { doNotConnect: true }, + pin465: { doNotConnect: true }, + pin466: { doNotConnect: true }, + pin468: { requiresGround: true }, + pin469: { doNotConnect: true }, + pin476: { requiresGround: true }, + pin483: { doNotConnect: true }, + pin485: { doNotConnect: true }, + pin486: { doNotConnect: true }, + pin487: { doNotConnect: true }, + pin490: { doNotConnect: true }, + pin491: { doNotConnect: true }, + pin503: { doNotConnect: true }, + pin536: { requiresGround: true }, + pin594: { requiresGround: true }, +} as const; + +export const AM67A74AKGHIAMWR = (props: ChipProps) => { + // Footprint provenance: TI drawing AMW0594A; official source https://www.ti.com/lit/gpn/AM67A pages 244,245,246 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default AM67A74AKGHIAMWR; diff --git a/lib/chips/AMC0300DDWVR.circuit.tsx b/lib/chips/AMC0300DDWVR.circuit.tsx new file mode 100644 index 00000000..048943d1 --- /dev/null +++ b/lib/chips/AMC0300DDWVR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD1", "1"], + pin2: ["INP", "2"], + pin3: ["INN", "3"], + pin4: ["GND1", "4"], + pin5: ["GND2", "5"], + pin6: ["OUTN", "6"], + pin7: ["OUTP", "7"], + pin8: ["VDD2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "input", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const AMC0300DDWVR = (props: ChipProps) => { + // Footprint provenance: TI drawing DWV0008A; donor UCC5390ECDWVR (JLCPCB C882869) + return ( + + ); +}; + +export default AMC0300DDWVR; diff --git a/lib/chips/AMC0311DQDWVRQ1.circuit.tsx b/lib/chips/AMC0311DQDWVRQ1.circuit.tsx new file mode 100644 index 00000000..407fdb8f --- /dev/null +++ b/lib/chips/AMC0311DQDWVRQ1.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD1", "1"], + pin2: ["INP", "2"], + pin3: ["SNSN", "3"], + pin4: ["GND1", "4"], + pin5: ["GND2", "5"], + pin6: ["OUTN", "6"], + pin7: ["OUTP", "7"], + pin8: ["VDD2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "input", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const AMC0311DQDWVRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DWV0008A; donor UCC5390ECDWVR (JLCPCB C882869) + return ( + + ); +}; + +export default AMC0311DQDWVRQ1; diff --git a/lib/chips/AMC1211AQDWVQ1.circuit.tsx b/lib/chips/AMC1211AQDWVQ1.circuit.tsx new file mode 100644 index 00000000..deb05db8 --- /dev/null +++ b/lib/chips/AMC1211AQDWVQ1.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD1"], + pin2: ["VIN"], + pin3: ["SHTDN"], + pin4: ["GND1"], + pin5: ["GND2"], + pin6: ["VOUTN"], + pin7: ["VOUTP"], + pin8: ["VDD2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const AMC1211AQDWVQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default AMC1211AQDWVQ1; diff --git a/lib/chips/AMC1351QDWVRQ1.circuit.tsx b/lib/chips/AMC1351QDWVRQ1.circuit.tsx new file mode 100644 index 00000000..4a325e34 --- /dev/null +++ b/lib/chips/AMC1351QDWVRQ1.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD1"], + pin2: ["IN"], + pin3: ["GND11"], + pin4: ["GND12"], + pin5: ["GND2"], + pin6: ["OUTN"], + pin7: ["OUTP"], + pin8: ["VDD2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const AMC1351QDWVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default AMC1351QDWVRQ1; diff --git a/lib/chips/ATL431LIBQDBZR.circuit.tsx b/lib/chips/ATL431LIBQDBZR.circuit.tsx new file mode 100644 index 00000000..7f180752 --- /dev/null +++ b/lib/chips/ATL431LIBQDBZR.circuit.tsx @@ -0,0 +1,37 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CATHODE"], + pin2: ["REF"], + pin3: ["ANODE"], +} as const; + +export const ATL431LIBQDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default ATL431LIBQDBZR; diff --git a/lib/chips/A_74ACT16244DGGR.circuit.tsx b/lib/chips/A_74ACT16244DGGR.circuit.tsx new file mode 100644 index 00000000..ddb248a7 --- /dev/null +++ b/lib/chips/A_74ACT16244DGGR.circuit.tsx @@ -0,0 +1,135 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OE", "1"], + pin2: ["1Y1", "2"], + pin3: ["1Y2", "3"], + pin4: ["GND", "4", "GND_4"], + pin5: ["1Y3", "5"], + pin6: ["1Y4", "6"], + pin7: ["VCC", "7", "VCC_7"], + pin8: ["2Y1", "8"], + pin9: ["2Y2", "9"], + pin10: ["GND", "10", "GND_10"], + pin11: ["2Y3", "11"], + pin12: ["2Y4", "12"], + pin13: ["3Y1", "13"], + pin14: ["3Y2", "14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["3Y3", "16"], + pin17: ["3Y4", "17"], + pin18: ["VCC", "18", "VCC_18"], + pin19: ["4Y1", "19"], + pin20: ["4Y2", "20"], + pin21: ["GND", "21", "GND_21"], + pin22: ["4Y3", "22"], + pin23: ["4Y4", "23"], + pin24: ["4OE", "24"], + pin25: ["3OE", "25"], + pin26: ["4A4", "26"], + pin27: ["4A3", "27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["4A2", "29"], + pin30: ["4A1", "30"], + pin31: ["VCC", "31", "VCC_31"], + pin32: ["3A4", "32"], + pin33: ["3A3", "33"], + pin34: ["GND", "34", "GND_34"], + pin35: ["3A2", "35"], + pin36: ["3A1", "36"], + pin37: ["2A4", "37"], + pin38: ["2A3", "38"], + pin39: ["GND", "39", "GND_39"], + pin40: ["2A2", "40"], + pin41: ["2A1", "41"], + pin42: ["VCC", "42", "VCC_42"], + pin43: ["1A4", "43"], + pin44: ["1A3", "44"], + pin45: ["GND", "45", "GND_45"], + pin46: ["1A2", "46"], + pin47: ["1A1", "47"], + pin48: ["2OE", "48"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "unknown", + pin3: "unknown", + pin4: "ground", + pin5: "unknown", + pin6: "unknown", + pin7: "power", + pin8: "unknown", + pin9: "unknown", + pin10: "ground", + pin11: "unknown", + pin12: "unknown", + pin13: "unknown", + pin14: "unknown", + pin15: "ground", + pin16: "unknown", + pin17: "unknown", + pin18: "power", + pin19: "unknown", + pin20: "unknown", + pin21: "ground", + pin22: "unknown", + pin23: "unknown", + pin24: "unknown", + pin25: "unknown", + pin26: "unknown", + pin27: "unknown", + pin28: "ground", + pin29: "unknown", + pin30: "unknown", + pin31: "power", + pin32: "unknown", + pin33: "unknown", + pin34: "ground", + pin35: "unknown", + pin36: "unknown", + pin37: "unknown", + pin38: "unknown", + pin39: "ground", + pin40: "unknown", + pin41: "unknown", + pin42: "power", + pin43: "unknown", + pin44: "unknown", + pin45: "ground", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin7: { requiresPower: true }, + pin10: { requiresGround: true }, + pin15: { requiresGround: true }, + pin18: { requiresPower: true }, + pin21: { requiresGround: true }, + pin28: { requiresGround: true }, + pin31: { requiresPower: true }, + pin34: { requiresGround: true }, + pin39: { requiresGround: true }, + pin42: { requiresPower: true }, + pin45: { requiresGround: true }, +} as const; + +export const A_74ACT16244DGGR = (props: ChipProps) => { + // Footprint provenance: TI drawing DGG0048A; donor MSP430FR4133IG48R (JLCPCB C2053877) + return ( + + ); +}; + +export default A_74ACT16244DGGR; diff --git a/lib/chips/A_74LVC1G332DBVRG4.circuit.tsx b/lib/chips/A_74LVC1G332DBVRG4.circuit.tsx new file mode 100644 index 00000000..e43daa55 --- /dev/null +++ b/lib/chips/A_74LVC1G332DBVRG4.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["GND"], + pin3: ["B"], + pin4: ["Y"], + pin5: ["VCC"], + pin6: ["C"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const A_74LVC1G332DBVRG4 = (props: ChipProps) => { + return ( + + ); +}; + +export default A_74LVC1G332DBVRG4; diff --git a/lib/chips/BQ24600RVAR.circuit.tsx b/lib/chips/BQ24600RVAR.circuit.tsx new file mode 100644 index 00000000..5e4921ce --- /dev/null +++ b/lib/chips/BQ24600RVAR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["CE"], + pin3: ["STAT"], + pin4: ["TS"], + pin5: ["PG"], + pin6: ["VREF"], + pin7: ["ISET"], + pin8: ["VFB"], + pin9: ["SRN"], + pin10: ["SRP"], + pin11: ["GND"], + pin12: ["REGN"], + pin13: ["LODRV"], + pin14: ["PH"], + pin15: ["HIDRV"], + pin16: ["BTST"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin11: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const BQ24600RVAR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ24600RVAR; diff --git a/lib/chips/BQ24725ARGRR.circuit.tsx b/lib/chips/BQ24725ARGRR.circuit.tsx new file mode 100644 index 00000000..826a1140 --- /dev/null +++ b/lib/chips/BQ24725ARGRR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ACN"], + pin2: ["ACP"], + pin3: ["CMSRC"], + pin4: ["ACDRV"], + pin5: ["ACOK"], + pin6: ["ACDET"], + pin7: ["IOUT"], + pin8: ["SDA"], + pin9: ["SCL"], + pin10: ["ILIM"], + pin11: ["BATDRV"], + pin12: ["SRN"], + pin13: ["SRP"], + pin14: ["GND"], + pin15: ["LODRV"], + pin16: ["REGN"], + pin17: ["BTST"], + pin18: ["HIDRV"], + pin19: ["PHASE"], + pin20: ["VCC"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin14: { requiresGround: true }, + pin20: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const BQ24725ARGRR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ24725ARGRR; diff --git a/lib/chips/BQ24780SRUYR.circuit.tsx b/lib/chips/BQ24780SRUYR.circuit.tsx new file mode 100644 index 00000000..a569593c --- /dev/null +++ b/lib/chips/BQ24780SRUYR.circuit.tsx @@ -0,0 +1,70 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ACN"], + pin2: ["ACP"], + pin3: ["CMSRC"], + pin4: ["ACDRV"], + pin5: ["ACOK"], + pin6: ["ACDET"], + pin7: ["IADP"], + pin8: ["IDCHG"], + pin9: ["PMON"], + pin10: ["PROCHOT"], + pin11: ["SDA"], + pin12: ["SCL"], + pin13: ["CMPIN"], + pin14: ["CMPOUT"], + pin15: ["BATPRES"], + pin16: ["TB_STAT"], + pin17: ["BATSRC"], + pin18: ["BATDRV"], + pin19: ["SRN"], + pin20: ["SRP"], + pin21: ["ILIM"], + pin22: ["GND"], + pin23: ["LODRV"], + pin24: ["REGN"], + pin25: ["BTST"], + pin26: ["HIDRV"], + pin27: ["PHASE"], + pin28: ["VCC"], + pin29: ["EP"], +} as const; + +const pinAttributes = { + pin22: { requiresGround: true }, + pin28: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin29: [...pinLabels["pin29"], "thermalpad"], +} as const; + +export const BQ24780SRUYR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ24780SRUYR; diff --git a/lib/chips/BQ25185DLHR.circuit.tsx b/lib/chips/BQ25185DLHR.circuit.tsx new file mode 100644 index 00000000..27bb50c5 --- /dev/null +++ b/lib/chips/BQ25185DLHR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SYS"], + pin2: ["BAT"], + pin3: ["STAT2"], + pin4: ["CE"], + pin5: ["GND"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["ISET"], + pin9: ["STAT1"], + pin10: ["IN"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const BQ25185DLHR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ25185DLHR; diff --git a/lib/chips/BQ25188YBGR.circuit.tsx b/lib/chips/BQ25188YBGR.circuit.tsx new file mode 100644 index 00000000..bc14a82f --- /dev/null +++ b/lib/chips/BQ25188YBGR.circuit.tsx @@ -0,0 +1,161 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN", "A2"], + pin4: ["SYS", "B2"], + pin6: ["BAT", "C2"], + pin8: ["GND", "D2"], + pin3: ["SCL", "B1"], + pin5: ["SDA", "C1"], + pin1: ["N_INT", "A1"], + pin7: ["TS_MR", "D1"], +} as const; + +const pinRoles = { + pin2: "power", + pin4: "power", + pin6: "power", + pin8: "ground", + pin3: "bidirectional", + pin5: "bidirectional", + pin1: "output", + pin7: "bidirectional", +} as const; + +const pinAttributes = { + pin2: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, + pin6: { + requiresPower: true, + }, + pin8: { + requiresGround: true, + }, +} as const; + +export const BQ25188YBGR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43043524.obj?uuid=3d1a5469ceb6429992df21d8450a353a", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43043524.step?uuid=3d1a5469ceb6429992df21d8450a353a", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.052 }, + }} + {...props} + /> + ); +}; + +export default BQ25188YBGR; diff --git a/lib/chips/BQ25622RYKR.circuit.tsx b/lib/chips/BQ25622RYKR.circuit.tsx new file mode 100644 index 00000000..0da8ea8c --- /dev/null +++ b/lib/chips/BQ25622RYKR.circuit.tsx @@ -0,0 +1,306 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["BTST"], + pin2: ["REGN"], + pin3: ["PG"], + pin4: ["ILIM"], + pin5: ["TS_BIAS"], + pin6: ["TS"], + pin7: ["QON"], + pin8: ["BAT"], + pin9: ["SYS"], + pin10: ["STAT"], + pin11: ["INT"], + pin12: ["SDA"], + pin13: ["SCL"], + pin14: ["CE"], + pin15: ["GND"], + pin16: ["SW"], + pin17: ["PMID"], + pin18: ["VBUS"], +} as const; + +const pinAttributes = { + pin15: { requiresGround: true }, +} as const; + +export const BQ25622RYKR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6135214.obj?uuid=521b33c58fd54dc5b27148cadd8beae9", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6135214.step?uuid=521b33c58fd54dc5b27148cadd8beae9", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00006985000004533504, + y: 0.000019049999991693767, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default BQ25622RYKR; diff --git a/lib/chips/BQ25630YBGR.circuit.tsx b/lib/chips/BQ25630YBGR.circuit.tsx new file mode 100644 index 00000000..77c63efb --- /dev/null +++ b/lib/chips/BQ25630YBGR.circuit.tsx @@ -0,0 +1,165 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin5: ["BAT", "E1", "BAT_E1"], + pin11: ["BAT", "E2", "BAT_E2"], + pin17: ["BAT", "E3", "BAT_E3"], + pin6: ["BATP", "F1"], + pin26: ["BTST", "B5"], + pin3: ["CE", "C1"], + pin12: ["D_P", "F2"], + pin18: ["D_N", "F3"], + pin24: ["CC1", "F4"], + pin30: ["CC2", "F5"], + pin27: ["INT", "C5"], + pin9: ["PG", "C2"], + pin19: ["PGND", "A4", "PGND_A4"], + pin20: ["PGND", "B4", "PGND_B4"], + pin21: ["PGND", "C4", "PGND_C4"], + pin7: ["PMID", "A2", "PMID_A2"], + pin8: ["PMID", "B2", "PMID_B2"], + pin22: ["QON", "D4"], + pin25: ["REGN", "A5"], + pin28: ["SCL", "D5"], + pin29: ["SDA", "E5"], + pin13: ["SW", "A3", "SW_A3"], + pin14: ["SW", "B3", "SW_B3"], + pin15: ["SW", "C3", "SW_C3"], + pin4: ["SYS", "D1", "SYS_D1"], + pin10: ["SYS", "D2", "SYS_D2"], + pin16: ["SYS", "D3", "SYS_D3"], + pin23: ["TS", "E4"], + pin1: ["VBUS", "A1", "VBUS_A1"], + pin2: ["VBUS", "B1", "VBUS_B1"], +} as const; + +const pinRoles = { + pin5: "power", + pin11: "power", + pin17: "power", + pin26: "power", + pin19: "ground", + pin20: "ground", + pin21: "ground", + pin7: "power", + pin8: "power", + pin25: "power", + pin13: "power", + pin14: "power", + pin15: "power", + pin4: "power", + pin10: "power", + pin16: "power", + pin1: "power", + pin2: "power", +} as const; + +const pinAttributes = { + pin5: { + requiresPower: true, + }, + pin11: { + requiresPower: true, + }, + pin17: { + requiresPower: true, + }, + pin26: { + requiresPower: true, + }, + pin19: { + requiresGround: true, + }, + pin20: { + requiresGround: true, + }, + pin21: { + requiresGround: true, + }, + pin7: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, + pin25: { + requiresPower: true, + }, + pin13: { + requiresPower: true, + }, + pin14: { + requiresPower: true, + }, + pin15: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, + pin10: { + requiresPower: true, + }, + pin16: { + requiresPower: true, + }, + pin1: { + requiresPower: true, + }, + pin2: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin6: [...pinLabels["pin6"], "pin1"], + pin12: [...pinLabels["pin12"], "pin2"], + pin18: [...pinLabels["pin18"], "pin3"], + pin24: [...pinLabels["pin24"], "pin4"], + pin30: [...pinLabels["pin30"], "pin5"], + pin5: [...pinLabels["pin5"], "pin6"], + pin11: [...pinLabels["pin11"], "pin7"], + pin17: [...pinLabels["pin17"], "pin8"], + pin23: [...pinLabels["pin23"], "pin9"], + pin29: [...pinLabels["pin29"], "pin10"], + pin4: [...pinLabels["pin4"], "pin11"], + pin10: [...pinLabels["pin10"], "pin12"], + pin16: [...pinLabels["pin16"], "pin13"], + pin22: [...pinLabels["pin22"], "pin14"], + pin28: [...pinLabels["pin28"], "pin15"], + pin3: [...pinLabels["pin3"], "pin16"], + pin9: [...pinLabels["pin9"], "pin17"], + pin15: [...pinLabels["pin15"], "pin18"], + pin21: [...pinLabels["pin21"], "pin19"], + pin27: [...pinLabels["pin27"], "pin20"], + pin2: [...pinLabels["pin2"], "pin21"], + pin8: [...pinLabels["pin8"], "pin22"], + pin14: [...pinLabels["pin14"], "pin23"], + pin20: [...pinLabels["pin20"], "pin24"], + pin26: [...pinLabels["pin26"], "pin25"], + pin1: [...pinLabels["pin1"], "pin26"], + pin7: [...pinLabels["pin7"], "pin27"], + pin13: [...pinLabels["pin13"], "pin28"], + pin19: [...pinLabels["pin19"], "pin29"], + pin25: [...pinLabels["pin25"], "pin30"], +} as const; + +export const BQ25630YBGR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ25630YBGR; diff --git a/lib/chips/BQ25638YBGR.circuit.tsx b/lib/chips/BQ25638YBGR.circuit.tsx new file mode 100644 index 00000000..66619053 --- /dev/null +++ b/lib/chips/BQ25638YBGR.circuit.tsx @@ -0,0 +1,171 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin15: ["ADCIN", "C5"], + pin21: ["BAT", "E1", "BAT_E1"], + pin22: ["BAT", "E2", "BAT_E2"], + pin23: ["BAT", "E3", "BAT_E3"], + pin26: ["BATP", "F1"], + pin10: ["BTST", "B5"], + pin27: ["CE", "F2"], + pin29: ["TS_BIAS", "F4"], + pin28: ["ILIM", "F3"], + pin30: ["INT", "F5"], + pin12: ["PG", "C2"], + pin4: ["PGND", "A4", "PGND_A4"], + pin9: ["PGND", "B4", "PGND_B4"], + pin14: ["PGND", "C4", "PGND_C4"], + pin2: ["PMID", "A2", "PMID_A2"], + pin7: ["PMID", "B2", "PMID_B2"], + pin19: ["QON", "D4"], + pin5: ["REGN", "A5"], + pin20: ["SCL", "D5"], + pin25: ["SDA", "E5"], + pin11: ["STAT", "C1"], + pin3: ["SW", "A3", "SW_A3"], + pin8: ["SW", "B3", "SW_B3"], + pin13: ["SW", "C3", "SW_C3"], + pin16: ["SYS", "D1", "SYS_D1"], + pin17: ["SYS", "D2", "SYS_D2"], + pin18: ["SYS", "D3", "SYS_D3"], + pin24: ["TS", "E4"], + pin1: ["VBUS", "A1", "VBUS_A1"], + pin6: ["VBUS", "B1", "VBUS_B1"], +} as const; + +const pinRoles = { + pin21: "power", + pin22: "power", + pin23: "power", + pin10: "power", + pin4: "ground", + pin9: "ground", + pin14: "ground", + pin2: "power", + pin7: "power", + pin5: "power", + pin3: "power", + pin8: "power", + pin13: "power", + pin16: "power", + pin17: "power", + pin18: "power", + pin1: "power", + pin6: "power", +} as const; + +const pinAttributes = { + pin21: { + requiresPower: true, + }, + pin22: { + requiresPower: true, + }, + pin23: { + requiresPower: true, + }, + pin10: { + requiresPower: true, + }, + pin4: { + requiresGround: true, + }, + pin9: { + requiresGround: true, + }, + pin14: { + requiresGround: true, + }, + pin2: { + requiresPower: true, + }, + pin7: { + requiresPower: true, + }, + pin5: { + requiresPower: true, + }, + pin3: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, + pin13: { + requiresPower: true, + }, + pin16: { + requiresPower: true, + }, + pin17: { + requiresPower: true, + }, + pin18: { + requiresPower: true, + }, + pin1: { + requiresPower: true, + }, + pin6: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin6: [...pinLabels["pin6"], "pin2"], + pin11: [...pinLabels["pin11"], "pin3"], + pin16: [...pinLabels["pin16"], "pin4"], + pin21: [...pinLabels["pin21"], "pin5"], + pin26: [...pinLabels["pin26"], "pin6"], + pin2: [...pinLabels["pin2"], "pin7"], + pin7: [...pinLabels["pin7"], "pin8"], + pin12: [...pinLabels["pin12"], "pin9"], + pin17: [...pinLabels["pin17"], "pin10"], + pin22: [...pinLabels["pin22"], "pin11"], + pin27: [...pinLabels["pin27"], "pin12"], + pin3: [...pinLabels["pin3"], "pin13"], + pin8: [...pinLabels["pin8"], "pin14"], + pin13: [...pinLabels["pin13"], "pin15"], + pin18: [...pinLabels["pin18"], "pin16"], + pin23: [...pinLabels["pin23"], "pin17"], + pin28: [...pinLabels["pin28"], "pin18"], + pin4: [...pinLabels["pin4"], "pin19"], + pin9: [...pinLabels["pin9"], "pin20"], + pin14: [...pinLabels["pin14"], "pin21"], + pin19: [...pinLabels["pin19"], "pin22"], + pin24: [...pinLabels["pin24"], "pin23"], + pin29: [...pinLabels["pin29"], "pin24"], + pin5: [...pinLabels["pin5"], "pin25"], + pin10: [...pinLabels["pin10"], "pin26"], + pin15: [...pinLabels["pin15"], "pin27"], + pin20: [...pinLabels["pin20"], "pin28"], + pin25: [...pinLabels["pin25"], "pin29"], +} as const; + +export const BQ25638YBGR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ25638YBGR; diff --git a/lib/chips/BQ25731RSNR.circuit.tsx b/lib/chips/BQ25731RSNR.circuit.tsx new file mode 100644 index 00000000..a3e7975a --- /dev/null +++ b/lib/chips/BQ25731RSNR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VBUS"], + pin2: ["ACN"], + pin3: ["ACP"], + pin4: ["CHRG_OK"], + pin5: ["pin5"], + pin6: ["ILIM_HIZ"], + pin7: ["VDDA"], + pin8: ["IADPT"], + pin9: ["IBAT"], + pin10: ["PSYS"], + pin11: ["PROCHOT"], + pin12: ["SDA"], + pin13: ["SCL"], + pin14: ["CMPIN"], + pin15: ["CMPOUT"], + pin16: ["COMP1"], + pin17: ["COMP2"], + pin18: ["CELL_BATPRESZ"], + pin19: ["SRN"], + pin20: ["SRP"], + pin21: ["NC"], + pin22: ["VSYS"], + pin23: ["SW2"], + pin24: ["HIDRV2"], + pin25: ["BTST2"], + pin26: ["LODRV2"], + pin27: ["PGND"], + pin28: ["REGN"], + pin29: ["LODRV1"], + pin30: ["BTST1"], + pin31: ["HIDRV1"], + pin32: ["SW1"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin21: { doNotConnect: true }, + pin27: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const BQ25731RSNR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ25731RSNR; diff --git a/lib/chips/BQ25756RRVR.circuit.tsx b/lib/chips/BQ25756RRVR.circuit.tsx new file mode 100644 index 00000000..5e9b6505 --- /dev/null +++ b/lib/chips/BQ25756RRVR.circuit.tsx @@ -0,0 +1,469 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["INT"], + pin4: ["STAT1"], + pin5: ["STAT2"], + pin6: ["PG"], + pin7: ["CE"], + pin8: ["TS"], + pin9: ["ICHG"], + pin10: ["ILIM_HIZ"], + pin11: ["FBG"], + pin12: ["FB"], + pin13: ["SRN"], + pin14: ["SRP"], + pin15: ["NC3"], + pin16: ["NC2"], + pin17: ["PGND3"], + pin18: ["SW2"], + pin19: ["HIDRV2"], + pin20: ["BTST2"], + pin21: ["LODRV2"], + pin22: ["PGND2"], + pin23: ["DRV_SUP"], + pin24: ["REGN"], + pin25: ["LODRV1"], + pin26: ["BTST1"], + pin27: ["HIDRV1"], + pin28: ["SW1"], + pin29: ["ACN"], + pin30: ["ACP"], + pin31: ["NC1"], + pin32: ["VAC2"], + pin33: ["VAC1"], + pin34: ["ACUV"], + pin35: ["ACOV"], + pin36: ["FSW_SYNC"], + pin37: ["PGND1"], +} as const; + +const pinAttributes = { + pin15: { doNotConnect: true }, + pin16: { doNotConnect: true }, + pin17: { requiresGround: true }, + pin22: { requiresGround: true }, + pin31: { doNotConnect: true }, + pin37: { requiresGround: true }, +} as const; + +export const BQ25756RRVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19272232.obj?uuid=3050ce87e30e41f7be9da0b2df247c01", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19272232.step?uuid=3050ce87e30e41f7be9da0b2df247c01", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0.000012699999956566899, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default BQ25756RRVR; diff --git a/lib/chips/BQ25887RGER.circuit.tsx b/lib/chips/BQ25887RGER.circuit.tsx new file mode 100644 index 00000000..bdc6ab43 --- /dev/null +++ b/lib/chips/BQ25887RGER.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PG"], + pin2: ["STAT"], + pin3: ["CD"], + pin4: ["SDA"], + pin5: ["SCL"], + pin6: ["INT"], + pin7: ["TS"], + pin8: ["ILIM"], + pin9: ["MID"], + pin10: ["CBSET"], + pin11: ["REGN"], + pin12: ["BTST"], + pin13: ["BAT1"], + pin14: ["BAT2"], + pin15: ["SNS1"], + pin16: ["SNS2"], + pin17: ["SW1"], + pin18: ["SW2"], + pin19: ["GND1"], + pin20: ["GND2"], + pin21: ["PMID1"], + pin22: ["PMID2"], + pin23: ["VBUS"], + pin24: ["PSEL"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin19: { requiresGround: true }, + pin20: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const BQ25887RGER = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ25887RGER; diff --git a/lib/chips/BQ25895.circuit.tsx b/lib/chips/BQ25895.circuit.tsx index 780082e6..638e6320 100644 --- a/lib/chips/BQ25895.circuit.tsx +++ b/lib/chips/BQ25895.circuit.tsx @@ -18,3 +18,5 @@ export const BQ25895 = ({ return ; }; + +export default BQ25895; diff --git a/lib/chips/BQ25895RTWR.circuit.tsx b/lib/chips/BQ25895RTWR.circuit.tsx index e743bee3..f2ed8392 100644 --- a/lib/chips/BQ25895RTWR.circuit.tsx +++ b/lib/chips/BQ25895RTWR.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: ["VBUS"], @@ -31,6 +32,7 @@ const pinLabels = { export const BQ25895RTWR = (props: ChipProps) => { return ( ) => { /> ); }; + +export default BQ25895RTWR; diff --git a/lib/chips/BQ27426YZFR.circuit.tsx b/lib/chips/BQ27426YZFR.circuit.tsx new file mode 100644 index 00000000..107f8889 --- /dev/null +++ b/lib/chips/BQ27426YZFR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin9: ["BAT", "C3"], + pin2: ["BIN", "B1"], + pin1: ["GPOUT", "A1"], + pin7: ["SCL", "A3"], + pin4: ["SDA", "A2"], + pin6: ["SRN", "C2"], + pin3: ["SRP", "C1"], + pin8: ["VDD", "B3"], + pin5: ["VSS", "B2"], +} as const; + +const pinRoles = { + pin8: "power", + pin5: "ground", +} as const; + +const pinAttributes = { + pin8: { + requiresPower: true, + }, + pin5: { + requiresGround: true, + }, +} as const; + +export const BQ27426YZFR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ27426YZFR; diff --git a/lib/chips/BQ32000DR.circuit.tsx b/lib/chips/BQ32000DR.circuit.tsx new file mode 100644 index 00000000..474d1950 --- /dev/null +++ b/lib/chips/BQ32000DR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OSCI"], + pin2: ["OSCO"], + pin3: ["VBACK"], + pin4: ["GND"], + pin5: ["SDA"], + pin6: ["SCL"], + pin7: ["IRQ"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const BQ32000DR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ32000DR; diff --git a/lib/chips/BQ51003YFPR.circuit.tsx b/lib/chips/BQ51003YFPR.circuit.tsx new file mode 100644 index 00000000..7ccc3690 --- /dev/null +++ b/lib/chips/BQ51003YFPR.circuit.tsx @@ -0,0 +1,149 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin6: ["AC1", "B3", "AC1_B3"], + pin5: ["AC1", "B4", "AC1_B4"], + pin8: ["AC2", "B1", "AC2_B1"], + pin7: ["AC2", "B2", "AC2_B2"], + pin13: ["AD", "G4"], + pin23: ["AD_EN", "F3"], + pin9: ["BOOT1", "C4"], + pin16: ["BOOT2", "C1"], + pin12: ["CHG", "F4"], + pin20: ["CLAMP1", "E3"], + pin21: ["CLAMP2", "E2"], + pin11: ["COMM1", "E4"], + pin22: ["COMM2", "E1"], + pin26: ["EN1", "G3"], + pin27: ["EN2", "G2"], + pin24: ["FOD", "F2"], + pin28: ["ILIM", "G1"], + pin19: ["OUT", "D1", "OUT_D1"], + pin18: ["OUT", "D2", "OUT_D2"], + pin17: ["OUT", "D3", "OUT_D3"], + pin10: ["OUT", "D4", "OUT_D4"], + pin4: ["PGND", "A1", "PGND_A1"], + pin3: ["PGND", "A2", "PGND_A2"], + pin2: ["PGND", "A3", "PGND_A3"], + pin1: ["PGND", "A4", "PGND_A4"], + pin15: ["RECT", "C2", "RECT_C2"], + pin14: ["RECT", "C3", "RECT_C3"], + pin25: ["TS_CTRL", "F1"], +} as const; + +const pinRoles = { + pin6: "input", + pin5: "input", + pin8: "input", + pin7: "input", + pin13: "input", + pin23: "output", + pin9: "output", + pin16: "output", + pin12: "power", + pin20: "power", + pin21: "output", + pin11: "output", + pin22: "output", + pin26: "input", + pin27: "input", + pin24: "input", + pin28: "power", + pin19: "output", + pin18: "output", + pin17: "output", + pin10: "output", + pin4: "ground", + pin3: "ground", + pin2: "ground", + pin1: "ground", + pin15: "output", + pin14: "output", + pin25: "input", +} as const; + +const pinAttributes = { + pin12: { + requiresPower: true, + }, + pin20: { + requiresPower: true, + }, + pin28: { + requiresPower: true, + }, + pin4: { + requiresGround: true, + }, + pin3: { + requiresGround: true, + }, + pin2: { + requiresGround: true, + }, + pin1: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "pin1"], + pin12: [...pinLabels["pin12"], "pin2"], + pin11: [...pinLabels["pin11"], "pin3"], + pin10: [...pinLabels["pin10"], "pin4"], + pin9: [...pinLabels["pin9"], "pin5"], + pin5: [...pinLabels["pin5"], "pin6"], + pin1: [...pinLabels["pin1"], "pin7"], + pin26: [...pinLabels["pin26"], "pin8"], + pin23: [...pinLabels["pin23"], "pin9"], + pin20: [...pinLabels["pin20"], "pin10"], + pin17: [...pinLabels["pin17"], "pin11"], + pin14: [...pinLabels["pin14"], "pin12"], + pin6: [...pinLabels["pin6"], "pin13"], + pin2: [...pinLabels["pin2"], "pin14"], + pin27: [...pinLabels["pin27"], "pin15"], + pin24: [...pinLabels["pin24"], "pin16"], + pin21: [...pinLabels["pin21"], "pin17"], + pin15: [...pinLabels["pin15"], "pin19"], + pin7: [...pinLabels["pin7"], "pin20"], + pin3: [...pinLabels["pin3"], "pin21"], + pin28: [...pinLabels["pin28"], "pin22"], + pin25: [...pinLabels["pin25"], "pin23"], + pin22: [...pinLabels["pin22"], "pin24"], + pin19: [...pinLabels["pin19"], "pin25"], + pin16: [...pinLabels["pin16"], "pin26"], + pin8: [...pinLabels["pin8"], "pin27"], + pin4: [...pinLabels["pin4"], "pin28"], +} as const; + +export const BQ51003YFPR = (props: ChipProps) => { + return ( + + ); +}; + +export default BQ51003YFPR; diff --git a/lib/chips/BQ51013CRHLR.circuit.tsx b/lib/chips/BQ51013CRHLR.circuit.tsx new file mode 100644 index 00000000..18229510 --- /dev/null +++ b/lib/chips/BQ51013CRHLR.circuit.tsx @@ -0,0 +1,335 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND2"], + pin2: ["AC1"], + pin3: ["BOOT1"], + pin4: ["OUT"], + pin5: ["CLAMP1"], + pin6: ["COMM1"], + pin7: ["CHG"], + pin8: ["AD_EN"], + pin9: ["AD"], + pin10: ["EN1"], + pin11: ["EN2"], + pin12: ["ILIM"], + pin13: ["pin13"], + pin14: ["FOD"], + pin15: ["COMM2"], + pin16: ["CLAMP2"], + pin17: ["BOOT2"], + pin18: ["RECT"], + pin19: ["AC2"], + pin20: ["PGND1"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin20: { requiresGround: true }, +} as const; + +export const BQ51013CRHLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43043533.obj?uuid=d37a54d40c264d5d8e19accad3495803", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43043533.step?uuid=d37a54d40c264d5d8e19accad3495803", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: -0.000012700000070253736, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default BQ51013CRHLR; diff --git a/lib/chips/CC1101RGPR.circuit.tsx b/lib/chips/CC1101RGPR.circuit.tsx new file mode 100644 index 00000000..2fc6d43c --- /dev/null +++ b/lib/chips/CC1101RGPR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCLK"], + pin2: ["pin2"], + pin3: ["GDO2"], + pin4: ["DVDD"], + pin5: ["DCOUPL"], + pin6: ["pin6"], + pin7: ["CSn"], + pin8: ["XOSC_Q1"], + pin9: ["AVDD1"], + pin10: ["XOSC_Q2"], + pin11: ["AVDD2"], + pin12: ["RF_P"], + pin13: ["RF_N"], + pin14: ["AVDD3"], + pin15: ["AVDD4"], + pin16: ["GND1"], + pin17: ["RBIAS"], + pin18: ["DGUARD"], + pin19: ["GND2"], + pin20: ["SI"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresGround: true }, + pin19: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const CC1101RGPR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1101RGPR; diff --git a/lib/chips/CC1120RHBR.circuit.tsx b/lib/chips/CC1120RHBR.circuit.tsx new file mode 100644 index 00000000..7506bff6 --- /dev/null +++ b/lib/chips/CC1120RHBR.circuit.tsx @@ -0,0 +1,73 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD_GUARD"], + pin2: ["RESET_N"], + pin3: ["GPIO3"], + pin4: ["GPIO2"], + pin5: ["DVDD1"], + pin6: ["DCPL"], + pin7: ["SI"], + pin8: ["SCK"], + pin9: ["pin9"], + pin10: ["GPIO0"], + pin11: ["CSN"], + pin12: ["DVDD2"], + pin13: ["AVDD_IF"], + pin14: ["RBIAS"], + pin15: ["AVDD_RF"], + pin16: ["NC"], + pin17: ["PA"], + pin18: ["TRX_SW"], + pin19: ["LNA_P"], + pin20: ["LNA_N"], + pin21: ["DCPL_VCO"], + pin22: ["AVDD_SYNTH1"], + pin23: ["LPF0"], + pin24: ["LPF1"], + pin25: ["AVDD_PFD_CHP"], + pin26: ["DCPL_PFD_CHP"], + pin27: ["AVDD_SYNTH2"], + pin28: ["AVDD_XOSC"], + pin29: ["DCPL_XOSC"], + pin30: ["XOSC_Q1"], + pin31: ["XOSC_Q2"], + pin32: ["EXT_XOSC"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin16: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const CC1120RHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1120RHBR; diff --git a/lib/chips/CC1125RHBR.circuit.tsx b/lib/chips/CC1125RHBR.circuit.tsx new file mode 100644 index 00000000..f762c739 --- /dev/null +++ b/lib/chips/CC1125RHBR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD_GUARD"], + pin2: ["RESET_N"], + pin3: ["GPIO3"], + pin4: ["GPIO2"], + pin5: ["DVDD1"], + pin6: ["DCPL"], + pin7: ["SI"], + pin8: ["SCLK"], + pin9: ["pin9"], + pin10: ["GPIO0"], + pin11: ["CSn"], + pin12: ["DVDD2"], + pin13: ["AVDD_IF"], + pin14: ["RBIAS"], + pin15: ["AVDD_RF"], + pin16: ["pin16"], + pin17: ["PA"], + pin18: ["TRX_SW"], + pin19: ["LNA_P"], + pin20: ["LNA_N"], + pin21: ["DCPL_VCO"], + pin22: ["AVDD_SYNTH1"], + pin23: ["LPF0"], + pin24: ["LPF1"], + pin25: ["AVDD_PFD_CHP"], + pin26: ["DCPL_PFD_CHP"], + pin27: ["AVDD_SYNTH2"], + pin28: ["AVDD_XOSC"], + pin29: ["DCPL_XOSC"], + pin30: ["XOSC_Q1"], + pin31: ["XOSC_Q2"], + pin32: ["EXT_XOSC"], + pin33: ["EXP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const CC1125RHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1125RHBR; diff --git a/lib/chips/CC113LRGPR.circuit.tsx b/lib/chips/CC113LRGPR.circuit.tsx new file mode 100644 index 00000000..d4ce311c --- /dev/null +++ b/lib/chips/CC113LRGPR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCLK"], + pin2: ["pin2"], + pin3: ["GDO2"], + pin4: ["DVDD"], + pin5: ["DCOUPL"], + pin6: ["GDO0"], + pin7: ["CSn"], + pin8: ["XOSC_Q1"], + pin9: ["AVDD1"], + pin10: ["XOSC_Q2"], + pin11: ["AVDD2"], + pin12: ["RF_P"], + pin13: ["RF_N"], + pin14: ["AVDD3"], + pin15: ["AVDD4"], + pin16: ["GND1"], + pin17: ["RBIAS"], + pin18: ["DGUARD"], + pin19: ["GND2"], + pin20: ["SI"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresGround: true }, + pin19: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const CC113LRGPR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC113LRGPR; diff --git a/lib/chips/CC1310F128RHBR.circuit.tsx b/lib/chips/CC1310F128RHBR.circuit.tsx new file mode 100644 index 00000000..96613881 --- /dev/null +++ b/lib/chips/CC1310F128RHBR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P"], + pin2: ["RF_N"], + pin3: ["RX_TX"], + pin4: ["X32K_Q1"], + pin5: ["X32K_Q2"], + pin6: ["DIO_0"], + pin7: ["DIO_1"], + pin8: ["DIO_2"], + pin9: ["DIO_3"], + pin10: ["DIO_4"], + pin11: ["VDDS2"], + pin12: ["DCOUPL"], + pin13: ["JTAG_TMSC"], + pin14: ["JTAG_TCKC"], + pin15: ["DIO_5"], + pin16: ["DIO_6"], + pin17: ["DCDC_SW"], + pin18: ["VDDS_DCDC"], + pin19: ["RESET_N"], + pin20: ["DIO_7"], + pin21: ["DIO_8"], + pin22: ["DIO_9"], + pin23: ["DIO_10"], + pin24: ["DIO_11"], + pin25: ["DIO_12"], + pin26: ["DIO_13"], + pin27: ["DIO_14"], + pin28: ["VDDS"], + pin29: ["VDDR"], + pin30: ["X24M_P"], + pin31: ["X24M_N"], + pin32: ["VDDR_RF"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const CC1310F128RHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1310F128RHBR; diff --git a/lib/chips/CC1311R31T0RKPR.circuit.tsx b/lib/chips/CC1311R31T0RKPR.circuit.tsx new file mode 100644 index 00000000..7cfbe139 --- /dev/null +++ b/lib/chips/CC1311R31T0RKPR.circuit.tsx @@ -0,0 +1,76 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P"], + pin2: ["RF_N"], + pin3: ["RX_TX"], + pin4: ["X32K_Q1"], + pin5: ["X32K_Q2"], + pin6: ["DIO_1"], + pin7: ["DIO_2"], + pin8: ["DIO_3"], + pin9: ["DIO_4"], + pin10: ["DIO_5"], + pin11: ["DIO_6"], + pin12: ["DIO_7"], + pin13: ["VDDS2"], + pin14: ["DIO_8"], + pin15: ["DIO_9"], + pin16: ["VDDS3"], + pin17: ["DCOUPL"], + pin18: ["JTAG_TMSC"], + pin19: ["JTAG_TCKC"], + pin20: ["DIO_10"], + pin21: ["DIO_11"], + pin22: ["DIO_12"], + pin23: ["DIO_13"], + pin24: ["DIO_14"], + pin25: ["DCDC_SW"], + pin26: ["VDDS_DCDC"], + pin27: ["RESET_N"], + pin28: ["DIO_15"], + pin29: ["DIO_16"], + pin30: ["DIO_17"], + pin31: ["DIO_18"], + pin32: ["DIO_19"], + pin33: ["DIO_20"], + pin34: ["DIO_21"], + pin35: ["DIO_22"], + pin36: ["VDDS"], + pin37: ["VDDR"], + pin38: ["X48M_N"], + pin39: ["X48M_P"], + pin40: ["VDDR_RF"], + pin41: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin41: [...pinLabels["pin41"], "thermalpad"], +} as const; + +export const CC1311R31T0RKPR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1311R31T0RKPR; diff --git a/lib/chips/CC1312PSIPMOTR.circuit.tsx b/lib/chips/CC1312PSIPMOTR.circuit.tsx new file mode 100644 index 00000000..a65d1bc2 --- /dev/null +++ b/lib/chips/CC1312PSIPMOTR.circuit.tsx @@ -0,0 +1,756 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DIO_26"], + pin2: ["DIO_27"], + pin3: ["DIO_28"], + pin4: ["nRESET"], + pin5: ["GND1"], + pin6: ["NC1"], + pin7: ["DIO_29"], + pin8: ["DIO_30"], + pin9: ["GND2"], + pin10: ["GND3"], + pin11: ["GND4"], + pin12: ["GND5"], + pin13: ["GND6"], + pin14: ["NC2"], + pin15: ["NC3"], + pin16: ["GND7"], + pin17: ["GND8"], + pin18: ["RF"], + pin19: ["GND9"], + pin20: ["DIO_2"], + pin21: ["DIO_1"], + pin22: ["DIO_4"], + pin23: ["DIO_5"], + pin24: ["DIO_6"], + pin25: ["DIO_7"], + pin26: ["DIO_8"], + pin27: ["DIO_9"], + pin28: ["DIO_10"], + pin29: ["DIO_11"], + pin30: ["DIO_12"], + pin31: ["DIO_13"], + pin32: ["DIO_14"], + pin33: ["DIO_15"], + pin34: ["JTAG_TMSC"], + pin35: ["JTAG_TCKC"], + pin36: ["DIO_16"], + pin37: ["DIO_17"], + pin38: ["DIO_31"], + pin39: ["DIO_18"], + pin40: ["DIO_19"], + pin41: ["DIO_20"], + pin42: ["DIO_21"], + pin43: ["DIO_22"], + pin44: ["DIO_23"], + pin45: ["DIO_24"], + pin46: ["VDDS"], + pin47: ["VDDS_PU"], + pin48: ["DIO_25"], + pin49: ["GND10"], + pin50: ["GND11"], + pin51: ["GND12"], + pin52: ["GND13"], + pin53: ["GND14"], + pin54: ["GND15"], + pin55: ["GND16"], + pin56: ["GND17"], + pin57: ["GND18"], + pin58: ["GND19"], + pin59: ["GND20"], + pin60: ["GND21"], + pin61: ["GND22"], + pin62: ["GND23"], + pin63: ["GND24"], + pin64: ["GND25"], + pin65: ["GND26"], + pin66: ["GND27"], + pin67: ["GND28"], + pin68: ["GND29"], + pin69: ["GND30"], + pin70: ["GND31"], + pin71: ["GND32"], + pin72: ["GND33"], + pin73: ["GND34"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { doNotConnect: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { requiresGround: true }, + pin12: { requiresGround: true }, + pin13: { requiresGround: true }, + pin14: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin16: { requiresGround: true }, + pin17: { requiresGround: true }, + pin19: { requiresGround: true }, + pin49: { requiresGround: true }, + pin50: { requiresGround: true }, + pin51: { requiresGround: true }, + pin52: { requiresGround: true }, + pin53: { requiresGround: true }, + pin54: { requiresGround: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresGround: true }, + pin65: { requiresGround: true }, + pin66: { requiresGround: true }, + pin67: { requiresGround: true }, + pin68: { requiresGround: true }, + pin69: { requiresGround: true }, + pin70: { requiresGround: true }, + pin71: { requiresGround: true }, + pin72: { requiresGround: true }, + pin73: { requiresGround: true }, +} as const; + +export const CC1312PSIPMOTR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C33446057.obj?uuid=98e85ade0c314f6f8c940115c2767190", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C33446057.step?uuid=98e85ade0c314f6f8c940115c2767190", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.00005080000005364127, z: -0.01 }, + }} + {...props} + /> + ); +}; + +export default CC1312PSIPMOTR; diff --git a/lib/chips/CC1314R106T0RGZR.circuit.tsx b/lib/chips/CC1314R106T0RGZR.circuit.tsx new file mode 100644 index 00000000..aa9349f3 --- /dev/null +++ b/lib/chips/CC1314R106T0RGZR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P"], + pin2: ["RF_N"], + pin3: ["RX_TX"], + pin4: ["X32K_Q1"], + pin5: ["X32K_Q2"], + pin6: ["DIO_1"], + pin7: ["DIO_2"], + pin8: ["DIO_3"], + pin9: ["DIO_4"], + pin10: ["DIO_5"], + pin11: ["DIO_6"], + pin12: ["DIO_7"], + pin13: ["VDDS2"], + pin14: ["DIO_8"], + pin15: ["DIO_9"], + pin16: ["DIO_10"], + pin17: ["DIO_11"], + pin18: ["DIO_12"], + pin19: ["DIO_13"], + pin20: ["DIO_14"], + pin21: ["DIO_15"], + pin22: ["VDDS3"], + pin23: ["DCOUPL"], + pin24: ["JTAG_TMSC"], + pin25: ["JTAG_TCKC"], + pin26: ["DIO_16"], + pin27: ["DIO_17"], + pin28: ["DIO_18"], + pin29: ["DIO_19"], + pin30: ["DIO_20"], + pin31: ["DIO_21"], + pin32: ["DIO_22"], + pin33: ["DCDC_SW"], + pin34: ["VDDS_DCDC"], + pin35: ["RESET_N"], + pin36: ["DIO_23"], + pin37: ["DIO_24"], + pin38: ["DIO_25"], + pin39: ["DIO_26"], + pin40: ["DIO_27"], + pin41: ["DIO_28"], + pin42: ["DIO_29"], + pin43: ["DIO_30"], + pin44: ["VDDS"], + pin45: ["VDDR"], + pin46: ["X48M_N"], + pin47: ["X48M_P"], + pin48: ["VDDR_RF"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const CC1314R106T0RGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1314R106T0RGZR; diff --git a/lib/chips/CC1354P106T0RSKR.circuit.tsx b/lib/chips/CC1354P106T0RSKR.circuit.tsx new file mode 100644 index 00000000..1e11e57c --- /dev/null +++ b/lib/chips/CC1354P106T0RSKR.circuit.tsx @@ -0,0 +1,100 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P_2_4GHZ"], + pin2: ["RF_N_2_4GHZ"], + pin3: ["RF_P_SUB_1GHZ"], + pin4: ["RF_N_SUB_1GHZ"], + pin5: ["TX_20DBM_P"], + pin6: ["TX_20DBM_N"], + pin7: ["RX_TX"], + pin8: ["X32K_Q1"], + pin9: ["X32K_Q2"], + pin10: ["DIO_34"], + pin11: ["DIO_35"], + pin12: ["DIO_3"], + pin13: ["DIO_4"], + pin14: ["DIO_5"], + pin15: ["DIO_6"], + pin16: ["DIO_7"], + pin17: ["VDDS2"], + pin18: ["DIO_8"], + pin19: ["DIO_9"], + pin20: ["DIO_10"], + pin21: ["DIO_11"], + pin22: ["DIO_36"], + pin23: ["DIO_37"], + pin24: ["DIO_38"], + pin25: ["DIO_39"], + pin26: ["DIO_12"], + pin27: ["DIO_13"], + pin28: ["DIO_14"], + pin29: ["DIO_15"], + pin30: ["VDDS3"], + pin31: ["DCOUPL"], + pin32: ["JTAG_TMSC"], + pin33: ["JTAG_TCKC"], + pin34: ["DIO_16"], + pin35: ["DIO_17"], + pin36: ["DIO_18"], + pin37: ["DIO_19"], + pin38: ["DIO_20"], + pin39: ["DIO_21"], + pin40: ["DIO_22"], + pin41: ["DIO_40"], + pin42: ["DIO_41"], + pin43: ["DIO_42"], + pin44: ["DIO_43"], + pin45: ["DIO_44"], + pin46: ["DIO_45"], + pin47: ["DCDC_SW"], + pin48: ["VDDS_DCDC"], + pin49: ["RESET_N"], + pin50: ["DIO_23"], + pin51: ["DIO_24"], + pin52: ["DIO_25"], + pin53: ["DIO_26"], + pin54: ["DIO_27"], + pin55: ["DIO_28"], + pin56: ["DIO_29"], + pin57: ["DIO_30"], + pin58: ["DIO_46"], + pin59: ["DIO_47"], + pin60: ["VDDS"], + pin61: ["VDDR"], + pin62: ["X48M_N"], + pin63: ["X48M_P"], + pin64: ["VDDR_RF"], + pin65: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const CC1354P106T0RSKR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC1354P106T0RSKR; diff --git a/lib/chips/CC2340R21N0RGER.circuit.tsx b/lib/chips/CC2340R21N0RGER.circuit.tsx new file mode 100644 index 00000000..7c792455 --- /dev/null +++ b/lib/chips/CC2340R21N0RGER.circuit.tsx @@ -0,0 +1,85 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ANT", "1"], + pin2: ["VDDR", "2", "VDDR_2"], + pin3: ["DIO8", "3"], + pin4: ["DIO11", "4"], + pin5: ["DIO12", "5"], + pin6: ["DIO13", "6"], + pin7: ["DIO16_SWDIO", "7"], + pin8: ["DIO17_SWDCK", "8"], + pin9: ["DIO20_A11", "9"], + pin10: ["DIO21_A10", "10"], + pin11: ["VDDS", "11", "VDDS_11"], + pin12: ["DIO24_A7", "12"], + pin13: ["RSTN", "13"], + pin14: ["DIO3_X32P", "14"], + pin15: ["DIO4_X32N", "15"], + pin16: ["VDDD", "16"], + pin17: ["DCDC", "17"], + pin18: ["VDDS", "18", "VDDS_18"], + pin19: ["DIO6_A1", "19"], + pin20: ["VDDR", "20", "VDDR_20"], + pin21: ["X48P", "21"], + pin22: ["X48N", "22"], + pin23: ["GND", "23"], + pin24: ["VDDS", "24", "VDDS_24"], + pin25: ["THERMAL_PAD", "25"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "power", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "power", + pin12: "bidirectional", + pin13: "control", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "power", + pin17: "unknown", + pin18: "power", + pin19: "bidirectional", + pin20: "power", + pin21: "unknown", + pin22: "unknown", + pin23: "ground", + pin24: "power", + pin25: "ground", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin11: { requiresPower: true }, + pin16: { requiresPower: true }, + pin18: { requiresPower: true }, + pin20: { requiresPower: true }, + pin23: { requiresGround: true }, + pin24: { requiresPower: true }, + pin25: { requiresGround: true }, +} as const; + +export const CC2340R21N0RGER = (props: ChipProps) => { + // Footprint provenance: TI drawing RGE0024B; donor TPS65130RGER (JLCPCB C54989) + return ( + + ); +}; + +export default CC2340R21N0RGER; diff --git a/lib/chips/CC2340R5.circuit.tsx b/lib/chips/CC2340R5.circuit.tsx index 4e56bec5..190ea300 100644 --- a/lib/chips/CC2340R5.circuit.tsx +++ b/lib/chips/CC2340R5.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: "VDDR", @@ -47,6 +48,7 @@ const pinLabels = { export const CC2340R5 = (props: ChipProps) => { return ( ) => { EGP: { requiresGround: true }, RFGND: { requiresGround: true }, }} - schPinArrangement={{ - leftSide: { - direction: "top-to-bottom", - pins: [ - "DIO16_SWDIO", - "DIO17_SWDCK", - "nRST", - "DCDC", - "pin1", - "pin34", - "DIO3_X32_P", - "DIO4_X32_N", - "NC", - "VDDD", - "EGP", - ], - }, - rightSide: { - direction: "top-to-bottom", - pins: [ - "pin8", - "pin17", - "pin31", - "pin38", - "ANT", - "RFGND", - "X48_P", - "X48_N", - ], - }, - }} - schPinStyle={{ - nRST: { - marginBottom: 0.2, - }, - DCDC: { - marginBottom: 0.2, - }, - DIO3_X32_P: { - marginTop: 0.2, - }, - pin8: { - marginTop: 0, - }, - ANT: { - marginTop: 0.5, - }, - RFGND: { - marginTop: 0.2, - }, - X48_P: { - marginTop: 0.5, - }, - }} {...props} /> ); }; export const CC2340R52E0RKPR = CC2340R5; + +export default CC2340R5; diff --git a/lib/chips/CC2340R5MODAN0MHAR.circuit.tsx b/lib/chips/CC2340R5MODAN0MHAR.circuit.tsx new file mode 100644 index 00000000..e9dca3fd --- /dev/null +++ b/lib/chips/CC2340R5MODAN0MHAR.circuit.tsx @@ -0,0 +1,279 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["GND", "2", "GND_2"], + pin3: ["ANT_IN", "3"], + pin4: ["RFIO", "4"], + pin5: ["GND", "5", "GND_5"], + pin6: ["VDDS", "6", "VDDS_6"], + pin7: ["VDDS", "7", "VDDS_7"], + pin8: ["GND", "8", "GND_8"], + pin9: ["DIO6_A1", "9"], + pin10: ["DIO8", "10"], + pin11: ["DIO24_A7", "11"], + pin12: ["DIO3_X32P", "12"], + pin13: ["DIO4_X32N", "13"], + pin14: ["RSTN", "14"], + pin15: ["DIO21_A10", "15"], + pin16: ["DIO18", "16"], + pin17: ["DIO20_A11", "17"], + pin18: ["DIO12", "18"], + pin19: ["DIO17_SWDCK", "19"], + pin20: ["DIO16_SWDIO", "20"], + pin21: ["DIO11", "21"], + pin22: ["GND", "22", "GND_22"], + pin23: ["GND", "23", "GND_23"], + pin24: ["GND", "24", "GND_24"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "input", + pin4: "unknown", + pin5: "ground", + pin6: "power", + pin7: "power", + pin8: "ground", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "control", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "ground", + pin23: "ground", + pin24: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin5: { requiresGround: true }, + pin6: { requiresPower: true }, + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, + pin22: { requiresGround: true }, + pin23: { requiresGround: true }, + pin24: { requiresGround: true }, +} as const; + +export const CC2340R5MODAN0MHAR = (props: ChipProps) => { + // Footprint provenance: TI drawing MHA0024A; official source https://www.ti.com/lit/gpn/CC2340R5MODA pages 64 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC2340R5MODAN0MHAR; diff --git a/lib/chips/CC2500RGPR.circuit.tsx b/lib/chips/CC2500RGPR.circuit.tsx new file mode 100644 index 00000000..bc7b6444 --- /dev/null +++ b/lib/chips/CC2500RGPR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCLK"], + pin2: ["pin2"], + pin3: ["GDO2"], + pin4: ["DVDD"], + pin5: ["DCOUPL"], + pin6: ["pin6"], + pin7: ["CSN"], + pin8: ["pin8"], + pin9: ["AVDD1"], + pin10: ["pin10"], + pin11: ["AVDD2"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["AVDD3"], + pin15: ["AVDD4"], + pin16: ["GND1"], + pin17: ["RBIAS"], + pin18: ["DGUARD"], + pin19: ["GND2"], + pin20: ["SI"], + pin21: ["pin21"], +} as const; + +const pinAttributes = { + pin16: { requiresGround: true }, + pin19: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const CC2500RGPR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2500RGPR; diff --git a/lib/chips/CC2530F128RHAR.circuit.tsx b/lib/chips/CC2530F128RHAR.circuit.tsx new file mode 100644 index 00000000..3ea346f1 --- /dev/null +++ b/lib/chips/CC2530F128RHAR.circuit.tsx @@ -0,0 +1,85 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["GND3"], + pin4: ["GND4"], + pin5: ["P1_5"], + pin6: ["P1_4"], + pin7: ["P1_3"], + pin8: ["P1_2"], + pin9: ["P1_1"], + pin10: ["DVDD2"], + pin11: ["P1_0"], + pin12: ["P0_7"], + pin13: ["P0_6"], + pin14: ["P0_5"], + pin15: ["P0_4"], + pin16: ["P0_3"], + pin17: ["P0_2"], + pin18: ["P0_1"], + pin19: ["P0_0"], + pin20: ["RESET_N"], + pin21: ["AVDD5"], + pin22: ["XOSC_Q1"], + pin23: ["XOSC_Q2"], + pin24: ["AVDD3"], + pin25: ["RF_P"], + pin26: ["RF_N"], + pin27: ["AVDD2"], + pin28: ["AVDD1"], + pin29: ["AVDD4"], + pin30: ["RBIAS"], + pin31: ["AVDD6"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["P2_2"], + pin35: ["P2_1"], + pin36: ["P2_0"], + pin37: ["P1_7"], + pin38: ["P1_6"], + pin39: ["DVDD1"], + pin40: ["DCOUPL"], + pin41: ["GND5"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin4: { requiresGround: true }, + pin41: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin41: [...pinLabels["pin41"], "thermalpad"], +} as const; + +export const CC2530F128RHAR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2530F128RHAR; diff --git a/lib/chips/CC2531F128RHAR.circuit.tsx b/lib/chips/CC2531F128RHAR.circuit.tsx new file mode 100644 index 00000000..bfef3cc7 --- /dev/null +++ b/lib/chips/CC2531F128RHAR.circuit.tsx @@ -0,0 +1,121 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DGND_USB", "1"], + pin2: ["USB_P", "2"], + pin3: ["USB_N", "3"], + pin4: ["DVDD_USB", "4"], + pin5: ["P1_5", "5"], + pin6: ["P1_4", "6"], + pin7: ["P1_3", "7"], + pin8: ["P1_2", "8"], + pin9: ["P1_1", "9"], + pin10: ["DVDD2", "10"], + pin11: ["P1_0", "11"], + pin12: ["P0_7", "12"], + pin13: ["P0_6", "13"], + pin14: ["P0_5", "14"], + pin15: ["P0_4", "15"], + pin16: ["P0_3", "16"], + pin17: ["P0_2", "17"], + pin18: ["P0_1", "18"], + pin19: ["P0_0", "19"], + pin20: ["RESET_N", "20"], + pin21: ["AVDD5", "21"], + pin22: ["XOSC_Q1", "22"], + pin23: ["XOSC_Q2", "23"], + pin24: ["AVDD3", "24"], + pin25: ["RF_P", "25"], + pin26: ["RF_N", "26"], + pin27: ["AVDD2", "27"], + pin28: ["AVDD1", "28"], + pin29: ["AVDD4", "29"], + pin30: ["RBIAS", "30"], + pin31: ["AVDD6", "31"], + pin32: ["P2_4", "32"], + pin33: ["P2_3", "33"], + pin34: ["P2_2", "34"], + pin35: ["P2_1", "35"], + pin36: ["P2_0", "36"], + pin37: ["P1_7", "37"], + pin38: ["P1_6", "38"], + pin39: ["DVDD1", "39"], + pin40: ["DCOUPL", "40"], + pin41: ["GND", "41"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "power", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "power", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "control", + pin21: "power", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "power", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "power", + pin28: "power", + pin29: "power", + pin30: "bidirectional", + pin31: "power", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "bidirectional", + pin35: "bidirectional", + pin36: "bidirectional", + pin37: "bidirectional", + pin38: "bidirectional", + pin39: "power", + pin40: "power", + pin41: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin4: { requiresPower: true }, + pin10: { requiresPower: true }, + pin21: { requiresPower: true }, + pin24: { requiresPower: true }, + pin27: { requiresPower: true }, + pin28: { requiresPower: true }, + pin29: { requiresPower: true }, + pin31: { requiresPower: true }, + pin39: { requiresPower: true }, + pin40: { requiresPower: true }, + pin41: { requiresGround: true }, +} as const; + +export const CC2531F128RHAR = (props: ChipProps) => { + // Footprint provenance: TI drawing RHA0040H; donor CC2540F256RHAR (JLCPCB C22649) + return ( + + ); +}; + +export default CC2531F128RHAR; diff --git a/lib/chips/CC2540F256RHAR.circuit.tsx b/lib/chips/CC2540F256RHAR.circuit.tsx new file mode 100644 index 00000000..8e761808 --- /dev/null +++ b/lib/chips/CC2540F256RHAR.circuit.tsx @@ -0,0 +1,80 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DGND_BUS"], + pin2: ["USB_P"], + pin3: ["USB_N"], + pin4: ["DVDD_USB"], + pin5: ["P1_5"], + pin6: ["P1_4"], + pin7: ["P1_3"], + pin8: ["P1_2"], + pin9: ["P1_1"], + pin10: ["DVDD2"], + pin11: ["P1_0"], + pin12: ["P0_7"], + pin13: ["P0_6"], + pin14: ["P0_5"], + pin15: ["P0_4"], + pin16: ["P0_3"], + pin17: ["P0_2"], + pin18: ["P0_1"], + pin19: ["P0_0"], + pin20: ["RESET_N"], + pin21: ["AVDD5"], + pin22: ["XOSC_Q1"], + pin23: ["XOSC_Q2"], + pin24: ["AVDD3"], + pin25: ["RF_P"], + pin26: ["RF_N"], + pin27: ["AVDD2"], + pin28: ["AVDD1"], + pin29: ["AVDD4"], + pin30: ["R_BIAS"], + pin31: ["AVDD6"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["P2_2"], + pin35: ["P2_1"], + pin36: ["P2_0"], + pin37: ["P1_7"], + pin38: ["P1_6"], + pin39: ["DVDD1"], + pin40: ["DCOUPL"], + pin41: ["pin41"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin41: [...pinLabels["pin41"], "thermalpad"], +} as const; + +export const CC2540F256RHAR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2540F256RHAR; diff --git a/lib/chips/CC2592RGVR.circuit.tsx b/lib/chips/CC2592RGVR.circuit.tsx new file mode 100644 index 00000000..08e8afd2 --- /dev/null +++ b/lib/chips/CC2592RGVR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["RF_N"], + pin3: ["RF_P"], + pin4: ["GND2"], + pin5: ["PA_EN"], + pin6: ["LNA_EN"], + pin7: ["HGM"], + pin8: ["BIAS"], + pin9: ["GND3"], + pin10: ["ANT"], + pin11: ["GND4"], + pin12: ["GND5"], + pin13: ["VDD_LNA"], + pin14: ["VDD_BIAS"], + pin15: ["VDD_PA"], + pin16: ["GND6"], + pin17: ["pin17"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin4: { requiresGround: true }, + pin9: { requiresGround: true }, + pin11: { requiresGround: true }, + pin12: { requiresGround: true }, + pin16: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const CC2592RGVR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2592RGVR; diff --git a/lib/chips/CC2620F128RGZR.circuit.tsx b/lib/chips/CC2620F128RGZR.circuit.tsx new file mode 100644 index 00000000..bcab9175 --- /dev/null +++ b/lib/chips/CC2620F128RGZR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P"], + pin2: ["RF_N"], + pin3: ["X32K_Q1"], + pin4: ["X32K_Q2"], + pin5: ["DIO_0"], + pin6: ["DIO_1"], + pin7: ["DIO_2"], + pin8: ["DIO_3"], + pin9: ["DIO_4"], + pin10: ["DIO_5"], + pin11: ["DIO_6"], + pin12: ["DIO_7"], + pin13: ["VDDS2"], + pin14: ["DIO_8"], + pin15: ["DIO_9"], + pin16: ["DIO_10"], + pin17: ["DIO_11"], + pin18: ["DIO_12"], + pin19: ["DIO_13"], + pin20: ["DIO_14"], + pin21: ["DIO_15"], + pin22: ["VDDS3"], + pin23: ["DCOUPL"], + pin24: ["JTAG_TMSC"], + pin25: ["JTAG_TCKC"], + pin26: ["DIO_16"], + pin27: ["DIO_17"], + pin28: ["DIO_18"], + pin29: ["DIO_19"], + pin30: ["DIO_20"], + pin31: ["DIO_21"], + pin32: ["DIO_22"], + pin33: ["DCDC_SW"], + pin34: ["VDDS_DCDC"], + pin35: ["RESET_N"], + pin36: ["DIO_23"], + pin37: ["DIO_24"], + pin38: ["DIO_25"], + pin39: ["DIO_26"], + pin40: ["DIO_27"], + pin41: ["DIO_28"], + pin42: ["DIO_29"], + pin43: ["DIO_30"], + pin44: ["VDDS"], + pin45: ["VDDR"], + pin46: ["X24M_N"], + pin47: ["X24M_P"], + pin48: ["VDDR_RF"], + pin49: ["pin49"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const CC2620F128RGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2620F128RGZR; diff --git a/lib/chips/CC2652RB1FRGZR.circuit.tsx b/lib/chips/CC2652RB1FRGZR.circuit.tsx new file mode 100644 index 00000000..ed0adaf9 --- /dev/null +++ b/lib/chips/CC2652RB1FRGZR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RF_P"], + pin2: ["RF_N"], + pin3: ["X32K_Q1"], + pin4: ["X32K_Q2"], + pin5: ["DIO_0"], + pin6: ["DIO_1"], + pin7: ["DIO_2"], + pin8: ["DIO_3"], + pin9: ["DIO_4"], + pin10: ["DIO_5"], + pin11: ["DIO_6"], + pin12: ["DIO_7"], + pin13: ["VDDS2"], + pin14: ["DIO_8"], + pin15: ["DIO_9"], + pin16: ["DIO_10"], + pin17: ["DIO_11"], + pin18: ["DIO_12"], + pin19: ["DIO_13"], + pin20: ["DIO_14"], + pin21: ["DIO_15"], + pin22: ["VDDS3"], + pin23: ["DCOUPL"], + pin24: ["JTAG_TMSC"], + pin25: ["JTAG_TCKC"], + pin26: ["DIO_16"], + pin27: ["DIO_17"], + pin28: ["DIO_18"], + pin29: ["DIO_19"], + pin30: ["DIO_20"], + pin31: ["DIO_21"], + pin32: ["DIO_22"], + pin33: ["DCDC_SW"], + pin34: ["VDDS_DCDC"], + pin35: ["RESET_N"], + pin36: ["DIO_23"], + pin37: ["DIO_24"], + pin38: ["DIO_25"], + pin39: ["DIO_26"], + pin40: ["DIO_27"], + pin41: ["DIO_28"], + pin42: ["DIO_29"], + pin43: ["DIO_30"], + pin44: ["VDDS"], + pin45: ["VDDR"], + pin46: ["X48M_N"], + pin47: ["X48M_P"], + pin48: ["VDDR_RF"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const CC2652RB1FRGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default CC2652RB1FRGZR; diff --git a/lib/chips/CC2755P105E0WRHAR.circuit.tsx b/lib/chips/CC2755P105E0WRHAR.circuit.tsx new file mode 100644 index 00000000..47beffaa --- /dev/null +++ b/lib/chips/CC2755P105E0WRHAR.circuit.tsx @@ -0,0 +1,454 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDDR", "1", "VDDR_1"], + pin2: ["VDDR", "2", "VDDR_2"], + pin3: ["DIO0", "3"], + pin4: ["DIO1", "4"], + pin5: ["DIO2", "5"], + pin6: ["DIO3", "6"], + pin7: ["DIO4", "7"], + pin8: ["DIO5", "8"], + pin9: ["VDDIO", "9", "VDDIO_9"], + pin10: ["DIO7", "10"], + pin11: ["DIO9_SWDIO", "11"], + pin12: ["DIO10_SWDCK", "12"], + pin13: ["DIO11", "13"], + pin14: ["DIO12", "14"], + pin15: ["DIO15", "15"], + pin16: ["DIO16", "16"], + pin17: ["VDDIO", "17", "VDDIO_17"], + pin18: ["VDDS", "18", "VDDS_18"], + pin19: ["DIO17_A8", "19"], + pin20: ["DIO18_A7", "20"], + pin21: ["DIO19_A6", "21"], + pin22: ["DIO20_A5", "22"], + pin23: ["DIO21_A4", "23"], + pin24: ["DIO22_A3", "24"], + pin25: ["RSTN", "25"], + pin26: ["DIO23_X32P", "26"], + pin27: ["DIO24_X32N", "27"], + pin28: ["VDDD", "28"], + pin29: ["VDDS", "29", "VDDS_29"], + pin30: ["DCDC", "30"], + pin31: ["VDDS", "31", "VDDS_31"], + pin32: ["DIO27_A1", "32"], + pin33: ["DIO28_A0", "33"], + pin34: ["VDDR", "34", "VDDR_34"], + pin35: ["X48P", "35"], + pin36: ["X48N", "36"], + pin37: ["NC", "37", "NC_37"], + pin38: ["VDDS", "38", "VDDS_38"], + pin39: ["ANT", "39"], + pin40: ["NC", "40", "NC_40"], + pin41: ["EGP", "41"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "power", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "power", + pin18: "power", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "control", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "power", + pin29: "power", + pin30: "power", + pin31: "power", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "power", + pin35: "unknown", + pin36: "unknown", + pin37: "no-connect", + pin38: "power", + pin39: "unknown", + pin40: "no-connect", + pin41: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin9: { requiresPower: true }, + pin17: { requiresPower: true }, + pin18: { requiresPower: true }, + pin28: { requiresPower: true }, + pin29: { requiresPower: true }, + pin30: { requiresPower: true }, + pin31: { requiresPower: true }, + pin34: { requiresPower: true }, + pin37: { doNotConnect: true }, + pin38: { requiresPower: true }, + pin40: { doNotConnect: true }, + pin41: { requiresGround: true }, +} as const; + +export const CC2755P105E0WRHAR = (props: ChipProps) => { + // Footprint provenance: TI drawing RHA0040T; official source https://www.ti.com/lit/gpn/CC2755P10 pages 91 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC2755P105E0WRHAR; diff --git a/lib/chips/CC2755P207E0WRHAR.circuit.tsx b/lib/chips/CC2755P207E0WRHAR.circuit.tsx new file mode 100644 index 00000000..9b1f8098 --- /dev/null +++ b/lib/chips/CC2755P207E0WRHAR.circuit.tsx @@ -0,0 +1,454 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDDR", "1", "VDDR_1"], + pin2: ["VDDR", "2", "VDDR_2"], + pin3: ["DIO0", "3"], + pin4: ["DIO1", "4"], + pin5: ["DIO2", "5"], + pin6: ["DIO3", "6"], + pin7: ["DIO4", "7"], + pin8: ["DIO5", "8"], + pin9: ["VDDIO", "9", "VDDIO_9"], + pin10: ["DIO7", "10"], + pin11: ["DIO9_SWDIO", "11"], + pin12: ["DIO10_SWDCK", "12"], + pin13: ["DIO11", "13"], + pin14: ["DIO12", "14"], + pin15: ["DIO15", "15"], + pin16: ["DIO16", "16"], + pin17: ["VDDIO", "17", "VDDIO_17"], + pin18: ["VDDS", "18", "VDDS_18"], + pin19: ["DIO17_A8", "19"], + pin20: ["DIO18_A7", "20"], + pin21: ["DIO19_A6", "21"], + pin22: ["DIO20_A5", "22"], + pin23: ["DIO21_A4", "23"], + pin24: ["DIO22_A3", "24"], + pin25: ["RSTN", "25"], + pin26: ["DIO23_X32P", "26"], + pin27: ["DIO24_X32N", "27"], + pin28: ["VDDD", "28"], + pin29: ["VDDS", "29", "VDDS_29"], + pin30: ["DCDC", "30"], + pin31: ["VDDS", "31", "VDDS_31"], + pin32: ["DIO27_A1", "32"], + pin33: ["DIO28_A0", "33"], + pin34: ["VDDR", "34", "VDDR_34"], + pin35: ["X48P", "35"], + pin36: ["X48N", "36"], + pin37: ["NC", "37", "NC_37"], + pin38: ["VDDS", "38", "VDDS_38"], + pin39: ["ANT", "39"], + pin40: ["NC", "40", "NC_40"], + pin41: ["EGP", "41"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "power", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "power", + pin18: "power", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "control", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "power", + pin29: "power", + pin30: "power", + pin31: "power", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "power", + pin35: "unknown", + pin36: "unknown", + pin37: "no-connect", + pin38: "power", + pin39: "unknown", + pin40: "no-connect", + pin41: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin9: { requiresPower: true }, + pin17: { requiresPower: true }, + pin18: { requiresPower: true }, + pin28: { requiresPower: true }, + pin29: { requiresPower: true }, + pin30: { requiresPower: true }, + pin31: { requiresPower: true }, + pin34: { requiresPower: true }, + pin37: { doNotConnect: true }, + pin38: { requiresPower: true }, + pin40: { doNotConnect: true }, + pin41: { requiresGround: true }, +} as const; + +export const CC2755P207E0WRHAR = (props: ChipProps) => { + // Footprint provenance: TI drawing RHA0040T; official source https://www.ti.com/lit/gpn/CC2755P10 pages 91 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC2755P207E0WRHAR; diff --git a/lib/chips/CC3100MODR11MAMOBT.circuit.tsx b/lib/chips/CC3100MODR11MAMOBT.circuit.tsx new file mode 100644 index 00000000..e04e951c --- /dev/null +++ b/lib/chips/CC3100MODR11MAMOBT.circuit.tsx @@ -0,0 +1,707 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["NC1"], + pin4: ["nHIB"], + pin5: ["HOST_SPI_CLK"], + pin6: ["HOST_SPI_DIN"], + pin7: ["HOST_SPI_DOUT"], + pin8: ["HOST_SPI_nCS"], + pin9: ["NC2"], + pin10: ["FORCE_AP"], + pin11: ["HOST_INTR"], + pin12: ["NC3"], + pin13: ["NC4"], + pin14: ["NC5"], + pin15: ["NC6"], + pin16: ["GND3"], + pin17: ["NC7"], + pin18: ["NC8"], + pin19: ["RESERVED1"], + pin20: ["NC9"], + pin21: ["RESERVED2"], + pin22: ["NC10"], + pin23: ["SOP2"], + pin24: ["SOP1"], + pin25: ["NC11"], + pin26: ["NC12"], + pin27: ["GND4"], + pin28: ["GND5"], + pin29: ["NC13"], + pin30: ["GND6"], + pin31: ["RF_BG"], + pin32: ["GND7"], + pin33: ["NC14"], + pin34: ["SOP0"], + pin35: ["nRESET"], + pin36: ["VBAT_DCDC_ANA"], + pin37: ["VBAT_DCDC_PA"], + pin38: ["GND8"], + pin39: ["NC15"], + pin40: ["VBAT_DCDC_DIG_IO"], + pin41: ["NC16"], + pin42: ["NC17"], + pin43: ["GND9"], + pin44: ["UART1_nRTS"], + pin45: ["NC18"], + pin46: ["UART1_TX"], + pin47: ["UART1_RX"], + pin48: ["TEST_58"], + pin49: ["TEST_59"], + pin50: ["TEST_60"], + pin51: ["UART1_nCTS"], + pin52: ["TEST_62"], + pin53: ["NC19"], + pin54: ["NC20"], + pin55: ["GND18"], + pin56: ["GND10"], + pin57: ["GND11"], + pin58: ["GND12"], + pin59: ["GND13"], + pin60: ["GND14"], + pin61: ["GND15"], + pin62: ["GND16"], + pin63: ["GND17"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { doNotConnect: true }, + pin9: { doNotConnect: true }, + pin12: { doNotConnect: true }, + pin13: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin16: { requiresGround: true }, + pin17: { doNotConnect: true }, + pin18: { doNotConnect: true }, + pin20: { doNotConnect: true }, + pin22: { doNotConnect: true }, + pin25: { doNotConnect: true }, + pin26: { doNotConnect: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { doNotConnect: true }, + pin30: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { doNotConnect: true }, + pin38: { requiresGround: true }, + pin39: { doNotConnect: true }, + pin41: { doNotConnect: true }, + pin42: { doNotConnect: true }, + pin43: { requiresGround: true }, + pin45: { doNotConnect: true }, + pin53: { doNotConnect: true }, + pin54: { doNotConnect: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, +} as const; + +export const CC3100MODR11MAMOBT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3100MODR11MAMOBT; diff --git a/lib/chips/CC3100R11MRGCR.circuit.tsx b/lib/chips/CC3100R11MRGCR.circuit.tsx new file mode 100644 index 00000000..19e23451 --- /dev/null +++ b/lib/chips/CC3100R11MRGCR.circuit.tsx @@ -0,0 +1,194 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC", "1", "NC_1"], + pin2: ["NHIB", "2"], + pin3: ["RESERVED", "3", "RESERVED_3"], + pin4: ["FORCE_AP", "4"], + pin5: ["HOST_SPI_CLK", "5"], + pin6: ["HOST_SPI_MOSI", "6"], + pin7: ["HOST_SPI_MISO", "7"], + pin8: ["HOST_SPI_NCS", "8"], + pin9: ["VDD_DIG1", "9"], + pin10: ["VIN_IO1", "10"], + pin11: ["FLASH_SPI_CLK", "11"], + pin12: ["FLASH_SPI_MOSI", "12"], + pin13: ["FLASH_SPI_MISO_ACTIVE_HIGH", "13"], + pin14: ["FLASH_SPI_NCS", "14"], + pin15: ["HOST_INTR", "15"], + pin16: ["NC", "16", "NC_16"], + pin17: ["NC", "17", "NC_17"], + pin18: ["NC", "18", "NC_18"], + pin19: ["RESERVED", "19", "RESERVED_19"], + pin20: ["NC", "20", "NC_20"], + pin21: ["SOP2", "TCXO_EN", "21"], + pin22: ["WLAN_XTAL_N", "22"], + pin23: ["WLAN_XTAL_P", "23"], + pin24: ["VDD_PLL", "24"], + pin25: ["LDO_IN2", "25"], + pin26: ["NC", "26", "NC_26"], + pin27: ["NC", "27", "NC_27"], + pin28: ["NC", "28", "NC_28"], + pin29: ["RESERVED", "29", "RESERVED_29"], + pin30: ["RESERVED", "30", "RESERVED_30"], + pin31: ["RF_BG", "31"], + pin32: ["NRESET", "32"], + pin33: ["VDD_PA_IN", "33"], + pin34: ["SOP1", "34"], + pin35: ["SOP0", "35"], + pin36: ["LDO_IN1", "36"], + pin37: ["VIN_DCDC_ANA", "37"], + pin38: ["DCDC_ANA_SW", "38"], + pin39: ["VIN_DCDC_PA", "39"], + pin40: ["DCDC_PA_SW_P", "40"], + pin41: ["DCDC_PA_SW_N", "41"], + pin42: ["DCDC_PA_OUT", "42"], + pin43: ["DCDC_DIG_SW", "43"], + pin44: ["VIN_DCDC_DIG", "44"], + pin45: ["DCDC_ANA2_SW_P", "45"], + pin46: ["DCDC_ANA2_SW_N", "46"], + pin47: ["VDD_ANA2", "47"], + pin48: ["VDD_ANA1", "48"], + pin49: ["VDD_RAM", "49"], + pin50: ["UART1_NRTS", "50"], + pin51: ["RTC_XTAL_P", "51"], + pin52: ["RTC_XTAL_N", "52"], + pin53: ["NC", "53", "NC_53"], + pin54: ["VIN_IO2", "54"], + pin55: ["UART1_TX", "55"], + pin56: ["VDD_DIG2", "56"], + pin57: ["UART1_RX", "57"], + pin58: ["TEST_58", "58"], + pin59: ["TEST_59", "59"], + pin60: ["TEST_60", "60"], + pin61: ["UART1_NCTS", "61"], + pin62: ["TEST_62", "62"], + pin63: ["NC", "63", "NC_63"], + pin64: ["NC", "64", "NC_64"], + pin65: ["GND", "65"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "input", + pin3: "no-connect", + pin4: "input", + pin5: "control", + pin6: "input", + pin7: "output", + pin8: "input", + pin9: "power", + pin10: "power", + pin11: "output", + pin12: "output", + pin13: "input", + pin14: "output", + pin15: "output", + pin16: "no-connect", + pin17: "no-connect", + pin18: "no-connect", + pin19: "no-connect", + pin20: "no-connect", + pin21: "output", + pin22: "unknown", + pin23: "unknown", + pin24: "power", + pin25: "power", + pin26: "no-connect", + pin27: "no-connect", + pin28: "no-connect", + pin29: "no-connect", + pin30: "no-connect", + pin31: "unknown", + pin32: "input", + pin33: "power", + pin34: "unknown", + pin35: "unknown", + pin36: "power", + pin37: "power", + pin38: "power", + pin39: "power", + pin40: "power", + pin41: "power", + pin42: "power", + pin43: "power", + pin44: "power", + pin45: "power", + pin46: "power", + pin47: "power", + pin48: "power", + pin49: "power", + pin50: "output", + pin51: "unknown", + pin52: "unknown", + pin53: "no-connect", + pin54: "power", + pin55: "output", + pin56: "power", + pin57: "input", + pin58: "control", + pin59: "control", + pin60: "output", + pin61: "input", + pin62: "output", + pin63: "no-connect", + pin64: "no-connect", + pin65: "ground", +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { doNotConnect: true }, + pin9: { requiresPower: true }, + pin10: { requiresPower: true }, + pin16: { doNotConnect: true }, + pin17: { doNotConnect: true }, + pin18: { doNotConnect: true }, + pin19: { doNotConnect: true }, + pin20: { doNotConnect: true }, + pin24: { requiresPower: true }, + pin25: { requiresPower: true }, + pin26: { doNotConnect: true }, + pin27: { doNotConnect: true }, + pin28: { doNotConnect: true }, + pin29: { doNotConnect: true }, + pin30: { doNotConnect: true }, + pin33: { requiresPower: true }, + pin36: { requiresPower: true }, + pin37: { requiresPower: true }, + pin38: { requiresPower: true }, + pin39: { requiresPower: true }, + pin40: { requiresPower: true }, + pin41: { requiresPower: true }, + pin42: { requiresPower: true }, + pin43: { requiresPower: true }, + pin44: { requiresPower: true }, + pin45: { requiresPower: true }, + pin46: { requiresPower: true }, + pin47: { requiresPower: true }, + pin48: { requiresPower: true }, + pin49: { requiresPower: true }, + pin53: { doNotConnect: true }, + pin54: { requiresPower: true }, + pin56: { requiresPower: true }, + pin63: { doNotConnect: true }, + pin64: { doNotConnect: true }, + pin65: { requiresGround: true }, +} as const; + +export const CC3100R11MRGCR = (props: ChipProps) => { + // Footprint provenance: TI drawing RGC0064M; donor CC3200R1M2RGC (JLCPCB C1526162) + return ( + + ); +}; + +export default CC3100R11MRGCR; diff --git a/lib/chips/CC3200MODR1M2AMOBR.circuit.tsx b/lib/chips/CC3200MODR1M2AMOBR.circuit.tsx new file mode 100644 index 00000000..976f8ef6 --- /dev/null +++ b/lib/chips/CC3200MODR1M2AMOBR.circuit.tsx @@ -0,0 +1,668 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND2"], + pin2: ["GND1"], + pin3: ["GPIO10"], + pin4: ["GPIO11"], + pin5: ["GPIO14"], + pin6: ["GPIO15"], + pin7: ["GPIO16"], + pin8: ["GPIO17"], + pin9: ["GPIO12"], + pin10: ["GPIO13"], + pin11: ["GPIO22"], + pin12: ["JTAG_TDI"], + pin13: ["NC1"], + pin14: ["NC2"], + pin15: ["NC3"], + pin16: ["GND3"], + pin17: ["NC7"], + pin18: ["JTAG_TDO"], + pin19: ["GPIO28"], + pin20: ["NC8"], + pin21: ["JTAG_TCK"], + pin22: ["JTAG_TMS"], + pin23: ["SOP2"], + pin24: ["SOP1"], + pin25: ["ANTSEL1"], + pin26: ["ANTSEL2"], + pin27: ["GND9"], + pin28: ["GND4"], + pin29: ["NC4"], + pin30: ["GND5"], + pin31: ["RF_BG"], + pin32: ["GND6"], + pin33: ["NC5"], + pin34: ["SOP0"], + pin35: ["nRESET"], + pin36: ["VBAT_DCDC_ANA"], + pin37: ["VBAT_DCDC_PA"], + pin38: ["GND8"], + pin39: ["VDD_ANA2"], + pin40: ["VBAT_DCDC_DIG_IO"], + pin41: ["NC6"], + pin42: ["GPIO30"], + pin43: ["GND7"], + pin44: ["GPIO0"], + pin45: ["NC9"], + pin46: ["GPIO1"], + pin47: ["GPIO2"], + pin48: ["GPIO3"], + pin49: ["GPIO4"], + pin50: ["GPIO5"], + pin51: ["GPIO6"], + pin52: ["GPIO7"], + pin53: ["GPIO8"], + pin54: ["GPIO9"], + pin55: ["GND10"], + pin56: ["GND11"], + pin57: ["GND12"], + pin58: ["GND13"], + pin59: ["GND14"], + pin60: ["GND15"], + pin61: ["GND16"], + pin62: ["GND17"], + pin63: ["GND18"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin13: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin16: { requiresGround: true }, + pin17: { doNotConnect: true }, + pin20: { doNotConnect: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { doNotConnect: true }, + pin30: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { doNotConnect: true }, + pin38: { requiresGround: true }, + pin41: { doNotConnect: true }, + pin43: { requiresGround: true }, + pin45: { doNotConnect: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, +} as const; + +export const CC3200MODR1M2AMOBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3200MODR1M2AMOBR; diff --git a/lib/chips/CC3200R1M2RGC.circuit.tsx b/lib/chips/CC3200R1M2RGC.circuit.tsx new file mode 100644 index 00000000..08f69991 --- /dev/null +++ b/lib/chips/CC3200R1M2RGC.circuit.tsx @@ -0,0 +1,99 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO10"], + pin2: ["GPIO11"], + pin3: ["GPIO12"], + pin4: ["GPIO13"], + pin5: ["GPIO14"], + pin6: ["GPIO15"], + pin7: ["GPIO16"], + pin8: ["GPIO17"], + pin9: ["VDD_DIG1"], + pin10: ["VIN_IO1"], + pin11: ["FLASH_SPI_CLK"], + pin12: ["FLASH_SPI_DOUT"], + pin13: ["FLASH_SPI_DIN"], + pin14: ["FLASH_SPI_CS"], + pin15: ["GPIO22"], + pin16: ["TDI"], + pin17: ["TDO"], + pin18: ["GPIO28"], + pin19: ["TCK"], + pin20: ["TMS"], + pin21: ["SOP2"], + pin22: ["WLAN_TXAL_N"], + pin23: ["WLAN_TXAL_P"], + pin24: ["VDD_PLL"], + pin25: ["LDO_IN2"], + pin26: ["NC3"], + pin27: ["NC2"], + pin28: ["NC1"], + pin29: ["ANTSEL1"], + pin30: ["ANTSEL2"], + pin31: ["RF_BG"], + pin32: ["nRESET"], + pin33: ["VDD_PA_IN"], + pin34: ["SOP1"], + pin35: ["SOP0"], + pin36: ["LDO_IN1"], + pin37: ["VIN_DCDC_ANA"], + pin38: ["DCDC_ANA_SW"], + pin39: ["VIN_DCDC_PA"], + pin40: ["DCDC_PA_SW_P"], + pin41: ["DCDC_PA_SW_N"], + pin42: ["DCDC_PA_OUT"], + pin43: ["DCDC_DIG_SW"], + pin44: ["VIN_DCDC_DIG"], + pin45: ["DCDC_ANA2_SW_P"], + pin46: ["DCDC_ANA2_SW_N"], + pin47: ["VDD_ANA2"], + pin48: ["VDD_ANA1"], + pin49: ["VDD_RAM"], + pin50: ["GPIO0"], + pin51: ["RTC_XTAL_P"], + pin52: ["RTC_XTAL_N"], + pin53: ["GPIO30"], + pin54: ["VIN_IO2"], + pin55: ["GPIO1"], + pin56: ["VDD_DIG2"], + pin57: ["GPIO2"], + pin58: ["GPIO3"], + pin59: ["GPIO4"], + pin60: ["GPIO5"], + pin61: ["GPIO6"], + pin62: ["GPIO7"], + pin63: ["GPIO8"], + pin64: ["GPIO9"], + pin65: ["EP"], +} as const; + +const pinAttributes = { + pin26: { doNotConnect: true }, + pin27: { doNotConnect: true }, + pin28: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const CC3200R1M2RGC = (props: ChipProps) => { + return ( + + ); +}; + +export default CC3200R1M2RGC; diff --git a/lib/chips/CC3220MODASM2MONR.circuit.tsx b/lib/chips/CC3220MODASM2MONR.circuit.tsx new file mode 100644 index 00000000..6c892a54 --- /dev/null +++ b/lib/chips/CC3220MODASM2MONR.circuit.tsx @@ -0,0 +1,674 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["GPIO10"], + pin4: ["GPIO11"], + pin5: ["GPIO14"], + pin6: ["GPIO15"], + pin7: ["GPIO16"], + pin8: ["GPIO17"], + pin9: ["GPIO12"], + pin10: ["GPIO13"], + pin11: ["GPIO22"], + pin12: ["JTAG_TDI"], + pin13: ["FLASH_SPI_MISO"], + pin14: ["FLASH_SPI_nCS_IN"], + pin15: ["FLASH_SPI_CLK"], + pin16: ["GND3"], + pin17: ["FLASH_SPI_MOSI"], + pin18: ["JTAG_TDO"], + pin19: ["GPIO28"], + pin20: ["NC1"], + pin21: ["JTAG_TCK"], + pin22: ["JTAG_TMS"], + pin23: ["SOP2"], + pin24: ["SOP1"], + pin25: ["ANT_SEL1"], + pin26: ["ANT_SEL2"], + pin27: ["GND4"], + pin28: ["GND5"], + pin29: ["NC2"], + pin30: ["GND6"], + pin31: ["RF_BG"], + pin32: ["GND7"], + pin33: ["NC3"], + pin34: ["SOP0"], + pin35: ["nRESET"], + pin36: ["VBAT_RESET"], + pin37: ["VBAT1"], + pin38: ["GND8"], + pin39: ["NC4"], + pin40: ["VBAT2"], + pin41: ["NC5"], + pin42: ["GPIO30"], + pin43: ["GND9"], + pin44: ["GPIO0"], + pin45: ["NC6"], + pin46: ["GPIO1"], + pin47: ["GPIO2"], + pin48: ["GPIO3"], + pin49: ["GPIO4"], + pin50: ["GPIO5"], + pin51: ["GPIO6"], + pin52: ["GPIO7"], + pin53: ["GPIO8"], + pin54: ["GPIO9"], + pin55: ["GND10"], + pin56: ["GND11"], + pin57: ["GND12"], + pin58: ["GND13"], + pin59: ["GND14"], + pin60: ["GND15"], + pin61: ["GND16"], + pin62: ["GND17"], + pin63: ["GND18"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin16: { requiresGround: true }, + pin20: { doNotConnect: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { doNotConnect: true }, + pin30: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { doNotConnect: true }, + pin38: { requiresGround: true }, + pin39: { doNotConnect: true }, + pin41: { doNotConnect: true }, + pin43: { requiresGround: true }, + pin45: { doNotConnect: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, +} as const; + +export const CC3220MODASM2MONR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3220MODASM2MONR; diff --git a/lib/chips/CC3300MODENIAMOZR.circuit.tsx b/lib/chips/CC3300MODENIAMOZR.circuit.tsx new file mode 100644 index 00000000..a2d0634e --- /dev/null +++ b/lib/chips/CC3300MODENIAMOZR.circuit.tsx @@ -0,0 +1,719 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["GND", "2", "GND_2"], + pin3: ["SDIO_CLK", "3"], + pin4: ["SDIO_CMD", "4"], + pin5: ["SDIO_D3", "5"], + pin6: ["SDIO_D2", "6"], + pin7: ["SDIO_D1", "7"], + pin8: ["SDIO_D0", "8"], + pin9: ["LOGGER", "9"], + pin10: ["HOST_IRQ_WL", "10"], + pin11: ["HOST_IRQ_BLE", "11"], + pin12: ["SWDIO", "12"], + pin13: ["SWCLK", "13"], + pin14: ["GND", "14", "GND_14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["GND", "16", "GND_16"], + pin17: ["NRESET", "17"], + pin18: ["SLOW_CLK_IN", "18"], + pin19: ["VPP_IN", "19"], + pin20: ["GND", "20", "GND_20"], + pin21: ["GND", "21", "GND_21"], + pin22: ["GND", "22", "GND_22"], + pin23: ["RF_OUT", "23"], + pin24: ["GND", "24", "GND_24"], + pin25: ["GND", "25", "GND_25"], + pin26: ["GND", "26", "GND_26"], + pin27: ["GND", "27", "GND_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["GND", "29", "GND_29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["GND", "31", "GND_31"], + pin32: ["GND", "32", "GND_32"], + pin33: ["GND", "33", "GND_33"], + pin34: ["GND", "34", "GND_34"], + pin35: ["GND", "35", "GND_35"], + pin36: ["GND", "36", "GND_36"], + pin37: ["3V3_IN", "37", "3V3_IN_37"], + pin38: ["3V3_IN", "38", "3V3_IN_38"], + pin39: ["GND", "39", "GND_39"], + pin40: ["GND", "40", "GND_40"], + pin41: ["GND", "41", "GND_41"], + pin42: ["GND", "42", "GND_42"], + pin43: ["GND", "43", "GND_43"], + pin44: ["GND", "44", "GND_44"], + pin45: ["COEX_PRIORITY", "45"], + pin46: ["COEX_REQ", "46"], + pin47: ["COEX_GRANT", "47"], + pin48: ["UART", "48", "UART_48"], + pin49: ["UART", "49", "UART_49"], + pin50: ["UART", "50", "UART_50"], + pin51: ["UART", "51", "UART_51"], + pin52: ["ANT_SEL", "52"], + pin53: ["1V8_IN", "53", "1V8_IN_53"], + pin54: ["1V8_IN", "54", "1V8_IN_54"], + pin55: ["GND", "55", "GND_55"], + pin56: ["GND", "56", "GND_56"], + pin57: ["GND", "57", "GND_57"], + pin58: ["GND", "58", "GND_58"], + pin59: ["GND", "59", "GND_59"], + pin60: ["GND", "60", "GND_60"], + pin61: ["GND", "61", "GND_61"], + pin62: ["GND", "62", "GND_62"], + pin63: ["GND", "63", "GND_63"], + pin64: ["GND", "64", "GND_64"], + pin65: ["GND", "65", "GND_65"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "control", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "unknown", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "ground", + pin15: "ground", + pin16: "ground", + pin17: "unknown", + pin18: "control", + pin19: "power", + pin20: "ground", + pin21: "ground", + pin22: "ground", + pin23: "output", + pin24: "ground", + pin25: "ground", + pin26: "ground", + pin27: "ground", + pin28: "ground", + pin29: "ground", + pin30: "ground", + pin31: "ground", + pin32: "ground", + pin33: "ground", + pin34: "ground", + pin35: "ground", + pin36: "ground", + pin37: "input", + pin38: "input", + pin39: "ground", + pin40: "ground", + pin41: "ground", + pin42: "ground", + pin43: "ground", + pin44: "ground", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "control", + pin53: "input", + pin54: "input", + pin55: "ground", + pin56: "ground", + pin57: "ground", + pin58: "ground", + pin59: "ground", + pin60: "ground", + pin61: "ground", + pin62: "ground", + pin63: "ground", + pin64: "ground", + pin65: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresGround: true }, + pin19: { requiresPower: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin22: { requiresGround: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, + pin26: { requiresGround: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { requiresGround: true }, + pin30: { requiresGround: true }, + pin31: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin34: { requiresGround: true }, + pin35: { requiresGround: true }, + pin36: { requiresGround: true }, + pin39: { requiresGround: true }, + pin40: { requiresGround: true }, + pin41: { requiresGround: true }, + pin42: { requiresGround: true }, + pin43: { requiresGround: true }, + pin44: { requiresGround: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresGround: true }, + pin65: { requiresGround: true }, +} as const; + +export const CC3300MODENIAMOZR = (props: ChipProps) => { + // Footprint provenance: TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3300MODENIAMOZR; diff --git a/lib/chips/CC3301MODENIAMOZR.circuit.tsx b/lib/chips/CC3301MODENIAMOZR.circuit.tsx new file mode 100644 index 00000000..dd57d9b1 --- /dev/null +++ b/lib/chips/CC3301MODENIAMOZR.circuit.tsx @@ -0,0 +1,719 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["GND", "2", "GND_2"], + pin3: ["SDIO_CLK", "3"], + pin4: ["SDIO_CMD", "4"], + pin5: ["SDIO_D3", "5"], + pin6: ["SDIO_D2", "6"], + pin7: ["SDIO_D1", "7"], + pin8: ["SDIO_D0", "8"], + pin9: ["LOGGER", "9"], + pin10: ["HOST_IRQ_WL", "10"], + pin11: ["HOST_IRQ_BLE", "11"], + pin12: ["SWDIO", "12"], + pin13: ["SWCLK", "13"], + pin14: ["GND", "14", "GND_14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["GND", "16", "GND_16"], + pin17: ["NRESET", "17"], + pin18: ["SLOW_CLK_IN", "18"], + pin19: ["VPP_IN", "19"], + pin20: ["GND", "20", "GND_20"], + pin21: ["GND", "21", "GND_21"], + pin22: ["GND", "22", "GND_22"], + pin23: ["RF_OUT", "23"], + pin24: ["GND", "24", "GND_24"], + pin25: ["GND", "25", "GND_25"], + pin26: ["GND", "26", "GND_26"], + pin27: ["GND", "27", "GND_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["GND", "29", "GND_29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["GND", "31", "GND_31"], + pin32: ["GND", "32", "GND_32"], + pin33: ["GND", "33", "GND_33"], + pin34: ["GND", "34", "GND_34"], + pin35: ["GND", "35", "GND_35"], + pin36: ["GND", "36", "GND_36"], + pin37: ["3V3_IN", "37", "3V3_IN_37"], + pin38: ["3V3_IN", "38", "3V3_IN_38"], + pin39: ["GND", "39", "GND_39"], + pin40: ["GND", "40", "GND_40"], + pin41: ["GND", "41", "GND_41"], + pin42: ["GND", "42", "GND_42"], + pin43: ["GND", "43", "GND_43"], + pin44: ["GND", "44", "GND_44"], + pin45: ["COEX_PRIORITY", "45"], + pin46: ["COEX_REQ", "46"], + pin47: ["COEX_GRANT", "47"], + pin48: ["UART", "48", "UART_48"], + pin49: ["UART", "49", "UART_49"], + pin50: ["UART", "50", "UART_50"], + pin51: ["UART", "51", "UART_51"], + pin52: ["ANT_SEL", "52"], + pin53: ["1V8_IN", "53", "1V8_IN_53"], + pin54: ["1V8_IN", "54", "1V8_IN_54"], + pin55: ["GND", "55", "GND_55"], + pin56: ["GND", "56", "GND_56"], + pin57: ["GND", "57", "GND_57"], + pin58: ["GND", "58", "GND_58"], + pin59: ["GND", "59", "GND_59"], + pin60: ["GND", "60", "GND_60"], + pin61: ["GND", "61", "GND_61"], + pin62: ["GND", "62", "GND_62"], + pin63: ["GND", "63", "GND_63"], + pin64: ["GND", "64", "GND_64"], + pin65: ["GND", "65", "GND_65"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "control", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "unknown", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "ground", + pin15: "ground", + pin16: "ground", + pin17: "unknown", + pin18: "control", + pin19: "power", + pin20: "ground", + pin21: "ground", + pin22: "ground", + pin23: "output", + pin24: "ground", + pin25: "ground", + pin26: "ground", + pin27: "ground", + pin28: "ground", + pin29: "ground", + pin30: "ground", + pin31: "ground", + pin32: "ground", + pin33: "ground", + pin34: "ground", + pin35: "ground", + pin36: "ground", + pin37: "input", + pin38: "input", + pin39: "ground", + pin40: "ground", + pin41: "ground", + pin42: "ground", + pin43: "ground", + pin44: "ground", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "control", + pin53: "input", + pin54: "input", + pin55: "ground", + pin56: "ground", + pin57: "ground", + pin58: "ground", + pin59: "ground", + pin60: "ground", + pin61: "ground", + pin62: "ground", + pin63: "ground", + pin64: "ground", + pin65: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresGround: true }, + pin19: { requiresPower: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin22: { requiresGround: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, + pin26: { requiresGround: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { requiresGround: true }, + pin30: { requiresGround: true }, + pin31: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin34: { requiresGround: true }, + pin35: { requiresGround: true }, + pin36: { requiresGround: true }, + pin39: { requiresGround: true }, + pin40: { requiresGround: true }, + pin41: { requiresGround: true }, + pin42: { requiresGround: true }, + pin43: { requiresGround: true }, + pin44: { requiresGround: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresGround: true }, + pin65: { requiresGround: true }, +} as const; + +export const CC3301MODENIAMOZR = (props: ChipProps) => { + // Footprint provenance: TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3301MODENIAMOZR; diff --git a/lib/chips/CC3350MODENIAMOZR.circuit.tsx b/lib/chips/CC3350MODENIAMOZR.circuit.tsx new file mode 100644 index 00000000..2979ffd9 --- /dev/null +++ b/lib/chips/CC3350MODENIAMOZR.circuit.tsx @@ -0,0 +1,719 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["GND", "2", "GND_2"], + pin3: ["SDIO_CLK", "3"], + pin4: ["SDIO_CMD", "4"], + pin5: ["SDIO_D3", "5"], + pin6: ["SDIO_D2", "6"], + pin7: ["SDIO_D1", "7"], + pin8: ["SDIO_D0", "8"], + pin9: ["LOGGER", "9"], + pin10: ["HOST_IRQ_WL", "10"], + pin11: ["HOST_IRQ_BLE", "11"], + pin12: ["SWDIO", "12"], + pin13: ["SWCLK", "13"], + pin14: ["GND", "14", "GND_14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["GND", "16", "GND_16"], + pin17: ["NRESET", "17"], + pin18: ["SLOW_CLK_IN", "18"], + pin19: ["VPP_IN", "19"], + pin20: ["GND", "20", "GND_20"], + pin21: ["GND", "21", "GND_21"], + pin22: ["GND", "22", "GND_22"], + pin23: ["RF_OUT", "23"], + pin24: ["GND", "24", "GND_24"], + pin25: ["GND", "25", "GND_25"], + pin26: ["GND", "26", "GND_26"], + pin27: ["GND", "27", "GND_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["GND", "29", "GND_29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["GND", "31", "GND_31"], + pin32: ["GND", "32", "GND_32"], + pin33: ["GND", "33", "GND_33"], + pin34: ["GND", "34", "GND_34"], + pin35: ["GND", "35", "GND_35"], + pin36: ["GND", "36", "GND_36"], + pin37: ["3V3_IN", "37", "3V3_IN_37"], + pin38: ["3V3_IN", "38", "3V3_IN_38"], + pin39: ["GND", "39", "GND_39"], + pin40: ["GND", "40", "GND_40"], + pin41: ["GND", "41", "GND_41"], + pin42: ["GND", "42", "GND_42"], + pin43: ["GND", "43", "GND_43"], + pin44: ["GND", "44", "GND_44"], + pin45: ["COEX_PRIORITY", "45"], + pin46: ["COEX_REQ", "46"], + pin47: ["COEX_GRANT", "47"], + pin48: ["UART", "48", "UART_48"], + pin49: ["UART", "49", "UART_49"], + pin50: ["UART", "50", "UART_50"], + pin51: ["UART", "51", "UART_51"], + pin52: ["ANT_SEL", "52"], + pin53: ["1V8_IN", "53", "1V8_IN_53"], + pin54: ["1V8_IN", "54", "1V8_IN_54"], + pin55: ["GND", "55", "GND_55"], + pin56: ["GND", "56", "GND_56"], + pin57: ["GND", "57", "GND_57"], + pin58: ["GND", "58", "GND_58"], + pin59: ["GND", "59", "GND_59"], + pin60: ["GND", "60", "GND_60"], + pin61: ["GND", "61", "GND_61"], + pin62: ["GND", "62", "GND_62"], + pin63: ["GND", "63", "GND_63"], + pin64: ["GND", "64", "GND_64"], + pin65: ["GND", "65", "GND_65"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "control", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "unknown", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "ground", + pin15: "ground", + pin16: "ground", + pin17: "unknown", + pin18: "control", + pin19: "power", + pin20: "ground", + pin21: "ground", + pin22: "ground", + pin23: "output", + pin24: "ground", + pin25: "ground", + pin26: "ground", + pin27: "ground", + pin28: "ground", + pin29: "ground", + pin30: "ground", + pin31: "ground", + pin32: "ground", + pin33: "ground", + pin34: "ground", + pin35: "ground", + pin36: "ground", + pin37: "input", + pin38: "input", + pin39: "ground", + pin40: "ground", + pin41: "ground", + pin42: "ground", + pin43: "ground", + pin44: "ground", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "control", + pin53: "input", + pin54: "input", + pin55: "ground", + pin56: "ground", + pin57: "ground", + pin58: "ground", + pin59: "ground", + pin60: "ground", + pin61: "ground", + pin62: "ground", + pin63: "ground", + pin64: "ground", + pin65: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresGround: true }, + pin19: { requiresPower: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin22: { requiresGround: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, + pin26: { requiresGround: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { requiresGround: true }, + pin30: { requiresGround: true }, + pin31: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin34: { requiresGround: true }, + pin35: { requiresGround: true }, + pin36: { requiresGround: true }, + pin39: { requiresGround: true }, + pin40: { requiresGround: true }, + pin41: { requiresGround: true }, + pin42: { requiresGround: true }, + pin43: { requiresGround: true }, + pin44: { requiresGround: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresGround: true }, + pin65: { requiresGround: true }, +} as const; + +export const CC3350MODENIAMOZR = (props: ChipProps) => { + // Footprint provenance: TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3350MODENIAMOZR; diff --git a/lib/chips/CC3351MODENIAMOZR.circuit.tsx b/lib/chips/CC3351MODENIAMOZR.circuit.tsx new file mode 100644 index 00000000..1632cad5 --- /dev/null +++ b/lib/chips/CC3351MODENIAMOZR.circuit.tsx @@ -0,0 +1,719 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["GND", "2", "GND_2"], + pin3: ["SDIO_CLK", "3"], + pin4: ["SDIO_CMD", "4"], + pin5: ["SDIO_D3", "5"], + pin6: ["SDIO_D2", "6"], + pin7: ["SDIO_D1", "7"], + pin8: ["SDIO_D0", "8"], + pin9: ["LOGGER", "9"], + pin10: ["HOST_IRQ_WL", "10"], + pin11: ["HOST_IRQ_BLE", "11"], + pin12: ["SWDIO", "12"], + pin13: ["SWCLK", "13"], + pin14: ["GND", "14", "GND_14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["GND", "16", "GND_16"], + pin17: ["NRESET", "17"], + pin18: ["SLOW_CLK_IN", "18"], + pin19: ["VPP_IN", "19"], + pin20: ["GND", "20", "GND_20"], + pin21: ["GND", "21", "GND_21"], + pin22: ["GND", "22", "GND_22"], + pin23: ["RF_OUT", "23"], + pin24: ["GND", "24", "GND_24"], + pin25: ["GND", "25", "GND_25"], + pin26: ["GND", "26", "GND_26"], + pin27: ["GND", "27", "GND_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["GND", "29", "GND_29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["GND", "31", "GND_31"], + pin32: ["GND", "32", "GND_32"], + pin33: ["GND", "33", "GND_33"], + pin34: ["GND", "34", "GND_34"], + pin35: ["GND", "35", "GND_35"], + pin36: ["GND", "36", "GND_36"], + pin37: ["3V3_IN", "37", "3V3_IN_37"], + pin38: ["3V3_IN", "38", "3V3_IN_38"], + pin39: ["GND", "39", "GND_39"], + pin40: ["GND", "40", "GND_40"], + pin41: ["GND", "41", "GND_41"], + pin42: ["GND", "42", "GND_42"], + pin43: ["GND", "43", "GND_43"], + pin44: ["GND", "44", "GND_44"], + pin45: ["COEX_PRIORITY", "45"], + pin46: ["COEX_REQ", "46"], + pin47: ["COEX_GRANT", "47"], + pin48: ["UART", "48", "UART_48"], + pin49: ["UART", "49", "UART_49"], + pin50: ["UART", "50", "UART_50"], + pin51: ["UART", "51", "UART_51"], + pin52: ["ANT_SEL", "52"], + pin53: ["1V8_IN", "53", "1V8_IN_53"], + pin54: ["1V8_IN", "54", "1V8_IN_54"], + pin55: ["GND", "55", "GND_55"], + pin56: ["GND", "56", "GND_56"], + pin57: ["GND", "57", "GND_57"], + pin58: ["GND", "58", "GND_58"], + pin59: ["GND", "59", "GND_59"], + pin60: ["GND", "60", "GND_60"], + pin61: ["GND", "61", "GND_61"], + pin62: ["GND", "62", "GND_62"], + pin63: ["GND", "63", "GND_63"], + pin64: ["GND", "64", "GND_64"], + pin65: ["GND", "65", "GND_65"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "ground", + pin3: "control", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "unknown", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "ground", + pin15: "ground", + pin16: "ground", + pin17: "unknown", + pin18: "control", + pin19: "power", + pin20: "ground", + pin21: "ground", + pin22: "ground", + pin23: "output", + pin24: "ground", + pin25: "ground", + pin26: "ground", + pin27: "ground", + pin28: "ground", + pin29: "ground", + pin30: "ground", + pin31: "ground", + pin32: "ground", + pin33: "ground", + pin34: "ground", + pin35: "ground", + pin36: "ground", + pin37: "input", + pin38: "input", + pin39: "ground", + pin40: "ground", + pin41: "ground", + pin42: "ground", + pin43: "ground", + pin44: "ground", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "control", + pin53: "input", + pin54: "input", + pin55: "ground", + pin56: "ground", + pin57: "ground", + pin58: "ground", + pin59: "ground", + pin60: "ground", + pin61: "ground", + pin62: "ground", + pin63: "ground", + pin64: "ground", + pin65: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresGround: true }, + pin19: { requiresPower: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin22: { requiresGround: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, + pin26: { requiresGround: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { requiresGround: true }, + pin30: { requiresGround: true }, + pin31: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin34: { requiresGround: true }, + pin35: { requiresGround: true }, + pin36: { requiresGround: true }, + pin39: { requiresGround: true }, + pin40: { requiresGround: true }, + pin41: { requiresGround: true }, + pin42: { requiresGround: true }, + pin43: { requiresGround: true }, + pin44: { requiresGround: true }, + pin55: { requiresGround: true }, + pin56: { requiresGround: true }, + pin57: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresGround: true }, + pin60: { requiresGround: true }, + pin61: { requiresGround: true }, + pin62: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresGround: true }, + pin65: { requiresGround: true }, +} as const; + +export const CC3351MODENIAMOZR = (props: ChipProps) => { + // Footprint provenance: TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3351MODENIAMOZR; diff --git a/lib/chips/CC3501ENJARSHR.circuit.tsx b/lib/chips/CC3501ENJARSHR.circuit.tsx new file mode 100644 index 00000000..07543d44 --- /dev/null +++ b/lib/chips/CC3501ENJARSHR.circuit.tsx @@ -0,0 +1,608 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PA_LDO_OUT", "1"], + pin2: ["RF_BG", "2"], + pin3: ["NC", "3", "NC_3"], + pin4: ["VDD_ANA_IN1", "4"], + pin5: ["VDD_ANA_IN2", "5"], + pin6: ["HFXT_P", "EXTERNAL_INPUT", "6"], + pin7: ["HFXT_N", "7"], + pin8: ["ANT_SEL_0", "8", "ANT_SEL_0_8"], + pin9: ["COEX_REQ", "9", "COEX_REQ_9"], + pin10: ["VDD_DIG_IN", "10"], + pin11: ["COEX_GRANT", "11", "COEX_GRANT_11"], + pin12: ["COEX_REQ", "12", "COEX_REQ_12"], + pin13: ["ANT_SEL_0", "13", "ANT_SEL_0_13"], + pin14: ["ANT_SEL_0", "14", "ANT_SEL_0_14"], + pin15: ["VIO2", "15"], + pin16: ["COEX_GRANT", "16", "COEX_GRANT_16"], + pin17: ["COEX_PRIORITY", "17", "COEX_PRIORITY_17"], + pin18: ["COEX_REQ", "18", "COEX_REQ_18"], + pin19: ["ANT_SEL_0", "19", "ANT_SEL_0_19"], + pin20: ["XSPI_DATA_0", "20"], + pin21: ["XSPI_CLK", "21"], + pin22: ["XSPI_DATA_3", "22"], + pin23: ["VDDSF", "23"], + pin24: ["XSPI_DATA_2", "24"], + pin25: ["XSPI_DATA_1", "25"], + pin26: ["XSPI_CS_FLASH", "26"], + pin27: ["COEX_PRIORITY", "27", "COEX_PRIORITY_27"], + pin28: ["COEX_REQ", "28", "COEX_REQ_28"], + pin29: ["COEX_GRANT", "29", "COEX_GRANT_29"], + pin30: ["ANT_SEL_0", "30", "ANT_SEL_0_30"], + pin31: ["COEX_REQ", "31", "COEX_REQ_31"], + pin32: ["COEX_GRANT", "32", "COEX_GRANT_32"], + pin33: ["ANT_SEL_0", "33", "ANT_SEL_0_33"], + pin34: ["GPIO12", "34"], + pin35: ["ADC0", "35"], + pin36: ["ADC1", "36"], + pin37: ["VIO1", "37"], + pin38: ["LOGGER", "38"], + pin39: ["SWCLK", "39"], + pin40: ["SWDIO", "40"], + pin41: ["ADC2", "41"], + pin42: ["ADC3", "42"], + pin43: ["ADC4", "43"], + pin44: ["ADC5", "44"], + pin45: ["COEX_REQ", "45", "COEX_REQ_45"], + pin46: ["ADC6", "46"], + pin47: ["DIG_LDO_OUT", "47"], + pin48: ["VDDMAIN_IN", "48"], + pin49: ["NRESET", "49"], + pin50: ["ADC7", "50"], + pin51: ["SLOW_CLOCK_IN", "51"], + pin52: ["ANT_SEL_0", "52", "ANT_SEL_0_52"], + pin53: ["CCA", "53"], + pin54: ["NC", "54", "NC_54"], + pin55: ["PA_LDO_IN2", "55"], + pin56: ["PA_LDO_IN1", "56"], + pin57: ["EP", "THERMAL_PAD", "57"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "unknown", + pin3: "no-connect", + pin4: "power", + pin5: "power", + pin6: "input", + pin7: "unknown", + pin8: "output", + pin9: "input", + pin10: "power", + pin11: "output", + pin12: "input", + pin13: "output", + pin14: "output", + pin15: "unknown", + pin16: "output", + pin17: "input", + pin18: "input", + pin19: "output", + pin20: "bidirectional", + pin21: "output", + pin22: "bidirectional", + pin23: "power", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "output", + pin27: "input", + pin28: "input", + pin29: "output", + pin30: "output", + pin31: "input", + pin32: "output", + pin33: "output", + pin34: "bidirectional", + pin35: "input", + pin36: "input", + pin37: "unknown", + pin38: "output", + pin39: "input", + pin40: "bidirectional", + pin41: "input", + pin42: "input", + pin43: "input", + pin44: "input", + pin45: "input", + pin46: "input", + pin47: "output", + pin48: "power", + pin49: "unknown", + pin50: "input", + pin51: "control", + pin52: "output", + pin53: "output", + pin54: "no-connect", + pin55: "input", + pin56: "input", + pin57: "ground", +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, + pin10: { requiresPower: true }, + pin23: { requiresPower: true }, + pin48: { requiresPower: true }, + pin54: { doNotConnect: true }, + pin57: { requiresGround: true }, +} as const; + +export const CC3501ENJARSHR = (props: ChipProps) => { + // Footprint provenance: TI drawing RSH0056G; official source https://www.ti.com/lit/gpn/CC3501E pages 60 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3501ENJARSHR; diff --git a/lib/chips/CC3551ENJARSHR.circuit.tsx b/lib/chips/CC3551ENJARSHR.circuit.tsx new file mode 100644 index 00000000..809757d2 --- /dev/null +++ b/lib/chips/CC3551ENJARSHR.circuit.tsx @@ -0,0 +1,610 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PA_LDO_OUT", "1"], + pin2: ["RF_BG", "2"], + pin3: ["NC", "3", "NC_3"], + pin4: ["VDD_ANA_IN1", "4"], + pin5: ["VDD_ANA_IN2", "5"], + pin6: ["HFXT_P", "EXTERNAL_INPUT", "6"], + pin7: ["HFXT_N", "7"], + pin8: ["ANT_SEL_0", "8", "ANT_SEL_0_8"], + pin9: ["COEX_REQ", "9", "COEX_REQ_9"], + pin10: ["VDD_DIG_IN", "10"], + pin11: ["COEX_GRANT", "11", "COEX_GRANT_11"], + pin12: ["COEX_REQ", "12", "COEX_REQ_12"], + pin13: ["ANT_SEL_0", "13", "ANT_SEL_0_13"], + pin14: ["ANT_SEL_0", "14", "ANT_SEL_0_14"], + pin15: ["VIO2", "15"], + pin16: ["COEX_GRANT", "16", "COEX_GRANT_16"], + pin17: ["COEX_PRIORITY", "17", "COEX_PRIORITY_17"], + pin18: ["COEX_REQ", "18", "COEX_REQ_18"], + pin19: ["ANT_SEL_0", "19", "ANT_SEL_0_19"], + pin20: ["XSPI_DATA_0", "20"], + pin21: ["XSPI_CLK", "21"], + pin22: ["XSPI_DATA_3", "22"], + pin23: ["VDDSF", "23"], + pin24: ["XSPI_DATA_2", "24"], + pin25: ["XSPI_DATA_1", "25"], + pin26: ["XSPI_CS_FLASH", "26"], + pin27: ["COEX_PRIORITY", "27", "COEX_PRIORITY_27"], + pin28: ["COEX_REQ", "28", "COEX_REQ_28"], + pin29: ["COEX_GRANT", "29", "COEX_GRANT_29"], + pin30: ["ANT_SEL_0", "30", "ANT_SEL_0_30"], + pin31: ["COEX_REQ", "31", "COEX_REQ_31"], + pin32: ["COEX_GRANT", "32", "COEX_GRANT_32"], + pin33: ["ANT_SEL_0", "33", "ANT_SEL_0_33"], + pin34: ["GPIO12", "34"], + pin35: ["ADC0", "35"], + pin36: ["ADC1", "36"], + pin37: ["NC", "37", "NC_37"], + pin38: ["LOGGER", "38"], + pin39: ["SWCLK", "39"], + pin40: ["SWDIO", "40"], + pin41: ["ADC2", "41"], + pin42: ["ADC3", "42"], + pin43: ["ADC4", "43"], + pin44: ["ADC5", "44"], + pin45: ["COEX_REQ", "45", "COEX_REQ_45"], + pin46: ["ADC6", "46"], + pin47: ["DIG_LDO_OUT", "47"], + pin48: ["VDDMAIN_IN", "48"], + pin49: ["NRESET", "49"], + pin50: ["ADC7", "50"], + pin51: ["SLOW_CLOCK_IN", "51"], + pin52: ["NC", "52", "NC_52"], + pin53: ["NC", "53", "NC_53"], + pin54: ["RF_A", "54"], + pin55: ["PA_LDO_IN2", "55"], + pin56: ["PA_LDO_IN1", "56"], + pin57: ["EP", "THERMAL_PAD", "57"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "unknown", + pin3: "no-connect", + pin4: "power", + pin5: "power", + pin6: "input", + pin7: "unknown", + pin8: "output", + pin9: "input", + pin10: "power", + pin11: "output", + pin12: "input", + pin13: "output", + pin14: "output", + pin15: "unknown", + pin16: "output", + pin17: "input", + pin18: "input", + pin19: "output", + pin20: "bidirectional", + pin21: "output", + pin22: "bidirectional", + pin23: "power", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "output", + pin27: "input", + pin28: "input", + pin29: "output", + pin30: "output", + pin31: "input", + pin32: "output", + pin33: "output", + pin34: "bidirectional", + pin35: "input", + pin36: "input", + pin37: "no-connect", + pin38: "output", + pin39: "input", + pin40: "bidirectional", + pin41: "input", + pin42: "input", + pin43: "input", + pin44: "input", + pin45: "input", + pin46: "input", + pin47: "output", + pin48: "power", + pin49: "unknown", + pin50: "input", + pin51: "control", + pin52: "no-connect", + pin53: "no-connect", + pin54: "unknown", + pin55: "input", + pin56: "input", + pin57: "ground", +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, + pin10: { requiresPower: true }, + pin23: { requiresPower: true }, + pin37: { doNotConnect: true }, + pin48: { requiresPower: true }, + pin52: { doNotConnect: true }, + pin53: { doNotConnect: true }, + pin57: { requiresGround: true }, +} as const; + +export const CC3551ENJARSHR = (props: ChipProps) => { + // Footprint provenance: TI drawing RSH0056G; official source https://www.ti.com/lit/gpn/CC3501E pages 60 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CC3551ENJARSHR; diff --git a/lib/chips/CD4069UBM96.circuit.tsx b/lib/chips/CD4069UBM96.circuit.tsx new file mode 100644 index 00000000..5869a0a3 --- /dev/null +++ b/lib/chips/CD4069UBM96.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["pin2"], + pin3: ["B"], + pin4: ["pin4"], + pin5: ["C"], + pin6: ["pin6"], + pin7: ["VSS"], + pin8: ["pin8"], + pin9: ["D"], + pin10: ["pin10"], + pin11: ["E"], + pin12: ["pin12"], + pin13: ["F"], + pin14: ["VDD"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const CD4069UBM96 = (props: ChipProps) => { + return ( + + ); +}; + +export default CD4069UBM96; diff --git a/lib/chips/CD74HC4067SM96.circuit.tsx b/lib/chips/CD74HC4067SM96.circuit.tsx new file mode 100644 index 00000000..012c36f5 --- /dev/null +++ b/lib/chips/CD74HC4067SM96.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["I7"], + pin3: ["I6"], + pin4: ["I5"], + pin5: ["I4"], + pin6: ["I3"], + pin7: ["I2"], + pin8: ["I1"], + pin9: ["I0"], + pin10: ["S0"], + pin11: ["S1"], + pin12: ["GND"], + pin13: ["S3"], + pin14: ["S2"], + pin15: ["E"], + pin16: ["I15"], + pin17: ["I14"], + pin18: ["I13"], + pin19: ["I12"], + pin20: ["I11"], + pin21: ["I10"], + pin22: ["I9"], + pin23: ["I8"], + pin24: ["VCC"], +} as const; + +const pinAttributes = { + pin12: { requiresGround: true }, + pin24: { requiresPower: true }, +} as const; + +export const CD74HC4067SM96 = (props: ChipProps) => { + return ( + + ); +}; + +export default CD74HC4067SM96; diff --git a/lib/chips/CD74HCT21M96.circuit.tsx b/lib/chips/CD74HCT21M96.circuit.tsx new file mode 100644 index 00000000..5e7d9432 --- /dev/null +++ b/lib/chips/CD74HCT21M96.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["NC2"], + pin4: ["1C"], + pin5: ["1D"], + pin6: ["1Y"], + pin7: ["GND"], + pin8: ["2Y"], + pin9: ["2A"], + pin10: ["2B"], + pin11: ["NC1"], + pin12: ["2C"], + pin13: ["2D"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin7: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { requiresPower: true }, +} as const; + +export const CD74HCT21M96 = (props: ChipProps) => { + return ( + + ); +}; + +export default CD74HCT21M96; diff --git a/lib/chips/CD74HCT4067M.circuit.tsx b/lib/chips/CD74HCT4067M.circuit.tsx new file mode 100644 index 00000000..10ceb704 --- /dev/null +++ b/lib/chips/CD74HCT4067M.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["I7"], + pin3: ["I6"], + pin4: ["I5"], + pin5: ["I4"], + pin6: ["I3"], + pin7: ["I2"], + pin8: ["I1"], + pin9: ["I0"], + pin10: ["S0"], + pin11: ["S1"], + pin12: ["GND"], + pin13: ["S3"], + pin14: ["S2"], + pin15: ["E"], + pin16: ["I15"], + pin17: ["I14"], + pin18: ["I13"], + pin19: ["I12"], + pin20: ["I11"], + pin21: ["I10"], + pin22: ["I9"], + pin23: ["I8"], + pin24: ["VCC"], +} as const; + +const pinAttributes = { + pin12: { requiresGround: true }, + pin24: { requiresPower: true }, +} as const; + +export const CD74HCT4067M = (props: ChipProps) => { + return ( + + ); +}; + +export default CD74HCT4067M; diff --git a/lib/chips/CDCE62002RHBT.circuit.tsx b/lib/chips/CDCE62002RHBT.circuit.tsx new file mode 100644 index 00000000..954865ee --- /dev/null +++ b/lib/chips/CDCE62002RHBT.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC_AUX"], + pin2: ["AUX_IN"], + pin3: ["VBB"], + pin4: ["VCC_PLLD"], + pin5: ["REG_CAP1"], + pin6: ["PD"], + pin7: ["SPI_MISO"], + pin8: ["SPI_MOSI"], + pin9: ["VCC_OUT01"], + pin10: ["U0N"], + pin11: ["U0P"], + pin12: ["VCC_OUT02"], + pin13: ["VCC_OUT11"], + pin14: ["U1N"], + pin15: ["U1P"], + pin16: ["VCC_OUT12"], + pin17: ["SPI_CLK"], + pin18: ["SPI_LE"], + pin19: ["TESTSYNC"], + pin20: ["REG_CAP3"], + pin21: ["GND_PLLDIV"], + pin22: ["VCC_PLLDIV"], + pin23: ["REG_CAP4"], + pin24: ["VCC_VCO"], + pin25: ["EXT_LFP"], + pin26: ["EXT_LFN"], + pin27: ["REG_CAP2"], + pin28: ["VCC_PLLA"], + pin29: ["REF_IN_POS"], + pin30: ["REF_IN_NEG"], + pin31: ["VCC_IN"], + pin32: ["PLL_LOCK"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const CDCE62002RHBT = (props: ChipProps) => { + return ( + + ); +}; + +export default CDCE62002RHBT; diff --git a/lib/chips/CDCE913PWR.circuit.tsx b/lib/chips/CDCE913PWR.circuit.tsx new file mode 100644 index 00000000..752c3f27 --- /dev/null +++ b/lib/chips/CDCE913PWR.circuit.tsx @@ -0,0 +1,259 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["S0"], + pin3: ["VDD"], + pin4: ["VCTR"], + pin5: ["GND1"], + pin6: ["VDDOUT1"], + pin7: ["VDDOUT2"], + pin8: ["Y3"], + pin9: ["Y2"], + pin10: ["GND2"], + pin11: ["Y1"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["XOUT"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin5: { requiresGround: true }, + pin10: { requiresGround: true }, +} as const; + +export const CDCE913PWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C183098.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C183098.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default CDCE913PWR; diff --git a/lib/chips/CDCLVC1106PWR.circuit.tsx b/lib/chips/CDCLVC1106PWR.circuit.tsx new file mode 100644 index 00000000..46f45549 --- /dev/null +++ b/lib/chips/CDCLVC1106PWR.circuit.tsx @@ -0,0 +1,262 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLKIN"], + pin2: ["1G"], + pin3: ["Y0"], + pin4: ["GND1"], + pin5: ["VDD1"], + pin6: ["Y4"], + pin7: ["GND2"], + pin8: ["VDD2"], + pin9: ["Y5"], + pin10: ["GND3"], + pin11: ["Y2"], + pin12: ["VDD3"], + pin13: ["Y3"], + pin14: ["Y1"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin7: { requiresGround: true }, + pin8: { requiresPower: true }, + pin10: { requiresGround: true }, + pin12: { requiresPower: true }, +} as const; + +export const CDCLVC1106PWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C56506.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C56506.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default CDCLVC1106PWR; diff --git a/lib/chips/CDCM9102RHBR.circuit.tsx b/lib/chips/CDCM9102RHBR.circuit.tsx new file mode 100644 index 00000000..362fd6be --- /dev/null +++ b/lib/chips/CDCM9102RHBR.circuit.tsx @@ -0,0 +1,97 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD2"], + pin2: ["OUT1N"], + pin3: ["OUT1P"], + pin4: ["VDD1"], + pin5: ["OUT0N"], + pin6: ["OUT0P"], + pin7: ["OE"], + pin8: ["NC12"], + pin9: ["VDD3"], + pin10: ["OS1"], + pin11: ["OS0"], + pin12: ["RESET"], + pin13: ["NC1"], + pin14: ["GND2"], + pin15: ["NC2"], + pin16: ["VDD4"], + pin17: ["REGCAP2"], + pin18: ["VDD5"], + pin19: ["REGCAP1"], + pin20: ["VDD6"], + pin21: ["XIN"], + pin22: ["GND3"], + pin23: ["OSCOUT"], + pin24: ["NC11"], + pin25: ["NC3"], + pin26: ["NC4"], + pin27: ["NC5"], + pin28: ["NC6"], + pin29: ["NC7"], + pin30: ["NC8"], + pin31: ["NC9"], + pin32: ["NC10"], + pin33: ["GND1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresPower: true }, + pin8: { doNotConnect: true }, + pin9: { requiresPower: true }, + pin13: { doNotConnect: true }, + pin14: { requiresGround: true }, + pin15: { doNotConnect: true }, + pin16: { requiresPower: true }, + pin18: { requiresPower: true }, + pin20: { requiresPower: true }, + pin22: { requiresGround: true }, + pin24: { doNotConnect: true }, + pin25: { doNotConnect: true }, + pin26: { doNotConnect: true }, + pin27: { doNotConnect: true }, + pin28: { doNotConnect: true }, + pin29: { doNotConnect: true }, + pin30: { doNotConnect: true }, + pin31: { doNotConnect: true }, + pin32: { doNotConnect: true }, + pin33: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const CDCM9102RHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default CDCM9102RHBR; diff --git a/lib/chips/CSD13381F4T.circuit.tsx b/lib/chips/CSD13381F4T.circuit.tsx new file mode 100644 index 00000000..ef0742cc --- /dev/null +++ b/lib/chips/CSD13381F4T.circuit.tsx @@ -0,0 +1,172 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["S"], + pin3: ["D"], +} as const; + +export const CSD13381F4T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2863536.obj?uuid=34cc5a0f23d94c4b97fe5d62858f0f05", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2863536.step?uuid=34cc5a0f23d94c4b97fe5d62858f0f05", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000019049999991693767, + y: 0.00005079999993995443, + z: -0.001, + }, + }} + {...props} + /> + ); +}; + +export default CSD13381F4T; diff --git a/lib/chips/CSD17382F4T.circuit.tsx b/lib/chips/CSD17382F4T.circuit.tsx new file mode 100644 index 00000000..15b5888e --- /dev/null +++ b/lib/chips/CSD17382F4T.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["S"], + pin3: ["D"], +} as const; + +export const CSD17382F4T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2859606.obj?uuid=2172206070d24ac0a7f8df923a642e0e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2859606.step?uuid=2172206070d24ac0a7f8df923a642e0e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.025012650000007852, + y: 0.00011430000006384944, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default CSD17382F4T; diff --git a/lib/chips/CSD17483F4T.circuit.tsx b/lib/chips/CSD17483F4T.circuit.tsx new file mode 100644 index 00000000..e50a4620 --- /dev/null +++ b/lib/chips/CSD17483F4T.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["S"], + pin3: ["D"], +} as const; + +export const CSD17483F4T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2871105.obj?uuid=2172206070d24ac0a7f8df923a642e0e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2871105.step?uuid=2172206070d24ac0a7f8df923a642e0e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.025012650000007852, + y: 0.00011430000006384944, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default CSD17483F4T; diff --git a/lib/chips/CSD17484F4.circuit.tsx b/lib/chips/CSD17484F4.circuit.tsx new file mode 100644 index 00000000..4a3cf939 --- /dev/null +++ b/lib/chips/CSD17484F4.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["S"], + pin3: ["D"], +} as const; + +export const CSD17484F4 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862245.obj?uuid=2172206070d24ac0a7f8df923a642e0e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862245.step?uuid=2172206070d24ac0a7f8df923a642e0e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.025012650000007852, + y: 0.00011430000006384944, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default CSD17484F4; diff --git a/lib/chips/CSD17571Q2.circuit.tsx b/lib/chips/CSD17571Q2.circuit.tsx new file mode 100644 index 00000000..15d66ec3 --- /dev/null +++ b/lib/chips/CSD17571Q2.circuit.tsx @@ -0,0 +1,142 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D4"], + pin2: ["D5"], + pin3: ["G"], + pin4: ["S2"], + pin5: ["D2"], + pin6: ["D3"], + pin7: ["D1"], + pin8: ["S1"], +} as const; + +export const CSD17571Q2 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C962382.obj?uuid=f47d8aecec6846a691350166e6a2276e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C962382.step?uuid=f47d8aecec6846a691350166e6a2276e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default CSD17571Q2; diff --git a/lib/chips/CSD17573Q5B.circuit.tsx b/lib/chips/CSD17573Q5B.circuit.tsx new file mode 100644 index 00000000..5f8df3c7 --- /dev/null +++ b/lib/chips/CSD17573Q5B.circuit.tsx @@ -0,0 +1,183 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D1"], + pin6: ["D2"], + pin7: ["D3"], + pin8: ["D4"], + pin9: ["D5"], +} as const; + +export const CSD17573Q5B = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C202231.obj?uuid=92497acca17b48098aa21a0e69681f58", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C202231.step?uuid=92497acca17b48098aa21a0e69681f58", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.0058669999999998446, + y: -0.000012700000070253736, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default CSD17573Q5B; diff --git a/lib/chips/CSD17577Q3AT.circuit.tsx b/lib/chips/CSD17577Q3AT.circuit.tsx new file mode 100644 index 00000000..8a58734c --- /dev/null +++ b/lib/chips/CSD17577Q3AT.circuit.tsx @@ -0,0 +1,163 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D2"], + pin6: ["D3"], + pin7: ["D4"], + pin8: ["D5"], + pin9: ["D1"], +} as const; + +export const CSD17577Q3AT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CSD17577Q3AT; diff --git a/lib/chips/CSD17578Q5A.circuit.tsx b/lib/chips/CSD17578Q5A.circuit.tsx new file mode 100644 index 00000000..db6ea6c3 --- /dev/null +++ b/lib/chips/CSD17578Q5A.circuit.tsx @@ -0,0 +1,196 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["D5"], +} as const; + +export const CSD17578Q5A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2871447.obj?uuid=1b453173991a4f84bd969ee3c476fcb4", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2871447.step?uuid=1b453173991a4f84bd969ee3c476fcb4", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.264 }, + }} + {...props} + /> + ); +}; + +export default CSD17578Q5A; diff --git a/lib/chips/CSD17579Q3A.circuit.tsx b/lib/chips/CSD17579Q3A.circuit.tsx new file mode 100644 index 00000000..f06eb8fb --- /dev/null +++ b/lib/chips/CSD17579Q3A.circuit.tsx @@ -0,0 +1,199 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D1"], + pin6: ["D2"], + pin7: ["D3"], + pin8: ["D4"], + pin9: ["D5"], +} as const; + +export const CSD17579Q3A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C97376.obj?uuid=33c976fec6414d2c8ad0f9659097761a", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C97376.step?uuid=33c976fec6414d2c8ad0f9659097761a", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.02462529999999674, + y: -0.020205700000005322, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default CSD17579Q3A; diff --git a/lib/chips/CSD17581Q3AT.circuit.tsx b/lib/chips/CSD17581Q3AT.circuit.tsx new file mode 100644 index 00000000..8c202bc1 --- /dev/null +++ b/lib/chips/CSD17581Q3AT.circuit.tsx @@ -0,0 +1,211 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["D5"], +} as const; + +export const CSD17581Q3AT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2866708.obj?uuid=49318107c6004159848cbace89215b6f", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2866708.step?uuid=49318107c6004159848cbace89215b6f", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.004660899999976209, + y: 0.000038099999983387534, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default CSD17581Q3AT; diff --git a/lib/chips/CSD18510Q5B.circuit.tsx b/lib/chips/CSD18510Q5B.circuit.tsx new file mode 100644 index 00000000..4e66636c --- /dev/null +++ b/lib/chips/CSD18510Q5B.circuit.tsx @@ -0,0 +1,175 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D1"], + pin6: ["D2"], + pin7: ["D3"], + pin8: ["D4"], + pin9: ["pin8_alt1"], +} as const; + +export const CSD18510Q5B = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876544.obj?uuid=413bd20409f44b4db32d60ad0b1136ce", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876544.step?uuid=413bd20409f44b4db32d60ad0b1136ce", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012700000070253736, + y: -0.06751320000012129, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default CSD18510Q5B; diff --git a/lib/chips/CSD18513Q5A.circuit.tsx b/lib/chips/CSD18513Q5A.circuit.tsx new file mode 100644 index 00000000..589b4f4b --- /dev/null +++ b/lib/chips/CSD18513Q5A.circuit.tsx @@ -0,0 +1,171 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S1"], + pin3: ["S2"], + pin4: ["G"], + pin5: ["D2"], + pin6: ["D3"], + pin7: ["D4"], + pin8: ["D1"], + pin9: ["D5"], +} as const; + +export const CSD18513Q5A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862101.obj?uuid=95d3eebac31746c1b1270344a0444abd", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862101.step?uuid=95d3eebac31746c1b1270344a0444abd", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0, z: -0.01 }, + }} + {...props} + /> + ); +}; + +export default CSD18513Q5A; diff --git a/lib/chips/CSD18514Q5A.circuit.tsx b/lib/chips/CSD18514Q5A.circuit.tsx new file mode 100644 index 00000000..74164f64 --- /dev/null +++ b/lib/chips/CSD18514Q5A.circuit.tsx @@ -0,0 +1,196 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["D5"], +} as const; + +export const CSD18514Q5A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2865508.obj?uuid=1b453173991a4f84bd969ee3c476fcb4", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2865508.step?uuid=1b453173991a4f84bd969ee3c476fcb4", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.264 }, + }} + {...props} + /> + ); +}; + +export default CSD18514Q5A; diff --git a/lib/chips/CSD18531Q5AT.circuit.tsx b/lib/chips/CSD18531Q5AT.circuit.tsx new file mode 100644 index 00000000..875c1255 --- /dev/null +++ b/lib/chips/CSD18531Q5AT.circuit.tsx @@ -0,0 +1,203 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SOURCE", "1", "SOURCE_1"], + pin2: ["SOURCE", "2", "SOURCE_2"], + pin3: ["SOURCE", "3", "SOURCE_3"], + pin4: ["GATE", "4"], + pin5: ["DRAIN", "5", "DRAIN_5"], + pin6: ["DRAIN", "6", "DRAIN_6"], + pin7: ["DRAIN", "7", "DRAIN_7"], + pin8: ["DRAIN", "8", "DRAIN_8"], + pin9: ["D", "9"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "unknown", + pin3: "unknown", + pin4: "control", + pin5: "unknown", + pin6: "unknown", + pin7: "unknown", + pin8: "unknown", + pin9: "power", +} as const; + +const pinAttributes = { + pin9: { requiresPower: true }, +} as const; + +export const CSD18531Q5AT = (props: ChipProps) => { + // Footprint provenance: TI drawing DQJ0008A; donor CSD17578Q5A (JLCPCB C2871447) + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default CSD18531Q5AT; diff --git a/lib/chips/CSD18532Q5B.circuit.tsx b/lib/chips/CSD18532Q5B.circuit.tsx new file mode 100644 index 00000000..cf0c6efe --- /dev/null +++ b/lib/chips/CSD18532Q5B.circuit.tsx @@ -0,0 +1,171 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["EP"], +} as const; + +export const CSD18532Q5B = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C882766.obj?uuid=45351fa1d67f41b4ad3fc24b46fe8f65", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C882766.step?uuid=45351fa1d67f41b4ad3fc24b46fe8f65", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.1429893000000675, z: -0.21 }, + }} + {...props} + /> + ); +}; + +export default CSD18532Q5B; diff --git a/lib/chips/CSD18534Q5A.circuit.tsx b/lib/chips/CSD18534Q5A.circuit.tsx new file mode 100644 index 00000000..103e7fe2 --- /dev/null +++ b/lib/chips/CSD18534Q5A.circuit.tsx @@ -0,0 +1,187 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D1"], + pin6: ["D2"], + pin7: ["D3"], + pin8: ["D4"], + pin9: ["D5"], +} as const; + +export const CSD18534Q5A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C115943.obj?uuid=8af78d1c95d347f38becd6dceda70225", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C115943.step?uuid=8af78d1c95d347f38becd6dceda70225", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0.000012699999842880061, z: 0 }, + }} + {...props} + /> + ); +}; + +export default CSD18534Q5A; diff --git a/lib/chips/CSD18540Q5BT.circuit.tsx b/lib/chips/CSD18540Q5BT.circuit.tsx new file mode 100644 index 00000000..4becccd4 --- /dev/null +++ b/lib/chips/CSD18540Q5BT.circuit.tsx @@ -0,0 +1,175 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D5"], + pin6: ["D4"], + pin7: ["D3"], + pin8: ["D1"], + pin9: ["pin8_alt1"], +} as const; + +export const CSD18540Q5BT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2863985.obj?uuid=92497acca17b48098aa21a0e69681f58", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2863985.step?uuid=92497acca17b48098aa21a0e69681f58", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.005866999999772471, + y: -0.000012699999842880061, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default CSD18540Q5BT; diff --git a/lib/chips/CSD18541F5T.circuit.tsx b/lib/chips/CSD18541F5T.circuit.tsx new file mode 100644 index 00000000..0f1aafef --- /dev/null +++ b/lib/chips/CSD18541F5T.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GATE", "1"], + pin2: ["SOURCE", "2"], + pin3: ["DRAIN", "3"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "unknown", + pin3: "unknown", +} as const; + +export const CSD18541F5T = (props: ChipProps) => { + // Footprint provenance: TI drawing YJK0003A; official source https://www.ti.com/lit/gpn/CSD18541F5 pages 14 + return ( + + + + + + } + {...props} + /> + ); +}; + +export default CSD18541F5T; diff --git a/lib/chips/CSD18543Q3AT.circuit.tsx b/lib/chips/CSD18543Q3AT.circuit.tsx new file mode 100644 index 00000000..0179624c --- /dev/null +++ b/lib/chips/CSD18543Q3AT.circuit.tsx @@ -0,0 +1,207 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["pin9"], +} as const; + +export const CSD18543Q3AT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C112374.obj?uuid=700cc9c3386044da8a9902f8ca45e62c", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C112374.step?uuid=700cc9c3386044da8a9902f8ca45e62c", + pcbRotationOffset: 0, + modelOriginPosition: { x: -0.00457199999993918, y: 0, z: -0.04 }, + }} + {...props} + /> + ); +}; + +export default CSD18543Q3AT; diff --git a/lib/chips/CSD19501KCS.circuit.tsx b/lib/chips/CSD19501KCS.circuit.tsx new file mode 100644 index 00000000..f4d92fbe --- /dev/null +++ b/lib/chips/CSD19501KCS.circuit.tsx @@ -0,0 +1,110 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["D"], + pin3: ["S"], +} as const; + +export const CSD19501KCS = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C75779.obj?uuid=7002bf753f604153b635846fadbc52d9", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C75779.step?uuid=7002bf753f604153b635846fadbc52d9", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.6249986999999919, + y: -0.6445457000000825, + z: 0.2549899999999994, + }, + }} + {...props} + /> + ); +}; + +export default CSD19501KCS; diff --git a/lib/chips/CSD19502Q5B.circuit.tsx b/lib/chips/CSD19502Q5B.circuit.tsx new file mode 100644 index 00000000..4062db43 --- /dev/null +++ b/lib/chips/CSD19502Q5B.circuit.tsx @@ -0,0 +1,175 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D5"], + pin6: ["D4"], + pin7: ["D3"], + pin8: ["D1"], + pin9: ["pin8_alt1"], +} as const; + +export const CSD19502Q5B = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2864118.obj?uuid=ed84f5dd80b4414bacf3798e6484c98f", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2864118.step?uuid=ed84f5dd80b4414bacf3798e6484c98f", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.06750050000005103, + y: 0.001015999999935957, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default CSD19502Q5B; diff --git a/lib/chips/CSD19531Q5AT.circuit.tsx b/lib/chips/CSD19531Q5AT.circuit.tsx new file mode 100644 index 00000000..20dd841c --- /dev/null +++ b/lib/chips/CSD19531Q5AT.circuit.tsx @@ -0,0 +1,196 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S3"], + pin2: ["S2"], + pin3: ["S1"], + pin4: ["G"], + pin5: ["D4"], + pin6: ["D3"], + pin7: ["D2"], + pin8: ["D1"], + pin9: ["D5"], +} as const; + +export const CSD19531Q5AT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876525.obj?uuid=1b453173991a4f84bd969ee3c476fcb4", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876525.step?uuid=1b453173991a4f84bd969ee3c476fcb4", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.264 }, + }} + {...props} + /> + ); +}; + +export default CSD19531Q5AT; diff --git a/lib/chips/CSD19534Q5A.circuit.tsx b/lib/chips/CSD19534Q5A.circuit.tsx new file mode 100644 index 00000000..0744b224 --- /dev/null +++ b/lib/chips/CSD19534Q5A.circuit.tsx @@ -0,0 +1,183 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D1"], + pin6: ["D2"], + pin7: ["D3"], + pin8: ["D4"], + pin9: ["D5"], +} as const; + +export const CSD19534Q5A = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C114200.obj?uuid=92497acca17b48098aa21a0e69681f58", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C114200.step?uuid=92497acca17b48098aa21a0e69681f58", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.0058669999999998446, + y: -0.000012700000070253736, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default CSD19534Q5A; diff --git a/lib/chips/CSD19535KTT.circuit.tsx b/lib/chips/CSD19535KTT.circuit.tsx new file mode 100644 index 00000000..839281a7 --- /dev/null +++ b/lib/chips/CSD19535KTT.circuit.tsx @@ -0,0 +1,89 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["D"], + pin3: ["S"], +} as const; + +export const CSD19535KTT = (props: ChipProps) => { + return ( + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2869105.obj?uuid=6853a3222d924ff49bf1058cb38b0877", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2869105.step?uuid=6853a3222d924ff49bf1058cb38b0877", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -1.9084831500001016, z: 0 }, + }} + {...props} + /> + ); +}; + +export default CSD19535KTT; diff --git a/lib/chips/CSD19537Q3T.circuit.tsx b/lib/chips/CSD19537Q3T.circuit.tsx new file mode 100644 index 00000000..272ceede --- /dev/null +++ b/lib/chips/CSD19537Q3T.circuit.tsx @@ -0,0 +1,160 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["S2"], + pin3: ["S3"], + pin4: ["G"], + pin5: ["D2"], + pin6: ["D3"], + pin7: ["D4"], + pin8: ["D5"], + pin9: ["D1"], +} as const; + +export const CSD19537Q3T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C134143.obj?uuid=fdc2187491af4dfd82e5cb06491534ff", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C134143.step?uuid=fdc2187491af4dfd82e5cb06491534ff", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012700000070253736, + y: 0.00012700000002041634, + z: -0.16, + }, + }} + {...props} + /> + ); +}; + +export default CSD19537Q3T; diff --git a/lib/chips/CSD19538Q2T.circuit.tsx b/lib/chips/CSD19538Q2T.circuit.tsx new file mode 100644 index 00000000..0be38b67 --- /dev/null +++ b/lib/chips/CSD19538Q2T.circuit.tsx @@ -0,0 +1,143 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D4"], + pin2: ["D5"], + pin3: ["G"], + pin4: ["S2"], + pin5: ["D2"], + pin6: ["D3"], + pin7: ["D1"], + pin8: ["S1"], +} as const; + +export const CSD19538Q2T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2859729.obj?uuid=cec58c53873d413fa827b6a5400714bb", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2859729.step?uuid=cec58c53873d413fa827b6a5400714bb", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: -0.017075150000010808, z: 0 }, + }} + {...props} + /> + ); +}; + +export default CSD19538Q2T; diff --git a/lib/chips/CSD25481F4.circuit.tsx b/lib/chips/CSD25481F4.circuit.tsx new file mode 100644 index 00000000..eb39c319 --- /dev/null +++ b/lib/chips/CSD25481F4.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["G"], + pin2: ["S"], + pin3: ["D"], +} as const; + +export const CSD25481F4 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2872850.obj?uuid=2172206070d24ac0a7f8df923a642e0e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2872850.step?uuid=2172206070d24ac0a7f8df923a642e0e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.025012650000007852, + y: 0.00011430000006384944, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default CSD25481F4; diff --git a/lib/chips/CSD87502Q2T.circuit.tsx b/lib/chips/CSD87502Q2T.circuit.tsx new file mode 100644 index 00000000..c6f326e6 --- /dev/null +++ b/lib/chips/CSD87502Q2T.circuit.tsx @@ -0,0 +1,146 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["G1"], + pin3: ["D22"], + pin4: ["S2"], + pin5: ["G2"], + pin6: ["D12"], + pin7: ["D11"], + pin8: ["D21"], +} as const; + +export const CSD87502Q2T = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2864028.obj?uuid=cec58c53873d413fa827b6a5400714bb", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2864028.step?uuid=cec58c53873d413fa827b6a5400714bb", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0.06350000000000477, z: 0 }, + }} + {...props} + /> + ); +}; + +export default CSD87502Q2T; diff --git a/lib/chips/CSD88539NDT.circuit.tsx b/lib/chips/CSD88539NDT.circuit.tsx new file mode 100644 index 00000000..3d62e9b8 --- /dev/null +++ b/lib/chips/CSD88539NDT.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S1"], + pin2: ["G1"], + pin3: ["S2"], + pin4: ["G2"], + pin5: ["D21"], + pin6: ["D22"], + pin7: ["D11"], + pin8: ["D12"], +} as const; + +export const CSD88539NDT = (props: ChipProps) => { + return ( + + ); +}; + +export default CSD88539NDT; diff --git a/lib/chips/DAC121S101CIMK_NOPB.circuit.tsx b/lib/chips/DAC121S101CIMK_NOPB.circuit.tsx new file mode 100644 index 00000000..945e3834 --- /dev/null +++ b/lib/chips/DAC121S101CIMK_NOPB.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT"], + pin2: ["GND"], + pin3: ["VA"], + pin4: ["DIN"], + pin5: ["SCLK"], + pin6: ["SYNC"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const DAC121S101CIMK_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC121S101CIMK_NOPB; diff --git a/lib/chips/DAC43701DSGR.circuit.tsx b/lib/chips/DAC43701DSGR.circuit.tsx new file mode 100644 index 00000000..f3712fdc --- /dev/null +++ b/lib/chips/DAC43701DSGR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPI", "1"], + pin2: ["SCL", "2"], + pin3: ["SDA", "3"], + pin4: ["CAP", "4"], + pin5: ["AGND", "5"], + pin6: ["VDD", "6"], + pin7: ["FB", "7"], + pin8: ["OUT", "8"], + pin9: ["EP", "9"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "control", + pin3: "bidirectional", + pin4: "input", + pin5: "ground", + pin6: "power", + pin7: "input", + pin8: "output", + pin9: "ground", +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { requiresPower: true }, + pin9: { requiresGround: true }, +} as const; + +export const DAC43701DSGR = (props: ChipProps) => { + // Footprint provenance: TI drawing DSG0008A; donor TPS61021ADSGR (JLCPCB C193037) + return ( + + ); +}; + +export default DAC43701DSGR; diff --git a/lib/chips/DAC53202RTER.circuit.tsx b/lib/chips/DAC53202RTER.circuit.tsx new file mode 100644 index 00000000..6e8609b7 --- /dev/null +++ b/lib/chips/DAC53202RTER.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB0"], + pin2: ["OUT0"], + pin3: ["NC4"], + pin4: ["NC3"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["NC2"], + pin10: ["NC1"], + pin11: ["OUT1"], + pin12: ["FB1"], + pin13: ["CAP"], + pin14: ["AGND"], + pin15: ["VDD"], + pin16: ["VREF"], + pin17: ["PAD"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { doNotConnect: true }, + pin9: { doNotConnect: true }, + pin10: { doNotConnect: true }, + pin14: { requiresGround: true }, + pin15: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const DAC53202RTER = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC53202RTER; diff --git a/lib/chips/DAC53204YBHR.circuit.tsx b/lib/chips/DAC53204YBHR.circuit.tsx new file mode 100644 index 00000000..29a5990a --- /dev/null +++ b/lib/chips/DAC53204YBHR.circuit.tsx @@ -0,0 +1,97 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VREF", "A1"], + pin2: ["OUT3", "A2"], + pin3: ["OUT2", "A3"], + pin4: ["GPIO_SDO", "A4"], + pin8: ["VDD", "B1"], + pin7: ["FB3", "B2"], + pin6: ["FB2", "B3"], + pin5: ["SCL_SYNC", "B4"], + pin9: ["AGND", "C1"], + pin10: ["FB0", "C2"], + pin11: ["FB1", "C3"], + pin12: ["A0_SDI", "C4"], + pin16: ["CAP", "D1"], + pin15: ["OUT0", "D2"], + pin14: ["OUT1", "D3"], + pin13: ["SDA_SCLK", "D4"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "output", + pin3: "output", + pin8: "power", + pin7: "input", + pin6: "input", + pin5: "output", + pin9: "ground", + pin10: "input", + pin11: "input", + pin12: "input", + pin16: "power", + pin15: "output", + pin14: "output", +} as const; + +const pinAttributes = { + pin1: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, + pin9: { + requiresGround: true, + }, + pin16: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "pin1"], + pin12: [...pinLabels["pin12"], "pin2"], + pin5: [...pinLabels["pin5"], "pin3"], + pin14: [...pinLabels["pin14"], "pin5"], + pin11: [...pinLabels["pin11"], "pin6"], + pin6: [...pinLabels["pin6"], "pin7"], + pin3: [...pinLabels["pin3"], "pin8"], + pin15: [...pinLabels["pin15"], "pin9"], + pin7: [...pinLabels["pin7"], "pin11"], + pin2: [...pinLabels["pin2"], "pin12"], + pin16: [...pinLabels["pin16"], "pin13"], + pin9: [...pinLabels["pin9"], "pin14"], + pin8: [...pinLabels["pin8"], "pin15"], + pin1: [...pinLabels["pin1"], "pin16"], +} as const; + +export const DAC53204YBHR = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC53204YBHR; diff --git a/lib/chips/DAC63001RTER.circuit.tsx b/lib/chips/DAC63001RTER.circuit.tsx new file mode 100644 index 00000000..19e3782f --- /dev/null +++ b/lib/chips/DAC63001RTER.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB0"], + pin2: ["OUT0"], + pin3: ["NC4"], + pin4: ["NC3"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["NC2"], + pin10: ["NC1"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["CAP"], + pin14: ["AGND"], + pin15: ["VDD"], + pin16: ["VREF"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { doNotConnect: true }, + pin9: { doNotConnect: true }, + pin10: { doNotConnect: true }, + pin14: { requiresGround: true }, + pin15: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const DAC63001RTER = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC63001RTER; diff --git a/lib/chips/DAC80502DRXR.circuit.tsx b/lib/chips/DAC80502DRXR.circuit.tsx new file mode 100644 index 00000000..44f69908 --- /dev/null +++ b/lib/chips/DAC80502DRXR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["VOUTA"], + pin3: ["RSTSEL"], + pin4: ["AGND"], + pin5: ["SPI2C"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["VOUTB"], + pin10: ["VREFIO"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const DAC80502DRXR = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC80502DRXR; diff --git a/lib/chips/DAC8411IDCKT.circuit.tsx b/lib/chips/DAC8411IDCKT.circuit.tsx new file mode 100644 index 00000000..93352a62 --- /dev/null +++ b/lib/chips/DAC8411IDCKT.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SYNC"], + pin2: ["SCLK"], + pin3: ["DIN"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["VOUT"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, +} as const; + +export const DAC8411IDCKT = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC8411IDCKT; diff --git a/lib/chips/DAC8564IAPWR.circuit.tsx b/lib/chips/DAC8564IAPWR.circuit.tsx new file mode 100644 index 00000000..cee10a50 --- /dev/null +++ b/lib/chips/DAC8564IAPWR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUTA"], + pin2: ["VOUTB"], + pin3: ["pin3"], + pin4: ["AVDD"], + pin5: ["VREFL"], + pin6: ["GND"], + pin7: ["VOUTC"], + pin8: ["VOUTD"], + pin9: ["SYNC"], + pin10: ["SCLK"], + pin11: ["DIN"], + pin12: ["IOVDD"], + pin13: ["A0"], + pin14: ["A1"], + pin15: ["ENABLE"], + pin16: ["LDAC"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, +} as const; + +export const DAC8564IAPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default DAC8564IAPWR; diff --git a/lib/chips/DCH010505SN7.circuit.tsx b/lib/chips/DCH010505SN7.circuit.tsx new file mode 100644 index 00000000..207800ab --- /dev/null +++ b/lib/chips/DCH010505SN7.circuit.tsx @@ -0,0 +1,104 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VI_P"], + pin2: ["VI_N"], + pin5: ["VO_N"], + pin7: ["VO_P"], +} as const; + +export const DCH010505SN7 = (props: ChipProps) => { + return ( + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19096.obj?uuid=947d2eae18784622ae4764c50258ee37", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19096.step?uuid=947d2eae18784622ae4764c50258ee37", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.014998699999978271, + y: 0.009998699999941962, + z: -0.010007600000000227, + }, + }} + {...props} + /> + ); +}; + +export default DCH010505SN7; diff --git a/lib/chips/DLP4500AFQD.circuit.tsx b/lib/chips/DLP4500AFQD.circuit.tsx new file mode 100644 index 00000000..0b4b7253 --- /dev/null +++ b/lib/chips/DLP4500AFQD.circuit.tsx @@ -0,0 +1,1075 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DATA_0", "A1"], + pin2: ["DATA_1", "A2"], + pin3: ["DATA_2", "A3"], + pin4: ["DATA_3", "A4"], + pin5: ["UNUSED", "A5", "UNUSED_A5"], + pin6: ["UNUSED", "A18", "UNUSED_A18"], + pin7: ["VOFFSET", "A19", "VOFFSET_A19"], + pin8: ["DRC_OE", "A20"], + pin9: ["VSS", "A21", "VSS_A21"], + pin10: ["DRC_STROBE", "A22"], + pin11: ["DATA_4", "B1"], + pin12: ["VSS", "B2", "VSS_B2"], + pin13: ["DATA_5", "B3"], + pin14: ["VSS", "B4", "VSS_B4"], + pin15: ["UNUSED", "B5", "UNUSED_B5"], + pin16: ["UNUSED", "B18", "UNUSED_B18"], + pin17: ["VREF", "B19", "VREF_B19"], + pin18: ["VSS", "B20", "VSS_B20"], + pin19: ["DRC_BUS", "B21"], + pin20: ["VCC", "B22", "VCC_B22"], + pin21: ["DATA_6", "C1"], + pin22: ["VCC", "C2", "VCC_C2"], + pin23: ["DATA_7", "C3"], + pin24: ["DATA_8", "C4"], + pin25: ["UNUSED", "C5", "UNUSED_C5"], + pin26: ["UNUSED", "C18", "UNUSED_C18"], + pin27: ["VBIAS", "C19", "VBIAS_C19"], + pin28: ["SAC_BUS", "C20"], + pin29: ["VSS", "C21", "VSS_C21"], + pin30: ["SAC_CLK", "C22"], + pin31: ["DATA_9", "D1"], + pin32: ["VSS", "D2", "VSS_D2"], + pin33: ["VSS", "D3", "VSS_D3"], + pin34: ["DATA_10", "D4"], + pin35: ["UNUSED", "D5", "UNUSED_D5"], + pin36: ["UNUSED", "D18", "UNUSED_D18"], + pin37: ["VBIAS", "D19", "VBIAS_D19"], + pin38: ["VSS", "D20", "VSS_D20"], + pin39: ["VCC", "D21", "VCC_D21"], + pin40: ["VSS", "D22", "VSS_D22"], + pin41: ["DATA_11", "E1"], + pin42: ["VCC", "E2", "VCC_E2"], + pin43: ["VSS", "E3", "VSS_E3"], + pin44: ["DATA_12", "E4"], + pin45: ["UNUSED", "E5", "UNUSED_E5"], + pin46: ["UNUSED", "E18", "UNUSED_E18"], + pin47: ["VRESET", "E19", "VRESET_E19"], + pin48: ["VCC", "E20", "VCC_E20"], + pin49: ["VSS", "E21", "VSS_E21"], + pin50: ["VCC", "E22", "VCC_E22"], + pin51: ["DATA_13", "F1"], + pin52: ["VSS", "F2", "VSS_F2"], + pin53: ["DATA_14", "F3"], + pin54: ["VSS", "F4", "VSS_F4"], + pin55: ["UNUSED", "F5", "UNUSED_F5"], + pin56: ["UNUSED", "F18", "UNUSED_F18"], + pin57: ["VRESET", "F19", "VRESET_F19"], + pin58: ["VSS", "F20", "VSS_F20"], + pin59: ["VCC", "F21", "VCC_F21"], + pin60: ["VSS", "F22", "VSS_F22"], + pin61: ["DATA_15", "G1"], + pin62: ["DATA_16", "G2"], + pin63: ["VCC", "G3", "VCC_G3"], + pin64: ["DATA_17", "G4"], + pin65: ["UNUSED", "G5", "UNUSED_G5"], + pin66: ["UNUSED", "G18", "UNUSED_G18"], + pin67: ["VCC", "G19", "VCC_G19"], + pin68: ["VCC", "G20", "VCC_G20"], + pin69: ["VSS", "G21", "VSS_G21"], + pin70: ["VCC", "G22", "VCC_G22"], + pin71: ["DATA_18", "H1"], + pin72: ["DATA_19", "H2"], + pin73: ["VSS", "H3", "VSS_H3"], + pin74: ["DATA_20", "H4"], + pin75: ["UNUSED", "H5", "UNUSED_H5"], + pin76: ["UNUSED", "H18", "UNUSED_H18"], + pin77: ["VCC", "H19", "VCC_H19"], + pin78: ["VSS", "H20", "VSS_H20"], + pin79: ["VCC", "H21", "VCC_H21"], + pin80: ["VSS", "H22", "VSS_H22"], + pin81: ["DATA_21", "J1"], + pin82: ["VSS", "J2", "VSS_J2"], + pin83: ["DATA_22", "J3"], + pin84: ["DATA_23", "J4"], + pin85: ["UNUSED", "J5", "UNUSED_J5"], + pin86: ["UNUSED", "J18", "UNUSED_J18"], + pin87: ["VREF", "J19", "VREF_J19"], + pin88: ["VCC", "J20", "VCC_J20"], + pin89: ["VSS", "J21", "VSS_J21"], + pin90: ["VCC", "J22", "VCC_J22"], + pin91: ["DCLK", "K1"], + pin92: ["LOADB", "K2"], + pin93: ["SCTRL", "K3"], + pin94: ["TRC", "K4"], + pin95: ["VOFFSET", "K19", "VOFFSET_K19"], + pin96: ["VSS", "K20", "VSS_K20"], + pin97: ["VCC", "K21", "VCC_K21"], + pin98: ["UNUSED", "K22", "UNUSED_K22"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "no-connect", + pin6: "no-connect", + pin7: "power", + pin8: "control", + pin9: "ground", + pin10: "input", + pin11: "bidirectional", + pin12: "ground", + pin13: "bidirectional", + pin14: "ground", + pin15: "no-connect", + pin16: "no-connect", + pin17: "power", + pin18: "ground", + pin19: "input", + pin20: "power", + pin21: "bidirectional", + pin22: "power", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "no-connect", + pin26: "no-connect", + pin27: "power", + pin28: "input", + pin29: "ground", + pin30: "control", + pin31: "bidirectional", + pin32: "ground", + pin33: "ground", + pin34: "bidirectional", + pin35: "no-connect", + pin36: "no-connect", + pin37: "power", + pin38: "ground", + pin39: "power", + pin40: "ground", + pin41: "bidirectional", + pin42: "power", + pin43: "ground", + pin44: "bidirectional", + pin45: "no-connect", + pin46: "no-connect", + pin47: "power", + pin48: "power", + pin49: "ground", + pin50: "power", + pin51: "bidirectional", + pin52: "ground", + pin53: "bidirectional", + pin54: "ground", + pin55: "no-connect", + pin56: "no-connect", + pin57: "power", + pin58: "ground", + pin59: "power", + pin60: "ground", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "power", + pin64: "bidirectional", + pin65: "no-connect", + pin66: "no-connect", + pin67: "power", + pin68: "power", + pin69: "ground", + pin70: "power", + pin71: "bidirectional", + pin72: "bidirectional", + pin73: "ground", + pin74: "bidirectional", + pin75: "no-connect", + pin76: "no-connect", + pin77: "power", + pin78: "ground", + pin79: "power", + pin80: "ground", + pin81: "bidirectional", + pin82: "ground", + pin83: "bidirectional", + pin84: "bidirectional", + pin85: "no-connect", + pin86: "no-connect", + pin87: "power", + pin88: "power", + pin89: "ground", + pin90: "power", + pin91: "input", + pin92: "input", + pin93: "input", + pin94: "input", + pin95: "power", + pin96: "ground", + pin97: "power", + pin98: "no-connect", +} as const; + +const pinAttributes = { + pin5: { doNotConnect: true }, + pin6: { doNotConnect: true }, + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, + pin12: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { doNotConnect: true }, + pin16: { doNotConnect: true }, + pin17: { requiresPower: true }, + pin18: { requiresGround: true }, + pin20: { requiresPower: true }, + pin22: { requiresPower: true }, + pin25: { doNotConnect: true }, + pin26: { doNotConnect: true }, + pin27: { requiresPower: true }, + pin29: { requiresGround: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin35: { doNotConnect: true }, + pin36: { doNotConnect: true }, + pin37: { requiresPower: true }, + pin38: { requiresGround: true }, + pin39: { requiresPower: true }, + pin40: { requiresGround: true }, + pin42: { requiresPower: true }, + pin43: { requiresGround: true }, + pin45: { doNotConnect: true }, + pin46: { doNotConnect: true }, + pin47: { requiresPower: true }, + pin48: { requiresPower: true }, + pin49: { requiresGround: true }, + pin50: { requiresPower: true }, + pin52: { requiresGround: true }, + pin54: { requiresGround: true }, + pin55: { doNotConnect: true }, + pin56: { doNotConnect: true }, + pin57: { requiresPower: true }, + pin58: { requiresGround: true }, + pin59: { requiresPower: true }, + pin60: { requiresGround: true }, + pin63: { requiresPower: true }, + pin65: { doNotConnect: true }, + pin66: { doNotConnect: true }, + pin67: { requiresPower: true }, + pin68: { requiresPower: true }, + pin69: { requiresGround: true }, + pin70: { requiresPower: true }, + pin73: { requiresGround: true }, + pin75: { doNotConnect: true }, + pin76: { doNotConnect: true }, + pin77: { requiresPower: true }, + pin78: { requiresGround: true }, + pin79: { requiresPower: true }, + pin80: { requiresGround: true }, + pin82: { requiresGround: true }, + pin85: { doNotConnect: true }, + pin86: { doNotConnect: true }, + pin87: { requiresPower: true }, + pin88: { requiresPower: true }, + pin89: { requiresGround: true }, + pin90: { requiresPower: true }, + pin95: { requiresPower: true }, + pin96: { requiresGround: true }, + pin97: { requiresPower: true }, + pin98: { doNotConnect: true }, +} as const; + +export const DLP4500AFQD = (props: ChipProps) => { + // Footprint provenance: TI drawing FQD-2510852; official source https://www.ti.com/lit/gpn/DLP4500 pages 50,51,52 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default DLP4500AFQD; diff --git a/lib/chips/DM3730CUSD100.circuit.tsx b/lib/chips/DM3730CUSD100.circuit.tsx new file mode 100644 index 00000000..4ff49a9c --- /dev/null +++ b/lib/chips/DM3730CUSD100.circuit.tsx @@ -0,0 +1,3845 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC", "A1", "NC_A1"], + pin2: ["No", "A2"], + pin3: ["sdrc_a0", "A4"], + pin4: ["sdrc_dqs0", "A5"], + pin5: ["sdrc_dm2", "A7"], + pin6: ["sdrc_dqs2", "A8"], + pin7: ["sdrc_clk", "A10"], + pin8: ["sdrc_nclk", "A11"], + pin9: ["sdrc_dqs1", "A13"], + pin10: ["sdrc_d14", "A14"], + pin11: ["sdrc_dm3", "A16"], + pin12: ["sdrc_dqs3", "A17"], + pin13: ["sdrc_ncs0", "A19"], + pin14: ["sdrc_nwe", "A20"], + pin15: ["cam_hs", "A22"], + pin16: ["uart3_cts", "A23"], + pin17: ["hdq_sio", "A24"], + pin353: ["mmc2_dat7", "AA1"], + pin354: ["mmc2", "AA2", "mmc2_AA2"], + pin355: ["sys_clkout2", "AA6"], + pin356: ["jtag_rtck", "AA7"], + pin357: ["jtag_tms_tmsc", "AA9"], + pin358: ["sys_nrespwron", "AA10"], + pin359: ["vdds_sram", "AA12"], + pin360: ["vdda_wkup_bg_bb", "AA13"], + pin361: ["sys_boot6", "AA15"], + pin362: ["sys_32k", "AA16"], + pin363: ["mcbsp_clks", "AA18"], + pin364: ["mcbsp1_fsx", "AA19"], + pin365: ["cvideo2_out", "AA23"], + pin366: ["mmc2", "AB2", "mmc2_AB2"], + pin367: ["mmc2", "AB3", "mmc2_AB3"], + pin368: ["mmc2_cmd", "AB5"], + pin369: ["jtag_tck", "AB6"], + pin370: ["jtag_ntrst", "AB7"], + pin371: ["jtag_tdo", "AB9"], + pin372: ["jtag_tdi", "AB10"], + pin373: ["sys_boot0", "AB12"], + pin374: ["vdda_dac", "AB13"], + pin375: ["vssa_dac", "AB15"], + pin376: ["sys_boot5", "AB16"], + pin377: ["cam_d0", "AB18"], + pin378: ["dss_data1", "AB19"], + pin379: ["mcbsp1_fsr", "AB20"], + pin380: ["dss_data12", "AB22"], + pin381: ["cvideo1_vfb", "AB23"], + pin382: ["cvideo1_out", "AB24"], + pin383: ["etk_clk", "AC1"], + pin384: ["uart1_cts", "AC2"], + pin385: ["etk_d10", "AC3"], + pin386: ["etk_d8", "AC4"], + pin387: ["etk_d4", "AC5"], + pin388: ["etk_d1", "AC6"], + pin389: ["etk_d2", "AC7"], + pin390: ["etk_d6", "AC8"], + pin391: ["etk_d11", "AC9"], + pin392: ["etk_d12", "AC10"], + pin393: ["etk_d14", "AC11"], + pin394: ["i2c3_sda", "AC12"], + pin395: ["i2c3_scl", "AC13"], + pin396: ["i2c2_sda", "AC14"], + pin397: ["i2c2_scl", "AC15"], + pin398: ["sys_boot1", "AC16"], + pin399: ["sys_boot4", "AC17"], + pin400: ["cam_d1", "AC18"], + pin401: ["dss_data0", "AC19"], + pin402: ["dss_data3", "AC20"], + pin403: ["dss_data5", "AC21"], + pin404: ["dss_data10", "AC22"], + pin405: ["dss_data11", "AC23"], + pin406: ["jtag_emu0", "AC24"], + pin407: ["NC", "AD1", "NC_AD1"], + pin408: ["etk_d5", "AD2"], + pin409: ["etk_ctl", "AD3"], + pin410: ["etk_d9", "AD5"], + pin411: ["etk_d0", "AD6"], + pin412: ["etk_d3", "AD8"], + pin413: ["etk_d7", "AD9"], + pin414: ["etk_d13", "AD11"], + pin415: ["etk_d15", "AD12"], + pin416: ["sys_xtalout", "AD14"], + pin417: ["sys_xtalin", "AD15"], + pin418: ["sys_boot2", "AD17"], + pin419: ["sys_boot3", "AD18"], + pin420: ["dss_data2", "AD20"], + pin421: ["dss_data4", "AD21"], + pin422: ["sys_off", "AD23"], + pin423: ["jtag_emu1", "AD24"], + pin18: ["NC", "B1", "NC_B1"], + pin19: ["sdrc_a4", "B2"], + pin20: ["sdrc_a3", "B3"], + pin21: ["sdrc_a1", "B4"], + pin22: ["sdrc_d3", "B5"], + pin23: ["sdrc_dm0", "B6"], + pin24: ["sdrc_d7", "B7"], + pin25: ["sdrc_d18", "B8"], + pin26: ["sdrc_d19", "B9"], + pin27: ["sdrc_d21", "B10"], + pin28: ["sdrc_d8", "B11"], + pin29: ["sdrc_d10", "B12"], + pin30: ["sdrc_dm1", "B13"], + pin31: ["sdrc_d13", "B14"], + pin32: ["sdrc_d15", "B15"], + pin33: ["sdrc_d27", "B16"], + pin34: ["sdrc_d30", "B17"], + pin35: ["sdrc_d31", "B18"], + pin36: ["sdrc_ncs1", "B19"], + pin37: ["sdrc_cke0", "B20"], + pin38: ["cam_d5", "B21"], + pin39: ["cam", "B22", "cam_B22"], + pin40: ["uart3_rts", "B23"], + pin41: ["uart3_rx", "B24"], + pin42: ["gpmc_wait0", "C1"], + pin43: ["gpmc_wait3", "C2"], + pin44: ["sdrc_a5", "C3"], + pin45: ["sdrc_d1", "C5"], + pin46: ["sdrc_d2", "C6"], + pin47: ["sdrc_d6", "C7"], + pin48: ["sdrc_d16", "C9"], + pin49: ["sdrc_d20", "C10"], + pin50: ["sdrc_d9", "C12"], + pin51: ["sdrc_d12", "C13"], + pin52: ["sdrc_d26", "C15"], + pin53: ["sdrc_d28", "C16"], + pin54: ["sdrc_ba0", "C18"], + pin55: ["sdrc_ncas", "C19"], + pin56: ["sdrc_cke1", "C20"], + pin57: ["cam", "C22", "cam_C22"], + pin58: ["uart3_tx", "C23"], + pin59: ["gpmc_ncs3", "D2"], + pin60: ["sdrc_a2", "D6"], + pin61: ["sdrc_d0", "D7"], + pin62: ["sdrc_d4", "D9"], + pin63: ["sdrc_d5", "D10"], + pin64: ["sdrc_d22", "D12"], + pin65: ["sdrc_d11", "D13"], + pin66: ["sdrc_d25", "D15"], + pin67: ["sdrc_d29", "D16"], + pin68: ["sdrc_ba1", "D18"], + pin69: ["sdrc_nras", "D19"], + pin70: ["dss_data20", "D23"], + pin71: ["dss_data6", "D24"], + pin72: ["gpmc_nwp", "E1"], + pin73: ["gpmc_ncs0", "E2"], + pin74: ["sdrc_a6", "E3"], + pin75: ["sdrc_a10", "E7"], + pin76: ["sdrc_a9", "E9"], + pin77: ["sdrc_a8", "E10"], + pin78: ["sdrc_d17", "E12"], + pin79: ["sdrc_d23", "E13"], + pin80: ["sdrc_d24", "E15"], + pin81: ["vdds_mem", "E16", "vdds_mem_E16"], + pin82: ["cam_vs", "E18"], + pin83: ["dss_hsync", "E22"], + pin84: ["dss_data7", "E23"], + pin85: ["dss_data8", "E24"], + pin86: ["gpmc_nadv_ale", "F1"], + pin87: ["gpmc_noe", "F2"], + pin88: ["gpmc_ncs6", "F3"], + pin89: ["gpmc_ncs4", "F4"], + pin90: ["sdrc_a7", "F6"], + pin91: ["sdrc_a13", "F7"], + pin92: ["sdrc_a14", "F9"], + pin93: ["vdd_mpu_iva", "F10", "vdd_mpu_iva_F10"], + pin94: ["vdd_core", "F12", "vdd_core_F12"], + pin95: ["vdd_core", "F13", "vdd_core_F13"], + pin96: ["vdds_mem", "F15", "vdds_mem_F15"], + pin97: ["vdds_mem", "F16", "vdds_mem_F16"], + pin98: ["cam_wen", "F18"], + pin99: ["cam_d3", "F19"], + pin100: ["cam_d10", "F21"], + pin101: ["dss_vsync", "F22"], + pin102: ["dss_data9", "F23"], + pin103: ["gpmc_a10", "G2"], + pin104: ["gpmc_nwe", "G3"], + pin105: ["gpmc_ncs7", "G4"], + pin106: ["gpmc_ncs5", "G5"], + pin107: ["sdrc_a11", "G6"], + pin108: ["sdrc_a12", "G7"], + pin109: ["vdd_mpu_iva", "G9", "vdd_mpu_iva_G9"], + pin110: ["vdd_mpu_iva", "G10", "vdd_mpu_iva_G10"], + pin111: ["vdd_core", "G12", "vdd_core_G12"], + pin112: ["vdd_core", "G13", "vdd_core_G13"], + pin113: ["vdds_mem", "G15", "vdds_mem_G15"], + pin114: ["J6", "G16", "J6_G16"], + pin115: ["vdda_dplls_dll", "G18"], + pin116: ["cam_d2", "G19"], + pin117: ["cam_d4", "G20"], + pin118: ["cam_d11", "G21"], + pin119: ["dss_pclk", "G22"], + pin120: ["dss_data17", "G23"], + pin121: ["dss_data18", "G24"], + pin122: ["gpmc_a8", "H1"], + pin123: ["gpmc_a9", "H2"], + pin124: ["vdds_x", "H8"], + pin125: ["vdd_mpu_iva", "H9", "vdd_mpu_iva_H9"], + pin126: ["vdd_mpu_iva", "H10", "vdd_mpu_iva_H10"], + pin127: ["vss", "H11", "vss_H11"], + pin128: ["vdd_core", "H12", "vdd_core_H12"], + pin129: ["vdd_core", "H13", "vdd_core_H13"], + pin130: ["vss", "H14", "vss_H14"], + pin131: ["J6", "H15", "J6_H15"], + pin132: ["vss", "H16", "vss_H16"], + pin133: ["cap_vdd_sram_core", "H17"], + pin134: ["dss_data19", "H23"], + pin135: ["cam_fld", "H24"], + pin136: ["gpmc_a7", "J1"], + pin137: ["gpmc_a6", "J2"], + pin138: ["gpmc_a5", "J3"], + pin139: ["gpmc_a4", "J4"], + pin140: ["vdds_mem", "J6", "vdds_mem_J6"], + pin141: ["vdds_mem", "J7", "vdds_mem_J7"], + pin142: ["vdds_mem", "J8", "vdds_mem_J8"], + pin143: ["vdd_mpu_iva", "J9", "vdd_mpu_iva_J9"], + pin144: ["vdd_mpu_iva", "J10", "vdd_mpu_iva_J10"], + pin145: ["vss", "J11", "vss_J11"], + pin146: ["J14", "J12", "J14_J12"], + pin147: ["J14", "J13", "J14_J13"], + pin148: ["vss", "J14", "vss_J14"], + pin149: ["J14", "J15", "J14_J15"], + pin150: ["J14", "J16", "J14_J16"], + pin151: ["vdd_core", "J17", "vdd_core_J17"], + pin152: ["vdd_core", "J18", "vdd_core_J18"], + pin153: ["cam_pclk", "J19"], + pin154: ["cam", "J20", "cam_J20"], + pin155: ["dss_acbias", "J21"], + pin156: ["dss_data16", "J22"], + pin157: ["cam_d8", "J23"], + pin158: ["gpmc_a3", "K2"], + pin159: ["gpmc_a2", "K3"], + pin160: ["gpmc_a1", "K4"], + pin161: ["gpmc_nbe0_cle", "K5"], + pin162: ["vdds_mem", "K6", "vdds_mem_K6"], + pin163: ["vdds_mem", "K7", "vdds_mem_K7"], + pin164: ["vdds_mem", "K8", "vdds_mem_K8"], + pin165: ["J14", "K10", "J14_K10"], + pin166: ["J14", "K11", "J14_K11"], + pin167: ["L8", "K14", "L8_K14"], + pin168: ["L8", "K15", "L8_K15"], + pin169: ["vdd_core", "K17", "vdd_core_K17"], + pin170: ["vdd_core", "K18", "vdd_core_K18"], + pin171: ["vdd_core", "K19", "vdd_core_K19"], + pin172: ["i2c1_scl", "K20"], + pin173: ["i2c1_sda", "K21"], + pin174: ["dss_data21", "K22"], + pin175: ["cam_d9", "K23"], + pin176: ["cam_d7", "K24"], + pin177: ["gpmc_nbe1", "L1"], + pin178: ["gpmc_d0", "L2"], + pin179: ["vss", "L8", "vss_L8"], + pin180: ["L8", "L10", "L8_L10"], + pin181: ["M6", "L11", "M6_L11"], + pin182: ["M6", "L12", "M6_L12"], + pin183: ["L8", "L13", "L8_L13"], + pin184: ["vdd_core", "L14", "vdd_core_L14"], + pin185: ["vdd_core", "L15", "vdd_core_L15"], + pin186: ["L8", "L17", "L8_L17"], + pin187: ["mmc1_cmd", "L23"], + pin188: ["cam_d6", "L24"], + pin189: ["gpmc_d1", "M1"], + pin190: ["gpmc_d2", "M2"], + pin191: ["gpmc_d4", "M3"], + pin192: ["mcspi2_cs1", "M4"], + pin193: ["mcspi2_cs0", "M5"], + pin194: ["vdd_mpu_iva", "M6", "vdd_mpu_iva_M6"], + pin195: ["vdd_mpu_iva", "M7", "vdd_mpu_iva_M7"], + pin196: ["vdd_mpu_iva", "M8", "vdd_mpu_iva_M8"], + pin197: ["L8", "M9", "L8_M9"], + pin198: ["L8", "M10", "L8_M10"], + pin199: ["L8", "M11", "L8_M11"], + pin200: ["vdd_mpu_iva", "M12", "vdd_mpu_iva_M12"], + pin201: ["L8", "M13", "L8_M13"], + pin202: ["vdd_core", "M14", "vdd_core_M14"], + pin203: ["vdd_core", "M15", "vdd_core_M15"], + pin204: ["L8", "M16", "L8_M16"], + pin205: ["vdds", "M17", "vdds_M17"], + pin206: ["vdds", "M18", "vdds_M18"], + pin207: ["vdds", "M19", "vdds_M19"], + pin208: ["mmc1_dat2", "M20"], + pin209: ["mmc1_dat1", "M21"], + pin210: ["mmc1_dat0", "M22"], + pin211: ["mmc1_clk", "M23"], + pin212: ["gpmc_d3", "N2"], + pin213: ["mcspi2", "N3", "mcspi2_N3"], + pin214: ["mcspi2", "N4", "mcspi2_N4"], + pin215: ["mcspi2_clk", "N5"], + pin216: ["vdd_mpu_iva", "N6", "vdd_mpu_iva_N6"], + pin217: ["vdd_mpu_iva", "N7", "vdd_mpu_iva_N7"], + pin218: ["vdd_mpu_iva", "N8", "vdd_mpu_iva_N8"], + pin219: ["L8", "N9", "L8_N9"], + pin220: ["L8", "N10", "L8_N10"], + pin221: ["L8", "N11", "L8_N11"], + pin222: ["L8", "N12", "L8_N12"], + pin223: ["L8", "N13", "L8_N13"], + pin224: ["L8", "N14", "L8_N14"], + pin225: ["L8", "N15", "L8_N15"], + pin226: ["L8", "N16", "L8_N16"], + pin227: ["vdds", "N17", "vdds_N17"], + pin228: ["vdds", "N18", "vdds_N18"], + pin229: ["vdds", "N19", "vdds_N19"], + pin230: ["cap_vddu_array", "N20"], + pin231: ["cap_vdd_bb_mpu_iv", "N21"], + pin232: ["gpio_126", "N22"], + pin233: ["mmc1_dat3", "N23"], + pin234: ["vdds_mmc1", "N24"], + pin235: ["gpmc_d5", "P1"], + pin236: ["gpmc_d6", "P2"], + pin237: ["P11", "P8", "P11_P8"], + pin238: ["P11", "P10", "P11_P10"], + pin239: ["vss", "P11", "vss_P11"], + pin240: ["P11", "P12", "P11_P12"], + pin241: ["P11", "P13", "P11_P13"], + pin242: ["P11", "P14", "P11_P14"], + pin243: ["P11", "P15", "P11_P15"], + pin244: ["P11", "P17", "P11_P17"], + pin245: ["hsusb0_dir", "P23"], + pin246: ["gpio_129", "P24"], + pin247: ["gpmc_d7", "R1"], + pin248: ["gpmc_d8", "R2"], + pin249: ["gpmc_d11", "R3"], + pin250: ["mcspi1", "R4", "mcspi1_R4"], + pin251: ["mcspi1_cs3", "R5"], + pin252: ["vdd_mpu_iva", "R6", "vdd_mpu_iva_R6"], + pin253: ["vdd_mpu_iva", "R7", "vdd_mpu_iva_R7"], + pin254: ["vdd_mpu_iva", "R8", "vdd_mpu_iva_R8"], + pin255: ["P11", "R10", "P11_R10"], + pin256: ["P11", "R11", "P11_R11"], + pin257: ["P11", "R14", "P11_R14"], + pin258: ["T10", "R15", "T10_R15"], + pin259: ["vdd_core", "R17", "vdd_core_R17"], + pin260: ["vdd_core", "R18", "vdd_core_R18"], + pin261: ["vdd_core", "R19", "vdd_core_R19"], + pin262: ["mcbsp2_dx", "R20"], + pin263: ["hsusb0_clk", "R21"], + pin264: ["hsusb0_nxt", "R22"], + pin265: ["hsusb0_stp", "R23"], + pin266: ["gpmc_d9", "T2"], + pin267: ["gpmc_d12", "T3"], + pin268: ["mcspi1", "T4", "mcspi1_T4"], + pin269: ["mcspi1_clk", "T5"], + pin270: ["mcspi1_cs0", "T6"], + pin271: ["vdd_mpu_iva", "T7", "vdd_mpu_iva_T7"], + pin272: ["vdd_mpu_iva", "T8", "vdd_mpu_iva_T8"], + pin273: ["T10", "T9", "T10_T9"], + pin274: ["vss", "T10", "vss_T10"], + pin275: ["T10", "T11", "T10_T11"], + pin276: ["T10", "T12", "T10_T12"], + pin277: ["T10", "T13", "T10_T13"], + pin278: ["T10", "T14", "T10_T14"], + pin279: ["U9", "T15", "U9_T15"], + pin280: ["U9", "T16", "U9_T16"], + pin281: ["vdd_core", "T17", "vdd_core_T17"], + pin282: ["vdd_core", "T18", "vdd_core_T18"], + pin283: ["vdd_core", "T19", "vdd_core_T19"], + pin284: ["vdd_core", "T20", "vdd_core_T20"], + pin285: ["mcbsp2", "T21"], + pin286: ["hsusb0", "T22", "hsusb0_T22"], + pin287: ["hsusb0", "T23", "hsusb0_T23"], + pin288: ["hsusb0", "T24", "hsusb0_T24"], + pin289: ["gpmc_d10", "U1"], + pin290: ["gpmc_d13", "U2"], + pin291: ["cap_vdd_sram_mpu", "U8"], + pin292: ["vss", "U9", "vss_U9"], + pin293: ["vdds", "U10", "vdds_U10"], + pin294: ["U9", "U11", "U9_U11"], + pin295: ["vdd_mpu_iva", "U12", "vdd_mpu_iva_U12"], + pin296: ["vdd_mpu_iva", "U13", "vdd_mpu_iva_U13"], + pin297: ["U9", "U14", "U9_U14"], + pin298: ["U9", "U15", "U9_U15"], + pin299: ["U9", "U16", "U9_U16"], + pin300: ["vdda_dpll_per", "U17"], + pin301: ["hsusb0", "U23", "hsusb0_U23"], + pin302: ["hsusb0", "U24", "hsusb0_U24"], + pin303: ["gpmc_d14", "V1"], + pin304: ["gpmc_d15", "V2"], + pin305: ["mmc2", "V3", "mmc2_V3"], + pin306: ["mcbsp3_fsx", "V4"], + pin307: ["mcbsp3_dr", "V5"], + pin308: ["mcbsp3_dx", "V6"], + pin309: ["uart1_rx", "V7"], + pin310: ["vdds", "V9", "vdds_V9"], + pin311: ["vdds", "V10", "vdds_V10"], + pin312: ["vdd_mpu_iva", "V12", "vdd_mpu_iva_V12"], + pin313: ["vdd_mpu_iva", "V13", "vdd_mpu_iva_V13"], + pin314: ["U9", "V15", "U9_V15"], + pin315: ["U9", "V16", "U9_V16"], + pin316: ["mcbsp1", "V18", "mcbsp1_V18"], + pin317: ["mcbsp2_dr", "V19"], + pin318: ["mcbsp2_fsx", "V20"], + pin319: ["dss_data22", "V21"], + pin320: ["dss_data15", "V22"], + pin321: ["hsusb0", "V23", "hsusb0_V23"], + pin322: ["gpmc_clk", "W2"], + pin323: ["mmc2", "W3", "mmc2_W3"], + pin324: ["mcbsp3", "W4"], + pin325: ["uart1_rts", "W6"], + pin326: ["uart1_tx", "W7"], + pin327: ["vdds", "W9", "vdds_W9"], + pin328: ["vdds", "W10", "vdds_W10"], + pin329: ["vdd_mpu_iva", "W12", "vdd_mpu_iva_W12"], + pin330: ["vdd_mpu_iva", "W13", "vdd_mpu_iva_W13"], + pin331: ["sys_xtalgnd", "W15"], + pin332: ["sys_nirq", "W16"], + pin333: ["mcbsp1_dx", "W18"], + pin334: ["mcbsp1", "W19", "mcbsp1_W19"], + pin335: ["dss_data23", "W21"], + pin336: ["dss_data14", "W22"], + pin337: ["hsusb0", "W23", "hsusb0_W23"], + pin338: ["hsusb0", "W24", "hsusb0_W24"], + pin339: ["mmc2_clk", "Y1"], + pin340: ["mmc2_dat6", "Y2"], + pin341: ["mmc2", "Y3", "mmc2_Y3"], + pin342: ["sys_clkout1", "Y7"], + pin343: ["vdds", "Y9", "vdds_Y9"], + pin344: ["sys_nreswarm", "Y10"], + pin345: ["cap_vddu", "Y12"], + pin346: ["sys_clkreq", "Y13"], + pin347: ["i2c4_sda", "Y15"], + pin348: ["i2c4_scl", "Y16"], + pin349: ["mcbsp1_dr", "Y18"], + pin350: ["dss_data13", "Y22"], + pin351: ["cvideo2_vfb", "Y23"], + pin352: ["cvideo1_rset", "Y24"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin359: "power", + pin360: "power", + pin374: "power", + pin375: "ground", + pin407: "no-connect", + pin18: "no-connect", + pin81: "power", + pin93: "power", + pin94: "power", + pin95: "power", + pin96: "power", + pin97: "power", + pin109: "power", + pin110: "power", + pin111: "power", + pin112: "power", + pin113: "power", + pin115: "power", + pin124: "power", + pin125: "power", + pin126: "power", + pin127: "ground", + pin128: "power", + pin129: "power", + pin130: "ground", + pin132: "ground", + pin140: "power", + pin141: "power", + pin142: "power", + pin143: "power", + pin144: "power", + pin145: "ground", + pin148: "ground", + pin151: "power", + pin152: "power", + pin162: "power", + pin163: "power", + pin164: "power", + pin169: "power", + pin170: "power", + pin171: "power", + pin179: "ground", + pin184: "power", + pin185: "power", + pin194: "power", + pin195: "power", + pin196: "power", + pin200: "power", + pin202: "power", + pin203: "power", + pin205: "power", + pin206: "power", + pin207: "power", + pin216: "power", + pin217: "power", + pin218: "power", + pin227: "power", + pin228: "power", + pin229: "power", + pin234: "power", + pin239: "ground", + pin252: "power", + pin253: "power", + pin254: "power", + pin259: "power", + pin260: "power", + pin261: "power", + pin271: "power", + pin272: "power", + pin274: "ground", + pin281: "power", + pin282: "power", + pin283: "power", + pin284: "power", + pin292: "ground", + pin293: "power", + pin295: "power", + pin296: "power", + pin300: "power", + pin310: "power", + pin311: "power", + pin312: "power", + pin313: "power", + pin327: "power", + pin328: "power", + pin329: "power", + pin330: "power", + pin331: "ground", + pin343: "power", +} as const; + +const pinAttributes = { + pin1: { + doNotConnect: true, + }, + pin359: { + requiresPower: true, + }, + pin360: { + requiresPower: true, + }, + pin374: { + requiresPower: true, + }, + pin375: { + requiresGround: true, + }, + pin407: { + doNotConnect: true, + }, + pin18: { + doNotConnect: true, + }, + pin81: { + requiresPower: true, + }, + pin93: { + requiresPower: true, + }, + pin94: { + requiresPower: true, + }, + pin95: { + requiresPower: true, + }, + pin96: { + requiresPower: true, + }, + pin97: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin110: { + requiresPower: true, + }, + pin111: { + requiresPower: true, + }, + pin112: { + requiresPower: true, + }, + pin113: { + requiresPower: true, + }, + pin115: { + requiresPower: true, + }, + pin124: { + requiresPower: true, + }, + pin125: { + requiresPower: true, + }, + pin126: { + requiresPower: true, + }, + pin127: { + requiresGround: true, + }, + pin128: { + requiresPower: true, + }, + pin129: { + requiresPower: true, + }, + pin130: { + requiresGround: true, + }, + pin132: { + requiresGround: true, + }, + pin140: { + requiresPower: true, + }, + pin141: { + requiresPower: true, + }, + pin142: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin145: { + requiresGround: true, + }, + pin148: { + requiresGround: true, + }, + pin151: { + requiresPower: true, + }, + pin152: { + requiresPower: true, + }, + pin162: { + requiresPower: true, + }, + pin163: { + requiresPower: true, + }, + pin164: { + requiresPower: true, + }, + pin169: { + requiresPower: true, + }, + pin170: { + requiresPower: true, + }, + pin171: { + requiresPower: true, + }, + pin179: { + requiresGround: true, + }, + pin184: { + requiresPower: true, + }, + pin185: { + requiresPower: true, + }, + pin194: { + requiresPower: true, + }, + pin195: { + requiresPower: true, + }, + pin196: { + requiresPower: true, + }, + pin200: { + requiresPower: true, + }, + pin202: { + requiresPower: true, + }, + pin203: { + requiresPower: true, + }, + pin205: { + requiresPower: true, + }, + pin206: { + requiresPower: true, + }, + pin207: { + requiresPower: true, + }, + pin216: { + requiresPower: true, + }, + pin217: { + requiresPower: true, + }, + pin218: { + requiresPower: true, + }, + pin227: { + requiresPower: true, + }, + pin228: { + requiresPower: true, + }, + pin229: { + requiresPower: true, + }, + pin234: { + requiresPower: true, + }, + pin239: { + requiresGround: true, + }, + pin252: { + requiresPower: true, + }, + pin253: { + requiresPower: true, + }, + pin254: { + requiresPower: true, + }, + pin259: { + requiresPower: true, + }, + pin260: { + requiresPower: true, + }, + pin261: { + requiresPower: true, + }, + pin271: { + requiresPower: true, + }, + pin272: { + requiresPower: true, + }, + pin274: { + requiresGround: true, + }, + pin281: { + requiresPower: true, + }, + pin282: { + requiresPower: true, + }, + pin283: { + requiresPower: true, + }, + pin284: { + requiresPower: true, + }, + pin292: { + requiresGround: true, + }, + pin293: { + requiresPower: true, + }, + pin295: { + requiresPower: true, + }, + pin296: { + requiresPower: true, + }, + pin300: { + requiresPower: true, + }, + pin310: { + requiresPower: true, + }, + pin311: { + requiresPower: true, + }, + pin312: { + requiresPower: true, + }, + pin313: { + requiresPower: true, + }, + pin327: { + requiresPower: true, + }, + pin328: { + requiresPower: true, + }, + pin329: { + requiresPower: true, + }, + pin330: { + requiresPower: true, + }, + pin331: { + requiresGround: true, + }, + pin343: { + requiresPower: true, + }, +} as const; + +export const DM3730CUSD100 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2860216.obj?uuid=ff9160f0bf8c4c56bd347139de0cf38b", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2860216.step?uuid=ff9160f0bf8c4c56bd347139de0cf38b", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.649999 }, + }} + {...props} + /> + ); +}; + +export default DM3730CUSD100; diff --git a/lib/chips/DP83822HRHBT.circuit.tsx b/lib/chips/DP83822HRHBT.circuit.tsx new file mode 100644 index 00000000..549c05c8 --- /dev/null +++ b/lib/chips/DP83822HRHBT.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["TX_CLK"], + pin3: ["pin3"], + pin4: ["TX_D0"], + pin5: ["TX_D1"], + pin6: ["TX_D2"], + pin7: ["TX_D3"], + pin8: ["pin8"], + pin9: ["RD_M"], + pin10: ["RD_P"], + pin11: ["TD_M"], + pin12: ["TD_P"], + pin13: ["NC1"], + pin14: ["AVD"], + pin15: ["NC2"], + pin16: ["RBIAS"], + pin17: ["LED_0"], + pin18: ["RESET_N"], + pin19: ["MDIO"], + pin20: ["MDC"], + pin21: ["VDDIO"], + pin22: ["XO"], + pin23: ["XI"], + pin24: ["pin24"], + pin25: ["RX_CLK"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["RX_ER"], + pin29: ["pin29"], + pin30: ["RX_D0"], + pin31: ["RX_D1"], + pin32: ["RX_D2"], + pin33: ["GND"], +} as const; + +const pinAttributes = { + pin13: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin33: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const DP83822HRHBT = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83822HRHBT; diff --git a/lib/chips/DP83822IRHBR.circuit.tsx b/lib/chips/DP83822IRHBR.circuit.tsx new file mode 100644 index 00000000..403079bd --- /dev/null +++ b/lib/chips/DP83822IRHBR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["TX_CLK"], + pin3: ["pin3"], + pin4: ["TX_D0"], + pin5: ["TX_D1"], + pin6: ["TX_D2"], + pin7: ["TX_D3"], + pin8: ["pin8"], + pin9: ["RD_M"], + pin10: ["RD_P"], + pin11: ["TD_M"], + pin12: ["TD_P"], + pin13: ["NC1"], + pin14: ["AVD"], + pin15: ["NC2"], + pin16: ["RBIAS"], + pin17: ["LED_0"], + pin18: ["RESET_N"], + pin19: ["MDIO"], + pin20: ["MDC"], + pin21: ["VDDIO"], + pin22: ["XO"], + pin23: ["XI"], + pin24: ["pin24"], + pin25: ["RX_CLK"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["RX_ER"], + pin29: ["pin29"], + pin30: ["RX_D0"], + pin31: ["RX_D1"], + pin32: ["RX_D2"], + pin33: ["GND"], +} as const; + +const pinAttributes = { + pin13: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin33: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const DP83822IRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83822IRHBR; diff --git a/lib/chips/DP83825IRMQT.circuit.tsx b/lib/chips/DP83825IRMQT.circuit.tsx new file mode 100644 index 00000000..0128814a --- /dev/null +++ b/lib/chips/DP83825IRMQT.circuit.tsx @@ -0,0 +1,345 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TX_EN"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["LED0"], + pin5: ["RST_N"], + pin6: ["VDDA3V3"], + pin7: ["RD_M"], + pin8: ["RD_P"], + pin9: ["GND2"], + pin10: ["TD_M"], + pin11: ["TD_P"], + pin12: ["XO"], + pin13: ["pin13"], + pin14: ["RBIAS"], + pin15: ["MDIO"], + pin16: ["MDC"], + pin17: ["RX_D1"], + pin18: ["RX_D0"], + pin19: ["VDDIO"], + pin20: ["CRS_DV"], + pin21: ["GND1"], + pin22: ["RX_ER"], + pin23: ["TX_D0"], + pin24: ["TX_D1"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, + pin21: { requiresGround: true }, +} as const; + +export const DP83825IRMQT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default DP83825IRMQT; diff --git a/lib/chips/DP83826AERHBR.circuit.tsx b/lib/chips/DP83826AERHBR.circuit.tsx new file mode 100644 index 00000000..01ae2879 --- /dev/null +++ b/lib/chips/DP83826AERHBR.circuit.tsx @@ -0,0 +1,97 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MODESELECT", "1"], + pin2: ["CEXT", "2"], + pin3: ["VDDA3V3", "3"], + pin4: ["RD_M", "4"], + pin5: ["RD_P", "5"], + pin6: ["TD_M", "6"], + pin7: ["TD_P", "7"], + pin8: ["XO", "8"], + pin9: ["XI", "50MHZIN", "9"], + pin10: ["RBIAS", "10"], + pin11: ["MDIO", "11"], + pin12: ["MDC", "12"], + pin13: ["RX_D3", "13"], + pin14: ["RX_D2", "14"], + pin15: ["RX_D1", "15"], + pin16: ["RX_D0", "16"], + pin17: ["VDDIO", "17"], + pin18: ["RX_DV", "CRS_DV", "18"], + pin19: ["RX_CLK", "50MHZ_RMII", "19"], + pin20: ["RX_ER", "20"], + pin21: ["PWRDN", "INT", "21"], + pin22: ["TX_CLK", "22"], + pin23: ["TX_EN", "23"], + pin24: ["TX_D0", "24"], + pin25: ["TX_D1", "25"], + pin26: ["TX_D2", "26"], + pin27: ["TX_D3", "27"], + pin28: ["COL", "LED2", "TX_ER", "GPIO", "28"], + pin29: ["CRS", "LED3", "29"], + pin30: ["LED0", "30"], + pin31: ["CLKOUT", "LED1", "31"], + pin32: ["RST_N", "32"], + pin33: ["THERMAL_PAD", "33"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "control", + pin3: "power", + pin4: "unknown", + pin5: "unknown", + pin6: "unknown", + pin7: "unknown", + pin8: "unknown", + pin9: "unknown", + pin10: "unknown", + pin11: "bidirectional", + pin12: "input", + pin13: "output", + pin14: "output", + pin15: "output", + pin16: "output", + pin17: "power", + pin18: "output", + pin19: "output", + pin20: "output", + pin21: "bidirectional", + pin22: "output", + pin23: "control", + pin24: "input", + pin25: "input", + pin26: "input", + pin27: "input", + pin28: "output", + pin29: "output", + pin30: "output", + pin31: "output", + pin32: "control", + pin33: "ground", +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresPower: true }, + pin17: { requiresPower: true }, + pin33: { requiresGround: true }, +} as const; + +export const DP83826AERHBR = (props: ChipProps) => { + // Footprint provenance: TI drawing RHB0032M; donor DP83826IRHBR (JLCPCB C3225658) + return ( + + ); +}; + +export default DP83826AERHBR; diff --git a/lib/chips/DP83826AIRHBR.circuit.tsx b/lib/chips/DP83826AIRHBR.circuit.tsx new file mode 100644 index 00000000..50a8e84f --- /dev/null +++ b/lib/chips/DP83826AIRHBR.circuit.tsx @@ -0,0 +1,72 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ModeSelect"], + pin2: ["CEXT"], + pin3: ["VDDA3V3"], + pin4: ["RD_M"], + pin5: ["RD_P"], + pin6: ["TD_M"], + pin7: ["TD_P"], + pin8: ["XO"], + pin9: ["pin9"], + pin10: ["RBIAS"], + pin11: ["MDIO"], + pin12: ["MDC"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["VDDIO"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["TX_EN"], + pin24: ["TX_D0"], + pin25: ["TX_D1"], + pin26: ["TX_D2"], + pin27: ["TX_D23"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["RST_N"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const DP83826AIRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83826AIRHBR; diff --git a/lib/chips/DP83826IRHBR.circuit.tsx b/lib/chips/DP83826IRHBR.circuit.tsx new file mode 100644 index 00000000..6f075600 --- /dev/null +++ b/lib/chips/DP83826IRHBR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ModeSelect"], + pin2: ["CEXT"], + pin3: ["VDDA3V3"], + pin4: ["RD_M"], + pin5: ["RD_P"], + pin6: ["TD_M"], + pin7: ["TD_P"], + pin8: ["XO"], + pin9: ["pin9"], + pin10: ["RBIAS"], + pin11: ["MDIO"], + pin12: ["MDC"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["VDDIO"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["TX_EN"], + pin24: ["TX_D0"], + pin25: ["TX_D1"], + pin26: ["TX_D2"], + pin27: ["TX_D3"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["RST_N"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const DP83826IRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83826IRHBR; diff --git a/lib/chips/DP83867CRRGZR.circuit.tsx b/lib/chips/DP83867CRRGZR.circuit.tsx new file mode 100644 index 00000000..991f12a3 --- /dev/null +++ b/lib/chips/DP83867CRRGZR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TD_P_A"], + pin2: ["TD_M_A"], + pin3: ["VDDA2P52"], + pin4: ["TD_P_B"], + pin5: ["TD_M_B"], + pin6: ["VDD1P04"], + pin7: ["TD_P_C"], + pin8: ["TD_M_C"], + pin9: ["VDDA2P51"], + pin10: ["TD_P_D"], + pin11: ["TD_M_D"], + pin12: ["RBIAS"], + pin13: ["VDDA1P82"], + pin14: ["X_O"], + pin15: ["X_I"], + pin16: ["MDC"], + pin17: ["MDIO"], + pin18: ["CLK_OUT"], + pin19: ["VDDIO3"], + pin20: ["JTAG_CLK"], + pin21: ["JTAG_TDO"], + pin22: ["JTAG_TMS"], + pin23: ["JTAG_TDI"], + pin24: ["VDD1P03"], + pin25: ["TX_D3"], + pin26: ["TX_D2"], + pin27: ["TX_D1"], + pin28: ["TX_D0"], + pin29: ["GTX_CLK"], + pin30: ["VDDIO2"], + pin31: ["VDD1P02"], + pin32: ["RX_CLK"], + pin33: ["RX_D0"], + pin34: ["RX_D1"], + pin35: ["RX_D2"], + pin36: ["RX_D3"], + pin37: ["TX_CTRL"], + pin38: ["RX_CTRL"], + pin39: ["GPIO_0"], + pin40: ["GPIO_1"], + pin41: ["VDDIO1"], + pin42: ["VDD1P01"], + pin43: ["RESET_N"], + pin44: ["pin44"], + pin45: ["LED_2"], + pin46: ["LED_1"], + pin47: ["LED_0"], + pin48: ["VDDA1P81"], + pin49: ["pin49"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const DP83867CRRGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83867CRRGZR; diff --git a/lib/chips/DP83867ERGZR.circuit.tsx b/lib/chips/DP83867ERGZR.circuit.tsx new file mode 100644 index 00000000..78526bbc --- /dev/null +++ b/lib/chips/DP83867ERGZR.circuit.tsx @@ -0,0 +1,89 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TD_P_A"], + pin2: ["TD_M_A"], + pin3: ["VDDA2P52"], + pin4: ["TD_P_B"], + pin5: ["TD_M_B"], + pin6: ["VDD1P04"], + pin7: ["TD_P_C"], + pin8: ["TD_M_C"], + pin9: ["VDDA2P51"], + pin10: ["TD_P_D"], + pin11: ["TD_M_D"], + pin12: ["RBIAS"], + pin13: ["VDDA1P82"], + pin14: ["XO"], + pin15: ["XI"], + pin16: ["MDC"], + pin17: ["MDIO"], + pin18: ["CLK_OUT"], + pin19: ["VDDIO3"], + pin20: ["JTAG_CLK"], + pin21: ["JTAG_TDO"], + pin22: ["JTAG_TMS"], + pin23: ["JTAG_TDI"], + pin24: ["VDD1P03"], + pin25: ["TX_D3"], + pin26: ["TX_D2"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["GTX_CLK"], + pin30: ["VDDIO2"], + pin31: ["VDD1P02"], + pin32: ["RX_CLK"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["TX_CTRL"], + pin38: ["RX_CTRL"], + pin39: ["GPIO_0"], + pin40: ["GPIO_1"], + pin41: ["VDDIO1"], + pin42: ["VDD1P01"], + pin43: ["RESET_N"], + pin44: ["pin44"], + pin45: ["LED_2"], + pin46: ["LED_1"], + pin47: ["LED_0"], + pin48: ["VDDA1P81"], + pin49: ["GND"], +} as const; + +const pinAttributes = { + pin49: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const DP83867ERGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83867ERGZR; diff --git a/lib/chips/DP83867IRRGZT.circuit.tsx b/lib/chips/DP83867IRRGZT.circuit.tsx new file mode 100644 index 00000000..db6e7f08 --- /dev/null +++ b/lib/chips/DP83867IRRGZT.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TD_P_A"], + pin2: ["TD_M_A"], + pin3: ["VDDA2P52"], + pin4: ["TD_P_B"], + pin5: ["TD_M_B"], + pin6: ["VDD1P04"], + pin7: ["TD_P_C"], + pin8: ["TD_M_C"], + pin9: ["VDDA2P51"], + pin10: ["TD_P_D"], + pin11: ["TD_M_D"], + pin12: ["RBIAS"], + pin13: ["VDDA1P82"], + pin14: ["X_O"], + pin15: ["X_I"], + pin16: ["MDC"], + pin17: ["MDIO"], + pin18: ["CLK_OUT"], + pin19: ["VDDIO3"], + pin20: ["JTAG_CLK"], + pin21: ["JTAG_TDO"], + pin22: ["JTAG_TMS"], + pin23: ["JTAG_TDI"], + pin24: ["VDD1P03"], + pin25: ["TX_D3"], + pin26: ["TX_D2"], + pin27: ["TX_D1"], + pin28: ["TX_D0"], + pin29: ["GTX_CLK"], + pin30: ["VDDIO2"], + pin31: ["VDD1P02"], + pin32: ["RX_CLK"], + pin33: ["RX_D0"], + pin34: ["RX_D1"], + pin35: ["RX_D2"], + pin36: ["RX_D3"], + pin37: ["TX_CTRL"], + pin38: ["RX_CTRL"], + pin39: ["GPIO_0"], + pin40: ["GPIO_1"], + pin41: ["VDDIO1"], + pin42: ["VDD1P01"], + pin43: ["RESET_N"], + pin44: ["pin44"], + pin45: ["LED_2"], + pin46: ["LED_1"], + pin47: ["LED_0"], + pin48: ["VDDA1P81"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const DP83867IRRGZT = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83867IRRGZT; diff --git a/lib/chips/DP83867ISRGZT.circuit.tsx b/lib/chips/DP83867ISRGZT.circuit.tsx new file mode 100644 index 00000000..45da93fb --- /dev/null +++ b/lib/chips/DP83867ISRGZT.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TD_P_A"], + pin2: ["TD_M_A"], + pin3: ["VDDA2P52"], + pin4: ["TD_P_B"], + pin5: ["TD_M_B"], + pin6: ["VDD1P04"], + pin7: ["TD_P_C"], + pin8: ["TD_M_C"], + pin9: ["VDDA2P51"], + pin10: ["TD_P_D"], + pin11: ["TD_M_D"], + pin12: ["RBIAS"], + pin13: ["VDDA1P82"], + pin14: ["XO"], + pin15: ["XI"], + pin16: ["MDC"], + pin17: ["MDIO"], + pin18: ["CLK_OUT"], + pin19: ["VDDIO3"], + pin20: ["JTAG_CLK"], + pin21: ["JTAG_TDO"], + pin22: ["JTAG_TMS"], + pin23: ["JTAG_TDI"], + pin24: ["VDD1P03"], + pin25: ["TX_D3"], + pin26: ["TX_D2"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["GTX_CLK"], + pin30: ["VDDIO2"], + pin31: ["VDD1P02"], + pin32: ["RX_CLK"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["TX_CTRL"], + pin38: ["RX_CTRL"], + pin39: ["GPIO_0"], + pin40: ["GPIO_1"], + pin41: ["VDDIO1"], + pin42: ["VDD1P01"], + pin43: ["RESET_N"], + pin44: ["pin44"], + pin45: ["LED_2"], + pin46: ["LED_1"], + pin47: ["LED_0"], + pin48: ["VDDA1P81"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const DP83867ISRGZT = (props: ChipProps) => { + return ( + + ); +}; + +export default DP83867ISRGZT; diff --git a/lib/chips/DRV110APWR.circuit.tsx b/lib/chips/DRV110APWR.circuit.tsx new file mode 100644 index 00000000..0dd8daea --- /dev/null +++ b/lib/chips/DRV110APWR.circuit.tsx @@ -0,0 +1,262 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC1"], + pin2: ["KEEP"], + pin3: ["PEAK"], + pin4: ["HOLD"], + pin5: ["OSC"], + pin6: ["NC2"], + pin7: ["VIN"], + pin8: ["GND"], + pin9: ["SENSE"], + pin10: ["NC3"], + pin11: ["OUT"], + pin12: ["STATUS"], + pin13: ["EN"], + pin14: ["NC4"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin6: { doNotConnect: true }, + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, + pin10: { doNotConnect: true }, + pin14: { doNotConnect: true }, +} as const; + +export const DRV110APWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2653796.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2653796.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default DRV110APWR; diff --git a/lib/chips/DRV2605YZFR.circuit.tsx b/lib/chips/DRV2605YZFR.circuit.tsx new file mode 100644 index 00000000..f0bf7be3 --- /dev/null +++ b/lib/chips/DRV2605YZFR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN", "A1"], + pin4: ["REG", "A2"], + pin7: ["OUT_P", "A3"], + pin2: ["IN_TRIG", "B1"], + pin5: ["SDA", "B2"], + pin8: ["GND", "B3"], + pin3: ["SCL", "C1"], + pin9: ["OUT_N", "C3"], + pin6: ["VDD", "C2"], +} as const; + +const pinRoles = { + pin1: "input", + pin4: "output", + pin7: "output", + pin2: "input", + pin5: "bidirectional", + pin8: "ground", + pin3: "input", + pin9: "output", + pin6: "power", +} as const; + +const pinAttributes = { + pin8: { + requiresGround: true, + }, + pin6: { + requiresPower: true, + }, +} as const; + +export const DRV2605YZFR = (props: ChipProps) => { + return ( + + ); +}; + +export default DRV2605YZFR; diff --git a/lib/chips/DRV2667RGPR.circuit.tsx b/lib/chips/DRV2667RGPR.circuit.tsx new file mode 100644 index 00000000..792b73db --- /dev/null +++ b/lib/chips/DRV2667RGPR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PUMP"], + pin2: ["VDD"], + pin3: ["FB"], + pin4: ["GND2"], + pin5: ["GND3"], + pin6: ["GND1"], + pin7: ["SW1"], + pin8: ["SW2"], + pin9: ["NC"], + pin10: ["BST1"], + pin11: ["BST2"], + pin12: ["PVDD"], + pin13: ["OUT_POS"], + pin14: ["OUT_NEG"], + pin15: ["REXT"], + pin16: ["IN_NEG"], + pin17: ["IN_POS"], + pin18: ["SCL"], + pin19: ["SDA"], + pin20: ["REG"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin6: { requiresGround: true }, + pin9: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const DRV2667RGPR = (props: ChipProps) => { + return ( + + ); +}; + +export default DRV2667RGPR; diff --git a/lib/chips/DRV3256EPAPRQ1.circuit.tsx b/lib/chips/DRV3256EPAPRQ1.circuit.tsx new file mode 100644 index 00000000..c79b91e2 --- /dev/null +++ b/lib/chips/DRV3256EPAPRQ1.circuit.tsx @@ -0,0 +1,691 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SDO", "1"], + pin2: ["INHA", "2"], + pin3: ["INLA", "3"], + pin4: ["INHB", "4"], + pin5: ["INLB", "5"], + pin6: ["INHC", "6"], + pin7: ["INLC", "7"], + pin8: ["ASCSEL", "8"], + pin9: ["ASCIN_N", "9"], + pin10: ["DRVOFF", "10"], + pin11: ["VDDIO", "11"], + pin12: ["DVDD", "12"], + pin13: ["FAULT1_N", "13"], + pin14: ["SLEEP_N", "14"], + pin15: ["PVDDS", "15"], + pin16: ["PVDDG", "16"], + pin17: ["PVDD", "17"], + pin18: ["GND", "18"], + pin19: ["CPL", "19"], + pin20: ["CPH", "20"], + pin21: ["NC", "21", "NC_21"], + pin22: ["NC", "22", "NC_22"], + pin23: ["DHCP", "23"], + pin24: ["NC", "24", "NC_24"], + pin25: ["BSTA", "25"], + pin26: ["SHA", "26"], + pin27: ["GHA", "27"], + pin28: ["DHA", "28"], + pin29: ["SPA", "29"], + pin30: ["SNA", "30"], + pin31: ["GLA", "31"], + pin32: ["SLA", "32"], + pin33: ["VGLA", "33"], + pin34: ["GLB", "34"], + pin35: ["SLB", "35"], + pin36: ["VGLB", "36"], + pin37: ["SNB", "37"], + pin38: ["SPB", "38"], + pin39: ["DHB", "39"], + pin40: ["BSTB", "40"], + pin41: ["SHB", "41"], + pin42: ["GHB", "42"], + pin43: ["NC", "43", "NC_43"], + pin44: ["VGLC", "44"], + pin45: ["SLC", "45"], + pin46: ["GLC", "46"], + pin47: ["SNC", "47"], + pin48: ["SPC", "48"], + pin49: ["DHC", "49"], + pin50: ["BSTC", "50"], + pin51: ["SHC", "51"], + pin52: ["GHC", "52"], + pin53: ["FAULT2_N", "53"], + pin54: ["SOC", "54"], + pin55: ["SOB", "55"], + pin56: ["SOA", "56"], + pin57: ["AREF", "57"], + pin58: ["AGND", "58"], + pin59: ["PHCA", "59"], + pin60: ["PHCB", "60"], + pin61: ["PHCC", "61"], + pin62: ["SDI", "62"], + pin63: ["SCLK", "63"], + pin64: ["SCS_N", "64"], + pin65: ["THERMAL_PAD", "65"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "unknown", + pin9: "unknown", + pin10: "output", + pin11: "power", + pin12: "power", + pin13: "output", + pin14: "control", + pin15: "power", + pin16: "power", + pin17: "power", + pin18: "ground", + pin19: "unknown", + pin20: "unknown", + pin21: "no-connect", + pin22: "no-connect", + pin23: "unknown", + pin24: "no-connect", + pin25: "unknown", + pin26: "unknown", + pin27: "unknown", + pin28: "unknown", + pin29: "unknown", + pin30: "unknown", + pin31: "unknown", + pin32: "unknown", + pin33: "unknown", + pin34: "unknown", + pin35: "unknown", + pin36: "unknown", + pin37: "unknown", + pin38: "unknown", + pin39: "unknown", + pin40: "unknown", + pin41: "unknown", + pin42: "unknown", + pin43: "no-connect", + pin44: "unknown", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "unknown", + pin53: "output", + pin54: "unknown", + pin55: "unknown", + pin56: "unknown", + pin57: "unknown", + pin58: "ground", + pin59: "unknown", + pin60: "unknown", + pin61: "unknown", + pin62: "input", + pin63: "control", + pin64: "unknown", + pin65: "thermal", +} as const; + +const pinAttributes = { + pin11: { requiresPower: true }, + pin12: { requiresPower: true }, + pin15: { requiresPower: true }, + pin16: { requiresPower: true }, + pin17: { requiresPower: true }, + pin18: { requiresGround: true }, + pin21: { doNotConnect: true }, + pin22: { doNotConnect: true }, + pin24: { doNotConnect: true }, + pin43: { doNotConnect: true }, + pin58: { requiresGround: true }, +} as const; + +export const DRV3256EPAPRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing PAP0064N; official source https://www.ti.com/lit/gpn/DRV3256-Q1 pages 16 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default DRV3256EPAPRQ1; diff --git a/lib/chips/DRV5013ADELPGMQ1.circuit.tsx b/lib/chips/DRV5013ADELPGMQ1.circuit.tsx new file mode 100644 index 00000000..444925d5 --- /dev/null +++ b/lib/chips/DRV5013ADELPGMQ1.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["GND"], + pin3: ["VOUT"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const DRV5013ADELPGMQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default DRV5013ADELPGMQ1; diff --git a/lib/chips/DRV5013AGQLPG.circuit.tsx b/lib/chips/DRV5013AGQLPG.circuit.tsx new file mode 100644 index 00000000..fa490664 --- /dev/null +++ b/lib/chips/DRV5013AGQLPG.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["GND"], + pin3: ["OUT"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const DRV5013AGQLPG = (props: ChipProps) => { + return ( + + ); +}; + +export default DRV5013AGQLPG; diff --git a/lib/chips/DRV8263HQVAKRQ1.circuit.tsx b/lib/chips/DRV8263HQVAKRQ1.circuit.tsx new file mode 100644 index 00000000..6376576b --- /dev/null +++ b/lib/chips/DRV8263HQVAKRQ1.circuit.tsx @@ -0,0 +1,274 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["nFAULT"], + pin2: ["IPROPI"], + pin3: ["nSLEEP"], + pin4: ["VM"], + pin5: ["OUT2"], + pin6: ["GND"], + pin7: ["OUT1"], + pin8: ["DRVOFF"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["VDD"], + pin12: ["DIAG"], + pin13: ["SR"], + pin14: ["ITRIP"], + pin15: ["MODE"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin11: { requiresPower: true }, +} as const; + +export const DRV8263HQVAKRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C51831427.obj?uuid=eb14473efb8b43ac867369bf91ecdb53", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C51831427.step?uuid=eb14473efb8b43ac867369bf91ecdb53", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000012700000070253736, + y: -0.019913600000109, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default DRV8263HQVAKRQ1; diff --git a/lib/chips/DRV83053QPHPRQ1.circuit.tsx b/lib/chips/DRV83053QPHPRQ1.circuit.tsx new file mode 100644 index 00000000..bc32215b --- /dev/null +++ b/lib/chips/DRV83053QPHPRQ1.circuit.tsx @@ -0,0 +1,91 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN_GATE"], + pin2: ["INHA"], + pin3: ["INLA"], + pin4: ["INHB"], + pin5: ["INLB"], + pin6: ["INHC"], + pin7: ["INLC"], + pin8: ["nFAULT"], + pin9: ["nSCS"], + pin10: ["SDI"], + pin11: ["SDO"], + pin12: ["SCLK"], + pin13: ["PWRGD"], + pin14: ["GND3"], + pin15: ["AVDD"], + pin16: ["SO1"], + pin17: ["SO2"], + pin18: ["SO3"], + pin19: ["SN3"], + pin20: ["SP3"], + pin21: ["SN2"], + pin22: ["SP2"], + pin23: ["SN1"], + pin24: ["SP1"], + pin25: ["GLC"], + pin26: ["SLC"], + pin27: ["SHC"], + pin28: ["GHC"], + pin29: ["GHB"], + pin30: ["SHB"], + pin31: ["SLB"], + pin32: ["GLB"], + pin33: ["GLA"], + pin34: ["SLA"], + pin35: ["SHA"], + pin36: ["GHA"], + pin37: ["VCP_LSD"], + pin38: ["VCPH"], + pin39: ["CP2H"], + pin40: ["CP2L"], + pin41: ["PVDD"], + pin42: ["CP1L"], + pin43: ["CP1H"], + pin44: ["VDRAIN"], + pin45: ["GND2"], + pin46: ["DVDD"], + pin47: ["WAKE"], + pin48: ["VREG"], + pin49: ["GND1"], +} as const; + +const pinAttributes = { + pin14: { requiresGround: true }, + pin45: { requiresGround: true }, + pin49: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const DRV83053QPHPRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default DRV83053QPHPRQ1; diff --git a/lib/chips/DRV8363QRGZRQ1.circuit.tsx b/lib/chips/DRV8363QRGZRQ1.circuit.tsx new file mode 100644 index 00000000..af9d557b --- /dev/null +++ b/lib/chips/DRV8363QRGZRQ1.circuit.tsx @@ -0,0 +1,525 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GLC", "1"], + pin2: ["SLC", "2"], + pin3: ["SPA", "3"], + pin4: ["SNA", "4"], + pin5: ["SPB", "5"], + pin6: ["SNB", "6"], + pin7: ["SPC", "7"], + pin8: ["SNC", "8"], + pin9: ["DRVOFF", "9"], + pin10: ["AGND", "10"], + pin11: ["INHA", "11"], + pin12: ["INLA", "12"], + pin13: ["INHB", "13"], + pin14: ["INLB", "14"], + pin15: ["INHC", "15"], + pin16: ["INLC", "16"], + pin17: ["SDO", "17"], + pin18: ["SDI", "18"], + pin19: ["SCLK", "19"], + pin20: ["NSCS", "20"], + pin21: ["NSLEEP", "21"], + pin22: ["NFAULT", "22"], + pin23: ["VREF", "23"], + pin24: ["SOC", "24"], + pin25: ["SOB", "25"], + pin26: ["SOA", "26"], + pin27: ["GND", "27"], + pin28: ["DVDD", "28"], + pin29: ["ASCIN", "29"], + pin30: ["GVDD", "30"], + pin31: ["NC", "31"], + pin32: ["CPTL", "32"], + pin33: ["CPTH", "33"], + pin34: ["VCP", "34"], + pin35: ["VDRAIN", "35"], + pin36: ["BSTA", "36"], + pin37: ["SHA", "37"], + pin38: ["GHA", "38"], + pin39: ["GLA", "39"], + pin40: ["SLA", "40"], + pin41: ["SLB", "41"], + pin42: ["GLB", "42"], + pin43: ["GHB", "43"], + pin44: ["SHB", "44"], + pin45: ["BSTB", "45"], + pin46: ["BSTC", "46"], + pin47: ["SHC", "47"], + pin48: ["GHC", "48"], + pin49: ["THERMAL_PAD", "49"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "ground", + pin11: "input", + pin12: "input", + pin13: "input", + pin14: "input", + pin15: "input", + pin16: "input", + pin17: "output", + pin18: "input", + pin19: "control", + pin20: "input", + pin21: "input", + pin22: "unknown", + pin23: "power", + pin24: "output", + pin25: "output", + pin26: "output", + pin27: "ground", + pin28: "power", + pin29: "input", + pin30: "unknown", + pin31: "no-connect", + pin32: "unknown", + pin33: "unknown", + pin34: "unknown", + pin35: "unknown", + pin36: "output", + pin37: "input", + pin38: "output", + pin39: "output", + pin40: "input", + pin41: "input", + pin42: "output", + pin43: "output", + pin44: "input", + pin45: "output", + pin46: "output", + pin47: "input", + pin48: "output", + pin49: "thermal", +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, + pin23: { requiresPower: true }, + pin27: { requiresGround: true }, + pin28: { requiresPower: true }, + pin31: { doNotConnect: true }, +} as const; + +export const DRV8363QRGZRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing RGZ0048M; official source https://www.ti.com/lit/gpn/DRV8363-Q1 pages 101 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default DRV8363QRGZRQ1; diff --git a/lib/chips/DS90LT012ATMF_NOPB.circuit.tsx b/lib/chips/DS90LT012ATMF_NOPB.circuit.tsx new file mode 100644 index 00000000..f94248cf --- /dev/null +++ b/lib/chips/DS90LT012ATMF_NOPB.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["pin5"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const DS90LT012ATMF_NOPB = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130171.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130171.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default DS90LT012ATMF_NOPB; diff --git a/lib/chips/DS90LV011ATMF_NOPB.circuit.tsx b/lib/chips/DS90LV011ATMF_NOPB.circuit.tsx new file mode 100644 index 00000000..da956ec1 --- /dev/null +++ b/lib/chips/DS90LV011ATMF_NOPB.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["OUT_NEG"], + pin4: ["OUT_POS"], + pin5: ["pin5"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const DS90LV011ATMF_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default DS90LV011ATMF_NOPB; diff --git a/lib/chips/DS90LV047ATMX_NOPB.circuit.tsx b/lib/chips/DS90LV047ATMX_NOPB.circuit.tsx new file mode 100644 index 00000000..6671a5a8 --- /dev/null +++ b/lib/chips/DS90LV047ATMX_NOPB.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["DIN1"], + pin3: ["DIN2"], + pin4: ["VCC"], + pin5: ["GND"], + pin6: ["DIN3"], + pin7: ["DIN4"], + pin8: ["pin8"], + pin9: ["DOUT4_NEG"], + pin10: ["DOUT4_POS"], + pin11: ["DOUT3_POS"], + pin12: ["DOUT3_NEG"], + pin13: ["DOUT2_NEG"], + pin14: ["DOUT2_POS"], + pin15: ["DOUT1_POS"], + pin16: ["DOUT1_NEG"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const DS90LV047ATMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default DS90LV047ATMX_NOPB; diff --git a/lib/chips/DS90LV048ATMX_NOPB.circuit.tsx b/lib/chips/DS90LV048ATMX_NOPB.circuit.tsx new file mode 100644 index 00000000..9c207918 --- /dev/null +++ b/lib/chips/DS90LV048ATMX_NOPB.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["RIN1_POS"], + pin3: ["RIN2_POS"], + pin4: ["RIN2_NEG"], + pin5: ["RIN3_NEG"], + pin6: ["RIN3_POS"], + pin7: ["RIN4_POS"], + pin8: ["RIN4_NEG"], + pin9: ["pin9"], + pin10: ["ROUT4"], + pin11: ["ROUT3"], + pin12: ["GND"], + pin13: ["VCC"], + pin14: ["ROUT2"], + pin15: ["ROUT1"], + pin16: ["EN"], +} as const; + +const pinAttributes = { + pin12: { requiresGround: true }, + pin13: { requiresPower: true }, +} as const; + +export const DS90LV048ATMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default DS90LV048ATMX_NOPB; diff --git a/lib/chips/ESD122DMXR.circuit.tsx b/lib/chips/ESD122DMXR.circuit.tsx new file mode 100644 index 00000000..c68ace55 --- /dev/null +++ b/lib/chips/ESD122DMXR.circuit.tsx @@ -0,0 +1,94 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["IO1"], + pin3: ["IO2"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const ESD122DMXR = (props: ChipProps) => { + return ( + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544474.obj?uuid=73d3817547204e8794366a3a32e5dc7f", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544474.step?uuid=73d3817547204e8794366a3a32e5dc7f", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00005079999993995443, + y: -0.000012700000070253736, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default ESD122DMXR; diff --git a/lib/chips/ESD204DQAR.circuit.tsx b/lib/chips/ESD204DQAR.circuit.tsx new file mode 100644 index 00000000..b2836670 --- /dev/null +++ b/lib/chips/ESD204DQAR.circuit.tsx @@ -0,0 +1,194 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO1"], + pin2: ["IO2"], + pin3: ["GND2"], + pin4: ["IO3"], + pin5: ["IO4"], + pin6: ["NC1"], + pin7: ["NC2"], + pin8: ["GND1"], + pin9: ["NC3"], + pin10: ["NC4"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { doNotConnect: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { doNotConnect: true }, + pin10: { doNotConnect: true }, +} as const; + +export const ESD204DQAR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C553132.obj?uuid=df0eca6a71854020b6cf420855c3797f", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C553132.step?uuid=df0eca6a71854020b6cf420855c3797f", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.000012700000070253736, + y: 0.000012699999956566899, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default ESD204DQAR; diff --git a/lib/chips/ESD321DPYR.circuit.tsx b/lib/chips/ESD321DPYR.circuit.tsx new file mode 100644 index 00000000..e9846636 --- /dev/null +++ b/lib/chips/ESD321DPYR.circuit.tsx @@ -0,0 +1,37 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["GND"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const ESD321DPYR = (props: ChipProps) => { + return ( + + ); +}; + +export default ESD321DPYR; diff --git a/lib/chips/ESD351DPYR.circuit.tsx b/lib/chips/ESD351DPYR.circuit.tsx new file mode 100644 index 00000000..96ec94da --- /dev/null +++ b/lib/chips/ESD351DPYR.circuit.tsx @@ -0,0 +1,32 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["K"], + pin2: ["A"], +} as const; + +export const ESD351DPYR = (props: ChipProps) => { + return ( + + ); +}; + +export default ESD351DPYR; diff --git a/lib/chips/ESD401DPYR.circuit.tsx b/lib/chips/ESD401DPYR.circuit.tsx new file mode 100644 index 00000000..de9db41d --- /dev/null +++ b/lib/chips/ESD401DPYR.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO", "1", "IO_1"], + pin2: ["IO", "2", "IO_2"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", +} as const; + +const pinAttributes = {} as const; + +export const ESD401DPYR = (props: ChipProps) => { + return ( + + ); +}; + +export default ESD401DPYR; diff --git a/lib/chips/ESD751DYAR.circuit.tsx b/lib/chips/ESD751DYAR.circuit.tsx new file mode 100644 index 00000000..becfd983 --- /dev/null +++ b/lib/chips/ESD751DYAR.circuit.tsx @@ -0,0 +1,32 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO", "1"], + pin2: ["GND", "2"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "ground", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const ESD751DYAR = (props: ChipProps) => { + // Footprint provenance: TI drawing DYA0002A; donor TPD1E10B06DYAR (JLCPCB C3712135) + return ( + + ); +}; + +export default ESD751DYAR; diff --git a/lib/chips/ESDS311DYFR.circuit.tsx b/lib/chips/ESDS311DYFR.circuit.tsx new file mode 100644 index 00000000..b885ca6a --- /dev/null +++ b/lib/chips/ESDS311DYFR.circuit.tsx @@ -0,0 +1,32 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["K"], + pin2: ["A"], +} as const; + +export const ESDS311DYFR = (props: ChipProps) => { + return ( + + ); +}; + +export default ESDS311DYFR; diff --git a/lib/chips/F2800132PTR.circuit.tsx b/lib/chips/F2800132PTR.circuit.tsx new file mode 100644 index 00000000..d21931b0 --- /dev/null +++ b/lib/chips/F2800132PTR.circuit.tsx @@ -0,0 +1,88 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["pin2"], + pin3: ["XRSn"], + pin4: ["A6C6GPIO226GPIO228"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["A1"], + pin11: ["pin11"], + pin12: ["VREFHI"], + pin13: ["VREFLO"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["VSSA"], + pin18: ["VDDA"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["VSS1"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["GPIO33"], + pin26: ["GPIO16"], + pin27: ["GPIO24"], + pin28: ["TCK"], + pin29: ["pin29"], + pin30: ["TMS"], + pin31: ["pin31"], + pin32: ["GPIO32"], + pin33: ["GPIO18_X2"], + pin34: ["GPIO19_X1"], + pin35: ["VDDIO1"], + pin36: ["VDD1"], + pin37: ["VSS2"], + pin38: ["GPIO4"], + pin39: ["GPIO3"], + pin40: ["GPIO2"], + pin41: ["GPIO1"], + pin42: ["GPIO0"], + pin43: ["GPIO7"], + pin44: ["VSS3"], + pin45: ["VDD2"], + pin46: ["VDDIO2"], + pin47: ["GPIO5"], + pin48: ["GPIO6"], +} as const; + +const pinAttributes = { + pin18: { requiresPower: true }, + pin22: { requiresGround: true }, + pin36: { requiresPower: true }, + pin37: { requiresGround: true }, + pin44: { requiresGround: true }, + pin45: { requiresPower: true }, +} as const; + +export const F2800132PTR = (props: ChipProps) => { + return ( + + ); +}; + +export default F2800132PTR; diff --git a/lib/chips/F2800133PMR.circuit.tsx b/lib/chips/F2800133PMR.circuit.tsx new file mode 100644 index 00000000..ade36278 --- /dev/null +++ b/lib/chips/F2800133PMR.circuit.tsx @@ -0,0 +1,98 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["pin2"], + pin3: ["XRSn"], + pin4: ["VDD1"], + pin5: ["VSS1"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["A1"], + pin15: ["pin15"], + pin16: ["VREFHI"], + pin17: ["VREFLO"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["VSSA"], + pin22: ["VDDA"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["VSS2"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["GPIO11"], + pin32: ["GPIO33"], + pin33: ["GPIO16"], + pin34: ["GPIO17"], + pin35: ["GPIO24"], + pin36: ["TCK"], + pin37: ["pin37"], + pin38: ["TMS"], + pin39: ["pin39"], + pin40: ["GPIO32"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["VDDIO1"], + pin44: ["VDD2"], + pin45: ["VSS3"], + pin46: ["GPIO39"], + pin47: ["GPIO8"], + pin48: ["GPIO4"], + pin49: ["GPIO3"], + pin50: ["GPIO2"], + pin51: ["GPIO1"], + pin52: ["GPIO0"], + pin53: ["GPIO40"], + pin54: ["GPIO23"], + pin55: ["GPIO41"], + pin56: ["GPIO22"], + pin57: ["GPIO7"], + pin58: ["VSS4"], + pin59: ["VDD3"], + pin60: ["VDDIO2"], + pin61: ["GPIO5"], + pin62: ["GPIO9"], + pin63: ["GPIO10"], + pin64: ["GPIO6"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin22: { requiresPower: true }, + pin26: { requiresGround: true }, + pin44: { requiresPower: true }, + pin45: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresPower: true }, +} as const; + +export const F2800133PMR = (props: ChipProps) => { + return ( + + ); +}; + +export default F2800133PMR; diff --git a/lib/chips/F280025PNSR.circuit.tsx b/lib/chips/F280025PNSR.circuit.tsx new file mode 100644 index 00000000..0bf6df44 --- /dev/null +++ b/lib/chips/F280025PNSR.circuit.tsx @@ -0,0 +1,127 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO30"], + pin2: ["GPIO31"], + pin3: ["GPIO29"], + pin4: ["GPIO28"], + pin5: ["XRSn"], + pin6: ["GPIO46"], + pin7: ["VDDIO1"], + pin8: ["VDD1"], + pin9: ["VSS1"], + pin10: ["A6"], + pin11: ["C6"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["A1"], + pin19: ["pin19"], + pin20: ["VREFHI"], + pin21: ["VREFLO"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["VSSA"], + pin26: ["VDDA"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["VSS2"], + pin31: ["VDD2"], + pin32: ["VDDIO2"], + pin33: ["FLT2"], + pin34: ["FLT1"], + pin35: ["GPIO13"], + pin36: ["GPIO12"], + pin37: ["GPIO11"], + pin38: ["GPIO33"], + pin39: ["GPIO16"], + pin40: ["GPIO17"], + pin41: ["GPIO24"], + pin42: ["GPIO25"], + pin43: ["GPIO26"], + pin44: ["GPIO27"], + pin45: ["TCK"], + pin46: ["pin46"], + pin47: ["TMS"], + pin48: ["pin48"], + pin49: ["GPIO32"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["VDDIO3"], + pin53: ["VDD3"], + pin54: ["GPIO43"], + pin55: ["VSS3"], + pin56: ["GPIO39"], + pin57: ["GPIO42"], + pin58: ["GPIO8"], + pin59: ["GPIO4"], + pin60: ["GPIO3"], + pin61: ["GPIO2"], + pin62: ["GPIO1"], + pin63: ["GPIO0"], + pin64: ["GPIO40"], + pin65: ["GPIO23"], + pin66: ["GPIO41"], + pin67: ["GPIO22"], + pin68: ["GPIO7"], + pin69: ["GPIO44"], + pin70: ["VSS4"], + pin71: ["VDD4"], + pin72: ["VDDIO4"], + pin73: ["GPIO45"], + pin74: ["GPIO5"], + pin75: ["GPIO9"], + pin76: ["GPIO10"], + pin77: ["GPIO34"], + pin78: ["GPIO15"], + pin79: ["GPIO14"], + pin80: ["GPIO6"], +} as const; + +const pinAttributes = { + pin8: { requiresPower: true }, + pin9: { requiresGround: true }, + pin26: { requiresPower: true }, + pin30: { requiresGround: true }, + pin31: { requiresPower: true }, + pin53: { requiresPower: true }, + pin55: { requiresGround: true }, + pin70: { requiresGround: true }, + pin71: { requiresPower: true }, +} as const; + +export const F280025PNSR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280025PNSR; diff --git a/lib/chips/F280039CSPMR.circuit.tsx b/lib/chips/F280039CSPMR.circuit.tsx new file mode 100644 index 00000000..b05b273b --- /dev/null +++ b/lib/chips/F280039CSPMR.circuit.tsx @@ -0,0 +1,773 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["GPIO28"], + pin3: ["XRSn"], + pin4: ["VDD1"], + pin5: ["VSS1"], + pin6: ["A6"], + pin7: ["B2_C6"], + pin8: ["A3_B3_C5_VDAC"], + pin9: ["A2_B6_C9"], + pin10: ["A15_B9_C7"], + pin11: ["A14_B14_C4"], + pin12: ["A11_B10_C0"], + pin13: ["A5_B12_C2"], + pin14: ["A1_B7_DACB_OUT"], + pin15: ["A0_B15_C15_DACA_OUT"], + pin16: ["VREFHI"], + pin17: ["VREFLO"], + pin18: ["A12_C1"], + pin19: ["A7_C3"], + pin20: ["A8_B0_C11"], + pin21: ["VSSA"], + pin22: ["VDDA"], + pin23: ["A4_B8_C14"], + pin24: ["A9_B4_C8"], + pin25: ["A10_B1_C10"], + pin26: ["VSS2"], + pin27: ["VDD2"], + pin28: ["VDDIO1"], + pin29: ["GPIO13"], + pin30: ["GPIO12"], + pin31: ["GPIO11"], + pin32: ["GPIO33"], + pin33: ["GPIO16"], + pin34: ["GPIO17"], + pin35: ["GPIO24"], + pin36: ["TCK"], + pin37: ["pin37"], + pin38: ["TMS"], + pin39: ["pin39"], + pin40: ["GPIO32"], + pin41: ["GPIO18_X2"], + pin42: ["GPIO19_X1"], + pin43: ["VDDIO2"], + pin44: ["VDD3"], + pin45: ["VSS3"], + pin46: ["GPIO39"], + pin47: ["GPIO8"], + pin48: ["GPIO4"], + pin49: ["GPIO3"], + pin50: ["GPIO2"], + pin51: ["GPIO1"], + pin52: ["GPIO0"], + pin53: ["GPIO40"], + pin54: ["GPIO23"], + pin55: ["GPIO41"], + pin56: ["GPIO22"], + pin57: ["GPIO7"], + pin58: ["VSS4"], + pin59: ["VDD4"], + pin60: ["VDDIO3"], + pin61: ["GPIO5"], + pin62: ["GPIO9"], + pin63: ["GPIO10"], + pin64: ["GPIO6"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin22: { requiresPower: true }, + pin26: { requiresGround: true }, + pin27: { requiresPower: true }, + pin44: { requiresPower: true }, + pin45: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresPower: true }, +} as const; + +export const F280039CSPMR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345419.obj?uuid=7e9b9111dcfd48d3add0eab11d882721", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345419.step?uuid=7e9b9111dcfd48d3add0eab11d882721", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.011810999999994465, z: 0.000795 }, + }} + {...props} + /> + ); +}; + +export default F280039CSPMR; diff --git a/lib/chips/F280040CPMQR.circuit.tsx b/lib/chips/F280040CPMQR.circuit.tsx new file mode 100644 index 00000000..9388f0df --- /dev/null +++ b/lib/chips/F280040CPMQR.circuit.tsx @@ -0,0 +1,111 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["GPIO28"], + pin3: ["XRSn"], + pin4: ["VDD1"], + pin5: ["VSS1"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["VSSA"], + pin22: ["VDDA"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["VSS2"], + pin27: ["VDD2"], + pin28: ["VDDIO1"], + pin29: ["GPIO13"], + pin30: ["GPIO12"], + pin31: ["GPIO11"], + pin32: ["GPIO33"], + pin33: ["GPIO16"], + pin34: ["GPIO17"], + pin35: ["GPIO24"], + pin36: ["TCK"], + pin37: ["pin37"], + pin38: ["TMS"], + pin39: ["pin39"], + pin40: ["GPIO32"], + pin41: ["GPIO18_X2"], + pin42: ["X1"], + pin43: ["VDDIO2"], + pin44: ["VDD3"], + pin45: ["VSS3"], + pin46: ["VREGENZ"], + pin47: ["GPIO8"], + pin48: ["GPIO4"], + pin49: ["GPIO3"], + pin50: ["GPIO2"], + pin51: ["GPIO1"], + pin52: ["GPIO0"], + pin53: ["VDDIO_SW"], + pin54: ["GPIO23_VSW"], + pin55: ["VSS_SW"], + pin56: ["GPIO22_VFBSW"], + pin57: ["GPIO7"], + pin58: ["VSS4"], + pin59: ["VDD4"], + pin60: ["VDDIO3"], + pin61: ["GPIO5"], + pin62: ["GPIO9"], + pin63: ["GPIO10"], + pin64: ["GPIO6"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin22: { requiresPower: true }, + pin26: { requiresGround: true }, + pin27: { requiresPower: true }, + pin44: { requiresPower: true }, + pin45: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresPower: true }, +} as const; + +export const F280040CPMQR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280040CPMQR; diff --git a/lib/chips/F280040PMQR.circuit.tsx b/lib/chips/F280040PMQR.circuit.tsx new file mode 100644 index 00000000..4b4668bd --- /dev/null +++ b/lib/chips/F280040PMQR.circuit.tsx @@ -0,0 +1,107 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["GPIO28"], + pin3: ["XRSn"], + pin4: ["VDD4"], + pin5: ["VSS4"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["VSSA"], + pin22: ["VDDA"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["VSS3"], + pin27: ["VDD3"], + pin28: ["VDDIO3"], + pin29: ["FLT2"], + pin30: ["FLT1"], + pin31: ["GPIO11"], + pin32: ["GPIO33"], + pin33: ["GPIO16"], + pin34: ["GPIO17"], + pin35: ["GPIO24"], + pin36: ["TCK"], + pin37: ["pin37"], + pin38: ["TMS"], + pin39: ["pin39"], + pin40: ["GPIO32"], + pin41: ["GPIO18_X2"], + pin42: ["X1"], + pin43: ["VDDIO2"], + pin44: ["VDD2"], + pin45: ["VSS2"], + pin46: ["VREGENZ"], + pin47: ["GPIO8"], + pin48: ["GPIO4"], + pin49: ["GPIO3"], + pin50: ["GPIO2"], + pin51: ["GPIO1"], + pin52: ["GPIO0"], + pin53: ["VDDIO_SW"], + pin54: ["GPIO23_VSW"], + pin55: ["VSS_SW"], + pin56: ["GPIO22_VFBSW"], + pin57: ["GPIO7"], + pin58: ["VSS1"], + pin59: ["VDD1"], + pin60: ["VDDIO1"], + pin61: ["GPIO5"], + pin62: ["GPIO9"], + pin63: ["GPIO10"], + pin64: ["GPIO6"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin22: { requiresPower: true }, + pin26: { requiresGround: true }, + pin27: { requiresPower: true }, + pin44: { requiresPower: true }, + pin45: { requiresGround: true }, + pin58: { requiresGround: true }, + pin59: { requiresPower: true }, +} as const; + +export const F280040PMQR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280040PMQR; diff --git a/lib/chips/F280041CPZQR.circuit.tsx b/lib/chips/F280041CPZQR.circuit.tsx new file mode 100644 index 00000000..77c354a0 --- /dev/null +++ b/lib/chips/F280041CPZQR.circuit.tsx @@ -0,0 +1,255 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO28", "1"], + pin2: ["XRSN", "2"], + pin3: ["VDDIO", "3", "VDDIO_3"], + pin4: ["VDD", "4", "VDD_4"], + pin5: ["VSS", "5", "VSS_5"], + pin6: ["A6", "6"], + pin7: ["B2", "7"], + pin8: ["B3", "8"], + pin9: ["A2", "9"], + pin10: ["A3", "10"], + pin11: ["VDDA", "11", "VDDA_11"], + pin12: ["VSSA", "12", "VSSA_12"], + pin13: ["PGA5_GND", "13"], + pin14: ["PGA1_GND", "14"], + pin15: ["PGA3_GND", "15"], + pin16: ["PGA5_IN", "16"], + pin17: ["C4", "17"], + pin18: ["PGA1_IN", "18"], + pin19: ["C0", "19"], + pin20: ["PGA3_IN", "20"], + pin21: ["C2", "21"], + pin22: ["A1", "22"], + pin23: ["A0", "23"], + pin24: ["VREFHIB", "24"], + pin25: ["VREFHIA", "25"], + pin26: ["VREFLOB", "26"], + pin27: ["VREFLOA", "27"], + pin28: ["C5", "28"], + pin29: ["C1", "29"], + pin30: ["PGA2_IN", "30"], + pin31: ["C3", "31"], + pin32: ["PGA2_GND", "32"], + pin33: ["VSSA", "33", "VSSA_33"], + pin34: ["VDDA", "34", "VDDA_34"], + pin35: ["A5", "35"], + pin36: ["A4", "36"], + pin37: ["A8", "37"], + pin38: ["A9", "38"], + pin39: ["B4", "39"], + pin40: ["A10", "40"], + pin41: ["B0", "41"], + pin42: ["PGA7_GND", "42"], + pin43: ["PGA7_IN", "43"], + pin44: ["C14", "44"], + pin45: ["VSS", "45", "VSS_45"], + pin46: ["VDD", "46", "VDD_46"], + pin47: ["VDDIO", "47", "VDDIO_47"], + pin48: ["FLT2", "48"], + pin49: ["FLT1", "49"], + pin50: ["GPIO13", "50"], + pin51: ["GPIO12", "51"], + pin52: ["GPIO11", "52"], + pin53: ["GPIO33", "53"], + pin54: ["GPIO16", "54"], + pin55: ["GPIO17", "55"], + pin56: ["GPIO24", "56"], + pin57: ["GPIO25", "57"], + pin58: ["GPIO26", "58"], + pin59: ["GPIO27", "59"], + pin60: ["TCK", "60"], + pin61: ["GPIO37", "61"], + pin62: ["TMS", "62"], + pin63: ["GPIO35", "63"], + pin64: ["GPIO32", "64"], + pin65: ["GPIO56", "65"], + pin66: ["GPIO57", "66"], + pin67: ["GPIO58", "67"], + pin68: ["GPIO18_X2", "68"], + pin69: ["X1", "69"], + pin70: ["VDDIO", "70", "VDDIO_70"], + pin71: ["VDD", "71", "VDD_71"], + pin72: ["VSS", "72", "VSS_72"], + pin73: ["VREGENZ", "73"], + pin74: ["GPIO8", "74"], + pin75: ["GPIO4", "75"], + pin76: ["GPIO3", "76"], + pin77: ["GPIO2", "77"], + pin78: ["GPIO1", "78"], + pin79: ["GPIO0", "79"], + pin80: ["VDDIO_SW", "80"], + pin81: ["GPIO23_VSW", "81"], + pin82: ["VSS_SW", "82"], + pin83: ["GPIO22_VFBSW", "83"], + pin84: ["GPIO7", "84"], + pin85: ["GPIO40", "85"], + pin86: ["VSS", "86", "VSS_86"], + pin87: ["VDD", "87", "VDD_87"], + pin88: ["VDDIO", "88", "VDDIO_88"], + pin89: ["GPIO5", "89"], + pin90: ["GPIO9", "90"], + pin91: ["GPIO39", "91"], + pin92: ["GPIO59", "92"], + pin93: ["GPIO10", "93"], + pin94: ["GPIO34", "94"], + pin95: ["GPIO15", "95"], + pin96: ["GPIO14", "96"], + pin97: ["GPIO6", "97"], + pin98: ["GPIO30", "98"], + pin99: ["GPIO31", "99"], + pin100: ["GPIO29", "100"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "power", + pin4: "power", + pin5: "ground", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "power", + pin12: "ground", + pin13: "ground", + pin14: "ground", + pin15: "ground", + pin16: "input", + pin17: "input", + pin18: "input", + pin19: "input", + pin20: "input", + pin21: "input", + pin22: "input", + pin23: "input", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "power", + pin27: "power", + pin28: "input", + pin29: "input", + pin30: "input", + pin31: "input", + pin32: "ground", + pin33: "ground", + pin34: "power", + pin35: "input", + pin36: "input", + pin37: "input", + pin38: "input", + pin39: "input", + pin40: "input", + pin41: "input", + pin42: "ground", + pin43: "input", + pin44: "input", + pin45: "ground", + pin46: "power", + pin47: "power", + pin48: "no-connect", + pin49: "no-connect", + pin50: "bidirectional", + pin51: "bidirectional", + pin52: "bidirectional", + pin53: "bidirectional", + pin54: "bidirectional", + pin55: "bidirectional", + pin56: "bidirectional", + pin57: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin60: "input", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "bidirectional", + pin64: "bidirectional", + pin65: "bidirectional", + pin66: "bidirectional", + pin67: "bidirectional", + pin68: "bidirectional", + pin69: "bidirectional", + pin70: "power", + pin71: "power", + pin72: "ground", + pin73: "power", + pin74: "bidirectional", + pin75: "bidirectional", + pin76: "bidirectional", + pin77: "bidirectional", + pin78: "bidirectional", + pin79: "bidirectional", + pin80: "power", + pin81: "bidirectional", + pin82: "ground", + pin83: "bidirectional", + pin84: "bidirectional", + pin85: "bidirectional", + pin86: "ground", + pin87: "power", + pin88: "power", + pin89: "bidirectional", + pin90: "bidirectional", + pin91: "bidirectional", + pin92: "bidirectional", + pin93: "bidirectional", + pin94: "bidirectional", + pin95: "bidirectional", + pin96: "bidirectional", + pin97: "bidirectional", + pin98: "bidirectional", + pin99: "bidirectional", + pin100: "bidirectional", +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin13: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresGround: true }, + pin26: { requiresPower: true }, + pin27: { requiresPower: true }, + pin32: { requiresGround: true }, + pin33: { requiresGround: true }, + pin34: { requiresPower: true }, + pin42: { requiresGround: true }, + pin45: { requiresGround: true }, + pin46: { requiresPower: true }, + pin47: { requiresPower: true }, + pin48: { doNotConnect: true }, + pin49: { doNotConnect: true }, + pin70: { requiresPower: true }, + pin71: { requiresPower: true }, + pin72: { requiresGround: true }, + pin73: { requiresPower: true }, + pin80: { requiresPower: true }, + pin82: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresPower: true }, + pin88: { requiresPower: true }, +} as const; + +export const F280041CPZQR = (props: ChipProps) => { + // Footprint provenance: TI drawing PZ0100A1; donor F280049CPZQR (JLCPCB C1880111) + return ( + + ); +}; + +export default F280041CPZQR; diff --git a/lib/chips/F280041PZQR.circuit.tsx b/lib/chips/F280041PZQR.circuit.tsx new file mode 100644 index 00000000..673bc63e --- /dev/null +++ b/lib/chips/F280041PZQR.circuit.tsx @@ -0,0 +1,144 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO28"], + pin2: ["XRSn"], + pin3: ["VDDIO1"], + pin4: ["VDD1"], + pin5: ["VSS1"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["A3"], + pin11: ["VDDA1"], + pin12: ["VSSA1"], + pin13: ["PGA5_GND"], + pin14: ["PGA1_GND"], + pin15: ["PGA3_GND"], + pin16: ["PGA5_IN"], + pin17: ["C4"], + pin18: ["PGA1_IN"], + pin19: ["C0"], + pin20: ["PGA3_IN"], + pin21: ["C2"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["VREFHIA"], + pin26: ["pin26"], + pin27: ["VREFLOA"], + pin28: ["pin28"], + pin29: ["C1"], + pin30: ["PGA2_IN"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["VSSA2"], + pin34: ["VDDA2"], + pin35: ["A5"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["A9"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["B0"], + pin42: ["PGA7_GND"], + pin43: ["PGA7_IN"], + pin44: ["C14"], + pin45: ["VSS2"], + pin46: ["VDD2"], + pin47: ["VDDIO2"], + pin48: ["FLT2"], + pin49: ["FLT1"], + pin50: ["GPIO13"], + pin51: ["GPIO12"], + pin52: ["GPIO11"], + pin53: ["GPIO33"], + pin54: ["GPIO16"], + pin55: ["GPIO17"], + pin56: ["GPIO24"], + pin57: ["GPIO25"], + pin58: ["GPIO26"], + pin59: ["GPIO27"], + pin60: ["TCK"], + pin61: ["pin61"], + pin62: ["TMS"], + pin63: ["pin63"], + pin64: ["GPIO32"], + pin65: ["GPIO56"], + pin66: ["GPIO57"], + pin67: ["GPIO58"], + pin68: ["GPIO18_X2"], + pin69: ["X1"], + pin70: ["VDDIO3"], + pin71: ["VDD3"], + pin72: ["VSS3"], + pin73: ["VREGENZ"], + pin74: ["GPIO8"], + pin75: ["GPIO4"], + pin76: ["GPIO3"], + pin77: ["GPIO2"], + pin78: ["GPIO1"], + pin79: ["GPIO0"], + pin80: ["VDDIO_SW"], + pin81: ["GPIO23_VSW"], + pin82: ["VSS_SW"], + pin83: ["GPIO22_VFBSW"], + pin84: ["GPIO7"], + pin85: ["GPIO40"], + pin86: ["VSS4"], + pin87: ["VDD4"], + pin88: ["VDDIO4"], + pin89: ["GPIO5"], + pin90: ["GPIO9"], + pin91: ["GPIO39"], + pin92: ["GPIO59"], + pin93: ["GPIO10"], + pin94: ["GPIO34"], + pin95: ["GPIO15"], + pin96: ["GPIO14"], + pin97: ["GPIO6"], + pin98: ["GPIO30"], + pin99: ["GPIO31"], + pin100: ["GPIO29"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin11: { requiresPower: true }, + pin34: { requiresPower: true }, + pin45: { requiresGround: true }, + pin46: { requiresPower: true }, + pin71: { requiresPower: true }, + pin72: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresPower: true }, +} as const; + +export const F280041PZQR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280041PZQR; diff --git a/lib/chips/F280049CPZQR.circuit.tsx b/lib/chips/F280049CPZQR.circuit.tsx new file mode 100644 index 00000000..c09e5f57 --- /dev/null +++ b/lib/chips/F280049CPZQR.circuit.tsx @@ -0,0 +1,144 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO28"], + pin2: ["XRSn"], + pin3: ["VDDIO4"], + pin4: ["VDD4"], + pin5: ["VSS4"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["A3"], + pin11: ["VDDA2"], + pin12: ["VSSA2"], + pin13: ["PGA5_GND"], + pin14: ["PGA1_GND"], + pin15: ["PGA3_GND"], + pin16: ["PGA5_IN"], + pin17: ["C4"], + pin18: ["PGA1_IN"], + pin19: ["C0"], + pin20: ["PGA3_IN"], + pin21: ["C2"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["VREFHIA"], + pin26: ["pin26"], + pin27: ["VREFLOA"], + pin28: ["pin28"], + pin29: ["C1"], + pin30: ["PGA2_IN"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["VSSA1"], + pin34: ["VDDA1"], + pin35: ["A5"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["A9"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["B0"], + pin42: ["PGA7_GND"], + pin43: ["PGA7_IN"], + pin44: ["C14"], + pin45: ["VSS3"], + pin46: ["VDD3"], + pin47: ["VDDIO3"], + pin48: ["FLT2"], + pin49: ["FLT1"], + pin50: ["GPIO13"], + pin51: ["GPIO12"], + pin52: ["GPIO11"], + pin53: ["GPIO33"], + pin54: ["GPIO16"], + pin55: ["GPIO17"], + pin56: ["GPIO24"], + pin57: ["GPIO25"], + pin58: ["GPIO26"], + pin59: ["GPIO27"], + pin60: ["TCK"], + pin61: ["pin61"], + pin62: ["TMS"], + pin63: ["pin63"], + pin64: ["GPIO32"], + pin65: ["GPIO56"], + pin66: ["GPIO57"], + pin67: ["GPIO58"], + pin68: ["GPIO18_X2"], + pin69: ["X1"], + pin70: ["VDDIO2"], + pin71: ["VDD2"], + pin72: ["VSS2"], + pin73: ["VREGENZ"], + pin74: ["GPIO8"], + pin75: ["GPIO4"], + pin76: ["GPIO3"], + pin77: ["GPIO2"], + pin78: ["GPIO1"], + pin79: ["GPIO0"], + pin80: ["VDDIO_SW"], + pin81: ["GPIO23_VSW"], + pin82: ["VSS_SW"], + pin83: ["GPIO22_VFBSW"], + pin84: ["GPIO7"], + pin85: ["GPIO40"], + pin86: ["VSS1"], + pin87: ["VDD1"], + pin88: ["VDDIO1"], + pin89: ["GPIO5"], + pin90: ["GPIO9"], + pin91: ["GPIO39"], + pin92: ["GPIO59"], + pin93: ["GPIO10"], + pin94: ["GPIO34"], + pin95: ["GPIO15"], + pin96: ["GPIO14"], + pin97: ["GPIO6"], + pin98: ["GPIO30"], + pin99: ["GPIO31"], + pin100: ["GPIO29"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin11: { requiresPower: true }, + pin34: { requiresPower: true }, + pin45: { requiresGround: true }, + pin46: { requiresPower: true }, + pin71: { requiresPower: true }, + pin72: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresPower: true }, +} as const; + +export const F280049CPZQR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280049CPZQR; diff --git a/lib/chips/F280049CRSHSR.circuit.tsx b/lib/chips/F280049CRSHSR.circuit.tsx new file mode 100644 index 00000000..9885f9e4 --- /dev/null +++ b/lib/chips/F280049CRSHSR.circuit.tsx @@ -0,0 +1,102 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO6"], + pin2: ["GPIO29"], + pin3: ["GPIO28"], + pin4: ["XRSn"], + pin5: ["VDD1"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["VSSA"], + pin20: ["VDDA"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["VDD2"], + pin25: ["VDDIO1"], + pin26: ["GPIO13"], + pin27: ["GPIO12"], + pin28: ["GPIO11"], + pin29: ["GPIO33"], + pin30: ["GPIO16"], + pin31: ["GPIO17"], + pin32: ["GPIO24"], + pin33: ["TCK"], + pin34: ["pin34"], + pin35: ["TMS"], + pin36: ["pin36"], + pin37: ["GPIO32"], + pin38: ["GPIO18_X2"], + pin39: ["X1"], + pin40: ["VDDIO2"], + pin41: ["VDD3"], + pin42: ["GPIO8"], + pin43: ["GPIO4"], + pin44: ["GPIO3"], + pin45: ["GPIO2"], + pin46: ["GPIO1"], + pin47: ["GPIO0"], + pin48: ["VDDIO_SW"], + pin49: ["GPIO23_VSW"], + pin50: ["VSS_SW"], + pin51: ["GPIO22_VFBSW"], + pin52: ["GPIO7"], + pin53: ["VDD4"], + pin54: ["VDDIO3"], + pin55: ["GPIO5"], + pin56: ["GPIO9"], + pin57: ["VSS"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin20: { requiresPower: true }, + pin24: { requiresPower: true }, + pin41: { requiresPower: true }, + pin53: { requiresPower: true }, + pin57: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin57: [...pinLabels["pin57"], "thermalpad"], +} as const; + +export const F280049CRSHSR = (props: ChipProps) => { + return ( + + ); +}; + +export default F280049CRSHSR; diff --git a/lib/chips/F280049PZQ.circuit.tsx b/lib/chips/F280049PZQ.circuit.tsx new file mode 100644 index 00000000..7d705003 --- /dev/null +++ b/lib/chips/F280049PZQ.circuit.tsx @@ -0,0 +1,148 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO28"], + pin2: ["XRSn"], + pin3: ["VDDIO1"], + pin4: ["VDD1"], + pin5: ["VSS1"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["A3"], + pin11: ["VDDA1"], + pin12: ["VSSA1"], + pin13: ["PGA5_GND"], + pin14: ["PGA1_GND"], + pin15: ["PGA3_GND"], + pin16: ["PGA5_IN"], + pin17: ["C4"], + pin18: ["PGA1_IN"], + pin19: ["C0"], + pin20: ["PGA3_IN"], + pin21: ["C2"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["VREFHIA"], + pin26: ["pin26"], + pin27: ["VREFLOA"], + pin28: ["pin28"], + pin29: ["C1"], + pin30: ["PGA2_IN"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["VSSA2"], + pin34: ["VDDA2"], + pin35: ["A5"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["A9"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["B0"], + pin42: ["PGA7_GND"], + pin43: ["PGA7_IN"], + pin44: ["C14"], + pin45: ["VSS2"], + pin46: ["VDD2"], + pin47: ["VDDIO2"], + pin48: ["FLT2"], + pin49: ["FLT1"], + pin50: ["GPIO13"], + pin51: ["GPIO12"], + pin52: ["GPIO11"], + pin53: ["GPIO33"], + pin54: ["GPIO16"], + pin55: ["GPIO17"], + pin56: ["GPIO24"], + pin57: ["GPIO25"], + pin58: ["GPIO26"], + pin59: ["GPIO27"], + pin60: ["TCK"], + pin61: ["pin61"], + pin62: ["TMS"], + pin63: ["pin63"], + pin64: ["GPIO32"], + pin65: ["GPIO56"], + pin66: ["GPIO57"], + pin67: ["GPIO58"], + pin68: ["GPIO18_X2"], + pin69: ["X1"], + pin70: ["VDDIO3"], + pin71: ["VDD3"], + pin72: ["VSS3"], + pin73: ["VREGENZ"], + pin74: ["GPIO8"], + pin75: ["GPIO4"], + pin76: ["GPIO3"], + pin77: ["GPIO2"], + pin78: ["GPIO1"], + pin79: ["GPIO0"], + pin80: ["VDDIO_SW"], + pin81: ["GPIO23_VSW"], + pin82: ["VSS_SW"], + pin83: ["GPIO22_VFBSW"], + pin84: ["GPIO7"], + pin85: ["GPIO40"], + pin86: ["VSS4"], + pin87: ["VDD4"], + pin88: ["VDDIO4"], + pin89: ["GPIO5"], + pin90: ["GPIO9"], + pin91: ["GPIO39"], + pin92: ["GPIO59"], + pin93: ["GPIO10"], + pin94: ["GPIO34"], + pin95: ["GPIO15"], + pin96: ["GPIO14"], + pin97: ["GPIO6"], + pin98: ["GPIO30"], + pin99: ["GPIO31"], + pin100: ["GPIO29"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin11: { requiresPower: true }, + pin34: { requiresPower: true }, + pin45: { requiresGround: true }, + pin46: { requiresPower: true }, + pin71: { requiresPower: true }, + pin72: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresPower: true }, +} as const; + +export const F280049PZQ = (props: ChipProps) => { + return ( + + ); +}; + +export default F280049PZQ; diff --git a/lib/chips/F28E120SCTPTR.circuit.tsx b/lib/chips/F28E120SCTPTR.circuit.tsx new file mode 100644 index 00000000..f572a6d1 --- /dev/null +++ b/lib/chips/F28E120SCTPTR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO29"], + pin2: ["pin2"], + pin3: ["XRSn"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["A5"], + pin10: ["A1"], + pin11: ["pin11"], + pin12: ["VREFHI"], + pin13: ["VREFLO"], + pin14: ["A12"], + pin15: ["A7"], + pin16: ["pin16"], + pin17: ["VSSA"], + pin18: ["VDDA"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["VSS1"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["GPIO33"], + pin26: ["GPIO16"], + pin27: ["GPIO24"], + pin28: ["TCK"], + pin29: ["pin29"], + pin30: ["TMS"], + pin31: ["pin31"], + pin32: ["GPIO32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["VDDIO1"], + pin36: ["GPIO43"], + pin37: ["VSS2"], + pin38: ["GPIO4"], + pin39: ["GPIO3"], + pin40: ["GPIO2"], + pin41: ["GPIO1"], + pin42: ["GPIO0"], + pin43: ["GPIO7"], + pin44: ["VSS3"], + pin45: ["GPIO45"], + pin46: ["VDDIO2"], + pin47: ["GPIO5"], + pin48: ["GPIO6"], +} as const; + +const pinAttributes = { + pin18: { requiresPower: true }, + pin22: { requiresGround: true }, + pin37: { requiresGround: true }, + pin44: { requiresGround: true }, +} as const; + +export const F28E120SCTPTR = (props: ChipProps) => { + return ( + + ); +}; + +export default F28E120SCTPTR; diff --git a/lib/chips/F28M35H52C1RFPQ.circuit.tsx b/lib/chips/F28M35H52C1RFPQ.circuit.tsx new file mode 100644 index 00000000..690dc177 --- /dev/null +++ b/lib/chips/F28M35H52C1RFPQ.circuit.tsx @@ -0,0 +1,1546 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD181"], + pin2: ["VDDIO1"], + pin3: ["VDDIO2"], + pin4: ["XRS"], + pin5: ["PA0_GPIO0"], + pin6: ["PA1_GPIO1"], + pin7: ["PA2_GPIO2"], + pin8: ["PA3_GPIO3"], + pin9: ["PA4_GPIO4"], + pin10: ["VDDIO3"], + pin11: ["VDD121"], + pin12: ["PA5_GPIO5"], + pin13: ["PA6_GPIO6"], + pin14: ["PA7_GPIO7"], + pin15: ["PB0_GPIO8"], + pin16: ["FLT1"], + pin17: ["VDDIO4"], + pin18: ["PB1_GPIO9"], + pin19: ["PB2_GPIO10"], + pin20: ["PB3_GPIO11"], + pin21: ["FLT2"], + pin22: ["PE6_GPIO30"], + pin23: ["PE7_GPIO31"], + pin24: ["VDD122"], + pin25: ["VDDIO5"], + pin26: ["PB6_GPIO14"], + pin27: ["PB7_GPIO15"], + pin28: ["PD2_GPIO18"], + pin29: ["PD3_GPIO19"], + pin30: ["PB4_GPIO12"], + pin31: ["PB5_GPIO13"], + pin32: ["PE2_GPIO26"], + pin33: ["PE3_GPIO27"], + pin34: ["VDDIO6"], + pin35: ["PH3_GPIO51"], + pin36: ["PH2_GPIO50"], + pin37: ["PC4_GPIO68"], + pin38: ["PC5_GPIO69"], + pin39: ["PC6_GPIO70"], + pin40: ["PC7_GPIO71"], + pin41: ["PH0_GPIO48"], + pin42: ["PH1_GPIO49"], + pin43: ["PE0_GPIO24"], + pin44: ["VDDIO7"], + pin45: ["PE1_GPIO25"], + pin46: ["PH4_GPIO52"], + pin47: ["PH5_GPIO53"], + pin48: ["PF4_GPIO36"], + pin49: ["PG0_GPIO40"], + pin50: ["PG1_GPIO41"], + pin51: ["PF5_GPIO37"], + pin52: ["PG7_GPIO47"], + pin53: ["PJ6_GPIO62"], + pin54: ["VDDIO8"], + pin55: ["VDD123"], + pin56: ["PJ5_GPIO61"], + pin57: ["PJ4_GPIO60"], + pin58: ["VDD124"], + pin59: ["VDDIO9"], + pin60: ["PJ3_GPIO59"], + pin61: ["PJ2_GPIO58"], + pin62: ["PJ1_GPIO57"], + pin63: ["PJ0_GPIO56"], + pin64: ["PD5_GPIO21"], + pin65: ["PD4_GPIO20"], + pin66: ["VDD125"], + pin67: ["VDDIO10"], + pin68: ["PD7_GPIO23"], + pin69: ["PF6_GPIO38"], + pin70: ["PG6_GPIO46"], + pin71: ["PG2_GPIO42"], + pin72: ["PG5_GPIO45"], + pin73: ["PD6_GPIO22"], + pin74: ["VDDIO11"], + pin75: ["VDD126"], + pin76: ["PE5_GPIO29"], + pin77: ["PE4_GPIO28"], + pin78: ["PG3_GPIO43"], + pin79: ["PH6_GPIO54"], + pin80: ["PH7_GPIO55"], + pin81: ["PF3_GPIO35"], + pin82: ["PF2_GPIO34"], + pin83: ["EMU0"], + pin84: ["TDO"], + pin85: ["TRST"], + pin86: ["EMU1"], + pin87: ["TMS"], + pin88: ["TDI"], + pin89: ["TCK"], + pin90: ["VDD127"], + pin91: ["NC"], + pin92: ["VDDIO12"], + pin93: ["X1"], + pin94: ["VSSOSC"], + pin95: ["X2"], + pin96: ["VDDIO13"], + pin97: ["PJ7_GPIO63"], + pin98: ["PD1_GPIO17"], + pin99: ["VDD128"], + pin100: ["VDDIO14"], + pin101: ["VREG12EN"], + pin102: ["PD0_GPIO16"], + pin103: ["PF1_GPIO33"], + pin104: ["PF0_GPIO32"], + pin105: ["VDDIO15"], + pin106: ["VDDIO16"], + pin107: ["VDDIO17"], + pin108: ["VDD182"], + pin109: ["pin109"], + pin110: ["GPIO134"], + pin111: ["pin111"], + pin112: ["pin112"], + pin113: ["VREG18EN"], + pin114: ["ADC1INB7"], + pin115: ["ADC1INB4"], + pin116: ["ADC1INB3"], + pin117: ["ADC1INB0"], + pin118: ["VSSA1"], + pin119: ["VDDA1"], + pin120: ["ADC1VREFHI"], + pin121: ["ADC1INA0"], + pin122: ["ADC1INA2"], + pin123: ["ADC1INA3"], + pin124: ["ADC1INA4"], + pin125: ["ADC1INA6"], + pin126: ["ADC1INA7"], + pin127: ["ADC2INA7"], + pin128: ["ADC2INA6"], + pin129: ["ADC2INA4"], + pin130: ["ADC2INA3"], + pin131: ["ADC2INA2"], + pin132: ["ADC2INA0"], + pin133: ["ADC2VREFHI"], + pin134: ["VDDA2"], + pin135: ["VSSA2"], + pin136: ["ADC2INB0"], + pin137: ["ADC2INB3"], + pin138: ["ADC2INB4"], + pin139: ["ADC2INB7"], + pin140: ["GPIO128"], + pin141: ["pin141"], + pin142: ["pin142"], + pin143: ["pin143"], + pin144: ["ARS"], + pin145: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin11: { requiresPower: true }, + pin24: { requiresPower: true }, + pin55: { requiresPower: true }, + pin58: { requiresPower: true }, + pin66: { requiresPower: true }, + pin75: { requiresPower: true }, + pin90: { requiresPower: true }, + pin91: { doNotConnect: true }, + pin99: { requiresPower: true }, + pin108: { requiresPower: true }, + pin119: { requiresPower: true }, + pin134: { requiresPower: true }, +} as const; + +export const F28M35H52C1RFPQ = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1338601.obj?uuid=5f3d0f9b43204ebb9c77a8ad28c50891", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1338601.step?uuid=5f3d0f9b43204ebb9c77a8ad28c50891", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default F28M35H52C1RFPQ; diff --git a/lib/chips/F28P550SJ9PZR.circuit.tsx b/lib/chips/F28P550SJ9PZR.circuit.tsx new file mode 100644 index 00000000..1b698856 --- /dev/null +++ b/lib/chips/F28P550SJ9PZR.circuit.tsx @@ -0,0 +1,142 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["XRSn"], + pin3: ["VDDIO3"], + pin4: ["VDD3"], + pin5: ["VSS4"], + pin6: ["GPIO47"], + pin7: ["GPIO48"], + pin8: ["GPIO49"], + pin9: ["GPIO50"], + pin10: ["GPIO51"], + pin11: ["GPIO52"], + pin12: ["GPIO53"], + pin13: ["GPIO54"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["VSSA"], + pin34: ["VDDA"], + pin35: ["A5"], + pin36: ["pin36"], + pin37: ["A8"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["GPIO55"], + pin44: ["GPIO60"], + pin45: ["VSS3"], + pin46: ["GPIO62"], + pin47: ["GPIO63"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["pin53"], + pin54: ["pin54"], + pin55: ["pin55"], + pin56: ["pin56"], + pin57: ["GPIO25"], + pin58: ["GPIO26"], + pin59: ["GPIO27"], + pin60: ["TCK"], + pin61: ["pin61"], + pin62: ["TMS"], + pin63: ["pin63"], + pin64: ["GPIO32"], + pin65: ["GPIO56"], + pin66: ["GPIO57"], + pin67: ["GPIO58"], + pin68: ["pin68"], + pin69: ["pin69"], + pin70: ["VDDIO2"], + pin71: ["VDD2"], + pin72: ["VSS2"], + pin73: ["VREGENZ"], + pin74: ["GPIO8"], + pin75: ["GPIO4"], + pin76: ["GPIO3"], + pin77: ["GPIO2"], + pin78: ["GPIO1"], + pin79: ["GPIO0"], + pin80: ["GPIO40"], + pin81: ["GPIO23"], + pin82: ["GPIO41"], + pin83: ["GPIO22"], + pin84: ["GPIO7"], + pin85: ["GPIO44"], + pin86: ["VSS1"], + pin87: ["VDD1"], + pin88: ["VDDIO1"], + pin89: ["GPIO5"], + pin90: ["GPIO9"], + pin91: ["GPIO61"], + pin92: ["GPIO59"], + pin93: ["GPIO10"], + pin94: ["GPIO34"], + pin95: ["GPIO15"], + pin96: ["GPIO14"], + pin97: ["GPIO6"], + pin98: ["GPIO30"], + pin99: ["GPIO31"], + pin100: ["GPIO29"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, + pin34: { requiresPower: true }, + pin45: { requiresGround: true }, + pin71: { requiresPower: true }, + pin72: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresPower: true }, +} as const; + +export const F28P550SJ9PZR = (props: ChipProps) => { + return ( + + ); +}; + +export default F28P550SJ9PZR; diff --git a/lib/chips/F28P650DK6PZPR.circuit.tsx b/lib/chips/F28P650DK6PZPR.circuit.tsx new file mode 100644 index 00000000..da55aece --- /dev/null +++ b/lib/chips/F28P650DK6PZPR.circuit.tsx @@ -0,0 +1,148 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO11"], + pin2: ["GPIO100"], + pin3: ["GPIO12"], + pin4: ["GPIO13"], + pin5: ["GPIO14"], + pin6: ["GPIO15"], + pin7: ["VDDIO7"], + pin8: ["VDD5"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["C2"], + pin16: ["pin16"], + pin17: ["VSSA2"], + pin18: ["VDDA2"], + pin19: ["pin19"], + pin20: ["A5"], + pin21: ["A4"], + pin22: ["A3"], + pin23: ["A2"], + pin24: ["A1"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["B2"], + pin31: ["B3"], + pin32: ["VREFLOB"], + pin33: ["VSSA1"], + pin34: ["VREFHIB"], + pin35: ["VDDA1"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["VDDIO6"], + pin42: ["GPIO34"], + pin43: ["GPIO35"], + pin44: ["VDD3VFL"], + pin45: ["VDD4"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["GPIO30"], + pin49: ["TMS"], + pin50: ["TCK"], + pin51: ["GPIO41"], + pin52: ["GPIO58"], + pin53: ["GPIO59"], + pin54: ["GPIO60"], + pin55: ["VDDIO5"], + pin56: ["GPIO61"], + pin57: ["GPIO62"], + pin58: ["GPIO63"], + pin59: ["GPIO64"], + pin60: ["GPIO65"], + pin61: ["GPIO66"], + pin62: ["VDDIO4"], + pin63: ["VDD3"], + pin64: ["VREGENZ"], + pin65: ["VDDOSC"], + pin66: ["pin66"], + pin67: ["VSSOSC"], + pin68: ["pin68"], + pin69: ["XRSn"], + pin70: ["VDDIO3"], + pin71: ["GPIO46"], + pin72: ["GPIO47"], + pin73: ["GPIO42"], + pin74: ["GPIO43"], + pin75: ["GPIO69"], + pin76: ["GPIO70"], + pin77: ["GPIO71"], + pin78: ["VDD2"], + pin79: ["VDDIO2"], + pin80: ["GPIO72"], + pin81: ["GPIO73"], + pin82: ["GPIO78"], + pin83: ["GPIO80"], + pin84: ["GPIO25"], + pin85: ["GPIO84"], + pin86: ["GPIO85"], + pin87: ["GPIO86"], + pin88: ["GPIO87"], + pin89: ["GPIO0"], + pin90: ["GPIO1"], + pin91: ["GPIO2"], + pin92: ["GPIO3"], + pin93: ["GPIO4"], + pin94: ["VDDIO1"], + pin95: ["VDD1"], + pin96: ["GPIO89"], + pin97: ["GPIO90"], + pin98: ["GPIO91"], + pin99: ["GPIO92"], + pin100: ["GPIO10"], + pin101: ["VSS"], +} as const; + +const pinAttributes = { + pin8: { requiresPower: true }, + pin18: { requiresPower: true }, + pin35: { requiresPower: true }, + pin45: { requiresPower: true }, + pin63: { requiresPower: true }, + pin78: { requiresPower: true }, + pin95: { requiresPower: true }, + pin101: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin101: [...pinLabels["pin101"], "thermalpad"], +} as const; + +export const F28P650DK6PZPR = (props: ChipProps) => { + return ( + + ); +}; + +export default F28P650DK6PZPR; diff --git a/lib/chips/FDC2212DNTR.circuit.tsx b/lib/chips/FDC2212DNTR.circuit.tsx new file mode 100644 index 00000000..bdb477e0 --- /dev/null +++ b/lib/chips/FDC2212DNTR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["CLKIN"], + pin4: ["ADDR"], + pin5: ["INTB"], + pin6: ["SD"], + pin7: ["VDD"], + pin8: ["GND1"], + pin9: ["IN0A"], + pin10: ["IN0B"], + pin11: ["IN1A"], + pin12: ["IN1B"], + pin13: ["GND2"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, + pin13: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const FDC2212DNTR = (props: ChipProps) => { + return ( + + ); +}; + +export default FDC2212DNTR; diff --git a/lib/chips/HD3SS3220RNHT.circuit.tsx b/lib/chips/HD3SS3220RNHT.circuit.tsx new file mode 100644 index 00000000..347792eb --- /dev/null +++ b/lib/chips/HD3SS3220RNHT.circuit.tsx @@ -0,0 +1,454 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CC2"], + pin2: ["CC1"], + pin3: ["CURRENT_MODE"], + pin4: ["PORT"], + pin5: ["VBUS_DET"], + pin6: ["TXp"], + pin7: ["TXn"], + pin8: ["VCC33"], + pin9: ["RXp"], + pin10: ["RXn"], + pin11: ["DIR"], + pin12: ["ENn_MUX"], + pin13: ["GND1"], + pin14: ["RX1n"], + pin15: ["RX1p"], + pin16: ["TX1n"], + pin17: ["TX1p"], + pin18: ["RX2n"], + pin19: ["RX2p"], + pin20: ["TX2n"], + pin21: ["TX2p"], + pin22: ["ADDR"], + pin23: ["pin23"], + pin24: ["VCONN_FAULT_N"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["ID"], + pin28: ["GND2"], + pin29: ["ENn_CC"], + pin30: ["VDD5"], + pin31: ["EP"], +} as const; + +export const HD3SS3220RNHT = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2155924.obj?uuid=db8cca3278554dd79dd0e7b7f825ecec", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2155924.step?uuid=db8cca3278554dd79dd0e7b7f825ecec", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012700000070253736, + y: 0.000012699999842880061, + z: -0.025, + }, + }} + {...restProps} + /> + ); +}; + +export default HD3SS3220RNHT; diff --git a/lib/chips/HDC3020.circuit.tsx b/lib/chips/HDC3020.circuit.tsx index e190c81b..7fa8d715 100644 --- a/lib/chips/HDC3020.circuit.tsx +++ b/lib/chips/HDC3020.circuit.tsx @@ -18,3 +18,5 @@ export const HDC3020 = ({ return ; }; + +export default HDC3020; diff --git a/lib/chips/HDC3020DEFR.circuit.tsx b/lib/chips/HDC3020DEFR.circuit.tsx index e35b3a43..c1dc68db 100644 --- a/lib/chips/HDC3020DEFR.circuit.tsx +++ b/lib/chips/HDC3020DEFR.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: ["I2C_SDA", "SDA"], @@ -15,12 +16,13 @@ const pinLabels = { export const HDC3020DEFR = (props: ChipProps) => { return ( ) => { /> ); }; + +export default HDC3020DEFR; diff --git a/lib/chips/HDC3021QDEHRQ1.circuit.tsx b/lib/chips/HDC3021QDEHRQ1.circuit.tsx new file mode 100644 index 00000000..caf9da57 --- /dev/null +++ b/lib/chips/HDC3021QDEHRQ1.circuit.tsx @@ -0,0 +1,122 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SDA", "1"], + pin2: ["ADDR", "2"], + pin3: ["ALERT", "3"], + pin4: ["SCL", "4"], + pin5: ["VDD", "5"], + pin6: ["RESET", "6"], + pin7: ["ADDR1", "7"], + pin8: ["GND", "8"], + pin9: ["THERMAL_PAD", "9"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "control", + pin3: "output", + pin4: "control", + pin5: "power", + pin6: "control", + pin7: "control", + pin8: "ground", + pin9: "thermal", +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +export const HDC3021QDEHRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DEH0008A; official source https://www.ti.com/lit/gpn/HDC3021-Q1 pages 44 + return ( + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default HDC3021QDEHRQ1; diff --git a/lib/chips/HDC3022.circuit.tsx b/lib/chips/HDC3022.circuit.tsx index 4856fc59..4341cb25 100644 --- a/lib/chips/HDC3022.circuit.tsx +++ b/lib/chips/HDC3022.circuit.tsx @@ -18,3 +18,5 @@ export const HDC3022 = ({ return ; }; + +export default HDC3022; diff --git a/lib/chips/HDC3022DEJR.circuit.tsx b/lib/chips/HDC3022DEJR.circuit.tsx index 20498dc2..dca291e4 100644 --- a/lib/chips/HDC3022DEJR.circuit.tsx +++ b/lib/chips/HDC3022DEJR.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: ["I2C_SDA", "SDA"], @@ -15,12 +16,13 @@ const pinLabels = { export const HDC3022DEJR = (props: ChipProps) => { return ( ) => { /> ); }; + +export default HDC3022DEJR; diff --git a/lib/chips/INA138NA_3K.circuit.tsx b/lib/chips/INA138NA_3K.circuit.tsx new file mode 100644 index 00000000..dc324881 --- /dev/null +++ b/lib/chips/INA138NA_3K.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["_POS"], + pin4: ["_NEG"], + pin5: ["V_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA138NA_3K = (props: ChipProps) => { + return ( + + ); +}; + +export default INA138NA_3K; diff --git a/lib/chips/INA138QPWRQ1.circuit.tsx b/lib/chips/INA138QPWRQ1.circuit.tsx new file mode 100644 index 00000000..3a22c2e0 --- /dev/null +++ b/lib/chips/INA138QPWRQ1.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["VIN_POS"], + pin3: ["NC1"], + pin4: ["GND"], + pin5: ["NC3"], + pin6: ["OUT"], + pin7: ["NC2"], + pin8: ["V_POS"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { requiresGround: true }, + pin5: { doNotConnect: true }, + pin7: { doNotConnect: true }, +} as const; + +export const INA138QPWRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default INA138QPWRQ1; diff --git a/lib/chips/INA139NA_3K.circuit.tsx b/lib/chips/INA139NA_3K.circuit.tsx new file mode 100644 index 00000000..bed4f38b --- /dev/null +++ b/lib/chips/INA139NA_3K.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["VIN_POS"], + pin4: ["VIN_NEG"], + pin5: ["V_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA139NA_3K = (props: ChipProps) => { + return ( + + ); +}; + +export default INA139NA_3K; diff --git a/lib/chips/INA169NA_3K.circuit.tsx b/lib/chips/INA169NA_3K.circuit.tsx new file mode 100644 index 00000000..eb5101ae --- /dev/null +++ b/lib/chips/INA169NA_3K.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["VIN_POS"], + pin4: ["VIN_NEG"], + pin5: ["V_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA169NA_3K = (props: ChipProps) => { + return ( + + ); +}; + +export default INA169NA_3K; diff --git a/lib/chips/INA181A2IDBVR.circuit.tsx b/lib/chips/INA181A2IDBVR.circuit.tsx new file mode 100644 index 00000000..ca685c04 --- /dev/null +++ b/lib/chips/INA181A2IDBVR.circuit.tsx @@ -0,0 +1,153 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["REF"], + pin6: ["VS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA181A2IDBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2058784.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2058784.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default INA181A2IDBVR; diff --git a/lib/chips/INA186A2IDDFR.circuit.tsx b/lib/chips/INA186A2IDDFR.circuit.tsx new file mode 100644 index 00000000..0ac952f3 --- /dev/null +++ b/lib/chips/INA186A2IDDFR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VS"], + pin2: ["ENABLE"], + pin3: ["REF"], + pin4: ["GND"], + pin5: ["OUT"], + pin6: ["NC"], + pin7: ["IN_POS"], + pin8: ["IN_NEG"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { doNotConnect: true }, +} as const; + +export const INA186A2IDDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA186A2IDDFR; diff --git a/lib/chips/INA188IDR.circuit.tsx b/lib/chips/INA188IDR.circuit.tsx new file mode 100644 index 00000000..6b6aaa98 --- /dev/null +++ b/lib/chips/INA188IDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RG2"], + pin2: ["VIN_NEG"], + pin3: ["VIN_POS"], + pin4: ["V_NEG"], + pin5: ["REF"], + pin6: ["VOUT"], + pin7: ["V_POS"], + pin8: ["RG1"], +} as const; + +export const INA188IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA188IDR; diff --git a/lib/chips/INA199A3DCKR.circuit.tsx b/lib/chips/INA199A3DCKR.circuit.tsx new file mode 100644 index 00000000..cbb3dd86 --- /dev/null +++ b/lib/chips/INA199A3DCKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["GND"], + pin3: ["V_POS"], + pin4: ["IN_POS"], + pin5: ["IN_NEG"], + pin6: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA199A3DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA199A3DCKR; diff --git a/lib/chips/INA213BIDCKT.circuit.tsx b/lib/chips/INA213BIDCKT.circuit.tsx new file mode 100644 index 00000000..cf441f8f --- /dev/null +++ b/lib/chips/INA213BIDCKT.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["GND"], + pin3: ["V_POS"], + pin4: ["IN_POS"], + pin5: ["IN_NEG"], + pin6: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA213BIDCKT = (props: ChipProps) => { + return ( + + ); +}; + +export default INA213BIDCKT; diff --git a/lib/chips/INA2181A2IDGSR.circuit.tsx b/lib/chips/INA2181A2IDGSR.circuit.tsx new file mode 100644 index 00000000..691117a5 --- /dev/null +++ b/lib/chips/INA2181A2IDGSR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin4: ["GND", "4"], + pin2: ["IN_1", "2", "IN_1_2"], + pin3: ["IN_1", "3", "IN_1_3"], + pin8: ["IN_2", "8", "IN_2_8"], + pin7: ["IN_2", "7", "IN_2_7"], + pin1: ["OUT1", "1"], + pin9: ["OUT2", "9"], + pin5: ["REF1", "5"], + pin6: ["REF2", "6"], + pin10: ["VS", "10"], +} as const; + +const pinRoles = { + pin4: "ground", + pin10: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin10: { + requiresPower: true, + }, +} as const; + +export const INA2181A2IDGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA2181A2IDGSR; diff --git a/lib/chips/INA228AIDGSR.circuit.tsx b/lib/chips/INA228AIDGSR.circuit.tsx new file mode 100644 index 00000000..e704ffca --- /dev/null +++ b/lib/chips/INA228AIDGSR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A1"], + pin2: ["A0"], + pin3: ["ALERT"], + pin4: ["SDA"], + pin5: ["SCL"], + pin6: ["VS"], + pin7: ["GND"], + pin8: ["VBUS"], + pin9: ["pin9"], + pin10: ["IN_POS"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, +} as const; + +export const INA228AIDGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA228AIDGSR; diff --git a/lib/chips/INA230AIRGTR.circuit.tsx b/lib/chips/INA230AIRGTR.circuit.tsx new file mode 100644 index 00000000..fd5308ee --- /dev/null +++ b/lib/chips/INA230AIRGTR.circuit.tsx @@ -0,0 +1,67 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A1"], + pin2: ["A0"], + pin3: ["ALERT"], + pin4: ["SDA"], + pin5: ["SCL"], + pin6: ["NC6"], + pin7: ["NC5"], + pin8: ["NC4"], + pin9: ["VS"], + pin10: ["GND"], + pin11: ["VBUS"], + pin12: ["IN_NEG"], + pin13: ["IN_POS"], + pin14: ["NC3"], + pin15: ["NC2"], + pin16: ["NC1"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin6: { doNotConnect: true }, + pin7: { doNotConnect: true }, + pin8: { doNotConnect: true }, + pin10: { requiresGround: true }, + pin14: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin16: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const INA230AIRGTR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA230AIRGTR; diff --git a/lib/chips/INA236AIYBJR.circuit.tsx b/lib/chips/INA236AIYBJR.circuit.tsx new file mode 100644 index 00000000..45bf8485 --- /dev/null +++ b/lib/chips/INA236AIYBJR.circuit.tsx @@ -0,0 +1,153 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["A0", "B1"], + pin1: ["ALERT", "A1"], + pin6: ["GND", "C2"], + pin4: ["IN_N", "B2"], + pin2: ["IN_P", "A2"], + pin7: ["SCL", "D1"], + pin5: ["SDA", "C1"], + pin8: ["VS", "D2"], +} as const; + +const pinRoles = { + pin6: "ground", + pin8: "power", +} as const; + +const pinAttributes = { + pin6: { + requiresGround: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const INA236AIYBJR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C4371025.obj?uuid=e7223c5f64384b14b8def47657d1a5b0", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C4371025.step?uuid=e7223c5f64384b14b8def47657d1a5b0", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.000012700000013410317, + y: 0.000012700000013410317, + z: -0.3, + }, + }} + {...props} + /> + ); +}; + +export default INA236AIYBJR; diff --git a/lib/chips/INA240A1DR.circuit.tsx b/lib/chips/INA240A1DR.circuit.tsx new file mode 100644 index 00000000..a0ca864e --- /dev/null +++ b/lib/chips/INA240A1DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["REF2"], + pin4: ["NC"], + pin5: ["OUT"], + pin6: ["VS"], + pin7: ["REF1"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const INA240A1DR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA240A1DR; diff --git a/lib/chips/INA240A3QDRQ1.circuit.tsx b/lib/chips/INA240A3QDRQ1.circuit.tsx new file mode 100644 index 00000000..5d511347 --- /dev/null +++ b/lib/chips/INA240A3QDRQ1.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["REF2"], + pin4: ["NC"], + pin5: ["OUT"], + pin6: ["VS"], + pin7: ["REF1"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const INA240A3QDRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default INA240A3QDRQ1; diff --git a/lib/chips/INA241A5IDDFR.circuit.tsx b/lib/chips/INA241A5IDDFR.circuit.tsx new file mode 100644 index 00000000..38debf2a --- /dev/null +++ b/lib/chips/INA241A5IDDFR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["REF2"], + pin4: ["NC"], + pin5: ["OUT"], + pin6: ["VS"], + pin7: ["REF1"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const INA241A5IDDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA241A5IDDFR; diff --git a/lib/chips/INA280A3IDCKT.circuit.tsx b/lib/chips/INA280A3IDCKT.circuit.tsx new file mode 100644 index 00000000..28327167 --- /dev/null +++ b/lib/chips/INA280A3IDCKT.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT", "1"], + pin2: ["GND", "2"], + pin3: ["VS", "3"], + pin4: ["IN", "4", "IN_4"], + pin5: ["IN", "5", "IN_5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "ground", + pin3: "power", + pin4: "input", + pin5: "input", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const INA280A3IDCKT = (props: ChipProps) => { + // Footprint provenance: TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350) + return ( + + ); +}; + +export default INA280A3IDCKT; diff --git a/lib/chips/INA281A3IDBVR.circuit.tsx b/lib/chips/INA281A3IDBVR.circuit.tsx new file mode 100644 index 00000000..3b0cdc1f --- /dev/null +++ b/lib/chips/INA281A3IDBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["VS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const INA281A3IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA281A3IDBVR; diff --git a/lib/chips/INA296A4IDDFR.circuit.tsx b/lib/chips/INA296A4IDDFR.circuit.tsx new file mode 100644 index 00000000..a6986b28 --- /dev/null +++ b/lib/chips/INA296A4IDDFR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["REF2"], + pin4: ["NC"], + pin5: ["OUT"], + pin6: ["Vs"], + pin7: ["REF1"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const INA296A4IDDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA296A4IDDFR; diff --git a/lib/chips/INA296B4IDDFR.circuit.tsx b/lib/chips/INA296B4IDDFR.circuit.tsx new file mode 100644 index 00000000..5820ddf1 --- /dev/null +++ b/lib/chips/INA296B4IDDFR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["REF2"], + pin4: ["NC"], + pin5: ["OUT"], + pin6: ["VS"], + pin7: ["REF1"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const INA296B4IDDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA296B4IDDFR; diff --git a/lib/chips/INA310A4IDGKR.circuit.tsx b/lib/chips/INA310A4IDGKR.circuit.tsx new file mode 100644 index 00000000..cb32d915 --- /dev/null +++ b/lib/chips/INA310A4IDGKR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VS"], + pin2: ["OUT"], + pin3: ["CMPIN"], + pin4: ["GND"], + pin5: ["RESET"], + pin6: ["CMPOUT"], + pin7: ["pin7"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, +} as const; + +export const INA310A4IDGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA310A4IDGKR; diff --git a/lib/chips/INA3221AIRGVR.circuit.tsx b/lib/chips/INA3221AIRGVR.circuit.tsx new file mode 100644 index 00000000..0a90790f --- /dev/null +++ b/lib/chips/INA3221AIRGVR.circuit.tsx @@ -0,0 +1,61 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_N3"], + pin2: ["IN_P3"], + pin3: ["GND"], + pin4: ["VS"], + pin5: ["A0"], + pin6: ["SCL"], + pin7: ["SDA"], + pin8: ["WARNING"], + pin9: ["CRITICAL"], + pin10: ["PV"], + pin11: ["IN_N1"], + pin12: ["IN_P1"], + pin13: ["TC"], + pin14: ["IN_N2"], + pin15: ["IN_P2"], + pin16: ["VPU"], + pin17: ["PAD"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const INA3221AIRGVR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA3221AIRGVR; diff --git a/lib/chips/INA818IDR.circuit.tsx b/lib/chips/INA818IDR.circuit.tsx new file mode 100644 index 00000000..bf39e77f --- /dev/null +++ b/lib/chips/INA818IDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RG2"], + pin2: ["IN_N"], + pin3: ["IN_P"], + pin4: ["VS_N"], + pin5: ["REF"], + pin6: ["OUT"], + pin7: ["VS_P"], + pin8: ["RG1"], +} as const; + +export const INA818IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA818IDR; diff --git a/lib/chips/INA826AIDR.circuit.tsx b/lib/chips/INA826AIDR.circuit.tsx new file mode 100644 index 00000000..eb768224 --- /dev/null +++ b/lib/chips/INA826AIDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["RG2"], + pin3: ["RG1"], + pin4: ["IN_POS"], + pin5: ["VS_NEG"], + pin6: ["REF"], + pin7: ["VOUT"], + pin8: ["VS_POS"], +} as const; + +export const INA826AIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default INA826AIDR; diff --git a/lib/chips/ISO1042DWR.circuit.tsx b/lib/chips/ISO1042DWR.circuit.tsx new file mode 100644 index 00000000..a3c80eb3 --- /dev/null +++ b/lib/chips/ISO1042DWR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["TXD"], + pin4: ["NC1"], + pin5: ["RXD"], + pin6: ["NC2"], + pin7: ["NC3"], + pin8: ["GND12"], + pin9: ["GND23"], + pin10: ["GND22"], + pin11: ["VCC22"], + pin12: ["CANL"], + pin13: ["CANH"], + pin14: ["NC4"], + pin15: ["GND21"], + pin16: ["VCC21"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin6: { doNotConnect: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { requiresPower: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO1042DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1042DWR; diff --git a/lib/chips/ISO1044BD.circuit.tsx b/lib/chips/ISO1044BD.circuit.tsx new file mode 100644 index 00000000..f72eeb73 --- /dev/null +++ b/lib/chips/ISO1044BD.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["TXD"], + pin3: ["RXD"], + pin4: ["GND1"], + pin5: ["CANL"], + pin6: ["CANH"], + pin7: ["GND2"], + pin8: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO1044BD = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1044BD; diff --git a/lib/chips/ISO1050DWR.circuit.tsx b/lib/chips/ISO1050DWR.circuit.tsx new file mode 100644 index 00000000..9745612c --- /dev/null +++ b/lib/chips/ISO1050DWR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["RXD"], + pin4: ["NC1"], + pin5: ["NC2"], + pin6: ["TXD"], + pin7: ["GND12"], + pin8: ["GND13"], + pin9: ["GND23"], + pin10: ["GND22"], + pin11: ["NC4"], + pin12: ["CANL"], + pin13: ["CANH"], + pin14: ["NC3"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin5: { doNotConnect: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO1050DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1050DWR; diff --git a/lib/chips/ISO1176DWR.circuit.tsx b/lib/chips/ISO1176DWR.circuit.tsx new file mode 100644 index 00000000..f1ffac8d --- /dev/null +++ b/lib/chips/ISO1176DWR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["R"], + pin4: ["RE"], + pin5: ["DE"], + pin6: ["D"], + pin7: ["PV"], + pin8: ["GND12"], + pin9: ["GND22"], + pin10: ["ISODE"], + pin11: ["NC2"], + pin12: ["A"], + pin13: ["B"], + pin14: ["NC1"], + pin15: ["GND21"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO1176DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1176DWR; diff --git a/lib/chips/ISO1410BDWR.circuit.tsx b/lib/chips/ISO1410BDWR.circuit.tsx new file mode 100644 index 00000000..e26109b2 --- /dev/null +++ b/lib/chips/ISO1410BDWR.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["R"], + pin4: ["RE"], + pin5: ["DE"], + pin6: ["D"], + pin7: ["NC1"], + pin8: ["GND12"], + pin9: ["GND22"], + pin10: ["NC4"], + pin11: ["NC3"], + pin12: ["A"], + pin13: ["B"], + pin14: ["NC2"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { doNotConnect: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO1410BDWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1410BDWR; diff --git a/lib/chips/ISO1541DR.circuit.tsx b/lib/chips/ISO1541DR.circuit.tsx new file mode 100644 index 00000000..ff22c434 --- /dev/null +++ b/lib/chips/ISO1541DR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["SDA1"], + pin3: ["SCL1"], + pin4: ["GND1"], + pin5: ["GND2"], + pin6: ["SCL2"], + pin7: ["SDA2"], + pin8: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO1541DR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO1541DR; diff --git a/lib/chips/ISO3082DWR.circuit.tsx b/lib/chips/ISO3082DWR.circuit.tsx new file mode 100644 index 00000000..89e973fb --- /dev/null +++ b/lib/chips/ISO3082DWR.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["R"], + pin4: ["RE"], + pin5: ["DE"], + pin6: ["D"], + pin7: ["GND12"], + pin8: ["GND13"], + pin9: ["GND23"], + pin10: ["GND22"], + pin11: ["NC2"], + pin12: ["A"], + pin13: ["B"], + pin14: ["NC1"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO3082DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO3082DWR; diff --git a/lib/chips/ISO3088DWR.circuit.tsx b/lib/chips/ISO3088DWR.circuit.tsx new file mode 100644 index 00000000..a7bc7412 --- /dev/null +++ b/lib/chips/ISO3088DWR.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["R"], + pin4: ["N_RE"], + pin5: ["DE"], + pin6: ["D"], + pin7: ["GND12"], + pin8: ["GND13"], + pin9: ["GND23"], + pin10: ["GND22"], + pin11: ["NC2"], + pin12: ["A"], + pin13: ["B"], + pin14: ["NC1"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO3088DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO3088DWR; diff --git a/lib/chips/ISO5452DWR.circuit.tsx b/lib/chips/ISO5452DWR.circuit.tsx new file mode 100644 index 00000000..f7fd1e57 --- /dev/null +++ b/lib/chips/ISO5452DWR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VEE21"], + pin2: ["DESAT"], + pin3: ["GND2"], + pin4: ["OUTH"], + pin5: ["VCC2"], + pin6: ["OUTL"], + pin7: ["CLAMP"], + pin8: ["VEE22"], + pin9: ["GND12"], + pin10: ["IN_POS"], + pin11: ["IN_NEG"], + pin12: ["RDY"], + pin13: ["FLT"], + pin14: ["RST"], + pin15: ["VCC1"], + pin16: ["GND11"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, + pin9: { requiresGround: true }, + pin15: { requiresPower: true }, + pin16: { requiresGround: true }, +} as const; + +export const ISO5452DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO5452DWR; diff --git a/lib/chips/ISO5851DWR.circuit.tsx b/lib/chips/ISO5851DWR.circuit.tsx new file mode 100644 index 00000000..75e353dd --- /dev/null +++ b/lib/chips/ISO5851DWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VEE21"], + pin2: ["DESAT"], + pin3: ["GND2"], + pin4: ["NC"], + pin5: ["VCC2"], + pin6: ["OUT"], + pin7: ["CLAMP"], + pin8: ["VEE22"], + pin9: ["GND12"], + pin10: ["IN_POS"], + pin11: ["IN_NEG"], + pin12: ["RDY"], + pin13: ["FLT"], + pin14: ["RST"], + pin15: ["VCC1"], + pin16: ["GND11"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin5: { requiresPower: true }, + pin9: { requiresGround: true }, + pin15: { requiresPower: true }, + pin16: { requiresGround: true }, +} as const; + +export const ISO5851DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO5851DWR; diff --git a/lib/chips/ISO6420DR.circuit.tsx b/lib/chips/ISO6420DR.circuit.tsx new file mode 100644 index 00000000..d8d12b88 --- /dev/null +++ b/lib/chips/ISO6420DR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["INA", "2"], + pin3: ["INB", "3"], + pin4: ["GND1", "4"], + pin5: ["GND2", "5"], + pin6: ["OUTB", "6"], + pin7: ["OUTA", "7"], + pin8: ["VCC2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "input", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO6420DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307) + return ( + + ); +}; + +export default ISO6420DR; diff --git a/lib/chips/ISO6421DR.circuit.tsx b/lib/chips/ISO6421DR.circuit.tsx new file mode 100644 index 00000000..305b3d2a --- /dev/null +++ b/lib/chips/ISO6421DR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["OUTA", "2"], + pin3: ["INB", "3"], + pin4: ["GND1", "4"], + pin5: ["GND2", "5"], + pin6: ["OUTB", "6"], + pin7: ["INA", "7"], + pin8: ["VCC2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "output", + pin3: "input", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "input", + pin8: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO6421DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307) + return ( + + ); +}; + +export default ISO6421DR; diff --git a/lib/chips/ISO6421DRQ1.circuit.tsx b/lib/chips/ISO6421DRQ1.circuit.tsx new file mode 100644 index 00000000..2e69c1cc --- /dev/null +++ b/lib/chips/ISO6421DRQ1.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["OUTA", "2"], + pin3: ["INB", "3"], + pin4: ["GND1", "4"], + pin5: ["GND2", "5"], + pin6: ["OUTB", "6"], + pin7: ["INA", "7"], + pin8: ["VCC2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "output", + pin3: "input", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "input", + pin8: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO6421DRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307) + return ( + + ); +}; + +export default ISO6421DRQ1; diff --git a/lib/chips/ISO6431DBQR.circuit.tsx b/lib/chips/ISO6431DBQR.circuit.tsx new file mode 100644 index 00000000..798df2de --- /dev/null +++ b/lib/chips/ISO6431DBQR.circuit.tsx @@ -0,0 +1,69 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["GND1", "2", "GND1_2"], + pin3: ["INA", "3"], + pin4: ["NC", "4", "NC_4"], + pin5: ["OUTC", "5"], + pin6: ["NC", "6", "NC_6"], + pin7: ["EN1", "7"], + pin8: ["GND1", "8", "GND1_8"], + pin9: ["GND2", "9", "GND2_9"], + pin10: ["EN2", "10"], + pin11: ["NC", "11", "NC_11"], + pin12: ["INC", "12"], + pin13: ["NC", "13", "NC_13"], + pin14: ["OUTA", "14"], + pin15: ["GND2", "15", "GND2_15"], + pin16: ["NC", "16", "NC_16"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "input", + pin4: "no-connect", + pin5: "output", + pin6: "no-connect", + pin7: "output", + pin8: "ground", + pin9: "ground", + pin10: "output", + pin11: "no-connect", + pin12: "input", + pin13: "no-connect", + pin14: "output", + pin15: "ground", + pin16: "no-connect", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin6: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin13: { doNotConnect: true }, + pin15: { requiresGround: true }, + pin16: { doNotConnect: true }, +} as const; + +export const ISO6431DBQR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628) + return ( + + ); +}; + +export default ISO6431DBQR; diff --git a/lib/chips/ISO6440DBQR.circuit.tsx b/lib/chips/ISO6440DBQR.circuit.tsx new file mode 100644 index 00000000..9af4c0b8 --- /dev/null +++ b/lib/chips/ISO6440DBQR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["GND1", "2", "GND1_2"], + pin3: ["INA", "3"], + pin4: ["INB", "4"], + pin5: ["INC", "5"], + pin6: ["IND", "6"], + pin7: ["NC", "7"], + pin8: ["GND1", "8", "GND1_8"], + pin9: ["GND2", "9", "GND2_9"], + pin10: ["EN2", "10"], + pin11: ["OUTD", "11"], + pin12: ["OUTC", "12"], + pin13: ["OUTB", "13"], + pin14: ["OUTA", "14"], + pin15: ["GND2", "15", "GND2_15"], + pin16: ["VCC2", "16"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "no-connect", + pin8: "ground", + pin9: "ground", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "output", + pin15: "ground", + pin16: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO6440DBQR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628) + return ( + + ); +}; + +export default ISO6440DBQR; diff --git a/lib/chips/ISO6440DBQRQ1.circuit.tsx b/lib/chips/ISO6440DBQRQ1.circuit.tsx new file mode 100644 index 00000000..a226ae4f --- /dev/null +++ b/lib/chips/ISO6440DBQRQ1.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["GND1", "2", "GND1_2"], + pin3: ["INA", "3"], + pin4: ["INB", "4"], + pin5: ["INC", "5"], + pin6: ["IND", "6"], + pin7: ["NC", "7"], + pin8: ["GND1", "8", "GND1_8"], + pin9: ["GND2", "9", "GND2_9"], + pin10: ["EN2", "10"], + pin11: ["OUTD", "11"], + pin12: ["OUTC", "12"], + pin13: ["OUTB", "13"], + pin14: ["OUTA", "14"], + pin15: ["GND2", "15", "GND2_15"], + pin16: ["VCC2", "16"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "no-connect", + pin8: "ground", + pin9: "ground", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "output", + pin15: "ground", + pin16: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO6440DBQRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628) + return ( + + ); +}; + +export default ISO6440DBQRQ1; diff --git a/lib/chips/ISO6441DWR.circuit.tsx b/lib/chips/ISO6441DWR.circuit.tsx new file mode 100644 index 00000000..807af927 --- /dev/null +++ b/lib/chips/ISO6441DWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["INA"], + pin4: ["INB"], + pin5: ["INC"], + pin6: ["OUTD"], + pin7: ["EN1"], + pin8: ["GND12"], + pin9: ["GND22"], + pin10: ["EN2"], + pin11: ["IND"], + pin12: ["OUTC"], + pin13: ["OUTB"], + pin14: ["OUTA"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO6441DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO6441DWR; diff --git a/lib/chips/ISO6442DBQR.circuit.tsx b/lib/chips/ISO6442DBQR.circuit.tsx new file mode 100644 index 00000000..0db49a79 --- /dev/null +++ b/lib/chips/ISO6442DBQR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1", "1"], + pin2: ["GND1", "2", "GND1_2"], + pin3: ["INA", "3"], + pin4: ["INB", "4"], + pin5: ["OUTC", "5"], + pin6: ["OUTD", "6"], + pin7: ["EN1", "7"], + pin8: ["GND1", "8", "GND1_8"], + pin9: ["GND2", "9", "GND2_9"], + pin10: ["EN2", "10"], + pin11: ["IND", "11"], + pin12: ["INC", "12"], + pin13: ["OUTB", "13"], + pin14: ["OUTA", "14"], + pin15: ["GND2", "15", "GND2_15"], + pin16: ["VCC2", "16"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "input", + pin4: "input", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "ground", + pin9: "ground", + pin10: "output", + pin11: "input", + pin12: "input", + pin13: "output", + pin14: "output", + pin15: "ground", + pin16: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO6442DBQR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628) + return ( + + ); +}; + +export default ISO6442DBQR; diff --git a/lib/chips/ISO6521REUR.circuit.tsx b/lib/chips/ISO6521REUR.circuit.tsx new file mode 100644 index 00000000..04d45d03 --- /dev/null +++ b/lib/chips/ISO6521REUR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["OUTA"], + pin3: ["INB"], + pin4: ["GND1"], + pin5: ["GND2"], + pin6: ["OUTB"], + pin7: ["INA"], + pin8: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const ISO6521REUR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO6521REUR; diff --git a/lib/chips/ISO7760DBQR.circuit.tsx b/lib/chips/ISO7760DBQR.circuit.tsx new file mode 100644 index 00000000..7e70fc0c --- /dev/null +++ b/lib/chips/ISO7760DBQR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["INA"], + pin3: ["INB"], + pin4: ["INC"], + pin5: ["IND"], + pin6: ["INE"], + pin7: ["INF"], + pin8: ["GND1"], + pin9: ["GND2"], + pin10: ["OUTF"], + pin11: ["OUTE"], + pin12: ["OUTD"], + pin13: ["OUTC"], + pin14: ["OUTB"], + pin15: ["OUTA"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO7760DBQR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO7760DBQR; diff --git a/lib/chips/ISO7841FDWW.circuit.tsx b/lib/chips/ISO7841FDWW.circuit.tsx new file mode 100644 index 00000000..e26b6368 --- /dev/null +++ b/lib/chips/ISO7841FDWW.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["INA"], + pin4: ["INB"], + pin5: ["INC"], + pin6: ["OUTD"], + pin7: ["EN1"], + pin8: ["GND12"], + pin9: ["GND22"], + pin10: ["EN2"], + pin11: ["IND"], + pin12: ["OUTC"], + pin13: ["OUTB"], + pin14: ["OUTA"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO7841FDWW = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO7841FDWW; diff --git a/lib/chips/ISO7842DWR.circuit.tsx b/lib/chips/ISO7842DWR.circuit.tsx new file mode 100644 index 00000000..d3a0798a --- /dev/null +++ b/lib/chips/ISO7842DWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["GND11"], + pin3: ["INA"], + pin4: ["INB"], + pin5: ["OUTC"], + pin6: ["OUTD"], + pin7: ["EN1"], + pin8: ["GND12"], + pin9: ["GND22"], + pin10: ["EN2"], + pin11: ["IND"], + pin12: ["INC"], + pin13: ["OUTB"], + pin14: ["OUTA"], + pin15: ["GND21"], + pin16: ["VCC2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const ISO7842DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ISO7842DWR; diff --git a/lib/chips/IWRL6432BDBAAMFR.circuit.tsx b/lib/chips/IWRL6432BDBAAMFR.circuit.tsx new file mode 100644 index 00000000..170fbaf5 --- /dev/null +++ b/lib/chips/IWRL6432BDBAAMFR.circuit.tsx @@ -0,0 +1,1192 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSSA", "A1", "VSSA_A1"], + pin13: ["VSSA", "A2", "VSSA_A2"], + pin25: ["TX1", "A3"], + pin31: ["VSSA", "A4", "VSSA_A4"], + pin35: ["TX2", "A5"], + pin44: ["VSSA", "A6", "VSSA_A6"], + pin51: ["OSC_CLK_OUT", "A7"], + pin58: ["VPP", "A8"], + pin74: ["QSPI_CS", "A10"], + pin82: ["QSPI_SCLK", "A11"], + pin94: ["VSS", "A12", "VSS_A12"], + pin2: ["CLKM", "B1"], + pin14: ["VSSA", "B2", "VSSA_B2"], + pin26: ["VSSA", "B3", "VSSA_B3"], + pin32: ["VSSA", "B4", "VSSA_B4"], + pin36: ["VSSA", "B5", "VSSA_B5"], + pin45: ["VSSA", "B6", "VSSA_B6"], + pin52: ["VSS", "B7", "VSS_B7"], + pin59: ["RTC_CLK_IN", "B8", "RTC_CLK_IN_B8"], + pin67: ["I2C_SDA", "B9", "I2C_SDA_B9"], + pin75: ["I2C_SCL", "B10"], + pin83: ["QSPI_D0", "B11"], + pin95: ["EPWMB", "B12", "EPWMB_B12"], + pin3: ["VSSA", "C1", "VSSA_C1"], + pin15: ["VSSA", "C2", "VSSA_C2"], + pin46: ["VIOIN_18CLK", "C6"], + pin60: ["VIOIN_18", "C8", "VIOIN_18_C8"], + pin68: ["VDD", "C9", "VDD_C9"], + pin84: ["EPWMA", "C11", "EPWMA_C11"], + pin96: ["EPWMB", "C12", "EPWMB_C12"], + pin4: ["CLKP", "D1"], + pin16: ["VSSA", "D2", "VSSA_D2"], + pin27: ["VOUT_14SYNTH", "D3"], + pin76: ["EPWMB", "D10", "EPWMB_D10"], + pin85: ["EPWMA", "D11", "EPWMA_D11"], + pin5: ["VSSA", "E1", "VSSA_E1"], + pin17: ["VSSA", "E2", "VSSA_E2"], + pin37: ["VSSA_PM", "E5"], + pin47: ["VSS", "E6", "VSS_E6"], + pin53: ["VSS", "E7", "VSS_E7"], + pin61: ["VSS", "E8", "VSS_E8"], + pin69: ["VSS", "E9", "VSS_E9"], + pin77: ["EPWM_SYNC_IN", "E10"], + pin86: ["TDO", "E11"], + pin97: ["RTC_CLK_IN", "E12", "RTC_CLK_IN_E12"], + pin6: ["RX3", "F1"], + pin18: ["VSSA", "F2", "VSSA_F2"], + pin28: ["VDDA_18VCO", "F3"], + pin38: ["VSSA", "F5", "VSSA_F5"], + pin48: ["VSS", "F6", "VSS_F6"], + pin54: ["VSS", "F7", "VSS_F7"], + pin62: ["VSS", "F8", "VSS_F8"], + pin70: ["VSS", "F9", "VSS_F9"], + pin87: ["I2C_SDA", "F11", "I2C_SDA_F11"], + pin7: ["VSSA", "G1", "VSSA_G1"], + pin19: ["VSSA", "G2", "VSSA_G2"], + pin39: ["VOUT_14APLL", "G5"], + pin55: ["VDD", "G7", "VDD_G7"], + pin63: ["VDD", "G8", "VDD_G8"], + pin71: ["VDD", "G9", "VDD_G9"], + pin88: ["EPWMA", "G11", "EPWMA_G11"], + pin98: ["VIOIN", "G12", "VIOIN_G12"], + pin8: ["RX2", "H1"], + pin20: ["VSSA", "H2", "VSSA_H2"], + pin40: ["VBGAP", "H5"], + pin64: ["VDD", "H8", "VDD_H8"], + pin78: ["RTC_CLK_IN", "H10", "RTC_CLK_IN_H10"], + pin89: ["PMIC_CLKOUT", "H11"], + pin99: ["VSS", "H12", "VSS_H12"], + pin9: ["VSSA", "J1", "VSSA_J1"], + pin21: ["VSSA", "J2", "VSSA_J2"], + pin41: ["VIN_18PM", "J5"], + pin79: ["EPWMB", "J10", "EPWMB_J10"], + pin90: ["CAN_FD_RX", "J11"], + pin10: ["RX1", "K1"], + pin22: ["VSSA", "K2", "VSSA_K2"], + pin56: ["VDD", "K7", "VDD_K7"], + pin72: ["VSS", "K9", "VSS_K9"], + pin91: ["MCU_CLKOUT", "K11", "MCU_CLKOUT_K11"], + pin100: ["VIOIN_18", "K12", "VIOIN_18_K12"], + pin11: ["VSSA", "L1", "VSSA_L1"], + pin23: ["VSSA", "L2", "VSSA_L2"], + pin29: ["VDDA_10RF", "L3", "VDDA_10RF_L3"], + pin33: ["VDDA_12RF", "L4", "VDDA_12RF_L4"], + pin42: ["VDDA_18BB", "L5", "VDDA_18BB_L5"], + pin49: ["GPADC2", "L6"], + pin65: ["VIOIN_18", "L8", "VIOIN_18_L8"], + pin73: ["VNWA", "L9"], + pin80: ["NRESET", "L10"], + pin92: ["RTC_CLK_IN", "L11", "RTC_CLK_IN_L11"], + pin101: ["CAN_FD_TX", "L12"], + pin12: ["VSSA", "M1", "VSSA_M1"], + pin24: ["VSSA", "M2", "VSSA_M2"], + pin30: ["VDDA_10RF", "M3", "VDDA_10RF_M3"], + pin34: ["VDDA_12RF", "M4", "VDDA_12RF_M4"], + pin43: ["VDDA_18BB", "M5", "VDDA_18BB_M5"], + pin50: ["GPADC1", "M6"], + pin57: ["VDD_SRAM", "M7"], + pin66: ["VIOIN_18", "M8", "VIOIN_18_M8"], + pin81: ["MCU_CLKOUT", "M10", "MCU_CLKOUT_M10"], + pin93: ["VIOIN", "M11", "VIOIN_M11"], + pin102: ["VSS", "M12", "VSS_M12"], +} as const; + +const pinRoles = { + pin1: "ground", + pin13: "ground", + pin31: "ground", + pin44: "ground", + pin58: "power", + pin74: "output", + pin82: "bidirectional", + pin94: "ground", + pin14: "ground", + pin26: "ground", + pin32: "ground", + pin36: "ground", + pin45: "ground", + pin52: "ground", + pin59: "input", + pin67: "bidirectional", + pin75: "bidirectional", + pin83: "bidirectional", + pin95: "output", + pin3: "ground", + pin15: "ground", + pin46: "power", + pin60: "power", + pin68: "power", + pin84: "output", + pin96: "output", + pin16: "ground", + pin76: "output", + pin85: "output", + pin5: "ground", + pin17: "ground", + pin37: "ground", + pin47: "ground", + pin53: "ground", + pin61: "ground", + pin69: "ground", + pin77: "input", + pin86: "output", + pin97: "input", + pin18: "ground", + pin28: "power", + pin38: "ground", + pin48: "ground", + pin54: "ground", + pin62: "ground", + pin70: "ground", + pin87: "bidirectional", + pin7: "ground", + pin19: "ground", + pin55: "power", + pin63: "power", + pin71: "power", + pin88: "output", + pin98: "power", + pin20: "ground", + pin64: "power", + pin78: "input", + pin89: "output", + pin99: "ground", + pin9: "ground", + pin21: "ground", + pin41: "power", + pin79: "output", + pin90: "input", + pin22: "ground", + pin56: "power", + pin72: "ground", + pin91: "output", + pin100: "power", + pin11: "ground", + pin23: "ground", + pin33: "power", + pin42: "power", + pin65: "power", + pin73: "power", + pin101: "output", + pin12: "ground", + pin24: "ground", + pin34: "power", + pin43: "power", + pin57: "power", + pin66: "power", + pin81: "output", + pin93: "power", + pin102: "ground", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin13: { + requiresGround: true, + }, + pin31: { + requiresGround: true, + }, + pin44: { + requiresGround: true, + }, + pin58: { + requiresPower: true, + }, + pin94: { + requiresGround: true, + }, + pin14: { + requiresGround: true, + }, + pin26: { + requiresGround: true, + }, + pin32: { + requiresGround: true, + }, + pin36: { + requiresGround: true, + }, + pin45: { + requiresGround: true, + }, + pin52: { + requiresGround: true, + }, + pin3: { + requiresGround: true, + }, + pin15: { + requiresGround: true, + }, + pin46: { + requiresPower: true, + }, + pin60: { + requiresPower: true, + }, + pin68: { + requiresPower: true, + }, + pin16: { + requiresGround: true, + }, + pin5: { + requiresGround: true, + }, + pin17: { + requiresGround: true, + }, + pin37: { + requiresGround: true, + }, + pin47: { + requiresGround: true, + }, + pin53: { + requiresGround: true, + }, + pin61: { + requiresGround: true, + }, + pin69: { + requiresGround: true, + }, + pin18: { + requiresGround: true, + }, + pin28: { + requiresPower: true, + }, + pin38: { + requiresGround: true, + }, + pin48: { + requiresGround: true, + }, + pin54: { + requiresGround: true, + }, + pin62: { + requiresGround: true, + }, + pin70: { + requiresGround: true, + }, + pin7: { + requiresGround: true, + }, + pin19: { + requiresGround: true, + }, + pin55: { + requiresPower: true, + }, + pin63: { + requiresPower: true, + }, + pin71: { + requiresPower: true, + }, + pin98: { + requiresPower: true, + }, + pin20: { + requiresGround: true, + }, + pin64: { + requiresPower: true, + }, + pin99: { + requiresGround: true, + }, + pin9: { + requiresGround: true, + }, + pin21: { + requiresGround: true, + }, + pin41: { + requiresPower: true, + }, + pin22: { + requiresGround: true, + }, + pin56: { + requiresPower: true, + }, + pin72: { + requiresGround: true, + }, + pin100: { + requiresPower: true, + }, + pin11: { + requiresGround: true, + }, + pin23: { + requiresGround: true, + }, + pin33: { + requiresPower: true, + }, + pin42: { + requiresPower: true, + }, + pin65: { + requiresPower: true, + }, + pin73: { + requiresPower: true, + }, + pin12: { + requiresGround: true, + }, + pin24: { + requiresGround: true, + }, + pin34: { + requiresPower: true, + }, + pin43: { + requiresPower: true, + }, + pin57: { + requiresPower: true, + }, + pin66: { + requiresPower: true, + }, + pin93: { + requiresPower: true, + }, + pin102: { + requiresGround: true, + }, +} as const; + +export const IWRL6432BDBAAMFR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22428198.obj?uuid=1edb7ac7e74746818cc2223cfe263b22", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22428198.step?uuid=1edb7ac7e74746818cc2223cfe263b22", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000012699999984988608, + y: -0.000012699999984988608, + z: -0.47, + }, + }} + {...props} + /> + ); +}; + +export default IWRL6432BDBAAMFR; diff --git a/lib/chips/IWRL6432BRQAAMYR.circuit.tsx b/lib/chips/IWRL6432BRQAAMYR.circuit.tsx new file mode 100644 index 00000000..a7977f78 --- /dev/null +++ b/lib/chips/IWRL6432BRQAAMYR.circuit.tsx @@ -0,0 +1,997 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VSS", "A1", "VSS_A1"], + pin2: ["VPP", "A2", "VPP_A2"], + pin3: ["VSS", "A3", "VSS_A3"], + pin4: ["VSS", "A4", "VSS_A4"], + pin5: ["VSS", "A5", "VSS_A5"], + pin6: ["VSSA", "A6", "VSSA_A6"], + pin7: ["VSSA", "A7", "VSSA_A7"], + pin8: ["OSC_CLK_OUT", "A8", "OSC_CLK_OUT_A8"], + pin9: ["VSSA", "A9", "VSSA_A9"], + pin10: ["VSSA", "A10", "VSSA_A10"], + pin11: ["VIOIN_18", "B1", "VIOIN_18_B1"], + pin12: ["VPP", "B2", "VPP_B2"], + pin13: ["QSPI", "B3", "QSPI_B3"], + pin14: ["QSPI", "B4", "QSPI_B4"], + pin15: ["VSSA", "B7", "VSSA_B7"], + pin16: ["OSC_CLK_OUT", "B8", "OSC_CLK_OUT_B8"], + pin17: ["VSSA", "B9", "VSSA_B9"], + pin18: ["CLKM", "B10"], + pin19: ["VIOIN", "C1", "VIOIN_C1"], + pin20: ["QSPI", "C2", "QSPI_C2"], + pin21: ["QSPI", "C3", "QSPI_C3"], + pin22: ["QSPI", "C4", "QSPI_C4"], + pin23: ["VDDA_10RF", "C7", "VDDA_10RF_C7"], + pin24: ["VSSA", "C8", "VSSA_C8"], + pin25: ["VSSA", "C9", "VSSA_C9"], + pin26: ["VSSA", "C10", "VSSA_C10"], + pin27: ["QSPI_CLK", "D2"], + pin28: ["QSPI_CS", "D3"], + pin29: ["VIOIN_18CLK", "D7"], + pin30: ["VSSA", "D8", "VSSA_D8"], + pin31: ["VSSA", "D9", "VSSA_D9"], + pin32: ["CLKP", "D10"], + pin33: ["VSS", "E1", "VSS_E1"], + pin34: ["TDO", "E2"], + pin35: ["SPIA_MOSI", "E3"], + pin36: ["SPIA_MISO", "E4"], + pin37: ["VSSA", "E7", "VSSA_E7"], + pin38: ["VSSA", "E8", "VSSA_E8"], + pin39: ["VSSA", "E9", "VSSA_E9"], + pin40: ["VSSA", "E10", "VSSA_E10"], + pin41: ["SPIA_CLK", "F1"], + pin42: ["TDI", "F2"], + pin43: ["TCK", "F3"], + pin44: ["SPIA_CS0_N", "F4"], + pin45: ["VOUT_14SYNTH", "F7"], + pin46: ["VSSA", "F8", "VSSA_F8"], + pin47: ["VDDA_18VCO", "F9", "VDDA_18VCO_F9"], + pin48: ["VDDA_18VCO", "F10", "VDDA_18VCO_F10"], + pin49: ["RS232_RX", "G2"], + pin50: ["TMS", "G3"], + pin51: ["VOUT_14APLL", "G8"], + pin52: ["VSSA", "G9", "VSSA_G9"], + pin53: ["VSSA", "G10", "VSSA_G10"], + pin54: ["VSS", "H1", "VSS_H1"], + pin55: ["GPIO_2", "H2"], + pin56: ["PMIC_CLKOUT", "H3"], + pin57: ["RS232_TX", "H4"], + pin58: ["VIN_18PM", "H7", "VIN_18PM_H7"], + pin59: ["VIN_18PM", "H8", "VIN_18PM_H8"], + pin60: ["VSSA", "H9", "VSSA_H9"], + pin61: ["VBGAP", "H10"], + pin62: ["VIOIN", "J1", "VIOIN_J1"], + pin63: ["GPIO_5", "J2"], + pin64: ["UARTA_RX", "J3"], + pin65: ["NERROR_OUT", "J4"], + pin66: ["VSSA", "J7", "VSSA_J7"], + pin67: ["VSSA", "J8", "VSSA_J8"], + pin68: ["VSSA", "J9", "VSSA_J9"], + pin69: ["VSSA", "J10", "VSSA_J10"], + pin70: ["VDD", "K2"], + pin71: ["UARTA_TX", "K3"], + pin72: ["VDDA_10RF", "K7", "VDDA_10RF_K7"], + pin73: ["VDDA_10RF", "K8", "VDDA_10RF_K8"], + pin74: ["VDDA_10RF", "K9", "VDDA_10RF_K9"], + pin75: ["VDDA_10RF", "K10", "VDDA_10RF_K10"], + pin76: ["VIOIN_18", "L1", "VIOIN_18_L1"], + pin77: ["VIOIN_18", "L2", "VIOIN_18_L2"], + pin78: ["HOST_CLK_REQ", "L3"], + pin79: ["UARTA_RTS", "L4"], + pin80: ["VDDA_12RF", "L7", "VDDA_12RF_L7"], + pin81: ["VDDA_12RF", "L8", "VDDA_12RF_L8"], + pin82: ["VDDA_12RF", "L9", "VDDA_12RF_L9"], + pin83: ["VDDA_12RF", "L10", "VDDA_12RF_L10"], + pin84: ["VDD_SRAM", "M1"], + pin85: ["VNWA", "M2", "VNWA_M2"], + pin86: ["NRESET", "M3", "NRESET_M3"], + pin87: ["NRESET", "M4", "NRESET_M4"], + pin88: ["VDDA_18BB", "M7", "VDDA_18BB_M7"], + pin89: ["VDDA_18BB", "M8", "VDDA_18BB_M8"], + pin90: ["VDDA_18BB", "M9", "VDDA_18BB_M9"], + pin91: ["GPADC1", "M10"], + pin92: ["VSS", "N1", "VSS_N1"], + pin93: ["VNWA", "N2", "VNWA_N2"], + pin94: ["VSS", "N3", "VSS_N3"], + pin95: ["VSS", "N4", "VSS_N4"], + pin96: ["VSS", "N5", "VSS_N5"], + pin97: ["VDDA_18BB", "N6", "VDDA_18BB_N6"], + pin98: ["VDDA_18BB", "N7", "VDDA_18BB_N7"], + pin99: ["VDDA_18BB", "N8", "VDDA_18BB_N8"], + pin100: ["VDDA_18BB", "N9", "VDDA_18BB_N9"], + pin101: ["VDDA_18BB", "N10", "VDDA_18BB_N10"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "power", + pin3: "ground", + pin4: "ground", + pin5: "ground", + pin6: "ground", + pin7: "ground", + pin8: "control", + pin9: "ground", + pin10: "ground", + pin11: "unknown", + pin12: "power", + pin13: "output", + pin14: "output", + pin15: "ground", + pin16: "control", + pin17: "ground", + pin18: "control", + pin19: "unknown", + pin20: "output", + pin21: "output", + pin22: "output", + pin23: "power", + pin24: "ground", + pin25: "ground", + pin26: "ground", + pin27: "control", + pin28: "control", + pin29: "unknown", + pin30: "ground", + pin31: "ground", + pin32: "control", + pin33: "ground", + pin34: "unknown", + pin35: "unknown", + pin36: "output", + pin37: "ground", + pin38: "ground", + pin39: "ground", + pin40: "ground", + pin41: "control", + pin42: "unknown", + pin43: "unknown", + pin44: "control", + pin45: "output", + pin46: "ground", + pin47: "power", + pin48: "power", + pin49: "input", + pin50: "unknown", + pin51: "output", + pin52: "ground", + pin53: "ground", + pin54: "ground", + pin55: "bidirectional", + pin56: "control", + pin57: "output", + pin58: "power", + pin59: "power", + pin60: "ground", + pin61: "unknown", + pin62: "unknown", + pin63: "bidirectional", + pin64: "input", + pin65: "output", + pin66: "ground", + pin67: "ground", + pin68: "ground", + pin69: "ground", + pin70: "power", + pin71: "output", + pin72: "power", + pin73: "power", + pin74: "power", + pin75: "power", + pin76: "unknown", + pin77: "unknown", + pin78: "control", + pin79: "unknown", + pin80: "power", + pin81: "power", + pin82: "power", + pin83: "power", + pin84: "power", + pin85: "unknown", + pin86: "unknown", + pin87: "unknown", + pin88: "power", + pin89: "power", + pin90: "power", + pin91: "unknown", + pin92: "ground", + pin93: "unknown", + pin94: "ground", + pin95: "ground", + pin96: "ground", + pin97: "power", + pin98: "power", + pin99: "power", + pin100: "power", + pin101: "power", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin6: { requiresGround: true }, + pin7: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin12: { requiresPower: true }, + pin15: { requiresGround: true }, + pin17: { requiresGround: true }, + pin23: { requiresPower: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, + pin26: { requiresGround: true }, + pin30: { requiresGround: true }, + pin31: { requiresGround: true }, + pin33: { requiresGround: true }, + pin37: { requiresGround: true }, + pin38: { requiresGround: true }, + pin39: { requiresGround: true }, + pin40: { requiresGround: true }, + pin46: { requiresGround: true }, + pin47: { requiresPower: true }, + pin48: { requiresPower: true }, + pin52: { requiresGround: true }, + pin53: { requiresGround: true }, + pin54: { requiresGround: true }, + pin58: { requiresPower: true }, + pin59: { requiresPower: true }, + pin60: { requiresGround: true }, + pin66: { requiresGround: true }, + pin67: { requiresGround: true }, + pin68: { requiresGround: true }, + pin69: { requiresGround: true }, + pin70: { requiresPower: true }, + pin72: { requiresPower: true }, + pin73: { requiresPower: true }, + pin74: { requiresPower: true }, + pin75: { requiresPower: true }, + pin80: { requiresPower: true }, + pin81: { requiresPower: true }, + pin82: { requiresPower: true }, + pin83: { requiresPower: true }, + pin84: { requiresPower: true }, + pin88: { requiresPower: true }, + pin89: { requiresPower: true }, + pin90: { requiresPower: true }, + pin92: { requiresGround: true }, + pin94: { requiresGround: true }, + pin95: { requiresGround: true }, + pin96: { requiresGround: true }, + pin97: { requiresPower: true }, + pin98: { requiresPower: true }, + pin99: { requiresPower: true }, + pin100: { requiresPower: true }, + pin101: { requiresPower: true }, +} as const; + +export const IWRL6432BRQAAMYR = (props: ChipProps) => { + // Footprint provenance: TI drawing AMY0101A; official source https://www.ti.com/lit/gpn/IWRL6432AOP pages 72,73,74 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default IWRL6432BRQAAMYR; diff --git a/lib/chips/LDC1312DNTR.circuit.tsx b/lib/chips/LDC1312DNTR.circuit.tsx new file mode 100644 index 00000000..c5241bbe --- /dev/null +++ b/lib/chips/LDC1312DNTR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["CLKIN"], + pin4: ["ADDR"], + pin5: ["INTB"], + pin6: ["SD"], + pin7: ["VDD"], + pin8: ["GND"], + pin9: ["IN0A"], + pin10: ["IN0B"], + pin11: ["IN1A"], + pin12: ["IN1B"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const LDC1312DNTR = (props: ChipProps) => { + return ( + + ); +}; + +export default LDC1312DNTR; diff --git a/lib/chips/LDC1314RGHR.circuit.tsx b/lib/chips/LDC1314RGHR.circuit.tsx new file mode 100644 index 00000000..46987a15 --- /dev/null +++ b/lib/chips/LDC1314RGHR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["CLKIN"], + pin4: ["ADDR"], + pin5: ["INTB"], + pin6: ["SD"], + pin7: ["VDD"], + pin8: ["GND"], + pin9: ["IN0A"], + pin10: ["IN0B"], + pin11: ["IN1A"], + pin12: ["IN1B"], + pin13: ["IN2A"], + pin14: ["IN2B"], + pin15: ["IN3A"], + pin16: ["IN3B"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const LDC1314RGHR = (props: ChipProps) => { + return ( + + ); +}; + +export default LDC1314RGHR; diff --git a/lib/chips/LDC1612DNTR.circuit.tsx b/lib/chips/LDC1612DNTR.circuit.tsx new file mode 100644 index 00000000..fe4ee269 --- /dev/null +++ b/lib/chips/LDC1612DNTR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["CLKIN"], + pin4: ["ADDR"], + pin5: ["INTB"], + pin6: ["SD"], + pin7: ["VDD"], + pin8: ["GND"], + pin9: ["IN0A"], + pin10: ["IN0B"], + pin11: ["IN1A"], + pin12: ["IN1B"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const LDC1612DNTR = (props: ChipProps) => { + return ( + + ); +}; + +export default LDC1612DNTR; diff --git a/lib/chips/LDC1614RGHR.circuit.tsx b/lib/chips/LDC1614RGHR.circuit.tsx new file mode 100644 index 00000000..d4e807a4 --- /dev/null +++ b/lib/chips/LDC1614RGHR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["SDA"], + pin3: ["CLKIN"], + pin4: ["ADDR"], + pin5: ["INTB"], + pin6: ["SD"], + pin7: ["VDD"], + pin8: ["GND"], + pin9: ["IN0A"], + pin10: ["IN0B"], + pin11: ["IN1A"], + pin12: ["IN1B"], + pin13: ["IN2A"], + pin14: ["IN2B"], + pin15: ["IN3A"], + pin16: ["IN3B"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const LDC1614RGHR = (props: ChipProps) => { + return ( + + ); +}; + +export default LDC1614RGHR; diff --git a/lib/chips/LM111733QKVURQ1.circuit.tsx b/lib/chips/LM111733QKVURQ1.circuit.tsx new file mode 100644 index 00000000..b6f3b5c2 --- /dev/null +++ b/lib/chips/LM111733QKVURQ1.circuit.tsx @@ -0,0 +1,85 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1"], + pin2: ["OUT", "2", "OUT_2", "TAB", "OUT_TAB"], + pin3: ["IN", "3"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "output", + pin3: "input", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const LM111733QKVURQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing KVU0003A; donor TLV76133KVUR (JLCPCB C41835077) + return ( + + + + + + + + + } + {...props} + /> + ); +}; + +export default LM111733QKVURQ1; diff --git a/lib/chips/LM20242MHX_NOPB.circuit.tsx b/lib/chips/LM20242MHX_NOPB.circuit.tsx new file mode 100644 index 00000000..1d019e2c --- /dev/null +++ b/lib/chips/LM20242MHX_NOPB.circuit.tsx @@ -0,0 +1,73 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["FB"], + pin3: ["PGOOD"], + pin4: ["COMP"], + pin5: ["VIN1"], + pin6: ["VIN2"], + pin7: ["SW1"], + pin8: ["SW2"], + pin9: ["GND1"], + pin10: ["GND2"], + pin11: ["GND3"], + pin12: ["AGND"], + pin13: ["SW4"], + pin14: ["SW3"], + pin15: ["VIN4"], + pin16: ["VIN3"], + pin17: ["BOOT"], + pin18: ["VCC"], + pin19: ["EN"], + pin20: ["RT"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { requiresGround: true }, + pin12: { requiresGround: true }, + pin15: { requiresPower: true }, + pin16: { requiresPower: true }, + pin18: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const LM20242MHX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM20242MHX_NOPB; diff --git a/lib/chips/LM20CIM7_NOPB.circuit.tsx b/lib/chips/LM20CIM7_NOPB.circuit.tsx new file mode 100644 index 00000000..55408dbe --- /dev/null +++ b/lib/chips/LM20CIM7_NOPB.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["GND1"], + pin3: ["VO"], + pin4: ["V_POS"], + pin5: ["GND2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { requiresGround: true }, + pin5: { requiresGround: true }, +} as const; + +export const LM20CIM7_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM20CIM7_NOPB; diff --git a/lib/chips/LM239N.circuit.tsx b/lib/chips/LM239N.circuit.tsx new file mode 100644 index 00000000..58b86996 --- /dev/null +++ b/lib/chips/LM239N.circuit.tsx @@ -0,0 +1,344 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OUT"], + pin2: ["2OUT"], + pin3: ["VCC"], + pin4: ["2IN_NEG"], + pin5: ["2IN_POS"], + pin6: ["1IN_NEG"], + pin7: ["1IN_POS"], + pin8: ["3IN_NEG"], + pin9: ["3IN_POS"], + pin10: ["4IN_NEG"], + pin11: ["4IN_POS"], + pin12: ["GND"], + pin13: ["OUT4"], + pin14: ["OUT3"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin12: { requiresGround: true }, +} as const; + +export const LM239N = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C725325.obj?uuid=b0452f991e6c47cfbf860af7689ba441", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C725325.step?uuid=b0452f991e6c47cfbf860af7689ba441", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.47499900000002526, + y: -0.22499950000019453, + z: -1.0500059999999998, + }, + }} + {...props} + /> + ); +}; + +export default LM239N; diff --git a/lib/chips/LM2901AVQDRG4Q1.circuit.tsx b/lib/chips/LM2901AVQDRG4Q1.circuit.tsx new file mode 100644 index 00000000..33746f85 --- /dev/null +++ b/lib/chips/LM2901AVQDRG4Q1.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1", "1"], + pin2: ["OUT2", "2"], + pin3: ["VCC", "3"], + pin4: ["IN2_N", "4"], + pin5: ["IN2_P", "5"], + pin6: ["IN1_N", "6"], + pin7: ["IN1_P", "7"], + pin8: ["IN3_N", "8"], + pin9: ["IN3_P", "9"], + pin10: ["IN4_N", "10"], + pin11: ["IN4_P", "11"], + pin12: ["GND", "12"], + pin13: ["OUT4", "13"], + pin14: ["OUT3", "14"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "power", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "input", + pin12: "ground", + pin13: "output", + pin14: "output", +} as const; + +const pinAttributes = { + pin3: { + requiresPower: true, + }, + pin12: { + requiresGround: true, + }, +} as const; + +export const LM2901AVQDRG4Q1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LM2901AVQDRG4Q1; diff --git a/lib/chips/LM2902BIDR.circuit.tsx b/lib/chips/LM2902BIDR.circuit.tsx new file mode 100644 index 00000000..4726ec8c --- /dev/null +++ b/lib/chips/LM2902BIDR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OUT", "1"], + pin2: ["1IN", "2", "1IN_2"], + pin3: ["1IN", "3", "1IN_3"], + pin4: ["VCC", "4", "VCC_4"], + pin5: ["2IN", "5", "2IN_5"], + pin6: ["2IN", "6", "2IN_6"], + pin7: ["2OUT", "7"], + pin8: ["3OUT", "8"], + pin9: ["3IN", "9", "3IN_9"], + pin10: ["3IN", "10", "3IN_10"], + pin11: ["VCC", "11", "VCC_11"], + pin12: ["4IN", "12", "4IN_12"], + pin13: ["4IN", "13", "4IN_13"], + pin14: ["4OUT", "14"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "power", + pin5: "input", + pin6: "input", + pin7: "output", + pin8: "output", + pin9: "input", + pin10: "input", + pin11: "power", + pin12: "input", + pin13: "input", + pin14: "output", +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin11: { requiresPower: true }, +} as const; + +export const LM2902BIDR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672) + return ( + + ); +}; + +export default LM2902BIDR; diff --git a/lib/chips/LM2903BIDR.circuit.tsx b/lib/chips/LM2903BIDR.circuit.tsx new file mode 100644 index 00000000..5ae97300 --- /dev/null +++ b/lib/chips/LM2903BIDR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OUT", "1"], + pin2: ["1IN_N", "2"], + pin3: ["1IN_P", "3"], + pin4: ["GND", "4"], + pin5: ["2IN_P", "5"], + pin6: ["2IN_N", "6"], + pin7: ["2OUT", "7"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "ground", + pin5: "input", + pin6: "input", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const LM2903BIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM2903BIDR; diff --git a/lib/chips/LM2903DR.circuit.tsx b/lib/chips/LM2903DR.circuit.tsx new file mode 100644 index 00000000..810f34d1 --- /dev/null +++ b/lib/chips/LM2903DR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTPUTA"], + pin2: ["INPUTSA_NEG"], + pin3: ["INPUTSA_POS"], + pin4: ["GND"], + pin5: ["INPUTB_POS"], + pin6: ["INPUTB_NEG"], + pin7: ["OUTPUTB"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const LM2903DR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM2903DR; diff --git a/lib/chips/LM2904BIDGKR.circuit.tsx b/lib/chips/LM2904BIDGKR.circuit.tsx new file mode 100644 index 00000000..6d86b1b4 --- /dev/null +++ b/lib/chips/LM2904BIDGKR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const LM2904BIDGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM2904BIDGKR; diff --git a/lib/chips/LM321LVIDBVR.circuit.tsx b/lib/chips/LM321LVIDBVR.circuit.tsx new file mode 100644 index 00000000..ef8ede80 --- /dev/null +++ b/lib/chips/LM321LVIDBVR.circuit.tsx @@ -0,0 +1,145 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_P"], + pin2: ["V_NEG"], + pin3: ["IN_N"], + pin4: ["OUT"], + pin5: ["V_POS"], +} as const; + +export const LM321LVIDBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471859.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471859.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default LM321LVIDBVR; diff --git a/lib/chips/LM324BIPWR.circuit.tsx b/lib/chips/LM324BIPWR.circuit.tsx new file mode 100644 index 00000000..51939690 --- /dev/null +++ b/lib/chips/LM324BIPWR.circuit.tsx @@ -0,0 +1,252 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN1_NEG"], + pin3: ["IN1_POS"], + pin4: ["V_POS"], + pin5: ["IN2_POS"], + pin6: ["IN2_NEG"], + pin7: ["OUT2"], + pin8: ["OUT3"], + pin9: ["IN3_NEG"], + pin10: ["IN3_POS"], + pin11: ["V_NEG"], + pin12: ["IN4_POS"], + pin13: ["IN4_NEG"], + pin14: ["OUT4"], +} as const; + +export const LM324BIPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5214225.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5214225.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default LM324BIPWR; diff --git a/lib/chips/LM339BIDR.circuit.tsx b/lib/chips/LM339BIDR.circuit.tsx new file mode 100644 index 00000000..0f62e23b --- /dev/null +++ b/lib/chips/LM339BIDR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1", "1"], + pin2: ["OUT2", "2"], + pin3: ["VCC", "3"], + pin4: ["IN2_N", "4"], + pin5: ["IN2_P", "5"], + pin6: ["IN1_N", "6"], + pin7: ["IN1_P", "7"], + pin8: ["IN3_N", "8"], + pin9: ["IN3_P", "9"], + pin10: ["IN4_N", "10"], + pin11: ["IN4_P", "11"], + pin12: ["GND", "12"], + pin13: ["OUT4", "13"], + pin14: ["OUT3", "14"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "power", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "input", + pin12: "ground", + pin13: "output", + pin14: "output", +} as const; + +const pinAttributes = { + pin3: { + requiresPower: true, + }, + pin12: { + requiresGround: true, + }, +} as const; + +export const LM339BIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM339BIDR; diff --git a/lib/chips/LM339LVPWR.circuit.tsx b/lib/chips/LM339LVPWR.circuit.tsx new file mode 100644 index 00000000..6aa8de06 --- /dev/null +++ b/lib/chips/LM339LVPWR.circuit.tsx @@ -0,0 +1,279 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT2", "1"], + pin2: ["OUT1", "2"], + pin3: ["V_P", "3"], + pin4: ["IN1_N", "4"], + pin5: ["IN1_P", "5"], + pin6: ["IN2_N", "6"], + pin7: ["IN2_P", "7"], + pin8: ["IN3_N", "8"], + pin9: ["IN3_P", "9"], + pin10: ["IN4_N", "10"], + pin11: ["IN4_P", "11"], + pin12: ["GND", "12"], + pin13: ["OUT4", "13"], + pin14: ["OUT3", "14"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "power", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "input", + pin12: "ground", + pin13: "output", + pin14: "output", +} as const; + +const pinAttributes = { + pin3: { + requiresPower: true, + }, + pin12: { + requiresGround: true, + }, +} as const; + +export const LM339LVPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3658338.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3658338.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default LM339LVPWR; diff --git a/lib/chips/LM358BIPWR.circuit.tsx b/lib/chips/LM358BIPWR.circuit.tsx new file mode 100644 index 00000000..0d1943a3 --- /dev/null +++ b/lib/chips/LM358BIPWR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const LM358BIPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM358BIPWR; diff --git a/lib/chips/LM358LVIPWR.circuit.tsx b/lib/chips/LM358LVIPWR.circuit.tsx new file mode 100644 index 00000000..2a53c50d --- /dev/null +++ b/lib/chips/LM358LVIPWR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const LM358LVIPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM358LVIPWR; diff --git a/lib/chips/LM3644YFFR.circuit.tsx b/lib/chips/LM3644YFFR.circuit.tsx new file mode 100644 index 00000000..5579a576 --- /dev/null +++ b/lib/chips/LM3644YFFR.circuit.tsx @@ -0,0 +1,144 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "A1"], + pin2: ["IN", "A2"], + pin3: ["SDA", "A3"], + pin4: ["SW", "B1"], + pin5: ["STROBE", "B2"], + pin6: ["SCL", "B3"], + pin7: ["OUT", "C1"], + pin8: ["HWEN", "C2"], + pin9: ["TORCH", "TEMP", "C3"], + pin10: ["LED2", "D1"], + pin11: ["TX", "D2"], + pin12: ["LED1", "D3"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "power", + pin3: "bidirectional", + pin4: "power", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "power", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "power", + pin11: "bidirectional", + pin12: "power", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin4: { requiresPower: true }, + pin7: { requiresPower: true }, + pin10: { requiresPower: true }, + pin12: { requiresPower: true }, +} as const; + +export const LM3644YFFR = (props: ChipProps) => { + // Footprint provenance: TI drawing YFF0012; official source https://www.ti.com/lit/gpn/LM3644 pages 40 + return ( + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default LM3644YFFR; diff --git a/lib/chips/LM3880MF_1AC_NOPB.circuit.tsx b/lib/chips/LM3880MF_1AC_NOPB.circuit.tsx new file mode 100644 index 00000000..9f4999f4 --- /dev/null +++ b/lib/chips/LM3880MF_1AC_NOPB.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["FLAG3"], + pin5: ["FLAG2"], + pin6: ["FLAG1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const LM3880MF_1AC_NOPB = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471861.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471861.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default LM3880MF_1AC_NOPB; diff --git a/lib/chips/LM3881MMX_NOPB.circuit.tsx b/lib/chips/LM3881MMX_NOPB.circuit.tsx new file mode 100644 index 00000000..c1dae259 --- /dev/null +++ b/lib/chips/LM3881MMX_NOPB.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["EN"], + pin3: ["GND"], + pin4: ["INV"], + pin5: ["TADJ"], + pin6: ["FLAG3"], + pin7: ["FLAG2"], + pin8: ["FLAG1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const LM3881MMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM3881MMX_NOPB; diff --git a/lib/chips/LM393ADR.circuit.tsx b/lib/chips/LM393ADR.circuit.tsx new file mode 100644 index 00000000..d27ef468 --- /dev/null +++ b/lib/chips/LM393ADR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN1_N"], + pin3: ["IN1_P"], + pin4: ["V_NEG"], + pin5: ["IN2_P"], + pin6: ["IN2_N"], + pin7: ["OUT2"], + pin8: ["V_POS"], +} as const; + +export const LM393ADR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM393ADR; diff --git a/lib/chips/LM393BIDR.circuit.tsx b/lib/chips/LM393BIDR.circuit.tsx new file mode 100644 index 00000000..1d734eef --- /dev/null +++ b/lib/chips/LM393BIDR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OUT", "1"], + pin2: ["1IN_N", "2"], + pin3: ["1IN_P", "3"], + pin4: ["GND", "4"], + pin5: ["2IN_P", "5"], + pin6: ["2IN_N", "6"], + pin7: ["2OUT", "7"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "ground", + pin5: "input", + pin6: "input", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const LM393BIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM393BIDR; diff --git a/lib/chips/LM393PWR.circuit.tsx b/lib/chips/LM393PWR.circuit.tsx new file mode 100644 index 00000000..b9a3d5ab --- /dev/null +++ b/lib/chips/LM393PWR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN1_N"], + pin3: ["IN1_P"], + pin4: ["V_NEG"], + pin5: ["IN2_P"], + pin6: ["IN2_N"], + pin7: ["OUT2"], + pin8: ["V_POS"], +} as const; + +export const LM393PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM393PWR; diff --git a/lib/chips/LM4041A12IDBZR.circuit.tsx b/lib/chips/LM4041A12IDBZR.circuit.tsx new file mode 100644 index 00000000..5ddb0bdd --- /dev/null +++ b/lib/chips/LM4041A12IDBZR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["Cathode"], + pin2: ["ANODE"], + pin3: ["NC"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, +} as const; + +export const LM4041A12IDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM4041A12IDBZR; diff --git a/lib/chips/LM4041CIDCKR.circuit.tsx b/lib/chips/LM4041CIDCKR.circuit.tsx new file mode 100644 index 00000000..ad5c9f8a --- /dev/null +++ b/lib/chips/LM4041CIDCKR.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ANODE"], + pin2: ["pin2"], + pin3: ["CATHODE"], + pin4: ["NC1"], + pin5: ["NC2"], +} as const; + +const pinAttributes = { + pin4: { doNotConnect: true }, + pin5: { doNotConnect: true }, +} as const; + +export const LM4041CIDCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM4041CIDCKR; diff --git a/lib/chips/LM4060A12EDBZR.circuit.tsx b/lib/chips/LM4060A12EDBZR.circuit.tsx new file mode 100644 index 00000000..a67221a4 --- /dev/null +++ b/lib/chips/LM4060A12EDBZR.circuit.tsx @@ -0,0 +1,34 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CATHODE", "1"], + pin2: ["ANODE", "2"], + pin3: ["DNC", "3"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "output", + pin3: "no-connect", +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, +} as const; + +export const LM4060A12EDBZR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016) + return ( + + ); +}; + +export default LM4060A12EDBZR; diff --git a/lib/chips/LM5020MM_2_NOPB.circuit.tsx b/lib/chips/LM5020MM_2_NOPB.circuit.tsx new file mode 100644 index 00000000..58cd15df --- /dev/null +++ b/lib/chips/LM5020MM_2_NOPB.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["FB"], + pin3: ["COMP"], + pin4: ["VCC"], + pin5: ["OUT"], + pin6: ["GND"], + pin7: ["UVLO"], + pin8: ["CS"], + pin9: ["pin9"], + pin10: ["SS"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const LM5020MM_2_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5020MM_2_NOPB; diff --git a/lib/chips/LM5033SDX_NOPB.circuit.tsx b/lib/chips/LM5033SDX_NOPB.circuit.tsx new file mode 100644 index 00000000..e0c73fc1 --- /dev/null +++ b/lib/chips/LM5033SDX_NOPB.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["REF"], + pin3: ["COMP"], + pin4: ["VCC"], + pin5: ["OUT1"], + pin6: ["OUT2"], + pin7: ["GND"], + pin8: ["CS"], + pin9: ["pin9"], + pin10: ["SS"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const LM5033SDX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5033SDX_NOPB; diff --git a/lib/chips/LM5050MK_1_NOPB.circuit.tsx b/lib/chips/LM5050MK_1_NOPB.circuit.tsx new file mode 100644 index 00000000..d8055d26 --- /dev/null +++ b/lib/chips/LM5050MK_1_NOPB.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VS"], + pin2: ["GND"], + pin3: ["OFF"], + pin4: ["IN"], + pin5: ["GATE"], + pin6: ["OUT"], +} as const; + +export const LM5050MK_1_NOPB = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default LM5050MK_1_NOPB; diff --git a/lib/chips/LM5050Q1MK_1_NOPB.circuit.tsx b/lib/chips/LM5050Q1MK_1_NOPB.circuit.tsx new file mode 100644 index 00000000..ffdfdbb0 --- /dev/null +++ b/lib/chips/LM5050Q1MK_1_NOPB.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VS"], + pin2: ["GND"], + pin3: ["OFF"], + pin4: ["IN"], + pin5: ["GATE"], + pin6: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const LM5050Q1MK_1_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5050Q1MK_1_NOPB; diff --git a/lib/chips/LM5060Q1MM_NOPB.circuit.tsx b/lib/chips/LM5060Q1MM_NOPB.circuit.tsx new file mode 100644 index 00000000..7d6ce9fb --- /dev/null +++ b/lib/chips/LM5060Q1MM_NOPB.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SENSE"], + pin2: ["VIN"], + pin3: ["OVP"], + pin4: ["UVLO"], + pin5: ["EN"], + pin6: ["GND"], + pin7: ["TIMER"], + pin8: ["nPGD"], + pin9: ["OUT"], + pin10: ["GATE"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const LM5060Q1MM_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5060Q1MM_NOPB; diff --git a/lib/chips/LM5069MM_1_NOPB.circuit.tsx b/lib/chips/LM5069MM_1_NOPB.circuit.tsx new file mode 100644 index 00000000..426abe81 --- /dev/null +++ b/lib/chips/LM5069MM_1_NOPB.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SENSE"], + pin2: ["VIN"], + pin3: ["UVLO"], + pin4: ["OVLO"], + pin5: ["GND"], + pin6: ["TIMER"], + pin7: ["PWR"], + pin8: ["PGD"], + pin9: ["OUT"], + pin10: ["GATE"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const LM5069MM_1_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5069MM_1_NOPB; diff --git a/lib/chips/LM5106MMX_NOPB.circuit.tsx b/lib/chips/LM5106MMX_NOPB.circuit.tsx new file mode 100644 index 00000000..3b70818b --- /dev/null +++ b/lib/chips/LM5106MMX_NOPB.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["HB"], + pin3: ["HO"], + pin4: ["HS"], + pin5: ["NC"], + pin6: ["RDT"], + pin7: ["EN"], + pin8: ["IN"], + pin9: ["VSS"], + pin10: ["LO"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin5: { doNotConnect: true }, + pin9: { requiresGround: true }, +} as const; + +export const LM5106MMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5106MMX_NOPB; diff --git a/lib/chips/LM5123QRGRRQ1.circuit.tsx b/lib/chips/LM5123QRGRRQ1.circuit.tsx new file mode 100644 index 00000000..55fe586c --- /dev/null +++ b/lib/chips/LM5123QRGRRQ1.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CSP"], + pin2: ["CSN"], + pin3: ["pin3"], + pin4: ["PGOOD"], + pin5: ["HO"], + pin6: ["SW"], + pin7: ["HB"], + pin8: ["BIAS"], + pin9: ["VCC"], + pin10: ["PGND"], + pin11: ["LO"], + pin12: ["MODE"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["RT"], + pin16: ["pin16"], + pin17: ["SS"], + pin18: ["TRK"], + pin19: ["AGND"], + pin20: ["COMP"], + pin21: ["GND"], +} as const; + +const pinAttributes = { + pin9: { requiresPower: true }, + pin10: { requiresGround: true }, + pin19: { requiresGround: true }, + pin21: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const LM5123QRGRRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5123QRGRRQ1; diff --git a/lib/chips/LM51551DSSR.circuit.tsx b/lib/chips/LM51551DSSR.circuit.tsx new file mode 100644 index 00000000..2ec0ce6d --- /dev/null +++ b/lib/chips/LM51551DSSR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["BIAS"], + pin2: ["VCC"], + pin3: ["GATE"], + pin4: ["PGND"], + pin5: ["CS"], + pin6: ["COMP"], + pin7: ["AGND"], + pin8: ["FB"], + pin9: ["SS"], + pin10: ["RT"], + pin11: ["PGOOD"], + pin12: ["pin12"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const LM51551DSSR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM51551DSSR; diff --git a/lib/chips/LM5156DSSR.circuit.tsx b/lib/chips/LM5156DSSR.circuit.tsx new file mode 100644 index 00000000..73ecabc1 --- /dev/null +++ b/lib/chips/LM5156DSSR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["BIAS"], + pin2: ["VCC"], + pin3: ["GATE"], + pin4: ["GND"], + pin5: ["CS"], + pin6: ["COMP"], + pin7: ["DITHOFF"], + pin8: ["FB"], + pin9: ["SS"], + pin10: ["RT"], + pin11: ["PGOOD"], + pin12: ["pin12"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const LM5156DSSR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5156DSSR; diff --git a/lib/chips/LM5163DDAR.circuit.tsx b/lib/chips/LM5163DDAR.circuit.tsx new file mode 100644 index 00000000..7cbccc9a --- /dev/null +++ b/lib/chips/LM5163DDAR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["VIN"], + pin3: ["pin3"], + pin4: ["RON"], + pin5: ["FB"], + pin6: ["PGOOD"], + pin7: ["BST"], + pin8: ["SW"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const LM5163DDAR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5163DDAR; diff --git a/lib/chips/LM5164DDAR.circuit.tsx b/lib/chips/LM5164DDAR.circuit.tsx new file mode 100644 index 00000000..8c5c6661 --- /dev/null +++ b/lib/chips/LM5164DDAR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["VIN"], + pin3: ["pin3"], + pin4: ["RON"], + pin5: ["FB"], + pin6: ["PGOOD"], + pin7: ["BST"], + pin8: ["SW"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const LM5164DDAR = (props: ChipProps) => { + return ( + + ); +}; + +export default LM5164DDAR; diff --git a/lib/chips/LM536005QDSXRQ1.circuit.tsx b/lib/chips/LM536005QDSXRQ1.circuit.tsx new file mode 100644 index 00000000..0494937c --- /dev/null +++ b/lib/chips/LM536005QDSXRQ1.circuit.tsx @@ -0,0 +1,220 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SW"], + pin2: ["BOOT"], + pin3: ["VCC"], + pin4: ["FB"], + pin5: ["AGND"], + pin6: ["N_RESET"], + pin7: ["EN"], + pin8: ["VIN"], + pin9: ["pin9"], + pin10: ["GND"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, + pin10: { requiresGround: true }, +} as const; + +export const LM536005QDSXRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544824.obj?uuid=156e205a83594893a980adc9e51e4d53", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544824.step?uuid=156e205a83594893a980adc9e51e4d53", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.0001142999999501626, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default LM536005QDSXRQ1; diff --git a/lib/chips/LM62460RPHR.circuit.tsx b/lib/chips/LM62460RPHR.circuit.tsx new file mode 100644 index 00000000..9adc599d --- /dev/null +++ b/lib/chips/LM62460RPHR.circuit.tsx @@ -0,0 +1,345 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND2"], + pin2: ["VIN2"], + pin3: ["RBOOT"], + pin4: ["CBOOT"], + pin5: ["BIAS"], + pin6: ["VCC"], + pin7: ["FB"], + pin8: ["AGND"], + pin9: ["RT"], + pin10: ["RESET"], + pin11: ["SPSP"], + pin12: ["pin12"], + pin13: ["EN"], + pin14: ["VIN1"], + pin15: ["PGND1"], + pin16: ["SW"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin6: { requiresPower: true }, + pin8: { requiresGround: true }, + pin14: { requiresPower: true }, + pin15: { requiresGround: true }, +} as const; + +export const LM62460RPHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3188408.obj?uuid=722e8c74ba4c49f9bc24b786b135a12b", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3188408.step?uuid=722e8c74ba4c49f9bc24b786b135a12b", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00003174999983457383, + y: -0.000006350000035126868, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default LM62460RPHR; diff --git a/lib/chips/LM62CIM3_NOPB.circuit.tsx b/lib/chips/LM62CIM3_NOPB.circuit.tsx new file mode 100644 index 00000000..aea5d242 --- /dev/null +++ b/lib/chips/LM62CIM3_NOPB.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VS_P"], + pin2: ["VO"], + pin3: ["GND"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const LM62CIM3_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM62CIM3_NOPB; diff --git a/lib/chips/LM74610QDGKRQ1.circuit.tsx b/lib/chips/LM74610QDGKRQ1.circuit.tsx new file mode 100644 index 00000000..d6e3f58c --- /dev/null +++ b/lib/chips/LM74610QDGKRQ1.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCAPL"], + pin2: ["Gate_Pull_Down"], + pin3: ["NC1"], + pin4: ["Anode"], + pin5: ["NC2"], + pin6: ["Gate_Drive"], + pin7: ["VCAPH"], + pin8: ["Cathode"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin5: { doNotConnect: true }, +} as const; + +export const LM74610QDGKRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LM74610QDGKRQ1; diff --git a/lib/chips/LM74700QDRQ1.circuit.tsx b/lib/chips/LM74700QDRQ1.circuit.tsx new file mode 100644 index 00000000..3d1bb26b --- /dev/null +++ b/lib/chips/LM74700QDRQ1.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["EN"], + pin3: ["NC1"], + pin4: ["VCAP"], + pin5: ["ANODE"], + pin6: ["GATE"], + pin7: ["NC2"], + pin8: ["CATHODE"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { doNotConnect: true }, + pin7: { doNotConnect: true }, +} as const; + +export const LM74700QDRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LM74700QDRQ1; diff --git a/lib/chips/LM74900QRGERQ1.circuit.tsx b/lib/chips/LM74900QRGERQ1.circuit.tsx new file mode 100644 index 00000000..d3c08dea --- /dev/null +++ b/lib/chips/LM74900QRGERQ1.circuit.tsx @@ -0,0 +1,339 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DGATE"], + pin2: ["A"], + pin3: ["SW"], + pin4: ["UVLO"], + pin5: ["OV"], + pin6: ["EN"], + pin7: ["SLEEP"], + pin8: ["NC1"], + pin9: ["TMR"], + pin10: ["IMON"], + pin11: ["ILIM"], + pin12: ["FLT"], + pin13: ["GND"], + pin14: ["HGATE"], + pin15: ["OUT"], + pin16: ["SLEEP_OV"], + pin17: ["NC2"], + pin18: ["ISCP"], + pin19: ["CS_NEG"], + pin20: ["CS_POS"], + pin21: ["NC3"], + pin22: ["VS"], + pin23: ["CAP"], + pin24: ["C"], + pin25: ["EPAD"], +} as const; + +export const LM74900QRGERQ1 = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345498.obj?uuid=7eefadb7b37f47f2bf5af1b46b290104", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345498.step?uuid=7eefadb7b37f47f2bf5af1b46b290104", + pcbRotationOffset: 270, + modelOriginPosition: { + x: -0.044818299999860756, + y: -0.1541780000001154, + z: -0.02, + }, + }} + {...restProps} + /> + ); +}; + +export default LM74900QRGERQ1; diff --git a/lib/chips/LM95235DIMMX_NOPB.circuit.tsx b/lib/chips/LM95235DIMMX_NOPB.circuit.tsx new file mode 100644 index 00000000..02d90c26 --- /dev/null +++ b/lib/chips/LM95235DIMMX_NOPB.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["D_POS"], + pin3: ["D_NEG"], + pin4: ["T_CRIT"], + pin5: ["GND"], + pin6: ["pin6"], + pin7: ["SMBDAT"], + pin8: ["SMBCLK"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const LM95235DIMMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LM95235DIMMX_NOPB; diff --git a/lib/chips/LMC555CMX_NOPB.circuit.tsx b/lib/chips/LMC555CMX_NOPB.circuit.tsx new file mode 100644 index 00000000..d063d53f --- /dev/null +++ b/lib/chips/LMC555CMX_NOPB.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["TRIGER"], + pin3: ["OUTPUT"], + pin4: ["RESET"], + pin5: ["CV"], + pin6: ["TH"], + pin7: ["DC"], + pin8: ["V_POS"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const LMC555CMX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMC555CMX_NOPB; diff --git a/lib/chips/LMG1210RVRR.circuit.tsx b/lib/chips/LMG1210RVRR.circuit.tsx new file mode 100644 index 00000000..1550c264 --- /dev/null +++ b/lib/chips/LMG1210RVRR.circuit.tsx @@ -0,0 +1,247 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC", "1", "NC_1"], + pin2: ["VIN", "2"], + pin3: ["VSS", "3", "VSS_3"], + pin4: ["VDD", "4"], + pin5: ["DHL", "5"], + pin6: ["DLH", "6"], + pin7: ["VSS", "7", "VSS_7"], + pin8: ["LO", "8"], + pin9: ["HS", "9", "HS_9"], + pin10: ["HO", "10"], + pin11: ["NC", "11", "NC_11"], + pin12: ["HB", "12"], + pin13: ["HS", "13", "HS_13"], + pin14: ["NC1", "14"], + pin15: ["NC", "15", "NC_15"], + pin16: ["HS", "16", "HS_16"], + pin17: ["BST", "17"], + pin18: ["EN", "HI", "18"], + pin19: ["PWM", "LI", "19"], + pin20: ["THERMAL_PAD_VSS", "20"], + pin21: ["THERMAL_PAD_HS", "21"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "power", + pin3: "ground", + pin4: "output", + pin5: "input", + pin6: "input", + pin7: "ground", + pin8: "output", + pin9: "input", + pin10: "output", + pin11: "no-connect", + pin12: "input", + pin13: "input", + pin14: "input", + pin15: "no-connect", + pin16: "input", + pin17: "output", + pin18: "control", + pin19: "control", + pin20: "ground", + pin21: "input", +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, + pin7: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin15: { doNotConnect: true }, + pin20: { requiresGround: true }, +} as const; + +export const LMG1210RVRR = (props: ChipProps) => { + // Footprint provenance: TI drawing RVR0019A; official source https://www.ti.com/lit/gpn/LMG1210 pages 24 + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default LMG1210RVRR; diff --git a/lib/chips/LMG3410R150RWHR.circuit.tsx b/lib/chips/LMG3410R150RWHR.circuit.tsx new file mode 100644 index 00000000..aa38c4f9 --- /dev/null +++ b/lib/chips/LMG3410R150RWHR.circuit.tsx @@ -0,0 +1,370 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DRAIN11"], + pin2: ["DRAIN10"], + pin3: ["DRAIN9"], + pin4: ["DRAIN8"], + pin5: ["DRAIN7"], + pin6: ["DRAIN6"], + pin7: ["DRAIN5"], + pin8: ["DRAIN4"], + pin9: ["DRAIN3"], + pin10: ["DRAIN2"], + pin11: ["DRAIN1"], + pin12: ["SOURCE12"], + pin13: ["SOURCE11"], + pin14: ["SOURCE10"], + pin15: ["SOURCE9"], + pin16: ["SOURCE8"], + pin17: ["NC"], + pin18: ["SOURCE7"], + pin19: ["SOURCE6"], + pin20: ["SOURCE5"], + pin21: ["SOURCE4"], + pin22: ["SOURCE3"], + pin23: ["SOURCE2"], + pin24: ["SOURCE1"], + pin25: ["LDO5V"], + pin26: ["VNEG"], + pin27: ["VDD"], + pin28: ["BBSW"], + pin29: ["LPM"], + pin30: ["RDRV"], + pin31: ["IN"], + pin32: ["FAULT"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin17: { doNotConnect: true }, + pin27: { requiresPower: true }, +} as const; + +export const LMG3410R150RWHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1858363.obj?uuid=4eeb9f4169ba4f0b85ac5014434b3b0d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1858363.step?uuid=4eeb9f4169ba4f0b85ac5014434b3b0d", + pcbRotationOffset: 180, + modelOriginPosition: { + x: -0.049923700000135796, + y: -0.000038099999983387534, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default LMG3410R150RWHR; diff --git a/lib/chips/LMG3411R070RWHR.circuit.tsx b/lib/chips/LMG3411R070RWHR.circuit.tsx new file mode 100644 index 00000000..f4177e37 --- /dev/null +++ b/lib/chips/LMG3411R070RWHR.circuit.tsx @@ -0,0 +1,370 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DRAIN11"], + pin2: ["DRAIN10"], + pin3: ["DRAIN9"], + pin4: ["DRAIN8"], + pin5: ["DRAIN7"], + pin6: ["DRAIN6"], + pin7: ["DRAIN5"], + pin8: ["DRAIN4"], + pin9: ["DRAIN3"], + pin10: ["DRAIN2"], + pin11: ["DRAIN1"], + pin12: ["SOURCE12"], + pin13: ["SOURCE11"], + pin14: ["SOURCE10"], + pin15: ["SOURCE9"], + pin16: ["SOURCE8"], + pin17: ["NC"], + pin18: ["SOURCE7"], + pin19: ["SOURCE6"], + pin20: ["SOURCE5"], + pin21: ["SOURCE4"], + pin22: ["SOURCE3"], + pin23: ["SOURCE2"], + pin24: ["SOURCE1"], + pin25: ["LDO5V"], + pin26: ["VNEG"], + pin27: ["VDD"], + pin28: ["BBSW"], + pin29: ["LPM"], + pin30: ["RDRV"], + pin31: ["IN"], + pin32: ["FAULT"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin17: { doNotConnect: true }, + pin27: { requiresPower: true }, +} as const; + +export const LMG3411R070RWHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1850282.obj?uuid=4eeb9f4169ba4f0b85ac5014434b3b0d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1850282.step?uuid=4eeb9f4169ba4f0b85ac5014434b3b0d", + pcbRotationOffset: 180, + modelOriginPosition: { + x: -0.049923700000135796, + y: -0.000038099999983387534, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default LMG3411R070RWHR; diff --git a/lib/chips/LMG3612REQR.circuit.tsx b/lib/chips/LMG3612REQR.circuit.tsx new file mode 100644 index 00000000..0cee5176 --- /dev/null +++ b/lib/chips/LMG3612REQR.circuit.tsx @@ -0,0 +1,456 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC1", "1", "NC1_1"], + pin2: ["D", "2", "D_2"], + pin3: ["D", "3", "D_3"], + pin4: ["D", "4", "D_4"], + pin5: ["D", "5", "D_5"], + pin6: ["D", "6", "D_6"], + pin7: ["D", "7", "D_7"], + pin8: ["D", "8", "D_8"], + pin9: ["D", "9", "D_9"], + pin10: ["D", "10", "D_10"], + pin11: ["D", "11", "D_11"], + pin12: ["D", "12", "D_12"], + pin13: ["D", "13", "D_13"], + pin14: ["D", "14", "D_14"], + pin15: ["NC1", "15", "NC1_15"], + pin16: ["NC2", "16", "NC2_16"], + pin17: ["S", "17", "S_17"], + pin18: ["S", "18", "S_18"], + pin19: ["S", "19", "S_19"], + pin20: ["NC2", "20", "NC2_20"], + pin21: ["S", "21", "S_21"], + pin22: ["S", "22", "S_22"], + pin23: ["S", "23", "S_23"], + pin24: ["S", "24", "S_24"], + pin25: ["S", "25", "S_25"], + pin26: ["S", "26", "S_26"], + pin27: ["S", "27", "S_27"], + pin28: ["S", "28", "S_28"], + pin29: ["S", "29", "S_29"], + pin30: ["NC3", "30"], + pin31: ["IN", "31"], + pin32: ["AGND", "32"], + pin33: ["NC4", "33"], + pin34: ["NC5", "34"], + pin35: ["FLT", "35"], + pin36: ["AUX", "36"], + pin37: ["RDRV", "37"], + pin38: ["NC2", "38", "NC2_38"], + pin39: ["PAD", "S", "39"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "power", + pin3: "power", + pin4: "power", + pin5: "power", + pin6: "power", + pin7: "power", + pin8: "power", + pin9: "power", + pin10: "power", + pin11: "power", + pin12: "power", + pin13: "power", + pin14: "power", + pin15: "no-connect", + pin16: "no-connect", + pin17: "power", + pin18: "power", + pin19: "power", + pin20: "no-connect", + pin21: "power", + pin22: "power", + pin23: "power", + pin24: "power", + pin25: "power", + pin26: "power", + pin27: "power", + pin28: "power", + pin29: "power", + pin30: "no-connect", + pin31: "input", + pin32: "ground", + pin33: "no-connect", + pin34: "no-connect", + pin35: "output", + pin36: "power", + pin37: "input", + pin38: "no-connect", + pin39: "power", +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { requiresPower: true }, + pin3: { requiresPower: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, + pin7: { requiresPower: true }, + pin8: { requiresPower: true }, + pin9: { requiresPower: true }, + pin10: { requiresPower: true }, + pin11: { requiresPower: true }, + pin12: { requiresPower: true }, + pin13: { requiresPower: true }, + pin14: { requiresPower: true }, + pin15: { doNotConnect: true }, + pin16: { doNotConnect: true }, + pin17: { requiresPower: true }, + pin18: { requiresPower: true }, + pin19: { requiresPower: true }, + pin20: { doNotConnect: true }, + pin21: { requiresPower: true }, + pin22: { requiresPower: true }, + pin23: { requiresPower: true }, + pin24: { requiresPower: true }, + pin25: { requiresPower: true }, + pin26: { requiresPower: true }, + pin27: { requiresPower: true }, + pin28: { requiresPower: true }, + pin29: { requiresPower: true }, + pin30: { doNotConnect: true }, + pin32: { requiresGround: true }, + pin33: { doNotConnect: true }, + pin34: { doNotConnect: true }, + pin36: { requiresPower: true }, + pin38: { doNotConnect: true }, + pin39: { requiresPower: true }, +} as const; + +export const LMG3612REQR = (props: ChipProps) => { + // Footprint provenance: TI drawing REQ0038A; official source https://www.ti.com/lit/gpn/LMG3612 pages 26 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default LMG3612REQR; diff --git a/lib/chips/LMK04828BISQE_NOPB.circuit.tsx b/lib/chips/LMK04828BISQE_NOPB.circuit.tsx new file mode 100644 index 00000000..630e2da3 --- /dev/null +++ b/lib/chips/LMK04828BISQE_NOPB.circuit.tsx @@ -0,0 +1,107 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DCLKout0"], + pin2: ["pin2"], + pin3: ["SDCLKout1"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["NC3"], + pin8: ["NC2"], + pin9: ["NC1"], + pin10: ["Vcc1_VCO"], + pin11: ["LDObyp1"], + pin12: ["LDObyp2"], + pin13: ["SDCLKout3"], + pin14: ["pin14"], + pin15: ["DCLKout2"], + pin16: ["pin16"], + pin17: ["Vcc2_CG1"], + pin18: ["pin18"], + pin19: ["SCK"], + pin20: ["SDIO"], + pin21: ["Vcc3_SYSREF"], + pin22: ["SDCLKout5"], + pin23: ["pin23"], + pin24: ["DCLKout4"], + pin25: ["pin25"], + pin26: ["Vcc4_CG2"], + pin27: ["DCLKout6"], + pin28: ["pin28"], + pin29: ["SDCLKout7"], + pin30: ["pin30"], + pin31: ["Status_LD1"], + pin32: ["CPout1"], + pin33: ["Vcc5_DIG"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["Vcc6_PLL1"], + pin37: ["CLKin0"], + pin38: ["pin38"], + pin39: ["Vcc7_OSCout"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["Vcc8_OSCin"], + pin43: ["OSCin"], + pin44: ["pin44"], + pin45: ["Vcc9_CP2"], + pin46: ["CPout2"], + pin47: ["Vcc10_PLL2"], + pin48: ["Status_LD2"], + pin49: ["SDCLKout9"], + pin50: ["pin50"], + pin51: ["DCLKout8"], + pin52: ["pin52"], + pin53: ["Vcc11_CG3"], + pin54: ["DCLKout10"], + pin55: ["pin55"], + pin56: ["SDCLKout11"], + pin57: ["pin57"], + pin58: ["CLKin_SEL0"], + pin59: ["CLKin_SEL1"], + pin60: ["SDCLKout13"], + pin61: ["pin61"], + pin62: ["DCLKout12"], + pin63: ["pin63"], + pin64: ["Vcc12_CG0"], + pin65: ["EP"], +} as const; + +const pinAttributes = { + pin7: { doNotConnect: true }, + pin8: { doNotConnect: true }, + pin9: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const LMK04828BISQE_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMK04828BISQE_NOPB; diff --git a/lib/chips/LMK1C1102PWR.circuit.tsx b/lib/chips/LMK1C1102PWR.circuit.tsx new file mode 100644 index 00000000..0cfebd56 --- /dev/null +++ b/lib/chips/LMK1C1102PWR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLKIN"], + pin2: ["1G"], + pin3: ["Y0"], + pin4: ["GND"], + pin5: ["NC2"], + pin6: ["VDD"], + pin7: ["NC1"], + pin8: ["Y1"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { doNotConnect: true }, + pin6: { requiresPower: true }, + pin7: { doNotConnect: true }, +} as const; + +export const LMK1C1102PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMK1C1102PWR; diff --git a/lib/chips/LMK1C1103PWR.circuit.tsx b/lib/chips/LMK1C1103PWR.circuit.tsx new file mode 100644 index 00000000..b363003e --- /dev/null +++ b/lib/chips/LMK1C1103PWR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLKIN"], + pin2: ["1G"], + pin3: ["Y0"], + pin4: ["GND"], + pin5: ["Y2"], + pin6: ["VDD"], + pin7: ["NC"], + pin8: ["Y1"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, + pin7: { doNotConnect: true }, +} as const; + +export const LMK1C1103PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMK1C1103PWR; diff --git a/lib/chips/LMK1C1104DQFR.circuit.tsx b/lib/chips/LMK1C1104DQFR.circuit.tsx new file mode 100644 index 00000000..81175c63 --- /dev/null +++ b/lib/chips/LMK1C1104DQFR.circuit.tsx @@ -0,0 +1,172 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLKIN"], + pin2: ["1G"], + pin3: ["Y0"], + pin4: ["GND"], + pin5: ["Y2"], + pin6: ["VDD"], + pin7: ["Y3"], + pin8: ["Y1"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const LMK1C1104DQFR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3613454.obj?uuid=bdbb82cfec2f421cabcde62c239dd780", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3613454.step?uuid=bdbb82cfec2f421cabcde62c239dd780", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.04375150000009853, + y: -0.000025399999913133797, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default LMK1C1104DQFR; diff --git a/lib/chips/LMK1C1108PWR.circuit.tsx b/lib/chips/LMK1C1108PWR.circuit.tsx new file mode 100644 index 00000000..ce074321 --- /dev/null +++ b/lib/chips/LMK1C1108PWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLKIN"], + pin2: ["1G"], + pin3: ["Y0"], + pin4: ["GND1"], + pin5: ["VDD1"], + pin6: ["Y4"], + pin7: ["GND2"], + pin8: ["Y6"], + pin9: ["Y7"], + pin10: ["VDD3"], + pin11: ["Y5"], + pin12: ["GND3"], + pin13: ["Y2"], + pin14: ["VDD2"], + pin15: ["Y3"], + pin16: ["Y1"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin7: { requiresGround: true }, + pin10: { requiresPower: true }, + pin12: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const LMK1C1108PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMK1C1108PWR; diff --git a/lib/chips/LMK6DA10000ADLFR.circuit.tsx b/lib/chips/LMK6DA10000ADLFR.circuit.tsx new file mode 100644 index 00000000..5c1c4c6c --- /dev/null +++ b/lib/chips/LMK6DA10000ADLFR.circuit.tsx @@ -0,0 +1,94 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OE", "ST", "NC", "1", "OE_1"], + pin2: ["OE", "ST", "NC", "2", "OE_2"], + pin3: ["GND", "3"], + pin4: ["OUTP", "4"], + pin5: ["OUTN", "5"], + pin6: ["VDD", "6"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "no-connect", + pin3: "ground", + pin4: "output", + pin5: "output", + pin6: "power", +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const LMK6DA10000ADLFR = (props: ChipProps) => { + // Footprint provenance: TI drawing DLF0006B; official source https://www.ti.com/lit/gpn/LMK6D pages 64 + return ( + + + + + + + + + } + {...props} + /> + ); +}; + +export default LMK6DA10000ADLFR; diff --git a/lib/chips/LMP8480MMX_T_NOPB.circuit.tsx b/lib/chips/LMP8480MMX_T_NOPB.circuit.tsx new file mode 100644 index 00000000..0e8e734b --- /dev/null +++ b/lib/chips/LMP8480MMX_T_NOPB.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RSP", "1"], + pin2: ["VCC", "2"], + pin3: ["NC", "3"], + pin4: ["GND", "4"], + pin5: ["VOUT", "5"], + pin6: ["NC_OR_REFB", "6"], + pin7: ["NC_OR_REFA", "7"], + pin8: ["RSN", "8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "power", + pin3: "no-connect", + pin4: "ground", + pin5: "output", + pin6: "no-connect", + pin7: "no-connect", + pin8: "input", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin3: { doNotConnect: true }, + pin4: { requiresGround: true }, + pin6: { doNotConnect: true }, + pin7: { doNotConnect: true }, +} as const; + +export const LMP8480MMX_T_NOPB = (props: ChipProps) => { + // Footprint provenance: TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632) + return ( + + ); +}; + +export default LMP8480MMX_T_NOPB; diff --git a/lib/chips/LMP8601MA_NOPB.circuit.tsx b/lib/chips/LMP8601MA_NOPB.circuit.tsx new file mode 100644 index 00000000..5d60b5bb --- /dev/null +++ b/lib/chips/LMP8601MA_NOPB.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN", "1", "IN_1"], + pin2: ["GND", "2"], + pin3: ["A1", "3"], + pin4: ["A2", "4"], + pin5: ["OUT", "5"], + pin6: ["VS", "6"], + pin7: ["OFFSET", "7"], + pin8: ["IN", "8", "IN_8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "ground", + pin3: "output", + pin4: "input", + pin5: "output", + pin6: "power", + pin7: "input", + pin8: "input", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const LMP8601MA_NOPB = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059) + return ( + + ); +}; + +export default LMP8601MA_NOPB; diff --git a/lib/chips/LMP8601QMAX_NOPB.circuit.tsx b/lib/chips/LMP8601QMAX_NOPB.circuit.tsx new file mode 100644 index 00000000..b3afbff5 --- /dev/null +++ b/lib/chips/LMP8601QMAX_NOPB.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["A1"], + pin4: ["A2"], + pin5: ["OUT"], + pin6: ["VS"], + pin7: ["OFFSET"], + pin8: ["IN_POS"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const LMP8601QMAX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMP8601QMAX_NOPB; diff --git a/lib/chips/LMQ66430MA3RXBRQ1.circuit.tsx b/lib/chips/LMQ66430MA3RXBRQ1.circuit.tsx new file mode 100644 index 00000000..a27e5e6e --- /dev/null +++ b/lib/chips/LMQ66430MA3RXBRQ1.circuit.tsx @@ -0,0 +1,298 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["NC1"], + pin3: ["VIN"], + pin4: ["NC2"], + pin5: ["NC5"], + pin6: ["PGND"], + pin7: ["SW"], + pin8: ["BOOT"], + pin9: ["NC3"], + pin10: ["VCC"], + pin11: ["pin11"], + pin12: ["NC4"], + pin13: ["pin13"], + pin14: ["PG"], + pin15: ["GND"], +} as const; + +const pinAttributes = { + pin2: { doNotConnect: true }, + pin3: { requiresPower: true }, + pin4: { doNotConnect: true }, + pin5: { doNotConnect: true }, + pin6: { requiresGround: true }, + pin9: { doNotConnect: true }, + pin10: { requiresPower: true }, + pin12: { doNotConnect: true }, + pin15: { requiresGround: true }, +} as const; + +export const LMQ66430MA3RXBRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C33608934.obj?uuid=85f04e68b40e45bda806c782d7805dcb", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C33608934.step?uuid=85f04e68b40e45bda806c782d7805dcb", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000019049999991693767, + y: -0.000012699999984988608, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default LMQ66430MA3RXBRQ1; diff --git a/lib/chips/LMQ66430R5RXBR.circuit.tsx b/lib/chips/LMQ66430R5RXBR.circuit.tsx new file mode 100644 index 00000000..fb2f74a2 --- /dev/null +++ b/lib/chips/LMQ66430R5RXBR.circuit.tsx @@ -0,0 +1,297 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["NC1"], + pin3: ["VIN"], + pin4: ["NC2"], + pin5: ["NC5"], + pin6: ["PGND"], + pin7: ["SW"], + pin8: ["BOOT"], + pin9: ["NC3"], + pin10: ["VCC"], + pin11: ["pin11"], + pin12: ["NC4"], + pin13: ["RT"], + pin14: ["PG"], + pin15: ["EP"], +} as const; + +const pinAttributes = { + pin2: { doNotConnect: true }, + pin3: { requiresPower: true }, + pin4: { doNotConnect: true }, + pin5: { doNotConnect: true }, + pin6: { requiresGround: true }, + pin9: { doNotConnect: true }, + pin10: { requiresPower: true }, + pin12: { doNotConnect: true }, +} as const; + +export const LMQ66430R5RXBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22440565.obj?uuid=85f04e68b40e45bda806c782d7805dcb", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22440565.step?uuid=85f04e68b40e45bda806c782d7805dcb", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000019049999991693767, + y: -0.000012699999984988608, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default LMQ66430R5RXBR; diff --git a/lib/chips/LMR33630CRNXR.circuit.tsx b/lib/chips/LMR33630CRNXR.circuit.tsx new file mode 100644 index 00000000..2a3edbcf --- /dev/null +++ b/lib/chips/LMR33630CRNXR.circuit.tsx @@ -0,0 +1,237 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND2"], + pin2: ["VIN2"], + pin3: ["NC"], + pin4: ["BOOT"], + pin5: ["VCC"], + pin6: ["AGND"], + pin7: ["FB"], + pin8: ["PG"], + pin9: ["EN"], + pin10: ["VIN1"], + pin11: ["PGND1"], + pin12: ["SW"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin3: { doNotConnect: true }, + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, + pin10: { requiresPower: true }, + pin11: { requiresGround: true }, +} as const; + +export const LMR33630CRNXR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default LMR33630CRNXR; diff --git a/lib/chips/LMR36502F3RPER.circuit.tsx b/lib/chips/LMR36502F3RPER.circuit.tsx new file mode 100644 index 00000000..47d09413 --- /dev/null +++ b/lib/chips/LMR36502F3RPER.circuit.tsx @@ -0,0 +1,187 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RT"], + pin2: ["PGOOD"], + pin3: ["pin3"], + pin4: ["VIN"], + pin5: ["SW"], + pin6: ["BOOT"], + pin7: ["VCC"], + pin8: ["pin8"], + pin9: ["GND"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, +} as const; + +export const LMR36502F3RPER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345529.obj?uuid=6d2eaa3cc3234bec976ac22420d41d6e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345529.step?uuid=6d2eaa3cc3234bec976ac22420d41d6e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.000012699999842880061, y: 0, z: -0.9 }, + }} + {...props} + /> + ); +}; + +export default LMR36502F3RPER; diff --git a/lib/chips/LMR36520FADDAR.circuit.tsx b/lib/chips/LMR36520FADDAR.circuit.tsx new file mode 100644 index 00000000..c7d8e414 --- /dev/null +++ b/lib/chips/LMR36520FADDAR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND"], + pin2: ["VIN"], + pin3: ["EN"], + pin4: ["PG"], + pin5: ["FB"], + pin6: ["VCC"], + pin7: ["BOOT"], + pin8: ["SW"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin6: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const LMR36520FADDAR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMR36520FADDAR; diff --git a/lib/chips/LMR43610R3RPER.circuit.tsx b/lib/chips/LMR43610R3RPER.circuit.tsx new file mode 100644 index 00000000..40a97530 --- /dev/null +++ b/lib/chips/LMR43610R3RPER.circuit.tsx @@ -0,0 +1,187 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["PGOOD"], + pin3: ["pin3"], + pin4: ["VIN"], + pin5: ["SW"], + pin6: ["BOOT"], + pin7: ["VCC"], + pin8: ["pin8"], + pin9: ["GND"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, +} as const; + +export const LMR43610R3RPER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345531.obj?uuid=6d2eaa3cc3234bec976ac22420d41d6e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20345531.step?uuid=6d2eaa3cc3234bec976ac22420d41d6e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.000012699999842880061, y: 0, z: -0.9 }, + }} + {...props} + /> + ); +}; + +export default LMR43610R3RPER; diff --git a/lib/chips/LMR50410Y3FQDBVRQ1.circuit.tsx b/lib/chips/LMR50410Y3FQDBVRQ1.circuit.tsx new file mode 100644 index 00000000..34570e2e --- /dev/null +++ b/lib/chips/LMR50410Y3FQDBVRQ1.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CB"], + pin2: ["GND"], + pin3: ["FB"], + pin4: ["EN"], + pin5: ["VIN"], + pin6: ["SW"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const LMR50410Y3FQDBVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LMR50410Y3FQDBVRQ1; diff --git a/lib/chips/LMR51610XDBVR.circuit.tsx b/lib/chips/LMR51610XDBVR.circuit.tsx new file mode 100644 index 00000000..90614741 --- /dev/null +++ b/lib/chips/LMR51610XDBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CB"], + pin2: ["GND"], + pin3: ["FB"], + pin4: ["EN"], + pin5: ["VIN"], + pin6: ["SW"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const LMR51610XDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMR51610XDBVR; diff --git a/lib/chips/LMR51635YFDDCR.circuit.tsx b/lib/chips/LMR51635YFDDCR.circuit.tsx new file mode 100644 index 00000000..b82e084b --- /dev/null +++ b/lib/chips/LMR51635YFDDCR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB"], + pin2: ["EN"], + pin3: ["VIN"], + pin4: ["GND"], + pin5: ["SW"], + pin6: ["CB"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const LMR51635YFDDCR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMR51635YFDDCR; diff --git a/lib/chips/LMT01LPG.circuit.tsx b/lib/chips/LMT01LPG.circuit.tsx new file mode 100644 index 00000000..e39b7c07 --- /dev/null +++ b/lib/chips/LMT01LPG.circuit.tsx @@ -0,0 +1,36 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VN"], + pin2: ["VP"], +} as const; + +export const LMT01LPG = (props: ChipProps) => { + return ( + + ); +}; + +export default LMT01LPG; diff --git a/lib/chips/LMT70YFQR.circuit.tsx b/lib/chips/LMT70YFQR.circuit.tsx new file mode 100644 index 00000000..3f2b2be7 --- /dev/null +++ b/lib/chips/LMT70YFQR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin4: ["GND", "A1"], + pin3: ["VDD", "A2"], + pin2: ["TAO", "B1"], + pin1: ["T_ON", "B2"], +} as const; + +const pinRoles = { + pin4: "ground", + pin3: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin3: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin4: [...pinLabels["pin4"], "pin1"], + pin1: [...pinLabels["pin1"], "pin4"], +} as const; + +export const LMT70YFQR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMT70YFQR; diff --git a/lib/chips/LMT84DCKR.circuit.tsx b/lib/chips/LMT84DCKR.circuit.tsx new file mode 100644 index 00000000..4bc09b89 --- /dev/null +++ b/lib/chips/LMT84DCKR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["OUT"], + pin4: ["VDD"], + pin5: ["GND3"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const LMT84DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMT84DCKR; diff --git a/lib/chips/LMT86QDCKRQ1.circuit.tsx b/lib/chips/LMT86QDCKRQ1.circuit.tsx new file mode 100644 index 00000000..9892f300 --- /dev/null +++ b/lib/chips/LMT86QDCKRQ1.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["OUT"], + pin4: ["VDD1"], + pin5: ["VDD2"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, +} as const; + +export const LMT86QDCKRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default LMT86QDCKRQ1; diff --git a/lib/chips/LMT88DCKR.circuit.tsx b/lib/chips/LMT88DCKR.circuit.tsx new file mode 100644 index 00000000..589c8b5d --- /dev/null +++ b/lib/chips/LMT88DCKR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["GND1"], + pin3: ["VO"], + pin4: ["V_POS"], + pin5: ["GND2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { requiresGround: true }, + pin5: { requiresGround: true }, +} as const; + +export const LMT88DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMT88DCKR; diff --git a/lib/chips/LMV324AIPWR.circuit.tsx b/lib/chips/LMV324AIPWR.circuit.tsx new file mode 100644 index 00000000..a7bd20c8 --- /dev/null +++ b/lib/chips/LMV324AIPWR.circuit.tsx @@ -0,0 +1,71 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN_A", "2", "IN_A_2"], + pin3: ["IN_A", "3", "IN_A_3"], + pin6: ["IN_B", "6", "IN_B_6"], + pin5: ["IN_B", "5", "IN_B_5"], + pin9: ["IN_C", "9", "IN_C_9"], + pin10: ["IN_C", "10", "IN_C_10"], + pin13: ["IN_D", "13", "IN_D_13"], + pin12: ["IN_D", "12", "IN_D_12"], + pin1: ["OUT_A", "1"], + pin7: ["OUT_B", "7"], + pin8: ["OUT_C", "8"], + pin14: ["OUT_D", "14"], + pin11: ["V_N", "11"], + pin4: ["V_P", "4"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin9: "input", + pin10: "input", + pin13: "input", + pin12: "input", + pin1: "output", + pin7: "output", + pin8: "output", + pin14: "output", + pin11: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin11: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const LMV324AIPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LMV324AIPWR; diff --git a/lib/chips/LMV331M5X_NOPB.circuit.tsx b/lib/chips/LMV331M5X_NOPB.circuit.tsx new file mode 100644 index 00000000..3d0d5288 --- /dev/null +++ b/lib/chips/LMV331M5X_NOPB.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_P"], + pin2: ["V_NEG"], + pin3: ["IN_N"], + pin4: ["OUTPUT"], + pin5: ["V_POS"], +} as const; + +export const LMV331M5X_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMV331M5X_NOPB; diff --git a/lib/chips/LMV431AIZ_NOPB.circuit.tsx b/lib/chips/LMV431AIZ_NOPB.circuit.tsx new file mode 100644 index 00000000..6afdda18 --- /dev/null +++ b/lib/chips/LMV431AIZ_NOPB.circuit.tsx @@ -0,0 +1,143 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["ANODE"], + pin3: ["CATHODE"], +} as const; + +export const LMV431AIZ_NOPB = (props: ChipProps) => { + return ( + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1575473.obj?uuid=86c9a28785b84e52859c2af3e4e264a5", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1575473.step?uuid=86c9a28785b84e52859c2af3e4e264a5", + pcbRotationOffset: 180, + modelOriginPosition: { + x: 0.19999955000002956, + y: 0.015055300000088923, + z: -0.000010000000000509601, + }, + }} + {...props} + /> + ); +}; + +export default LMV431AIZ_NOPB; diff --git a/lib/chips/LMV431BIMFX_NOPB.circuit.tsx b/lib/chips/LMV431BIMFX_NOPB.circuit.tsx new file mode 100644 index 00000000..9f6c8691 --- /dev/null +++ b/lib/chips/LMV431BIMFX_NOPB.circuit.tsx @@ -0,0 +1,33 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["CATHODE"], + pin3: ["ANODE"], +} as const; + +export const LMV431BIMFX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMV431BIMFX_NOPB; diff --git a/lib/chips/LMV431CM5X_NOPB.circuit.tsx b/lib/chips/LMV431CM5X_NOPB.circuit.tsx new file mode 100644 index 00000000..2f03989f --- /dev/null +++ b/lib/chips/LMV431CM5X_NOPB.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC2"], + pin2: ["NC1"], + pin3: ["CATHODE"], + pin4: ["REF"], + pin5: ["ANODE"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { doNotConnect: true }, +} as const; + +export const LMV431CM5X_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LMV431CM5X_NOPB; diff --git a/lib/chips/LP2980AIM5X_3_3_NOPB.circuit.tsx b/lib/chips/LP2980AIM5X_3_3_NOPB.circuit.tsx new file mode 100644 index 00000000..cb9e1022 --- /dev/null +++ b/lib/chips/LP2980AIM5X_3_3_NOPB.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const LP2980AIM5X_3_3_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LP2980AIM5X_3_3_NOPB; diff --git a/lib/chips/LP2985AIM5_3_3_NOPB.circuit.tsx b/lib/chips/LP2985AIM5_3_3_NOPB.circuit.tsx new file mode 100644 index 00000000..78a3959c --- /dev/null +++ b/lib/chips/LP2985AIM5_3_3_NOPB.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["pin3"], + pin4: ["BYPASS"], + pin5: ["VOUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const LP2985AIM5_3_3_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LP2985AIM5_3_3_NOPB; diff --git a/lib/chips/LP2998MAX_NOPB.circuit.tsx b/lib/chips/LP2998MAX_NOPB.circuit.tsx new file mode 100644 index 00000000..c0f5ab5b --- /dev/null +++ b/lib/chips/LP2998MAX_NOPB.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["SD"], + pin3: ["VSENSE"], + pin4: ["VREF"], + pin5: ["VDDQ"], + pin6: ["AVIN"], + pin7: ["PVIN"], + pin8: ["VTT"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const LP2998MAX_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default LP2998MAX_NOPB; diff --git a/lib/chips/LP5009PWR.circuit.tsx b/lib/chips/LP5009PWR.circuit.tsx new file mode 100644 index 00000000..e5eb3255 --- /dev/null +++ b/lib/chips/LP5009PWR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ADDR0"], + pin2: ["AGND"], + pin3: ["ADDR1"], + pin4: ["VCC"], + pin5: ["SDA"], + pin6: ["PGND"], + pin7: ["SCL"], + pin8: ["EN"], + pin9: ["IREF"], + pin10: ["VCAP"], + pin11: ["NC1"], + pin12: ["OUT0"], + pin13: ["OUT1"], + pin14: ["OUT2"], + pin15: ["OUT3"], + pin16: ["OUT4"], + pin17: ["OUT5"], + pin18: ["DGND"], + pin19: ["OUT6"], + pin20: ["OUT7"], + pin21: ["OUT8"], + pin22: ["NC2"], + pin23: ["NC3"], + pin24: ["NC4"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, + pin6: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin22: { doNotConnect: true }, + pin23: { doNotConnect: true }, + pin24: { doNotConnect: true }, +} as const; + +export const LP5009PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default LP5009PWR; diff --git a/lib/chips/LP5036RJVR.circuit.tsx b/lib/chips/LP5036RJVR.circuit.tsx new file mode 100644 index 00000000..59cb148b --- /dev/null +++ b/lib/chips/LP5036RJVR.circuit.tsx @@ -0,0 +1,582 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT0"], + pin2: ["OUT1"], + pin3: ["OUT2"], + pin4: ["OUT3"], + pin5: ["OUT4"], + pin6: ["OUT5"], + pin7: ["OUT6"], + pin8: ["OUT7"], + pin9: ["OUT8"], + pin10: ["OUT9"], + pin11: ["OUT10"], + pin12: ["OUT11"], + pin13: ["OUT12"], + pin14: ["OUT13"], + pin15: ["OUT14"], + pin16: ["OUT15"], + pin17: ["OUT16"], + pin18: ["OUT17"], + pin19: ["OUT18"], + pin20: ["OUT19"], + pin21: ["OUT20"], + pin22: ["OUT21"], + pin23: ["OUT22"], + pin24: ["OUT23"], + pin25: ["OUT24"], + pin26: ["OUT25"], + pin27: ["OUT26"], + pin28: ["OUT27"], + pin29: ["OUT28"], + pin30: ["OUT29"], + pin31: ["OUT30"], + pin32: ["OUT31"], + pin33: ["OUT32"], + pin34: ["OUT33"], + pin35: ["OUT34"], + pin36: ["OUT35"], + pin37: ["GND1"], + pin38: ["ADDR0"], + pin39: ["ADDR1"], + pin40: ["VCC"], + pin41: ["SDA"], + pin42: ["SCL"], + pin43: ["EN"], + pin44: ["IREF"], + pin45: ["VCAP"], + pin46: ["GND2"], + pin47: ["EP"], +} as const; + +const pinAttributes = { + pin37: { requiresGround: true }, + pin40: { requiresPower: true }, + pin46: { requiresGround: true }, +} as const; + +export const LP5036RJVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C701961.obj?uuid=981c957296194e9ab0a46f12d1c37e64", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C701961.step?uuid=981c957296194e9ab0a46f12d1c37e64", + pcbRotationOffset: 0, + modelOriginPosition: { x: -0.000012699999984988608, y: 0, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default LP5036RJVR; diff --git a/lib/chips/LP5813AYBHR.circuit.tsx b/lib/chips/LP5813AYBHR.circuit.tsx new file mode 100644 index 00000000..8290fd59 --- /dev/null +++ b/lib/chips/LP5813AYBHR.circuit.tsx @@ -0,0 +1,88 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin8: ["EN", "A1"], + pin12: ["VIN", "A2"], + pin11: ["SW", "A3"], + pin7: ["OUT0", "B1"], + pin9: ["GND", "B2"], + pin10: ["VOUT", "B3"], + pin4: ["OUT1", "C1"], + pin5: ["SYNC", "C2"], + pin6: ["SCL", "C3"], + pin3: ["OUT2", "D1"], + pin2: ["OUT3", "D2"], + pin1: ["SDA", "D3"], +} as const; + +const pinRoles = { + pin8: "input", + pin12: "power", + pin11: "power", + pin7: "output", + pin9: "ground", + pin10: "power", + pin4: "output", + pin5: "bidirectional", + pin6: "input", + pin3: "output", + pin2: "output", + pin1: "bidirectional", +} as const; + +const pinAttributes = { + pin12: { + requiresPower: true, + }, + pin11: { + requiresPower: true, + }, + pin9: { + requiresGround: true, + }, + pin10: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin8: [...pinLabels["pin8"], "pin1"], + pin7: [...pinLabels["pin7"], "pin2"], + pin4: [...pinLabels["pin4"], "pin3"], + pin3: [...pinLabels["pin3"], "pin4"], + pin12: [...pinLabels["pin12"], "pin5"], + pin9: [...pinLabels["pin9"], "pin6"], + pin5: [...pinLabels["pin5"], "pin7"], + pin2: [...pinLabels["pin2"], "pin8"], + pin11: [...pinLabels["pin11"], "pin9"], + pin6: [...pinLabels["pin6"], "pin11"], + pin1: [...pinLabels["pin1"], "pin12"], +} as const; + +export const LP5813AYBHR = (props: ChipProps) => { + return ( + + ); +}; + +export default LP5813AYBHR; diff --git a/lib/chips/LPV821DBVR.circuit.tsx b/lib/chips/LPV821DBVR.circuit.tsx new file mode 100644 index 00000000..ef1d81be --- /dev/null +++ b/lib/chips/LPV821DBVR.circuit.tsx @@ -0,0 +1,35 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["V_NEG"], + pin3: ["IN_P"], + pin4: ["IN_N"], + pin5: ["V_POS"], +} as const; + +export const LPV821DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default LPV821DBVR; diff --git a/lib/chips/LSF0108DGSR.circuit.tsx b/lib/chips/LSF0108DGSR.circuit.tsx new file mode 100644 index 00000000..1bd17a31 --- /dev/null +++ b/lib/chips/LSF0108DGSR.circuit.tsx @@ -0,0 +1,259 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GNA"], + pin2: ["VREF_A"], + pin3: ["A1"], + pin4: ["A2"], + pin5: ["A3"], + pin6: ["A4"], + pin7: ["A5"], + pin8: ["A6"], + pin9: ["A7"], + pin10: ["A8"], + pin11: ["B8"], + pin12: ["B7"], + pin13: ["B6"], + pin14: ["B5"], + pin15: ["B4"], + pin16: ["B3"], + pin17: ["B2"], + pin18: ["B1"], + pin19: ["VREF_B"], + pin20: ["EN"], +} as const; + +export const LSF0108DGSR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6653422.obj?uuid=bab62e2d64044af5b779fe29bc643ea7", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6653422.step?uuid=bab62e2d64044af5b779fe29bc643ea7", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.0007153000000537091, + y: -0.000012699999956566899, + z: -0.6, + }, + }} + {...props} + /> + ); +}; + +export default LSF0108DGSR; diff --git a/lib/chips/MAX3221CPWR.circuit.tsx b/lib/chips/MAX3221CPWR.circuit.tsx new file mode 100644 index 00000000..3bb364f7 --- /dev/null +++ b/lib/chips/MAX3221CPWR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["C1_POS"], + pin3: ["V_POS"], + pin4: ["C1_NEG"], + pin5: ["C2_POS"], + pin6: ["C2_NEG"], + pin7: ["V_NEG"], + pin8: ["RIN"], + pin9: ["ROUT"], + pin10: ["INVALID"], + pin11: ["DIN"], + pin12: ["FORCEON"], + pin13: ["DOUT"], + pin14: ["GND"], + pin15: ["VCC"], + pin16: ["FORCEOFF"], +} as const; + +const pinAttributes = { + pin14: { requiresGround: true }, + pin15: { requiresPower: true }, +} as const; + +export const MAX3221CPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default MAX3221CPWR; diff --git a/lib/chips/MAX3221ECDBR.circuit.tsx b/lib/chips/MAX3221ECDBR.circuit.tsx new file mode 100644 index 00000000..b4f981eb --- /dev/null +++ b/lib/chips/MAX3221ECDBR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["C1_POS"], + pin3: ["V_POS"], + pin4: ["pin4"], + pin5: ["C2_POS"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["RIN"], + pin9: ["ROUT"], + pin10: ["INVALID"], + pin11: ["DIN"], + pin12: ["FORCEON"], + pin13: ["DOUT"], + pin14: ["GND"], + pin15: ["VCC"], + pin16: ["FORCEOFF"], +} as const; + +const pinAttributes = { + pin14: { requiresGround: true }, + pin15: { requiresPower: true }, +} as const; + +export const MAX3221ECDBR = (props: ChipProps) => { + return ( + + ); +}; + +export default MAX3221ECDBR; diff --git a/lib/chips/MSP430F5437AIPNR.circuit.tsx b/lib/chips/MSP430F5437AIPNR.circuit.tsx new file mode 100644 index 00000000..ad1b1f18 --- /dev/null +++ b/lib/chips/MSP430F5437AIPNR.circuit.tsx @@ -0,0 +1,197 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["P6_4", "A4", "1"], + pin2: ["P6_5", "A5", "2"], + pin3: ["P6_6", "A6", "3"], + pin4: ["P6_7", "A7", "4"], + pin5: ["P7_4", "A12", "5"], + pin6: ["P7_5", "A13", "6"], + pin7: ["P7_6", "A14", "7"], + pin8: ["P7_7", "A15", "8"], + pin9: ["P5_0", "A8", "VREF", "VEREF", "9"], + pin10: ["P5_1", "A9", "VREF", "VEREF", "10"], + pin11: ["AVCC", "11"], + pin12: ["AVSS", "12"], + pin13: ["P7_0", "XIN", "13"], + pin14: ["P7_1", "XOUT", "14"], + pin15: ["DVSS1", "15"], + pin16: ["DVCC1", "16"], + pin17: ["P1_0", "TA0CLK", "ACLK", "17"], + pin18: ["P1_1", "TA0_0", "18"], + pin19: ["P1_2", "TA0_1", "19"], + pin20: ["P1_3", "TA0_2", "20"], + pin21: ["P1_4", "TA0_3", "21"], + pin22: ["P1_5", "TA0_4", "22"], + pin23: ["P1_6", "SMCLK", "23"], + pin24: ["P1_7", "24"], + pin25: ["P2_0", "TA1CLK", "MCLK", "25"], + pin26: ["P2_1", "TA1_0", "26"], + pin27: ["P2_2", "TA1_1", "27"], + pin28: ["P2_3", "TA1_2", "28"], + pin29: ["P2_4", "RTCCLK", "29"], + pin30: ["DVSS3", "30"], + pin31: ["DVCC3", "31"], + pin32: ["P2_5", "32"], + pin33: ["P2_6", "ACLK", "33"], + pin34: ["P2_7", "ADC12CLK", "DMAE0", "34"], + pin35: ["P3_0", "UCB0STE", "UCA0CLK", "35"], + pin36: ["P3_1", "UCB0SIMO", "UCB0SDA", "36"], + pin37: ["P3_2", "UCB0SOMI", "UCB0SCL", "37"], + pin38: ["P3_3", "UCB0CLK", "UCA0STE", "38"], + pin39: ["P3_4", "UCA0TXD", "UCA0SIMO", "39"], + pin40: ["P3_5", "UCA0RXD", "UCA0SOMI", "40"], + pin41: ["P3_6", "UCB1STE", "UCA1CLK", "41"], + pin42: ["P3_7", "UCB1SIMO", "UCB1SDA", "42"], + pin43: ["P4_0", "TB0_0", "43"], + pin44: ["P4_1", "TB0_1", "44"], + pin45: ["P4_2", "TB0_2", "45"], + pin46: ["P4_3", "TB0_3", "46"], + pin47: ["P4_4", "TB0_4", "47"], + pin48: ["P4_5", "TB0_5", "48"], + pin49: ["VCORE", "49"], + pin50: ["DVSS2", "50"], + pin51: ["DVCC2", "51"], + pin52: ["P4_6", "TB0_6", "52"], + pin53: ["P4_7", "TB0CLK", "SMCLK", "53"], + pin54: ["P5_4", "UCB1SOMI", "UCB1SCL", "54"], + pin55: ["P5_5", "UCB1CLK", "UCA1STE", "55"], + pin56: ["P5_6", "UCA1TXD", "UCA1SIMO", "56"], + pin57: ["P5_7", "UCA1RXD", "UCA1SOMI", "57"], + pin58: ["P7_2", "TB0OUTH", "SVMOUT", "58"], + pin59: ["P7_3", "TA1_2", "59"], + pin60: ["P8_0", "TA0_0", "60"], + pin61: ["P8_1", "TA0_1", "61"], + pin62: ["P8_2", "TA0_2", "62"], + pin63: ["P8_3", "TA0_3", "63"], + pin64: ["P8_4", "TA0_4", "64"], + pin65: ["P8_5", "TA1_0", "65"], + pin66: ["P8_6", "TA1_1", "66"], + pin67: ["DVCC4", "67"], + pin68: ["DVSS4", "68"], + pin69: ["P5_2", "XT2IN", "69"], + pin70: ["P5_3", "XT2OUT", "70"], + pin71: ["TEST", "SBWTCK", "71"], + pin72: ["PJ_0", "TDO", "72"], + pin73: ["PJ_1", "TDI", "TCLK", "73"], + pin74: ["PJ_2", "TMS", "74"], + pin75: ["PJ_3", "TCK", "75"], + pin76: ["RST", "NMI", "SBWTDIO", "76"], + pin77: ["P6_0", "A0", "77"], + pin78: ["P6_1", "A1", "78"], + pin79: ["P6_2", "A2", "79"], + pin80: ["P6_3", "A3", "80"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "power", + pin12: "ground", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "ground", + pin16: "power", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "bidirectional", + pin29: "bidirectional", + pin30: "ground", + pin31: "power", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "bidirectional", + pin35: "bidirectional", + pin36: "bidirectional", + pin37: "bidirectional", + pin38: "bidirectional", + pin39: "bidirectional", + pin40: "bidirectional", + pin41: "bidirectional", + pin42: "bidirectional", + pin43: "bidirectional", + pin44: "bidirectional", + pin45: "bidirectional", + pin46: "bidirectional", + pin47: "bidirectional", + pin48: "bidirectional", + pin49: "unknown", + pin50: "ground", + pin51: "power", + pin52: "bidirectional", + pin53: "bidirectional", + pin54: "bidirectional", + pin55: "bidirectional", + pin56: "bidirectional", + pin57: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin60: "bidirectional", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "bidirectional", + pin64: "bidirectional", + pin65: "bidirectional", + pin66: "bidirectional", + pin67: "power", + pin68: "ground", + pin69: "bidirectional", + pin70: "bidirectional", + pin71: "control", + pin72: "bidirectional", + pin73: "bidirectional", + pin74: "bidirectional", + pin75: "bidirectional", + pin76: "bidirectional", + pin77: "bidirectional", + pin78: "bidirectional", + pin79: "bidirectional", + pin80: "bidirectional", +} as const; + +const pinAttributes = { + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin15: { requiresGround: true }, + pin16: { requiresPower: true }, + pin30: { requiresGround: true }, + pin31: { requiresPower: true }, + pin50: { requiresGround: true }, + pin51: { requiresPower: true }, + pin67: { requiresPower: true }, + pin68: { requiresGround: true }, +} as const; + +export const MSP430F5437AIPNR = (props: ChipProps) => { + // Footprint provenance: TI drawing PN0080A; donor F280025PNSR (JLCPCB C5218674) + return ( + + ); +}; + +export default MSP430F5437AIPNR; diff --git a/lib/chips/MSP430F5528IZXHR.circuit.tsx b/lib/chips/MSP430F5528IZXHR.circuit.tsx new file mode 100644 index 00000000..8d8419a2 --- /dev/null +++ b/lib/chips/MSP430F5528IZXHR.circuit.tsx @@ -0,0 +1,897 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["P6_0_CB0_A0", "A1"], + pin2: ["RST_NMI_SBWTDIO", "A2"], + pin3: ["PJ_2_TMS", "A3"], + pin4: ["TEST_SBWTCK", "A4"], + pin5: ["AVSS2", "A5"], + pin6: ["VUSB", "A6"], + pin7: ["VBUS", "A7"], + pin8: ["PU_1_DM", "A8"], + pin9: ["PU_0_DP", "A9"], + pin10: ["P6_2_CB2_A2", "B1"], + pin11: ["P6_1_CB1_A1", "B2"], + pin12: ["PJ_3_TCK", "B3"], + pin13: ["P5_3_XT2OUT", "B4"], + pin14: ["P5_2_XT2IN", "B5"], + pin15: ["V18", "B6"], + pin16: ["PUR", "B7"], + pin17: ["VSSU", "B8", "VSSU_B8"], + pin18: ["VSSU", "B9", "VSSU_B9"], + pin19: ["P6_4_CB4_A4", "C1"], + pin20: ["P6_3_CB3_A3", "C2"], + pin21: ["PJ_1_TDI_TCLK", "C4"], + pin22: ["PJ_0_TDO", "C5"], + pin23: ["NC", "C6", "NC_C6"], + pin24: ["P4_7_PM_NONE", "C7"], + pin25: ["P4_6_PM_NONE", "C8"], + pin26: ["P4_5_PM_UCA1RXD_PM_UCA1SOMI", "C9"], + pin27: ["P6_6_CB6_A6", "D1"], + pin28: ["P6_5_CB5_A5", "D2"], + pin29: ["P6_7_CB7_A7", "D3"], + pin30: ["NC", "D4", "NC_D4"], + pin31: ["NC", "D5", "NC_D5"], + pin32: ["NC", "D6", "NC_D6"], + pin33: ["P4_4_PM_UCA1TXD_PM_UCA1SIMO", "D7"], + pin34: ["P4_3_PM_UCB1CLK_PM_UCA1STE", "D8"], + pin35: ["P4_2_PM_UCB1SOMI_PM_UCB1SCL", "D9"], + pin36: ["P5_0_A8_VREF_VeREF_P", "E1"], + pin37: ["P5_1_A9_VREF_VeREF_N", "E2"], + pin38: ["NC", "E3", "NC_E3"], + pin39: ["NC", "E4", "NC_E4"], + pin40: ["NC", "E5", "NC_E5"], + pin41: ["NC", "E6", "NC_E6"], + pin42: ["P4_1_PM_UCB1SIMO_PM_UCB1SDA", "E7"], + pin43: ["P4_0_PM_UCB1STE_PM_UCA1CLK", "E8"], + pin44: ["DVCC2", "E9"], + pin45: ["P5_4_XIN", "F1"], + pin46: ["AVCC1", "F2"], + pin47: ["NC", "F3", "NC_F3"], + pin48: ["NC", "F4", "NC_F4"], + pin49: ["NC", "F5", "NC_F5"], + pin50: ["NC", "F6", "NC_F6"], + pin51: ["NC", "F7", "NC_F7"], + pin52: ["NC", "F8", "NC_F8"], + pin53: ["DVSS2", "F9"], + pin54: ["P5_5_XOUT", "G1"], + pin55: ["AVSS1", "G2"], + pin56: ["NC", "G3", "NC_G3"], + pin57: ["P1_3_TA0_2", "G4"], + pin58: ["P1_6_TA1CLK_CBOUT", "G5"], + pin59: ["P2_1_TA1_2", "G6"], + pin60: ["P3_4_UCA0RXD_UCA0SOMI", "G7"], + pin61: ["P3_2_UCB0CLK_UCA0STE", "G8"], + pin62: ["P3_3_UCA0TXD_UCA0SIMO", "G9"], + pin63: ["DVCC1", "H1"], + pin64: ["P1_0_TA0CLK_ACLK", "H2"], + pin65: ["P1_1_TA0_0", "H3"], + pin66: ["P1_4_TA0_3", "H4"], + pin67: ["P1_7_TA1_0", "H5"], + pin68: ["P2_3_TA2_0", "H6"], + pin69: ["P2_7_UCB0STE_UCA0CLK", "H7"], + pin70: ["P3_0_UCB0SIMO_UCB0SDA", "H8"], + pin71: ["P3_1_UCB0SOMI_UCB0SCL", "H9"], + pin72: ["DVSS1", "J1"], + pin73: ["VCORE", "J2"], + pin74: ["P1_2_TA0_1", "J3"], + pin75: ["P1_5_TA0_4", "J4"], + pin76: ["P2_0_TA1_1", "J5"], + pin77: ["P2_2_TA2CLK_SMCLK", "J6"], + pin78: ["P2_4_TA2_1", "J7"], + pin79: ["P2_5_TA2_2", "J8"], + pin80: ["P2_6_RTCCLK_DMAE0", "J9"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "input", + pin5: "ground", + pin7: "power", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin16: "bidirectional", + pin17: "ground", + pin18: "ground", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "no-connect", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "bidirectional", + pin29: "bidirectional", + pin30: "no-connect", + pin31: "no-connect", + pin32: "no-connect", + pin33: "bidirectional", + pin34: "bidirectional", + pin35: "bidirectional", + pin36: "bidirectional", + pin37: "bidirectional", + pin38: "no-connect", + pin39: "no-connect", + pin40: "no-connect", + pin41: "no-connect", + pin42: "bidirectional", + pin43: "bidirectional", + pin44: "power", + pin45: "bidirectional", + pin46: "power", + pin47: "no-connect", + pin48: "no-connect", + pin49: "no-connect", + pin50: "no-connect", + pin51: "no-connect", + pin52: "no-connect", + pin53: "ground", + pin54: "bidirectional", + pin55: "ground", + pin56: "no-connect", + pin57: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin60: "bidirectional", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "power", + pin64: "bidirectional", + pin65: "bidirectional", + pin66: "bidirectional", + pin67: "bidirectional", + pin68: "bidirectional", + pin69: "bidirectional", + pin70: "bidirectional", + pin71: "bidirectional", + pin72: "ground", + pin73: "power", + pin74: "bidirectional", + pin75: "bidirectional", + pin76: "bidirectional", + pin77: "bidirectional", + pin78: "bidirectional", + pin79: "bidirectional", + pin80: "bidirectional", +} as const; + +const pinAttributes = { + pin5: { + requiresGround: true, + }, + pin7: { + requiresPower: true, + }, + pin17: { + requiresGround: true, + }, + pin18: { + requiresGround: true, + }, + pin23: { + doNotConnect: true, + }, + pin30: { + doNotConnect: true, + }, + pin31: { + doNotConnect: true, + }, + pin32: { + doNotConnect: true, + }, + pin38: { + doNotConnect: true, + }, + pin39: { + doNotConnect: true, + }, + pin40: { + doNotConnect: true, + }, + pin41: { + doNotConnect: true, + }, + pin44: { + requiresPower: true, + }, + pin46: { + requiresPower: true, + }, + pin47: { + doNotConnect: true, + }, + pin48: { + doNotConnect: true, + }, + pin49: { + doNotConnect: true, + }, + pin50: { + doNotConnect: true, + }, + pin51: { + doNotConnect: true, + }, + pin52: { + doNotConnect: true, + }, + pin53: { + requiresGround: true, + }, + pin55: { + requiresGround: true, + }, + pin56: { + doNotConnect: true, + }, + pin63: { + requiresPower: true, + }, + pin72: { + requiresGround: true, + }, + pin73: { + requiresPower: true, + }, +} as const; + +export const MSP430F5528IZXHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2873415.obj?uuid=c3ddfd1ad1b4455789e04c5c325d5570", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2873415.step?uuid=c3ddfd1ad1b4455789e04c5c325d5570", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.3 }, + }} + {...props} + /> + ); +}; + +export default MSP430F5528IZXHR; diff --git a/lib/chips/MSP430F5529IPN.circuit.tsx b/lib/chips/MSP430F5529IPN.circuit.tsx new file mode 100644 index 00000000..48114562 --- /dev/null +++ b/lib/chips/MSP430F5529IPN.circuit.tsx @@ -0,0 +1,110 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["AVCC1"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["AVSS1"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["DVCC1"], + pin19: ["DVSS1"], + pin20: ["VCORE"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["DVSS2"], + pin50: ["DVCC2"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["pin53"], + pin54: ["pin54"], + pin55: ["pin55"], + pin56: ["pin56"], + pin57: ["pin57"], + pin58: ["pin58"], + pin59: ["pin59"], + pin60: ["pin60"], + pin61: ["VSSU"], + pin62: ["pin62"], + pin63: ["PUR"], + pin64: ["pin64"], + pin65: ["VBUS"], + pin66: ["VUSB"], + pin67: ["V18"], + pin68: ["AVSS2"], + pin69: ["pin69"], + pin70: ["pin70"], + pin71: ["pin71"], + pin72: ["pin72"], + pin73: ["pin73"], + pin74: ["pin74"], + pin75: ["pin75"], + pin76: ["pin76"], + pin77: ["pin77"], + pin78: ["pin78"], + pin79: ["pin79"], + pin80: ["pin80"], +} as const; + +export const MSP430F5529IPN = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430F5529IPN; diff --git a/lib/chips/MSP430FR2512IPW16R.circuit.tsx b/lib/chips/MSP430FR2512IPW16R.circuit.tsx new file mode 100644 index 00000000..bde73e9b --- /dev/null +++ b/lib/chips/MSP430FR2512IPW16R.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["DVCC"], + pin6: ["DVSS"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["VREG"], + pin15: ["pin15"], + pin16: ["pin16"], +} as const; + +export const MSP430FR2512IPW16R = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR2512IPW16R; diff --git a/lib/chips/MSP430FR2532IRGER.circuit.tsx b/lib/chips/MSP430FR2532IRGER.circuit.tsx new file mode 100644 index 00000000..8dbcc303 --- /dev/null +++ b/lib/chips/MSP430FR2532IRGER.circuit.tsx @@ -0,0 +1,80 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SBWTDIO", "1"], + pin2: ["SBWTCK", "2"], + pin3: ["A4", "3"], + pin4: ["A5", "4"], + pin5: ["A6", "5"], + pin6: ["A7", "6"], + pin7: ["A0", "7"], + pin8: ["A1", "8"], + pin9: ["A2", "9"], + pin10: ["A3", "10"], + pin11: ["SYNC", "11"], + pin12: ["CAP0_2", "12"], + pin13: ["CAP0_3", "13"], + pin14: ["CAP1_2", "14"], + pin15: ["CAP1_3", "15"], + pin16: ["VREG", "16"], + pin17: ["CAP2_0", "17"], + pin18: ["CAP2_1", "18"], + pin19: ["CAP3_0", "19"], + pin20: ["CAP3_1", "20"], + pin21: ["XOUT", "21"], + pin22: ["XIN", "22"], + pin23: ["DVSS", "23"], + pin24: ["DVCC", "24"], + pin25: ["VQFN_THERMAL_PAD", "PAD"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "control", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "output", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "output", + pin22: "input", + pin23: "power", + pin24: "power", + pin25: "ground", +} as const; + +const pinAttributes = { + pin23: { requiresPower: true }, + pin24: { requiresPower: true }, + pin25: { requiresGround: true }, +} as const; + +export const MSP430FR2532IRGER = (props: ChipProps) => { + // Footprint provenance: TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529) + return ( + + ); +}; + +export default MSP430FR2532IRGER; diff --git a/lib/chips/MSP430FR2533IRHBR.circuit.tsx b/lib/chips/MSP430FR2533IRHBR.circuit.tsx new file mode 100644 index 00000000..3722dfe9 --- /dev/null +++ b/lib/chips/MSP430FR2533IRHBR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["VREG"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["DVSS"], + pin32: ["DVCC"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const MSP430FR2533IRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR2533IRHBR; diff --git a/lib/chips/MSP430FR2632IYQWR.circuit.tsx b/lib/chips/MSP430FR2632IYQWR.circuit.tsx new file mode 100644 index 00000000..49ced6bd --- /dev/null +++ b/lib/chips/MSP430FR2632IYQWR.circuit.tsx @@ -0,0 +1,320 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["A0", "B1"], + pin1: ["A1"], + pin6: ["A2", "B2"], + pin5: ["A3", "A2"], + pin3: ["A4", "D1"], + pin7: ["A5", "C2"], + pin12: ["A6", "C3"], + pin11: ["A7", "B3"], + pin15: ["CAP0_0", "A4"], + pin20: ["CAP0_2", "A5"], + pin16: ["CAP1_2", "B4"], + pin21: ["CAP1_3", "B5"], + pin17: ["CAP2_0", "C4"], + pin23: ["CAP2_2", "D5"], + pin24: ["CAP3_0", "E5"], + pin18: ["CAP3_2", "D4"], + pin10: ["SYNC", "A3"], + pin14: ["XIN", "E3"], + pin19: ["XOUT", "E4"], + pin8: ["SBWTCK", "D2"], + pin4: ["SBWTDIO", "E1"], + pin9: ["DVCC", "E2"], + pin13: ["DVSS", "D3"], + pin22: ["VREG", "C5"], +} as const; + +const pinRoles = { + pin2: "input", + pin1: "input", + pin6: "input", + pin5: "input", + pin3: "input", + pin7: "input", + pin12: "input", + pin11: "input", + pin15: "bidirectional", + pin20: "bidirectional", + pin16: "bidirectional", + pin21: "bidirectional", + pin17: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin18: "bidirectional", + pin10: "input", + pin14: "input", + pin19: "output", + pin8: "input", + pin4: "bidirectional", + pin9: "power", + pin13: "ground", + pin22: "output", +} as const; + +const pinAttributes = { + pin9: { + requiresPower: true, + }, + pin13: { + requiresGround: true, + }, +} as const; + +export const MSP430FR2632IYQWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2053274.obj?uuid=cdf3453816d9432ab39b610be19ac9f2", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2053274.step?uuid=cdf3453816d9432ab39b610be19ac9f2", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0.000012699999999199463, + z: -0.195, + }, + }} + {...props} + /> + ); +}; + +export default MSP430FR2632IYQWR; diff --git a/lib/chips/MSP430FR2633IDAR.circuit.tsx b/lib/chips/MSP430FR2633IDAR.circuit.tsx new file mode 100644 index 00000000..04bdb4b0 --- /dev/null +++ b/lib/chips/MSP430FR2633IDAR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["DVSS"], + pin4: ["DVCC"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["VREG"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["pin32"], +} as const; + +export const MSP430FR2633IDAR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR2633IDAR; diff --git a/lib/chips/MSP430FR2672TRHBR.circuit.tsx b/lib/chips/MSP430FR2672TRHBR.circuit.tsx new file mode 100644 index 00000000..d06064a4 --- /dev/null +++ b/lib/chips/MSP430FR2672TRHBR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["VREG"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["DVSS"], + pin32: ["DVCC"], + pin33: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const MSP430FR2672TRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR2672TRHBR; diff --git a/lib/chips/MSP430FR2675TPTR.circuit.tsx b/lib/chips/MSP430FR2675TPTR.circuit.tsx new file mode 100644 index 00000000..336c7b7b --- /dev/null +++ b/lib/chips/MSP430FR2675TPTR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DVCC"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["VREG"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["DVSS"], +} as const; + +export const MSP430FR2675TPTR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR2675TPTR; diff --git a/lib/chips/MSP430FR4133IPMR.circuit.tsx b/lib/chips/MSP430FR4133IPMR.circuit.tsx new file mode 100644 index 00000000..b9a9e890 --- /dev/null +++ b/lib/chips/MSP430FR4133IPMR.circuit.tsx @@ -0,0 +1,94 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["DVSS"], + pin9: ["DVCC"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["pin53"], + pin54: ["pin54"], + pin55: ["pin55"], + pin56: ["pin56"], + pin57: ["pin57"], + pin58: ["pin58"], + pin59: ["pin59"], + pin60: ["pin60"], + pin61: ["pin61"], + pin62: ["pin62"], + pin63: ["pin63"], + pin64: ["pin64"], +} as const; + +export const MSP430FR4133IPMR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR4133IPMR; diff --git a/lib/chips/MSP430FR5869IRGZR.circuit.tsx b/lib/chips/MSP430FR5869IRGZR.circuit.tsx new file mode 100644 index 00000000..8e9a4cd4 --- /dev/null +++ b/lib/chips/MSP430FR5869IRGZR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["pin35"], + pin36: ["DVSS"], + pin37: ["DVCC"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["AVSS1"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["AVSS2"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["AVSS3"], + pin48: ["AVCC"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const MSP430FR5869IRGZR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSP430FR5869IRGZR; diff --git a/lib/chips/MSP430FR5969IRGZR.circuit.tsx b/lib/chips/MSP430FR5969IRGZR.circuit.tsx new file mode 100644 index 00000000..12a20f48 --- /dev/null +++ b/lib/chips/MSP430FR5969IRGZR.circuit.tsx @@ -0,0 +1,132 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["P1_0", "TA0_1", "DMAE0", "RTCCLK", "A0", "C0", "VREF", "VEREF", "1"], + pin2: ["P1_1", "TA0_2", "TA1CLK", "COUT", "A1", "C1", "VREF", "VEREF", "2"], + pin3: ["P1_2", "TA1_1", "TA0CLK", "COUT", "A2", "C2", "3"], + pin4: ["P3_0", "A12", "C12", "4"], + pin5: ["P3_1", "A13", "C13", "5"], + pin6: ["P3_2", "A14", "C14", "6"], + pin7: ["P3_3", "A15", "C15", "7"], + pin8: ["P4_7", "8"], + pin9: ["P1_3", "TA1_2", "UCB0STE", "A3", "C3", "9"], + pin10: ["P1_4", "TB0_1", "UCA0STE", "A4", "C4", "10"], + pin11: ["P1_5", "TB0_2", "UCA0CLK", "A5", "C5", "11"], + pin12: ["PJ_0", "TDO", "TB0OUTH", "SMCLK", "SRSCG1", "C6", "12"], + pin13: ["PJ_1", "TDI", "TCLK", "MCLK", "SRSCG0", "C7", "13"], + pin14: ["PJ_2", "TMS", "ACLK", "SROSCOFF", "C8", "14"], + pin15: ["PJ_3", "TCK", "SRCPUOFF", "C9", "15"], + pin16: ["P4_0", "A8", "16"], + pin17: ["P4_1", "A9", "17"], + pin18: ["P4_2", "A10", "18"], + pin19: ["P4_3", "A11", "19"], + pin20: ["P2_5", "TB0_0", "UCA1TXD", "UCA1SIMO", "20"], + pin21: ["P2_6", "TB0_1", "UCA1RXD", "UCA1SOMI", "21"], + pin22: ["TEST", "SBWTCK", "22"], + pin23: ["RST", "NMI", "SBWTDIO", "23"], + pin24: ["P2_0", "TB0_6", "UCA0TXD", "UCA0SIMO", "TB0CLK", "ACLK", "24"], + pin25: ["P2_1", "TB0_0", "UCA0RXD", "UCA0SOMI", "25"], + pin26: ["P2_2", "TB0_2", "UCB0CLK", "26"], + pin27: ["P3_4", "TB0_3", "SMCLK", "27"], + pin28: ["P3_5", "TB0_4", "COUT", "28"], + pin29: ["P3_6", "TB0_5", "29"], + pin30: ["P3_7", "TB0_6", "30"], + pin31: ["P1_6", "TB0_3", "UCB0SIMO", "UCB0SDA", "TA0_0", "31"], + pin32: ["P1_7", "TB0_4", "UCB0SOMI", "UCB0SCL", "TA1_0", "32"], + pin33: ["P4_4", "TB0_5", "33"], + pin34: ["P4_5", "34"], + pin35: ["P4_6", "35"], + pin36: ["DVSS", "36"], + pin37: ["DVCC", "37"], + pin38: ["P2_7", "38"], + pin39: ["P2_3", "TA0_0", "UCA1STE", "A6", "C10", "39"], + pin40: ["P2_4", "TA1_0", "UCA1CLK", "A7", "C11", "40"], + pin41: ["AVSS", "41", "AVSS_41"], + pin42: ["PJ_6", "HFXIN", "42"], + pin43: ["PJ_7", "HFXOUT", "43"], + pin44: ["AVSS", "44", "AVSS_44"], + pin45: ["PJ_4", "LFXIN", "45"], + pin46: ["PJ_5", "LFXOUT", "46"], + pin47: ["AVSS", "47", "AVSS_47"], + pin48: ["AVCC", "48"], + pin49: ["QFN_PAD", "PAD"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "control", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "bidirectional", + pin29: "bidirectional", + pin30: "bidirectional", + pin31: "bidirectional", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "bidirectional", + pin35: "bidirectional", + pin36: "ground", + pin37: "power", + pin38: "bidirectional", + pin39: "bidirectional", + pin40: "bidirectional", + pin41: "ground", + pin42: "bidirectional", + pin43: "bidirectional", + pin44: "ground", + pin45: "bidirectional", + pin46: "bidirectional", + pin47: "ground", + pin48: "power", + pin49: "ground", +} as const; + +const pinAttributes = { + pin36: { requiresGround: true }, + pin37: { requiresPower: true }, + pin41: { requiresGround: true }, + pin44: { requiresGround: true }, + pin47: { requiresGround: true }, + pin48: { requiresPower: true }, + pin49: { requiresGround: true }, +} as const; + +export const MSP430FR5969IRGZR = (props: ChipProps) => { + // Footprint provenance: TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766) + return ( + + ); +}; + +export default MSP430FR5969IRGZR; diff --git a/lib/chips/MSPM0C1103SDSGR.circuit.tsx b/lib/chips/MSPM0C1103SDSGR.circuit.tsx new file mode 100644 index 00000000..9d98df85 --- /dev/null +++ b/lib/chips/MSPM0C1103SDSGR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["VSS"], + pin4: ["VDD"], + pin5: ["PA0"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const MSPM0C1103SDSGR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0C1103SDSGR; diff --git a/lib/chips/MSPM0C1104SDDFR.circuit.tsx b/lib/chips/MSPM0C1104SDDFR.circuit.tsx new file mode 100644 index 00000000..299c4497 --- /dev/null +++ b/lib/chips/MSPM0C1104SDDFR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["VSS"], + pin4: ["VDD"], + pin5: ["PA0"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +export const MSPM0C1104SDDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0C1104SDDFR; diff --git a/lib/chips/MSPM0G1107TRHBR.circuit.tsx b/lib/chips/MSPM0G1107TRHBR.circuit.tsx new file mode 100644 index 00000000..e66c1658 --- /dev/null +++ b/lib/chips/MSPM0G1107TRHBR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["PA1"], + pin3: ["NRST"], + pin4: ["VDD"], + pin5: ["VSS"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["PA8"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["PA11"], + pin16: ["pin16"], + pin17: ["PA13"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["VCORE"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const MSPM0G1107TRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0G1107TRHBR; diff --git a/lib/chips/MSPM0G1506SPMR.circuit.tsx b/lib/chips/MSPM0G1506SPMR.circuit.tsx new file mode 100644 index 00000000..4ca2f5d5 --- /dev/null +++ b/lib/chips/MSPM0G1506SPMR.circuit.tsx @@ -0,0 +1,100 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PB13"], + pin2: ["PB14"], + pin3: ["PB15"], + pin4: ["PB16"], + pin5: ["pin5"], + pin6: ["PA13"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["PB21"], + pin21: ["PB22"], + pin22: ["PB23"], + pin23: ["pin23"], + pin24: ["PA23VREF_POS"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["PB26"], + pin29: ["PB27"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["VCORE"], + pin33: ["pin33"], + pin34: ["PA1"], + pin35: ["PA28"], + pin36: ["PA29"], + pin37: ["PA30"], + pin38: ["NRST"], + pin39: ["pin39"], + pin40: ["VDD"], + pin41: ["VSS"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["PB0"], + pin48: ["PB1"], + pin49: ["pin49"], + pin50: ["PB2"], + pin51: ["PB3"], + pin52: ["PB4"], + pin53: ["PB5"], + pin54: ["PA8"], + pin55: ["pin55"], + pin56: ["pin56"], + pin57: ["PA11"], + pin58: ["PB6"], + pin59: ["PB7"], + pin60: ["PB8"], + pin61: ["PB9"], + pin62: ["PB10"], + pin63: ["pin63"], + pin64: ["PB12"], +} as const; + +const pinAttributes = { + pin40: { requiresPower: true }, + pin41: { requiresGround: true }, +} as const; + +export const MSPM0G1506SPMR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0G1506SPMR; diff --git a/lib/chips/MSPM0G1518SPMR.circuit.tsx b/lib/chips/MSPM0G1518SPMR.circuit.tsx new file mode 100644 index 00000000..bcbd2c87 --- /dev/null +++ b/lib/chips/MSPM0G1518SPMR.circuit.tsx @@ -0,0 +1,104 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PB13"], + pin2: ["PB14"], + pin3: ["PB15"], + pin4: ["PB16"], + pin5: ["PA12"], + pin6: ["PA13"], + pin7: ["PA14"], + pin8: ["PA15"], + pin9: ["PA16"], + pin10: ["PA17"], + pin11: ["PA18"], + pin12: ["PA19"], + pin13: ["PA20"], + pin14: ["PB17"], + pin15: ["PB18"], + pin16: ["PB19"], + pin17: ["PA21"], + pin18: ["PA22"], + pin19: ["PB20"], + pin20: ["PB21"], + pin21: ["PB22"], + pin22: ["PB23"], + pin23: ["PB24"], + pin24: ["PA23"], + pin25: ["PA24"], + pin26: ["PA25"], + pin27: ["PB25"], + pin28: ["PB26"], + pin29: ["PB27"], + pin30: ["PA26"], + pin31: ["PA27"], + pin32: ["VCORE"], + pin33: ["PA0"], + pin34: ["PA1"], + pin35: ["PA28"], + pin36: ["PA29"], + pin37: ["PA30"], + pin38: ["NRST"], + pin39: ["PA31"], + pin40: ["VDD"], + pin41: ["VSS"], + pin42: ["PA2"], + pin43: ["PA3"], + pin44: ["PA4"], + pin45: ["PA5"], + pin46: ["PA6"], + pin47: ["PB0"], + pin48: ["PB1"], + pin49: ["PA7"], + pin50: ["PB2"], + pin51: ["PB3"], + pin52: ["PB4"], + pin53: ["PB5"], + pin54: ["PA8"], + pin55: ["PA9"], + pin56: ["PA10"], + pin57: ["PA11"], + pin58: ["PB6"], + pin59: ["PB7"], + pin60: ["PB8"], + pin61: ["PB9"], + pin62: ["PB10"], + pin63: ["PB11"], + pin64: ["PB12"], +} as const; + +const pinAttributes = { + pin40: { requiresPower: true }, + pin41: { requiresGround: true }, +} as const; + +export const MSPM0G1518SPMR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0G1518SPMR; diff --git a/lib/chips/MSPM0G5117SPMR.circuit.tsx b/lib/chips/MSPM0G5117SPMR.circuit.tsx new file mode 100644 index 00000000..e81691da --- /dev/null +++ b/lib/chips/MSPM0G5117SPMR.circuit.tsx @@ -0,0 +1,157 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["UC3_CS0_CTS", "1", "UC3_CS0_CTS_1"], + pin2: ["UC3_POCI_RTS", "2", "UC3_POCI_RTS_2"], + pin3: ["UC3_PICO_TX", "3", "UC3_PICO_TX_3"], + pin4: ["UC3_POCI_RTS", "4", "UC3_POCI_RTS_4"], + pin5: ["FCC_IN", "5"], + pin6: ["RTC_OUT", "6"], + pin7: ["TIMG7_C0", "7", "TIMG7_C0_7"], + pin8: ["TIMA0_C2", "8", "TIMA0_C2_8"], + pin9: ["TIMA0_C2N", "9", "TIMA0_C2N_9"], + pin10: ["TIMA0_C3", "10", "TIMA0_C3_10"], + pin11: ["TIMG7_C1", "11"], + pin12: ["UC1_SDA_TX", "12"], + pin13: ["TIMA0_C2N", "13", "TIMA0_C2N_13"], + pin14: ["UC2_PICO", "14"], + pin15: ["UC2_SCK", "15"], + pin16: ["UC2_POCI", "16"], + pin17: ["TIMA0_C0", "17", "TIMA0_C0_17"], + pin18: ["TIMA0_C0N", "18", "TIMA0_C0N_18"], + pin19: ["UC2_CS2", "19", "UC2_CS2_19"], + pin20: ["UC3_POCI_RTS", "20", "UC3_POCI_RTS_20"], + pin21: ["UC3_PICO_TX", "21", "UC3_PICO_TX_21"], + pin22: ["UC3_SCK_RX", "22"], + pin23: ["UC2_CS1", "23"], + pin24: ["UC3_CS0_CTS", "24", "UC3_CS0_CTS_24"], + pin25: ["TIMA0_C3N", "25", "TIMA0_C3N_25"], + pin26: ["UC3_PICO_TX", "26", "UC3_PICO_TX_26"], + pin27: ["TIMA_FAL0", "27"], + pin28: ["TIMA0_C3", "28", "TIMA0_C3_28"], + pin29: ["VUSB33", "29"], + pin30: ["TIMG7_C0", "30", "TIMG7_C0_30"], + pin31: ["CLK_OUT", "31", "CLK_OUT_31"], + pin32: ["VCORE", "32"], + pin33: ["TIMA0_C0", "33", "TIMA0_C0_33"], + pin34: ["TIMA0_C1", "34", "TIMA0_C1_34"], + pin35: ["TIMA0_C3", "35", "TIMA0_C3_35"], + pin36: ["UC1_CTS", "36", "UC1_CTS_36"], + pin37: ["UC1_RTS", "37", "UC1_RTS_37"], + pin38: ["NRST", "38"], + pin39: ["TIMA0_C3N", "39", "TIMA0_C3N_39"], + pin40: ["VDD", "40"], + pin41: ["VSS", "41"], + pin42: ["TIMA0_C0", "42", "TIMA0_C0_42"], + pin43: ["TIMA0_C1", "43", "TIMA0_C1_43"], + pin44: ["UC2_CS0", "44", "UC2_CS0_44"], + pin45: ["TIMG0_C0", "45"], + pin46: ["TIMG0_C1", "46"], + pin47: ["UC2_CS3", "47"], + pin48: ["UC2_CS2", "48", "UC2_CS2_48"], + pin49: ["TIMA0_C2", "49", "TIMA0_C2_49"], + pin50: ["UC1_CTS", "50", "UC1_CTS_50"], + pin51: ["UC1_RTS", "51", "UC1_RTS_51"], + pin52: ["UC3_CS0_CTS", "52", "UC3_CS0_CTS_52"], + pin53: ["UC3_POCI_RTS", "53", "UC3_POCI_RTS_53"], + pin54: ["TIMA0_C0", "54", "TIMA0_C0_54"], + pin55: ["TIMA0_C0N", "55", "TIMA0_C0N_55"], + pin56: ["CLK_OUT", "56", "CLK_OUT_56"], + pin57: ["COMP0_OUT", "57", "COMP0_OUT_57"], + pin58: ["UC3_CS0_CTS", "58", "UC3_CS0_CTS_58"], + pin59: ["UC3_POCI_RTS", "59", "UC3_POCI_RTS_59"], + pin60: ["UC1_CTS", "60", "UC1_CTS_60"], + pin61: ["UC1_RTS", "61", "UC1_RTS_61"], + pin62: ["COMP0_OUT", "62", "COMP0_OUT_62"], + pin63: ["UC2_CS2", "63", "UC2_CS2_63"], + pin64: ["UC2_CS0", "64", "UC2_CS0_64"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "unknown", + pin3: "output", + pin4: "unknown", + pin5: "input", + pin6: "output", + pin7: "unknown", + pin8: "unknown", + pin9: "unknown", + pin10: "unknown", + pin11: "unknown", + pin12: "bidirectional", + pin13: "unknown", + pin14: "unknown", + pin15: "control", + pin16: "unknown", + pin17: "unknown", + pin18: "unknown", + pin19: "control", + pin20: "unknown", + pin21: "output", + pin22: "control", + pin23: "control", + pin24: "control", + pin25: "unknown", + pin26: "output", + pin27: "unknown", + pin28: "unknown", + pin29: "unknown", + pin30: "unknown", + pin31: "control", + pin32: "unknown", + pin33: "unknown", + pin34: "unknown", + pin35: "unknown", + pin36: "unknown", + pin37: "unknown", + pin38: "unknown", + pin39: "unknown", + pin40: "power", + pin41: "ground", + pin42: "unknown", + pin43: "unknown", + pin44: "control", + pin45: "unknown", + pin46: "unknown", + pin47: "control", + pin48: "control", + pin49: "unknown", + pin50: "unknown", + pin51: "unknown", + pin52: "control", + pin53: "unknown", + pin54: "unknown", + pin55: "unknown", + pin56: "control", + pin57: "output", + pin58: "control", + pin59: "unknown", + pin60: "unknown", + pin61: "unknown", + pin62: "output", + pin63: "control", + pin64: "control", +} as const; + +const pinAttributes = { + pin40: { requiresPower: true }, + pin41: { requiresGround: true }, +} as const; + +export const MSPM0G5117SPMR = (props: ChipProps) => { + // Footprint provenance: TI drawing PM0064A; donor MSP430FR4133IPMR (JLCPCB C106759) + return ( + + ); +}; + +export default MSPM0G5117SPMR; diff --git a/lib/chips/MSPM0L1105TDYYR.circuit.tsx b/lib/chips/MSPM0L1105TDYYR.circuit.tsx new file mode 100644 index 00000000..0c30bbce --- /dev/null +++ b/lib/chips/MSPM0L1105TDYYR.circuit.tsx @@ -0,0 +1,244 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["VCORE"], + pin3: ["PA0"], + pin4: ["pin4"], + pin5: ["VDD"], + pin6: ["VSS"], + pin7: ["pin7"], + pin8: ["PA6"], + pin9: ["PA17"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["PA23"], + pin15: ["pin15"], + pin16: ["pin16"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const MSPM0L1105TDYYR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19189327.obj?uuid=c5c8e41d4e8d4e6a9b2f660c5795adfa", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19189327.step?uuid=c5c8e41d4e8d4e6a9b2f660c5795adfa", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.00005080000005364127, + y: -0.000012699999956566899, + z: -0.7, + }, + }} + {...props} + /> + ); +}; + +export default MSPM0L1105TDYYR; diff --git a/lib/chips/MSPM0L1116SRHBR.circuit.tsx b/lib/chips/MSPM0L1116SRHBR.circuit.tsx new file mode 100644 index 00000000..d791839a --- /dev/null +++ b/lib/chips/MSPM0L1116SRHBR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PA0"], + pin2: ["PA1"], + pin3: ["NRST"], + pin4: ["VDD"], + pin5: ["VSS"], + pin6: ["PA2"], + pin7: ["PA3"], + pin8: ["PA4"], + pin9: ["PA5"], + pin10: ["PA6"], + pin11: ["PA7"], + pin12: ["PA8"], + pin13: ["PA9"], + pin14: ["PA10"], + pin15: ["PA11"], + pin16: ["PA12"], + pin17: ["PA13"], + pin18: ["PA14"], + pin19: ["PA15"], + pin20: ["PA16"], + pin21: ["PA17"], + pin22: ["PA18"], + pin23: ["PA19"], + pin24: ["PA20"], + pin25: ["PA21"], + pin26: ["PA22"], + pin27: ["PA23"], + pin28: ["PA24"], + pin29: ["PA25"], + pin30: ["PA26"], + pin31: ["PA27"], + pin32: ["VCORE"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const MSPM0L1116SRHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0L1116SRHBR; diff --git a/lib/chips/MSPM0L1305SDYYR.circuit.tsx b/lib/chips/MSPM0L1305SDYYR.circuit.tsx new file mode 100644 index 00000000..5476ae5a --- /dev/null +++ b/lib/chips/MSPM0L1305SDYYR.circuit.tsx @@ -0,0 +1,244 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["VCORE"], + pin3: ["PA0"], + pin4: ["pin4"], + pin5: ["VDD"], + pin6: ["VSS"], + pin7: ["pin7"], + pin8: ["PA6"], + pin9: ["PA17"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["pin13"], + pin14: ["PA23"], + pin15: ["pin15"], + pin16: ["pin16"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const MSPM0L1305SDYYR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19189320.obj?uuid=c5c8e41d4e8d4e6a9b2f660c5795adfa", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19189320.step?uuid=c5c8e41d4e8d4e6a9b2f660c5795adfa", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.00005080000005364127, + y: -0.000012699999956566899, + z: -0.7, + }, + }} + {...props} + /> + ); +}; + +export default MSPM0L1305SDYYR; diff --git a/lib/chips/MSPM0L1306SRGER.circuit.tsx b/lib/chips/MSPM0L1306SRGER.circuit.tsx new file mode 100644 index 00000000..f5d1f27e --- /dev/null +++ b/lib/chips/MSPM0L1306SRGER.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PA1"], + pin2: ["NRST"], + pin3: ["VDD"], + pin4: ["VSS"], + pin5: ["pin5"], + pin6: ["PA3"], + pin7: ["PA4"], + pin8: ["PA9"], + pin9: ["PA10"], + pin10: ["PA11"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["PA17"], + pin14: ["pin14"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["VCORE"], + pin24: ["PA0"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const MSPM0L1306SRGER = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0L1306SRGER; diff --git a/lib/chips/MSPM0L1343TDGS20R.circuit.tsx b/lib/chips/MSPM0L1343TDGS20R.circuit.tsx new file mode 100644 index 00000000..97ae14bf --- /dev/null +++ b/lib/chips/MSPM0L1343TDGS20R.circuit.tsx @@ -0,0 +1,275 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A1", "1"], + pin2: ["A0", "2"], + pin3: ["VCORE", "3"], + pin4: ["BSLSDA", "4"], + pin5: ["BSLSCL", "5"], + pin6: ["VDD", "6"], + pin7: ["VSS", "7"], + pin8: ["ROSC", "8"], + pin9: ["PA4", "9"], + pin10: ["PA6", "10"], + pin11: ["COMP0_OUT", "11"], + pin12: ["A8", "12"], + pin13: ["PA17", "13"], + pin14: ["A7", "14"], + pin15: ["SWDIO", "15"], + pin16: ["A6", "16"], + pin17: ["A4", "17"], + pin18: ["BSLTX", "18"], + pin19: ["A3", "19"], + pin20: ["A2", "20"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "power", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "power", + pin7: "ground", + pin8: "input", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "output", + pin12: "input", + pin13: "bidirectional", + pin14: "input", + pin15: "bidirectional", + pin16: "input", + pin17: "input", + pin18: "output", + pin19: "input", + pin20: "input", +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin6: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const MSPM0L1343TDGS20R = (props: ChipProps) => { + // Footprint provenance: TI drawing DGS0020A; donor LSF0108DGSR (JLCPCB C6653422) + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default MSPM0L1343TDGS20R; diff --git a/lib/chips/MSPM0L2228SPTR.circuit.tsx b/lib/chips/MSPM0L2228SPTR.circuit.tsx new file mode 100644 index 00000000..810fd68b --- /dev/null +++ b/lib/chips/MSPM0L2228SPTR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PA0"], + pin2: ["PA1"], + pin3: ["PA28"], + pin4: ["NRST"], + pin5: ["VBAT"], + pin6: ["VDD"], + pin7: ["VSS"], + pin8: ["PA2"], + pin9: ["PA3"], + pin10: ["PA4"], + pin11: ["PA5"], + pin12: ["PA6"], + pin13: ["PA7"], + pin14: ["PB2"], + pin15: ["PB3"], + pin16: ["PA8"], + pin17: ["PA9"], + pin18: ["PA10"], + pin19: ["PA11"], + pin20: ["PB6"], + pin21: ["PB7"], + pin22: ["PB8"], + pin23: ["PB9"], + pin24: ["PB14"], + pin25: ["PB15"], + pin26: ["PB16"], + pin27: ["PA12"], + pin28: ["PA13"], + pin29: ["PA14"], + pin30: ["PA15"], + pin31: ["PA16"], + pin32: ["PA17"], + pin33: ["PA18"], + pin34: ["PA19"], + pin35: ["PA20"], + pin36: ["PB17"], + pin37: ["PB18"], + pin38: ["PB19"], + pin39: ["PA21"], + pin40: ["PA22"], + pin41: ["PB20"], + pin42: ["PB24"], + pin43: ["PA23"], + pin44: ["PA24"], + pin45: ["PA25"], + pin46: ["PA26"], + pin47: ["PA27"], + pin48: ["VCORE"], +} as const; + +const pinAttributes = { + pin6: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const MSPM0L2228SPTR = (props: ChipProps) => { + return ( + + ); +}; + +export default MSPM0L2228SPTR; diff --git a/lib/chips/NA555DR.circuit.tsx b/lib/chips/NA555DR.circuit.tsx new file mode 100644 index 00000000..7a28c09a --- /dev/null +++ b/lib/chips/NA555DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["TRIG"], + pin3: ["OUT"], + pin4: ["RESET"], + pin5: ["CONT"], + pin6: ["THRES"], + pin7: ["DISCH"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const NA555DR = (props: ChipProps) => { + return ( + + ); +}; + +export default NA555DR; diff --git a/lib/chips/O3853QDCARQ1.circuit.tsx b/lib/chips/O3853QDCARQ1.circuit.tsx new file mode 100644 index 00000000..b17c748d --- /dev/null +++ b/lib/chips/O3853QDCARQ1.circuit.tsx @@ -0,0 +1,536 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ENDRV", "1"], + pin2: ["PGND1", "2", "PGND1_2"], + pin3: ["PGND1", "3", "PGND1_3"], + pin4: ["L1", "4", "L1_4"], + pin5: ["L1", "5", "L1_5"], + pin6: ["BST1", "6"], + pin7: ["PGND1", "7", "PGND1_7"], + pin8: ["VBATP", "8"], + pin9: ["VCP", "9"], + pin10: ["CP1", "10"], + pin11: ["CP2", "11"], + pin12: ["ERROR_WDI", "12"], + pin13: ["GND", "13"], + pin14: ["VDD5", "14"], + pin15: ["SEL_VDD3_5", "15"], + pin16: ["NRES", "16"], + pin17: ["DIAG_OUT", "17"], + pin18: ["IGN", "18"], + pin19: ["VSOUT1", "19"], + pin20: ["VSOUT2_CPSW", "20"], + pin21: ["SIN_P", "21"], + pin22: ["SIN_N_O", "22"], + pin23: ["SIN_P_O", "23"], + pin24: ["SIN_N", "24"], + pin25: ["COS_N", "25"], + pin26: ["COS_P_O", "26"], + pin27: ["COS_N_O", "27"], + pin28: ["COS_P", "28"], + pin29: ["VSOUT2", "29"], + pin30: ["VBAT_SAFING", "30"], + pin31: ["CANWU", "31"], + pin32: ["VTRACK", "32"], + pin33: ["SCLK", "33"], + pin34: ["SDO", "34"], + pin35: ["SDI", "35"], + pin36: ["NCS", "36"], + pin37: ["VDDIO", "37"], + pin38: ["VDD3_5", "38"], + pin39: ["VDD6_FB", "39"], + pin40: ["VDD6", "40"], + pin41: ["LGND", "41"], + pin42: ["VREG", "42"], + pin43: ["BST2", "43"], + pin44: ["L2", "44", "L2_44"], + pin45: ["L2", "45", "L2_45"], + pin46: ["PGND2", "46", "PGND2_46"], + pin47: ["PGND2", "47", "PGND2_47"], + pin48: ["VBATL", "48"], + pin49: ["PAD", "49"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "ground", + pin3: "ground", + pin4: "unknown", + pin5: "unknown", + pin6: "unknown", + pin7: "ground", + pin8: "power", + pin9: "unknown", + pin10: "unknown", + pin11: "unknown", + pin12: "unknown", + pin13: "ground", + pin14: "power", + pin15: "control", + pin16: "unknown", + pin17: "output", + pin18: "unknown", + pin19: "unknown", + pin20: "unknown", + pin21: "unknown", + pin22: "unknown", + pin23: "unknown", + pin24: "unknown", + pin25: "unknown", + pin26: "unknown", + pin27: "unknown", + pin28: "unknown", + pin29: "unknown", + pin30: "power", + pin31: "unknown", + pin32: "unknown", + pin33: "control", + pin34: "output", + pin35: "input", + pin36: "unknown", + pin37: "power", + pin38: "power", + pin39: "power", + pin40: "power", + pin41: "ground", + pin42: "power", + pin43: "unknown", + pin44: "unknown", + pin45: "unknown", + pin46: "ground", + pin47: "ground", + pin48: "power", + pin49: "thermal", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresPower: true }, + pin13: { requiresGround: true }, + pin14: { requiresPower: true }, + pin30: { requiresPower: true }, + pin37: { requiresPower: true }, + pin38: { requiresPower: true }, + pin39: { requiresPower: true }, + pin40: { requiresPower: true }, + pin41: { requiresGround: true }, + pin42: { requiresPower: true }, + pin46: { requiresGround: true }, + pin47: { requiresGround: true }, + pin48: { requiresPower: true }, +} as const; + +export const O3853QDCARQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DCA0048B; official source https://www.ti.com/lit/gpn/TPS653853-Q1 pages 10 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default O3853QDCARQ1; diff --git a/lib/chips/OPA197IDBVT.circuit.tsx b/lib/chips/OPA197IDBVT.circuit.tsx new file mode 100644 index 00000000..e536fb2b --- /dev/null +++ b/lib/chips/OPA197IDBVT.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["V_NEG"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["V_POS"], +} as const; + +export const OPA197IDBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA197IDBVT; diff --git a/lib/chips/OPA2188AIDGKR.circuit.tsx b/lib/chips/OPA2188AIDGKR.circuit.tsx new file mode 100644 index 00000000..8093f06b --- /dev/null +++ b/lib/chips/OPA2188AIDGKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_N"], + pin3: ["INA_P"], + pin4: ["V"], + pin5: ["INB_P"], + pin6: ["INB_N"], + pin7: ["OUTB"], + pin8: ["V_POS"], +} as const; + +export const OPA2188AIDGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2188AIDGKR; diff --git a/lib/chips/OPA2197ID.circuit.tsx b/lib/chips/OPA2197ID.circuit.tsx new file mode 100644 index 00000000..453e66d2 --- /dev/null +++ b/lib/chips/OPA2197ID.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_N"], + pin3: ["INA_P"], + pin4: ["V_NEG"], + pin5: ["INB_P"], + pin6: ["INB_N"], + pin7: ["OUTB"], + pin8: ["V_POS"], +} as const; + +export const OPA2197ID = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2197ID; diff --git a/lib/chips/OPA2237UA_2K5.circuit.tsx b/lib/chips/OPA2237UA_2K5.circuit.tsx new file mode 100644 index 00000000..79e1c872 --- /dev/null +++ b/lib/chips/OPA2237UA_2K5.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_NEG"], + pin3: ["INA_POS"], + pin4: ["V_NEG"], + pin5: ["INB_POS"], + pin6: ["INB_NEG"], + pin7: ["OUTB"], + pin8: ["V_POS"], +} as const; + +export const OPA2237UA_2K5 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2237UA_2K5; diff --git a/lib/chips/OPA2310IDR.circuit.tsx b/lib/chips/OPA2310IDR.circuit.tsx new file mode 100644 index 00000000..71ef2d68 --- /dev/null +++ b/lib/chips/OPA2310IDR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const OPA2310IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2310IDR; diff --git a/lib/chips/OPA2340UA_2K5.circuit.tsx b/lib/chips/OPA2340UA_2K5.circuit.tsx new file mode 100644 index 00000000..54a19d31 --- /dev/null +++ b/lib/chips/OPA2340UA_2K5.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_N"], + pin3: ["INA_P"], + pin4: ["V_NEG"], + pin5: ["INB_P"], + pin6: ["INB_N"], + pin7: ["OUTB"], + pin8: ["V_POS"], +} as const; + +export const OPA2340UA_2K5 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2340UA_2K5; diff --git a/lib/chips/OPA2365AQDRQ1.circuit.tsx b/lib/chips/OPA2365AQDRQ1.circuit.tsx new file mode 100644 index 00000000..d7deb20f --- /dev/null +++ b/lib/chips/OPA2365AQDRQ1.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_N"], + pin3: ["INA_P"], + pin4: ["V_NEG"], + pin5: ["INB_P"], + pin6: ["INB_N"], + pin7: ["OUTB"], + pin8: ["V_POS"], +} as const; + +export const OPA2365AQDRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2365AQDRQ1; diff --git a/lib/chips/OPA2607QDGKRQ1.circuit.tsx b/lib/chips/OPA2607QDGKRQ1.circuit.tsx new file mode 100644 index 00000000..b2402afc --- /dev/null +++ b/lib/chips/OPA2607QDGKRQ1.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["VS_N", "4"], + pin8: ["VS_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const OPA2607QDGKRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2607QDGKRQ1; diff --git a/lib/chips/OPA2836QDGKRQ1.circuit.tsx b/lib/chips/OPA2836QDGKRQ1.circuit.tsx new file mode 100644 index 00000000..82db9255 --- /dev/null +++ b/lib/chips/OPA2836QDGKRQ1.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["VIN1_P", "3"], + pin2: ["VIN1_N", "2"], + pin5: ["VIN2_P", "5"], + pin6: ["VIN2_N", "6"], + pin1: ["VOUT1", "1"], + pin7: ["VOUT2", "7"], + pin8: ["VS_P", "8"], + pin4: ["VS_N", "4"], +} as const; + +const pinRoles = { + pin3: "input", + pin2: "input", + pin5: "input", + pin6: "input", + pin1: "output", + pin7: "output", + pin8: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin8: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const OPA2836QDGKRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA2836QDGKRQ1; diff --git a/lib/chips/OPA310IDCKR.circuit.tsx b/lib/chips/OPA310IDCKR.circuit.tsx new file mode 100644 index 00000000..31422d81 --- /dev/null +++ b/lib/chips/OPA310IDCKR.circuit.tsx @@ -0,0 +1,35 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_POS"], + pin2: ["V_NEG"], + pin3: ["IN_NEG"], + pin4: ["OUT"], + pin5: ["V_POS"], +} as const; + +export const OPA310IDCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA310IDCKR; diff --git a/lib/chips/OPA320SAIDBVR.circuit.tsx b/lib/chips/OPA320SAIDBVR.circuit.tsx new file mode 100644 index 00000000..34f4ce32 --- /dev/null +++ b/lib/chips/OPA320SAIDBVR.circuit.tsx @@ -0,0 +1,148 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT"], + pin2: ["V_NEG"], + pin3: ["IN_P"], + pin4: ["IN_N"], + pin5: ["SHDN"], + pin6: ["V_POS"], +} as const; + +export const OPA320SAIDBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2057613.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2057613.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default OPA320SAIDBVR; diff --git a/lib/chips/OPA333AIDR.circuit.tsx b/lib/chips/OPA333AIDR.circuit.tsx new file mode 100644 index 00000000..8a708c5d --- /dev/null +++ b/lib/chips/OPA333AIDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["IN_NEG"], + pin3: ["IN_POS"], + pin4: ["V_NEG"], + pin5: ["pin5"], + pin6: ["OUT"], + pin7: ["V_POS"], + pin8: ["pin8"], +} as const; + +export const OPA333AIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA333AIDR; diff --git a/lib/chips/OPA350UA_2K5.circuit.tsx b/lib/chips/OPA350UA_2K5.circuit.tsx new file mode 100644 index 00000000..599e8e5d --- /dev/null +++ b/lib/chips/OPA350UA_2K5.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC1"], + pin2: ["IN_N"], + pin3: ["IN_P"], + pin4: ["V_NEG"], + pin5: ["NC3"], + pin6: ["OUTPUT"], + pin7: ["V_POS"], + pin8: ["NC2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin5: { doNotConnect: true }, + pin8: { doNotConnect: true }, +} as const; + +export const OPA350UA_2K5 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA350UA_2K5; diff --git a/lib/chips/OPA365AIDR.circuit.tsx b/lib/chips/OPA365AIDR.circuit.tsx new file mode 100644 index 00000000..83acde39 --- /dev/null +++ b/lib/chips/OPA365AIDR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC3"], + pin2: ["IN_N"], + pin3: ["IN_P"], + pin4: ["V_NEG"], + pin5: ["NC1"], + pin6: ["VOUT"], + pin7: ["V_POS"], + pin8: ["NC2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin5: { doNotConnect: true }, + pin8: { doNotConnect: true }, +} as const; + +export const OPA365AIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA365AIDR; diff --git a/lib/chips/OPA365AQDBVRQ1.circuit.tsx b/lib/chips/OPA365AQDBVRQ1.circuit.tsx new file mode 100644 index 00000000..520dfb1b --- /dev/null +++ b/lib/chips/OPA365AQDBVRQ1.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["VEE"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, +} as const; + +export const OPA365AQDBVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA365AQDBVRQ1; diff --git a/lib/chips/OPA371DDBVR.circuit.tsx b/lib/chips/OPA371DDBVR.circuit.tsx new file mode 100644 index 00000000..fd843002 --- /dev/null +++ b/lib/chips/OPA371DDBVR.circuit.tsx @@ -0,0 +1,33 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT", "1"], + pin2: ["V", "2", "V_2"], + pin3: ["IN", "3", "IN_3"], + pin4: ["IN", "4", "IN_4"], + pin5: ["V", "5", "V_5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", +} as const; + +export const OPA371DDBVR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363) + return ( + + ); +}; + +export default OPA371DDBVR; diff --git a/lib/chips/OPA376AIDBVR.circuit.tsx b/lib/chips/OPA376AIDBVR.circuit.tsx new file mode 100644 index 00000000..fbb8032c --- /dev/null +++ b/lib/chips/OPA376AIDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["V_NEG"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["V_POS"], +} as const; + +export const OPA376AIDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA376AIDBVR; diff --git a/lib/chips/OPA4192IDR.circuit.tsx b/lib/chips/OPA4192IDR.circuit.tsx new file mode 100644 index 00000000..7f6f4965 --- /dev/null +++ b/lib/chips/OPA4192IDR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["INA_N"], + pin3: ["INA_P"], + pin4: ["V_POS"], + pin5: ["INB_P"], + pin6: ["INB_N"], + pin7: ["OUTB"], + pin8: ["OUTC"], + pin9: ["INC_N"], + pin10: ["INC_P"], + pin11: ["V_NEG"], + pin12: ["IND_P"], + pin13: ["IND_N"], + pin14: ["OUTD"], +} as const; + +export const OPA4192IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA4192IDR; diff --git a/lib/chips/OPA4206APWR.circuit.tsx b/lib/chips/OPA4206APWR.circuit.tsx new file mode 100644 index 00000000..9a40313e --- /dev/null +++ b/lib/chips/OPA4206APWR.circuit.tsx @@ -0,0 +1,279 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["IN_A", "3", "IN_A_3"], + pin5: ["IN_B", "5", "IN_B_5"], + pin10: ["IN_C", "10", "IN_C_10"], + pin12: ["IN_D", "12", "IN_D_12"], + pin2: ["IN_A", "2", "IN_A_2"], + pin6: ["IN_B", "6", "IN_B_6"], + pin9: ["IN_C", "9", "IN_C_9"], + pin13: ["IN_D", "13", "IN_D_13"], + pin1: ["OUT_A", "1"], + pin7: ["OUT_B", "7"], + pin8: ["OUT_C", "8"], + pin14: ["OUT_D", "14"], + pin4: ["V_P", "4"], + pin11: ["V_N", "11"], +} as const; + +const pinRoles = { + pin3: "input", + pin5: "input", + pin10: "input", + pin12: "input", + pin2: "input", + pin6: "input", + pin9: "input", + pin13: "input", + pin1: "output", + pin7: "output", + pin8: "output", + pin14: "output", + pin4: "power", + pin11: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin11: { + requiresPower: true, + }, +} as const; + +export const OPA4206APWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34381825.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34381825.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default OPA4206APWR; diff --git a/lib/chips/OPA4350EA_250.circuit.tsx b/lib/chips/OPA4350EA_250.circuit.tsx new file mode 100644 index 00000000..3993beda --- /dev/null +++ b/lib/chips/OPA4350EA_250.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OutA"], + pin2: ["pin2"], + pin3: ["InA_P"], + pin4: ["V_P"], + pin5: ["InB_P"], + pin6: ["pin6"], + pin7: ["OutB"], + pin8: ["NC2"], + pin9: ["NC1"], + pin10: ["OutC"], + pin11: ["pin11"], + pin12: ["InC_P"], + pin13: ["pin13"], + pin14: ["InD_P"], + pin15: ["pin15"], + pin16: ["OutD"], +} as const; + +const pinAttributes = { + pin8: { doNotConnect: true }, + pin9: { doNotConnect: true }, +} as const; + +export const OPA4350EA_250 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA4350EA_250; diff --git a/lib/chips/OPA4991QDYYRQ1.circuit.tsx b/lib/chips/OPA4991QDYYRQ1.circuit.tsx new file mode 100644 index 00000000..ef235f49 --- /dev/null +++ b/lib/chips/OPA4991QDYYRQ1.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["IN1_P", "3"], + pin2: ["IN1_N", "2"], + pin5: ["IN2_P", "5"], + pin6: ["IN2_N", "6"], + pin10: ["IN3_P", "10"], + pin9: ["IN3_N", "9"], + pin12: ["IN4_P", "12"], + pin13: ["IN4_N", "13"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin8: ["OUT3", "8"], + pin14: ["OUT4", "14"], + pin4: ["V_P", "4"], + pin11: ["V_N", "11"], +} as const; + +const pinRoles = { + pin3: "input", + pin2: "input", + pin5: "input", + pin6: "input", + pin10: "input", + pin9: "input", + pin12: "input", + pin13: "input", + pin1: "output", + pin7: "output", + pin8: "output", + pin14: "output", + pin4: "power", + pin11: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin11: { + requiresPower: true, + }, +} as const; + +export const OPA4991QDYYRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA4991QDYYRQ1; diff --git a/lib/chips/OPA607QDBVRQ1.circuit.tsx b/lib/chips/OPA607QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..20c6ece8 --- /dev/null +++ b/lib/chips/OPA607QDBVRQ1.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["VS_NEG"], + pin3: ["IN_P"], + pin4: ["IN_N"], + pin5: ["VS_POS"], +} as const; + +export const OPA607QDBVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA607QDBVRQ1; diff --git a/lib/chips/OPA990IDBVR.circuit.tsx b/lib/chips/OPA990IDBVR.circuit.tsx new file mode 100644 index 00000000..f9398570 --- /dev/null +++ b/lib/chips/OPA990IDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["V_NEG"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["V_POS"], +} as const; + +export const OPA990IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPA990IDBVR; diff --git a/lib/chips/OPT3002DNPR.circuit.tsx b/lib/chips/OPT3002DNPR.circuit.tsx new file mode 100644 index 00000000..d974b47b --- /dev/null +++ b/lib/chips/OPT3002DNPR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["ADDR"], + pin3: ["GND"], + pin4: ["SCL"], + pin5: ["INT"], + pin6: ["SDA"], + pin7: ["PAD"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const OPT3002DNPR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPT3002DNPR; diff --git a/lib/chips/OPT3004DNPR.circuit.tsx b/lib/chips/OPT3004DNPR.circuit.tsx new file mode 100644 index 00000000..65dbbc71 --- /dev/null +++ b/lib/chips/OPT3004DNPR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["ADDR"], + pin3: ["GND"], + pin4: ["SCL"], + pin5: ["INT"], + pin6: ["SDA"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const OPT3004DNPR = (props: ChipProps) => { + return ( + + ); +}; + +export default OPT3004DNPR; diff --git a/lib/chips/OPT4001YMNR.circuit.tsx b/lib/chips/OPT4001YMNR.circuit.tsx new file mode 100644 index 00000000..59b4312b --- /dev/null +++ b/lib/chips/OPT4001YMNR.circuit.tsx @@ -0,0 +1,157 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "A1"], + pin3: ["VDD", "B1"], + pin2: ["SCL", "A2"], + pin4: ["SDA", "B2"], +} as const; + +const pinRoles = { + pin1: "ground", + pin3: "power", + pin2: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin1: { + requiresGround: true, + }, + pin3: { + requiresPower: true, + }, + pin2: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const OPT4001YMNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3678587.obj?uuid=f0e963b397b24463bcb79ff750e623de", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3678587.step?uuid=f0e963b397b24463bcb79ff750e623de", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.008 }, + }} + {...props} + /> + ); +}; + +export default OPT4001YMNR; diff --git a/lib/chips/P82B96DGKR.circuit.tsx b/lib/chips/P82B96DGKR.circuit.tsx new file mode 100644 index 00000000..22d844d9 --- /dev/null +++ b/lib/chips/P82B96DGKR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["Sx"], + pin2: ["Rx"], + pin3: ["Tx"], + pin4: ["GND"], + pin5: ["Ty"], + pin6: ["Ry"], + pin7: ["Sy"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const P82B96DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default P82B96DGKR; diff --git a/lib/chips/PCA9306DCUT.circuit.tsx b/lib/chips/PCA9306DCUT.circuit.tsx new file mode 100644 index 00000000..ffa3c2af --- /dev/null +++ b/lib/chips/PCA9306DCUT.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["VREF1"], + pin3: ["SCL1"], + pin4: ["SDA1"], + pin5: ["SDA2"], + pin6: ["SCL2"], + pin7: ["VREF2"], + pin8: ["EN"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const PCA9306DCUT = (props: ChipProps) => { + return ( + + ); +}; + +export default PCA9306DCUT; diff --git a/lib/chips/PTH08080WAH.circuit.tsx b/lib/chips/PTH08080WAH.circuit.tsx new file mode 100644 index 00000000..edb21bb4 --- /dev/null +++ b/lib/chips/PTH08080WAH.circuit.tsx @@ -0,0 +1,112 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VI"], + pin2: ["GND"], + pin3: ["VO"], + pin4: ["VO_ADJ"], + pin5: ["N_INHIBIT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const PTH08080WAH = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C181568.obj?uuid=09b96939c65d4c539ad5eb7a61d3ad3a", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C181568.step?uuid=09b96939c65d4c539ad5eb7a61d3ad3a", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012699999956566899, + y: -0.2840101000000459, + z: -2.0000069999999996, + }, + }} + {...props} + /> + ); +}; + +export default PTH08080WAH; diff --git a/lib/chips/PTLIN821DRBRQ1.circuit.tsx b/lib/chips/PTLIN821DRBRQ1.circuit.tsx new file mode 100644 index 00000000..4ed48147 --- /dev/null +++ b/lib/chips/PTLIN821DRBRQ1.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RXD", "1"], + pin2: ["EN", "2"], + pin3: ["WAKE", "3"], + pin4: ["TXD", "4"], + pin5: ["GND", "5"], + pin6: ["LIN", "6"], + pin7: ["VSUP", "7"], + pin8: ["INH", "8"], + pin9: ["THERMAL_PAD", "9"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "control", + pin3: "control", + pin4: "output", + pin5: "ground", + pin6: "unknown", + pin7: "power", + pin8: "input", + pin9: "ground", +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, +} as const; + +export const PTLIN821DRBRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DRB0008J; donor TCAN1044AVDRBRQ1 (JLCPCB C3234119) + return ( + + ); +}; + +export default PTLIN821DRBRQ1; diff --git a/lib/chips/REF1930AIDDCT.circuit.tsx b/lib/chips/REF1930AIDDCT.circuit.tsx new file mode 100644 index 00000000..e4eb015c --- /dev/null +++ b/lib/chips/REF1930AIDDCT.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VBIAS"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["VIN"], + pin5: ["VREF"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +export const REF1930AIDDCT = (props: ChipProps) => { + return ( + + ); +}; + +export default REF1930AIDDCT; diff --git a/lib/chips/REF2125IDBVR.circuit.tsx b/lib/chips/REF2125IDBVR.circuit.tsx new file mode 100644 index 00000000..e6d11ee1 --- /dev/null +++ b/lib/chips/REF2125IDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN", "1"], + pin2: ["VIN", "2"], + pin3: ["CS", "3"], + pin4: ["VOUT", "4"], + pin5: ["GND", "5"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "power", + pin3: "control", + pin4: "output", + pin5: "ground", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const REF2125IDBVR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363) + return ( + + ); +}; + +export default REF2125IDBVR; diff --git a/lib/chips/REF3016EAIDBZR.circuit.tsx b/lib/chips/REF3016EAIDBZR.circuit.tsx new file mode 100644 index 00000000..592f72d1 --- /dev/null +++ b/lib/chips/REF3016EAIDBZR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["OUT"], + pin3: ["GND"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const REF3016EAIDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default REF3016EAIDBZR; diff --git a/lib/chips/REF3325AIDBZR.circuit.tsx b/lib/chips/REF3325AIDBZR.circuit.tsx new file mode 100644 index 00000000..c3b14c55 --- /dev/null +++ b/lib/chips/REF3325AIDBZR.circuit.tsx @@ -0,0 +1,101 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["OUT"], + pin3: ["GND"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const REF3325AIDBZR = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C69039.obj?uuid=cefd4596db214da394d9632b2b88f8f2", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C69039.step?uuid=cefd4596db214da394d9632b2b88f8f2", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0.000012699999956566899, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default REF3325AIDBZR; diff --git a/lib/chips/RF430CL330HCPWR.circuit.tsx b/lib/chips/RF430CL330HCPWR.circuit.tsx new file mode 100644 index 00000000..62059319 --- /dev/null +++ b/lib/chips/RF430CL330HCPWR.circuit.tsx @@ -0,0 +1,258 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["ANT1"], + pin3: ["ANT2"], + pin4: ["RST"], + pin5: ["E0"], + pin6: ["E1"], + pin7: ["E2"], + pin8: ["INTO"], + pin9: ["pin9"], + pin10: ["SCK"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["VCORE"], + pin14: ["VSS"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin14: { requiresGround: true }, +} as const; + +export const RF430CL330HCPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130195.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130195.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default RF430CL330HCPWR; diff --git a/lib/chips/SN6501DBVR.circuit.tsx b/lib/chips/SN6501DBVR.circuit.tsx new file mode 100644 index 00000000..4bbd060b --- /dev/null +++ b/lib/chips/SN6501DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND2"], + pin2: ["pin2"], + pin3: ["GND1"], + pin4: ["D1"], + pin5: ["D2"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresGround: true }, +} as const; + +export const SN6501DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN6501DBVR; diff --git a/lib/chips/SN6505BDBVT.circuit.tsx b/lib/chips/SN6505BDBVT.circuit.tsx new file mode 100644 index 00000000..509c73cc --- /dev/null +++ b/lib/chips/SN6505BDBVT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D1"], + pin2: ["VCC"], + pin3: ["D2"], + pin4: ["GND"], + pin5: ["EN"], + pin6: ["CLK"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const SN6505BDBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default SN6505BDBVT; diff --git a/lib/chips/SN65HVD24DR.circuit.tsx b/lib/chips/SN65HVD24DR.circuit.tsx new file mode 100644 index 00000000..ca29de07 --- /dev/null +++ b/lib/chips/SN65HVD24DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["N_RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN65HVD24DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN65HVD24DR; diff --git a/lib/chips/SN65HVD3082EDR.circuit.tsx b/lib/chips/SN65HVD3082EDR.circuit.tsx new file mode 100644 index 00000000..9b1942c5 --- /dev/null +++ b/lib/chips/SN65HVD3082EDR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["nRE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN65HVD3082EDR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN65HVD3082EDR; diff --git a/lib/chips/SN65HVD3088EDR.circuit.tsx b/lib/chips/SN65HVD3088EDR.circuit.tsx new file mode 100644 index 00000000..2eb3fbe5 --- /dev/null +++ b/lib/chips/SN65HVD3088EDR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN65HVD3088EDR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN65HVD3088EDR; diff --git a/lib/chips/SN65HVD32DR.circuit.tsx b/lib/chips/SN65HVD32DR.circuit.tsx new file mode 100644 index 00000000..a70f6aaf --- /dev/null +++ b/lib/chips/SN65HVD32DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["R"], + pin3: ["D"], + pin4: ["GND"], + pin5: ["Y"], + pin6: ["Z"], + pin7: ["B"], + pin8: ["A"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const SN65HVD32DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN65HVD32DR; diff --git a/lib/chips/SN65HVD96DR.circuit.tsx b/lib/chips/SN65HVD96DR.circuit.tsx new file mode 100644 index 00000000..fbdcdbad --- /dev/null +++ b/lib/chips/SN65HVD96DR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R", "1"], + pin2: ["RE_N", "2"], + pin3: ["DE", "3"], + pin4: ["D", "4"], + pin5: ["GND", "5"], + pin6: ["A", "6"], + pin7: ["B", "7"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "ground", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "power", +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN65HVD96DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059) + return ( + + ); +}; + +export default SN65HVD96DR; diff --git a/lib/chips/SN65LV1023ADB.circuit.tsx b/lib/chips/SN65LV1023ADB.circuit.tsx new file mode 100644 index 00000000..aaaffe05 --- /dev/null +++ b/lib/chips/SN65LV1023ADB.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SYNC1"], + pin2: ["SYNC2"], + pin3: ["DIN0"], + pin4: ["DIN1"], + pin5: ["DIN2"], + pin6: ["DIN3"], + pin7: ["DIN4"], + pin8: ["DIN5"], + pin9: ["DIN6"], + pin10: ["DIN7"], + pin11: ["DIN8"], + pin12: ["DIN9"], + pin13: ["pin13"], + pin14: ["TCLK"], + pin15: ["DGND2"], + pin16: ["DGND1"], + pin17: ["AVCC2"], + pin18: ["AGND4"], + pin19: ["DEN"], + pin20: ["AGND3"], + pin21: ["pin21"], + pin22: ["DO_POS"], + pin23: ["AGND2"], + pin24: ["PWRDN"], + pin25: ["AGND1"], + pin26: ["AVCC1"], + pin27: ["DVCC2"], + pin28: ["DVCC1"], +} as const; + +const pinAttributes = { + pin18: { requiresGround: true }, + pin20: { requiresGround: true }, + pin23: { requiresGround: true }, + pin25: { requiresGround: true }, +} as const; + +export const SN65LV1023ADB = (props: ChipProps) => { + return ( + + ); +}; + +export default SN65LV1023ADB; diff --git a/lib/chips/SN65LV1224BDB.circuit.tsx b/lib/chips/SN65LV1224BDB.circuit.tsx new file mode 100644 index 00000000..00401211 --- /dev/null +++ b/lib/chips/SN65LV1224BDB.circuit.tsx @@ -0,0 +1,93 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AGND", "1", "AGND_1"], + pin2: ["RCLK_R", "F", "2"], + pin3: ["REFCLK", "3"], + pin4: ["AVCC", "4", "AVCC_4"], + pin5: ["RI", "5", "RI_5"], + pin6: ["RI", "6", "RI_6"], + pin7: ["PWRDN", "7"], + pin8: ["REN", "8"], + pin9: ["RCLK", "9"], + pin10: ["LOCK", "10"], + pin11: ["AVCC", "11", "AVCC_11"], + pin12: ["AGND", "12", "AGND_12"], + pin13: ["AGND", "13", "AGND_13"], + pin14: ["DGND", "14", "DGND_14"], + pin15: ["ROUT9", "15"], + pin16: ["ROUT8", "16"], + pin17: ["ROUT7", "17"], + pin18: ["ROUT6", "18"], + pin19: ["ROUT5", "19"], + pin20: ["DGND", "20", "DGND_20"], + pin21: ["DVCC", "21", "DVCC_21"], + pin22: ["DGND", "22", "DGND_22"], + pin23: ["DVCC", "23", "DVCC_23"], + pin24: ["ROUT4", "24"], + pin25: ["ROUT3", "25"], + pin26: ["ROUT2", "26"], + pin27: ["ROUT1", "27"], + pin28: ["ROUT0", "28"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "unknown", + pin3: "unknown", + pin4: "power", + pin5: "unknown", + pin6: "unknown", + pin7: "unknown", + pin8: "unknown", + pin9: "unknown", + pin10: "output", + pin11: "power", + pin12: "ground", + pin13: "ground", + pin14: "ground", + pin15: "unknown", + pin16: "unknown", + pin17: "unknown", + pin18: "unknown", + pin19: "unknown", + pin20: "ground", + pin21: "power", + pin22: "ground", + pin23: "power", + pin24: "unknown", + pin25: "unknown", + pin26: "unknown", + pin27: "unknown", + pin28: "unknown", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin4: { requiresPower: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin13: { requiresGround: true }, + pin14: { requiresGround: true }, + pin20: { requiresGround: true }, + pin21: { requiresPower: true }, + pin22: { requiresGround: true }, + pin23: { requiresPower: true }, +} as const; + +export const SN65LV1224BDB = (props: ChipProps) => { + // Footprint provenance: TI drawing DB0028A; donor SN65LV1023ADB (JLCPCB C2863118) + return ( + + ); +}; + +export default SN65LV1224BDB; diff --git a/lib/chips/SN74AC86PWR.circuit.tsx b/lib/chips/SN74AC86PWR.circuit.tsx new file mode 100644 index 00000000..138a054d --- /dev/null +++ b/lib/chips/SN74AC86PWR.circuit.tsx @@ -0,0 +1,258 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["1Y"], + pin4: ["2A"], + pin5: ["2B"], + pin6: ["2Y"], + pin7: ["GND"], + pin8: ["3Y"], + pin9: ["3A"], + pin10: ["3B"], + pin11: ["4Y"], + pin12: ["4A"], + pin13: ["4B"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74AC86PWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877138.obj?uuid=0d4be8094deb42719f0ebe4bb78043bb", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877138.step?uuid=0d4be8094deb42719f0ebe4bb78043bb", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.55 }, + }} + {...props} + /> + ); +}; + +export default SN74AC86PWR; diff --git a/lib/chips/SN74AHC08DR.circuit.tsx b/lib/chips/SN74AHC08DR.circuit.tsx new file mode 100644 index 00000000..2e5ccf90 --- /dev/null +++ b/lib/chips/SN74AHC08DR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["1Y"], + pin4: ["2A"], + pin5: ["2B"], + pin6: ["2Y"], + pin7: ["GND"], + pin8: ["3Y"], + pin9: ["3A"], + pin10: ["3B"], + pin11: ["4Y"], + pin12: ["4A"], + pin13: ["4B"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74AHC08DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AHC08DR; diff --git a/lib/chips/SN74AHC1G09DBVR.circuit.tsx b/lib/chips/SN74AHC1G09DBVR.circuit.tsx new file mode 100644 index 00000000..65d91c81 --- /dev/null +++ b/lib/chips/SN74AHC1G09DBVR.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["B"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AHC1G09DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AHC1G09DBVR; diff --git a/lib/chips/SN74AHC1G14DBVR.circuit.tsx b/lib/chips/SN74AHC1G14DBVR.circuit.tsx new file mode 100644 index 00000000..6a9e76d5 --- /dev/null +++ b/lib/chips/SN74AHC1G14DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AHC1G14DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AHC1G14DBVR; diff --git a/lib/chips/SN74AHCT1G08DBVR.circuit.tsx b/lib/chips/SN74AHCT1G08DBVR.circuit.tsx new file mode 100644 index 00000000..ef899a03 --- /dev/null +++ b/lib/chips/SN74AHCT1G08DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["B"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AHCT1G08DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AHCT1G08DBVR; diff --git a/lib/chips/SN74AHCT541DWR.circuit.tsx b/lib/chips/SN74AHCT541DWR.circuit.tsx new file mode 100644 index 00000000..8a4c0ec7 --- /dev/null +++ b/lib/chips/SN74AHCT541DWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OE1"], + pin2: ["A1"], + pin3: ["A2"], + pin4: ["A3"], + pin5: ["A4"], + pin6: ["A5"], + pin7: ["A6"], + pin8: ["A7"], + pin9: ["A8"], + pin10: ["GND"], + pin11: ["Y8"], + pin12: ["Y7"], + pin13: ["Y6"], + pin14: ["Y5"], + pin15: ["Y4"], + pin16: ["Y3"], + pin17: ["Y2"], + pin18: ["Y1"], + pin19: ["OE2"], + pin20: ["VCC"], +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, + pin20: { requiresPower: true }, +} as const; + +export const SN74AHCT541DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AHCT541DWR; diff --git a/lib/chips/SN74ALVC08DR.circuit.tsx b/lib/chips/SN74ALVC08DR.circuit.tsx new file mode 100644 index 00000000..b090ba43 --- /dev/null +++ b/lib/chips/SN74ALVC08DR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["1Y"], + pin4: ["2A"], + pin5: ["2B"], + pin6: ["2Y"], + pin7: ["GND"], + pin8: ["3Y"], + pin9: ["3A"], + pin10: ["3B"], + pin11: ["4Y"], + pin12: ["4A"], + pin13: ["4B"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74ALVC08DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74ALVC08DR; diff --git a/lib/chips/SN74AUP1G14DBVR.circuit.tsx b/lib/chips/SN74AUP1G14DBVR.circuit.tsx new file mode 100644 index 00000000..5d1cb915 --- /dev/null +++ b/lib/chips/SN74AUP1G14DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AUP1G14DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AUP1G14DBVR; diff --git a/lib/chips/SN74AUP1G17DBVR.circuit.tsx b/lib/chips/SN74AUP1G17DBVR.circuit.tsx new file mode 100644 index 00000000..7fe502ca --- /dev/null +++ b/lib/chips/SN74AUP1G17DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AUP1G17DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AUP1G17DBVR; diff --git a/lib/chips/SN74AUP1G74DQER.circuit.tsx b/lib/chips/SN74AUP1G74DQER.circuit.tsx new file mode 100644 index 00000000..a6f76260 --- /dev/null +++ b/lib/chips/SN74AUP1G74DQER.circuit.tsx @@ -0,0 +1,172 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLK"], + pin2: ["D"], + pin3: ["Q2"], + pin4: ["GND"], + pin5: ["Q1"], + pin6: ["CLR"], + pin7: ["PRE"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74AUP1G74DQER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2677745.obj?uuid=94a7fb4c553546bf9f8faca4378a6a73", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2677745.step?uuid=94a7fb4c553546bf9f8faca4378a6a73", + pcbRotationOffset: 180, + modelOriginPosition: { + x: 0.00007619999985308823, + y: 0.018595900000213217, + z: 0.025, + }, + }} + {...props} + /> + ); +}; + +export default SN74AUP1G74DQER; diff --git a/lib/chips/SN74AUP1G79DCKR.circuit.tsx b/lib/chips/SN74AUP1G79DCKR.circuit.tsx new file mode 100644 index 00000000..ba7ea12f --- /dev/null +++ b/lib/chips/SN74AUP1G79DCKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D"], + pin2: ["CLK"], + pin3: ["GND"], + pin4: ["Q"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AUP1G79DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AUP1G79DCKR; diff --git a/lib/chips/SN74AUP2G08DQER.circuit.tsx b/lib/chips/SN74AUP2G08DQER.circuit.tsx new file mode 100644 index 00000000..fd4c081a --- /dev/null +++ b/lib/chips/SN74AUP2G08DQER.circuit.tsx @@ -0,0 +1,172 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["2Y"], + pin4: ["GND"], + pin5: ["2A"], + pin6: ["2B"], + pin7: ["1Y"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74AUP2G08DQER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2682157.obj?uuid=94a7fb4c553546bf9f8faca4378a6a73", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2682157.step?uuid=94a7fb4c553546bf9f8faca4378a6a73", + pcbRotationOffset: 180, + modelOriginPosition: { + x: 0.00007619999985308823, + y: 0.018595900000213217, + z: 0.025, + }, + }} + {...props} + /> + ); +}; + +export default SN74AUP2G08DQER; diff --git a/lib/chips/SN74AUP2G14DSFR.circuit.tsx b/lib/chips/SN74AUP2G14DSFR.circuit.tsx new file mode 100644 index 00000000..c17e4405 --- /dev/null +++ b/lib/chips/SN74AUP2G14DSFR.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A", "1"], + pin2: ["GND", "2"], + pin3: ["2A", "3"], + pin4: ["2Y", "4"], + pin5: ["VCC", "5"], + pin6: ["1Y", "6"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "ground", + pin3: "input", + pin4: "output", + pin5: "power", + pin6: "output", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AUP2G14DSFR = (props: ChipProps) => { + // Footprint provenance: TI drawing DSF0006A; donor SN74AUP1G79DSFR (JLCPCB C2677981) + return ( + + ); +}; + +export default SN74AUP2G14DSFR; diff --git a/lib/chips/SN74AUP2G17DCKR.circuit.tsx b/lib/chips/SN74AUP2G17DCKR.circuit.tsx new file mode 100644 index 00000000..8063b726 --- /dev/null +++ b/lib/chips/SN74AUP2G17DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["GND"], + pin3: ["2A"], + pin4: ["2Y"], + pin5: ["VCC"], + pin6: ["1Y"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74AUP2G17DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AUP2G17DCKR; diff --git a/lib/chips/SN74AUP2G240DCUR.circuit.tsx b/lib/chips/SN74AUP2G240DCUR.circuit.tsx new file mode 100644 index 00000000..385e209d --- /dev/null +++ b/lib/chips/SN74AUP2G240DCUR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OE_N", "1"], + pin2: ["1A", "2"], + pin3: ["2Y", "3"], + pin4: ["GND", "4"], + pin5: ["2A", "5"], + pin6: ["1Y", "6"], + pin7: ["2OE_N", "7"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "output", + pin4: "ground", + pin5: "input", + pin6: "output", + pin7: "input", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74AUP2G240DCUR = (props: ChipProps) => { + // Footprint provenance: TI drawing DCU0008A; donor SN74LVC2G08DCUR (JLCPCB C91875) + return ( + + ); +}; + +export default SN74AUP2G240DCUR; diff --git a/lib/chips/SN74AUP3G14DCUR.circuit.tsx b/lib/chips/SN74AUP3G14DCUR.circuit.tsx new file mode 100644 index 00000000..04fdfd44 --- /dev/null +++ b/lib/chips/SN74AUP3G14DCUR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["3Y"], + pin3: ["2A"], + pin4: ["GND"], + pin5: ["2Y"], + pin6: ["3A"], + pin7: ["1Y"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74AUP3G14DCUR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AUP3G14DCUR; diff --git a/lib/chips/SN74AXC4T245PWR.circuit.tsx b/lib/chips/SN74AXC4T245PWR.circuit.tsx new file mode 100644 index 00000000..5929ac16 --- /dev/null +++ b/lib/chips/SN74AXC4T245PWR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCCA"], + pin2: ["1DIR"], + pin3: ["2DIR"], + pin4: ["1A1"], + pin5: ["1A2"], + pin6: ["2A1"], + pin7: ["2A2"], + pin8: ["GND1"], + pin9: ["GND2"], + pin10: ["2B2"], + pin11: ["2B1"], + pin12: ["1B2"], + pin13: ["1B1"], + pin14: ["2OE"], + pin15: ["1OE"], + pin16: ["VCCB"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, +} as const; + +export const SN74AXC4T245PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74AXC4T245PWR; diff --git a/lib/chips/SN74CB3Q3245DGVR.circuit.tsx b/lib/chips/SN74CB3Q3245DGVR.circuit.tsx new file mode 100644 index 00000000..d5c46368 --- /dev/null +++ b/lib/chips/SN74CB3Q3245DGVR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A1"], + pin3: ["A2"], + pin4: ["A3"], + pin5: ["A4"], + pin6: ["A5"], + pin7: ["A6"], + pin8: ["A7"], + pin9: ["A8"], + pin10: ["GND"], + pin11: ["B8"], + pin12: ["B7"], + pin13: ["B6"], + pin14: ["B5"], + pin15: ["B4"], + pin16: ["B3"], + pin17: ["B2"], + pin18: ["B1"], + pin19: ["OE"], + pin20: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin10: { requiresGround: true }, + pin20: { requiresPower: true }, +} as const; + +export const SN74CB3Q3245DGVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74CB3Q3245DGVR; diff --git a/lib/chips/SN74CBTLV3257DGVR.circuit.tsx b/lib/chips/SN74CBTLV3257DGVR.circuit.tsx new file mode 100644 index 00000000..bce441b5 --- /dev/null +++ b/lib/chips/SN74CBTLV3257DGVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S"], + pin2: ["1B1"], + pin3: ["1B2"], + pin4: ["1A"], + pin5: ["2B1"], + pin6: ["2B2"], + pin7: ["2A"], + pin8: ["GND"], + pin9: ["3A"], + pin10: ["3B2"], + pin11: ["3B1"], + pin12: ["4A"], + pin13: ["4B2"], + pin14: ["4B1"], + pin15: ["O"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const SN74CBTLV3257DGVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74CBTLV3257DGVR; diff --git a/lib/chips/SN74HC112DR.circuit.tsx b/lib/chips/SN74HC112DR.circuit.tsx new file mode 100644 index 00000000..2a708fcd --- /dev/null +++ b/lib/chips/SN74HC112DR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1CLK"], + pin2: ["1K"], + pin3: ["1J"], + pin4: ["1PRE"], + pin5: ["1Q1"], + pin6: ["1Q2"], + pin7: ["2Q1"], + pin8: ["GND"], + pin9: ["2Q2"], + pin10: ["2PRE"], + pin11: ["2J"], + pin12: ["2K"], + pin13: ["2CLK"], + pin14: ["2CLR"], + pin15: ["1CLR"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const SN74HC112DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74HC112DR; diff --git a/lib/chips/SN74HC14DR.circuit.tsx b/lib/chips/SN74HC14DR.circuit.tsx new file mode 100644 index 00000000..72928ac3 --- /dev/null +++ b/lib/chips/SN74HC14DR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1Y"], + pin3: ["2A"], + pin4: ["2Y"], + pin5: ["3A"], + pin6: ["3Y"], + pin7: ["GND"], + pin8: ["4Y"], + pin9: ["4A"], + pin10: ["5Y"], + pin11: ["5A"], + pin12: ["6Y"], + pin13: ["6A"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74HC14DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74HC14DR; diff --git a/lib/chips/SN74HC21DR.circuit.tsx b/lib/chips/SN74HC21DR.circuit.tsx new file mode 100644 index 00000000..703ef6ba --- /dev/null +++ b/lib/chips/SN74HC21DR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["pin3"], + pin4: ["1C"], + pin5: ["1D"], + pin6: ["1Y"], + pin7: ["GND"], + pin8: ["2Y"], + pin9: ["2A"], + pin10: ["2B"], + pin11: ["NC"], + pin12: ["2C"], + pin13: ["2D"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin11: { doNotConnect: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74HC21DR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74HC21DR; diff --git a/lib/chips/SN74HCS03DR.circuit.tsx b/lib/chips/SN74HCS03DR.circuit.tsx new file mode 100644 index 00000000..752c4d72 --- /dev/null +++ b/lib/chips/SN74HCS03DR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A", "1"], + pin2: ["1B", "2"], + pin3: ["1Y", "3"], + pin4: ["2A", "4"], + pin5: ["2B", "5"], + pin6: ["2Y", "6"], + pin7: ["GND", "7"], + pin8: ["3Y", "8"], + pin9: ["3A", "9"], + pin10: ["3B", "10"], + pin11: ["4Y", "11"], + pin12: ["4A", "12"], + pin13: ["4B", "13"], + pin14: ["VCC", "14"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "output", + pin4: "input", + pin5: "input", + pin6: "output", + pin7: "ground", + pin8: "output", + pin9: "input", + pin10: "input", + pin11: "output", + pin12: "input", + pin13: "input", + pin14: "power", +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74HCS03DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672) + return ( + + ); +}; + +export default SN74HCS03DR; diff --git a/lib/chips/SN74HCS595BQBR.circuit.tsx b/lib/chips/SN74HCS595BQBR.circuit.tsx new file mode 100644 index 00000000..3431924b --- /dev/null +++ b/lib/chips/SN74HCS595BQBR.circuit.tsx @@ -0,0 +1,265 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["QB"], + pin2: ["QC"], + pin3: ["QD"], + pin4: ["QE"], + pin5: ["QF"], + pin6: ["QG"], + pin7: ["QH"], + pin8: ["GND"], + pin9: ["pin9"], + pin10: ["SRCLR"], + pin11: ["SRCLK"], + pin12: ["RCLK"], + pin13: ["OE"], + pin14: ["SER"], + pin15: ["QA"], + pin16: ["VCC"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const SN74HCS595BQBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876392.obj?uuid=785c24efc5da4ba0b38de7c68d6a5913", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876392.step?uuid=785c24efc5da4ba0b38de7c68d6a5913", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.01 }, + }} + {...props} + /> + ); +}; + +export default SN74HCS595BQBR; diff --git a/lib/chips/SN74LV1T125DBVR.circuit.tsx b/lib/chips/SN74LV1T125DBVR.circuit.tsx new file mode 100644 index 00000000..544083c2 --- /dev/null +++ b/lib/chips/SN74LV1T125DBVR.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OE"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LV1T125DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C473338.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C473338.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default SN74LV1T125DBVR; diff --git a/lib/chips/SN74LV1T34DCKR.circuit.tsx b/lib/chips/SN74LV1T34DCKR.circuit.tsx new file mode 100644 index 00000000..dea88b48 --- /dev/null +++ b/lib/chips/SN74LV1T34DCKR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LV1T34DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LV1T34DCKR; diff --git a/lib/chips/SN74LV4052ADYYR.circuit.tsx b/lib/chips/SN74LV4052ADYYR.circuit.tsx new file mode 100644 index 00000000..84bd16ba --- /dev/null +++ b/lib/chips/SN74LV4052ADYYR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["2Y0"], + pin2: ["2Y2"], + pin3: ["2_COM"], + pin4: ["2Y3"], + pin5: ["2Y1"], + pin6: ["INH"], + pin7: ["GND2"], + pin8: ["GND1"], + pin9: ["B"], + pin10: ["A"], + pin11: ["1Y3"], + pin12: ["1Y0"], + pin13: ["1_COM"], + pin14: ["1Y1"], + pin15: ["1Y2"], + pin16: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const SN74LV4052ADYYR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LV4052ADYYR; diff --git a/lib/chips/SN74LV541ADBR.circuit.tsx b/lib/chips/SN74LV541ADBR.circuit.tsx new file mode 100644 index 00000000..992f5c9c --- /dev/null +++ b/lib/chips/SN74LV541ADBR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OE1"], + pin2: ["A1"], + pin3: ["A2"], + pin4: ["A3"], + pin5: ["A4"], + pin6: ["A5"], + pin7: ["A6"], + pin8: ["A7"], + pin9: ["A8"], + pin10: ["GND"], + pin11: ["Y8"], + pin12: ["Y7"], + pin13: ["Y6"], + pin14: ["Y5"], + pin15: ["Y4"], + pin16: ["Y3"], + pin17: ["Y2"], + pin18: ["Y1"], + pin19: ["OE2"], + pin20: ["VCC"], +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, + pin20: { requiresPower: true }, +} as const; + +export const SN74LV541ADBR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LV541ADBR; diff --git a/lib/chips/SN74LVC08ANSR.circuit.tsx b/lib/chips/SN74LVC08ANSR.circuit.tsx new file mode 100644 index 00000000..d1bee9cb --- /dev/null +++ b/lib/chips/SN74LVC08ANSR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["1Y"], + pin4: ["2A"], + pin5: ["2B"], + pin6: ["2Y"], + pin7: ["GND"], + pin8: ["3Y"], + pin9: ["3A"], + pin10: ["3B"], + pin11: ["4Y"], + pin12: ["4A"], + pin13: ["4B"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74LVC08ANSR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC08ANSR; diff --git a/lib/chips/SN74LVC125APWR.circuit.tsx b/lib/chips/SN74LVC125APWR.circuit.tsx new file mode 100644 index 00000000..775eaa9b --- /dev/null +++ b/lib/chips/SN74LVC125APWR.circuit.tsx @@ -0,0 +1,258 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OE"], + pin2: ["1A"], + pin3: ["1Y"], + pin4: ["2OE"], + pin5: ["2A"], + pin6: ["2Y"], + pin7: ["GND"], + pin8: ["3Y"], + pin9: ["3A"], + pin10: ["3OE"], + pin11: ["4Y"], + pin12: ["4A"], + pin13: ["4OE"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74LVC125APWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7813.obj?uuid=5377177da492449fa1a3111d646cac17", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7813.step?uuid=5377177da492449fa1a3111d646cac17", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000013410317, + y: 0, + z: -0.069083, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC125APWR; diff --git a/lib/chips/SN74LVC14ADGVR.circuit.tsx b/lib/chips/SN74LVC14ADGVR.circuit.tsx new file mode 100644 index 00000000..d7b3e340 --- /dev/null +++ b/lib/chips/SN74LVC14ADGVR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1Y"], + pin3: ["2A"], + pin4: ["2Y"], + pin5: ["3A"], + pin6: ["3Y"], + pin7: ["GND"], + pin8: ["4Y"], + pin9: ["4A"], + pin10: ["5Y"], + pin11: ["5A"], + pin12: ["6Y"], + pin13: ["6A"], + pin14: ["VCC"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +export const SN74LVC14ADGVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC14ADGVR; diff --git a/lib/chips/SN74LVC1G04YZPR.circuit.tsx b/lib/chips/SN74LVC1G04YZPR.circuit.tsx new file mode 100644 index 00000000..653dd419 --- /dev/null +++ b/lib/chips/SN74LVC1G04YZPR.circuit.tsx @@ -0,0 +1,132 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["Y", "C2"], + pin2: ["A", "B1"], + pin3: ["GND", "C1"], + pin4: ["NC", "A1"], + pin5: ["VCC", "A2"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "ground", + pin4: "no-connect", + pin5: "power", +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G04YZPR = (props: ChipProps) => { + // Footprint provenance: TI drawing YZP0005; donor SN74LVC1G125YZPR (JLCPCB C2675663) + return ( + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default SN74LVC1G04YZPR; diff --git a/lib/chips/SN74LVC1G07DCK3.circuit.tsx b/lib/chips/SN74LVC1G07DCK3.circuit.tsx new file mode 100644 index 00000000..2cc14412 --- /dev/null +++ b/lib/chips/SN74LVC1G07DCK3.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G07DCK3 = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G07DCK3; diff --git a/lib/chips/SN74LVC1G08DCKR.circuit.tsx b/lib/chips/SN74LVC1G08DCKR.circuit.tsx new file mode 100644 index 00000000..c5884bfe --- /dev/null +++ b/lib/chips/SN74LVC1G08DCKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["B"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G08DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G08DCKR; diff --git a/lib/chips/SN74LVC1G11DBVR.circuit.tsx b/lib/chips/SN74LVC1G11DBVR.circuit.tsx new file mode 100644 index 00000000..fb09c2bb --- /dev/null +++ b/lib/chips/SN74LVC1G11DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["GND"], + pin3: ["B"], + pin4: ["Y"], + pin5: ["VCC"], + pin6: ["C"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G11DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G11DBVR; diff --git a/lib/chips/SN74LVC1G125YZPR.circuit.tsx b/lib/chips/SN74LVC1G125YZPR.circuit.tsx new file mode 100644 index 00000000..dbfc001c --- /dev/null +++ b/lib/chips/SN74LVC1G125YZPR.circuit.tsx @@ -0,0 +1,146 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["A", "B1"], + pin3: ["GND", "C1"], + pin4: ["OE", "A1"], + pin5: ["VCC", "A2"], + pin1: ["Y", "C2"], +} as const; + +const pinRoles = { + pin3: "ground", + pin5: "power", +} as const; + +const pinAttributes = { + pin3: { + requiresGround: true, + }, + pin5: { + requiresPower: true, + }, +} as const; + +export const SN74LVC1G125YZPR = (props: ChipProps) => { + return ( + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2675663.obj?uuid=005ba124471b4af591e070d1c014f2b7", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2675663.step?uuid=005ba124471b4af591e070d1c014f2b7", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012699999956566899, + y: 0.000012699999842880061, + z: -0.17, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC1G125YZPR; diff --git a/lib/chips/SN74LVC1G126DBVT.circuit.tsx b/lib/chips/SN74LVC1G126DBVT.circuit.tsx new file mode 100644 index 00000000..f6a038a8 --- /dev/null +++ b/lib/chips/SN74LVC1G126DBVT.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OE"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G126DBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G126DBVT; diff --git a/lib/chips/SN74LVC1G14DRLR.circuit.tsx b/lib/chips/SN74LVC1G14DRLR.circuit.tsx new file mode 100644 index 00000000..02c97122 --- /dev/null +++ b/lib/chips/SN74LVC1G14DRLR.circuit.tsx @@ -0,0 +1,152 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G14DRLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19829622.obj?uuid=b74a526637684c2b841b7ddaecf870ce", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C19829622.step?uuid=b74a526637684c2b841b7ddaecf870ce", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.025908000000072207, + y: 0.033807400000114285, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC1G14DRLR; diff --git a/lib/chips/SN74LVC1G17DBVT.circuit.tsx b/lib/chips/SN74LVC1G17DBVT.circuit.tsx new file mode 100644 index 00000000..c2fe82c8 --- /dev/null +++ b/lib/chips/SN74LVC1G17DBVT.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G17DBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G17DBVT; diff --git a/lib/chips/SN74LVC1G3157YZPR.circuit.tsx b/lib/chips/SN74LVC1G3157YZPR.circuit.tsx new file mode 100644 index 00000000..e1a915da --- /dev/null +++ b/lib/chips/SN74LVC1G3157YZPR.circuit.tsx @@ -0,0 +1,158 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["B2", "A1"], + pin4: ["S", "A2"], + pin2: ["GND", "B1"], + pin5: ["VCC", "B2"], + pin3: ["B1", "C1"], + pin6: ["A", "C2"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin4: "input", + pin2: "ground", + pin5: "power", + pin3: "bidirectional", + pin6: "bidirectional", +} as const; + +const pinAttributes = { + pin2: { + requiresGround: true, + }, + pin5: { + requiresPower: true, + }, +} as const; + +export const SN74LVC1G3157YZPR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2673189.obj?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2673189.step?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00013970000009067007, + y: 0.000012699999956566899, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC1G3157YZPR; diff --git a/lib/chips/SN74LVC1G32DRY2.circuit.tsx b/lib/chips/SN74LVC1G32DRY2.circuit.tsx new file mode 100644 index 00000000..dcd10456 --- /dev/null +++ b/lib/chips/SN74LVC1G32DRY2.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["B"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["NC"], + pin6: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { doNotConnect: true }, + pin6: { requiresPower: true }, +} as const; + +export const SN74LVC1G32DRY2 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2865311.obj?uuid=3d17cc238ee8472eb9cd0e77fc06b04c", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2865311.step?uuid=3d17cc238ee8472eb9cd0e77fc06b04c", + pcbRotationOffset: 180, + modelOriginPosition: { x: -0.012496799999894392, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default SN74LVC1G32DRY2; diff --git a/lib/chips/SN74LVC1G74DCUR.circuit.tsx b/lib/chips/SN74LVC1G74DCUR.circuit.tsx new file mode 100644 index 00000000..0809ddce --- /dev/null +++ b/lib/chips/SN74LVC1G74DCUR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CLK"], + pin2: ["D"], + pin3: ["Q1"], + pin4: ["GND"], + pin5: ["Q2"], + pin6: ["CLR"], + pin7: ["PRE"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC1G74DCUR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G74DCUR; diff --git a/lib/chips/SN74LVC1G86DCKR.circuit.tsx b/lib/chips/SN74LVC1G86DCKR.circuit.tsx new file mode 100644 index 00000000..88f71158 --- /dev/null +++ b/lib/chips/SN74LVC1G86DCKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A"], + pin2: ["B"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1G86DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1G86DCKR; diff --git a/lib/chips/SN74LVC1GU04DBVR.circuit.tsx b/lib/chips/SN74LVC1GU04DBVR.circuit.tsx new file mode 100644 index 00000000..6715b9df --- /dev/null +++ b/lib/chips/SN74LVC1GU04DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["A"], + pin3: ["GND"], + pin4: ["Y"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const SN74LVC1GU04DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC1GU04DBVR; diff --git a/lib/chips/SN74LVC2G07YZPR.circuit.tsx b/lib/chips/SN74LVC2G07YZPR.circuit.tsx new file mode 100644 index 00000000..5f5c8d5b --- /dev/null +++ b/lib/chips/SN74LVC2G07YZPR.circuit.tsx @@ -0,0 +1,158 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A", "1"], + pin2: ["GND", "2"], + pin3: ["2A", "3"], + pin4: ["2Y", "4"], + pin5: ["VCC", "5"], + pin6: ["1Y", "6"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "ground", + pin3: "input", + pin4: "output", + pin5: "power", + pin6: "input", +} as const; + +const pinAttributes = { + pin2: { + requiresGround: true, + }, + pin5: { + requiresPower: true, + }, +} as const; + +export const SN74LVC2G07YZPR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2652109.obj?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2652109.step?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00013970000009067007, + y: 0.000012699999956566899, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC2G07YZPR; diff --git a/lib/chips/SN74LVC2G08DCUR.circuit.tsx b/lib/chips/SN74LVC2G08DCUR.circuit.tsx new file mode 100644 index 00000000..7988b5ff --- /dev/null +++ b/lib/chips/SN74LVC2G08DCUR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["2Y"], + pin4: ["GND"], + pin5: ["2A"], + pin6: ["2B"], + pin7: ["1Y"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC2G08DCUR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC2G08DCUR; diff --git a/lib/chips/SN74LVC2G125DCU3.circuit.tsx b/lib/chips/SN74LVC2G125DCU3.circuit.tsx new file mode 100644 index 00000000..2779f257 --- /dev/null +++ b/lib/chips/SN74LVC2G125DCU3.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OE"], + pin2: ["1A"], + pin3: ["2Y"], + pin4: ["GND"], + pin5: ["2A"], + pin6: ["1Y"], + pin7: ["2OE"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC2G125DCU3 = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC2G125DCU3; diff --git a/lib/chips/SN74LVC2G132DCTR.circuit.tsx b/lib/chips/SN74LVC2G132DCTR.circuit.tsx new file mode 100644 index 00000000..d7a15254 --- /dev/null +++ b/lib/chips/SN74LVC2G132DCTR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["1B"], + pin3: ["2Y"], + pin4: ["GND"], + pin5: ["2A"], + pin6: ["2B"], + pin7: ["1Y"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC2G132DCTR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC2G132DCTR; diff --git a/lib/chips/SN74LVC2G240DCTR.circuit.tsx b/lib/chips/SN74LVC2G240DCTR.circuit.tsx new file mode 100644 index 00000000..1bf1ceaa --- /dev/null +++ b/lib/chips/SN74LVC2G240DCTR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OE"], + pin2: ["1A"], + pin3: ["2Y"], + pin4: ["GND"], + pin5: ["2A"], + pin6: ["1Y"], + pin7: ["2OE"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC2G240DCTR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC2G240DCTR; diff --git a/lib/chips/SN74LVC2G34YZPR.circuit.tsx b/lib/chips/SN74LVC2G34YZPR.circuit.tsx new file mode 100644 index 00000000..c5aaf681 --- /dev/null +++ b/lib/chips/SN74LVC2G34YZPR.circuit.tsx @@ -0,0 +1,158 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A", "1"], + pin6: ["1Y", "6"], + pin3: ["2A", "3"], + pin4: ["2Y", "4"], + pin2: ["GND", "2"], + pin5: ["VCC", "5"], +} as const; + +const pinRoles = { + pin1: "input", + pin6: "output", + pin3: "input", + pin4: "output", + pin2: "ground", + pin5: "power", +} as const; + +const pinAttributes = { + pin2: { + requiresGround: true, + }, + pin5: { + requiresPower: true, + }, +} as const; + +export const SN74LVC2G34YZPR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544652.obj?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544652.step?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00013970000009067007, + y: 0.000012699999956566899, + z: -0.48, + }, + }} + {...props} + /> + ); +}; + +export default SN74LVC2G34YZPR; diff --git a/lib/chips/SN74LVC3G07DCUR.circuit.tsx b/lib/chips/SN74LVC3G07DCUR.circuit.tsx new file mode 100644 index 00000000..6651c7d2 --- /dev/null +++ b/lib/chips/SN74LVC3G07DCUR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1A"], + pin2: ["3Y"], + pin3: ["2A"], + pin4: ["GND"], + pin5: ["2Y"], + pin6: ["3A"], + pin7: ["1Y"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const SN74LVC3G07DCUR = (props: ChipProps) => { + return ( + + ); +}; + +export default SN74LVC3G07DCUR; diff --git a/lib/chips/TAC5112IRGER.circuit.tsx b/lib/chips/TAC5112IRGER.circuit.tsx new file mode 100644 index 00000000..d559cabe --- /dev/null +++ b/lib/chips/TAC5112IRGER.circuit.tsx @@ -0,0 +1,376 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DREG"], + pin2: ["BCLK"], + pin3: ["FSYNC"], + pin4: ["DOUT"], + pin5: ["DIN"], + pin6: ["IOVDD"], + pin7: ["SCL"], + pin8: ["SDA"], + pin9: ["GPIO1"], + pin10: ["GPIO2"], + pin11: ["GPO1"], + pin12: ["GPI1"], + pin13: ["ADDR"], + pin14: ["MICBIAS"], + pin15: ["IN1P"], + pin16: ["IN1M"], + pin17: ["IN2P"], + pin18: ["IN2M"], + pin19: ["OUT1M"], + pin20: ["OUT1P"], + pin21: ["OUT2P"], + pin22: ["OUT2M"], + pin23: ["AVDD"], + pin24: ["VREF"], + pin25: ["VSS1"], + pin26: ["A2"], + pin27: ["A3"], + pin28: ["A4"], + pin29: ["A1"], +} as const; + +const pinAttributes = { + pin25: { requiresGround: true }, +} as const; + +export const TAC5112IRGER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C44853692.obj?uuid=b8023735898d4ed39c8516415302ae57", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C44853692.step?uuid=b8023735898d4ed39c8516415302ae57", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00006349999989652133, + y: -0.0001015999999935957, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default TAC5112IRGER; diff --git a/lib/chips/TCA6408APWR.circuit.tsx b/lib/chips/TCA6408APWR.circuit.tsx new file mode 100644 index 00000000..20a0a933 --- /dev/null +++ b/lib/chips/TCA6408APWR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCCI"], + pin2: ["ADDR"], + pin3: ["RESET"], + pin4: ["P0"], + pin5: ["P1"], + pin6: ["P2"], + pin7: ["P3"], + pin8: ["GND"], + pin9: ["P4"], + pin10: ["P5"], + pin11: ["P6"], + pin12: ["P7"], + pin13: ["INT"], + pin14: ["SCL"], + pin15: ["SDA"], + pin16: ["VCCP"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +export const TCA6408APWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TCA6408APWR; diff --git a/lib/chips/TCA9535DBR.circuit.tsx b/lib/chips/TCA9535DBR.circuit.tsx new file mode 100644 index 00000000..a295628e --- /dev/null +++ b/lib/chips/TCA9535DBR.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INT"], + pin2: ["A1"], + pin3: ["A2"], + pin4: ["P00"], + pin5: ["P01"], + pin6: ["P02"], + pin7: ["P03"], + pin8: ["P04"], + pin9: ["P05"], + pin10: ["P06"], + pin11: ["P07"], + pin12: ["GND"], + pin13: ["P10"], + pin14: ["P11"], + pin15: ["P12"], + pin16: ["P13"], + pin17: ["P14"], + pin18: ["P15"], + pin19: ["P16"], + pin20: ["P17"], + pin21: ["A0"], + pin22: ["SCL"], + pin23: ["SDA"], + pin24: ["VCC"], +} as const; + +const pinAttributes = { + pin12: { requiresGround: true }, + pin24: { requiresPower: true }, +} as const; + +export const TCA9535DBR = (props: ChipProps) => { + return ( + + ); +}; + +export default TCA9535DBR; diff --git a/lib/chips/TCA9803DGKR.circuit.tsx b/lib/chips/TCA9803DGKR.circuit.tsx new file mode 100644 index 00000000..a99f1b1d --- /dev/null +++ b/lib/chips/TCA9803DGKR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCCA"], + pin2: ["SCLA"], + pin3: ["SDAA"], + pin4: ["GND"], + pin5: ["EN"], + pin6: ["SDAB"], + pin7: ["SCLB"], + pin8: ["VCCB"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, +} as const; + +export const TCA9803DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TCA9803DGKR; diff --git a/lib/chips/TCAN1044AVDRBRQ1.circuit.tsx b/lib/chips/TCAN1044AVDRBRQ1.circuit.tsx new file mode 100644 index 00000000..45d051db --- /dev/null +++ b/lib/chips/TCAN1044AVDRBRQ1.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TXD"], + pin2: ["GND"], + pin3: ["VCC"], + pin4: ["RXD"], + pin5: ["pin5"], + pin6: ["CANL"], + pin7: ["CANH"], + pin8: ["STB"], + pin9: ["Pad"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TCAN1044AVDRBRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TCAN1044AVDRBRQ1; diff --git a/lib/chips/TCAN1057AVDRQ1.circuit.tsx b/lib/chips/TCAN1057AVDRQ1.circuit.tsx new file mode 100644 index 00000000..a5659738 --- /dev/null +++ b/lib/chips/TCAN1057AVDRQ1.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TXD"], + pin2: ["GND"], + pin3: ["VCC"], + pin4: ["RXD"], + pin5: ["pin5"], + pin6: ["CANL"], + pin7: ["CANH"], + pin8: ["S"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TCAN1057AVDRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TCAN1057AVDRQ1; diff --git a/lib/chips/TFP401PZP.circuit.tsx b/lib/chips/TFP401PZP.circuit.tsx new file mode 100644 index 00000000..b33c590a --- /dev/null +++ b/lib/chips/TFP401PZP.circuit.tsx @@ -0,0 +1,149 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DFO"], + pin2: ["PD"], + pin3: ["ST"], + pin4: ["PIXS"], + pin5: ["GND3"], + pin6: ["DVDD3"], + pin7: ["STAG"], + pin8: ["SCDT"], + pin9: ["PDO"], + pin10: ["QE0"], + pin11: ["QE1"], + pin12: ["QE2"], + pin13: ["QE3"], + pin14: ["QE4"], + pin15: ["QE5"], + pin16: ["QE6"], + pin17: ["QE7"], + pin18: ["OVDD5"], + pin19: ["OGND5"], + pin20: ["QE8"], + pin21: ["QE9"], + pin22: ["QE10"], + pin23: ["QE11"], + pin24: ["QE12"], + pin25: ["QE13"], + pin26: ["QE14"], + pin27: ["QE15"], + pin28: ["OGND4"], + pin29: ["OVDD4"], + pin30: ["QE16"], + pin31: ["QE17"], + pin32: ["QE18"], + pin33: ["QE19"], + pin34: ["QE20"], + pin35: ["QE21"], + pin36: ["QE22"], + pin37: ["QE23"], + pin38: ["DVDD2"], + pin39: ["GND2"], + pin40: ["CTL1"], + pin41: ["CTL2"], + pin42: ["CTL3"], + pin43: ["OVDD3"], + pin44: ["ODCK"], + pin45: ["OGND3"], + pin46: ["DE"], + pin47: ["VSYNC"], + pin48: ["HSYNC"], + pin49: ["QO0"], + pin50: ["QO1"], + pin51: ["QO2"], + pin52: ["QO3"], + pin53: ["QO4"], + pin54: ["QO5"], + pin55: ["QO6"], + pin56: ["QO7"], + pin57: ["OVDD2"], + pin58: ["OGND2"], + pin59: ["QO8"], + pin60: ["QO9"], + pin61: ["QO10"], + pin62: ["QO11"], + pin63: ["QO12"], + pin64: ["QO13"], + pin65: ["QO14"], + pin66: ["QO15"], + pin67: ["DVDD1"], + pin68: ["GND1"], + pin69: ["QO16"], + pin70: ["QO17"], + pin71: ["QO18"], + pin72: ["QO19"], + pin73: ["QO20"], + pin74: ["QO21"], + pin75: ["QO22"], + pin76: ["OGND1"], + pin77: ["QO23"], + pin78: ["OVDD1"], + pin79: ["AGND5"], + pin80: ["Rx2_POS"], + pin81: ["Rx2_NEG"], + pin82: ["AVDD4"], + pin83: ["AGND4"], + pin84: ["AVDD3"], + pin85: ["Rx1_POS"], + pin86: ["Rx1_NEG"], + pin87: ["AGND3"], + pin88: ["AVDD2"], + pin89: ["AGND2"], + pin90: ["Rx0_POS"], + pin91: ["Rx0_NEG"], + pin92: ["AGND1"], + pin93: ["RxC_POS"], + pin94: ["RxC_NEG"], + pin95: ["AVDD1"], + pin96: ["EXT_RES"], + pin97: ["PVDD"], + pin98: ["PGND"], + pin99: ["RSVD"], + pin100: ["OCK_INV"], + pin101: ["PAD"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin39: { requiresGround: true }, + pin68: { requiresGround: true }, + pin79: { requiresGround: true }, + pin83: { requiresGround: true }, + pin87: { requiresGround: true }, + pin89: { requiresGround: true }, + pin92: { requiresGround: true }, + pin98: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin101: [...pinLabels["pin101"], "thermalpad"], +} as const; + +export const TFP401PZP = (props: ChipProps) => { + return ( + + ); +}; + +export default TFP401PZP; diff --git a/lib/chips/THVD1410DR.circuit.tsx b/lib/chips/THVD1410DR.circuit.tsx new file mode 100644 index 00000000..66b1af4c --- /dev/null +++ b/lib/chips/THVD1410DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD1410DR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1410DR; diff --git a/lib/chips/THVD1424RGTR.circuit.tsx b/lib/chips/THVD1424RGTR.circuit.tsx new file mode 100644 index 00000000..8675e873 --- /dev/null +++ b/lib/chips/THVD1424RGTR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["TERM_TX"], + pin6: ["GND"], + pin7: ["TERM_RX"], + pin8: ["SLR"], + pin9: ["Y"], + pin10: ["Z"], + pin11: ["B"], + pin12: ["A"], + pin13: ["VIO"], + pin14: ["VCC"], + pin15: ["pin15"], + pin16: ["NC"], + pin17: ["PAD"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin14: { requiresPower: true }, + pin16: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const THVD1424RGTR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1424RGTR; diff --git a/lib/chips/THVD1450DGKR.circuit.tsx b/lib/chips/THVD1450DGKR.circuit.tsx new file mode 100644 index 00000000..8e589f32 --- /dev/null +++ b/lib/chips/THVD1450DGKR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD1450DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1450DGKR; diff --git a/lib/chips/THVD1451DRBR.circuit.tsx b/lib/chips/THVD1451DRBR.circuit.tsx new file mode 100644 index 00000000..60714025 --- /dev/null +++ b/lib/chips/THVD1451DRBR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["R"], + pin3: ["D"], + pin4: ["GND"], + pin5: ["Y"], + pin6: ["Z"], + pin7: ["B"], + pin8: ["A"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const THVD1451DRBR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1451DRBR; diff --git a/lib/chips/THVD1452DGS.circuit.tsx b/lib/chips/THVD1452DGS.circuit.tsx new file mode 100644 index 00000000..17937c93 --- /dev/null +++ b/lib/chips/THVD1452DGS.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["Y"], + pin7: ["Z"], + pin8: ["B"], + pin9: ["A"], + pin10: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const THVD1452DGS = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1452DGS; diff --git a/lib/chips/THVD1500DR.circuit.tsx b/lib/chips/THVD1500DR.circuit.tsx new file mode 100644 index 00000000..4044e6bf --- /dev/null +++ b/lib/chips/THVD1500DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD1500DR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD1500DR; diff --git a/lib/chips/THVD2410DGKR.circuit.tsx b/lib/chips/THVD2410DGKR.circuit.tsx new file mode 100644 index 00000000..8942255a --- /dev/null +++ b/lib/chips/THVD2410DGKR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD2410DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD2410DGKR; diff --git a/lib/chips/THVD2450DGKR.circuit.tsx b/lib/chips/THVD2450DGKR.circuit.tsx new file mode 100644 index 00000000..7b5b60ab --- /dev/null +++ b/lib/chips/THVD2450DGKR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["RE"], + pin3: ["DE"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD2450DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD2450DGKR; diff --git a/lib/chips/THVD8000DDFR.circuit.tsx b/lib/chips/THVD8000DDFR.circuit.tsx new file mode 100644 index 00000000..06565d5c --- /dev/null +++ b/lib/chips/THVD8000DDFR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R"], + pin2: ["MODE"], + pin3: ["F_SET"], + pin4: ["D"], + pin5: ["GND"], + pin6: ["A"], + pin7: ["B"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD8000DDFR = (props: ChipProps) => { + return ( + + ); +}; + +export default THVD8000DDFR; diff --git a/lib/chips/THVD8010DDFR.circuit.tsx b/lib/chips/THVD8010DDFR.circuit.tsx new file mode 100644 index 00000000..736ced54 --- /dev/null +++ b/lib/chips/THVD8010DDFR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R", "1"], + pin2: ["MODE", "2"], + pin3: ["F_SET", "3"], + pin4: ["D", "4"], + pin5: ["GND", "5"], + pin6: ["A", "6"], + pin7: ["B", "7"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "control", + pin3: "input", + pin4: "input", + pin5: "ground", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "power", +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const THVD8010DDFR = (props: ChipProps) => { + // Footprint provenance: TI drawing DDF0008A; donor INA186A2IDDFR (JLCPCB C2869854) + return ( + + ); +}; + +export default THVD8010DDFR; diff --git a/lib/chips/TIOL221RGER.circuit.tsx b/lib/chips/TIOL221RGER.circuit.tsx new file mode 100644 index 00000000..20d49636 --- /dev/null +++ b/lib/chips/TIOL221RGER.circuit.tsx @@ -0,0 +1,80 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CS", "PP", "1"], + pin2: ["RX1", "2"], + pin3: ["EN1", "3"], + pin4: ["TX1", "4"], + pin5: ["V5IN", "5"], + pin6: ["ILIM_ADJ1", "6"], + pin7: ["ILIM_ADJ2", "7"], + pin8: ["CQ", "8"], + pin9: ["LP", "9"], + pin10: ["LM", "10"], + pin11: ["DO", "11"], + pin12: ["DI", "12"], + pin13: ["VOUT", "13"], + pin14: ["RESET", "14"], + pin15: ["RX2", "15"], + pin16: ["VSEL", "16"], + pin17: ["TX2", "17"], + pin18: ["WU", "18"], + pin19: ["EN2", "19"], + pin20: ["INT", "NFLT1", "20"], + pin21: ["SDO", "NFLT2", "21"], + pin22: ["SCK", "22"], + pin23: ["SPI", "PIN", "23"], + pin24: ["SDI", "NPN", "24"], + pin25: ["THERMAL_PAD"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "output", + pin3: "control", + pin4: "input", + pin5: "unknown", + pin6: "control", + pin7: "control", + pin8: "bidirectional", + pin9: "power", + pin10: "ground", + pin11: "output", + pin12: "input", + pin13: "output", + pin14: "output", + pin15: "output", + pin16: "input", + pin17: "input", + pin18: "output", + pin19: "control", + pin20: "output", + pin21: "output", + pin22: "control", + pin23: "input", + pin24: "input", + pin25: "ground", +} as const; + +const pinAttributes = { + pin9: { requiresPower: true }, + pin10: { requiresGround: true }, + pin25: { requiresGround: true }, +} as const; + +export const TIOL221RGER = (props: ChipProps) => { + // Footprint provenance: TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529) + return ( + + ); +}; + +export default TIOL221RGER; diff --git a/lib/chips/TIOS1015DMWT.circuit.tsx b/lib/chips/TIOS1015DMWT.circuit.tsx new file mode 100644 index 00000000..088846e2 --- /dev/null +++ b/lib/chips/TIOS1015DMWT.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["NFAULT"], + pin3: ["NC1"], + pin4: ["IN"], + pin5: ["EN"], + pin6: ["ILIM_ADJ"], + pin7: ["GND"], + pin8: ["OUT"], + pin9: ["VCC"], + pin10: ["NC2"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin7: { requiresGround: true }, + pin9: { requiresPower: true }, + pin10: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const TIOS1015DMWT = (props: ChipProps) => { + return ( + + ); +}; + +export default TIOS1015DMWT; diff --git a/lib/chips/TL072HIPWR.circuit.tsx b/lib/chips/TL072HIPWR.circuit.tsx new file mode 100644 index 00000000..ba4db38b --- /dev/null +++ b/lib/chips/TL072HIPWR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["1IN_N", "2"], + pin3: ["1IN_P", "3"], + pin1: ["1OUT", "1"], + pin6: ["2IN_N", "6"], + pin5: ["2IN_P", "5"], + pin7: ["2OUT", "7"], + pin4: ["VCC_N", "4"], + pin8: ["VCC_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin1: "output", + pin6: "input", + pin5: "input", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const TL072HIPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL072HIPWR; diff --git a/lib/chips/TL074HIDYYR.circuit.tsx b/lib/chips/TL074HIDYYR.circuit.tsx new file mode 100644 index 00000000..e241cf72 --- /dev/null +++ b/lib/chips/TL074HIDYYR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["1IN_N", "2"], + pin3: ["1IN_P", "3"], + pin1: ["1OUT", "1"], + pin6: ["2IN_N", "6"], + pin5: ["2IN_P", "5"], + pin7: ["2OUT", "7"], + pin9: ["3IN_N", "9"], + pin10: ["3IN_P", "10"], + pin8: ["3OUT", "8"], + pin13: ["4IN_N", "13"], + pin12: ["4IN_P", "12"], + pin14: ["4OUT", "14"], + pin11: ["VCC_N", "11"], + pin4: ["VCC_P", "4"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin1: "output", + pin6: "input", + pin5: "input", + pin7: "output", + pin9: "input", + pin10: "input", + pin8: "output", + pin13: "input", + pin12: "input", + pin14: "output", + pin11: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin11: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const TL074HIDYYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL074HIDYYR; diff --git a/lib/chips/TL082HIDR.circuit.tsx b/lib/chips/TL082HIDR.circuit.tsx new file mode 100644 index 00000000..dcf5e379 --- /dev/null +++ b/lib/chips/TL082HIDR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC", "1", "NC_1"], + pin2: ["IN_N", "2"], + pin3: ["IN_P", "3"], + pin4: ["VCC_N", "4"], + pin5: ["NC", "5", "NC_5"], + pin6: ["OUT", "6"], + pin7: ["VCC_P", "7"], + pin8: ["NC", "8", "NC_8"], +} as const; + +const pinRoles = { + pin1: "no-connect", + pin2: "input", + pin3: "input", + pin4: "power", + pin5: "no-connect", + pin6: "output", + pin7: "power", + pin8: "no-connect", +} as const; + +const pinAttributes = { + pin1: { + doNotConnect: true, + }, + pin4: { + requiresPower: true, + }, + pin5: { + doNotConnect: true, + }, + pin7: { + requiresPower: true, + }, + pin8: { + doNotConnect: true, + }, +} as const; + +export const TL082HIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL082HIDR; diff --git a/lib/chips/TL084HIDYYR.circuit.tsx b/lib/chips/TL084HIDYYR.circuit.tsx new file mode 100644 index 00000000..e36530b9 --- /dev/null +++ b/lib/chips/TL084HIDYYR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["1IN_N", "2"], + pin3: ["1IN_P", "3"], + pin1: ["1OUT", "1"], + pin6: ["2IN_N", "6"], + pin5: ["2IN_P", "5"], + pin7: ["2OUT", "7"], + pin9: ["3IN_N", "9"], + pin10: ["3IN_P", "10"], + pin8: ["3OUT", "8"], + pin13: ["4IN_N", "13"], + pin12: ["4IN_P", "12"], + pin14: ["4OUT", "14"], + pin11: ["VCC_N", "11"], + pin4: ["VCC_P", "4"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin1: "output", + pin6: "input", + pin5: "input", + pin7: "output", + pin9: "input", + pin10: "input", + pin8: "output", + pin13: "input", + pin12: "input", + pin14: "output", + pin11: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin11: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const TL084HIDYYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL084HIDYYR; diff --git a/lib/chips/TL331IDBVR.circuit.tsx b/lib/chips/TL331IDBVR.circuit.tsx new file mode 100644 index 00000000..3bd61882 --- /dev/null +++ b/lib/chips/TL331IDBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["pin2"], + pin3: ["IN_POS"], + pin4: ["OUT"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, +} as const; + +export const TL331IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL331IDBVR; diff --git a/lib/chips/TL331LVDBVR.circuit.tsx b/lib/chips/TL331LVDBVR.circuit.tsx new file mode 100644 index 00000000..9bb412f2 --- /dev/null +++ b/lib/chips/TL331LVDBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_NEG"], + pin2: ["GND"], + pin3: ["IN_POS"], + pin4: ["OUT"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TL331LVDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL331LVDBVR; diff --git a/lib/chips/TL391LVDBVR.circuit.tsx b/lib/chips/TL391LVDBVR.circuit.tsx new file mode 100644 index 00000000..b3faf5da --- /dev/null +++ b/lib/chips/TL391LVDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT", "1"], + pin2: ["GND", "2"], + pin3: ["IN", "3", "IN_3"], + pin4: ["IN", "4", "IN_4"], + pin5: ["VCC", "5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "ground", + pin3: "input", + pin4: "input", + pin5: "power", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TL391LVDBVR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363) + return ( + + ); +}; + +export default TL391LVDBVR; diff --git a/lib/chips/TL431QDBZR.circuit.tsx b/lib/chips/TL431QDBZR.circuit.tsx new file mode 100644 index 00000000..e8424388 --- /dev/null +++ b/lib/chips/TL431QDBZR.circuit.tsx @@ -0,0 +1,96 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CAT"], + pin2: ["REF"], + pin3: ["AN"], +} as const; + +export const TL431QDBZR = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C316457.obj?uuid=cefd4596db214da394d9632b2b88f8f2", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C316457.step?uuid=cefd4596db214da394d9632b2b88f8f2", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0.000012699999956566899, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TL431QDBZR; diff --git a/lib/chips/TL7712ACDR.circuit.tsx b/lib/chips/TL7712ACDR.circuit.tsx new file mode 100644 index 00000000..74d97b9c --- /dev/null +++ b/lib/chips/TL7712ACDR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["RESIN"], + pin3: ["CT"], + pin4: ["GND"], + pin5: ["RESET1"], + pin6: ["RESET2"], + pin7: ["SENSE"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const TL7712ACDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TL7712ACDR; diff --git a/lib/chips/TLA2024IRUGR.circuit.tsx b/lib/chips/TLA2024IRUGR.circuit.tsx new file mode 100644 index 00000000..097e432f --- /dev/null +++ b/lib/chips/TLA2024IRUGR.circuit.tsx @@ -0,0 +1,208 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ADDR"], + pin2: ["NC"], + pin3: ["GND"], + pin4: ["AIN0"], + pin5: ["AIN1"], + pin6: ["AIN2"], + pin7: ["AIN3"], + pin8: ["VDD"], + pin9: ["SDA"], + pin10: ["SCL"], +} as const; + +const pinAttributes = { + pin2: { doNotConnect: true }, + pin3: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const TLA2024IRUGR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876104.obj?uuid=06d848c39838422d8100eb441be481f5", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876104.step?uuid=06d848c39838422d8100eb441be481f5", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.00006350000001020817, y: 0, z: -0.01 }, + }} + {...props} + /> + ); +}; + +export default TLA2024IRUGR; diff --git a/lib/chips/TLA2528IRTER.circuit.tsx b/lib/chips/TLA2528IRTER.circuit.tsx new file mode 100644 index 00000000..f09060e5 --- /dev/null +++ b/lib/chips/TLA2528IRTER.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["AVDD"], + pin8: ["DECAP"], + pin9: ["GND2"], + pin10: ["DVDD"], + pin11: ["ADDR"], + pin12: ["NC"], + pin13: ["SCL"], + pin14: ["SDA"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["GND1"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, + pin12: { doNotConnect: true }, + pin17: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const TLA2528IRTER = (props: ChipProps) => { + return ( + + ); +}; + +export default TLA2528IRTER; diff --git a/lib/chips/TLA431AIDBZR.circuit.tsx b/lib/chips/TLA431AIDBZR.circuit.tsx new file mode 100644 index 00000000..ccabdfce --- /dev/null +++ b/lib/chips/TLA431AIDBZR.circuit.tsx @@ -0,0 +1,37 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C"], + pin2: ["REF"], + pin3: ["A"], +} as const; + +export const TLA431AIDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLA431AIDBZR; diff --git a/lib/chips/TLA432AQDBZR.circuit.tsx b/lib/chips/TLA432AQDBZR.circuit.tsx new file mode 100644 index 00000000..b7618242 --- /dev/null +++ b/lib/chips/TLA432AQDBZR.circuit.tsx @@ -0,0 +1,29 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF", "1"], + pin2: ["CATHODE", "2"], + pin3: ["ANODE", "3"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "bidirectional", + pin3: "output", +} as const; + +export const TLA432AQDBZR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016) + return ( + + ); +}; + +export default TLA432AQDBZR; diff --git a/lib/chips/TLC555IDR.circuit.tsx b/lib/chips/TLC555IDR.circuit.tsx new file mode 100644 index 00000000..371a907d --- /dev/null +++ b/lib/chips/TLC555IDR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["TRIG"], + pin3: ["OUT"], + pin4: ["RESET"], + pin5: ["CONT"], + pin6: ["THRES"], + pin7: ["DISCH"], + pin8: ["VDD"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const TLC555IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC555IDR; diff --git a/lib/chips/TLC59116.circuit.tsx b/lib/chips/TLC59116.circuit.tsx index 63fb7ecb..f5e0959c 100644 --- a/lib/chips/TLC59116.circuit.tsx +++ b/lib/chips/TLC59116.circuit.tsx @@ -1,130 +1,14 @@ -import type { ChipProps } from "@tscircuit/props"; -import "tscircuit"; +import type { ComponentProps } from "react"; +import { TLC59116IPWR } from "./TLC59116IPWR.circuit.tsx"; -export const TLC59116 = (props: ChipProps) => ( - -); +export type TLC59116Props = ComponentProps & { + footprintVariant?: "tssop_28"; +}; + +/** TLC59116 16-channel constant-current LED driver in the PW package. */ +export const TLC59116 = ({ + footprintVariant: _footprintVariant = "tssop_28", + ...props +}: TLC59116Props) => ; export default TLC59116; diff --git a/lib/chips/TLC59116IPWR.circuit.tsx b/lib/chips/TLC59116IPWR.circuit.tsx new file mode 100644 index 00000000..febb3446 --- /dev/null +++ b/lib/chips/TLC59116IPWR.circuit.tsx @@ -0,0 +1,68 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REXT"], + pin2: ["A0"], + pin3: ["A1"], + pin4: ["A2"], + pin5: ["A3"], + pin6: ["OUT0"], + pin7: ["OUT1"], + pin8: ["OUT2"], + pin9: ["OUT3"], + pin10: ["GND1"], + pin11: ["OUT4"], + pin12: ["OUT5"], + pin13: ["OUT6"], + pin14: ["OUT7"], + pin15: ["OUT8"], + pin16: ["OUT9"], + pin17: ["OUT10"], + pin18: ["OUT11"], + pin19: ["GND2"], + pin20: ["OUT12"], + pin21: ["OUT13"], + pin22: ["OUT14"], + pin23: ["OUT15"], + pin24: ["GND3"], + pin25: ["RESET"], + pin26: ["SCL"], + pin27: ["SDA"], + pin28: ["VCC"], +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, + pin19: { requiresGround: true }, + pin24: { requiresGround: true }, + pin28: { requiresPower: true }, +} as const; + +export const TLC59116IPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC59116IPWR; diff --git a/lib/chips/TLC5916IPWR.circuit.tsx b/lib/chips/TLC5916IPWR.circuit.tsx new file mode 100644 index 00000000..eec434e2 --- /dev/null +++ b/lib/chips/TLC5916IPWR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["SDI"], + pin3: ["CLK"], + pin4: ["pin4"], + pin5: ["OUT0"], + pin6: ["OUT1"], + pin7: ["OUT2"], + pin8: ["OUT3"], + pin9: ["OUT4"], + pin10: ["OUT5"], + pin11: ["OUT6"], + pin12: ["OUT7"], + pin13: ["pin13"], + pin14: ["SDO"], + pin15: ["R_EXT"], + pin16: ["VDD"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const TLC5916IPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC5916IPWR; diff --git a/lib/chips/TLC59283RGER.circuit.tsx b/lib/chips/TLC59283RGER.circuit.tsx new file mode 100644 index 00000000..1677d427 --- /dev/null +++ b/lib/chips/TLC59283RGER.circuit.tsx @@ -0,0 +1,70 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["LAT"], + pin2: ["OUT0"], + pin3: ["OUT1"], + pin4: ["OUT2"], + pin5: ["OUT3"], + pin6: ["OUT4"], + pin7: ["OUT5"], + pin8: ["OUT6"], + pin9: ["OUT7"], + pin10: ["OUT8"], + pin11: ["OUT9"], + pin12: ["OUT10"], + pin13: ["OUT11"], + pin14: ["OUT12"], + pin15: ["OUT13"], + pin16: ["OUT14"], + pin17: ["OUT15"], + pin18: ["BLANK"], + pin19: ["SOUT"], + pin20: ["IREF"], + pin21: ["VCC"], + pin22: ["GND"], + pin23: ["SIN"], + pin24: ["SCLK"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin21: { requiresPower: true }, + pin22: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TLC59283RGER = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC59283RGER; diff --git a/lib/chips/TLC5971PWPR.circuit.tsx b/lib/chips/TLC5971PWPR.circuit.tsx new file mode 100644 index 00000000..c6021a40 --- /dev/null +++ b/lib/chips/TLC5971PWPR.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IREF"], + pin2: ["GND"], + pin3: ["OUTR0"], + pin4: ["OUTG0"], + pin5: ["OUTB0"], + pin6: ["OUTR1"], + pin7: ["OUTG1"], + pin8: ["OUTB1"], + pin9: ["SDTI"], + pin10: ["SCKI"], + pin11: ["SCKO"], + pin12: ["SDTO"], + pin13: ["OUTR2"], + pin14: ["OUTG2"], + pin15: ["OUTB2"], + pin16: ["OUTR3"], + pin17: ["OUTG3"], + pin18: ["OUTB3"], + pin19: ["VCC"], + pin20: ["VREG"], + pin21: ["EPAD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin19: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const TLC5971PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC5971PWPR; diff --git a/lib/chips/TLC6946RGER.circuit.tsx b/lib/chips/TLC6946RGER.circuit.tsx new file mode 100644 index 00000000..0e67372f --- /dev/null +++ b/lib/chips/TLC6946RGER.circuit.tsx @@ -0,0 +1,66 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["LAT"], + pin2: ["OUT0"], + pin3: ["OUT1"], + pin4: ["OUT2"], + pin5: ["OUT3"], + pin6: ["OUT4"], + pin7: ["OUT5"], + pin8: ["OUT6"], + pin9: ["OUT7"], + pin10: ["GND"], + pin11: ["OUT8"], + pin12: ["OUT9"], + pin13: ["OUT10"], + pin14: ["OUT11"], + pin15: ["OUT12"], + pin16: ["OUT13"], + pin17: ["OUT14"], + pin18: ["OUT15"], + pin19: ["SOUT"], + pin20: ["GCLK"], + pin21: ["IREF"], + pin22: ["VCC"], + pin23: ["SIN"], + pin24: ["SCLK"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin10: { requiresGround: true }, + pin22: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TLC6946RGER = (props: ChipProps) => { + return ( + + ); +}; + +export default TLC6946RGER; diff --git a/lib/chips/TLC69624QRSNRQ1.circuit.tsx b/lib/chips/TLC69624QRSNRQ1.circuit.tsx new file mode 100644 index 00000000..bd181ead --- /dev/null +++ b/lib/chips/TLC69624QRSNRQ1.circuit.tsx @@ -0,0 +1,364 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT2", "1"], + pin2: ["OUT3", "2"], + pin3: ["OUT4", "3"], + pin4: ["OUT5", "4"], + pin5: ["OUT6", "5"], + pin6: ["OUT7", "6"], + pin7: ["OUT8", "7"], + pin8: ["OUT9", "8"], + pin9: ["OUT10", "9"], + pin10: ["OUT11", "10"], + pin11: ["SIN", "11"], + pin12: ["CLK_I", "12"], + pin13: ["FAULT", "13"], + pin14: ["SOUT", "14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["OUT12", "16"], + pin17: ["OUT13", "17"], + pin18: ["OUT14", "18"], + pin19: ["OUT15", "19"], + pin20: ["OUT16", "20"], + pin21: ["OUT17", "21"], + pin22: ["OUT18", "22"], + pin23: ["OUT19", "23"], + pin24: ["OUT20", "24"], + pin25: ["OUT21", "25"], + pin26: ["OUT22", "26"], + pin27: ["OUT23", "FB", "27"], + pin28: ["VCC", "28"], + pin29: ["ISET", "29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["OUT0", "31"], + pin32: ["OUT1", "32"], + pin33: ["THERMAL_PAD", "33"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "output", + pin4: "output", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "output", + pin9: "output", + pin10: "output", + pin11: "unknown", + pin12: "control", + pin13: "output", + pin14: "unknown", + pin15: "ground", + pin16: "output", + pin17: "output", + pin18: "output", + pin19: "output", + pin20: "output", + pin21: "output", + pin22: "output", + pin23: "output", + pin24: "output", + pin25: "output", + pin26: "output", + pin27: "output", + pin28: "power", + pin29: "control", + pin30: "ground", + pin31: "output", + pin32: "output", + pin33: "ground", +} as const; + +const pinAttributes = { + pin15: { requiresGround: true }, + pin28: { requiresPower: true }, + pin30: { requiresGround: true }, + pin33: { requiresGround: true }, +} as const; + +export const TLC69624QRSNRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TLC69624QRSNRQ1; diff --git a/lib/chips/TLC69634QRSNRQ1.circuit.tsx b/lib/chips/TLC69634QRSNRQ1.circuit.tsx new file mode 100644 index 00000000..a940c452 --- /dev/null +++ b/lib/chips/TLC69634QRSNRQ1.circuit.tsx @@ -0,0 +1,364 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT2", "1"], + pin2: ["OUT3", "2"], + pin3: ["OUT4", "3"], + pin4: ["OUT5", "4"], + pin5: ["OUT6", "5"], + pin6: ["OUT7", "6"], + pin7: ["OUT8", "7"], + pin8: ["OUT9", "8"], + pin9: ["OUT10", "9"], + pin10: ["OUT11", "10"], + pin11: ["SIN", "11"], + pin12: ["CLK_I", "12"], + pin13: ["FAULT", "13"], + pin14: ["SOUT", "14"], + pin15: ["GND", "15", "GND_15"], + pin16: ["OUT12", "16"], + pin17: ["OUT13", "17"], + pin18: ["OUT14", "18"], + pin19: ["OUT15", "19"], + pin20: ["OUT16", "20"], + pin21: ["OUT17", "21"], + pin22: ["OUT18", "22"], + pin23: ["OUT19", "23"], + pin24: ["OUT20", "24"], + pin25: ["OUT21", "25"], + pin26: ["OUT22", "26"], + pin27: ["OUT23", "FB", "27"], + pin28: ["VCC", "28"], + pin29: ["ISET", "29"], + pin30: ["GND", "30", "GND_30"], + pin31: ["OUT0", "31"], + pin32: ["OUT1", "32"], + pin33: ["THERMAL_PAD", "33"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "output", + pin4: "output", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "output", + pin9: "output", + pin10: "output", + pin11: "unknown", + pin12: "control", + pin13: "output", + pin14: "unknown", + pin15: "ground", + pin16: "output", + pin17: "output", + pin18: "output", + pin19: "output", + pin20: "output", + pin21: "output", + pin22: "output", + pin23: "output", + pin24: "output", + pin25: "output", + pin26: "output", + pin27: "output", + pin28: "power", + pin29: "control", + pin30: "ground", + pin31: "output", + pin32: "output", + pin33: "ground", +} as const; + +const pinAttributes = { + pin15: { requiresGround: true }, + pin28: { requiresPower: true }, + pin30: { requiresGround: true }, + pin33: { requiresGround: true }, +} as const; + +export const TLC69634QRSNRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TLC69634QRSNRQ1; diff --git a/lib/chips/TLC69699DRRR.circuit.tsx b/lib/chips/TLC69699DRRR.circuit.tsx new file mode 100644 index 00000000..a1b284cd --- /dev/null +++ b/lib/chips/TLC69699DRRR.circuit.tsx @@ -0,0 +1,163 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FAULT", "1"], + pin2: ["SDI", "2"], + pin3: ["SCLK", "3"], + pin4: ["SDO", "4"], + pin5: ["CLK_I", "5"], + pin6: ["SIN", "6"], + pin7: ["SOUT", "7"], + pin8: ["CLK_O", "8"], + pin9: ["DRDY", "9"], + pin10: ["CS", "10"], + pin11: ["GND", "11"], + pin12: ["VCC", "12"], + pin13: ["NC3", "13"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "control", + pin4: "output", + pin5: "control", + pin6: "input", + pin7: "output", + pin8: "output", + pin9: "output", + pin10: "control", + pin11: "ground", + pin12: "power", + pin13: "no-connect", +} as const; + +const pinAttributes = { + pin11: { requiresGround: true }, + pin12: { requiresPower: true }, + pin13: { doNotConnect: true }, +} as const; + +export const TLC69699DRRR = (props: ChipProps) => { + // Footprint provenance: TI drawing DRR0012G; official source https://www.ti.com/lit/gpn/TLC69699 pages 22 + return ( + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TLC69699DRRR; diff --git a/lib/chips/TLE2022CDR.circuit.tsx b/lib/chips/TLE2022CDR.circuit.tsx new file mode 100644 index 00000000..34287dc4 --- /dev/null +++ b/lib/chips/TLE2022CDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1OUT"], + pin2: ["1IN_NEG"], + pin3: ["1IN_POS"], + pin4: ["pin4"], + pin5: ["2IN_POS"], + pin6: ["2IN_NEG"], + pin7: ["2OUT"], + pin8: ["VCC_POS"], +} as const; + +export const TLE2022CDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLE2022CDR; diff --git a/lib/chips/TLV1811QDBVRQ1.circuit.tsx b/lib/chips/TLV1811QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..c65a9310 --- /dev/null +++ b/lib/chips/TLV1811QDBVRQ1.circuit.tsx @@ -0,0 +1,33 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT", "1"], + pin2: ["V", "2", "V_2"], + pin3: ["IN", "3", "IN_3"], + pin4: ["IN", "4", "IN_4"], + pin5: ["V", "5", "V_5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "unknown", + pin3: "input", + pin4: "input", + pin5: "unknown", +} as const; + +export const TLV1811QDBVRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363) + return ( + + ); +}; + +export default TLV1811QDBVRQ1; diff --git a/lib/chips/TLV1824DR.circuit.tsx b/lib/chips/TLV1824DR.circuit.tsx new file mode 100644 index 00000000..b88ce2e2 --- /dev/null +++ b/lib/chips/TLV1824DR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT2", "1"], + pin2: ["OUT1", "2"], + pin3: ["V", "3", "V_3"], + pin4: ["IN1", "4", "IN1_4"], + pin5: ["IN1", "5", "IN1_5"], + pin6: ["IN2", "6", "IN2_6"], + pin7: ["IN2", "7", "IN2_7"], + pin8: ["IN3", "8", "IN3_8"], + pin9: ["IN3", "9", "IN3_9"], + pin10: ["IN4", "10", "IN4_10"], + pin11: ["IN4", "11", "IN4_11"], + pin12: ["V", "12", "V_12"], + pin13: ["OUT4", "13"], + pin14: ["OUT3", "14"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "unknown", + pin4: "input", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "input", + pin12: "unknown", + pin13: "output", + pin14: "output", +} as const; + +export const TLV1824DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672) + return ( + + ); +}; + +export default TLV1824DR; diff --git a/lib/chips/TLV1842PWR.circuit.tsx b/lib/chips/TLV1842PWR.circuit.tsx new file mode 100644 index 00000000..269d05f7 --- /dev/null +++ b/lib/chips/TLV1842PWR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN1_NEG"], + pin3: ["IN1_POS"], + pin4: ["V_NEG"], + pin5: ["IN2_POS"], + pin6: ["IN2_NEG"], + pin7: ["OUT2"], + pin8: ["V_POS"], +} as const; + +export const TLV1842PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV1842PWR; diff --git a/lib/chips/TLV3211DCKR.circuit.tsx b/lib/chips/TLV3211DCKR.circuit.tsx new file mode 100644 index 00000000..cd746061 --- /dev/null +++ b/lib/chips/TLV3211DCKR.circuit.tsx @@ -0,0 +1,33 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT", "1"], + pin2: ["V", "2", "V_2"], + pin3: ["IN", "3", "IN_3"], + pin4: ["IN", "4", "IN_4"], + pin5: ["V", "5", "V_5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "unknown", + pin3: "input", + pin4: "input", + pin5: "unknown", +} as const; + +export const TLV3211DCKR = (props: ChipProps) => { + // Footprint provenance: TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350) + return ( + + ); +}; + +export default TLV3211DCKR; diff --git a/lib/chips/TLV3212DGKR.circuit.tsx b/lib/chips/TLV3212DGKR.circuit.tsx new file mode 100644 index 00000000..0d74af46 --- /dev/null +++ b/lib/chips/TLV3212DGKR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1", "1"], + pin2: ["IN1", "2", "IN1_2"], + pin3: ["IN1", "3", "IN1_3"], + pin4: ["V", "4", "V_4"], + pin5: ["IN2", "5", "IN2_5"], + pin6: ["IN2", "6", "IN2_6"], + pin7: ["OUT2", "7"], + pin8: ["V", "8", "V_8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "unknown", + pin5: "input", + pin6: "input", + pin7: "output", + pin8: "unknown", +} as const; + +export const TLV3212DGKR = (props: ChipProps) => { + // Footprint provenance: TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632) + return ( + + ); +}; + +export default TLV3212DGKR; diff --git a/lib/chips/TLV333IDBVR.circuit.tsx b/lib/chips/TLV333IDBVR.circuit.tsx new file mode 100644 index 00000000..18cd4c49 --- /dev/null +++ b/lib/chips/TLV333IDBVR.circuit.tsx @@ -0,0 +1,35 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["pin2"], + pin3: ["IN_POS"], + pin4: ["V_NEG"], + pin5: ["V_POS"], +} as const; + +export const TLV333IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV333IDBVR; diff --git a/lib/chips/TLV3512DGKR.circuit.tsx b/lib/chips/TLV3512DGKR.circuit.tsx new file mode 100644 index 00000000..b5ae26bc --- /dev/null +++ b/lib/chips/TLV3512DGKR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1_P", "1"], + pin2: ["IN1_N", "2"], + pin3: ["IN2_N", "3"], + pin4: ["IN2_P", "4"], + pin7: ["OUT1", "7"], + pin6: ["OUT2", "6"], + pin5: ["V_N", "5"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "input", + pin4: "input", + pin7: "output", + pin6: "output", + pin5: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin5: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const TLV3512DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV3512DGKR; diff --git a/lib/chips/TLV3691IDCKT.circuit.tsx b/lib/chips/TLV3691IDCKT.circuit.tsx new file mode 100644 index 00000000..6eb33190 --- /dev/null +++ b/lib/chips/TLV3691IDCKT.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_POS"], + pin2: ["GND"], + pin3: ["IN_NEG"], + pin4: ["OUT"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TLV3691IDCKT = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV3691IDCKT; diff --git a/lib/chips/TLV369IDCKR.circuit.tsx b/lib/chips/TLV369IDCKR.circuit.tsx new file mode 100644 index 00000000..2b35ea9e --- /dev/null +++ b/lib/chips/TLV369IDCKR.circuit.tsx @@ -0,0 +1,33 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN", "1", "IN_1"], + pin2: ["V", "2", "V_2"], + pin3: ["IN", "3", "IN_3"], + pin4: ["OUT", "4"], + pin5: ["V", "5", "V_5"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "unknown", + pin3: "input", + pin4: "output", + pin5: "unknown", +} as const; + +export const TLV369IDCKR = (props: ChipProps) => { + // Footprint provenance: TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350) + return ( + + ); +}; + +export default TLV369IDCKR; diff --git a/lib/chips/TLV376IDBVR.circuit.tsx b/lib/chips/TLV376IDBVR.circuit.tsx new file mode 100644 index 00000000..04cc0ec8 --- /dev/null +++ b/lib/chips/TLV376IDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["Out"], + pin2: ["pin2"], + pin3: ["In_P"], + pin4: ["pin4"], + pin5: ["V_POS"], +} as const; + +export const TLV376IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV376IDBVR; diff --git a/lib/chips/TLV431AIDBVR.circuit.tsx b/lib/chips/TLV431AIDBVR.circuit.tsx new file mode 100644 index 00000000..95706610 --- /dev/null +++ b/lib/chips/TLV431AIDBVR.circuit.tsx @@ -0,0 +1,150 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["pin2"], + pin3: ["CATHODE"], + pin4: ["REF"], + pin5: ["ANODE"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, +} as const; + +export const TLV431AIDBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C77588.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C77588.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default TLV431AIDBVR; diff --git a/lib/chips/TLV431BQDBZR.circuit.tsx b/lib/chips/TLV431BQDBZR.circuit.tsx new file mode 100644 index 00000000..3fb10ff0 --- /dev/null +++ b/lib/chips/TLV431BQDBZR.circuit.tsx @@ -0,0 +1,37 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REF"], + pin2: ["CATHODE"], + pin3: ["ANODE"], +} as const; + +export const TLV431BQDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV431BQDBZR; diff --git a/lib/chips/TLV61047DDCR.circuit.tsx b/lib/chips/TLV61047DDCR.circuit.tsx new file mode 100644 index 00000000..b7f879c9 --- /dev/null +++ b/lib/chips/TLV61047DDCR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SW", "1"], + pin2: ["GND", "2"], + pin3: ["FB", "3"], + pin4: ["EN", "4"], + pin5: ["VIN", "5"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "ground", + pin3: "input", + pin4: "control", + pin5: "power", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TLV61047DDCR = (props: ChipProps) => { + // Footprint provenance: TI drawing DDC0005A; donor TPS78233DDCR (JLCPCB C14878) + return ( + + ); +}; + +export default TLV61047DDCR; diff --git a/lib/chips/TLV7031DBVR.circuit.tsx b/lib/chips/TLV7031DBVR.circuit.tsx new file mode 100644 index 00000000..58204297 --- /dev/null +++ b/lib/chips/TLV7031DBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["VEE"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, +} as const; + +export const TLV7031DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV7031DBVR; diff --git a/lib/chips/TLV7042DGKR.circuit.tsx b/lib/chips/TLV7042DGKR.circuit.tsx new file mode 100644 index 00000000..5c18af31 --- /dev/null +++ b/lib/chips/TLV7042DGKR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["INA_N", "2"], + pin3: ["INA_P", "3"], + pin6: ["INB_N", "6"], + pin5: ["INB_P", "5"], + pin1: ["OUTA", "1"], + pin7: ["OUTB", "7"], + pin4: ["VEE", "4"], + pin8: ["VCC", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const TLV7042DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV7042DGKR; diff --git a/lib/chips/TLV70450DBVR.circuit.tsx b/lib/chips/TLV70450DBVR.circuit.tsx new file mode 100644 index 00000000..378c2fa6 --- /dev/null +++ b/lib/chips/TLV70450DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["IN"], + pin3: ["OUT"], + pin4: ["NC2"], + pin5: ["NC1"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin5: { doNotConnect: true }, +} as const; + +export const TLV70450DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV70450DBVR; diff --git a/lib/chips/TLV709A33DBVR.circuit.tsx b/lib/chips/TLV709A33DBVR.circuit.tsx new file mode 100644 index 00000000..bf11f0ce --- /dev/null +++ b/lib/chips/TLV709A33DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["NC"], + pin4: ["FB"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { doNotConnect: true }, +} as const; + +export const TLV709A33DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV709A33DBVR; diff --git a/lib/chips/TLV74218PDQNR.circuit.tsx b/lib/chips/TLV74218PDQNR.circuit.tsx new file mode 100644 index 00000000..9603cb5e --- /dev/null +++ b/lib/chips/TLV74218PDQNR.circuit.tsx @@ -0,0 +1,152 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["IN"], + pin5: ["PAD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TLV74218PDQNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C485140.obj?uuid=3dd4f44ed68f41e5809638063ba33d50", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C485140.step?uuid=3dd4f44ed68f41e5809638063ba33d50", + pcbRotationOffset: 180, + modelOriginPosition: { x: 0.000063500000123895, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TLV74218PDQNR; diff --git a/lib/chips/TLV75533PDBVR.circuit.tsx b/lib/chips/TLV75533PDBVR.circuit.tsx index 5a4a8e7d..4513f9f9 100644 --- a/lib/chips/TLV75533PDBVR.circuit.tsx +++ b/lib/chips/TLV75533PDBVR.circuit.tsx @@ -1,5 +1,6 @@ import type { ChipProps } from "@tscircuit/props"; import "tscircuit"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: "IN", @@ -12,27 +13,11 @@ const pinLabels = { /** TLV755P 3.3 V fixed-output regulator in the 5-pin SOT-23 package. */ export const TLV75533PDBVR = (props: ChipProps) => ( ); diff --git a/lib/chips/TLV75801PDBVR.circuit.tsx b/lib/chips/TLV75801PDBVR.circuit.tsx new file mode 100644 index 00000000..635a2a6c --- /dev/null +++ b/lib/chips/TLV75801PDBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["FB"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TLV75801PDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV75801PDBVR; diff --git a/lib/chips/TLV76133KVUR.circuit.tsx b/lib/chips/TLV76133KVUR.circuit.tsx new file mode 100644 index 00000000..e9a8321d --- /dev/null +++ b/lib/chips/TLV76133KVUR.circuit.tsx @@ -0,0 +1,93 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["OUT"], + pin3: ["IN"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const TLV76133KVUR = (props: ChipProps) => { + return ( + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C41835077.obj?uuid=9aa7a0eadfaa4b8eac48494dee2e6800", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C41835077.step?uuid=9aa7a0eadfaa4b8eac48494dee2e6800", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.9000254999999244, + y: 0.00012700000002041634, + z: -0.05, + }, + }} + {...props} + /> + ); +}; + +export default TLV76133KVUR; diff --git a/lib/chips/TLV77133PDBVR.circuit.tsx b/lib/chips/TLV77133PDBVR.circuit.tsx new file mode 100644 index 00000000..070bf67f --- /dev/null +++ b/lib/chips/TLV77133PDBVR.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["pin4"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TLV77133PDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV77133PDBVR; diff --git a/lib/chips/TLV77330PDBVR.circuit.tsx b/lib/chips/TLV77330PDBVR.circuit.tsx new file mode 100644 index 00000000..6fde89ff --- /dev/null +++ b/lib/chips/TLV77330PDBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["pin4"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TLV77330PDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV77330PDBVR; diff --git a/lib/chips/TLV803EA30DBZR.circuit.tsx b/lib/chips/TLV803EA30DBZR.circuit.tsx new file mode 100644 index 00000000..f61b2e1d --- /dev/null +++ b/lib/chips/TLV803EA30DBZR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["RESET"], + pin3: ["VDD"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TLV803EA30DBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV803EA30DBZR; diff --git a/lib/chips/TLV803SDBZR.circuit.tsx b/lib/chips/TLV803SDBZR.circuit.tsx new file mode 100644 index 00000000..d73c3be5 --- /dev/null +++ b/lib/chips/TLV803SDBZR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["RESET"], + pin3: ["VDD"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TLV803SDBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV803SDBZR; diff --git a/lib/chips/TLV8802DGKR.circuit.tsx b/lib/chips/TLV8802DGKR.circuit.tsx new file mode 100644 index 00000000..2172ee5b --- /dev/null +++ b/lib/chips/TLV8802DGKR.circuit.tsx @@ -0,0 +1,63 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT_A", "1"], + pin2: ["IN_A", "2", "IN_A_2"], + pin3: ["IN_A", "3", "IN_A_3"], + pin4: ["V_N", "4"], + pin5: ["IN_B", "5", "IN_B_5"], + pin6: ["IN_B", "6", "IN_B_6"], + pin7: ["OUT_B", "7"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "input", + pin4: "power", + pin5: "input", + pin6: "input", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const TLV8802DGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV8802DGKR; diff --git a/lib/chips/TLV9001IDBVR.circuit.tsx b/lib/chips/TLV9001IDBVR.circuit.tsx new file mode 100644 index 00000000..790c87b8 --- /dev/null +++ b/lib/chips/TLV9001IDBVR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["V_NEG"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["V_POS"], +} as const; + +export const TLV9001IDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9001IDBVR; diff --git a/lib/chips/TLV9002IDSGR.circuit.tsx b/lib/chips/TLV9002IDSGR.circuit.tsx new file mode 100644 index 00000000..09ba1eb8 --- /dev/null +++ b/lib/chips/TLV9002IDSGR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], + pin9: ["THERMAL_PAD", "9"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TLV9002IDSGR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9002IDSGR; diff --git a/lib/chips/TLV9022L1RUGR.circuit.tsx b/lib/chips/TLV9022L1RUGR.circuit.tsx new file mode 100644 index 00000000..7ba85ec9 --- /dev/null +++ b/lib/chips/TLV9022L1RUGR.circuit.tsx @@ -0,0 +1,126 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["V", "1", "V_1"], + pin2: ["CLR_A", "2"], + pin3: ["CLR_B", "3"], + pin4: ["IN_B", "4", "IN_B_4"], + pin5: ["IN_B", "5", "IN_B_5"], + pin6: ["V", "6", "V_6"], + pin7: ["OUT_B", "7"], + pin8: ["OUT_A", "8"], + pin9: ["IN_A", "9", "IN_A_9"], + pin10: ["IN_A", "10", "IN_A_10"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "unknown", + pin7: "output", + pin8: "output", + pin9: "input", + pin10: "input", +} as const; + +export const TLV9022L1RUGR = (props: ChipProps) => { + // Footprint provenance: TI drawing RUG0010B; official source https://www.ti.com/lit/gpn/TLV9022L pages 35 + return ( + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TLV9022L1RUGR; diff --git a/lib/chips/TLV9061IDPWR.circuit.tsx b/lib/chips/TLV9061IDPWR.circuit.tsx new file mode 100644 index 00000000..7dd133fa --- /dev/null +++ b/lib/chips/TLV9061IDPWR.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["IN_NEG"], + pin3: ["V_NEG"], + pin4: ["IN_POS"], + pin5: ["V_POS"], +} as const; + +export const TLV9061IDPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2057878.obj?uuid=b82996bac206484b8ab1222e0df3dbf6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2057878.step?uuid=b82996bac206484b8ab1222e0df3dbf6", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000025400000026820635, + y: 0.00003810000009707437, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default TLV9061IDPWR; diff --git a/lib/chips/TLV9062IDR.circuit.tsx b/lib/chips/TLV9062IDR.circuit.tsx new file mode 100644 index 00000000..2639975c --- /dev/null +++ b/lib/chips/TLV9062IDR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin4: ["V_N", "4"], + pin8: ["V_P", "8"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin1: "output", + pin7: "output", + pin4: "power", + pin8: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +export const TLV9062IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9062IDR; diff --git a/lib/chips/TLV9064IDR.circuit.tsx b/lib/chips/TLV9064IDR.circuit.tsx new file mode 100644 index 00000000..6a84ab77 --- /dev/null +++ b/lib/chips/TLV9064IDR.circuit.tsx @@ -0,0 +1,75 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN1_N", "2"], + pin3: ["IN1_P", "3"], + pin6: ["IN2_N", "6"], + pin5: ["IN2_P", "5"], + pin9: ["IN3_N", "9"], + pin10: ["IN3_P", "10"], + pin13: ["IN4_N", "13"], + pin12: ["IN4_P", "12"], + pin1: ["OUT1", "1"], + pin7: ["OUT2", "7"], + pin8: ["OUT3", "8"], + pin14: ["OUT4", "14"], + pin11: ["V_N", "11"], + pin4: ["V_P", "4"], +} as const; + +const pinRoles = { + pin2: "input", + pin3: "input", + pin6: "input", + pin5: "input", + pin9: "input", + pin10: "input", + pin13: "input", + pin12: "input", + pin1: "output", + pin7: "output", + pin8: "output", + pin14: "output", + pin11: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin11: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const TLV9064IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9064IDR; diff --git a/lib/chips/TLV9102IDR.circuit.tsx b/lib/chips/TLV9102IDR.circuit.tsx new file mode 100644 index 00000000..8cfdba6a --- /dev/null +++ b/lib/chips/TLV9102IDR.circuit.tsx @@ -0,0 +1,38 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN1_NEG"], + pin3: ["IN1_POS"], + pin4: ["V_NEG"], + pin5: ["IN2_POS"], + pin6: ["IN2_NEG"], + pin7: ["OUT2"], + pin8: ["V_POS"], +} as const; + +export const TLV9102IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9102IDR; diff --git a/lib/chips/TLV9152IDR.circuit.tsx b/lib/chips/TLV9152IDR.circuit.tsx new file mode 100644 index 00000000..1f6cf420 --- /dev/null +++ b/lib/chips/TLV9152IDR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["IN_A", "3", "IN_A_3"], + pin5: ["IN_B", "5", "IN_B_5"], + pin2: ["IN_A", "2", "IN_A_2"], + pin6: ["IN_B", "6", "IN_B_6"], + pin1: ["OUT_A", "1"], + pin7: ["OUT_B", "7"], + pin8: ["V_P", "8"], + pin4: ["V_N", "4"], +} as const; + +const pinRoles = { + pin3: "input", + pin5: "input", + pin2: "input", + pin6: "input", + pin1: "output", + pin7: "output", + pin8: "power", + pin4: "power", +} as const; + +const pinAttributes = { + pin8: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, +} as const; + +export const TLV9152IDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9152IDR; diff --git a/lib/chips/TLV9301IDCKR.circuit.tsx b/lib/chips/TLV9301IDCKR.circuit.tsx new file mode 100644 index 00000000..8d8ed6ee --- /dev/null +++ b/lib/chips/TLV9301IDCKR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_POS"], + pin2: ["V_NEG"], + pin3: ["IN_NEG"], + pin4: ["OUT"], + pin5: ["V_POS"], +} as const; + +export const TLV9301IDCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TLV9301IDCKR; diff --git a/lib/chips/TLVH431AQDBVT.circuit.tsx b/lib/chips/TLVH431AQDBVT.circuit.tsx new file mode 100644 index 00000000..1197a329 --- /dev/null +++ b/lib/chips/TLVH431AQDBVT.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["pin2"], + pin3: ["CATHODE"], + pin4: ["REF"], + pin5: ["ANODE"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, +} as const; + +export const TLVH431AQDBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default TLVH431AQDBVT; diff --git a/lib/chips/TLVH432QDBZR.circuit.tsx b/lib/chips/TLVH432QDBZR.circuit.tsx new file mode 100644 index 00000000..4471753f --- /dev/null +++ b/lib/chips/TLVH432QDBZR.circuit.tsx @@ -0,0 +1,96 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["K"], + pin2: ["R"], + pin3: ["A"], +} as const; + +export const TLVH432QDBZR = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877917.obj?uuid=ecf36202acc44529a8be5ff7d3195643", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877917.step?uuid=ecf36202acc44529a8be5ff7d3195643", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0.000012700000070253736, z: -0.413 }, + }} + {...props} + /> + ); +}; + +export default TLVH432QDBZR; diff --git a/lib/chips/TLVM23625RDNR.circuit.tsx b/lib/chips/TLVM23625RDNR.circuit.tsx new file mode 100644 index 00000000..dce2a11e --- /dev/null +++ b/lib/chips/TLVM23625RDNR.circuit.tsx @@ -0,0 +1,181 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGOOD"], + pin2: ["EN"], + pin3: ["VIN"], + pin4: ["VOUT"], + pin5: ["SW2"], + pin6: ["SW1"], + pin7: ["BOOT"], + pin8: ["VCC"], + pin9: ["FB"], + pin10: ["GND"], + pin11: ["RT"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin8: { requiresPower: true }, + pin10: { requiresGround: true }, +} as const; + +export const TLVM23625RDNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7588165.obj?uuid=fe15034557584e3a96568248003fea5b", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7588165.step?uuid=fe15034557584e3a96568248003fea5b", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012699999956566899, + y: 0.26304710000011977, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TLVM23625RDNR; diff --git a/lib/chips/TM4C123FH6PMT7.circuit.tsx b/lib/chips/TM4C123FH6PMT7.circuit.tsx new file mode 100644 index 00000000..e6b23eb4 --- /dev/null +++ b/lib/chips/TM4C123FH6PMT7.circuit.tsx @@ -0,0 +1,773 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PB6"], + pin2: ["VDDA"], + pin3: ["GNDA"], + pin4: ["PB7"], + pin5: ["PF4"], + pin6: ["PE3"], + pin7: ["PE2"], + pin8: ["PE1"], + pin9: ["PE0"], + pin10: ["PD7"], + pin11: ["VDD1"], + pin12: ["GND1"], + pin13: ["PC7"], + pin14: ["PC6"], + pin15: ["PC5"], + pin16: ["PC4"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["PA6"], + pin24: ["PA7"], + pin25: ["VDDC1"], + pin26: ["VDD2"], + pin27: ["GND2"], + pin28: ["PF0"], + pin29: ["PF1"], + pin30: ["PF2"], + pin31: ["PF3"], + pin32: ["PG5"], + pin33: ["PG4"], + pin34: ["PG3"], + pin35: ["PG2"], + pin36: ["PG1"], + pin37: ["PG0"], + pin38: ["RST"], + pin39: ["GND3"], + pin40: ["OSC0"], + pin41: ["OSC1"], + pin42: ["VDD3"], + pin43: ["PD4"], + pin44: ["PD5"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["PD6"], + pin54: ["VDD4"], + pin55: ["GND4"], + pin56: ["VDDC2"], + pin57: ["PB5"], + pin58: ["PB4"], + pin59: ["PE4"], + pin60: ["PE5"], + pin61: ["PD0"], + pin62: ["PD1"], + pin63: ["PD2"], + pin64: ["PD3"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin26: { requiresPower: true }, + pin27: { requiresGround: true }, + pin39: { requiresGround: true }, + pin42: { requiresPower: true }, + pin54: { requiresPower: true }, + pin55: { requiresGround: true }, +} as const; + +export const TM4C123FH6PMT7 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1343273.obj?uuid=7e9b9111dcfd48d3add0eab11d882721", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1343273.step?uuid=7e9b9111dcfd48d3add0eab11d882721", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.011810999999994465, z: 0.000795 }, + }} + {...props} + /> + ); +}; + +export default TM4C123FH6PMT7; diff --git a/lib/chips/TM4C123GH6PGEIR.circuit.tsx b/lib/chips/TM4C123GH6PGEIR.circuit.tsx new file mode 100644 index 00000000..9a5ff34a --- /dev/null +++ b/lib/chips/TM4C123GH6PGEIR.circuit.tsx @@ -0,0 +1,203 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PD0"], + pin2: ["PD1"], + pin3: ["PD2"], + pin4: ["PD3"], + pin5: ["VDD1"], + pin6: ["GND1"], + pin7: ["VDDA"], + pin8: ["VREFA_POS"], + pin9: ["VREFA_NEG"], + pin10: ["GNDA"], + pin11: ["PP2"], + pin12: ["PE3"], + pin13: ["PE2"], + pin14: ["PE1"], + pin15: ["PE0"], + pin16: ["PK0"], + pin17: ["PK1"], + pin18: ["PK2"], + pin19: ["PK3"], + pin20: ["PN2"], + pin21: ["PH7"], + pin22: ["PH6"], + pin23: ["PH5"], + pin24: ["VDD2"], + pin25: ["GND2"], + pin26: ["PH4"], + pin27: ["PH3"], + pin28: ["PH2"], + pin29: ["VDD3"], + pin30: ["GND3"], + pin31: ["PH1"], + pin32: ["PH0"], + pin33: ["PC7"], + pin34: ["PC6"], + pin35: ["PC5"], + pin36: ["PC4"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["VDD4"], + pin44: ["GND4"], + pin45: ["PA6"], + pin46: ["PA7"], + pin47: ["PG7"], + pin48: ["PG6"], + pin49: ["VDDC1"], + pin50: ["PG5"], + pin51: ["PG4"], + pin52: ["PG3"], + pin53: ["PG2"], + pin54: ["PG1"], + pin55: ["PG0"], + pin56: ["VDD5"], + pin57: ["GND5"], + pin58: ["PF7"], + pin59: ["PF6"], + pin60: ["PF5"], + pin61: ["PF4"], + pin62: ["PF0"], + pin63: ["PF1"], + pin64: ["PF2"], + pin65: ["PF3"], + pin66: ["VDD6"], + pin67: ["GND6"], + pin68: ["PN7"], + pin69: ["PN6"], + pin70: ["PN5"], + pin71: ["PN4"], + pin72: ["WAKE"], + pin73: ["HIB"], + pin74: ["XOSC0"], + pin75: ["GNDX"], + pin76: ["XOSC1"], + pin77: ["VBAT"], + pin78: ["VDD7"], + pin79: ["GND7"], + pin80: ["PN1"], + pin81: ["PN0"], + pin82: ["PM7"], + pin83: ["PM6"], + pin84: ["PM5"], + pin85: ["PM4"], + pin86: ["PM3"], + pin87: ["PM2"], + pin88: ["PM1"], + pin89: ["PM0"], + pin90: ["RST"], + pin91: ["GND8"], + pin92: ["OSC0"], + pin93: ["OSC1"], + pin94: ["VDD8"], + pin95: ["PL7"], + pin96: ["PL6"], + pin97: ["pin97"], + pin98: ["pin98"], + pin99: ["pin99"], + pin100: ["pin100"], + pin101: ["VDD9"], + pin102: ["GND9"], + pin103: ["PL5"], + pin104: ["PL4"], + pin105: ["PL3"], + pin106: ["PL2"], + pin107: ["PL1"], + pin108: ["PL0"], + pin109: ["PK7"], + pin110: ["PK6"], + pin111: ["PK5"], + pin112: ["PK4"], + pin113: ["VDD10"], + pin114: ["GND10"], + pin115: ["pin115"], + pin116: ["pin116"], + pin117: ["pin117"], + pin118: ["pin118"], + pin119: ["PN3"], + pin120: ["PJ0"], + pin121: ["PJ1"], + pin122: ["PJ2"], + pin123: ["PJ3"], + pin124: ["VDD11"], + pin125: ["GND11"], + pin126: ["VDDC2"], + pin127: ["PJ4"], + pin128: ["PJ5"], + pin129: ["PJ6"], + pin130: ["PJ7"], + pin131: ["PP0"], + pin132: ["PP1"], + pin133: ["PE6"], + pin134: ["PE7"], + pin135: ["PB5"], + pin136: ["PB4"], + pin137: ["VDD12"], + pin138: ["GND12"], + pin139: ["PE4"], + pin140: ["PE5"], + pin141: ["PD4"], + pin142: ["PD5"], + pin143: ["PD6"], + pin144: ["PD7"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, + pin7: { requiresPower: true }, + pin24: { requiresPower: true }, + pin25: { requiresGround: true }, + pin29: { requiresPower: true }, + pin30: { requiresGround: true }, + pin43: { requiresPower: true }, + pin44: { requiresGround: true }, + pin56: { requiresPower: true }, + pin57: { requiresGround: true }, + pin66: { requiresPower: true }, + pin67: { requiresGround: true }, + pin78: { requiresPower: true }, + pin79: { requiresGround: true }, + pin91: { requiresGround: true }, + pin94: { requiresPower: true }, + pin101: { requiresPower: true }, + pin102: { requiresGround: true }, + pin113: { requiresPower: true }, + pin114: { requiresGround: true }, + pin124: { requiresPower: true }, + pin125: { requiresGround: true }, + pin137: { requiresPower: true }, + pin138: { requiresGround: true }, +} as const; + +export const TM4C123GH6PGEIR = (props: ChipProps) => { + return ( + + ); +}; + +export default TM4C123GH6PGEIR; diff --git a/lib/chips/TM4C123GH6PMI7.circuit.tsx b/lib/chips/TM4C123GH6PMI7.circuit.tsx new file mode 100644 index 00000000..8f214da0 --- /dev/null +++ b/lib/chips/TM4C123GH6PMI7.circuit.tsx @@ -0,0 +1,773 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PB6"], + pin2: ["VDDA"], + pin3: ["GNDA"], + pin4: ["PB7"], + pin5: ["PF4"], + pin6: ["PE3"], + pin7: ["PE2"], + pin8: ["PE1"], + pin9: ["PE0"], + pin10: ["PD7"], + pin11: ["VDD1"], + pin12: ["GND1"], + pin13: ["PC7"], + pin14: ["PC6"], + pin15: ["PC5"], + pin16: ["PC4"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["PA6"], + pin24: ["PA7"], + pin25: ["VDDC1"], + pin26: ["VDD2"], + pin27: ["GND2"], + pin28: ["PF0"], + pin29: ["PF1"], + pin30: ["PF2"], + pin31: ["PF3"], + pin32: ["WAKE"], + pin33: ["HIB"], + pin34: ["XOSC0"], + pin35: ["GNDX"], + pin36: ["XOSC1"], + pin37: ["VBAT"], + pin38: ["RST"], + pin39: ["GND3"], + pin40: ["OSC0"], + pin41: ["OSC1"], + pin42: ["VDD3"], + pin43: ["PD4"], + pin44: ["PD5"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["PD6"], + pin54: ["VDD4"], + pin55: ["GND4"], + pin56: ["VDDC2"], + pin57: ["PB5"], + pin58: ["PB4"], + pin59: ["PE4"], + pin60: ["PE5"], + pin61: ["PD0"], + pin62: ["PD1"], + pin63: ["PD2"], + pin64: ["PD3"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin26: { requiresPower: true }, + pin27: { requiresGround: true }, + pin39: { requiresGround: true }, + pin42: { requiresPower: true }, + pin54: { requiresPower: true }, + pin55: { requiresGround: true }, +} as const; + +export const TM4C123GH6PMI7 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544751.obj?uuid=7e9b9111dcfd48d3add0eab11d882721", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C544751.step?uuid=7e9b9111dcfd48d3add0eab11d882721", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.011810999999994465, z: 0.000795 }, + }} + {...props} + /> + ); +}; + +export default TM4C123GH6PMI7; diff --git a/lib/chips/TM4C123GH6PZT7.circuit.tsx b/lib/chips/TM4C123GH6PZT7.circuit.tsx new file mode 100644 index 00000000..0a5cbc73 --- /dev/null +++ b/lib/chips/TM4C123GH6PZT7.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PD0"], + pin2: ["PD1"], + pin3: ["PD2"], + pin4: ["PD3"], + pin5: ["VDD8"], + pin6: ["GND8"], + pin7: ["VDDA"], + pin8: ["VREFA_POS"], + pin9: ["VREFA_NEG"], + pin10: ["GNDA"], + pin11: ["PJ2"], + pin12: ["PE3"], + pin13: ["PE2"], + pin14: ["PE1"], + pin15: ["PE0"], + pin16: ["PH0"], + pin17: ["PH1"], + pin18: ["PH2"], + pin19: ["PH3"], + pin20: ["VDD7"], + pin21: ["GND7"], + pin22: ["PC7"], + pin23: ["PC6"], + pin24: ["PC5"], + pin25: ["PC4"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["VDD6"], + pin33: ["GND6"], + pin34: ["PA6"], + pin35: ["PA7"], + pin36: ["PF6"], + pin37: ["PF5"], + pin38: ["VDDC2"], + pin39: ["PF4"], + pin40: ["PF0"], + pin41: ["PF1"], + pin42: ["PF2"], + pin43: ["PF3"], + pin44: ["VDD5"], + pin45: ["GND5"], + pin46: ["PK3"], + pin47: ["PK2"], + pin48: ["PK1"], + pin49: ["PK0"], + pin50: ["WAKE"], + pin51: ["HIB"], + pin52: ["XOSC0"], + pin53: ["GNDX"], + pin54: ["XOSC1"], + pin55: ["VBAT"], + pin56: ["VDD4"], + pin57: ["GND4"], + pin58: ["PF7"], + pin59: ["PG3"], + pin60: ["PG2"], + pin61: ["PG1"], + pin62: ["PG0"], + pin63: ["RST"], + pin64: ["GND3"], + pin65: ["OSC0"], + pin66: ["OSC1"], + pin67: ["VDD3"], + pin68: ["PJ0"], + pin69: ["PJ1"], + pin70: ["pin70"], + pin71: ["pin71"], + pin72: ["pin72"], + pin73: ["pin73"], + pin74: ["PG4"], + pin75: ["PG5"], + pin76: ["PH7"], + pin77: ["PH6"], + pin78: ["PH5"], + pin79: ["PH4"], + pin80: ["VDD2"], + pin81: ["GND2"], + pin82: ["pin82"], + pin83: ["pin83"], + pin84: ["pin84"], + pin85: ["pin85"], + pin86: ["VDDC1"], + pin87: ["PG6"], + pin88: ["PG7"], + pin89: ["PE6"], + pin90: ["PE7"], + pin91: ["PB5"], + pin92: ["PB4"], + pin93: ["VDD1"], + pin94: ["GND1"], + pin95: ["PE4"], + pin96: ["PE5"], + pin97: ["PD4"], + pin98: ["PD5"], + pin99: ["PD6"], + pin100: ["PD7"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, + pin7: { requiresPower: true }, + pin20: { requiresPower: true }, + pin21: { requiresGround: true }, + pin32: { requiresPower: true }, + pin33: { requiresGround: true }, + pin44: { requiresPower: true }, + pin45: { requiresGround: true }, + pin56: { requiresPower: true }, + pin57: { requiresGround: true }, + pin64: { requiresGround: true }, + pin67: { requiresPower: true }, + pin80: { requiresPower: true }, + pin81: { requiresGround: true }, + pin93: { requiresPower: true }, + pin94: { requiresGround: true }, +} as const; + +export const TM4C123GH6PZT7 = (props: ChipProps) => { + return ( + + ); +}; + +export default TM4C123GH6PZT7; diff --git a/lib/chips/TM4C123GH6ZXRI7.circuit.tsx b/lib/chips/TM4C123GH6ZXRI7.circuit.tsx new file mode 100644 index 00000000..49f9cf11 --- /dev/null +++ b/lib/chips/TM4C123GH6ZXRI7.circuit.tsx @@ -0,0 +1,1740 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PD5_AIN6_U6Tx_WT4CCP1", "A1"], + pin2: ["PD4_AIN7_U6Rx_WT4CCP0", "A2"], + pin3: ["PE5_AIN8_CAN0Tx_I2C2SDA_M0PWM5_M1PWM3_U5Tx", "A3"], + pin4: ["PB4_AIN10_CAN0Rx_M0PWM2_SSI2Clk_T1CCP0", "A4"], + pin5: ["PN0_AIN23_CAN0Rx", "A5"], + pin6: ["PJ4_C2_T3CCP0_U6Rx", "A6"], + pin7: ["PP6_M0PWM6_WT1CCP0", "A7"], + pin8: ["PJ1_T1CCP1_U4Tx", "A8"], + pin9: ["PN3_M0PWM7_WT2CCP1", "A9"], + pin10: ["GND", "A10", "GND_A10"], + pin11: ["PK4_C0o_M0FAULT0_RTCCLK_U7Rx", "A11"], + pin12: ["PK6_C2o_M0FAULT2_WT1CCP0", "A12"], + pin13: ["PL0_T0CCP0_WT0CCP0", "A13"], + pin14: ["PD0_AIN15_I2C3SCL_M0PWM6_M1PWM0_SSI1Clk_SSI3Clk_WT2CCP0", "B1"], + pin15: ["PE4_AIN9_CAN0Rx_I2C2SCL_M0PWM4_M1PWM2_U5Rx", "B3"], + pin16: ["PB5_AIN11_CAN0Tx_M0PWM3_SSI2Fss_T1CCP1", "B4"], + pin17: ["PN1_AIN22_CAN0Tx", "B5"], + pin18: ["PJ5_C2_T3CCP1_U6Tx", "B6"], + pin19: ["NC", "B7"], + pin20: ["PJ2_IDX0_T2CCP0_U5Rx", "B8"], + pin21: ["PC0_SWCLK_T4CCP0_TCK", "B9"], + pin22: ["PC2_T5CCP0_TDI", "B10"], + pin23: ["PK5_C1o_M0FAULT1_U7Tx", "B11"], + pin24: ["PK7_M0FAULT3_WT1CCP1", "B12"], + pin25: ["PL2_T1CCP0_WT1CCP0", "B13"], + pin26: ["PD1_AIN14_I2C3SDA_M0PWM7_M1PWM1_SSI1Fss_SSI3Fss_WT2CCP1", "C1"], + pin27: ["PD7_AIN4_M0FAULT1_NMI_PhB0_U2Tx_WT5CCP1", "C2"], + pin28: ["PD6_AIN5_M0FAULT0_PhA0_U2Rx_WT5CCP0", "C3"], + pin29: ["PE7_AIN20_CAN1Tx_U1RI", "C4"], + pin30: ["PE6_AIN21_CAN1Rx", "C5"], + pin31: ["PJ7", "C6"], + pin32: ["PJ6", "C7"], + pin33: ["PJ3_T2CCP1_U5Tx", "C8"], + pin34: ["PC1_SWDIO_T4CCP1_TMS", "C9"], + pin35: ["PC3_SWO_T5CCP1_TDO", "C10"], + pin36: ["PL1_T0CCP1_WT0CCP1", "C11"], + pin37: ["PL4_T2CCP0_WT2CCP0", "C12"], + pin38: ["PL5_T2CCP1_WT2CCP1", "C13"], + pin39: ["PQ1_M1PWM1_WT2CCP1", "D1"], + pin40: ["PQ0_M1PWM0_WT2CCP0", "D2"], + pin41: ["PD2_AIN13_M0FAULT0_SSI1Rx_SSI3Rx_USB0EPEN_WT3CCP0", "D3"], + pin42: ["PD3_AIN12_IDX0_SSI1Tx_SSI3Tx_USB0PFLT_WT3CCP1", "D4"], + pin43: ["GND", "D5", "GND_D5"], + pin44: ["GND", "D6", "GND_D6"], + pin45: ["VDDC", "D7", "VDDC_D7"], + pin46: ["PJ0_T1CCP0_U4Rx", "D8"], + pin47: ["GND", "D9", "GND_D9"], + pin48: ["PL3_T1CCP1_WT1CCP1", "D10"], + pin49: ["PB1_T2CCP1_U1Tx_USB0VBUS", "D11"], + pin50: ["PB3_I2C0SDA_T3CCP1", "D12"], + pin51: ["PB2_I2C0SCL_T3CCP0", "D13"], + pin52: ["VREFA_P", "E1"], + pin53: ["VREFA_N", "E2"], + pin54: ["PB6_I2C5SCL_M0PWM0_SSI2Rx_T0CCP0", "E3"], + pin55: ["PB7_I2C5SDA_M0PWM1_SSI2Tx_T0CCP1", "E4"], + pin56: ["GND", "E5", "GND_E5"], + pin57: ["VDD", "E6", "VDD_E6"], + pin58: ["VDD", "E7", "VDD_E7"], + pin59: ["GND", "E8", "GND_E8"], + pin60: ["GND", "E9", "GND_E9"], + pin61: ["GND", "E10", "GND_E10"], + pin62: ["PB0_T2CCP0_U1Rx_USB0ID", "E11"], + pin63: ["PL6_T3CCP0_USB0DP_WT3CCP0", "E12"], + pin64: ["PL7_T3CCP1_USB0DM_WT3CCP1", "E13"], + pin65: ["PQ2_M1PWM2_WT3CCP0", "F1"], + pin66: ["GNDA", "F2", "GNDA_F2"], + pin67: ["VDDA", "F3"], + pin68: ["GNDA", "F4", "GNDA_F4"], + pin69: ["GND", "F5", "GND_F5"], + pin70: ["VDD", "F6", "VDD_F6"], + pin71: ["VDD", "F7", "VDD_F7"], + pin72: ["VDD", "F8", "VDD_F8"], + pin73: ["GND", "F9", "GND_F9"], + pin74: ["PM0_T4CCP0_WT4CCP0", "F10"], + pin75: ["RST", "F11"], + pin76: ["OSC1", "F12"], + pin77: ["OSC0", "F13"], + pin78: ["PE0_AIN3_U7Rx", "G1"], + pin79: ["PE1_AIN2_U7Tx", "G2"], + pin80: ["PE2_AIN1", "G3"], + pin81: ["PE3_AIN0", "G4"], + pin82: ["GND", "G5", "GND_G5"], + pin83: ["VDD", "G6", "VDD_G6"], + pin84: ["VDD", "G7", "VDD_G7"], + pin85: ["VDD", "G8", "VDD_G8"], + pin86: ["GND", "G9", "GND_G9"], + pin87: ["PM4", "G10"], + pin88: ["PM2_T5CCP0_WT5CCP0", "G11"], + pin89: ["PM1_T4CCP1_WT4CCP1", "G12"], + pin90: ["PM3_T5CCP1_WT5CCP1", "G13"], + pin91: ["PK2_AIN18_M1FAULT2_SSI3Rx", "H1"], + pin92: ["PK3_AIN19_M1FAULT3_SSI3Tx", "H2"], + pin93: ["PK1_AIN17_M1FAULT1_SSI3Fss", "H3"], + pin94: ["PK0_AIN16_M1FAULT0_SSI3Clk", "H4"], + pin95: ["GND", "H5", "GND_H5"], + pin96: ["VDD", "H6", "VDD_H6"], + pin97: ["VDD", "H7", "VDD_H7"], + pin98: ["GND", "H8", "GND_H8"], + pin99: ["VDDC", "H9", "VDDC_H9"], + pin100: ["PM5", "H10"], + pin101: ["PM7_M0PWM5_WT0CCP1", "H11"], + pin102: ["PP1_M0PWM1_T4CCP1", "H12"], + pin103: ["PM6_M0PWM4_WT0CCP0", "H13"], + pin104: ["VDDC", "J1", "VDDC_J1"], + pin105: ["PH6_M0PWM6_SSI2Rx_WT4CCP0", "J2"], + pin106: ["PH5_M0PWM5_PhB0_SSI2Fss_WT3CCP1", "J3"], + pin107: ["PH7_M0PWM7_SSI2Tx_WT4CCP1", "J4"], + pin108: ["GND", "J5", "GND_J5"], + pin109: ["GND", "J6", "GND_J6"], + pin110: ["GND", "J7", "GND_J7"], + pin111: ["GND", "J8", "GND_J8"], + pin112: ["VDDC", "J9", "VDDC_J9"], + pin113: ["PP0_M0PWM0_T4CCP0", "J10"], + pin114: ["PP3_M0PWM3_T5CCP1", "J11"], + pin115: ["PP4_M0PWM4_WT0CCP0", "J12"], + pin116: ["VDDC", "J13", "VDDC_J13"], + pin117: ["PH4_M0PWM4_PhA0_SSI2Clk_WT3CCP0", "K1"], + pin118: ["PH3_M0FAULT3_M0PWM3_SSI3Tx_WT5CCP1", "K2"], + pin119: ["PH2_M0FAULT2_M0PWM2_SSI3Rx_WT5CCP0", "K3"], + pin120: ["PN2_M0PWM6_WT2CCP0", "K4"], + pin121: ["PA1_CAN1Tx_U0Tx", "K5"], + pin122: ["PP2_M0PWM2_T5CCP0", "K6"], + pin123: ["PP5_M0PWM5_WT0CCP1", "K7"], + pin124: ["PF7_I2C2SDA_M1FAULT0_T3CCP1", "K8"], + pin125: ["GND", "K9", "GND_K9"], + pin126: ["PF4_IDX0_M0FAULT2_M1FAULT0_T2CCP0_TRD3_U1DTR_USB0EPEN", "K10"], + pin127: ["XOSC0", "K11"], + pin128: ["XOSC1", "K12"], + pin129: ["VBAT", "K13"], + pin130: ["PH1_IDX0_M0FAULT1_M0PWM1_SSI3Fss_WT2CCP1", "L1"], + pin131: ["PH0_M0FAULT0_M0PWM0_SSI3Clk_WT2CCP0", "L2"], + pin132: ["PA0_CAN1Rx_U0Rx", "L3"], + pin133: ["PA4_SSI0Rx", "L4"], + pin134: ["PA7_I2C1SDA_M1PWM3", "L5"], + pin135: ["PP7_M0PWM7_WT1CCP1", "L6"], + pin136: ["PQ5_M1PWM5_WT4CCP1", "L7"], + pin137: ["PG3_I2C4SDA_M0FAULT2_M1PWM1_PhA1_T5CCP1", "L8"], + pin138: ["PG2_I2C4SCL_M0FAULT1_M1PWM0_T5CCP0", "L9"], + pin139: ["PF0_C0o_CAN0Rx_M1PWM4_NMI_PhA0_SSI1Rx_T0CCP0_TRD2_U1RTS", "L10"], + pin140: ["PN7_M1PWM7_WT4CCP1", "L11"], + pin141: ["PN4_M1PWM4_WT3CCP0", "L12"], + pin142: ["HIB", "L13"], + pin143: ["PC7_C0_U3Tx_USB0PFLT_WT1CCP1", "M1"], + pin144: ["PC5_C1_M0PWM7_PhA1_U1CTS_U1Tx_U4Tx_WT0CCP1", "M2"], + pin145: ["PC4_C1_IDX1_M0PWM6_U1RTS_U1Rx_U4Rx_WT0CCP0", "M3"], + pin146: ["PA5_SSI0Tx", "M4"], + pin147: ["PG7_I2C5SDA_IDX1_M0PWM7_WT1CCP1", "M5"], + pin148: ["PQ3_M1PWM3_WT3CCP1", "M6"], + pin149: ["PQ6_M1PWM6_WT5CCP0", "M7"], + pin150: ["PG4_I2C1SCL_M0PWM4_M1PWM2_PhB1_U2Rx_USB0EPEN_WT0CCP0", "M8"], + pin151: ["PG1_I2C3SDA_M1FAULT2_PhB1_T4CCP1", "M9"], + pin152: ["PF5_M0FAULT3_T2CCP1_USB0PFLT", "M10"], + pin153: ["PF3_CAN0Tx_M0FAULT1_M1PWM7_SSI1Fss_T1CCP1_TRCLK_U1DSR", "M11"], + pin154: ["PN5_M1PWM5_WT3CCP1", "M12"], + pin155: ["WAKE", "M13"], + pin156: ["PC6_C0_PhB1_U3Rx_USB0EPEN_WT1CCP0", "N1"], + pin157: ["PA2_SSI0Clk", "N2"], + pin158: ["PA3_SSI0Fss", "N3"], + pin159: ["PA6_I2C1SCL_M1PWM2", "N4"], + pin160: ["PG6_I2C5SCL_M0PWM6_WT1CCP0", "N5"], + pin161: ["PQ4_M1PWM4_WT4CCP0", "N6"], + pin162: ["PQ7_M1PWM7_WT5CCP1", "N7"], + pin163: ["PG5_I2C1SDA_IDX1_M0PWM5_M1PWM3_U2Tx_USB0PFLT_WT0CCP1", "N8"], + pin164: ["PG0_I2C3SCL_M1FAULT1_PhA1_T4CCP0", "N9"], + pin165: ["PF6_I2C2SCL_T3CCP0", "N10"], + pin166: ["PF1_C1o_M1PWM5_PhB0_SSI1Tx_T0CCP1_TRD1_U1CTS", "N11"], + pin167: ["PF2_C2o_M0FAULT0_M1PWM6_SSI1Clk_T1CCP0_TRD0_U1DCD", "N12"], + pin168: ["PN6_M1PWM6_WT4CCP0", "N13"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "ground", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "no-connect", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "bidirectional", + pin29: "bidirectional", + pin30: "bidirectional", + pin31: "bidirectional", + pin32: "bidirectional", + pin33: "bidirectional", + pin34: "bidirectional", + pin35: "bidirectional", + pin36: "bidirectional", + pin37: "bidirectional", + pin38: "bidirectional", + pin39: "bidirectional", + pin40: "bidirectional", + pin41: "power", + pin42: "bidirectional", + pin43: "ground", + pin44: "ground", + pin45: "power", + pin46: "bidirectional", + pin47: "ground", + pin48: "bidirectional", + pin49: "bidirectional", + pin50: "bidirectional", + pin51: "bidirectional", + pin54: "bidirectional", + pin55: "bidirectional", + pin56: "ground", + pin57: "power", + pin58: "power", + pin59: "ground", + pin60: "ground", + pin61: "ground", + pin62: "bidirectional", + pin63: "bidirectional", + pin64: "bidirectional", + pin65: "bidirectional", + pin66: "ground", + pin67: "power", + pin68: "ground", + pin69: "ground", + pin70: "power", + pin71: "power", + pin72: "power", + pin73: "ground", + pin74: "bidirectional", + pin75: "input", + pin76: "output", + pin77: "input", + pin78: "bidirectional", + pin79: "bidirectional", + pin80: "bidirectional", + pin81: "bidirectional", + pin82: "ground", + pin83: "power", + pin84: "power", + pin85: "power", + pin86: "ground", + pin87: "bidirectional", + pin88: "bidirectional", + pin89: "bidirectional", + pin90: "bidirectional", + pin91: "bidirectional", + pin92: "bidirectional", + pin93: "bidirectional", + pin94: "bidirectional", + pin95: "ground", + pin96: "power", + pin97: "power", + pin98: "ground", + pin99: "power", + pin100: "bidirectional", + pin101: "bidirectional", + pin102: "bidirectional", + pin103: "bidirectional", + pin104: "power", + pin105: "bidirectional", + pin106: "bidirectional", + pin107: "bidirectional", + pin108: "ground", + pin109: "ground", + pin110: "ground", + pin111: "ground", + pin112: "power", + pin113: "bidirectional", + pin114: "bidirectional", + pin115: "bidirectional", + pin116: "power", + pin117: "bidirectional", + pin118: "bidirectional", + pin119: "bidirectional", + pin120: "bidirectional", + pin121: "bidirectional", + pin122: "bidirectional", + pin123: "bidirectional", + pin124: "bidirectional", + pin125: "ground", + pin126: "power", + pin127: "input", + pin128: "output", + pin129: "power", + pin130: "bidirectional", + pin131: "bidirectional", + pin132: "bidirectional", + pin133: "bidirectional", + pin134: "bidirectional", + pin135: "bidirectional", + pin136: "bidirectional", + pin137: "bidirectional", + pin138: "bidirectional", + pin139: "bidirectional", + pin140: "bidirectional", + pin141: "bidirectional", + pin142: "output", + pin143: "bidirectional", + pin144: "bidirectional", + pin145: "bidirectional", + pin146: "bidirectional", + pin147: "bidirectional", + pin148: "bidirectional", + pin149: "bidirectional", + pin150: "power", + pin151: "bidirectional", + pin152: "bidirectional", + pin153: "bidirectional", + pin154: "bidirectional", + pin155: "input", + pin156: "power", + pin157: "bidirectional", + pin158: "bidirectional", + pin159: "bidirectional", + pin160: "bidirectional", + pin161: "bidirectional", + pin162: "bidirectional", + pin163: "bidirectional", + pin164: "bidirectional", + pin165: "bidirectional", + pin166: "bidirectional", + pin167: "bidirectional", + pin168: "bidirectional", +} as const; + +const pinAttributes = { + pin10: { + requiresGround: true, + }, + pin19: { + doNotConnect: true, + }, + pin41: { + requiresPower: true, + }, + pin43: { + requiresGround: true, + }, + pin44: { + requiresGround: true, + }, + pin45: { + requiresPower: true, + }, + pin47: { + requiresGround: true, + }, + pin56: { + requiresGround: true, + }, + pin57: { + requiresPower: true, + }, + pin58: { + requiresPower: true, + }, + pin59: { + requiresGround: true, + }, + pin60: { + requiresGround: true, + }, + pin61: { + requiresGround: true, + }, + pin66: { + requiresGround: true, + }, + pin67: { + requiresPower: true, + }, + pin68: { + requiresGround: true, + }, + pin69: { + requiresGround: true, + }, + pin70: { + requiresPower: true, + }, + pin71: { + requiresPower: true, + }, + pin72: { + requiresPower: true, + }, + pin73: { + requiresGround: true, + }, + pin82: { + requiresGround: true, + }, + pin83: { + requiresPower: true, + }, + pin84: { + requiresPower: true, + }, + pin85: { + requiresPower: true, + }, + pin86: { + requiresGround: true, + }, + pin95: { + requiresGround: true, + }, + pin96: { + requiresPower: true, + }, + pin97: { + requiresPower: true, + }, + pin98: { + requiresGround: true, + }, + pin99: { + requiresPower: true, + }, + pin104: { + requiresPower: true, + }, + pin108: { + requiresGround: true, + }, + pin109: { + requiresGround: true, + }, + pin110: { + requiresGround: true, + }, + pin111: { + requiresGround: true, + }, + pin112: { + requiresPower: true, + }, + pin116: { + requiresPower: true, + }, + pin125: { + requiresGround: true, + }, + pin126: { + requiresPower: true, + }, + pin129: { + requiresPower: true, + }, + pin150: { + requiresPower: true, + }, + pin156: { + requiresPower: true, + }, +} as const; + +export const TM4C123GH6ZXRI7 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1343028.obj?uuid=080d068ea40c40309b0a7cc7eb54c358", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1343028.step?uuid=080d068ea40c40309b0a7cc7eb54c358", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.2 }, + }} + {...props} + /> + ); +}; + +export default TM4C123GH6ZXRI7; diff --git a/lib/chips/TMP102AIDRLR.circuit.tsx b/lib/chips/TMP102AIDRLR.circuit.tsx new file mode 100644 index 00000000..11a8ddbb --- /dev/null +++ b/lib/chips/TMP102AIDRLR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["GND"], + pin3: ["ALERT"], + pin4: ["ADD0"], + pin5: ["V_POS"], + pin6: ["SDA"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TMP102AIDRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP102AIDRLR; diff --git a/lib/chips/TMP1075.circuit.tsx b/lib/chips/TMP1075.circuit.tsx index 1847327d..e57fb0eb 100644 --- a/lib/chips/TMP1075.circuit.tsx +++ b/lib/chips/TMP1075.circuit.tsx @@ -18,3 +18,5 @@ export const TMP1075 = ({ return ; }; + +export default TMP1075; diff --git a/lib/chips/TMP1075DSGR.circuit.tsx b/lib/chips/TMP1075DSGR.circuit.tsx index f4ffba25..f90ad068 100644 --- a/lib/chips/TMP1075DSGR.circuit.tsx +++ b/lib/chips/TMP1075DSGR.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: ["I2C_SDA", "SDA"], @@ -12,15 +13,22 @@ const pinLabels = { pin9: ["EP"], } as const; +const pinRoles = { + pin4: "ground", + pin8: "power", + pin9: "ground", +} as const; + export const TMP1075DSGR = (props: ChipProps) => { return ( ) => { /> ); }; + +export default TMP1075DSGR; diff --git a/lib/chips/TMP107BIDR.circuit.tsx b/lib/chips/TMP107BIDR.circuit.tsx new file mode 100644 index 00000000..50f71b74 --- /dev/null +++ b/lib/chips/TMP107BIDR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["V", "1"], + pin2: ["R1", "2"], + pin3: ["I", "O1", "3", "I_3"], + pin4: ["ALERT1", "4"], + pin5: ["GND", "5"], + pin6: ["ALERT2", "6"], + pin7: ["I", "O2", "7", "I_7"], + pin8: ["R2", "8"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "bidirectional", + pin4: "output", + pin5: "ground", + pin6: "output", + pin7: "bidirectional", + pin8: "input", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const TMP107BIDR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059) + return ( + + ); +}; + +export default TMP107BIDR; diff --git a/lib/chips/TMP116NAIDRVR.circuit.tsx b/lib/chips/TMP116NAIDRVR.circuit.tsx new file mode 100644 index 00000000..27d22548 --- /dev/null +++ b/lib/chips/TMP116NAIDRVR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL"], + pin2: ["GND"], + pin3: ["ALERT"], + pin4: ["ADD0"], + pin5: ["V_POS"], + pin6: ["SDA"], + pin7: ["PAD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TMP116NAIDRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP116NAIDRVR; diff --git a/lib/chips/TMP118MAIYMSR.circuit.tsx b/lib/chips/TMP118MAIYMSR.circuit.tsx new file mode 100644 index 00000000..3064f44c --- /dev/null +++ b/lib/chips/TMP118MAIYMSR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD", "A1"], + pin3: ["SDA", "B1"], + pin2: ["GND", "A2"], + pin4: ["SCL", "B2"], +} as const; + +const pinRoles = { + pin1: "power", + pin3: "bidirectional", + pin2: "ground", + pin4: "input", +} as const; + +const pinAttributes = { + pin1: { + requiresPower: true, + }, + pin2: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin3: [...pinLabels["pin3"], "pin2"], + pin2: [...pinLabels["pin2"], "pin3"], +} as const; + +export const TMP118MAIYMSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP118MAIYMSR; diff --git a/lib/chips/TMP119AIYBGR.circuit.tsx b/lib/chips/TMP119AIYBGR.circuit.tsx new file mode 100644 index 00000000..dd0d7afa --- /dev/null +++ b/lib/chips/TMP119AIYBGR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin5: ["ADD0", "C1"], + pin6: ["ALERT", "C2"], + pin4: ["GND", "B2"], + pin2: ["SCL", "A2"], + pin1: ["SDA", "A1"], + pin3: ["V_P", "B1"], +} as const; + +const pinRoles = { + pin5: "input", + pin6: "output", + pin4: "ground", + pin2: "input", + pin1: "bidirectional", + pin3: "power", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin3: { + requiresPower: true, + }, +} as const; + +export const TMP119AIYBGR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22428347.obj?uuid=b7ce441a45ac4e84b306147eb83d2169", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22428347.step?uuid=b7ce441a45ac4e84b306147eb83d2169", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0.000012700000013410317, y: 0, z: -0.481 }, + }} + {...props} + /> + ); +}; + +export default TMP119AIYBGR; diff --git a/lib/chips/TMP20AIDCKR.circuit.tsx b/lib/chips/TMP20AIDCKR.circuit.tsx new file mode 100644 index 00000000..2a3ed739 --- /dev/null +++ b/lib/chips/TMP20AIDCKR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC"], + pin2: ["GND1"], + pin3: ["VOUT"], + pin4: ["V_POS"], + pin5: ["GND2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { requiresGround: true }, + pin5: { requiresGround: true }, +} as const; + +export const TMP20AIDCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP20AIDCKR; diff --git a/lib/chips/TMP235A2DBZR.circuit.tsx b/lib/chips/TMP235A2DBZR.circuit.tsx new file mode 100644 index 00000000..adb175e0 --- /dev/null +++ b/lib/chips/TMP235A2DBZR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["VOUT"], + pin3: ["GND"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TMP235A2DBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP235A2DBZR; diff --git a/lib/chips/TMP275AIDGKR.circuit.tsx b/lib/chips/TMP275AIDGKR.circuit.tsx new file mode 100644 index 00000000..39d51a5e --- /dev/null +++ b/lib/chips/TMP275AIDGKR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SDA"], + pin2: ["SCL"], + pin3: ["ALERT"], + pin4: ["GND"], + pin5: ["A2"], + pin6: ["A1"], + pin7: ["A0"], + pin8: ["V_POS"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, +} as const; + +export const TMP275AIDGKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMP275AIDGKR; diff --git a/lib/chips/TMP302ADRLR.circuit.tsx b/lib/chips/TMP302ADRLR.circuit.tsx new file mode 100644 index 00000000..78c56bd0 --- /dev/null +++ b/lib/chips/TMP302ADRLR.circuit.tsx @@ -0,0 +1,153 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TRIPSET0"], + pin2: ["GND"], + pin3: ["OUT"], + pin4: ["HYSTSET"], + pin5: ["VS"], + pin6: ["TRIPSET1"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TMP302ADRLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877557.obj?uuid=b370694011514b63b95ead37a576abc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2877557.step?uuid=b370694011514b63b95ead37a576abc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.00003810000009707437, + y: -0.000012700000070253736, + z: -0.05, + }, + }} + {...props} + /> + ); +}; + +export default TMP302ADRLR; diff --git a/lib/chips/TMS320F28027PTQR.circuit.tsx b/lib/chips/TMS320F28027PTQR.circuit.tsx new file mode 100644 index 00000000..352282c6 --- /dev/null +++ b/lib/chips/TMS320F28027PTQR.circuit.tsx @@ -0,0 +1,133 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCITXDA", "1"], + pin2: ["TRST", "2"], + pin3: ["XRS", "3"], + pin4: ["ADCINA6", "4"], + pin5: ["COMP2A", "5"], + pin6: ["ADCINA7", "6"], + pin7: ["ADCINA3", "7"], + pin8: ["ADCINA1", "8"], + pin9: ["COMP1A", "9"], + pin10: ["VREFHI", "10"], + pin11: ["VDDA", "11"], + pin12: ["VSSA", "12"], + pin13: ["ADCINB1", "13"], + pin14: ["COMP1B", "14"], + pin15: ["ADCINB3", "15"], + pin16: ["COMP2B", "16"], + pin17: ["ADCINB6", "17"], + pin18: ["ADCINB7", "18"], + pin19: ["GPIO34", "19"], + pin20: ["TDI", "20"], + pin21: ["TMS", "21"], + pin22: ["TDO", "22"], + pin23: ["XCLKIN", "23"], + pin24: ["XCLKOUT", "24"], + pin25: ["GPIO19", "25"], + pin26: ["SPISOMIA", "26"], + pin27: ["SPISIMOA", "27"], + pin28: ["EPWM1B", "28"], + pin29: ["EPWM1A", "29"], + pin30: ["TEST", "30"], + pin31: ["SDAA", "31"], + pin32: ["VDD", "32", "VDD_32"], + pin33: ["VSS", "33", "VSS_33"], + pin34: ["VREGENZ", "34"], + pin35: ["VDDIO", "35"], + pin36: ["SCLA", "36"], + pin37: ["EPWM2A", "37"], + pin38: ["EPWM2B", "38"], + pin39: ["EPWM3A", "39"], + pin40: ["EPWM3B", "40"], + pin41: ["EPWM4A", "41"], + pin42: ["EPWM4B", "42"], + pin43: ["VDD", "43", "VDD_43"], + pin44: ["VSS", "44", "VSS_44"], + pin45: ["X1", "45"], + pin46: ["X2", "46"], + pin47: ["TZ1", "47"], + pin48: ["SCIRXDA", "48"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "unknown", + pin3: "unknown", + pin4: "unknown", + pin5: "unknown", + pin6: "unknown", + pin7: "unknown", + pin8: "unknown", + pin9: "unknown", + pin10: "power", + pin11: "power", + pin12: "ground", + pin13: "unknown", + pin14: "unknown", + pin15: "unknown", + pin16: "unknown", + pin17: "unknown", + pin18: "unknown", + pin19: "bidirectional", + pin20: "unknown", + pin21: "unknown", + pin22: "unknown", + pin23: "unknown", + pin24: "unknown", + pin25: "bidirectional", + pin26: "unknown", + pin27: "unknown", + pin28: "unknown", + pin29: "unknown", + pin30: "no-connect", + pin31: "bidirectional", + pin32: "power", + pin33: "ground", + pin34: "power", + pin35: "power", + pin36: "control", + pin37: "unknown", + pin38: "unknown", + pin39: "unknown", + pin40: "unknown", + pin41: "unknown", + pin42: "unknown", + pin43: "power", + pin44: "ground", + pin45: "unknown", + pin46: "unknown", + pin47: "unknown", + pin48: "unknown", +} as const; + +const pinAttributes = { + pin10: { requiresPower: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, + pin30: { doNotConnect: true }, + pin32: { requiresPower: true }, + pin33: { requiresGround: true }, + pin34: { requiresPower: true }, + pin35: { requiresPower: true }, + pin43: { requiresPower: true }, + pin44: { requiresGround: true }, +} as const; + +export const TMS320F28027PTQR = (props: ChipProps) => { + // Footprint provenance: TI drawing PT0048A; donor F2800132PTR (JLCPCB C20345402) + return ( + + ); +}; + +export default TMS320F28027PTQR; diff --git a/lib/chips/TMS320F28035PNQ.circuit.tsx b/lib/chips/TMS320F28035PNQ.circuit.tsx new file mode 100644 index 00000000..7abba338 --- /dev/null +++ b/lib/chips/TMS320F28035PNQ.circuit.tsx @@ -0,0 +1,126 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["pin6"], + pin7: ["VDD1"], + pin8: ["VSS1"], + pin9: ["XRS"], + pin10: ["TRST"], + pin11: ["ADCINA7"], + pin12: ["pin12"], + pin13: ["ADCINA5"], + pin14: ["pin14"], + pin15: ["ADCINA3"], + pin16: ["pin16"], + pin17: ["ADCINA1"], + pin18: ["ADCINA0"], + pin19: ["VREFHI"], + pin20: ["VDDA"], + pin21: ["VSSA"], + pin22: ["VREFLO"], + pin23: ["ADCINB0"], + pin24: ["ADCINB1"], + pin25: ["pin25"], + pin26: ["ADCINB3"], + pin27: ["pin27"], + pin28: ["ADCINB5"], + pin29: ["pin29"], + pin30: ["ADCINB7"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["pin34"], + pin35: ["VSS2"], + pin36: ["VDDIO1"], + pin37: ["pin37"], + pin38: ["TEST2"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["GPIO44"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["X2"], + pin52: ["X1"], + pin53: ["VSS3"], + pin54: ["VDD2"], + pin55: ["pin55"], + pin56: ["GPIO39"], + pin57: ["pin57"], + pin58: ["pin58"], + pin59: ["pin59"], + pin60: ["pin60"], + pin61: ["pin61"], + pin62: ["pin62"], + pin63: ["pin63"], + pin64: ["pin64"], + pin65: ["pin65"], + pin66: ["pin66"], + pin67: ["pin67"], + pin68: ["pin68"], + pin69: ["pin69"], + pin70: ["VDDIO2"], + pin71: ["VSS4"], + pin72: ["VDD3"], + pin73: ["VREGENZ"], + pin74: ["pin74"], + pin75: ["pin75"], + pin76: ["pin76"], + pin77: ["pin77"], + pin78: ["pin78"], + pin79: ["pin79"], + pin80: ["pin80"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresGround: true }, + pin20: { requiresPower: true }, + pin35: { requiresGround: true }, + pin53: { requiresGround: true }, + pin54: { requiresPower: true }, + pin71: { requiresGround: true }, + pin72: { requiresPower: true }, +} as const; + +export const TMS320F28035PNQ = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28035PNQ; diff --git a/lib/chips/TMS320F28075PTPQ.circuit.tsx b/lib/chips/TMS320F28075PTPQ.circuit.tsx new file mode 100644 index 00000000..77fa9b7a --- /dev/null +++ b/lib/chips/TMS320F28075PTPQ.circuit.tsx @@ -0,0 +1,229 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO10"], + pin2: ["GPIO11"], + pin3: ["VDDIO21"], + pin4: ["GPIO12"], + pin5: ["GPIO13"], + pin6: ["GPIO14"], + pin7: ["GPIO15"], + pin8: ["GPIO16"], + pin9: ["GPIO17"], + pin10: ["GPIO18"], + pin11: ["VDDIO20"], + pin12: ["GPIO19"], + pin13: ["GPIO20"], + pin14: ["GPIO21"], + pin15: ["VDDIO19"], + pin16: ["VDD10"], + pin17: ["GPIO99"], + pin18: ["GPIO8"], + pin19: ["GPIO9"], + pin20: ["VDDIO18"], + pin21: ["VDD9"], + pin22: ["GPIO22"], + pin23: ["GPIO23"], + pin24: ["GPIO24"], + pin25: ["GPIO25"], + pin26: ["VDDIO17"], + pin27: ["GPIO26"], + pin28: ["GPIO27"], + pin29: ["CMPIN5P"], + pin30: ["CMPIN6N"], + pin31: ["CMPIN6P"], + pin32: ["VSSA3"], + pin33: ["VREFLOA"], + pin34: ["VSSA2"], + pin35: ["VDDA3"], + pin36: ["VDDA2"], + pin37: ["VREFHIA"], + pin38: ["ADCINA5"], + pin39: ["ADCINA4"], + pin40: ["ADCINA3"], + pin41: ["ADCINA2"], + pin42: ["ADCINA1"], + pin43: ["ADCINA0"], + pin44: ["ADCIN14"], + pin45: ["ADCIN15"], + pin46: ["ADCINB0"], + pin47: ["ADCINB1"], + pin48: ["ADCINB2"], + pin49: ["ADCINB3"], + pin50: ["VREFLOB"], + pin51: ["VREFLOD"], + pin52: ["VSSA1"], + pin53: ["VREFHIB"], + pin54: ["VDDA1"], + pin55: ["VREFHID"], + pin56: ["ADCIND0"], + pin57: ["ADCIND1"], + pin58: ["ADCIND2"], + pin59: ["ADCIND3"], + pin60: ["ADCIND4"], + pin61: ["VDD8"], + pin62: ["VDDIO16"], + pin63: ["GPIO30"], + pin64: ["GPIO28"], + pin65: ["GPIO29"], + pin66: ["GPIO31"], + pin67: ["GPIO32"], + pin68: ["VDDIO15"], + pin69: ["GPIO33"], + pin70: ["GPIO34"], + pin71: ["GPIO35"], + pin72: ["VDD3VFL"], + pin73: ["FLT1"], + pin74: ["FLT2"], + pin75: ["VDDIO14"], + pin76: ["VDD7"], + pin77: ["TDI"], + pin78: ["TDO"], + pin79: ["TRST"], + pin80: ["TMS"], + pin81: ["TCK"], + pin82: ["VDDIO13"], + pin83: ["GPIO36"], + pin84: ["GPIO37"], + pin85: ["GPIO38"], + pin86: ["GPIO39"], + pin87: ["GPIO40"], + pin88: ["VDDIO12"], + pin89: ["GPIO41"], + pin90: ["GPIO48"], + pin91: ["VDDIO11"], + pin92: ["ERRORSTS"], + pin93: ["GPIO49"], + pin94: ["GPIO50"], + pin95: ["GPIO51"], + pin96: ["GPIO52"], + pin97: ["GPIO53"], + pin98: ["GPIO54"], + pin99: ["VDDIO10"], + pin100: ["GPIO55"], + pin101: ["GPIO56"], + pin102: ["GPIO57"], + pin103: ["GPIO58"], + pin104: ["GPIO59"], + pin105: ["GPIO60"], + pin106: ["VDDIO9"], + pin107: ["GPIO61"], + pin108: ["GPIO62"], + pin109: ["GPIO63"], + pin110: ["GPIO64"], + pin111: ["GPIO65"], + pin112: ["GPIO66"], + pin113: ["GPIO44"], + pin114: ["VDDIO8"], + pin115: ["GPIO45"], + pin116: ["VDDIO7"], + pin117: ["VDD6"], + pin118: ["GPIO133"], + pin119: ["VREGENZ"], + pin120: ["VDDOSC2"], + pin121: ["X2"], + pin122: ["VSSOSC"], + pin123: ["X1"], + pin124: ["XRS"], + pin125: ["VDDOSC1"], + pin126: ["VDD5"], + pin127: ["VDDIO6"], + pin128: ["GPIO46"], + pin129: ["GPIO47"], + pin130: ["GPIO42"], + pin131: ["GPIO43"], + pin132: ["GPIO67"], + pin133: ["GPIO68"], + pin134: ["GPIO69"], + pin135: ["GPIO70"], + pin136: ["GPIO71"], + pin137: ["VDD4"], + pin138: ["VDDIO5"], + pin139: ["GPIO72"], + pin140: ["GPIO73"], + pin141: ["GPIO74"], + pin142: ["GPIO75"], + pin143: ["GPIO76"], + pin144: ["GPIO77"], + pin145: ["GPIO78"], + pin146: ["GPIO79"], + pin147: ["VDDIO4"], + pin148: ["GPIO80"], + pin149: ["GPIO81"], + pin150: ["GPIO82"], + pin151: ["GPIO83"], + pin152: ["VDDIO3"], + pin153: ["VDD3"], + pin154: ["GPIO84"], + pin155: ["GPIO85"], + pin156: ["GPIO86"], + pin157: ["GPIO87"], + pin158: ["VDD2"], + pin159: ["VDDIO2"], + pin160: ["GPIO0"], + pin161: ["GPIO1"], + pin162: ["GPIO2"], + pin163: ["GPIO3"], + pin164: ["GPIO4"], + pin165: ["GPIO5"], + pin166: ["GPIO6"], + pin167: ["GPIO7"], + pin168: ["VDDIO1"], + pin169: ["VDD1"], + pin170: ["GPIO88"], + pin171: ["GPIO89"], + pin172: ["GPIO90"], + pin173: ["GPIO91"], + pin174: ["GPIO92"], + pin175: ["GPIO93"], + pin176: ["GPIO94"], + pin177: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin35: { requiresPower: true }, + pin36: { requiresPower: true }, + pin54: { requiresPower: true }, + pin61: { requiresPower: true }, + pin76: { requiresPower: true }, + pin117: { requiresPower: true }, + pin126: { requiresPower: true }, + pin137: { requiresPower: true }, + pin153: { requiresPower: true }, + pin158: { requiresPower: true }, + pin169: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin177: [...pinLabels["pin177"], "thermalpad"], +} as const; + +export const TMS320F28075PTPQ = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28075PTPQ; diff --git a/lib/chips/TMS320F28374SPTPT.circuit.tsx b/lib/chips/TMS320F28374SPTPT.circuit.tsx new file mode 100644 index 00000000..b3503c5e --- /dev/null +++ b/lib/chips/TMS320F28374SPTPT.circuit.tsx @@ -0,0 +1,228 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO10"], + pin2: ["GPIO11"], + pin3: ["VDDIO1"], + pin4: ["GPIO12"], + pin5: ["GPIO13"], + pin6: ["GPIO14"], + pin7: ["GPIO15"], + pin8: ["GPIO16"], + pin9: ["GPIO17"], + pin10: ["GPIO18"], + pin11: ["VDDIO2"], + pin12: ["GPIO19"], + pin13: ["GPIO20"], + pin14: ["GPIO21"], + pin15: ["VDDIO3"], + pin16: ["VDD1"], + pin17: ["GPIO99"], + pin18: ["GPIO8"], + pin19: ["GPIO9"], + pin20: ["VDDIO4"], + pin21: ["VDD2"], + pin22: ["GPIO22"], + pin23: ["GPIO23"], + pin24: ["GPIO24"], + pin25: ["GPIO25"], + pin26: ["VDDIO5"], + pin27: ["GPIO26"], + pin28: ["GPIO27"], + pin29: ["ADCINC4"], + pin30: ["ADCINC3"], + pin31: ["ADCINC2"], + pin32: ["VREFLOC"], + pin33: ["VREFLOA"], + pin34: ["VSSA1"], + pin35: ["VREFHIC"], + pin36: ["VDDA1"], + pin37: ["VREFHIA"], + pin38: ["ADCINA5"], + pin39: ["ADCINA4"], + pin40: ["ADCINA3"], + pin41: ["ADCINA2"], + pin42: ["ADCINA1"], + pin43: ["ADCINA0"], + pin44: ["ADCIN14"], + pin45: ["ADCIN15"], + pin46: ["ADCINB0"], + pin47: ["ADCINB1"], + pin48: ["ADCINB2"], + pin49: ["ADCINB3"], + pin50: ["VREFLOB"], + pin51: ["VREFLOD"], + pin52: ["VSSA2"], + pin53: ["VREFHIB"], + pin54: ["VDDA2"], + pin55: ["VREFHID"], + pin56: ["ADCIND0"], + pin57: ["ADCIND1"], + pin58: ["ADCIND2"], + pin59: ["ADCIND3"], + pin60: ["ADCIND4"], + pin61: ["VDD3"], + pin62: ["VDDIO6"], + pin63: ["GPIO30"], + pin64: ["GPIO28"], + pin65: ["GPIO29"], + pin66: ["GPIO31"], + pin67: ["GPIO32"], + pin68: ["VDDIO7"], + pin69: ["GPIO33"], + pin70: ["GPIO34"], + pin71: ["GPIO35"], + pin72: ["VDD3VFL"], + pin73: ["FLT1"], + pin74: ["FLT2"], + pin75: ["VDDIO8"], + pin76: ["VDD4"], + pin77: ["TDI"], + pin78: ["TDO"], + pin79: ["TRST"], + pin80: ["TMS"], + pin81: ["TCK"], + pin82: ["VDDIO9"], + pin83: ["GPIO36"], + pin84: ["GPIO37"], + pin85: ["GPIO38"], + pin86: ["GPIO39"], + pin87: ["GPIO40"], + pin88: ["VDDIO10"], + pin89: ["GPIO41"], + pin90: ["GPIO48"], + pin91: ["VDDIO11"], + pin92: ["ERRORSTS"], + pin93: ["GPIO49"], + pin94: ["GPIO50"], + pin95: ["GPIO51"], + pin96: ["GPIO52"], + pin97: ["GPIO53"], + pin98: ["GPIO54"], + pin99: ["VDDIO12"], + pin100: ["GPIO55"], + pin101: ["GPIO56"], + pin102: ["GPIO57"], + pin103: ["GPIO58"], + pin104: ["GPIO59"], + pin105: ["GPIO60"], + pin106: ["VDDIO13"], + pin107: ["GPIO61"], + pin108: ["GPIO62"], + pin109: ["GPIO63"], + pin110: ["GPIO64"], + pin111: ["GPIO65"], + pin112: ["GPIO66"], + pin113: ["GPIO44"], + pin114: ["VDDIO14"], + pin115: ["GPIO45"], + pin116: ["VDDIO15"], + pin117: ["VDD5"], + pin118: ["GPIO133"], + pin119: ["VREGENZ"], + pin120: ["VDDOSC1"], + pin121: ["X2"], + pin122: ["VSSOSC"], + pin123: ["X1"], + pin124: ["XRS"], + pin125: ["VDDOSC2"], + pin126: ["VDD6"], + pin127: ["VDDIO16"], + pin128: ["GPIO46"], + pin129: ["GPIO47"], + pin130: ["GPIO42"], + pin131: ["GPIO43"], + pin132: ["GPIO67"], + pin133: ["GPIO68"], + pin134: ["GPIO69"], + pin135: ["GPIO70"], + pin136: ["GPIO71"], + pin137: ["VDD7"], + pin138: ["VDDIO17"], + pin139: ["GPIO72"], + pin140: ["GPIO73"], + pin141: ["GPIO74"], + pin142: ["GPIO75"], + pin143: ["GPIO76"], + pin144: ["GPIO77"], + pin145: ["GPIO78"], + pin146: ["GPIO79"], + pin147: ["VDDIO18"], + pin148: ["GPIO80"], + pin149: ["GPIO81"], + pin150: ["GPIO82"], + pin151: ["GPIO83"], + pin152: ["VDDIO19"], + pin153: ["VDD8"], + pin154: ["GPIO84"], + pin155: ["GPIO85"], + pin156: ["GPIO86"], + pin157: ["GPIO87"], + pin158: ["VDD9"], + pin159: ["VDDIO20"], + pin160: ["GPIO0"], + pin161: ["GPIO1"], + pin162: ["GPIO2"], + pin163: ["GPIO3"], + pin164: ["GPIO4"], + pin165: ["GPIO5"], + pin166: ["GPIO6"], + pin167: ["GPIO7"], + pin168: ["VDDIO21"], + pin169: ["VDD10"], + pin170: ["GPIO88"], + pin171: ["GPIO89"], + pin172: ["GPIO90"], + pin173: ["GPIO91"], + pin174: ["GPIO92"], + pin175: ["GPIO93"], + pin176: ["GPIO94"], + pin177: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin36: { requiresPower: true }, + pin54: { requiresPower: true }, + pin61: { requiresPower: true }, + pin76: { requiresPower: true }, + pin117: { requiresPower: true }, + pin126: { requiresPower: true }, + pin137: { requiresPower: true }, + pin153: { requiresPower: true }, + pin158: { requiresPower: true }, + pin169: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin177: [...pinLabels["pin177"], "thermalpad"], +} as const; + +export const TMS320F28374SPTPT = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28374SPTPT; diff --git a/lib/chips/TMS320F28375SPZPQ.circuit.tsx b/lib/chips/TMS320F28375SPZPQ.circuit.tsx new file mode 100644 index 00000000..c9f95eb9 --- /dev/null +++ b/lib/chips/TMS320F28375SPZPQ.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO11"], + pin2: ["VDDIO1"], + pin3: ["GPIO12"], + pin4: ["GPIO13"], + pin5: ["GPIO14"], + pin6: ["GPIO15"], + pin7: ["GPIO16"], + pin8: ["GPIO17"], + pin9: ["GPIO18"], + pin10: ["VDDIO2"], + pin11: ["GPIO19"], + pin12: ["GPIO20"], + pin13: ["GPIO21"], + pin14: ["GPIO99"], + pin15: ["VDDIO3"], + pin16: ["VDD1"], + pin17: ["pin17"], + pin18: ["VDDA1"], + pin19: ["VREFHIA"], + pin20: ["ADCINA5"], + pin21: ["ADCINA4"], + pin22: ["ADCINA3"], + pin23: ["ADCINA2"], + pin24: ["ADCINA1"], + pin25: ["ADCINA0"], + pin26: ["ADCIN14"], + pin27: ["ADCIN15"], + pin28: ["ADCINB0"], + pin29: ["ADCINB1"], + pin30: ["ADCINB2"], + pin31: ["ADCINB3"], + pin32: ["ADCINB4"], + pin33: ["ADCINB5"], + pin34: ["VREFLOB"], + pin35: ["VSSA1"], + pin36: ["VSSA2"], + pin37: ["VREFHIB"], + pin38: ["VDDA2"], + pin39: ["VDD2"], + pin40: ["VDDIO4"], + pin41: ["VDD3VFL"], + pin42: ["FLT1"], + pin43: ["FLT2"], + pin44: ["VDDIO5"], + pin45: ["VDD3"], + pin46: ["TDI"], + pin47: ["TDO"], + pin48: ["TRST"], + pin49: ["TMS"], + pin50: ["TCK"], + pin51: ["GPIO41"], + pin52: ["GPIO58"], + pin53: ["GPIO59"], + pin54: ["GPIO60"], + pin55: ["VDDIO6"], + pin56: ["GPIO61"], + pin57: ["GPIO62"], + pin58: ["GPIO63"], + pin59: ["GPIO64"], + pin60: ["GPIO65"], + pin61: ["GPIO66"], + pin62: ["VDDIO7"], + pin63: ["VDD4"], + pin64: ["VREGENZ"], + pin65: ["VDDOSC1"], + pin66: ["X2"], + pin67: ["VSSOSC"], + pin68: ["X1"], + pin69: ["XRS"], + pin70: ["VDDOSC2"], + pin71: ["VDD5"], + pin72: ["VDDIO8"], + pin73: ["GPIO42"], + pin74: ["GPIO43"], + pin75: ["GPIO69"], + pin76: ["GPIO70"], + pin77: ["GPIO71"], + pin78: ["VDD6"], + pin79: ["VDDIO9"], + pin80: ["GPIO72"], + pin81: ["GPIO73"], + pin82: ["GPIO78"], + pin83: ["VDDIO10"], + pin84: ["VDD7"], + pin85: ["GPIO84"], + pin86: ["GPIO85"], + pin87: ["GPIO86"], + pin88: ["GPIO87"], + pin89: ["VDD8"], + pin90: ["VDDIO11"], + pin91: ["GPIO2"], + pin92: ["GPIO3"], + pin93: ["GPIO4"], + pin94: ["VDDIO12"], + pin95: ["VDD9"], + pin96: ["GPIO89"], + pin97: ["GPIO90"], + pin98: ["GPIO91"], + pin99: ["GPIO92"], + pin100: ["GPIO10"], + pin101: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresPower: true }, + pin18: { requiresPower: true }, + pin38: { requiresPower: true }, + pin39: { requiresPower: true }, + pin45: { requiresPower: true }, + pin63: { requiresPower: true }, + pin71: { requiresPower: true }, + pin78: { requiresPower: true }, + pin84: { requiresPower: true }, + pin89: { requiresPower: true }, + pin95: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin101: [...pinLabels["pin101"], "thermalpad"], +} as const; + +export const TMS320F28375SPZPQ = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28375SPZPQ; diff --git a/lib/chips/TMS320F28377DZWTQ.circuit.tsx b/lib/chips/TMS320F28377DZWTQ.circuit.tsx new file mode 100644 index 00000000..046c1298 --- /dev/null +++ b/lib/chips/TMS320F28377DZWTQ.circuit.tsx @@ -0,0 +1,3508 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin18: ["VREFHIA", "V1"], + pin95: ["VREFHIB", "W5"], + pin15: ["VREFHIC", "R1"], + pin94: ["VREFHID", "V5"], + pin34: ["VREFLOA", "R2"], + pin113: ["VREFLOB", "V6"], + pin33: ["VREFLOC", "P2"], + pin114: ["VREFLOD", "W6"], + pin73: ["ADCIN14", "T4"], + pin74: ["ADCIN15", "U4"], + pin17: ["ADCINA0", "U1"], + pin16: ["ADCINA1", "T1"], + pin36: ["ADCINA2", "U2"], + pin35: ["ADCINA3", "T2"], + pin55: ["ADCINA4", "U3"], + pin54: ["ADCINA5", "T3"], + pin37: ["ADCINB0", "V2"], + pin38: ["ADCINB1", "W2"], + pin56: ["ADCINB2", "V3"], + pin57: ["ADCINB3", "W3"], + pin75: ["ADCINB4", "V4"], + pin76: ["ADCINB5", "W4"], + pin53: ["ADCINC2", "R3"], + pin52: ["ADCINC3", "P3"], + pin72: ["ADCINC4", "R4"], + pin71: ["ADCINC5", "P4"], + pin92: ["ADCIND0", "T5"], + pin93: ["ADCIND1", "U5"], + pin111: ["ADCIND2", "T6"], + pin112: ["ADCIND3", "U6"], + pin123: ["ADCIND4", "T7"], + pin124: ["ADCIND5", "U7"], + pin129: ["GPIO0", "C8"], + pin130: ["GPIO1", "D8"], + pin115: ["GPIO2", "A7"], + pin116: ["GPIO3", "B7"], + pin117: ["GPIO4", "C7"], + pin118: ["GPIO5", "D7"], + pin96: ["GPIO6", "A6"], + pin97: ["GPIO7", "B6"], + pin26: ["GPIO8", "G2"], + pin45: ["GPIO9", "G3"], + pin21: ["GPIO10", "B2"], + pin3: ["GPIO11", "C1"], + pin22: ["GPIO12", "C2"], + pin4: ["GPIO13", "D1"], + pin23: ["GPIO14", "D2"], + pin42: ["GPIO15", "D3"], + pin5: ["GPIO16", "E1"], + pin24: ["GPIO17", "E2"], + pin43: ["GPIO18", "E3"], + pin62: ["GPIO19", "E4"], + pin25: ["GPIO20", "F2"], + pin44: ["GPIO21", "F3"], + pin66: ["GPIO22", "J4"], + pin67: ["GPIO23", "K4"], + pin48: ["GPIO24", "K3"], + pin29: ["GPIO25", "K2"], + pin10: ["GPIO26", "K1"], + pin11: ["GPIO27", "L1"], + pin193: ["GPIO28", "V11"], + pin194: ["GPIO29", "W11"], + pin191: ["GPIO30", "T11"], + pin192: ["GPIO31", "U11"], + pin221: ["GPIO32", "U13"], + pin220: ["GPIO33", "T13"], + pin240: ["GPIO34", "U14"], + pin239: ["GPIO35", "T14"], + pin279: ["GPIO36", "V16"], + pin278: ["GPIO37", "U16"], + pin277: ["GPIO38", "T16"], + pin299: ["GPIO39", "W17"], + pin298: ["GPIO40", "V17"], + pin297: ["GPIO41", "U17"], + pin322: ["GPIO42", "D19"], + pin321: ["GPIO43", "C19"], + pin309: ["GPIO44", "K18"], + pin328: ["GPIO45", "K19"], + pin323: ["GPIO46", "E19"], + pin304: ["GPIO47", "E18"], + pin276: ["GPIO48", "R16"], + pin295: ["GPIO49", "R17"], + pin314: ["GPIO50", "R18"], + pin333: ["GPIO51", "R19"], + pin275: ["GPIO52", "P16"], + pin294: ["GPIO53", "P17"], + pin313: ["GPIO54", "P18"], + pin332: ["GPIO55", "P19"], + pin274: ["GPIO56", "N16"], + pin312: ["GPIO57", "N18"], + pin293: ["GPIO58", "N17"], + pin273: ["GPIO59", "M16"], + pin292: ["GPIO60", "M17"], + pin272: ["GPIO61", "L16"], + pin289: ["GPIO62", "J17"], + pin270: ["GPIO63", "J16"], + pin291: ["GPIO64", "L17"], + pin271: ["GPIO65", "K16"], + pin290: ["GPIO66", "K17"], + pin320: ["GPIO67", "B19"], + pin302: ["GPIO68", "C18"], + pin301: ["GPIO69", "B18"], + pin281: ["GPIO70", "A17"], + pin282: ["GPIO71", "B17"], + pin263: ["GPIO72", "B16"], + pin262: ["GPIO73", "A16"], + pin283: ["GPIO74", "C17"], + pin265: ["GPIO75", "D16"], + pin264: ["GPIO76", "C16"], + pin243: ["GPIO77", "A15"], + pin244: ["GPIO78", "B15"], + pin245: ["GPIO79", "C15"], + pin246: ["GPIO80", "D15"], + pin224: ["GPIO81", "A14"], + pin225: ["GPIO82", "B14"], + pin226: ["GPIO83", "C14"], + pin178: ["GPIO84", "A11"], + pin179: ["GPIO85", "B11"], + pin180: ["GPIO86", "C11"], + pin181: ["GPIO87", "D11"], + pin98: ["GPIO88", "C6"], + pin99: ["GPIO89", "D6"], + pin77: ["GPIO90", "A5"], + pin78: ["GPIO91", "B5"], + pin58: ["GPIO92", "A4"], + pin59: ["GPIO93", "B4"], + pin39: ["GPIO94", "A3"], + pin40: ["GPIO95", "B3"], + pin41: ["GPIO96", "C3"], + pin20: ["GPIO97", "A2"], + pin6: ["GPIO98", "F1"], + pin7: ["GPIO99", "G1"], + pin8: ["GPIO100", "H1"], + pin27: ["GPIO101", "H2"], + pin46: ["GPIO102", "H3"], + pin9: ["GPIO103", "J1"], + pin28: ["GPIO104", "J2"], + pin47: ["GPIO105", "J3"], + pin30: ["GPIO106", "L2"], + pin49: ["GPIO107", "L3"], + pin68: ["GPIO108", "L4"], + pin32: ["GPIO109", "N2"], + pin31: ["GPIO110", "M2"], + pin69: ["GPIO111", "M4"], + pin50: ["GPIO112", "M3"], + pin70: ["GPIO113", "N4"], + pin51: ["GPIO114", "N3"], + pin210: ["GPIO115", "V12"], + pin177: ["GPIO116", "W10"], + pin209: ["GPIO117", "U12"], + pin208: ["GPIO118", "T12"], + pin258: ["GPIO119", "T15"], + pin259: ["GPIO120", "U15"], + pin280: ["GPIO121", "W16"], + pin140: ["GPIO122", "T8"], + pin141: ["GPIO123", "U8"], + pin142: ["GPIO124", "V8"], + pin157: ["GPIO125", "T9"], + pin158: ["GPIO126", "U9"], + pin159: ["GPIO127", "V9"], + pin160: ["GPIO128", "W9"], + pin174: ["GPIO129", "T10"], + pin175: ["GPIO130", "U10"], + pin176: ["GPIO131", "V10"], + pin318: ["GPIO132", "W18"], + pin306: ["GPIO133_AUXCLKIN", "G18"], + pin317: ["GPIO134", "V18"], + pin316: ["GPIO135", "U18"], + pin296: ["GPIO136", "T17"], + pin315: ["GPIO137", "T18"], + pin334: ["GPIO138", "T19"], + pin331: ["GPIO139", "N19"], + pin330: ["GPIO140", "M19"], + pin311: ["GPIO141", "M18"], + pin329: ["GPIO142", "L19"], + pin305: ["GPIO143", "F18"], + pin286: ["GPIO144", "F17"], + pin285: ["GPIO145", "E17"], + pin303: ["GPIO146", "D18"], + pin284: ["GPIO147", "D17"], + pin227: ["GPIO148", "D14"], + pin212: ["GPIO149", "A13"], + pin213: ["GPIO150", "B13"], + pin214: ["GPIO151", "C13"], + pin215: ["GPIO152", "D13"], + pin195: ["GPIO153", "A12"], + pin196: ["GPIO154", "B12"], + pin197: ["GPIO155", "C12"], + pin198: ["GPIO156", "D12"], + pin162: ["GPIO157", "B10"], + pin163: ["GPIO158", "C10"], + pin164: ["GPIO159", "D10"], + pin145: ["GPIO160", "B9"], + pin146: ["GPIO161", "C9"], + pin147: ["GPIO162", "D9"], + pin127: ["GPIO163", "A8"], + pin128: ["GPIO164", "B8"], + pin79: ["GPIO165", "C5"], + pin80: ["GPIO166", "D5"], + pin60: ["GPIO167", "C4"], + pin61: ["GPIO168", "D4"], + pin324: ["XRS", "F19"], + pin325: ["X1", "G19"], + pin327: ["X2", "J19"], + pin65: ["NC", "H4"], + pin260: ["TCK", "V15"], + pin223: ["TDI", "W13"], + pin261: ["TDO", "W15"], + pin242: ["TMS", "W14"], + pin241: ["TRST", "V14"], + pin308: ["VREGENZ", "J18"], + pin148: ["VDD", "E9", "VDD_E9"], + pin182: ["VDD", "E11", "VDD_E11"], + pin149: ["VDD", "F9", "VDD_F9"], + pin183: ["VDD", "F11", "VDD_F11"], + pin230: ["VDD", "G14", "VDD_G14"], + pin249: ["VDD", "G15", "VDD_G15"], + pin232: ["VDD", "J14", "VDD_J14"], + pin251: ["VDD", "J15", "VDD_J15"], + pin86: ["VDD", "K5", "VDD_K5"], + pin105: ["VDD", "K6", "VDD_K6"], + pin172: ["VDD", "P10", "VDD_P10"], + pin218: ["VDD", "P13", "VDD_P13"], + pin173: ["VDD", "R10", "VDD_R10"], + pin219: ["VDD", "R13", "VDD_R13"], + pin190: ["VDD3VFL", "R11", "VDD3VFL_R11"], + pin207: ["VDD3VFL", "R12", "VDD3VFL_R12"], + pin109: ["VDDA", "P6", "VDDA_P6"], + pin110: ["VDDA", "R6", "VDDA_R6"], + pin144: ["VDDIO", "A9", "VDDIO_A9"], + pin300: ["VDDIO", "A18", "VDDIO_A18"], + pin2: ["VDDIO", "B1", "VDDIO_B1"], + pin119: ["VDDIO", "E7", "VDDIO_E7"], + pin165: ["VDDIO", "E10", "VDDIO_E10"], + pin216: ["VDDIO", "E13", "VDDIO_E13"], + pin266: ["VDDIO", "E16", "VDDIO_E16"], + pin63: ["VDDIO", "F4", "VDDIO_F4"], + pin120: ["VDDIO", "F7", "VDDIO_F7"], + pin166: ["VDDIO", "F10", "VDDIO_F10"], + pin217: ["VDDIO", "F13", "VDDIO_F13"], + pin267: ["VDDIO", "F16", "VDDIO_F16"], + pin64: ["VDDIO", "G4", "VDDIO_G4"], + pin83: ["VDDIO", "G5", "VDDIO_G5"], + pin102: ["VDDIO", "G6", "VDDIO_G6"], + pin84: ["VDDIO", "H5", "VDDIO_H5"], + pin103: ["VDDIO", "H6", "VDDIO_H6"], + pin234: ["VDDIO", "L14", "VDDIO_L14"], + pin253: ["VDDIO", "L15", "VDDIO_L15"], + pin12: ["VDDIO", "M1", "VDDIO_M1"], + pin88: ["VDDIO", "M5", "VDDIO_M5"], + pin107: ["VDDIO", "M6", "VDDIO_M6"], + pin236: ["VDDIO", "N14", "VDDIO_N14"], + pin255: ["VDDIO", "N15", "VDDIO_N15"], + pin155: ["VDDIO", "P9", "VDDIO_P9"], + pin156: ["VDDIO", "R9", "VDDIO_R9"], + pin336: ["VDDIO", "V19", "VDDIO_V19"], + pin143: ["VDDIO", "W8", "VDDIO_W8"], + pin269: ["VDDOSC", "H16", "VDDOSC_H16"], + pin288: ["VDDOSC", "H17", "VDDOSC_H17"], + pin1: ["VSS", "A1", "VSS_A1"], + pin161: ["VSS", "A10", "VSS_A10"], + pin319: ["VSS", "A19", "VSS_A19"], + pin81: ["VSS", "E5", "VSS_E5"], + pin100: ["VSS", "E6", "VSS_E6"], + pin131: ["VSS", "E8", "VSS_E8"], + pin199: ["VSS", "E12", "VSS_E12"], + pin228: ["VSS", "E14", "VSS_E14"], + pin247: ["VSS", "E15", "VSS_E15"], + pin82: ["VSS", "F5", "VSS_F5"], + pin101: ["VSS", "F6", "VSS_F6"], + pin132: ["VSS", "F8", "VSS_F8"], + pin200: ["VSS", "F12", "VSS_F12"], + pin229: ["VSS", "F14", "VSS_F14"], + pin248: ["VSS", "F15", "VSS_F15"], + pin268: ["VSS", "G16", "VSS_G16"], + pin287: ["VSS", "G17", "VSS_G17"], + pin133: ["VSS", "H8", "VSS_H8"], + pin150: ["VSS", "H9", "VSS_H9"], + pin167: ["VSS", "H10", "VSS_H10"], + pin184: ["VSS", "H11", "VSS_H11"], + pin201: ["VSS", "H12", "VSS_H12"], + pin231: ["VSS", "H14", "VSS_H14"], + pin250: ["VSS", "H15", "VSS_H15"], + pin85: ["VSS", "J5", "VSS_J5"], + pin104: ["VSS", "J6", "VSS_J6"], + pin134: ["VSS", "J8", "VSS_J8"], + pin151: ["VSS", "J9", "VSS_J9"], + pin168: ["VSS", "J10", "VSS_J10"], + pin185: ["VSS", "J11", "VSS_J11"], + pin202: ["VSS", "J12", "VSS_J12"], + pin135: ["VSS", "K8", "VSS_K8"], + pin152: ["VSS", "K9", "VSS_K9"], + pin169: ["VSS", "K10", "VSS_K10"], + pin186: ["VSS", "K11", "VSS_K11"], + pin203: ["VSS", "K12", "VSS_K12"], + pin233: ["VSS", "K14", "VSS_K14"], + pin252: ["VSS", "K15", "VSS_K15"], + pin87: ["VSS", "L5", "VSS_L5"], + pin106: ["VSS", "L6", "VSS_L6"], + pin136: ["VSS", "L8", "VSS_L8"], + pin153: ["VSS", "L9", "VSS_L9"], + pin170: ["VSS", "L10", "VSS_L10"], + pin187: ["VSS", "L11", "VSS_L11"], + pin204: ["VSS", "L12", "VSS_L12"], + pin310: ["VSS", "L18", "VSS_L18"], + pin137: ["VSS", "M8", "VSS_M8"], + pin154: ["VSS", "M9", "VSS_M9"], + pin171: ["VSS", "M10", "VSS_M10"], + pin188: ["VSS", "M11", "VSS_M11"], + pin205: ["VSS", "M12", "VSS_M12"], + pin235: ["VSS", "M14", "VSS_M14"], + pin254: ["VSS", "M15", "VSS_M15"], + pin13: ["VSS", "N1", "VSS_N1"], + pin89: ["VSS", "N5", "VSS_N5"], + pin108: ["VSS", "N6", "VSS_N6"], + pin121: ["VSS", "P7", "VSS_P7"], + pin138: ["VSS", "P8", "VSS_P8"], + pin189: ["VSS", "P11", "VSS_P11"], + pin206: ["VSS", "P12", "VSS_P12"], + pin237: ["VSS", "P14", "VSS_P14"], + pin256: ["VSS", "P15", "VSS_P15"], + pin122: ["VSS", "R7", "VSS_R7"], + pin139: ["VSS", "R8", "VSS_R8"], + pin238: ["VSS", "R14", "VSS_R14"], + pin257: ["VSS", "R15", "VSS_R15"], + pin126: ["VSS", "W7", "VSS_W7"], + pin337: ["VSS", "W19", "VSS_W19"], + pin307: ["VSSOSC", "H18", "VSSOSC_H18"], + pin326: ["VSSOSC", "H19", "VSSOSC_H19"], + pin14: ["VSSA", "P1", "VSSA_P1"], + pin90: ["VSSA", "P5", "VSSA_P5"], + pin91: ["VSSA", "R5", "VSSA_R5"], + pin125: ["VSSA", "V7", "VSSA_V7"], + pin19: ["VSSA", "W1", "VSSA_W1"], + pin335: ["ERRORSTS", "U19"], + pin211: ["FLT1", "W12"], + pin222: ["FLT2", "V13"], +} as const; + +const pinRoles = { + pin18: "input", + pin95: "input", + pin15: "input", + pin94: "input", + pin34: "input", + pin113: "input", + pin33: "input", + pin114: "input", + pin73: "input", + pin74: "input", + pin17: "input", + pin16: "input", + pin36: "input", + pin35: "input", + pin55: "input", + pin54: "input", + pin37: "input", + pin38: "input", + pin56: "input", + pin57: "input", + pin75: "input", + pin76: "input", + pin53: "input", + pin52: "input", + pin72: "input", + pin71: "input", + pin92: "input", + pin93: "input", + pin111: "input", + pin112: "input", + pin123: "input", + pin124: "input", + pin129: "bidirectional", + pin130: "bidirectional", + pin115: "bidirectional", + pin116: "bidirectional", + pin117: "bidirectional", + pin118: "bidirectional", + pin96: "bidirectional", + pin97: "bidirectional", + pin26: "bidirectional", + pin45: "bidirectional", + pin21: "bidirectional", + pin3: "bidirectional", + pin22: "bidirectional", + pin4: "bidirectional", + pin23: "bidirectional", + pin42: "bidirectional", + pin5: "bidirectional", + pin24: "bidirectional", + pin43: "bidirectional", + pin62: "bidirectional", + pin25: "bidirectional", + pin44: "bidirectional", + pin66: "bidirectional", + pin67: "bidirectional", + pin48: "bidirectional", + pin29: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin193: "bidirectional", + pin194: "bidirectional", + pin191: "bidirectional", + pin192: "bidirectional", + pin221: "bidirectional", + pin220: "bidirectional", + pin240: "bidirectional", + pin239: "bidirectional", + pin279: "bidirectional", + pin278: "bidirectional", + pin277: "bidirectional", + pin299: "bidirectional", + pin298: "bidirectional", + pin297: "bidirectional", + pin322: "bidirectional", + pin321: "bidirectional", + pin309: "bidirectional", + pin328: "bidirectional", + pin323: "bidirectional", + pin304: "bidirectional", + pin276: "bidirectional", + pin295: "bidirectional", + pin314: "bidirectional", + pin333: "bidirectional", + pin275: "bidirectional", + pin294: "bidirectional", + pin313: "bidirectional", + pin332: "bidirectional", + pin274: "bidirectional", + pin312: "bidirectional", + pin293: "bidirectional", + pin273: "bidirectional", + pin292: "bidirectional", + pin272: "bidirectional", + pin289: "bidirectional", + pin270: "bidirectional", + pin291: "bidirectional", + pin271: "bidirectional", + pin290: "bidirectional", + pin320: "bidirectional", + pin302: "bidirectional", + pin301: "bidirectional", + pin281: "bidirectional", + pin282: "bidirectional", + pin263: "bidirectional", + pin262: "bidirectional", + pin283: "bidirectional", + pin265: "bidirectional", + pin264: "bidirectional", + pin243: "bidirectional", + pin244: "bidirectional", + pin245: "bidirectional", + pin246: "bidirectional", + pin224: "bidirectional", + pin225: "bidirectional", + pin226: "bidirectional", + pin178: "bidirectional", + pin179: "bidirectional", + pin180: "bidirectional", + pin181: "bidirectional", + pin98: "bidirectional", + pin99: "bidirectional", + pin77: "bidirectional", + pin78: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin39: "bidirectional", + pin40: "bidirectional", + pin41: "bidirectional", + pin20: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin27: "bidirectional", + pin46: "bidirectional", + pin9: "bidirectional", + pin28: "bidirectional", + pin47: "bidirectional", + pin30: "bidirectional", + pin49: "bidirectional", + pin68: "bidirectional", + pin32: "bidirectional", + pin31: "bidirectional", + pin69: "bidirectional", + pin50: "bidirectional", + pin70: "bidirectional", + pin51: "bidirectional", + pin210: "bidirectional", + pin177: "bidirectional", + pin209: "bidirectional", + pin208: "bidirectional", + pin258: "bidirectional", + pin259: "bidirectional", + pin280: "bidirectional", + pin140: "bidirectional", + pin141: "bidirectional", + pin142: "bidirectional", + pin157: "bidirectional", + pin158: "bidirectional", + pin159: "bidirectional", + pin160: "bidirectional", + pin174: "bidirectional", + pin175: "bidirectional", + pin176: "bidirectional", + pin318: "bidirectional", + pin306: "bidirectional", + pin317: "bidirectional", + pin316: "bidirectional", + pin296: "bidirectional", + pin315: "bidirectional", + pin334: "bidirectional", + pin331: "bidirectional", + pin330: "bidirectional", + pin311: "bidirectional", + pin329: "bidirectional", + pin305: "bidirectional", + pin286: "bidirectional", + pin285: "bidirectional", + pin303: "bidirectional", + pin284: "bidirectional", + pin227: "bidirectional", + pin212: "bidirectional", + pin213: "bidirectional", + pin214: "bidirectional", + pin215: "bidirectional", + pin195: "bidirectional", + pin196: "bidirectional", + pin197: "bidirectional", + pin198: "bidirectional", + pin162: "bidirectional", + pin163: "bidirectional", + pin164: "bidirectional", + pin145: "bidirectional", + pin146: "bidirectional", + pin147: "bidirectional", + pin127: "bidirectional", + pin128: "bidirectional", + pin79: "bidirectional", + pin80: "bidirectional", + pin60: "bidirectional", + pin61: "bidirectional", + pin325: "input", + pin327: "output", + pin65: "no-connect", + pin260: "input", + pin223: "input", + pin242: "input", + pin241: "input", + pin308: "input", + pin148: "power", + pin182: "power", + pin149: "power", + pin183: "power", + pin230: "power", + pin249: "power", + pin232: "power", + pin251: "power", + pin86: "power", + pin105: "power", + pin172: "power", + pin218: "power", + pin173: "power", + pin219: "power", + pin190: "power", + pin207: "power", + pin109: "power", + pin110: "power", + pin144: "power", + pin300: "power", + pin2: "power", + pin119: "power", + pin165: "power", + pin216: "power", + pin266: "power", + pin63: "power", + pin120: "power", + pin166: "power", + pin217: "power", + pin267: "power", + pin64: "power", + pin83: "power", + pin102: "power", + pin84: "power", + pin103: "power", + pin234: "power", + pin253: "power", + pin12: "power", + pin88: "power", + pin107: "power", + pin236: "power", + pin255: "power", + pin155: "power", + pin156: "power", + pin336: "power", + pin143: "power", + pin269: "power", + pin288: "power", + pin1: "ground", + pin161: "ground", + pin319: "ground", + pin81: "ground", + pin100: "ground", + pin131: "ground", + pin199: "ground", + pin228: "ground", + pin247: "ground", + pin82: "ground", + pin101: "ground", + pin132: "ground", + pin200: "ground", + pin229: "ground", + pin248: "ground", + pin268: "ground", + pin287: "ground", + pin133: "ground", + pin150: "ground", + pin167: "ground", + pin184: "ground", + pin201: "ground", + pin231: "ground", + pin250: "ground", + pin85: "ground", + pin104: "ground", + pin134: "ground", + pin151: "ground", + pin168: "ground", + pin185: "ground", + pin202: "ground", + pin135: "ground", + pin152: "ground", + pin169: "ground", + pin186: "ground", + pin203: "ground", + pin233: "ground", + pin252: "ground", + pin87: "ground", + pin106: "ground", + pin136: "ground", + pin153: "ground", + pin170: "ground", + pin187: "ground", + pin204: "ground", + pin310: "ground", + pin137: "ground", + pin154: "ground", + pin171: "ground", + pin188: "ground", + pin205: "ground", + pin235: "ground", + pin254: "ground", + pin13: "ground", + pin89: "ground", + pin108: "ground", + pin121: "ground", + pin138: "ground", + pin189: "ground", + pin206: "ground", + pin237: "ground", + pin256: "ground", + pin122: "ground", + pin139: "ground", + pin238: "ground", + pin257: "ground", + pin126: "ground", + pin337: "ground", + pin307: "no-connect", + pin326: "no-connect", + pin14: "ground", + pin90: "ground", + pin91: "ground", + pin125: "ground", + pin19: "ground", + pin335: "output", + pin211: "bidirectional", + pin222: "bidirectional", +} as const; + +const pinAttributes = { + pin65: { + doNotConnect: true, + }, + pin148: { + requiresPower: true, + }, + pin182: { + requiresPower: true, + }, + pin149: { + requiresPower: true, + }, + pin183: { + requiresPower: true, + }, + pin230: { + requiresPower: true, + }, + pin249: { + requiresPower: true, + }, + pin232: { + requiresPower: true, + }, + pin251: { + requiresPower: true, + }, + pin86: { + requiresPower: true, + }, + pin105: { + requiresPower: true, + }, + pin172: { + requiresPower: true, + }, + pin218: { + requiresPower: true, + }, + pin173: { + requiresPower: true, + }, + pin219: { + requiresPower: true, + }, + pin190: { + requiresPower: true, + }, + pin207: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin110: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin300: { + requiresPower: true, + }, + pin2: { + requiresPower: true, + }, + pin119: { + requiresPower: true, + }, + pin165: { + requiresPower: true, + }, + pin216: { + requiresPower: true, + }, + pin266: { + requiresPower: true, + }, + pin63: { + requiresPower: true, + }, + pin120: { + requiresPower: true, + }, + pin166: { + requiresPower: true, + }, + pin217: { + requiresPower: true, + }, + pin267: { + requiresPower: true, + }, + pin64: { + requiresPower: true, + }, + pin83: { + requiresPower: true, + }, + pin102: { + requiresPower: true, + }, + pin84: { + requiresPower: true, + }, + pin103: { + requiresPower: true, + }, + pin234: { + requiresPower: true, + }, + pin253: { + requiresPower: true, + }, + pin12: { + requiresPower: true, + }, + pin88: { + requiresPower: true, + }, + pin107: { + requiresPower: true, + }, + pin236: { + requiresPower: true, + }, + pin255: { + requiresPower: true, + }, + pin155: { + requiresPower: true, + }, + pin156: { + requiresPower: true, + }, + pin336: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin269: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin1: { + requiresGround: true, + }, + pin161: { + requiresGround: true, + }, + pin319: { + requiresGround: true, + }, + pin81: { + requiresGround: true, + }, + pin100: { + requiresGround: true, + }, + pin131: { + requiresGround: true, + }, + pin199: { + requiresGround: true, + }, + pin228: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin82: { + requiresGround: true, + }, + pin101: { + requiresGround: true, + }, + pin132: { + requiresGround: true, + }, + pin200: { + requiresGround: true, + }, + pin229: { + requiresGround: true, + }, + pin248: { + requiresGround: true, + }, + pin268: { + requiresGround: true, + }, + pin287: { + requiresGround: true, + }, + pin133: { + requiresGround: true, + }, + pin150: { + requiresGround: true, + }, + pin167: { + requiresGround: true, + }, + pin184: { + requiresGround: true, + }, + pin201: { + requiresGround: true, + }, + pin231: { + requiresGround: true, + }, + pin250: { + requiresGround: true, + }, + pin85: { + requiresGround: true, + }, + pin104: { + requiresGround: true, + }, + pin134: { + requiresGround: true, + }, + pin151: { + requiresGround: true, + }, + pin168: { + requiresGround: true, + }, + pin185: { + requiresGround: true, + }, + pin202: { + requiresGround: true, + }, + pin135: { + requiresGround: true, + }, + pin152: { + requiresGround: true, + }, + pin169: { + requiresGround: true, + }, + pin186: { + requiresGround: true, + }, + pin203: { + requiresGround: true, + }, + pin233: { + requiresGround: true, + }, + pin252: { + requiresGround: true, + }, + pin87: { + requiresGround: true, + }, + pin106: { + requiresGround: true, + }, + pin136: { + requiresGround: true, + }, + pin153: { + requiresGround: true, + }, + pin170: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin204: { + requiresGround: true, + }, + pin310: { + requiresGround: true, + }, + pin137: { + requiresGround: true, + }, + pin154: { + requiresGround: true, + }, + pin171: { + requiresGround: true, + }, + pin188: { + requiresGround: true, + }, + pin205: { + requiresGround: true, + }, + pin235: { + requiresGround: true, + }, + pin254: { + requiresGround: true, + }, + pin13: { + requiresGround: true, + }, + pin89: { + requiresGround: true, + }, + pin108: { + requiresGround: true, + }, + pin121: { + requiresGround: true, + }, + pin138: { + requiresGround: true, + }, + pin189: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin237: { + requiresGround: true, + }, + pin256: { + requiresGround: true, + }, + pin122: { + requiresGround: true, + }, + pin139: { + requiresGround: true, + }, + pin238: { + requiresGround: true, + }, + pin257: { + requiresGround: true, + }, + pin126: { + requiresGround: true, + }, + pin337: { + requiresGround: true, + }, + pin307: { + doNotConnect: true, + }, + pin326: { + doNotConnect: true, + }, + pin14: { + requiresGround: true, + }, + pin90: { + requiresGround: true, + }, + pin91: { + requiresGround: true, + }, + pin125: { + requiresGround: true, + }, + pin19: { + requiresGround: true, + }, +} as const; + +export const TMS320F28377DZWTQ = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1345100.obj?uuid=6d7534726bc94785a1a3a0918245f868", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1345100.step?uuid=6d7534726bc94785a1a3a0918245f868", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.00012700000002041634, + y: -0.00012700000002041634, + z: -0.6, + }, + }} + {...props} + /> + ); +}; + +export default TMS320F28377DZWTQ; diff --git a/lib/chips/TMS320F28377SPTPQ.circuit.tsx b/lib/chips/TMS320F28377SPTPQ.circuit.tsx new file mode 100644 index 00000000..2f404f0b --- /dev/null +++ b/lib/chips/TMS320F28377SPTPQ.circuit.tsx @@ -0,0 +1,228 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO10"], + pin2: ["GPIO11"], + pin3: ["VDDIO1"], + pin4: ["GPIO12"], + pin5: ["GPIO13"], + pin6: ["GPIO14"], + pin7: ["GPIO15"], + pin8: ["GPIO16"], + pin9: ["GPIO17"], + pin10: ["GPIO18"], + pin11: ["VDDIO2"], + pin12: ["GPIO19"], + pin13: ["GPIO20"], + pin14: ["GPIO21"], + pin15: ["VDDIO3"], + pin16: ["VDD1"], + pin17: ["GPIO99"], + pin18: ["GPIO8"], + pin19: ["GPIO9"], + pin20: ["VDDIO4"], + pin21: ["VDD2"], + pin22: ["GPIO22"], + pin23: ["GPIO23"], + pin24: ["GPIO24"], + pin25: ["GPIO25"], + pin26: ["VDDIO5"], + pin27: ["GPIO26"], + pin28: ["GPIO27"], + pin29: ["ADCINC4"], + pin30: ["ADCINC3"], + pin31: ["ADCINC2"], + pin32: ["VREFLOC"], + pin33: ["VREFLOA"], + pin34: ["VSSA1"], + pin35: ["VREFHIC"], + pin36: ["VDDA1"], + pin37: ["VREFHIA"], + pin38: ["ADCINA5"], + pin39: ["ADCINA4"], + pin40: ["ADCINA3"], + pin41: ["ADCINA2"], + pin42: ["ADCINA1"], + pin43: ["ADCINA0"], + pin44: ["ADCIN14"], + pin45: ["ADCIN15"], + pin46: ["ADCINB0"], + pin47: ["ADCINB1"], + pin48: ["ADCINB2"], + pin49: ["ADCINB3"], + pin50: ["VREFLOB"], + pin51: ["VREFLOD"], + pin52: ["VSSA2"], + pin53: ["VREFHIB"], + pin54: ["VDDA2"], + pin55: ["VREFHID"], + pin56: ["ADCIND0"], + pin57: ["ADCIND1"], + pin58: ["ADCIND2"], + pin59: ["ADCIND3"], + pin60: ["ADCIND4"], + pin61: ["VDD3"], + pin62: ["VDDIO6"], + pin63: ["GPIO30"], + pin64: ["GPIO28"], + pin65: ["GPIO29"], + pin66: ["GPIO31"], + pin67: ["GPIO32"], + pin68: ["VDDIO7"], + pin69: ["GPIO33"], + pin70: ["GPIO34"], + pin71: ["GPIO35"], + pin72: ["VDD3VFL"], + pin73: ["FLT1"], + pin74: ["FLT2"], + pin75: ["VDDIO8"], + pin76: ["VDD4"], + pin77: ["TDI"], + pin78: ["TDO"], + pin79: ["TRST"], + pin80: ["TMS"], + pin81: ["TCK"], + pin82: ["VDDIO9"], + pin83: ["GPIO36"], + pin84: ["GPIO37"], + pin85: ["GPIO38"], + pin86: ["GPIO39"], + pin87: ["GPIO40"], + pin88: ["VDDIO10"], + pin89: ["GPIO41"], + pin90: ["GPIO48"], + pin91: ["VDDIO11"], + pin92: ["ERRORSTS"], + pin93: ["GPIO49"], + pin94: ["GPIO50"], + pin95: ["GPIO51"], + pin96: ["GPIO52"], + pin97: ["GPIO53"], + pin98: ["GPIO54"], + pin99: ["VDDIO12"], + pin100: ["GPIO55"], + pin101: ["GPIO56"], + pin102: ["GPIO57"], + pin103: ["GPIO58"], + pin104: ["GPIO59"], + pin105: ["GPIO60"], + pin106: ["VDDIO13"], + pin107: ["GPIO61"], + pin108: ["GPIO62"], + pin109: ["GPIO63"], + pin110: ["GPIO64"], + pin111: ["GPIO65"], + pin112: ["GPIO66"], + pin113: ["GPIO44"], + pin114: ["VDDIO14"], + pin115: ["GPIO45"], + pin116: ["VDDIO15"], + pin117: ["VDD5"], + pin118: ["GPIO133"], + pin119: ["VREGENZ"], + pin120: ["VDDOSC1"], + pin121: ["X2"], + pin122: ["VSSOSC"], + pin123: ["X1"], + pin124: ["XRS"], + pin125: ["VDDOSC2"], + pin126: ["VDD6"], + pin127: ["VDDIO16"], + pin128: ["GPIO46"], + pin129: ["GPIO47"], + pin130: ["GPIO42"], + pin131: ["GPIO43"], + pin132: ["GPIO67"], + pin133: ["GPIO68"], + pin134: ["GPIO69"], + pin135: ["GPIO70"], + pin136: ["GPIO71"], + pin137: ["VDD7"], + pin138: ["VDDIO17"], + pin139: ["GPIO72"], + pin140: ["GPIO73"], + pin141: ["GPIO74"], + pin142: ["GPIO75"], + pin143: ["GPIO76"], + pin144: ["GPIO77"], + pin145: ["GPIO78"], + pin146: ["GPIO79"], + pin147: ["VDDIO18"], + pin148: ["GPIO80"], + pin149: ["GPIO81"], + pin150: ["GPIO82"], + pin151: ["GPIO83"], + pin152: ["VDDIO19"], + pin153: ["VDD8"], + pin154: ["GPIO84"], + pin155: ["GPIO85"], + pin156: ["GPIO86"], + pin157: ["GPIO87"], + pin158: ["VDD9"], + pin159: ["VDDIO20"], + pin160: ["GPIO0"], + pin161: ["GPIO1"], + pin162: ["GPIO2"], + pin163: ["GPIO3"], + pin164: ["GPIO4"], + pin165: ["GPIO5"], + pin166: ["GPIO6"], + pin167: ["GPIO7"], + pin168: ["VDDIO21"], + pin169: ["VDD10"], + pin170: ["GPIO88"], + pin171: ["GPIO89"], + pin172: ["GPIO90"], + pin173: ["GPIO91"], + pin174: ["GPIO92"], + pin175: ["GPIO93"], + pin176: ["GPIO94"], + pin177: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin36: { requiresPower: true }, + pin54: { requiresPower: true }, + pin61: { requiresPower: true }, + pin76: { requiresPower: true }, + pin117: { requiresPower: true }, + pin126: { requiresPower: true }, + pin137: { requiresPower: true }, + pin153: { requiresPower: true }, + pin158: { requiresPower: true }, + pin169: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin177: [...pinLabels["pin177"], "thermalpad"], +} as const; + +export const TMS320F28377SPTPQ = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28377SPTPQ; diff --git a/lib/chips/TMS320F28377SPTPS.circuit.tsx b/lib/chips/TMS320F28377SPTPS.circuit.tsx new file mode 100644 index 00000000..70833922 --- /dev/null +++ b/lib/chips/TMS320F28377SPTPS.circuit.tsx @@ -0,0 +1,228 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GPIO10"], + pin2: ["GPIO11"], + pin3: ["VDDIO1"], + pin4: ["GPIO12"], + pin5: ["GPIO13"], + pin6: ["GPIO14"], + pin7: ["GPIO15"], + pin8: ["GPIO16"], + pin9: ["GPIO17"], + pin10: ["GPIO18"], + pin11: ["VDDIO2"], + pin12: ["GPIO19"], + pin13: ["GPIO20"], + pin14: ["GPIO21"], + pin15: ["VDDIO3"], + pin16: ["VDD1"], + pin17: ["GPIO99"], + pin18: ["GPIO8"], + pin19: ["GPIO9"], + pin20: ["VDDIO4"], + pin21: ["VDD2"], + pin22: ["GPIO22"], + pin23: ["GPIO23"], + pin24: ["GPIO24"], + pin25: ["GPIO25"], + pin26: ["VDDIO5"], + pin27: ["GPIO26"], + pin28: ["GPIO27"], + pin29: ["ADCINC4"], + pin30: ["ADCINC3"], + pin31: ["ADCINC2"], + pin32: ["VREFLOC"], + pin33: ["VREFLOA"], + pin34: ["VSSA1"], + pin35: ["VREFHIC"], + pin36: ["VDDA1"], + pin37: ["VREFHIA"], + pin38: ["ADCINA5"], + pin39: ["ADCINA4"], + pin40: ["ADCINA3"], + pin41: ["ADCINA2"], + pin42: ["ADCINA1"], + pin43: ["ADCINA0"], + pin44: ["ADCIN14"], + pin45: ["ADCIN15"], + pin46: ["ADCINB0"], + pin47: ["ADCINB1"], + pin48: ["ADCINB2"], + pin49: ["ADCINB3"], + pin50: ["VREFLOB"], + pin51: ["VREFLOD"], + pin52: ["VSSA2"], + pin53: ["VREFHIB"], + pin54: ["VDDA2"], + pin55: ["VREFHID"], + pin56: ["ADCIND0"], + pin57: ["ADCIND1"], + pin58: ["ADCIND2"], + pin59: ["ADCIND3"], + pin60: ["ADCIND4"], + pin61: ["VDD3"], + pin62: ["VDDIO6"], + pin63: ["GPIO30"], + pin64: ["GPIO28"], + pin65: ["GPIO29"], + pin66: ["GPIO31"], + pin67: ["GPIO32"], + pin68: ["VDDIO7"], + pin69: ["GPIO33"], + pin70: ["GPIO34"], + pin71: ["GPIO35"], + pin72: ["VDD3VFL"], + pin73: ["FLT1"], + pin74: ["FLT2"], + pin75: ["VDDIO8"], + pin76: ["VDD4"], + pin77: ["TDI"], + pin78: ["TDO"], + pin79: ["TRST"], + pin80: ["TMS"], + pin81: ["TCK"], + pin82: ["VDDIO9"], + pin83: ["GPIO36"], + pin84: ["GPIO37"], + pin85: ["GPIO38"], + pin86: ["GPIO39"], + pin87: ["GPIO40"], + pin88: ["VDDIO10"], + pin89: ["GPIO41"], + pin90: ["GPIO48"], + pin91: ["VDDIO11"], + pin92: ["ERRORSTS"], + pin93: ["GPIO49"], + pin94: ["GPIO50"], + pin95: ["GPIO51"], + pin96: ["GPIO52"], + pin97: ["GPIO53"], + pin98: ["GPIO54"], + pin99: ["VDDIO12"], + pin100: ["GPIO55"], + pin101: ["GPIO56"], + pin102: ["GPIO57"], + pin103: ["GPIO58"], + pin104: ["GPIO59"], + pin105: ["GPIO60"], + pin106: ["VDDIO13"], + pin107: ["GPIO61"], + pin108: ["GPIO62"], + pin109: ["GPIO63"], + pin110: ["GPIO64"], + pin111: ["GPIO65"], + pin112: ["GPIO66"], + pin113: ["GPIO44"], + pin114: ["VDDIO14"], + pin115: ["GPIO45"], + pin116: ["VDDIO15"], + pin117: ["VDD5"], + pin118: ["GPIO133"], + pin119: ["VREGENZ"], + pin120: ["VDDOSC1"], + pin121: ["X2"], + pin122: ["VSSOSC"], + pin123: ["X1"], + pin124: ["XRS"], + pin125: ["VDDOSC2"], + pin126: ["VDD6"], + pin127: ["VDDIO16"], + pin128: ["GPIO46"], + pin129: ["GPIO47"], + pin130: ["GPIO42"], + pin131: ["GPIO43"], + pin132: ["GPIO67"], + pin133: ["GPIO68"], + pin134: ["GPIO69"], + pin135: ["GPIO70"], + pin136: ["GPIO71"], + pin137: ["VDD7"], + pin138: ["VDDIO17"], + pin139: ["GPIO72"], + pin140: ["GPIO73"], + pin141: ["GPIO74"], + pin142: ["GPIO75"], + pin143: ["GPIO76"], + pin144: ["GPIO77"], + pin145: ["GPIO78"], + pin146: ["GPIO79"], + pin147: ["VDDIO18"], + pin148: ["GPIO80"], + pin149: ["GPIO81"], + pin150: ["GPIO82"], + pin151: ["GPIO83"], + pin152: ["VDDIO19"], + pin153: ["VDD8"], + pin154: ["GPIO84"], + pin155: ["GPIO85"], + pin156: ["GPIO86"], + pin157: ["GPIO87"], + pin158: ["VDD9"], + pin159: ["VDDIO20"], + pin160: ["GPIO0"], + pin161: ["GPIO1"], + pin162: ["GPIO2"], + pin163: ["GPIO3"], + pin164: ["GPIO4"], + pin165: ["GPIO5"], + pin166: ["GPIO6"], + pin167: ["GPIO7"], + pin168: ["VDDIO21"], + pin169: ["VDD10"], + pin170: ["GPIO88"], + pin171: ["GPIO89"], + pin172: ["GPIO90"], + pin173: ["GPIO91"], + pin174: ["GPIO92"], + pin175: ["GPIO93"], + pin176: ["GPIO94"], + pin177: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin36: { requiresPower: true }, + pin54: { requiresPower: true }, + pin61: { requiresPower: true }, + pin76: { requiresPower: true }, + pin117: { requiresPower: true }, + pin126: { requiresPower: true }, + pin137: { requiresPower: true }, + pin153: { requiresPower: true }, + pin158: { requiresPower: true }, + pin169: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin177: [...pinLabels["pin177"], "thermalpad"], +} as const; + +export const TMS320F28377SPTPS = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS320F28377SPTPS; diff --git a/lib/chips/TMS320F28379DZWTT.circuit.tsx b/lib/chips/TMS320F28379DZWTT.circuit.tsx new file mode 100644 index 00000000..276b12bb --- /dev/null +++ b/lib/chips/TMS320F28379DZWTT.circuit.tsx @@ -0,0 +1,3504 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin18: ["VREFHIA", "V1"], + pin95: ["VREFHIB", "W5"], + pin15: ["VREFHIC", "R1"], + pin94: ["VREFHID", "V5"], + pin34: ["VREFLOA", "R2"], + pin113: ["VREFLOB", "V6"], + pin33: ["VREFLOC", "P2"], + pin114: ["VREFLOD", "W6"], + pin73: ["ADCIN14", "T4"], + pin74: ["ADCIN15", "U4"], + pin17: ["ADCINA0", "U1"], + pin16: ["ADCINA1", "T1"], + pin36: ["ADCINA2", "U2"], + pin35: ["ADCINA3", "T2"], + pin55: ["ADCINA4", "U3"], + pin54: ["ADCINA5", "T3"], + pin37: ["ADCINB0", "V2"], + pin38: ["ADCINB1", "W2"], + pin56: ["ADCINB2", "V3"], + pin57: ["ADCINB3", "W3"], + pin75: ["ADCINB4", "V4"], + pin76: ["ADCINB5", "W4"], + pin53: ["ADCINC2", "R3"], + pin52: ["ADCINC3", "P3"], + pin72: ["ADCINC4", "R4"], + pin71: ["ADCINC5", "P4"], + pin92: ["ADCIND0", "T5"], + pin93: ["ADCIND1", "U5"], + pin111: ["ADCIND2", "T6"], + pin112: ["ADCIND3", "U6"], + pin123: ["ADCIND4", "T7"], + pin124: ["ADCIND5", "U7"], + pin129: ["GPIO0", "C8"], + pin130: ["GPIO1", "D8"], + pin115: ["GPIO2", "A7"], + pin116: ["GPIO3", "B7"], + pin117: ["GPIO4", "C7"], + pin118: ["GPIO5", "D7"], + pin96: ["GPIO6", "A6"], + pin97: ["GPIO7", "B6"], + pin26: ["GPIO8", "G2"], + pin45: ["GPIO9", "G3"], + pin21: ["GPIO10", "B2"], + pin3: ["GPIO11", "C1"], + pin22: ["GPIO12", "C2"], + pin4: ["GPIO13", "D1"], + pin23: ["GPIO14", "D2"], + pin42: ["GPIO15", "D3"], + pin5: ["GPIO16", "E1"], + pin24: ["GPIO17", "E2"], + pin43: ["GPIO18", "E3"], + pin62: ["GPIO19", "E4"], + pin25: ["GPIO20", "F2"], + pin44: ["GPIO21", "F3"], + pin66: ["GPIO22", "J4"], + pin67: ["GPIO23", "K4"], + pin48: ["GPIO24", "K3"], + pin29: ["GPIO25", "K2"], + pin10: ["GPIO26", "K1"], + pin11: ["GPIO27", "L1"], + pin193: ["GPIO28", "V11"], + pin194: ["GPIO29", "W11"], + pin191: ["GPIO30", "T11"], + pin192: ["GPIO31", "U11"], + pin221: ["GPIO32", "U13"], + pin220: ["GPIO33", "T13"], + pin240: ["GPIO34", "U14"], + pin239: ["GPIO35", "T14"], + pin279: ["GPIO36", "V16"], + pin278: ["GPIO37", "U16"], + pin277: ["GPIO38", "T16"], + pin299: ["GPIO39", "W17"], + pin298: ["GPIO40", "V17"], + pin297: ["GPIO41", "U17"], + pin322: ["GPIO42", "D19"], + pin321: ["GPIO43", "C19"], + pin309: ["GPIO44", "K18"], + pin328: ["GPIO45", "K19"], + pin323: ["GPIO46", "E19"], + pin304: ["GPIO47", "E18"], + pin276: ["GPIO48", "R16"], + pin295: ["GPIO49", "R17"], + pin314: ["GPIO50", "R18"], + pin333: ["GPIO51", "R19"], + pin275: ["GPIO52", "P16"], + pin294: ["GPIO53", "P17"], + pin313: ["GPIO54", "P18"], + pin332: ["GPIO55", "P19"], + pin274: ["GPIO56", "N16"], + pin312: ["GPIO57", "N18"], + pin293: ["GPIO58", "N17"], + pin273: ["GPIO59", "M16"], + pin292: ["GPIO60", "M17"], + pin272: ["GPIO61", "L16"], + pin289: ["GPIO62", "J17"], + pin270: ["GPIO63", "J16"], + pin291: ["GPIO64", "L17"], + pin271: ["GPIO65", "K16"], + pin290: ["GPIO66", "K17"], + pin320: ["GPIO67", "B19"], + pin302: ["GPIO68", "C18"], + pin301: ["GPIO69", "B18"], + pin281: ["GPIO70", "A17"], + pin282: ["GPIO71", "B17"], + pin263: ["GPIO72", "B16"], + pin262: ["GPIO73", "A16"], + pin283: ["GPIO74", "C17"], + pin265: ["GPIO75", "D16"], + pin264: ["GPIO76", "C16"], + pin243: ["GPIO77", "A15"], + pin244: ["GPIO78", "B15"], + pin245: ["GPIO79", "C15"], + pin246: ["GPIO80", "D15"], + pin224: ["GPIO81", "A14"], + pin225: ["GPIO82", "B14"], + pin226: ["GPIO83", "C14"], + pin178: ["GPIO84", "A11"], + pin179: ["GPIO85", "B11"], + pin180: ["GPIO86", "C11"], + pin181: ["GPIO87", "D11"], + pin98: ["GPIO88", "C6"], + pin99: ["GPIO89", "D6"], + pin77: ["GPIO90", "A5"], + pin78: ["GPIO91", "B5"], + pin58: ["GPIO92", "A4"], + pin59: ["GPIO93", "B4"], + pin39: ["GPIO94", "A3"], + pin40: ["GPIO95", "B3"], + pin41: ["GPIO96", "C3"], + pin20: ["GPIO97", "A2"], + pin6: ["GPIO98", "F1"], + pin7: ["GPIO99", "G1"], + pin8: ["GPIO100", "H1"], + pin27: ["GPIO101", "H2"], + pin46: ["GPIO102", "H3"], + pin9: ["GPIO103", "J1"], + pin28: ["GPIO104", "J2"], + pin47: ["GPIO105", "J3"], + pin30: ["GPIO106", "L2"], + pin49: ["GPIO107", "L3"], + pin68: ["GPIO108", "L4"], + pin32: ["GPIO109", "N2"], + pin31: ["GPIO110", "M2"], + pin69: ["GPIO111", "M4"], + pin50: ["GPIO112", "M3"], + pin70: ["GPIO113", "N4"], + pin51: ["GPIO114", "N3"], + pin210: ["GPIO115", "V12"], + pin177: ["GPIO116", "W10"], + pin209: ["GPIO117", "U12"], + pin208: ["GPIO118", "T12"], + pin258: ["GPIO119", "T15"], + pin259: ["GPIO120", "U15"], + pin280: ["GPIO121", "W16"], + pin140: ["GPIO122", "T8"], + pin141: ["GPIO123", "U8"], + pin142: ["GPIO124", "V8"], + pin157: ["GPIO125", "T9"], + pin158: ["GPIO126", "U9"], + pin159: ["GPIO127", "V9"], + pin160: ["GPIO128", "W9"], + pin174: ["GPIO129", "T10"], + pin175: ["GPIO130", "U10"], + pin176: ["GPIO131", "V10"], + pin318: ["GPIO132", "W18"], + pin306: ["GPIO133_AUXCLKIN", "G18"], + pin317: ["GPIO134", "V18"], + pin316: ["GPIO135", "U18"], + pin296: ["GPIO136", "T17"], + pin315: ["GPIO137", "T18"], + pin334: ["GPIO138", "T19"], + pin331: ["GPIO139", "N19"], + pin330: ["GPIO140", "M19"], + pin311: ["GPIO141", "M18"], + pin329: ["GPIO142", "L19"], + pin305: ["GPIO143", "F18"], + pin286: ["GPIO144", "F17"], + pin285: ["GPIO145", "E17"], + pin303: ["GPIO146", "D18"], + pin284: ["GPIO147", "D17"], + pin227: ["GPIO148", "D14"], + pin212: ["GPIO149", "A13"], + pin213: ["GPIO150", "B13"], + pin214: ["GPIO151", "C13"], + pin215: ["GPIO152", "D13"], + pin195: ["GPIO153", "A12"], + pin196: ["GPIO154", "B12"], + pin197: ["GPIO155", "C12"], + pin198: ["GPIO156", "D12"], + pin162: ["GPIO157", "B10"], + pin163: ["GPIO158", "C10"], + pin164: ["GPIO159", "D10"], + pin145: ["GPIO160", "B9"], + pin146: ["GPIO161", "C9"], + pin147: ["GPIO162", "D9"], + pin127: ["GPIO163", "A8"], + pin128: ["GPIO164", "B8"], + pin79: ["GPIO165", "C5"], + pin80: ["GPIO166", "D5"], + pin60: ["GPIO167", "C4"], + pin61: ["GPIO168", "D4"], + pin324: ["XRS", "F19"], + pin325: ["X1", "G19"], + pin327: ["X2", "J19"], + pin65: ["NC", "H4"], + pin260: ["TCK", "V15"], + pin223: ["TDI", "W13"], + pin261: ["TDO", "W15"], + pin242: ["TMS", "W14"], + pin241: ["TRST", "V14"], + pin308: ["VREGENZ", "J18"], + pin148: ["VDD", "E9", "VDD_E9"], + pin182: ["VDD", "E11", "VDD_E11"], + pin149: ["VDD", "F9", "VDD_F9"], + pin183: ["VDD", "F11", "VDD_F11"], + pin230: ["VDD", "G14", "VDD_G14"], + pin249: ["VDD", "G15", "VDD_G15"], + pin232: ["VDD", "J14", "VDD_J14"], + pin251: ["VDD", "J15", "VDD_J15"], + pin86: ["VDD", "K5", "VDD_K5"], + pin105: ["VDD", "K6", "VDD_K6"], + pin172: ["VDD", "P10", "VDD_P10"], + pin218: ["VDD", "P13", "VDD_P13"], + pin173: ["VDD", "R10", "VDD_R10"], + pin219: ["VDD", "R13", "VDD_R13"], + pin190: ["VDD3VFL", "R11", "VDD3VFL_R11"], + pin207: ["VDD3VFL", "R12", "VDD3VFL_R12"], + pin109: ["VDDA", "P6", "VDDA_P6"], + pin110: ["VDDA", "R6", "VDDA_R6"], + pin144: ["VDDIO", "A9", "VDDIO_A9"], + pin300: ["VDDIO", "A18", "VDDIO_A18"], + pin2: ["VDDIO", "B1", "VDDIO_B1"], + pin119: ["VDDIO", "E7", "VDDIO_E7"], + pin165: ["VDDIO", "E10", "VDDIO_E10"], + pin216: ["VDDIO", "E13", "VDDIO_E13"], + pin266: ["VDDIO", "E16", "VDDIO_E16"], + pin63: ["VDDIO", "F4", "VDDIO_F4"], + pin120: ["VDDIO", "F7", "VDDIO_F7"], + pin166: ["VDDIO", "F10", "VDDIO_F10"], + pin217: ["VDDIO", "F13", "VDDIO_F13"], + pin267: ["VDDIO", "F16", "VDDIO_F16"], + pin64: ["VDDIO", "G4", "VDDIO_G4"], + pin83: ["VDDIO", "G5", "VDDIO_G5"], + pin102: ["VDDIO", "G6", "VDDIO_G6"], + pin84: ["VDDIO", "H5", "VDDIO_H5"], + pin103: ["VDDIO", "H6", "VDDIO_H6"], + pin234: ["VDDIO", "L14", "VDDIO_L14"], + pin253: ["VDDIO", "L15", "VDDIO_L15"], + pin12: ["VDDIO", "M1", "VDDIO_M1"], + pin88: ["VDDIO", "M5", "VDDIO_M5"], + pin107: ["VDDIO", "M6", "VDDIO_M6"], + pin236: ["VDDIO", "N14", "VDDIO_N14"], + pin255: ["VDDIO", "N15", "VDDIO_N15"], + pin155: ["VDDIO", "P9", "VDDIO_P9"], + pin156: ["VDDIO", "R9", "VDDIO_R9"], + pin336: ["VDDIO", "V19", "VDDIO_V19"], + pin143: ["VDDIO", "W8", "VDDIO_W8"], + pin269: ["VDDOSC", "H16", "VDDOSC_H16"], + pin288: ["VDDOSC", "H17", "VDDOSC_H17"], + pin1: ["VSS", "A1", "VSS_A1"], + pin161: ["VSS", "A10", "VSS_A10"], + pin319: ["VSS", "A19", "VSS_A19"], + pin81: ["VSS", "E5", "VSS_E5"], + pin100: ["VSS", "E6", "VSS_E6"], + pin131: ["VSS", "E8", "VSS_E8"], + pin199: ["VSS", "E12", "VSS_E12"], + pin228: ["VSS", "E14", "VSS_E14"], + pin247: ["VSS", "E15", "VSS_E15"], + pin82: ["VSS", "F5", "VSS_F5"], + pin101: ["VSS", "F6", "VSS_F6"], + pin132: ["VSS", "F8", "VSS_F8"], + pin200: ["VSS", "F12", "VSS_F12"], + pin229: ["VSS", "F14", "VSS_F14"], + pin248: ["VSS", "F15", "VSS_F15"], + pin268: ["VSS", "G16", "VSS_G16"], + pin287: ["VSS", "G17", "VSS_G17"], + pin133: ["VSS", "H8", "VSS_H8"], + pin150: ["VSS", "H9", "VSS_H9"], + pin167: ["VSS", "H10", "VSS_H10"], + pin184: ["VSS", "H11", "VSS_H11"], + pin201: ["VSS", "H12", "VSS_H12"], + pin231: ["VSS", "H14", "VSS_H14"], + pin250: ["VSS", "H15", "VSS_H15"], + pin85: ["VSS", "J5", "VSS_J5"], + pin104: ["VSS", "J6", "VSS_J6"], + pin134: ["VSS", "J8", "VSS_J8"], + pin151: ["VSS", "J9", "VSS_J9"], + pin168: ["VSS", "J10", "VSS_J10"], + pin185: ["VSS", "J11", "VSS_J11"], + pin202: ["VSS", "J12", "VSS_J12"], + pin135: ["VSS", "K8", "VSS_K8"], + pin152: ["VSS", "K9", "VSS_K9"], + pin169: ["VSS", "K10", "VSS_K10"], + pin186: ["VSS", "K11", "VSS_K11"], + pin203: ["VSS", "K12", "VSS_K12"], + pin233: ["VSS", "K14", "VSS_K14"], + pin252: ["VSS", "K15", "VSS_K15"], + pin87: ["VSS", "L5", "VSS_L5"], + pin106: ["VSS", "L6", "VSS_L6"], + pin136: ["VSS", "L8", "VSS_L8"], + pin153: ["VSS", "L9", "VSS_L9"], + pin170: ["VSS", "L10", "VSS_L10"], + pin187: ["VSS", "L11", "VSS_L11"], + pin204: ["VSS", "L12", "VSS_L12"], + pin310: ["VSS", "L18", "VSS_L18"], + pin137: ["VSS", "M8", "VSS_M8"], + pin154: ["VSS", "M9", "VSS_M9"], + pin171: ["VSS", "M10", "VSS_M10"], + pin188: ["VSS", "M11", "VSS_M11"], + pin205: ["VSS", "M12", "VSS_M12"], + pin235: ["VSS", "M14", "VSS_M14"], + pin254: ["VSS", "M15", "VSS_M15"], + pin13: ["VSS", "N1", "VSS_N1"], + pin89: ["VSS", "N5", "VSS_N5"], + pin108: ["VSS", "N6", "VSS_N6"], + pin121: ["VSS", "P7", "VSS_P7"], + pin138: ["VSS", "P8", "VSS_P8"], + pin189: ["VSS", "P11", "VSS_P11"], + pin206: ["VSS", "P12", "VSS_P12"], + pin237: ["VSS", "P14", "VSS_P14"], + pin256: ["VSS", "P15", "VSS_P15"], + pin122: ["VSS", "R7", "VSS_R7"], + pin139: ["VSS", "R8", "VSS_R8"], + pin238: ["VSS", "R14", "VSS_R14"], + pin257: ["VSS", "R15", "VSS_R15"], + pin126: ["VSS", "W7", "VSS_W7"], + pin337: ["VSS", "W19", "VSS_W19"], + pin307: ["VSSOSC", "H18", "VSSOSC_H18"], + pin326: ["VSSOSC", "H19", "VSSOSC_H19"], + pin14: ["VSSA", "P1", "VSSA_P1"], + pin90: ["VSSA", "P5", "VSSA_P5"], + pin91: ["VSSA", "R5", "VSSA_R5"], + pin125: ["VSSA", "V7", "VSSA_V7"], + pin19: ["VSSA", "W1", "VSSA_W1"], + pin335: ["ERRORSTS", "U19"], + pin211: ["FLT1", "W12"], + pin222: ["FLT2", "V13"], +} as const; + +const pinRoles = { + pin18: "input", + pin95: "input", + pin15: "input", + pin94: "input", + pin34: "input", + pin113: "input", + pin33: "input", + pin114: "input", + pin73: "input", + pin74: "input", + pin17: "input", + pin16: "input", + pin36: "input", + pin35: "input", + pin55: "input", + pin54: "input", + pin37: "input", + pin38: "input", + pin56: "input", + pin57: "input", + pin75: "input", + pin76: "input", + pin53: "input", + pin52: "input", + pin72: "input", + pin71: "input", + pin92: "input", + pin93: "input", + pin111: "input", + pin112: "input", + pin123: "input", + pin124: "input", + pin129: "bidirectional", + pin130: "bidirectional", + pin115: "bidirectional", + pin116: "bidirectional", + pin117: "bidirectional", + pin118: "bidirectional", + pin96: "bidirectional", + pin97: "bidirectional", + pin26: "bidirectional", + pin45: "bidirectional", + pin21: "bidirectional", + pin3: "bidirectional", + pin22: "bidirectional", + pin4: "bidirectional", + pin23: "bidirectional", + pin42: "bidirectional", + pin5: "bidirectional", + pin24: "bidirectional", + pin43: "bidirectional", + pin62: "bidirectional", + pin25: "bidirectional", + pin44: "bidirectional", + pin66: "bidirectional", + pin67: "bidirectional", + pin48: "bidirectional", + pin29: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin193: "bidirectional", + pin194: "bidirectional", + pin191: "bidirectional", + pin192: "bidirectional", + pin221: "bidirectional", + pin220: "bidirectional", + pin240: "bidirectional", + pin239: "bidirectional", + pin279: "bidirectional", + pin278: "bidirectional", + pin277: "bidirectional", + pin299: "bidirectional", + pin298: "bidirectional", + pin297: "bidirectional", + pin322: "bidirectional", + pin321: "bidirectional", + pin309: "bidirectional", + pin328: "bidirectional", + pin323: "bidirectional", + pin304: "bidirectional", + pin276: "bidirectional", + pin295: "bidirectional", + pin314: "bidirectional", + pin333: "bidirectional", + pin275: "bidirectional", + pin294: "bidirectional", + pin313: "bidirectional", + pin332: "bidirectional", + pin274: "bidirectional", + pin312: "bidirectional", + pin293: "bidirectional", + pin273: "bidirectional", + pin292: "bidirectional", + pin272: "bidirectional", + pin289: "bidirectional", + pin270: "bidirectional", + pin291: "bidirectional", + pin271: "bidirectional", + pin290: "bidirectional", + pin320: "bidirectional", + pin302: "bidirectional", + pin301: "bidirectional", + pin281: "bidirectional", + pin282: "bidirectional", + pin263: "bidirectional", + pin262: "bidirectional", + pin283: "bidirectional", + pin265: "bidirectional", + pin264: "bidirectional", + pin243: "bidirectional", + pin244: "bidirectional", + pin245: "bidirectional", + pin246: "bidirectional", + pin224: "bidirectional", + pin225: "bidirectional", + pin226: "bidirectional", + pin178: "bidirectional", + pin179: "bidirectional", + pin180: "bidirectional", + pin181: "bidirectional", + pin98: "bidirectional", + pin99: "bidirectional", + pin77: "bidirectional", + pin78: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin39: "bidirectional", + pin40: "bidirectional", + pin41: "bidirectional", + pin20: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin27: "bidirectional", + pin46: "bidirectional", + pin9: "bidirectional", + pin28: "bidirectional", + pin47: "bidirectional", + pin30: "bidirectional", + pin49: "bidirectional", + pin68: "bidirectional", + pin32: "bidirectional", + pin31: "bidirectional", + pin69: "bidirectional", + pin50: "bidirectional", + pin70: "bidirectional", + pin51: "bidirectional", + pin210: "bidirectional", + pin177: "bidirectional", + pin209: "bidirectional", + pin208: "bidirectional", + pin258: "bidirectional", + pin259: "bidirectional", + pin280: "bidirectional", + pin140: "bidirectional", + pin141: "bidirectional", + pin142: "bidirectional", + pin157: "bidirectional", + pin158: "bidirectional", + pin159: "bidirectional", + pin160: "bidirectional", + pin174: "bidirectional", + pin175: "bidirectional", + pin176: "bidirectional", + pin318: "bidirectional", + pin306: "bidirectional", + pin317: "bidirectional", + pin316: "bidirectional", + pin296: "bidirectional", + pin315: "bidirectional", + pin334: "bidirectional", + pin331: "bidirectional", + pin330: "bidirectional", + pin311: "bidirectional", + pin329: "bidirectional", + pin305: "bidirectional", + pin286: "bidirectional", + pin285: "bidirectional", + pin303: "bidirectional", + pin284: "bidirectional", + pin227: "bidirectional", + pin212: "bidirectional", + pin213: "bidirectional", + pin214: "bidirectional", + pin215: "bidirectional", + pin195: "bidirectional", + pin196: "bidirectional", + pin197: "bidirectional", + pin198: "bidirectional", + pin162: "bidirectional", + pin163: "bidirectional", + pin164: "bidirectional", + pin145: "bidirectional", + pin146: "bidirectional", + pin147: "bidirectional", + pin127: "bidirectional", + pin128: "bidirectional", + pin79: "bidirectional", + pin80: "bidirectional", + pin60: "bidirectional", + pin61: "bidirectional", + pin325: "input", + pin327: "output", + pin65: "no-connect", + pin260: "input", + pin223: "input", + pin242: "input", + pin241: "input", + pin308: "input", + pin148: "power", + pin182: "power", + pin149: "power", + pin183: "power", + pin230: "power", + pin249: "power", + pin232: "power", + pin251: "power", + pin86: "power", + pin105: "power", + pin172: "power", + pin218: "power", + pin173: "power", + pin219: "power", + pin190: "power", + pin207: "power", + pin109: "power", + pin110: "power", + pin144: "power", + pin300: "power", + pin2: "power", + pin119: "power", + pin165: "power", + pin216: "power", + pin266: "power", + pin63: "power", + pin120: "power", + pin166: "power", + pin217: "power", + pin267: "power", + pin64: "power", + pin83: "power", + pin102: "power", + pin84: "power", + pin103: "power", + pin234: "power", + pin253: "power", + pin12: "power", + pin88: "power", + pin107: "power", + pin236: "power", + pin255: "power", + pin155: "power", + pin156: "power", + pin336: "power", + pin143: "power", + pin269: "power", + pin288: "power", + pin1: "ground", + pin161: "ground", + pin319: "ground", + pin81: "ground", + pin100: "ground", + pin131: "ground", + pin199: "ground", + pin228: "ground", + pin247: "ground", + pin82: "ground", + pin101: "ground", + pin132: "ground", + pin200: "ground", + pin229: "ground", + pin248: "ground", + pin268: "ground", + pin287: "ground", + pin133: "ground", + pin150: "ground", + pin167: "ground", + pin184: "ground", + pin201: "ground", + pin231: "ground", + pin250: "ground", + pin85: "ground", + pin104: "ground", + pin134: "ground", + pin151: "ground", + pin168: "ground", + pin185: "ground", + pin202: "ground", + pin135: "ground", + pin152: "ground", + pin169: "ground", + pin186: "ground", + pin203: "ground", + pin233: "ground", + pin252: "ground", + pin87: "ground", + pin106: "ground", + pin136: "ground", + pin153: "ground", + pin170: "ground", + pin187: "ground", + pin204: "ground", + pin310: "ground", + pin137: "ground", + pin154: "ground", + pin171: "ground", + pin188: "ground", + pin205: "ground", + pin235: "ground", + pin254: "ground", + pin13: "ground", + pin89: "ground", + pin108: "ground", + pin121: "ground", + pin138: "ground", + pin189: "ground", + pin206: "ground", + pin237: "ground", + pin256: "ground", + pin122: "ground", + pin139: "ground", + pin238: "ground", + pin257: "ground", + pin126: "ground", + pin337: "ground", + pin307: "no-connect", + pin326: "no-connect", + pin14: "ground", + pin90: "ground", + pin91: "ground", + pin125: "ground", + pin19: "ground", + pin335: "output", + pin211: "bidirectional", + pin222: "bidirectional", +} as const; + +const pinAttributes = { + pin65: { + doNotConnect: true, + }, + pin148: { + requiresPower: true, + }, + pin182: { + requiresPower: true, + }, + pin149: { + requiresPower: true, + }, + pin183: { + requiresPower: true, + }, + pin230: { + requiresPower: true, + }, + pin249: { + requiresPower: true, + }, + pin232: { + requiresPower: true, + }, + pin251: { + requiresPower: true, + }, + pin86: { + requiresPower: true, + }, + pin105: { + requiresPower: true, + }, + pin172: { + requiresPower: true, + }, + pin218: { + requiresPower: true, + }, + pin173: { + requiresPower: true, + }, + pin219: { + requiresPower: true, + }, + pin190: { + requiresPower: true, + }, + pin207: { + requiresPower: true, + }, + pin109: { + requiresPower: true, + }, + pin110: { + requiresPower: true, + }, + pin144: { + requiresPower: true, + }, + pin300: { + requiresPower: true, + }, + pin2: { + requiresPower: true, + }, + pin119: { + requiresPower: true, + }, + pin165: { + requiresPower: true, + }, + pin216: { + requiresPower: true, + }, + pin266: { + requiresPower: true, + }, + pin63: { + requiresPower: true, + }, + pin120: { + requiresPower: true, + }, + pin166: { + requiresPower: true, + }, + pin217: { + requiresPower: true, + }, + pin267: { + requiresPower: true, + }, + pin64: { + requiresPower: true, + }, + pin83: { + requiresPower: true, + }, + pin102: { + requiresPower: true, + }, + pin84: { + requiresPower: true, + }, + pin103: { + requiresPower: true, + }, + pin234: { + requiresPower: true, + }, + pin253: { + requiresPower: true, + }, + pin12: { + requiresPower: true, + }, + pin88: { + requiresPower: true, + }, + pin107: { + requiresPower: true, + }, + pin236: { + requiresPower: true, + }, + pin255: { + requiresPower: true, + }, + pin155: { + requiresPower: true, + }, + pin156: { + requiresPower: true, + }, + pin336: { + requiresPower: true, + }, + pin143: { + requiresPower: true, + }, + pin269: { + requiresPower: true, + }, + pin288: { + requiresPower: true, + }, + pin1: { + requiresGround: true, + }, + pin161: { + requiresGround: true, + }, + pin319: { + requiresGround: true, + }, + pin81: { + requiresGround: true, + }, + pin100: { + requiresGround: true, + }, + pin131: { + requiresGround: true, + }, + pin199: { + requiresGround: true, + }, + pin228: { + requiresGround: true, + }, + pin247: { + requiresGround: true, + }, + pin82: { + requiresGround: true, + }, + pin101: { + requiresGround: true, + }, + pin132: { + requiresGround: true, + }, + pin200: { + requiresGround: true, + }, + pin229: { + requiresGround: true, + }, + pin248: { + requiresGround: true, + }, + pin268: { + requiresGround: true, + }, + pin287: { + requiresGround: true, + }, + pin133: { + requiresGround: true, + }, + pin150: { + requiresGround: true, + }, + pin167: { + requiresGround: true, + }, + pin184: { + requiresGround: true, + }, + pin201: { + requiresGround: true, + }, + pin231: { + requiresGround: true, + }, + pin250: { + requiresGround: true, + }, + pin85: { + requiresGround: true, + }, + pin104: { + requiresGround: true, + }, + pin134: { + requiresGround: true, + }, + pin151: { + requiresGround: true, + }, + pin168: { + requiresGround: true, + }, + pin185: { + requiresGround: true, + }, + pin202: { + requiresGround: true, + }, + pin135: { + requiresGround: true, + }, + pin152: { + requiresGround: true, + }, + pin169: { + requiresGround: true, + }, + pin186: { + requiresGround: true, + }, + pin203: { + requiresGround: true, + }, + pin233: { + requiresGround: true, + }, + pin252: { + requiresGround: true, + }, + pin87: { + requiresGround: true, + }, + pin106: { + requiresGround: true, + }, + pin136: { + requiresGround: true, + }, + pin153: { + requiresGround: true, + }, + pin170: { + requiresGround: true, + }, + pin187: { + requiresGround: true, + }, + pin204: { + requiresGround: true, + }, + pin310: { + requiresGround: true, + }, + pin137: { + requiresGround: true, + }, + pin154: { + requiresGround: true, + }, + pin171: { + requiresGround: true, + }, + pin188: { + requiresGround: true, + }, + pin205: { + requiresGround: true, + }, + pin235: { + requiresGround: true, + }, + pin254: { + requiresGround: true, + }, + pin13: { + requiresGround: true, + }, + pin89: { + requiresGround: true, + }, + pin108: { + requiresGround: true, + }, + pin121: { + requiresGround: true, + }, + pin138: { + requiresGround: true, + }, + pin189: { + requiresGround: true, + }, + pin206: { + requiresGround: true, + }, + pin237: { + requiresGround: true, + }, + pin256: { + requiresGround: true, + }, + pin122: { + requiresGround: true, + }, + pin139: { + requiresGround: true, + }, + pin238: { + requiresGround: true, + }, + pin257: { + requiresGround: true, + }, + pin126: { + requiresGround: true, + }, + pin337: { + requiresGround: true, + }, + pin307: { + doNotConnect: true, + }, + pin326: { + doNotConnect: true, + }, + pin14: { + requiresGround: true, + }, + pin90: { + requiresGround: true, + }, + pin91: { + requiresGround: true, + }, + pin125: { + requiresGround: true, + }, + pin19: { + requiresGround: true, + }, +} as const; + +export const TMS320F28379DZWTT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1337243.obj?uuid=2811efaada1747c29eedfde542830240", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1337243.step?uuid=2811efaada1747c29eedfde542830240", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.6 }, + }} + {...props} + /> + ); +}; + +export default TMS320F28379DZWTT; diff --git a/lib/chips/TMS5700432BPZQQ1R.circuit.tsx b/lib/chips/TMS5700432BPZQQ1R.circuit.tsx new file mode 100644 index 00000000..9988e89c --- /dev/null +++ b/lib/chips/TMS5700432BPZQQ1R.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["FLTP1"], + pin4: ["FLTP2"], + pin5: ["pin5"], + pin6: ["VCCIO1"], + pin7: ["VSS1"], + pin8: ["pin8"], + pin9: ["pin9"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["pin12"], + pin13: ["VCC1"], + pin14: ["OSCIN"], + pin15: ["KELVIN_GND"], + pin16: ["OSCOUT"], + pin17: ["VSS2"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["VSS3"], + pin21: ["VCC2"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["TEST"], + pin25: ["pin25"], + pin26: ["pin26"], + pin27: ["pin27"], + pin28: ["VCCIO2"], + pin29: ["VSS4"], + pin30: ["VCC3"], + pin31: ["nPORRST"], + pin32: ["VCC4"], + pin33: ["VSS5"], + pin34: ["SPI3SOMI"], + pin35: ["SPI3SIMO"], + pin36: ["SPI3CLK"], + pin37: ["SPI3nENA"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["pin43"], + pin44: ["pin44"], + pin45: ["pin45"], + pin46: ["pin46"], + pin47: ["pin47"], + pin48: ["pin48"], + pin49: ["pin49"], + pin50: ["pin50"], + pin51: ["pin51"], + pin52: ["pin52"], + pin53: ["pin53"], + pin54: ["pin54"], + pin55: ["pin55"], + pin56: ["pin56"], + pin57: ["pin57"], + pin58: ["ADEVT"], + pin59: ["VSS6"], + pin60: ["VCCIO3"], + pin61: ["VCC5"], + pin62: ["CAN1TX"], + pin63: ["CAN1RX"], + pin64: ["pin64"], + pin65: ["MIBSPI1SIMO"], + pin66: ["MIBSPI1SOMI"], + pin67: ["MIBSPI1CLK"], + pin68: ["MIBSPI1nENA"], + pin69: ["SPI2SOMI"], + pin70: ["SPI2SIMO"], + pin71: ["SPI2CLK"], + pin72: ["VSS7"], + pin73: ["pin73"], + pin74: ["pin74"], + pin75: ["TMS"], + pin76: ["nTRST"], + pin77: ["TDI"], + pin78: ["TDO"], + pin79: ["TCK"], + pin80: ["RTCK"], + pin81: ["nRST"], + pin82: ["nERROR"], + pin83: ["pin83"], + pin84: ["ECLK"], + pin85: ["VCCIO4"], + pin86: ["VSS8"], + pin87: ["VSS9"], + pin88: ["VCC6"], + pin89: ["pin89"], + pin90: ["pin90"], + pin91: ["CAN2TX"], + pin92: ["CAN2RX"], + pin93: ["pin93"], + pin94: ["LINRX"], + pin95: ["LINTX"], + pin96: ["VCCP"], + pin97: ["pin97"], + pin98: ["pin98"], + pin99: ["VCC7"], + pin100: ["VSS10"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin13: { requiresPower: true }, + pin17: { requiresGround: true }, + pin20: { requiresGround: true }, + pin21: { requiresPower: true }, + pin29: { requiresGround: true }, + pin30: { requiresPower: true }, + pin32: { requiresPower: true }, + pin33: { requiresGround: true }, + pin59: { requiresGround: true }, + pin61: { requiresPower: true }, + pin72: { requiresGround: true }, + pin86: { requiresGround: true }, + pin87: { requiresGround: true }, + pin88: { requiresPower: true }, + pin99: { requiresPower: true }, + pin100: { requiresGround: true }, +} as const; + +export const TMS5700432BPZQQ1R = (props: ChipProps) => { + return ( + + ); +}; + +export default TMS5700432BPZQQ1R; diff --git a/lib/chips/TMUX1104DGSR.circuit.tsx b/lib/chips/TMUX1104DGSR.circuit.tsx new file mode 100644 index 00000000..d9bea08c --- /dev/null +++ b/lib/chips/TMUX1104DGSR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A0"], + pin2: ["S1"], + pin3: ["GND"], + pin4: ["S3"], + pin5: ["EN"], + pin6: ["VDD"], + pin7: ["S4"], + pin8: ["D"], + pin9: ["S2"], + pin10: ["A1"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const TMUX1104DGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMUX1104DGSR; diff --git a/lib/chips/TMUX1308APWR.circuit.tsx b/lib/chips/TMUX1308APWR.circuit.tsx new file mode 100644 index 00000000..a6fc5b6f --- /dev/null +++ b/lib/chips/TMUX1308APWR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S4"], + pin2: ["S6"], + pin3: ["D"], + pin4: ["S7"], + pin5: ["S5"], + pin6: ["EN"], + pin7: ["pin7"], + pin8: ["GND"], + pin9: ["A2"], + pin10: ["A1"], + pin11: ["A0"], + pin12: ["S3"], + pin13: ["S0"], + pin14: ["S1"], + pin15: ["S2"], + pin16: ["VDD"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const TMUX1308APWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMUX1308APWR; diff --git a/lib/chips/TMUX1574DYYR.circuit.tsx b/lib/chips/TMUX1574DYYR.circuit.tsx new file mode 100644 index 00000000..3704c004 --- /dev/null +++ b/lib/chips/TMUX1574DYYR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SEL"], + pin2: ["S1A"], + pin3: ["S1B"], + pin4: ["D1"], + pin5: ["S2A"], + pin6: ["S2B"], + pin7: ["D2"], + pin8: ["GND"], + pin9: ["D3"], + pin10: ["S3B"], + pin11: ["S3A"], + pin12: ["D4"], + pin13: ["S4B"], + pin14: ["S4A"], + pin15: ["EN"], + pin16: ["VDD"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const TMUX1574DYYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMUX1574DYYR; diff --git a/lib/chips/TMUX4051BQBR.circuit.tsx b/lib/chips/TMUX4051BQBR.circuit.tsx new file mode 100644 index 00000000..0888a03a --- /dev/null +++ b/lib/chips/TMUX4051BQBR.circuit.tsx @@ -0,0 +1,266 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["S4"], + pin2: ["S6"], + pin3: ["D"], + pin4: ["S7"], + pin5: ["S5"], + pin6: ["EN"], + pin7: ["VSS"], + pin8: ["GND"], + pin9: ["A2"], + pin10: ["A1"], + pin11: ["A0"], + pin12: ["S3"], + pin13: ["S0"], + pin14: ["S1"], + pin15: ["S2"], + pin16: ["VDD"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin16: { requiresPower: true }, +} as const; + +export const TMUX4051BQBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20549631.obj?uuid=d7ad6cf1f0f24adebab4c383e7fe5bbe", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20549631.step?uuid=d7ad6cf1f0f24adebab4c383e7fe5bbe", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default TMUX4051BQBR; diff --git a/lib/chips/TMUX5411PWR.circuit.tsx b/lib/chips/TMUX5411PWR.circuit.tsx new file mode 100644 index 00000000..da10f17a --- /dev/null +++ b/lib/chips/TMUX5411PWR.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SEL1"], + pin2: ["D1"], + pin3: ["S1"], + pin4: ["VSS"], + pin5: ["GND"], + pin6: ["S4"], + pin7: ["D4"], + pin8: ["SEL4"], + pin9: ["SEL3"], + pin10: ["D3"], + pin11: ["S3"], + pin12: ["pin12"], + pin13: ["VDD"], + pin14: ["S2"], + pin15: ["D2"], + pin16: ["SEL2"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin13: { requiresPower: true }, +} as const; + +export const TMUX5411PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TMUX5411PWR; diff --git a/lib/chips/TMUXHS4212RKSR.circuit.tsx b/lib/chips/TMUXHS4212RKSR.circuit.tsx new file mode 100644 index 00000000..c1522ad8 --- /dev/null +++ b/lib/chips/TMUXHS4212RKSR.circuit.tsx @@ -0,0 +1,303 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RSVD1"], + pin2: ["OEn"], + pin3: ["A0p"], + pin4: ["A0n"], + pin5: ["GND3"], + pin6: ["VCC"], + pin7: ["A1p"], + pin8: ["A1n"], + pin9: ["SEL"], + pin10: ["RSVD2"], + pin11: ["GND2"], + pin12: ["C1n"], + pin13: ["C1p"], + pin14: ["C0n"], + pin15: ["C0p"], + pin16: ["B1n"], + pin17: ["B1p"], + pin18: ["B0n"], + pin19: ["B0p"], + pin20: ["GND1"], + pin21: ["EPAD"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { requiresPower: true }, + pin11: { requiresGround: true }, + pin20: { requiresGround: true }, +} as const; + +export const TMUXHS4212RKSR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2869871.obj?uuid=502e612e93bf4b46a2cadcb8cc804cf1", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2869871.step?uuid=502e612e93bf4b46a2cadcb8cc804cf1", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.03 }, + }} + {...props} + /> + ); +}; + +export default TMUXHS4212RKSR; diff --git a/lib/chips/TPD1E01B04DPYR.circuit.tsx b/lib/chips/TPD1E01B04DPYR.circuit.tsx new file mode 100644 index 00000000..65753c3f --- /dev/null +++ b/lib/chips/TPD1E01B04DPYR.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO", "1", "IO_1"], + pin2: ["IO", "2", "IO_2"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", +} as const; + +const pinAttributes = {} as const; + +export const TPD1E01B04DPYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD1E01B04DPYR; diff --git a/lib/chips/TPD1E04U04DPYT.circuit.tsx b/lib/chips/TPD1E04U04DPYT.circuit.tsx new file mode 100644 index 00000000..fb291f44 --- /dev/null +++ b/lib/chips/TPD1E04U04DPYT.circuit.tsx @@ -0,0 +1,32 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["K"], + pin2: ["A"], +} as const; + +export const TPD1E04U04DPYT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD1E04U04DPYT; diff --git a/lib/chips/TPD1E0B04DPLT.circuit.tsx b/lib/chips/TPD1E0B04DPLT.circuit.tsx new file mode 100644 index 00000000..446f9062 --- /dev/null +++ b/lib/chips/TPD1E0B04DPLT.circuit.tsx @@ -0,0 +1,27 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO", "1", "IO_1"], + pin2: ["IO", "2", "IO_2"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "bidirectional", +} as const; + +export const TPD1E0B04DPLT = (props: ChipProps) => { + // Footprint provenance: TI drawing DPL0002A; official source https://www.ti.com/lit/gpn/TPD1E0B04 + return ( + + ); +}; + +export default TPD1E0B04DPLT; diff --git a/lib/chips/TPD1E10B06DYAR.circuit.tsx b/lib/chips/TPD1E10B06DYAR.circuit.tsx new file mode 100644 index 00000000..df309a52 --- /dev/null +++ b/lib/chips/TPD1E10B06DYAR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["I_O", "1"], + pin2: ["GND", "2"], +} as const; + +const pinRoles = { + pin2: "ground", +} as const; + +const pinAttributes = { + pin2: { + requiresGround: true, + }, +} as const; + +export const TPD1E10B06DYAR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD1E10B06DYAR; diff --git a/lib/chips/TPD1E1B04DPYR.circuit.tsx b/lib/chips/TPD1E1B04DPYR.circuit.tsx new file mode 100644 index 00000000..d0e48665 --- /dev/null +++ b/lib/chips/TPD1E1B04DPYR.circuit.tsx @@ -0,0 +1,36 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C"], + pin2: ["A"], +} as const; + +export const TPD1E1B04DPYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD1E1B04DPYR; diff --git a/lib/chips/TPD2E001DRSR.circuit.tsx b/lib/chips/TPD2E001DRSR.circuit.tsx new file mode 100644 index 00000000..cde32606 --- /dev/null +++ b/lib/chips/TPD2E001DRSR.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["pin2"], + pin3: ["IO1"], + pin4: ["GND1"], + pin5: ["pin5"], + pin6: ["IO2"], + pin7: ["GND2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TPD2E001DRSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD2E001DRSR; diff --git a/lib/chips/TPD2E007DCKR.circuit.tsx b/lib/chips/TPD2E007DCKR.circuit.tsx new file mode 100644 index 00000000..8fe86f0b --- /dev/null +++ b/lib/chips/TPD2E007DCKR.circuit.tsx @@ -0,0 +1,109 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin3: ["GND", "3"], + pin1: ["IO1", "1"], + pin2: ["IO2", "2"], +} as const; + +const pinRoles = { + pin3: "ground", + pin1: "bidirectional", + pin2: "bidirectional", +} as const; + +const pinAttributes = { + pin3: { + requiresGround: true, + }, +} as const; + +export const TPD2E007DCKR = (props: ChipProps) => { + return ( + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3011199.obj?uuid=788b28f834c14551a13b5249c70c550d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3011199.step?uuid=788b28f834c14551a13b5249c70c550d", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0.000012699999842880061, z: -0.075 }, + }} + {...props} + /> + ); +}; + +export default TPD2E007DCKR; diff --git a/lib/chips/TPD2E1B06DRLR.circuit.tsx b/lib/chips/TPD2E1B06DRLR.circuit.tsx new file mode 100644 index 00000000..e34fc4c9 --- /dev/null +++ b/lib/chips/TPD2E1B06DRLR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IOA1"], + pin2: ["IOB1"], + pin3: ["NC2"], + pin4: ["IOB2"], + pin5: ["IOA2"], + pin6: ["NC1"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin6: { doNotConnect: true }, +} as const; + +export const TPD2E1B06DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD2E1B06DRLR; diff --git a/lib/chips/TPD2E2U06DRLR.circuit.tsx b/lib/chips/TPD2E2U06DRLR.circuit.tsx new file mode 100644 index 00000000..aaeb778f --- /dev/null +++ b/lib/chips/TPD2E2U06DRLR.circuit.tsx @@ -0,0 +1,142 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NC2"], + pin2: ["NC1"], + pin3: ["IO1"], + pin4: ["GND"], + pin5: ["IO2"], +} as const; + +const pinAttributes = { + pin1: { doNotConnect: true }, + pin2: { doNotConnect: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPD2E2U06DRLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1972959.obj?uuid=ce682da4a06c4a098d062f74e6fe00c1", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1972959.step?uuid=ce682da4a06c4a098d062f74e6fe00c1", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.03 }, + }} + {...props} + /> + ); +}; + +export default TPD2E2U06DRLR; diff --git a/lib/chips/TPD2EUSB30DRTR.circuit.tsx b/lib/chips/TPD2EUSB30DRTR.circuit.tsx new file mode 100644 index 00000000..b59a70e7 --- /dev/null +++ b/lib/chips/TPD2EUSB30DRTR.circuit.tsx @@ -0,0 +1,111 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D_POS"], + pin2: ["D_NEG"], + pin3: ["GND"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const TPD2EUSB30DRTR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C97502.obj?uuid=7e46175b4c3341ab8d7b74e33c98b337", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C97502.step?uuid=7e46175b4c3341ab8d7b74e33c98b337", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0.000012700000070253736, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPD2EUSB30DRTR; diff --git a/lib/chips/TPD2S017DBVR.circuit.tsx b/lib/chips/TPD2S017DBVR.circuit.tsx new file mode 100644 index 00000000..382e7291 --- /dev/null +++ b/lib/chips/TPD2S017DBVR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CH1_OUT"], + pin2: ["GND"], + pin3: ["CH1_IN"], + pin4: ["CH2_IN"], + pin5: ["VCC"], + pin6: ["CH2_OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPD2S017DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C880115.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C880115.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default TPD2S017DBVR; diff --git a/lib/chips/TPD2S300YFFR.circuit.tsx b/lib/chips/TPD2S300YFFR.circuit.tsx new file mode 100644 index 00000000..59c1cc77 --- /dev/null +++ b/lib/chips/TPD2S300YFFR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C_CC1", "A1"], + pin2: ["VBIAS", "A2"], + pin3: ["C_CC2", "A3"], + pin4: ["CC1", "B1"], + pin5: ["GND", "B2"], + pin6: ["CC2", "B3"], + pin7: ["FLT", "C1"], + pin8: ["VPWR", "C2"], + pin9: ["VM", "C3"], +} as const; + +const pinRoles = { + pin1: "bidirectional", + pin2: "power", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "ground", + pin6: "bidirectional", + pin7: "output", + pin8: "power", + pin9: "input", +} as const; + +const pinAttributes = { + pin2: { + requiresPower: true, + }, + pin5: { + requiresGround: true, + }, + pin8: { + requiresPower: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin4: [...pinLabels["pin4"], "pin2"], + pin7: [...pinLabels["pin7"], "pin3"], + pin2: [...pinLabels["pin2"], "pin4"], + pin8: [...pinLabels["pin8"], "pin6"], + pin3: [...pinLabels["pin3"], "pin7"], + pin6: [...pinLabels["pin6"], "pin8"], +} as const; + +export const TPD2S300YFFR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD2S300YFFR; diff --git a/lib/chips/TPD4E001DCKR.circuit.tsx b/lib/chips/TPD4E001DCKR.circuit.tsx new file mode 100644 index 00000000..d09758b7 --- /dev/null +++ b/lib/chips/TPD4E001DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO1"], + pin2: ["GND"], + pin3: ["IO2"], + pin4: ["IO3"], + pin5: ["VCC"], + pin6: ["IO4"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPD4E001DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD4E001DCKR; diff --git a/lib/chips/TPD4E001QDBVRQ1.circuit.tsx b/lib/chips/TPD4E001QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..0ea09b93 --- /dev/null +++ b/lib/chips/TPD4E001QDBVRQ1.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1O"], + pin2: ["GND"], + pin3: ["IO2"], + pin4: ["IO3"], + pin5: ["VCC"], + pin6: ["IO4"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPD4E001QDBVRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1973712.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1973712.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default TPD4E001QDBVRQ1; diff --git a/lib/chips/TPD4E05U06DQAR.circuit.tsx b/lib/chips/TPD4E05U06DQAR.circuit.tsx new file mode 100644 index 00000000..be617a45 --- /dev/null +++ b/lib/chips/TPD4E05U06DQAR.circuit.tsx @@ -0,0 +1,190 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D1_POS"], + pin2: ["D1_NEG"], + pin3: ["GND1"], + pin4: ["D2_POS"], + pin5: ["D2_NEG"], + pin6: ["NC1"], + pin7: ["NC2"], + pin8: ["GND2"], + pin9: ["NC3"], + pin10: ["NC4"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { doNotConnect: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin9: { doNotConnect: true }, + pin10: { doNotConnect: true }, +} as const; + +export const TPD4E05U06DQAR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22390021.obj?uuid=c621c5ebf1564e4cb1736da0647d163e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22390021.step?uuid=c621c5ebf1564e4cb1736da0647d163e", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0.000012700000070253736, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPD4E05U06DQAR; diff --git a/lib/chips/TPD4E1U06DCKR.circuit.tsx b/lib/chips/TPD4E1U06DCKR.circuit.tsx new file mode 100644 index 00000000..b5950af5 --- /dev/null +++ b/lib/chips/TPD4E1U06DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D1_POS"], + pin2: ["GND"], + pin3: ["D2_POS"], + pin4: ["D2_NEG"], + pin5: ["NC"], + pin6: ["D1_NEG"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { doNotConnect: true }, +} as const; + +export const TPD4E1U06DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD4E1U06DCKR; diff --git a/lib/chips/TPD4F003DQDR.circuit.tsx b/lib/chips/TPD4F003DQDR.circuit.tsx new file mode 100644 index 00000000..977a174f --- /dev/null +++ b/lib/chips/TPD4F003DQDR.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["Ch1_In"], + pin2: ["Ch2_In"], + pin3: ["Ch3_In"], + pin4: ["Ch4_In"], + pin5: ["Ch4_Out"], + pin6: ["Ch3_Out"], + pin7: ["Ch2_Out"], + pin8: ["Ch1_Out"], + pin9: ["GND"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPD4F003DQDR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD4F003DQDR; diff --git a/lib/chips/TPD4S012DRYR.circuit.tsx b/lib/chips/TPD4S012DRYR.circuit.tsx new file mode 100644 index 00000000..ef501afd --- /dev/null +++ b/lib/chips/TPD4S012DRYR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D_POS"], + pin2: ["D_NEG"], + pin3: ["ID"], + pin4: ["GND"], + pin5: ["NC"], + pin6: ["VBUS"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { doNotConnect: true }, +} as const; + +export const TPD4S012DRYR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD4S012DRYR; diff --git a/lib/chips/TPD4S480RUKR.circuit.tsx b/lib/chips/TPD4S480RUKR.circuit.tsx new file mode 100644 index 00000000..86a7b406 --- /dev/null +++ b/lib/chips/TPD4S480RUKR.circuit.tsx @@ -0,0 +1,306 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C_SBU1"], + pin2: ["C_SBU2"], + pin3: ["VBIAS"], + pin4: ["C_CC1"], + pin5: ["C_CC2"], + pin6: ["RPD_G2"], + pin7: ["RPD_G1"], + pin8: ["GND3"], + pin9: ["FLT"], + pin10: ["VPWR"], + pin11: ["CC2"], + pin12: ["CC1"], + pin13: ["GND2"], + pin14: ["SBU2"], + pin15: ["SBU1"], + pin16: ["EPR_EN"], + pin17: ["EPR_BLK_G"], + pin18: ["GND1"], + pin19: ["VBUS_LV"], + pin20: ["VBUS"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin13: { requiresGround: true }, + pin18: { requiresGround: true }, +} as const; + +export const TPD4S480RUKR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43131250.obj?uuid=71760926877f42c6b0f5954e672bfe89", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C43131250.step?uuid=71760926877f42c6b0f5954e672bfe89", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.00015240000004723697, + y: -0.0001015999999935957, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPD4S480RUKR; diff --git a/lib/chips/TPD6E001RSFR.circuit.tsx b/lib/chips/TPD6E001RSFR.circuit.tsx new file mode 100644 index 00000000..5d341fa5 --- /dev/null +++ b/lib/chips/TPD6E001RSFR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO1"], + pin2: ["IO2"], + pin3: ["IO3"], + pin4: ["NC4"], + pin5: ["GND"], + pin6: ["NC3"], + pin7: ["IO4"], + pin8: ["IO5"], + pin9: ["IO6"], + pin10: ["NC2"], + pin11: ["VCC"], + pin12: ["NC1"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin4: { doNotConnect: true }, + pin5: { requiresGround: true }, + pin6: { doNotConnect: true }, + pin10: { doNotConnect: true }, + pin11: { requiresPower: true }, + pin12: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const TPD6E001RSFR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPD6E001RSFR; diff --git a/lib/chips/TPD6S300ARUKR.circuit.tsx b/lib/chips/TPD6S300ARUKR.circuit.tsx new file mode 100644 index 00000000..9a963dab --- /dev/null +++ b/lib/chips/TPD6S300ARUKR.circuit.tsx @@ -0,0 +1,302 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C_SUB1"], + pin2: ["C_SUB2"], + pin3: ["VBIAS"], + pin4: ["C_CC1"], + pin5: ["C_CC2"], + pin6: ["RPD_G2"], + pin7: ["RPD_G1"], + pin8: ["GND3"], + pin9: ["FLT"], + pin10: ["VPWR"], + pin11: ["CC2"], + pin12: ["CC1"], + pin13: ["GND2"], + pin14: ["SBU2"], + pin15: ["SUB1"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["GND1"], + pin19: ["D2"], + pin20: ["D1"], + pin21: ["PAD"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin13: { requiresGround: true }, + pin18: { requiresGround: true }, +} as const; + +export const TPD6S300ARUKR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876380.obj?uuid=71760926877f42c6b0f5954e672bfe89", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2876380.step?uuid=71760926877f42c6b0f5954e672bfe89", + pcbRotationOffset: 270, + modelOriginPosition: { x: 0, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPD6S300ARUKR; diff --git a/lib/chips/TPL5100DGSR.circuit.tsx b/lib/chips/TPL5100DGSR.circuit.tsx new file mode 100644 index 00000000..e67172a0 --- /dev/null +++ b/lib/chips/TPL5100DGSR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["D0"], + pin2: ["D1"], + pin3: ["D2"], + pin4: ["VDD"], + pin5: ["GND"], + pin6: ["DONE"], + pin7: ["TCAL"], + pin8: ["MOS_DRV"], + pin9: ["DNC"], + pin10: ["PGOOD"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const TPL5100DGSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPL5100DGSR; diff --git a/lib/chips/TPL5110DDCT.circuit.tsx b/lib/chips/TPL5110DDCT.circuit.tsx new file mode 100644 index 00000000..e767aa61 --- /dev/null +++ b/lib/chips/TPL5110DDCT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["pin3"], + pin4: ["DONE"], + pin5: ["DRV"], + pin6: ["pin6"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const TPL5110DDCT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPL5110DDCT; diff --git a/lib/chips/TPL5111DDCR.circuit.tsx b/lib/chips/TPL5111DDCR.circuit.tsx new file mode 100644 index 00000000..28a54376 --- /dev/null +++ b/lib/chips/TPL5111DDCR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["pin3"], + pin4: ["DONE"], + pin5: ["DRVn"], + pin6: ["pin6"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const TPL5111DDCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPL5111DDCR; diff --git a/lib/chips/TPL7407LADR.circuit.tsx b/lib/chips/TPL7407LADR.circuit.tsx new file mode 100644 index 00000000..df984757 --- /dev/null +++ b/lib/chips/TPL7407LADR.circuit.tsx @@ -0,0 +1,49 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["IN3"], + pin4: ["IN4"], + pin5: ["IN5"], + pin6: ["IN6"], + pin7: ["IN7"], + pin8: ["GND"], + pin9: ["COM"], + pin10: ["OUT7"], + pin11: ["OUT6"], + pin12: ["OUT5"], + pin13: ["OUT4"], + pin14: ["OUT3"], + pin15: ["OUT2"], + pin16: ["OUT1"], +} as const; + +export const TPL7407LADR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPL7407LADR; diff --git a/lib/chips/TPS16630PWPR.circuit.tsx b/lib/chips/TPS16630PWPR.circuit.tsx new file mode 100644 index 00000000..431f9c9b --- /dev/null +++ b/lib/chips/TPS16630PWPR.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["IN3"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["P_IN"], + pin7: ["UVLO"], + pin8: ["OVP"], + pin9: ["GND"], + pin10: ["dVdT"], + pin11: ["ILIM"], + pin12: ["MODE"], + pin13: ["SHDN"], + pin14: ["IMON"], + pin15: ["FLT"], + pin16: ["PGOOD"], + pin17: ["pin17"], + pin18: ["OUT3"], + pin19: ["OUT2"], + pin20: ["OUT1"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const TPS16630PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS16630PWPR; diff --git a/lib/chips/TPS1HC03PQVAHRQ1.circuit.tsx b/lib/chips/TPS1HC03PQVAHRQ1.circuit.tsx new file mode 100644 index 00000000..b1657d71 --- /dev/null +++ b/lib/chips/TPS1HC03PQVAHRQ1.circuit.tsx @@ -0,0 +1,210 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT", "1", "VOUT_1"], + pin2: ["VBB", "2"], + pin3: ["ILIM", "3"], + pin4: ["GND", "4"], + pin5: ["NC", "5", "NC_5"], + pin6: ["DIAG_EN", "6"], + pin7: ["EN", "7"], + pin8: ["NC", "8", "NC_8"], + pin9: ["SNS", "9"], + pin10: ["FLT", "10"], + pin11: ["VOUT", "11", "VOUT_11"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "power", + pin3: "control", + pin4: "ground", + pin5: "no-connect", + pin6: "control", + pin7: "control", + pin8: "no-connect", + pin9: "output", + pin10: "output", + pin11: "output", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { doNotConnect: true }, + pin8: { doNotConnect: true }, +} as const; + +export const TPS1HC03PQVAHRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing VAH0011A; official source https://www.ti.com/lit/gpn/TPS1HC03-Q1 pages 71 + return ( + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS1HC03PQVAHRQ1; diff --git a/lib/chips/TPS1HC100BQPWPRQ1.circuit.tsx b/lib/chips/TPS1HC100BQPWPRQ1.circuit.tsx new file mode 100644 index 00000000..1c0e7dfa --- /dev/null +++ b/lib/chips/TPS1HC100BQPWPRQ1.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["EN"], + pin3: ["DIAG_EN"], + pin4: ["Fault"], + pin5: ["LATCH"], + pin6: ["SNS"], + pin7: ["ILIM"], + pin8: ["NC1"], + pin9: ["VOUT1"], + pin10: ["VOUT2"], + pin11: ["NC2"], + pin12: ["VBB1"], + pin13: ["VBB2"], + pin14: ["NC3"], + pin15: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin8: { doNotConnect: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin15: [...pinLabels["pin15"], "thermalpad"], +} as const; + +export const TPS1HC100BQPWPRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS1HC100BQPWPRQ1; diff --git a/lib/chips/TPS2121RUXR.circuit.tsx b/lib/chips/TPS2121RUXR.circuit.tsx new file mode 100644 index 00000000..1d17300e --- /dev/null +++ b/lib/chips/TPS2121RUXR.circuit.tsx @@ -0,0 +1,254 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT1"], + pin2: ["IN2"], + pin3: ["CP2"], + pin4: ["OV2"], + pin5: ["OV1"], + pin6: ["PR1"], + pin7: ["IN1"], + pin8: ["OUT2"], + pin9: ["ST"], + pin10: ["ILM"], + pin11: ["SS"], + pin12: ["GND"], +} as const; + +const pinAttributes = { + pin12: { requiresGround: true }, +} as const; + +export const TPS2121RUXR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C485916.obj?uuid=b3b163ff5ac04d1fb107c30a7d954e0d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C485916.step?uuid=b3b163ff5ac04d1fb107c30a7d954e0d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.00007619999996677507, + y: -0.0000889000000370288, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS2121RUXR; diff --git a/lib/chips/TPS22860DBVR.circuit.tsx b/lib/chips/TPS22860DBVR.circuit.tsx new file mode 100644 index 00000000..65eeca9a --- /dev/null +++ b/lib/chips/TPS22860DBVR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT"], + pin2: ["GND"], + pin3: ["NC"], + pin4: ["VIN"], + pin5: ["VBIAS"], + pin6: ["ON"], +} as const; + +export const TPS22860DBVR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22860DBVR; diff --git a/lib/chips/TPS22910AYZVR.circuit.tsx b/lib/chips/TPS22910AYZVR.circuit.tsx new file mode 100644 index 00000000..1616c114 --- /dev/null +++ b/lib/chips/TPS22910AYZVR.circuit.tsx @@ -0,0 +1,61 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT", "A1"], + pin2: ["VIN", "A2"], + pin3: ["GND", "B1"], + pin4: ["ON", "B2"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "ground", + pin4: "input", +} as const; + +const pinAttributes = { + pin3: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin3: [...pinLabels["pin3"], "pin2"], + pin2: [...pinLabels["pin2"], "pin3"], +} as const; + +export const TPS22910AYZVR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22910AYZVR; diff --git a/lib/chips/TPS22912CYZVR.circuit.tsx b/lib/chips/TPS22912CYZVR.circuit.tsx new file mode 100644 index 00000000..8beff2c5 --- /dev/null +++ b/lib/chips/TPS22912CYZVR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin4: ["VOUT", "A1"], + pin3: ["VIN", "A2"], + pin2: ["GND", "B1"], + pin1: ["ON", "B2"], +} as const; + +const pinRoles = { + pin4: "output", + pin3: "input", + pin2: "ground", + pin1: "input", +} as const; + +const pinAttributes = { + pin2: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin3: [...pinLabels["pin3"], "pin2"], + pin2: [...pinLabels["pin2"], "pin3"], +} as const; + +export const TPS22912CYZVR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22912CYZVR; diff --git a/lib/chips/TPS22916BYFPR.circuit.tsx b/lib/chips/TPS22916BYFPR.circuit.tsx new file mode 100644 index 00000000..adad4fa6 --- /dev/null +++ b/lib/chips/TPS22916BYFPR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["VOUT", "A1"], + pin4: ["VIN", "A2"], + pin1: ["GND", "B1"], + pin3: ["ON", "B2"], +} as const; + +const pinRoles = { + pin2: "power", + pin4: "power", + pin1: "ground", +} as const; + +const pinAttributes = { + pin2: { + requiresPower: true, + }, + pin4: { + requiresPower: true, + }, + pin1: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin3: [...pinLabels["pin3"], "pin2"], + pin2: [...pinLabels["pin2"], "pin3"], +} as const; + +export const TPS22916BYFPR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22916BYFPR; diff --git a/lib/chips/TPS22918DBVT.circuit.tsx b/lib/chips/TPS22918DBVT.circuit.tsx new file mode 100644 index 00000000..c5176245 --- /dev/null +++ b/lib/chips/TPS22918DBVT.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["GND"], + pin3: ["ON"], + pin4: ["CT"], + pin5: ["QOD"], + pin6: ["VOUT"], +} as const; + +export const TPS22918DBVT = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22918DBVT; diff --git a/lib/chips/TPS22919.circuit.tsx b/lib/chips/TPS22919.circuit.tsx index 864fd1cb..8cfe4783 100644 --- a/lib/chips/TPS22919.circuit.tsx +++ b/lib/chips/TPS22919.circuit.tsx @@ -1,4 +1,5 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; import tps22919SpiceModel from "./spice-models/TPS22919-spice-model.json"; const pinLabels = { @@ -10,9 +11,12 @@ const pinLabels = { pin6: ["OUT"], } as const; +const pinRoles = { pin3: "control" } as const; + export const TPS22919 = (props: ChipProps) => { return ( ) => { }} /> } - footprint="dfn6_p0.65mm_w2.4999mm_pw0.42mm_pl0.6mm_pin1location(rightside,bottom)" + footprint="dfn6_p0.65mm_w2.2mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)" cadModel={{ objUrl: "https://modelcdn.tscircuit.com/easyeda_models/assets/C2149796.obj?uuid=a5d40c04f23243b2af27dc3bf34f18d3", @@ -43,3 +47,5 @@ export const TPS22919 = (props: ChipProps) => { /> ); }; + +export default TPS22919; diff --git a/lib/chips/TPS22945DCKR.circuit.tsx b/lib/chips/TPS22945DCKR.circuit.tsx new file mode 100644 index 00000000..b2fe5d06 --- /dev/null +++ b/lib/chips/TPS22945DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT"], + pin2: ["GND"], + pin3: ["OC"], + pin4: ["ON"], + pin5: ["VIN"], +} as const; + +export const TPS22945DCKR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22945DCKR; diff --git a/lib/chips/TPS22946YZPR.circuit.tsx b/lib/chips/TPS22946YZPR.circuit.tsx new file mode 100644 index 00000000..5714b9ad --- /dev/null +++ b/lib/chips/TPS22946YZPR.circuit.tsx @@ -0,0 +1,164 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT", "A1"], + pin4: ["VIN", "A2"], + pin2: ["GND", "B1"], + pin5: ["CL", "B2"], + pin3: ["OC", "C1"], + pin6: ["ON", "C2"], +} as const; + +const pinRoles = { + pin1: "output", + pin4: "power", + pin2: "ground", + pin5: "input", + pin3: "power", + pin6: "input", +} as const; + +const pinAttributes = { + pin4: { + requiresPower: true, + }, + pin2: { + requiresGround: true, + }, + pin3: { + requiresPower: true, + }, +} as const; + +export const TPS22946YZPR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130053.obj?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130053.step?uuid=1223783b9c9346aeb0b55e67e7a61f3e", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00013970000009067007, + y: 0.000012699999956566899, + z: -0.48, + }, + }} + {...restProps} + /> + ); +}; + +export default TPS22946YZPR; diff --git a/lib/chips/TPS22948DCKR.circuit.tsx b/lib/chips/TPS22948DCKR.circuit.tsx new file mode 100644 index 00000000..490e163e --- /dev/null +++ b/lib/chips/TPS22948DCKR.circuit.tsx @@ -0,0 +1,39 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["ON"], + pin4: ["pin4"], + pin5: ["FLT"], + pin6: ["OUT"], +} as const; + +export const TPS22948DCKR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22948DCKR; diff --git a/lib/chips/TPS22970YZPR.circuit.tsx b/lib/chips/TPS22970YZPR.circuit.tsx new file mode 100644 index 00000000..1bf67ee9 --- /dev/null +++ b/lib/chips/TPS22970YZPR.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ON", "D2"], + pin2: ["GND", "D1"], + pin3: ["VOUT", "C1", "VOUT_C1"], + pin4: ["VIN", "C2", "VIN_C2"], + pin5: ["VIN", "B2", "VIN_B2"], + pin6: ["VOUT", "B1", "VOUT_B1"], + pin7: ["VOUT", "A1", "VOUT_A1"], + pin8: ["VIN", "A2", "VIN_A2"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "ground", + pin3: "output", + pin4: "power", + pin5: "power", + pin6: "output", + pin7: "output", + pin8: "power", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, + pin8: { requiresPower: true }, +} as const; + +export const TPS22970YZPR = (props: ChipProps) => { + // Footprint provenance: TI drawing YZP0008; donor SN74LVC2G132YZPR (JLCPCB C2872358) + return ( + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS22970YZPR; diff --git a/lib/chips/TPS22975NDSGR.circuit.tsx b/lib/chips/TPS22975NDSGR.circuit.tsx new file mode 100644 index 00000000..37ddd7f0 --- /dev/null +++ b/lib/chips/TPS22975NDSGR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN1"], + pin2: ["VIN2"], + pin3: ["ON"], + pin4: ["VBIAS"], + pin5: ["GND"], + pin6: ["CT"], + pin7: ["VOUT1"], + pin8: ["VOUT2"], + pin9: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS22975NDSGR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS22975NDSGR; diff --git a/lib/chips/TPS22990DMLR.circuit.tsx b/lib/chips/TPS22990DMLR.circuit.tsx new file mode 100644 index 00000000..1c3aa7dd --- /dev/null +++ b/lib/chips/TPS22990DMLR.circuit.tsx @@ -0,0 +1,196 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CT"], + pin2: ["NC"], + pin3: ["VIN"], + pin4: ["VBIAS"], + pin5: ["ON"], + pin6: ["GND"], + pin7: ["PG"], + pin8: ["VOUT1"], + pin9: ["VOUT2"], + pin10: ["VOUT3"], + pin11: ["pin11"], + pin12: ["pin10_alt1"], +} as const; + +export const TPS22990DMLR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + + + + + + + + } + {...restProps} + /> + ); +}; + +export default TPS22990DMLR; diff --git a/lib/chips/TPS22991CNRAAR.circuit.tsx b/lib/chips/TPS22991CNRAAR.circuit.tsx new file mode 100644 index 00000000..c72cf007 --- /dev/null +++ b/lib/chips/TPS22991CNRAAR.circuit.tsx @@ -0,0 +1,72 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN", "1"], + pin2: ["ON", "2"], + pin3: ["VOUT", "3"], + pin4: ["GND", "4"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "output", + pin4: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS22991CNRAAR = (props: ChipProps) => { + // Footprint provenance: TI drawing RAA0004A; official source https://www.ti.com/lit/gpn/TPS22991 pages 26 + return ( + + + + + + + } + {...props} + /> + ); +}; + +export default TPS22991CNRAAR; diff --git a/lib/chips/TPS22992SRXNR.circuit.tsx b/lib/chips/TPS22992SRXNR.circuit.tsx new file mode 100644 index 00000000..01bd7dd5 --- /dev/null +++ b/lib/chips/TPS22992SRXNR.circuit.tsx @@ -0,0 +1,193 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VBIAS"], + pin2: ["VIN"], + pin3: ["PG"], + pin4: ["GND"], + pin5: ["QOD"], + pin6: ["VOUT"], + pin7: ["CT"], + pin8: ["ON"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS22992SRXNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3229354.obj?uuid=00695f36b2a24d6888d5663f789186ea", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3229354.step?uuid=00695f36b2a24d6888d5663f789186ea", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000038099999983387534, + y: 0.00005079999993995443, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TPS22992SRXNR; diff --git a/lib/chips/TPS22995RZFR.circuit.tsx b/lib/chips/TPS22995RZFR.circuit.tsx new file mode 100644 index 00000000..9e7881ba --- /dev/null +++ b/lib/chips/TPS22995RZFR.circuit.tsx @@ -0,0 +1,135 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VBIAS"], + pin2: ["VIN"], + pin3: ["ON"], + pin4: ["GND"], + pin5: ["VOUT"], + pin6: ["CT"], +} as const; + +export const TPS22995RZFR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C17562944.obj?uuid=f0b945e5fb6b47dbbd0cdc5c7d8653ba", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C17562944.step?uuid=f0b945e5fb6b47dbbd0cdc5c7d8653ba", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0.000012700000070253736, z: -0.01 }, + }} + {...restProps} + /> + ); +}; + +export default TPS22995RZFR; diff --git a/lib/chips/TPS2400DBVR.circuit.tsx b/lib/chips/TPS2400DBVR.circuit.tsx new file mode 100644 index 00000000..ff93d0c5 --- /dev/null +++ b/lib/chips/TPS2400DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["GND"], + pin3: ["pin3"], + pin4: ["GATE"], + pin5: ["VIN"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS2400DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS2400DBVR; diff --git a/lib/chips/TPS24750RUVR.circuit.tsx b/lib/chips/TPS24750RUVR.circuit.tsx new file mode 100644 index 00000000..d3b09fa5 --- /dev/null +++ b/lib/chips/TPS24750RUVR.circuit.tsx @@ -0,0 +1,412 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OV", "1"], + pin2: ["IMON", "2"], + pin3: ["SET", "3"], + pin4: ["GND", "4", "GND_4"], + pin5: ["DRAIN", "5", "DRAIN_5"], + pin6: ["OUT", "6", "OUT_6"], + pin7: ["OUT", "7", "OUT_7"], + pin8: ["OUT", "8", "OUT_8"], + pin9: ["OUT", "9", "OUT_9"], + pin10: ["OUT", "10", "OUT_10"], + pin11: ["OUT", "11", "OUT_11"], + pin12: ["OUT", "12", "OUT_12"], + pin13: ["OUT", "13", "OUT_13"], + pin14: ["DRAIN", "14", "DRAIN_14"], + pin15: ["DRAIN", "15", "DRAIN_15"], + pin16: ["DRAIN", "16", "DRAIN_16"], + pin17: ["DRAIN", "17", "DRAIN_17"], + pin18: ["DRAIN", "18", "DRAIN_18"], + pin19: ["OUT", "19", "OUT_19"], + pin20: ["OUT", "20", "OUT_20"], + pin21: ["OUT", "21", "OUT_21"], + pin22: ["OUT", "22", "OUT_22"], + pin23: ["OUT", "23", "OUT_23"], + pin24: ["OUT", "24", "OUT_24"], + pin25: ["GATE", "25"], + pin26: ["SENSE", "26"], + pin27: ["DRAIN", "27", "DRAIN_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["VCC", "29"], + pin30: ["FLTB", "30"], + pin31: ["PGB", "31"], + pin32: ["GND", "32", "GND_32"], + pin33: ["EN", "33"], + pin34: ["PROG", "34"], + pin35: ["TIMER", "35"], + pin36: ["GND", "36", "GND_36"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "output", + pin3: "input", + pin4: "ground", + pin5: "input", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "input", + pin15: "input", + pin16: "input", + pin17: "input", + pin18: "input", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "control", + pin26: "input", + pin27: "input", + pin28: "ground", + pin29: "power", + pin30: "input", + pin31: "output", + pin32: "ground", + pin33: "control", + pin34: "power", + pin35: "bidirectional", + pin36: "ground", +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin28: { requiresGround: true }, + pin29: { requiresPower: true }, + pin32: { requiresGround: true }, + pin34: { requiresPower: true }, + pin36: { requiresGround: true }, +} as const; + +export const TPS24750RUVR = (props: ChipProps) => { + // Footprint provenance: TI drawing RUV0036A; official source https://www.ti.com/lit/gpn/TPS24750 pages 44,45,46 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS24750RUVR; diff --git a/lib/chips/TPS2491DGS.circuit.tsx b/lib/chips/TPS2491DGS.circuit.tsx new file mode 100644 index 00000000..b88497c8 --- /dev/null +++ b/lib/chips/TPS2491DGS.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["VREF"], + pin3: ["PROG"], + pin4: ["TIMER"], + pin5: ["GND"], + pin6: ["PG"], + pin7: ["OUT"], + pin8: ["GATE"], + pin9: ["SENSE"], + pin10: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const TPS2491DGS = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS2491DGS; diff --git a/lib/chips/TPS25221DBVR.circuit.tsx b/lib/chips/TPS25221DBVR.circuit.tsx new file mode 100644 index 00000000..ecc40414 --- /dev/null +++ b/lib/chips/TPS25221DBVR.circuit.tsx @@ -0,0 +1,153 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["FAULT"], + pin5: ["ILIM"], + pin6: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TPS25221DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C470965.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C470965.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default TPS25221DBVR; diff --git a/lib/chips/TPS2553DDBVR.circuit.tsx b/lib/chips/TPS2553DDBVR.circuit.tsx new file mode 100644 index 00000000..33c51596 --- /dev/null +++ b/lib/chips/TPS2553DDBVR.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["N_FAULT"], + pin5: ["ILIM"], + pin6: ["OUT"], +} as const; + +export const TPS2553DDBVR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C521201.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C521201.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...restProps} + /> + ); +}; + +export default TPS2553DDBVR; diff --git a/lib/chips/TPS2590RSAR.circuit.tsx b/lib/chips/TPS2590RSAR.circuit.tsx new file mode 100644 index 00000000..dd8fcc91 --- /dev/null +++ b/lib/chips/TPS2590RSAR.circuit.tsx @@ -0,0 +1,266 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["IN3"], + pin4: ["IN4"], + pin5: ["GND3"], + pin6: ["RTRY"], + pin7: ["ILIM"], + pin8: ["IFLT"], + pin9: ["CT"], + pin10: ["OUT1"], + pin11: ["OUT2"], + pin12: ["OUT3"], + pin13: ["GND2"], + pin14: ["GND1"], + pin15: ["FLT"], + pin16: ["EN"], + pin17: ["PAD"], +} as const; + +export const TPS2590RSAR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C473399.obj?uuid=005c494a04ea483db187f9e608c0fe00", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C473399.step?uuid=005c494a04ea483db187f9e608c0fe00", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012699999999199463, + y: -0.000012699999999199463, + z: 0.01, + }, + }} + {...restProps} + /> + ); +}; + +export default TPS2590RSAR; diff --git a/lib/chips/TPS259241DRCR.circuit.tsx b/lib/chips/TPS259241DRCR.circuit.tsx new file mode 100644 index 00000000..3287d225 --- /dev/null +++ b/lib/chips/TPS259241DRCR.circuit.tsx @@ -0,0 +1,270 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["VIN1"], + pin4: ["VIN2"], + pin5: ["VIN3"], + pin6: ["OUT1"], + pin7: ["OUT2"], + pin8: ["OUT3"], + pin9: ["BFET"], + pin10: ["ILIM"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS259241DRCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C165131.obj?uuid=a784593ea7bb47bab3157096b9efd880", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C165131.step?uuid=a784593ea7bb47bab3157096b9efd880", + pcbRotationOffset: 270, + modelOriginPosition: { + x: 0.003886200000124518, + y: 0.000025399999913133797, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS259241DRCR; diff --git a/lib/chips/TPS259461ARPWR.circuit.tsx b/lib/chips/TPS259461ARPWR.circuit.tsx new file mode 100644 index 00000000..1f23b7ef --- /dev/null +++ b/lib/chips/TPS259461ARPWR.circuit.tsx @@ -0,0 +1,278 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["OVLO"], + pin3: ["SPLYGD"], + pin4: ["FLT"], + pin5: ["IN"], + pin6: ["OUT"], + pin7: ["DVDT"], + pin8: ["GND"], + pin9: ["ILM"], + pin10: ["ITIMER"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +export const TPS259461ARPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3662780.obj?uuid=262834a5342148ebb2da8f3848ec58ce", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3662780.step?uuid=262834a5342148ebb2da8f3848ec58ce", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.004987299999929751, y: 0, z: -0.05 }, + }} + {...props} + /> + ); +}; + +export default TPS259461ARPWR; diff --git a/lib/chips/TPS259472ARPWR.circuit.tsx b/lib/chips/TPS259472ARPWR.circuit.tsx new file mode 100644 index 00000000..49a28fb3 --- /dev/null +++ b/lib/chips/TPS259472ARPWR.circuit.tsx @@ -0,0 +1,278 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["IN"], + pin6: ["OUT"], + pin7: ["DVDT"], + pin8: ["GND"], + pin9: ["ILM"], + pin10: ["ITIMER"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +export const TPS259472ARPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3662789.obj?uuid=262834a5342148ebb2da8f3848ec58ce", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3662789.step?uuid=262834a5342148ebb2da8f3848ec58ce", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.004987299999929751, y: 0, z: -0.05 }, + }} + {...props} + /> + ); +}; + +export default TPS259472ARPWR; diff --git a/lib/chips/TPS259481AYWPR.circuit.tsx b/lib/chips/TPS259481AYWPR.circuit.tsx new file mode 100644 index 00000000..8678ccc1 --- /dev/null +++ b/lib/chips/TPS259481AYWPR.circuit.tsx @@ -0,0 +1,206 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["OVLO"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["VIN1"], + pin6: ["VOUT1"], + pin7: ["DVDT"], + pin8: ["GND"], + pin9: ["ILM"], + pin10: ["ITIMER"], + pin11: ["VOUT2"], + pin12: ["VIN2"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin8: { requiresGround: true }, + pin12: { requiresPower: true }, +} as const; + +export const TPS259481AYWPR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C35020830.obj?uuid=623758814f76406da78f972733125f5c", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C35020830.step?uuid=623758814f76406da78f972733125f5c", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012699999956566899, + y: -0.000012700000070253736, + z: -0.08442, + }, + }} + {...props} + /> + ); +}; + +export default TPS259481AYWPR; diff --git a/lib/chips/TPS259541DSGR.circuit.tsx b/lib/chips/TPS259541DSGR.circuit.tsx new file mode 100644 index 00000000..dcc366bf --- /dev/null +++ b/lib/chips/TPS259541DSGR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["dVdt"], + pin2: ["pin2"], + pin3: ["IN1"], + pin4: ["IN2"], + pin5: ["OUT"], + pin6: ["FLT"], + pin7: ["ILM"], + pin8: ["GND1"], + pin9: ["GND2"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS259541DSGR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS259541DSGR; diff --git a/lib/chips/TPS25972ARPWR.circuit.tsx b/lib/chips/TPS25972ARPWR.circuit.tsx new file mode 100644 index 00000000..1be8131e --- /dev/null +++ b/lib/chips/TPS25972ARPWR.circuit.tsx @@ -0,0 +1,283 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN", "UVLO", "1"], + pin2: ["OVLO", "2"], + pin3: ["PG", "3"], + pin4: ["FLT", "4"], + pin5: ["IN", "5"], + pin6: ["OUT", "6"], + pin7: ["DVDT", "7"], + pin8: ["GND", "8"], + pin9: ["ILM", "9"], + pin10: ["ITIMER", "10"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "input", + pin3: "output", + pin4: "output", + pin5: "power", + pin6: "power", + pin7: "output", + pin8: "ground", + pin9: "output", + pin10: "output", +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +export const TPS25972ARPWR = (props: ChipProps) => { + // Footprint provenance: TI drawing RPW0010A; donor TPS259472ARPWR (JLCPCB C3662789) + return ( + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS25972ARPWR; diff --git a/lib/chips/TPS259814LRPWR.circuit.tsx b/lib/chips/TPS259814LRPWR.circuit.tsx new file mode 100644 index 00000000..9ad8caa5 --- /dev/null +++ b/lib/chips/TPS259814LRPWR.circuit.tsx @@ -0,0 +1,278 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["pin2"], + pin3: ["PG"], + pin4: ["FLT"], + pin5: ["IN"], + pin6: ["OUT"], + pin7: ["DVDT"], + pin8: ["GND"], + pin9: ["ILM"], + pin10: ["ITIMER"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +export const TPS259814LRPWR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5219030.obj?uuid=262834a5342148ebb2da8f3848ec58ce", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5219030.step?uuid=262834a5342148ebb2da8f3848ec58ce", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.004987299999929751, y: 0, z: -0.05 }, + }} + {...props} + /> + ); +}; + +export default TPS259814LRPWR; diff --git a/lib/chips/TPS259830ONRGER.circuit.tsx b/lib/chips/TPS259830ONRGER.circuit.tsx new file mode 100644 index 00000000..78ae5076 --- /dev/null +++ b/lib/chips/TPS259830ONRGER.circuit.tsx @@ -0,0 +1,372 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["IN3"], + pin4: ["GND1"], + pin5: ["GND2"], + pin6: ["pin6"], + pin7: ["ITIMER"], + pin8: ["ILIM"], + pin9: ["IMON"], + pin10: ["RETRY_DLY"], + pin11: ["NRETRY"], + pin12: ["OVLO"], + pin13: ["PG"], + pin14: ["GND3"], + pin15: ["pin15"], + pin16: ["IN4"], + pin17: ["OUT1"], + pin18: ["OUT2"], + pin19: ["OUT3"], + pin20: ["OUT4"], + pin21: ["OUT5"], + pin22: ["OUT6"], + pin23: ["OUT7"], + pin24: ["OUT8"], + pin25: ["IN5"], + pin26: ["GND4"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin14: { requiresGround: true }, + pin26: { requiresGround: true }, +} as const; + +export const TPS259830ONRGER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20611808.obj?uuid=64fd2036b868447d819998b52192bdab", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C20611808.step?uuid=64fd2036b868447d819998b52192bdab", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00010159999987990886, + y: -0.00010160000010728254, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default TPS259830ONRGER; diff --git a/lib/chips/TPS26400PWPR.circuit.tsx b/lib/chips/TPS26400PWPR.circuit.tsx new file mode 100644 index 00000000..df1a46ef --- /dev/null +++ b/lib/chips/TPS26400PWPR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["UVLO"], + pin4: ["NC1"], + pin5: ["OVP"], + pin6: ["MODE"], + pin7: ["SHDN"], + pin8: ["RTN"], + pin9: ["GND"], + pin10: ["IMON"], + pin11: ["ILIM"], + pin12: ["dVdT"], + pin13: ["NC2"], + pin14: ["FLT"], + pin15: ["OUT2"], + pin16: ["OUT1"], + pin17: ["PAD"], +} as const; + +const pinAttributes = { + pin4: { doNotConnect: true }, + pin9: { requiresGround: true }, + pin13: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const TPS26400PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS26400PWPR; diff --git a/lib/chips/TPS26600PWPR.circuit.tsx b/lib/chips/TPS26600PWPR.circuit.tsx new file mode 100644 index 00000000..723780af --- /dev/null +++ b/lib/chips/TPS26600PWPR.circuit.tsx @@ -0,0 +1,59 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["UVLO"], + pin4: ["NC1"], + pin5: ["OVP"], + pin6: ["MODE"], + pin7: ["SHDN"], + pin8: ["RTN"], + pin9: ["GND"], + pin10: ["IMON"], + pin11: ["ILIM"], + pin12: ["dVdT"], + pin13: ["NC2"], + pin14: ["FLT"], + pin15: ["OUT2"], + pin16: ["OUT1"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin4: { doNotConnect: true }, + pin9: { requiresGround: true }, + pin13: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const TPS26600PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS26600PWPR; diff --git a/lib/chips/TPS26625DRCR.circuit.tsx b/lib/chips/TPS26625DRCR.circuit.tsx new file mode 100644 index 00000000..22bf15be --- /dev/null +++ b/lib/chips/TPS26625DRCR.circuit.tsx @@ -0,0 +1,268 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["UVLO"], + pin3: ["OVP"], + pin4: ["SHDN"], + pin5: ["RTN"], + pin6: ["GND"], + pin7: ["ILIM"], + pin8: ["dVdT"], + pin9: ["FLT"], + pin10: ["OUT"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, +} as const; + +export const TPS26625DRCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862873.obj?uuid=f788d5c8e1d5440dbc825949aa164fbc", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862873.step?uuid=f788d5c8e1d5440dbc825949aa164fbc", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.0000762000000804619, + y: -0.0038354000000708766, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS26625DRCR; diff --git a/lib/chips/TPS26632RGET.circuit.tsx b/lib/chips/TPS26632RGET.circuit.tsx new file mode 100644 index 00000000..ace9a27a --- /dev/null +++ b/lib/chips/TPS26632RGET.circuit.tsx @@ -0,0 +1,65 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN2"], + pin2: ["IN1"], + pin3: ["B_GATE"], + pin4: ["DRV"], + pin5: ["IN_SYS"], + pin6: ["UVLO"], + pin7: ["PLIM"], + pin8: ["GND"], + pin9: ["dVdT"], + pin10: ["ILIM"], + pin11: ["MODE"], + pin12: ["SHDN"], + pin13: ["IMON"], + pin14: ["FLT"], + pin15: ["PGTH"], + pin16: ["PGOOD"], + pin17: ["OUT2"], + pin18: ["OUT1"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TPS26632RGET = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS26632RGET; diff --git a/lib/chips/TPS27081ADDCR.circuit.tsx b/lib/chips/TPS27081ADDCR.circuit.tsx new file mode 100644 index 00000000..40dbe8ee --- /dev/null +++ b/lib/chips/TPS27081ADDCR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["R2"], + pin2: ["VOUT2"], + pin3: ["VOUT1"], + pin4: ["VIN"], + pin5: ["pin5"], + pin6: ["pin6"], +} as const; + +export const TPS27081ADDCR = (props: ChipProps) => { + const { name = "SW1", ...restProps } = props; + + return ( + + ); +}; + +export default TPS27081ADDCR; diff --git a/lib/chips/TPS2HC08PQVAHRQ1.circuit.tsx b/lib/chips/TPS2HC08PQVAHRQ1.circuit.tsx new file mode 100644 index 00000000..0b5878b2 --- /dev/null +++ b/lib/chips/TPS2HC08PQVAHRQ1.circuit.tsx @@ -0,0 +1,222 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT1", "1"], + pin2: ["VBB", "2"], + pin3: ["ILIM", "3"], + pin4: ["GND", "4"], + pin5: ["SEL", "5"], + pin6: ["DIAG_EN", "6"], + pin7: ["EN1", "7"], + pin8: ["EN2", "8"], + pin9: ["SNS", "9"], + pin10: ["FLT", "10"], + pin11: ["VOUT2", "11"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "output", + pin4: "ground", + pin5: "control", + pin6: "control", + pin7: "control", + pin8: "control", + pin9: "output", + pin10: "output", + pin11: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin11: { requiresPower: true }, +} as const; + +export const TPS2HC08PQVAHRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing VAH0011C; official source https://www.ti.com/lit/gpn/TPS2HC08-Q1 pages 74 + return ( + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS2HC08PQVAHRQ1; diff --git a/lib/chips/TPS2HC16PQVAHRQ1.circuit.tsx b/lib/chips/TPS2HC16PQVAHRQ1.circuit.tsx new file mode 100644 index 00000000..9fbf8de7 --- /dev/null +++ b/lib/chips/TPS2HC16PQVAHRQ1.circuit.tsx @@ -0,0 +1,222 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT1", "1"], + pin2: ["VBB", "2"], + pin3: ["ILIM", "3"], + pin4: ["GND", "4"], + pin5: ["SEL", "5"], + pin6: ["DIAG_EN", "6"], + pin7: ["EN1", "7"], + pin8: ["EN2", "8"], + pin9: ["SNS", "9"], + pin10: ["FLT", "10"], + pin11: ["VOUT2", "11"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "control", + pin4: "ground", + pin5: "control", + pin6: "control", + pin7: "control", + pin8: "control", + pin9: "output", + pin10: "output", + pin11: "power", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin4: { requiresGround: true }, + pin11: { requiresPower: true }, +} as const; + +export const TPS2HC16PQVAHRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing VAH0011B; official source https://www.ti.com/lit/gpn/TPS2HC16-Q1 pages 72 + return ( + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS2HC16PQVAHRQ1; diff --git a/lib/chips/TPS3106K33DBVR.circuit.tsx b/lib/chips/TPS3106K33DBVR.circuit.tsx new file mode 100644 index 00000000..5d9feaea --- /dev/null +++ b/lib/chips/TPS3106K33DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RSTVDD"], + pin2: ["GND"], + pin3: ["MR"], + pin4: ["SENSE"], + pin5: ["RSTSENSE"], + pin6: ["VDD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS3106K33DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3106K33DBVR; diff --git a/lib/chips/TPS3305_18DGNR.circuit.tsx b/lib/chips/TPS3305_18DGNR.circuit.tsx new file mode 100644 index 00000000..33a04a98 --- /dev/null +++ b/lib/chips/TPS3305_18DGNR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SENSE1"], + pin2: ["SENSE2"], + pin3: ["WDI"], + pin4: ["GND"], + pin5: ["RESET1"], + pin6: ["RESET2"], + pin7: ["MR"], + pin8: ["VDD"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS3305_18DGNR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3305_18DGNR; diff --git a/lib/chips/TPS3424A11C13ADRLR.circuit.tsx b/lib/chips/TPS3424A11C13ADRLR.circuit.tsx new file mode 100644 index 00000000..fabda33d --- /dev/null +++ b/lib/chips/TPS3424A11C13ADRLR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PB", "1"], + pin2: ["GND", "2"], + pin3: ["VDD", "3"], + pin4: ["SPT", "4"], + pin5: ["LPT", "5"], + pin6: ["RESET", "6"], + pin7: ["INT", "7"], + pin8: ["KILL", "8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "ground", + pin3: "power", + pin4: "unknown", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "input", +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TPS3424A11C13ADRLR = (props: ChipProps) => { + // Footprint provenance: TI drawing DRL0008A; donor TPS631000DRLR (JLCPCB C5219190) + return ( + + ); +}; + +export default TPS3424A11C13ADRLR; diff --git a/lib/chips/TPS3435JFMAFDSER.circuit.tsx b/lib/chips/TPS3435JFMAFDSER.circuit.tsx new file mode 100644 index 00000000..c1be65ec --- /dev/null +++ b/lib/chips/TPS3435JFMAFDSER.circuit.tsx @@ -0,0 +1,149 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SET0", "1"], + pin2: ["WD_EN", "2"], + pin3: ["WDI", "3"], + pin4: ["GND", "4"], + pin5: ["WDO", "5"], + pin6: ["VDD", "6"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "control", + pin3: "input", + pin4: "ground", + pin5: "output", + pin6: "power", +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS3435JFMAFDSER = (props: ChipProps) => { + // Footprint provenance: TI drawing DSE0006A; donor TPS389030DSER (JLCPCB C2066942) + return ( + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS3435JFMAFDSER; diff --git a/lib/chips/TPS35AA38AGADDFRQ1.circuit.tsx b/lib/chips/TPS35AA38AGADDFRQ1.circuit.tsx new file mode 100644 index 00000000..b88f0156 --- /dev/null +++ b/lib/chips/TPS35AA38AGADDFRQ1.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MR"], + pin2: ["CWD"], + pin3: ["CRST"], + pin4: ["GND"], + pin5: ["SET0"], + pin6: ["WDI"], + pin7: ["RESET"], + pin8: ["VDD"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const TPS35AA38AGADDFRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS35AA38AGADDFRQ1; diff --git a/lib/chips/TPS3700DDCT.circuit.tsx b/lib/chips/TPS3700DDCT.circuit.tsx new file mode 100644 index 00000000..41f237d4 --- /dev/null +++ b/lib/chips/TPS3700DDCT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["GND"], + pin3: ["INA_POS"], + pin4: ["INB_NEG"], + pin5: ["VDD"], + pin6: ["OUTB"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS3700DDCT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3700DDCT; diff --git a/lib/chips/TPS3700QDDCRQ1.circuit.tsx b/lib/chips/TPS3700QDDCRQ1.circuit.tsx new file mode 100644 index 00000000..625d33fa --- /dev/null +++ b/lib/chips/TPS3700QDDCRQ1.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUTA"], + pin2: ["GND"], + pin3: ["INA_POS"], + pin4: ["INB_NEG"], + pin5: ["VDD"], + pin6: ["OUTB"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS3700QDDCRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3700QDDCRQ1; diff --git a/lib/chips/TPS3702CX33DDCR.circuit.tsx b/lib/chips/TPS3702CX33DDCR.circuit.tsx new file mode 100644 index 00000000..529958ad --- /dev/null +++ b/lib/chips/TPS3702CX33DDCR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["UV"], + pin2: ["GND"], + pin3: ["SENSE"], + pin4: ["SET"], + pin5: ["VDD"], + pin6: ["OV"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS3702CX33DDCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2068031.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2068031.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default TPS3702CX33DDCR; diff --git a/lib/chips/TPS3710DDCR.circuit.tsx b/lib/chips/TPS3710DDCR.circuit.tsx new file mode 100644 index 00000000..d0242da2 --- /dev/null +++ b/lib/chips/TPS3710DDCR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["GND3"], + pin3: ["SENSE"], + pin4: ["GND2"], + pin5: ["VDD"], + pin6: ["GND1"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const TPS3710DDCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3710DDCR; diff --git a/lib/chips/TPS3808EG33DBVR.circuit.tsx b/lib/chips/TPS3808EG33DBVR.circuit.tsx new file mode 100644 index 00000000..651e4f98 --- /dev/null +++ b/lib/chips/TPS3808EG33DBVR.circuit.tsx @@ -0,0 +1,150 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RESET"], + pin2: ["GND"], + pin3: ["MR"], + pin4: ["CT"], + pin5: ["SENSE"], + pin6: ["VDD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS3808EG33DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34900976.obj?uuid=3ad7d63f003b45d1b666dbfb37d8a25f", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34900976.step?uuid=3ad7d63f003b45d1b666dbfb37d8a25f", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0.000012700000070253736, y: 0, z: -0.8 }, + }} + {...props} + /> + ); +}; + +export default TPS3808EG33DBVR; diff --git a/lib/chips/TPS3823_33DBVR.circuit.tsx b/lib/chips/TPS3823_33DBVR.circuit.tsx new file mode 100644 index 00000000..fa923415 --- /dev/null +++ b/lib/chips/TPS3823_33DBVR.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RESET"], + pin2: ["GND"], + pin3: ["MR"], + pin4: ["WDI"], + pin5: ["VDD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS3823_33DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7719.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C7719.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default TPS3823_33DBVR; diff --git a/lib/chips/TPS3828_50DBVR.circuit.tsx b/lib/chips/TPS3828_50DBVR.circuit.tsx new file mode 100644 index 00000000..952c3dc5 --- /dev/null +++ b/lib/chips/TPS3828_50DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RESET"], + pin2: ["GND"], + pin3: ["MR"], + pin4: ["WDI"], + pin5: ["VDD"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS3828_50DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3828_50DBVR; diff --git a/lib/chips/TPS3831G18DQNR.circuit.tsx b/lib/chips/TPS3831G18DQNR.circuit.tsx new file mode 100644 index 00000000..a5d099ca --- /dev/null +++ b/lib/chips/TPS3831G18DQNR.circuit.tsx @@ -0,0 +1,181 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RESET"], + pin2: ["MR"], + pin3: ["GND"], + pin4: ["VDD"], + pin5: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +export const TPS3831G18DQNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2066667.obj?uuid=dafcd713f2d64589944d0111d1d05404", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2066667.step?uuid=dafcd713f2d64589944d0111d1d05404", + pcbRotationOffset: 90, + modelOriginPosition: { x: 0, y: 0.000025399999913133797, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPS3831G18DQNR; diff --git a/lib/chips/TPS3840DL28DBVR.circuit.tsx b/lib/chips/TPS3840DL28DBVR.circuit.tsx new file mode 100644 index 00000000..dddb76b0 --- /dev/null +++ b/lib/chips/TPS3840DL28DBVR.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RESET"], + pin2: ["VDD"], + pin3: ["GND"], + pin4: ["pin4"], + pin5: ["CT"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TPS3840DL28DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS3840DL28DBVR; diff --git a/lib/chips/TPS386000RGPR.circuit.tsx b/lib/chips/TPS386000RGPR.circuit.tsx new file mode 100644 index 00000000..6ac8c4b0 --- /dev/null +++ b/lib/chips/TPS386000RGPR.circuit.tsx @@ -0,0 +1,67 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MR"], + pin2: ["CT4"], + pin3: ["CT3"], + pin4: ["CT2"], + pin5: ["CT1"], + pin6: ["SENSE4H"], + pin7: ["SENSE4L"], + pin8: ["SENSE3"], + pin9: ["SENSE2"], + pin10: ["SENSE1"], + pin11: ["NC"], + pin12: ["GND"], + pin13: ["VREF"], + pin14: ["VDD"], + pin15: ["RESET1"], + pin16: ["RESET2"], + pin17: ["RESET3"], + pin18: ["RESET4"], + pin19: ["WDO"], + pin20: ["WDI"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin11: { doNotConnect: true }, + pin12: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const TPS386000RGPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS386000RGPR; diff --git a/lib/chips/TPS389006007RTER.circuit.tsx b/lib/chips/TPS389006007RTER.circuit.tsx new file mode 100644 index 00000000..fd408beb --- /dev/null +++ b/lib/chips/TPS389006007RTER.circuit.tsx @@ -0,0 +1,64 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MON3", "1"], + pin2: ["MON6", "2"], + pin3: ["MON4", "3"], + pin4: ["MON5", "4"], + pin5: ["ACT", "5"], + pin6: ["GND", "6", "GND_6"], + pin7: ["SLEEP", "7"], + pin8: ["VDD", "8"], + pin9: ["SYNC", "9"], + pin10: ["MON2", "10"], + pin11: ["RS_1", "2", "11"], + pin12: ["MON1", "12"], + pin13: ["NIRQ", "13"], + pin14: ["ADDR", "14"], + pin15: ["SDA", "15"], + pin16: ["SCL", "16"], + pin17: ["GND", "17", "GND_17"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "input", + pin4: "input", + pin5: "input", + pin6: "ground", + pin7: "control", + pin8: "power", + pin9: "bidirectional", + pin10: "input", + pin11: "input", + pin12: "input", + pin13: "output", + pin14: "control", + pin15: "bidirectional", + pin16: "control", + pin17: "ground", +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin8: { requiresPower: true }, + pin17: { requiresGround: true }, +} as const; + +export const TPS389006007RTER = (props: ChipProps) => { + // Footprint provenance: TI drawing RTE0016C; donor TLA2528IRTER (JLCPCB C2866175) + return ( + + ); +}; + +export default TPS389006007RTER; diff --git a/lib/chips/TPS389030DSER.circuit.tsx b/lib/chips/TPS389030DSER.circuit.tsx new file mode 100644 index 00000000..2505e5a2 --- /dev/null +++ b/lib/chips/TPS389030DSER.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SENSE"], + pin2: ["GND"], + pin3: ["MR"], + pin4: ["VDD"], + pin5: ["CT"], + pin6: ["RESET"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +export const TPS389030DSER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2066942.obj?uuid=089468ff55b44f4ab6e582b4badd6629", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2066942.step?uuid=089468ff55b44f4ab6e582b4badd6629", + pcbRotationOffset: 270, + modelOriginPosition: { + x: 0.000012699999956566899, + y: 0.0003809999999475622, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS389030DSER; diff --git a/lib/chips/TPS40210QDGQRQ1.circuit.tsx b/lib/chips/TPS40210QDGQRQ1.circuit.tsx new file mode 100644 index 00000000..0dd72181 --- /dev/null +++ b/lib/chips/TPS40210QDGQRQ1.circuit.tsx @@ -0,0 +1,175 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RC"], + pin2: ["SS"], + pin3: ["pin3"], + pin4: ["COMP"], + pin5: ["FB"], + pin6: ["GND"], + pin7: ["ISNS"], + pin8: ["GDRV"], + pin9: ["BP"], + pin10: ["VDD"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const TPS40210QDGQRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C363281.obj?uuid=14de937fc3fd4ee893ca6c1a9fedc010", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C363281.step?uuid=14de937fc3fd4ee893ca6c1a9fedc010", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPS40210QDGQRQ1; diff --git a/lib/chips/TPS43061RTET.circuit.tsx b/lib/chips/TPS43061RTET.circuit.tsx new file mode 100644 index 00000000..ac9c10ef --- /dev/null +++ b/lib/chips/TPS43061RTET.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["SS"], + pin3: ["COMP"], + pin4: ["FB"], + pin5: ["ISNS_NEG"], + pin6: ["ISNS_POS"], + pin7: ["VIN"], + pin8: ["LDRV"], + pin9: ["PGND"], + pin10: ["VCC"], + pin11: ["BOOT"], + pin12: ["SW"], + pin13: ["HDRV"], + pin14: ["PGOOD"], + pin15: ["EN"], + pin16: ["AGND"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, + pin10: { requiresPower: true }, + pin16: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const TPS43061RTET = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS43061RTET; diff --git a/lib/chips/TPS51200DRCR.circuit.tsx b/lib/chips/TPS51200DRCR.circuit.tsx new file mode 100644 index 00000000..eea39421 --- /dev/null +++ b/lib/chips/TPS51200DRCR.circuit.tsx @@ -0,0 +1,219 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["REFIN"], + pin2: ["VLDOIN"], + pin3: ["VO"], + pin4: ["PGND"], + pin5: ["VOSNS"], + pin6: ["REFOUT"], + pin7: ["EN"], + pin8: ["GND"], + pin9: ["PGOOD"], + pin10: ["VIN"], + pin11: ["EPAD"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const TPS51200DRCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34771.obj?uuid=156e205a83594893a980adc9e51e4d53", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C34771.step?uuid=156e205a83594893a980adc9e51e4d53", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.0001142999999501626, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS51200DRCR; diff --git a/lib/chips/TPS51206DSQR.circuit.tsx b/lib/chips/TPS51206DSQR.circuit.tsx new file mode 100644 index 00000000..7cb66ba0 --- /dev/null +++ b/lib/chips/TPS51206DSQR.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDDQSNS"], + pin2: ["VLDOIN"], + pin3: ["VTT"], + pin4: ["PGND"], + pin5: ["VTTSNS"], + pin6: ["VTTREF"], + pin7: ["S3"], + pin8: ["GND"], + pin9: ["S5"], + pin10: ["VDD"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin8: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const TPS51206DSQR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS51206DSQR; diff --git a/lib/chips/TPS54201DDCT.circuit.tsx b/lib/chips/TPS54201DDCT.circuit.tsx new file mode 100644 index 00000000..02c093f0 --- /dev/null +++ b/lib/chips/TPS54201DDCT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["SW"], + pin3: ["VIN"], + pin4: ["FB"], + pin5: ["PWM"], + pin6: ["BOOT"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TPS54201DDCT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS54201DDCT; diff --git a/lib/chips/TPS54338RQFR.circuit.tsx b/lib/chips/TPS54338RQFR.circuit.tsx new file mode 100644 index 00000000..c9f183c4 --- /dev/null +++ b/lib/chips/TPS54338RQFR.circuit.tsx @@ -0,0 +1,190 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["EN"], + pin3: ["FB"], + pin4: ["GND"], + pin5: ["VIN1"], + pin6: ["VIN2"], + pin7: ["MODE"], + pin8: ["SW"], + pin9: ["pin9"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS54338RQFR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C47002842.obj?uuid=10c2b329135143f69f4df1aeb7252e7e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C47002842.step?uuid=10c2b329135143f69f4df1aeb7252e7e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.0019859000000342353, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPS54338RQFR; diff --git a/lib/chips/TPS54386PWPR.circuit.tsx b/lib/chips/TPS54386PWPR.circuit.tsx new file mode 100644 index 00000000..a339a4c6 --- /dev/null +++ b/lib/chips/TPS54386PWPR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PVDD1"], + pin2: ["BOOT1"], + pin3: ["SW1"], + pin4: ["GND"], + pin5: ["EN1"], + pin6: ["EN2"], + pin7: ["FB1"], + pin8: ["FB2"], + pin9: ["ILIM2"], + pin10: ["SEQ"], + pin11: ["BP"], + pin12: ["SW2"], + pin13: ["BOOT2"], + pin14: ["PVDD2"], + pin15: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin15: [...pinLabels["pin15"], "thermalpad"], +} as const; + +export const TPS54386PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS54386PWPR; diff --git a/lib/chips/TPS54538RQFR.circuit.tsx b/lib/chips/TPS54538RQFR.circuit.tsx new file mode 100644 index 00000000..29b8c846 --- /dev/null +++ b/lib/chips/TPS54538RQFR.circuit.tsx @@ -0,0 +1,190 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["EN"], + pin3: ["FB"], + pin4: ["GND"], + pin5: ["VIN1"], + pin6: ["VIN2"], + pin7: ["MODE"], + pin8: ["SW"], + pin9: ["pin9"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS54538RQFR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C45385272.obj?uuid=10c2b329135143f69f4df1aeb7252e7e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C45385272.step?uuid=10c2b329135143f69f4df1aeb7252e7e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.0019859000000342353, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPS54538RQFR; diff --git a/lib/chips/TPS55285VALR.circuit.tsx b/lib/chips/TPS55285VALR.circuit.tsx new file mode 100644 index 00000000..bd405e98 --- /dev/null +++ b/lib/chips/TPS55285VALR.circuit.tsx @@ -0,0 +1,283 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MODE"], + pin2: ["SCL"], + pin3: ["SDA"], + pin4: ["pin4"], + pin5: ["VIN"], + pin6: ["SW1"], + pin7: ["PGND"], + pin8: ["SW2"], + pin9: ["VOUT"], + pin10: ["pin10"], + pin11: ["COMP"], + pin12: ["AGND"], + pin13: ["VCC"], + pin14: ["BOOT2"], + pin15: ["BOOT1"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin7: { requiresGround: true }, + pin12: { requiresGround: true }, + pin13: { requiresPower: true }, +} as const; + +export const TPS55285VALR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C52160906.obj?uuid=66a7c98762914c8189836a64a71f8878", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C52160906.step?uuid=66a7c98762914c8189836a64a71f8878", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012700000070253736, + y: -0.000469899999984591, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TPS55285VALR; diff --git a/lib/chips/TPS560430XDBVR.circuit.tsx b/lib/chips/TPS560430XDBVR.circuit.tsx new file mode 100644 index 00000000..de508399 --- /dev/null +++ b/lib/chips/TPS560430XDBVR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CB"], + pin2: ["GND"], + pin3: ["FB"], + pin4: ["EN"], + pin5: ["VIN"], + pin6: ["SW"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS560430XDBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C524782.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C524782.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default TPS560430XDBVR; diff --git a/lib/chips/TPS561243DRLR.circuit.tsx b/lib/chips/TPS561243DRLR.circuit.tsx new file mode 100644 index 00000000..a6076c05 --- /dev/null +++ b/lib/chips/TPS561243DRLR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["SW"], + pin3: ["GND"], + pin4: ["BST"], + pin5: ["EN"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TPS561243DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS561243DRLR; diff --git a/lib/chips/TPS563252DRLR.circuit.tsx b/lib/chips/TPS563252DRLR.circuit.tsx new file mode 100644 index 00000000..79949aea --- /dev/null +++ b/lib/chips/TPS563252DRLR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["SW"], + pin3: ["GND"], + pin4: ["PG"], + pin5: ["EN"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TPS563252DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS563252DRLR; diff --git a/lib/chips/TPS564252DRLR.circuit.tsx b/lib/chips/TPS564252DRLR.circuit.tsx new file mode 100644 index 00000000..4a4fd5e7 --- /dev/null +++ b/lib/chips/TPS564252DRLR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["SW"], + pin3: ["GND"], + pin4: ["PG"], + pin5: ["EN"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TPS564252DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS564252DRLR; diff --git a/lib/chips/TPS565242DRLR.circuit.tsx b/lib/chips/TPS565242DRLR.circuit.tsx new file mode 100644 index 00000000..6d8692e6 --- /dev/null +++ b/lib/chips/TPS565242DRLR.circuit.tsx @@ -0,0 +1,155 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["SW"], + pin3: ["GND"], + pin4: ["AGND"], + pin5: ["EN"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS565242DRLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5219270.obj?uuid=b370694011514b63b95ead37a576abc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5219270.step?uuid=b370694011514b63b95ead37a576abc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.00003810000009707437, + y: -0.000012700000070253736, + z: -0.05, + }, + }} + {...props} + /> + ); +}; + +export default TPS565242DRLR; diff --git a/lib/chips/TPS566231PRQFR.circuit.tsx b/lib/chips/TPS566231PRQFR.circuit.tsx new file mode 100644 index 00000000..0133e303 --- /dev/null +++ b/lib/chips/TPS566231PRQFR.circuit.tsx @@ -0,0 +1,191 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["FB"], + pin3: ["EN"], + pin4: ["PGND"], + pin5: ["VIN1"], + pin6: ["VIN2"], + pin7: ["BST"], + pin8: ["SW"], + pin9: ["PG"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS566231PRQFR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3190178.obj?uuid=10c2b329135143f69f4df1aeb7252e7e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3190178.step?uuid=10c2b329135143f69f4df1aeb7252e7e", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.0019859000000342353, z: 0 }, + }} + {...props} + /> + ); +}; + +export default TPS566231PRQFR; diff --git a/lib/chips/TPS61021ADSGR.circuit.tsx b/lib/chips/TPS61021ADSGR.circuit.tsx new file mode 100644 index 00000000..190d615e --- /dev/null +++ b/lib/chips/TPS61021ADSGR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AGND"], + pin2: ["FB"], + pin3: ["VOUT1"], + pin4: ["VOUT2"], + pin5: ["EN"], + pin6: ["SW1"], + pin7: ["SW2"], + pin8: ["VIN"], + pin9: ["EPAD"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS61021ADSGR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61021ADSGR; diff --git a/lib/chips/TPS61094DSSR.circuit.tsx b/lib/chips/TPS61094DSSR.circuit.tsx new file mode 100644 index 00000000..76ab1365 --- /dev/null +++ b/lib/chips/TPS61094DSSR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OSEL"], + pin2: ["MODE"], + pin3: ["EN"], + pin4: ["VIN"], + pin5: ["SW"], + pin6: ["SUP"], + pin7: ["PGND"], + pin8: ["AGND"], + pin9: ["VOUT2"], + pin10: ["VOUT1"], + pin11: ["ICHG"], + pin12: ["VCHG"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const TPS61094DSSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61094DSSR; diff --git a/lib/chips/TPS61096ADSSR.circuit.tsx b/lib/chips/TPS61096ADSSR.circuit.tsx new file mode 100644 index 00000000..123f0ea2 --- /dev/null +++ b/lib/chips/TPS61096ADSSR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["LV1"], + pin2: ["LV2"], + pin3: ["VIN"], + pin4: ["SW"], + pin5: ["ILIM"], + pin6: ["EN"], + pin7: ["FB"], + pin8: ["VOSNS"], + pin9: ["VOUT"], + pin10: ["GND"], + pin11: ["HVO2"], + pin12: ["HVO1"], + pin13: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin10: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin13: [...pinLabels["pin13"], "thermalpad"], +} as const; + +export const TPS61096ADSSR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61096ADSSR; diff --git a/lib/chips/TPS61158DRVR.circuit.tsx b/lib/chips/TPS61158DRVR.circuit.tsx new file mode 100644 index 00000000..6152ae4a --- /dev/null +++ b/lib/chips/TPS61158DRVR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CTRL"], + pin2: ["VIN"], + pin3: ["VOUT"], + pin4: ["FB"], + pin5: ["GND"], + pin6: ["LX"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TPS61158DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61158DRVR; diff --git a/lib/chips/TPS61161DRVR.circuit.tsx b/lib/chips/TPS61161DRVR.circuit.tsx new file mode 100644 index 00000000..cb483ce3 --- /dev/null +++ b/lib/chips/TPS61161DRVR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB"], + pin2: ["COMP"], + pin3: ["GND"], + pin4: ["SW"], + pin5: ["CTRL"], + pin6: ["VIN"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TPS61161DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61161DRVR; diff --git a/lib/chips/TPS61165DRVR.circuit.tsx b/lib/chips/TPS61165DRVR.circuit.tsx new file mode 100644 index 00000000..d0c9d768 --- /dev/null +++ b/lib/chips/TPS61165DRVR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB"], + pin2: ["COMP"], + pin3: ["GND"], + pin4: ["SW"], + pin5: ["CTRL"], + pin6: ["VIN"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TPS61165DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61165DRVR; diff --git a/lib/chips/TPS61169DCKR.circuit.tsx b/lib/chips/TPS61169DCKR.circuit.tsx new file mode 100644 index 00000000..f2e01eb1 --- /dev/null +++ b/lib/chips/TPS61169DCKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SW"], + pin2: ["GND"], + pin3: ["FB"], + pin4: ["CTRL"], + pin5: ["VIN"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPS61169DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61169DCKR; diff --git a/lib/chips/TPS61222.circuit.tsx b/lib/chips/TPS61222.circuit.tsx index 3e8742b0..c12e6396 100644 --- a/lib/chips/TPS61222.circuit.tsx +++ b/lib/chips/TPS61222.circuit.tsx @@ -1,34 +1,14 @@ -import type { ChipProps } from "@tscircuit/props"; -import "tscircuit"; +import type { ComponentProps } from "react"; +import { TPS61222DCKR } from "./TPS61222DCKR.circuit.tsx"; -export const TPS61222 = (props: ChipProps) => ( - -); +export type TPS61222Props = ComponentProps & { + footprintVariant?: "sot_23_6"; +}; + +/** TPS61222 low-input-voltage boost converter in the DCK package. */ +export const TPS61222 = ({ + footprintVariant: _footprintVariant = "sot_23_6", + ...props +}: TPS61222Props) => ; export default TPS61222; diff --git a/lib/chips/TPS61222DCKR.circuit.tsx b/lib/chips/TPS61222DCKR.circuit.tsx new file mode 100644 index 00000000..148f6c90 --- /dev/null +++ b/lib/chips/TPS61222DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["FB"], + pin3: ["GND"], + pin4: ["VOUT"], + pin5: ["L"], + pin6: ["EN"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TPS61222DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61222DCKR; diff --git a/lib/chips/TPS61299DRLR.circuit.tsx b/lib/chips/TPS61299DRLR.circuit.tsx index 030e074c..47120c6b 100644 --- a/lib/chips/TPS61299DRLR.circuit.tsx +++ b/lib/chips/TPS61299DRLR.circuit.tsx @@ -1,6 +1,7 @@ import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; -export const TPS61299DRLR_PIN_LABELS = { +const pinLabels = { pin1: ["VIN"], pin2: ["SW"], pin3: ["EN"], @@ -9,141 +10,39 @@ export const TPS61299DRLR_PIN_LABELS = { pin6: ["GND"], } as const; -export const TPS61299DRLR = ( - props: ChipProps, -) => ( - - - - - - - +export const TPS61299DRLR_PIN_LABELS = pinLabels; - - - - - - - } - {...props} - /> -); +const pinAttributes = { + pin1: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const TPS61299DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS61299DRLR; diff --git a/lib/chips/TPS613771RYHR.circuit.tsx b/lib/chips/TPS613771RYHR.circuit.tsx new file mode 100644 index 00000000..3bf882c5 --- /dev/null +++ b/lib/chips/TPS613771RYHR.circuit.tsx @@ -0,0 +1,207 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["pin2"], + pin3: ["MODE"], + pin4: ["VSENSE"], + pin5: ["VOUT"], + pin6: ["SW"], + pin7: ["PGND"], + pin8: ["FB"], + pin9: ["COMP"], + pin10: ["ILIM"], + pin11: ["VCC"], + pin12: ["AGND"], + pin13: ["BOOT"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin7: { requiresGround: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, +} as const; + +export const TPS613771RYHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22427757.obj?uuid=bafcc0cff8254e69a5757e824ec292e5", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22427757.step?uuid=bafcc0cff8254e69a5757e824ec292e5", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.012560300000018287, + y: -0.0001015999999935957, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default TPS613771RYHR; diff --git a/lib/chips/TPS62177DQCT.circuit.tsx b/lib/chips/TPS62177DQCT.circuit.tsx new file mode 100644 index 00000000..7b631901 --- /dev/null +++ b/lib/chips/TPS62177DQCT.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND"], + pin2: ["VIN"], + pin3: ["EN"], + pin4: ["NC"], + pin5: ["FB"], + pin6: ["AGND"], + pin7: ["PG"], + pin8: ["SLEEP"], + pin9: ["SW"], + pin10: ["VOS"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin4: { doNotConnect: true }, + pin6: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const TPS62177DQCT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS62177DQCT; diff --git a/lib/chips/TPS62824ADMQR.circuit.tsx b/lib/chips/TPS62824ADMQR.circuit.tsx new file mode 100644 index 00000000..9e019b8c --- /dev/null +++ b/lib/chips/TPS62824ADMQR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["PG"], + pin3: ["FB"], + pin4: ["GND"], + pin5: ["SW"], + pin6: ["VIN"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const TPS62824ADMQR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862909.obj?uuid=8f670b8e7b1f4fb285b2b8a3630f9ebe", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2862909.step?uuid=8f670b8e7b1f4fb285b2b8a3630f9ebe", + pcbRotationOffset: 270, + modelOriginPosition: { + x: 0.000012700000070253736, + y: -0.026034999999978936, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TPS62824ADMQR; diff --git a/lib/chips/TPS62842DGRR.circuit.tsx b/lib/chips/TPS62842DGRR.circuit.tsx new file mode 100644 index 00000000..51a72ede --- /dev/null +++ b/lib/chips/TPS62842DGRR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOS"], + pin2: ["SW"], + pin3: ["MODE"], + pin4: ["VSET"], + pin5: ["EN"], + pin6: ["VIN"], + pin7: ["NC"], + pin8: ["GND"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresPower: true }, + pin7: { doNotConnect: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS62842DGRR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS62842DGRR; diff --git a/lib/chips/TPS628502QDRLRQ1.circuit.tsx b/lib/chips/TPS628502QDRLRQ1.circuit.tsx new file mode 100644 index 00000000..7c72f454 --- /dev/null +++ b/lib/chips/TPS628502QDRLRQ1.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["EN"], + pin3: ["pin3"], + pin4: ["pin4"], + pin5: ["FB"], + pin6: ["PG"], + pin7: ["SW"], + pin8: ["GND"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +export const TPS628502QDRLRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS628502QDRLRQ1; diff --git a/lib/chips/TPS62933PDRLR.circuit.tsx b/lib/chips/TPS62933PDRLR.circuit.tsx new file mode 100644 index 00000000..f33d5bc4 --- /dev/null +++ b/lib/chips/TPS62933PDRLR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["RT"], + pin2: ["EN"], + pin3: ["VIN"], + pin4: ["GND"], + pin5: ["SW"], + pin6: ["BST"], + pin7: ["PG"], + pin8: ["FB"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS62933PDRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS62933PDRLR; diff --git a/lib/chips/TPS62A01PDDCR.circuit.tsx b/lib/chips/TPS62A01PDDCR.circuit.tsx new file mode 100644 index 00000000..6832544e --- /dev/null +++ b/lib/chips/TPS62A01PDDCR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["GND"], + pin3: ["SW"], + pin4: ["VIN"], + pin5: ["PG"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, +} as const; + +export const TPS62A01PDDCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS62A01PDDCR; diff --git a/lib/chips/TPS62A03ADRLR.circuit.tsx b/lib/chips/TPS62A03ADRLR.circuit.tsx new file mode 100644 index 00000000..d481763a --- /dev/null +++ b/lib/chips/TPS62A03ADRLR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["SW"], + pin3: ["VIN"], + pin4: ["EN"], + pin5: ["FB"], + pin6: ["PG"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresPower: true }, +} as const; + +export const TPS62A03ADRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS62A03ADRLR; diff --git a/lib/chips/TPS631000DRLR.circuit.tsx b/lib/chips/TPS631000DRLR.circuit.tsx new file mode 100644 index 00000000..b2cdd908 --- /dev/null +++ b/lib/chips/TPS631000DRLR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOUT"], + pin2: ["LX2"], + pin3: ["LX1"], + pin4: ["VIN"], + pin5: ["EN"], + pin6: ["MODE"], + pin7: ["GND"], + pin8: ["FB"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const TPS631000DRLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS631000DRLR; diff --git a/lib/chips/TPS63900DSKR.circuit.tsx b/lib/chips/TPS63900DSKR.circuit.tsx new file mode 100644 index 00000000..73957b1a --- /dev/null +++ b/lib/chips/TPS63900DSKR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["EN"], + pin2: ["SEL"], + pin3: ["CFG1"], + pin4: ["CFG2"], + pin5: ["CFG3"], + pin6: ["VOUT"], + pin7: ["LX2"], + pin8: ["GND"], + pin9: ["LX1"], + pin10: ["VIN"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin8: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const TPS63900DSKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS63900DSKR; diff --git a/lib/chips/TPS65023BRSBR.circuit.tsx b/lib/chips/TPS65023BRSBR.circuit.tsx new file mode 100644 index 00000000..6b267c16 --- /dev/null +++ b/lib/chips/TPS65023BRSBR.circuit.tsx @@ -0,0 +1,90 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DEFDCDC3"], + pin2: ["VDCDC3"], + pin3: ["PGND3"], + pin4: ["L3"], + pin5: ["VINDCDC3"], + pin6: ["VINDCDC1"], + pin7: ["L1"], + pin8: ["PGND1"], + pin9: ["VDCDC1"], + pin10: ["DEFDCDC1"], + pin11: ["HOT_RESET"], + pin12: ["DEFLDO1"], + pin13: ["DEFLDO2"], + pin14: ["VSYSIN"], + pin15: ["VBACKUP"], + pin16: ["VRTC"], + pin17: ["AGND2"], + pin18: ["VLDO2"], + pin19: ["VINLDO"], + pin20: ["VLDO1"], + pin21: ["LOWBAT"], + pin22: ["LDO_EN"], + pin23: ["DCDC3_EN"], + pin24: ["DCDC2_EN"], + pin25: ["DCDC1_EN"], + pin26: ["TRESPWRON"], + pin27: ["RESPWRON"], + pin28: ["INT"], + pin29: ["SDAT"], + pin30: ["SCLK"], + pin31: ["PWRFAIL"], + pin32: ["DEFDCDC2"], + pin33: ["VDCDC2"], + pin34: ["PGND2"], + pin35: ["L2"], + pin36: ["VINDCDC2"], + pin37: ["VCC"], + pin38: ["PWRFAIL_SNS"], + pin39: ["LOWBAT_SNS"], + pin40: ["AGND1"], + pin41: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin8: { requiresGround: true }, + pin17: { requiresGround: true }, + pin34: { requiresGround: true }, + pin37: { requiresPower: true }, + pin40: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin41: [...pinLabels["pin41"], "thermalpad"], +} as const; + +export const TPS65023BRSBR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65023BRSBR; diff --git a/lib/chips/TPS650250RHBT.circuit.tsx b/lib/chips/TPS650250RHBT.circuit.tsx new file mode 100644 index 00000000..0e00d366 --- /dev/null +++ b/lib/chips/TPS650250RHBT.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDCDC3"], + pin2: ["PGND3"], + pin3: ["L3"], + pin4: ["VINDCDC3"], + pin5: ["VINDCDC1"], + pin6: ["L1"], + pin7: ["PGND1"], + pin8: ["VDCDC1"], + pin9: ["DEFDCDC1"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["VDD_ALIVE"], + pin13: ["AGND2"], + pin14: ["VLDO2"], + pin15: ["VINLDO"], + pin16: ["VLDO1"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["PWRFAIL"], + pin22: ["DEFDCDC2"], + pin23: ["MODE"], + pin24: ["EN_VDD_alive"], + pin25: ["VDCDC2"], + pin26: ["PGND2"], + pin27: ["L2"], + pin28: ["VINDCDC2"], + pin29: ["VCC"], + pin30: ["pin30"], + pin31: ["AGND1"], + pin32: ["DEFDCDC3"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin7: { requiresGround: true }, + pin13: { requiresGround: true }, + pin26: { requiresGround: true }, + pin29: { requiresPower: true }, + pin31: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const TPS650250RHBT = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS650250RHBT; diff --git a/lib/chips/TPS65105PWPR.circuit.tsx b/lib/chips/TPS65105PWPR.circuit.tsx new file mode 100644 index 00000000..18f0c167 --- /dev/null +++ b/lib/chips/TPS65105PWPR.circuit.tsx @@ -0,0 +1,67 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB1"], + pin2: ["FB4"], + pin3: ["BASE"], + pin4: ["VIN"], + pin5: ["SW1"], + pin6: ["SW2"], + pin7: ["PGND1"], + pin8: ["PGND2"], + pin9: ["SUP"], + pin10: ["VCOM"], + pin11: ["VCOMIN"], + pin12: ["FB3"], + pin13: ["OUT3"], + pin14: ["C2_POS"], + pin15: ["pin15"], + pin16: ["C1_POS"], + pin17: ["C1_NEG"], + pin18: ["DRV"], + pin19: ["EP"], + pin20: ["REF"], + pin21: ["FB2"], + pin22: ["COMP"], + pin23: ["ENR"], + pin24: ["EN"], + pin25: ["pin25"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TPS65105PWPR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65105PWPR; diff --git a/lib/chips/TPS65130RGER.circuit.tsx b/lib/chips/TPS65130RGER.circuit.tsx new file mode 100644 index 00000000..38f77745 --- /dev/null +++ b/lib/chips/TPS65130RGER.circuit.tsx @@ -0,0 +1,74 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INP2"], + pin2: ["PGND2"], + pin3: ["PGND1"], + pin4: ["VIN"], + pin5: ["INN2"], + pin6: ["INN1"], + pin7: ["BSW"], + pin8: ["ENP"], + pin9: ["PSP"], + pin10: ["ENN"], + pin11: ["PSN"], + pin12: ["NC2"], + pin13: ["OUTN2"], + pin14: ["OUTN1"], + pin15: ["VNEG"], + pin16: ["FBN"], + pin17: ["VREF"], + pin18: ["CN"], + pin19: ["AGND"], + pin20: ["NC1"], + pin21: ["CP"], + pin22: ["FBP"], + pin23: ["VPOS"], + pin24: ["INP1"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin4: { requiresPower: true }, + pin12: { doNotConnect: true }, + pin19: { requiresGround: true }, + pin20: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TPS65130RGER = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65130RGER; diff --git a/lib/chips/TPS65145RGER.circuit.tsx b/lib/chips/TPS65145RGER.circuit.tsx new file mode 100644 index 00000000..f6735576 --- /dev/null +++ b/lib/chips/TPS65145RGER.circuit.tsx @@ -0,0 +1,73 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["ENR"], + pin3: ["EN"], + pin4: ["FB1"], + pin5: ["FB4"], + pin6: ["BASE"], + pin7: ["VIN"], + pin8: ["SW2"], + pin9: ["SW1"], + pin10: ["PGND2"], + pin11: ["PGND1"], + pin12: ["SUP"], + pin13: ["PG"], + pin14: ["GND2"], + pin15: ["FB3"], + pin16: ["OUT3"], + pin17: ["C2_POS"], + pin18: ["pin18"], + pin19: ["C1_POS"], + pin20: ["C1_NEG"], + pin21: ["DRV"], + pin22: ["GND1"], + pin23: ["REF"], + pin24: ["FB2"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin10: { requiresGround: true }, + pin11: { requiresGround: true }, + pin14: { requiresGround: true }, + pin22: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TPS65145RGER = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65145RGER; diff --git a/lib/chips/TPS6521401VAFR.circuit.tsx b/lib/chips/TPS6521401VAFR.circuit.tsx new file mode 100644 index 00000000..adb76263 --- /dev/null +++ b/lib/chips/TPS6521401VAFR.circuit.tsx @@ -0,0 +1,342 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MODE", "STBY", "1"], + pin2: ["FB_B2", "2"], + pin3: ["VLDO2", "3"], + pin4: ["VSYS", "PVIN_LDO12", "4"], + pin5: ["VLDO1", "5"], + pin6: ["AGND", "6"], + pin7: ["VDD1P8", "7"], + pin8: ["FB_B1", "8"], + pin9: ["GPO", "NWAKEUP", "9"], + pin10: ["PGND", "10", "PGND_10"], + pin11: ["LX_B1", "11"], + pin12: ["PVIN_B1", "12"], + pin13: ["SDA", "13"], + pin14: ["SCL", "14"], + pin15: ["NINT", "15"], + pin16: ["GPIO", "VSEL", "16"], + pin17: ["NRSTOUT", "17"], + pin18: ["FB_B3", "18"], + pin19: ["EN", "PB", "VSENSE", "19"], + pin20: ["PVIN_B3", "20"], + pin21: ["LX_B3", "21"], + pin22: ["PGND", "22", "PGND_22"], + pin23: ["LX_B2", "23"], + pin24: ["PVIN_B2", "24"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "input", + pin3: "output", + pin4: "power", + pin5: "output", + pin6: "ground", + pin7: "power", + pin8: "input", + pin9: "output", + pin10: "ground", + pin11: "output", + pin12: "power", + pin13: "bidirectional", + pin14: "control", + pin15: "output", + pin16: "output", + pin17: "output", + pin18: "input", + pin19: "control", + pin20: "power", + pin21: "output", + pin22: "ground", + pin23: "output", + pin24: "power", +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin6: { requiresGround: true }, + pin7: { requiresPower: true }, + pin10: { requiresGround: true }, + pin12: { requiresPower: true }, + pin20: { requiresPower: true }, + pin22: { requiresGround: true }, + pin24: { requiresPower: true }, +} as const; + +export const TPS6521401VAFR = (props: ChipProps) => { + // Footprint provenance: TI drawing VAF0024A; official source https://www.ti.com/lit/gpn/TPS65214 pages 139 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS6521401VAFR; diff --git a/lib/chips/TPS65217CRSLR.circuit.tsx b/lib/chips/TPS65217CRSLR.circuit.tsx new file mode 100644 index 00000000..09e9a439 --- /dev/null +++ b/lib/chips/TPS65217CRSLR.circuit.tsx @@ -0,0 +1,92 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VLDO2"], + pin2: ["VINLDO"], + pin3: ["VLDO1"], + pin4: ["BAT1"], + pin5: ["BAT2"], + pin6: ["BAT_SENSE"], + pin7: ["SYS1"], + pin8: ["SYS2"], + pin9: ["PWR_EN"], + pin10: ["AC"], + pin11: ["TS"], + pin12: ["USB"], + pin13: ["nWAKEUP"], + pin14: ["MUX_IN"], + pin15: ["NC1"], + pin16: ["MUX_OUT"], + pin17: ["NC2"], + pin18: ["VIO"], + pin19: ["VDCDC1"], + pin20: ["L1"], + pin21: ["VIN_DCDC1"], + pin22: ["VIN_DCDC2"], + pin23: ["L2"], + pin24: ["VDCDC2"], + pin25: ["PB_IN"], + pin26: ["PGOOD"], + pin27: ["SDA"], + pin28: ["SCL"], + pin29: ["VDCDC3"], + pin30: ["PGND"], + pin31: ["L3"], + pin32: ["VIN_DCDC3"], + pin33: ["ISINK2"], + pin34: ["ISINK1"], + pin35: ["ISET1"], + pin36: ["ISET2"], + pin37: ["L4"], + pin38: ["FB_WLED"], + pin39: ["LS1_IN"], + pin40: ["LS1_OUT"], + pin41: ["AGND"], + pin42: ["LS2_IN"], + pin43: ["LS2_OUT"], + pin44: ["nRESET"], + pin45: ["nINT"], + pin46: ["LDO_PGOOD"], + pin47: ["BYPASS"], + pin48: ["INT_LDO"], + pin49: ["EP"], +} as const; + +const pinAttributes = { + pin15: { doNotConnect: true }, + pin17: { doNotConnect: true }, + pin30: { requiresGround: true }, + pin41: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const TPS65217CRSLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65217CRSLR; diff --git a/lib/chips/TPS6521815RSLR.circuit.tsx b/lib/chips/TPS6521815RSLR.circuit.tsx new file mode 100644 index 00000000..d7ba1f17 --- /dev/null +++ b/lib/chips/TPS6521815RSLR.circuit.tsx @@ -0,0 +1,84 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN_DCDC1"], + pin2: ["SDA"], + pin3: ["SCL"], + pin4: ["LDO1"], + pin5: ["IN_LDO1"], + pin6: ["IN_LS3"], + pin7: ["LS3"], + pin8: ["PGOOD"], + pin9: ["AC_DET"], + pin10: ["nPFO"], + pin11: ["GPIO1"], + pin12: ["IN_DCDC4"], + pin13: ["L4A"], + pin14: ["L4B"], + pin15: ["DCDC4"], + pin16: ["PFI"], + pin17: ["DC34_SEL"], + pin18: ["IN_nCC"], + pin19: ["PGOOD_BU"], + pin20: ["L5"], + pin21: ["FB5"], + pin22: ["FB6"], + pin23: ["L6"], + pin24: ["SYS_BU"], + pin25: ["CC"], + pin26: ["GPIO3"], + pin27: ["IN_BU"], + pin28: ["pin28"], + pin29: ["pin29"], + pin30: ["LS1"], + pin31: ["IN_LS1"], + pin32: ["IN_LS2"], + pin33: ["LS2"], + pin34: ["GPO2"], + pin35: ["INT_LDO"], + pin36: ["IN_BIAS"], + pin37: ["IN_DCDC3"], + pin38: ["L3"], + pin39: ["FB3"], + pin40: ["nWAKEUP"], + pin41: ["FB2"], + pin42: ["L2"], + pin43: ["IN_DCDC2"], + pin44: ["PB"], + pin45: ["nINT"], + pin46: ["PWR_EN"], + pin47: ["FB1"], + pin48: ["L1"], + pin49: ["EP"], +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const TPS6521815RSLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS6521815RSLR; diff --git a/lib/chips/TPS6521902RSMR.circuit.tsx b/lib/chips/TPS6521902RSMR.circuit.tsx new file mode 100644 index 00000000..e4709b49 --- /dev/null +++ b/lib/chips/TPS6521902RSMR.circuit.tsx @@ -0,0 +1,74 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB_B1"], + pin2: ["LX_B1_1"], + pin3: ["LX_B1_2"], + pin4: ["PVIN_B1_1"], + pin5: ["PVIN_B1_2"], + pin6: ["PVIN_LDO1"], + pin7: ["VLDO1"], + pin8: ["GPO1"], + pin9: ["SDA"], + pin10: ["SCL"], + pin11: ["nINT"], + pin12: ["pin12"], + pin13: ["VSYS"], + pin14: ["VDD1P8"], + pin15: ["AGND"], + pin16: ["GPIO"], + pin17: ["GPO2"], + pin18: ["nRSTOUT"], + pin19: ["VLDO2"], + pin20: ["PVIN_LDO2"], + pin21: ["VLDO3"], + pin22: ["PVIN_LDO34"], + pin23: ["VLDO4"], + pin24: ["FB_B3"], + pin25: ["pin25"], + pin26: ["PVIN_B3"], + pin27: ["LX_B3"], + pin28: ["pin28"], + pin29: ["LX_B2"], + pin30: ["PVIN_B2"], + pin31: ["pin31"], + pin32: ["FB_B2"], + pin33: ["GND"], +} as const; + +const pinAttributes = { + pin15: { requiresGround: true }, + pin33: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const TPS6521902RSMR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS6521902RSMR; diff --git a/lib/chips/TPS6522430RAHRQ1.circuit.tsx b/lib/chips/TPS6522430RAHRQ1.circuit.tsx new file mode 100644 index 00000000..22a4e889 --- /dev/null +++ b/lib/chips/TPS6522430RAHRQ1.circuit.tsx @@ -0,0 +1,472 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SCL_I2C1", "SCK_SPI", "1"], + pin2: ["SDA_I2C1", "SDI_SPI", "2"], + pin3: ["VCCA", "3"], + pin4: ["FB_B1", "4"], + pin5: ["AGND", "5", "AGND_5"], + pin6: ["FB_B2", "6"], + pin7: ["VOUT_LDOVINT", "7"], + pin8: ["GPIO3", "8"], + pin9: ["VMON1", "9"], + pin10: ["GPIO4", "10"], + pin11: ["GPIO5", "11"], + pin12: ["PVIN_B3", "12"], + pin13: ["SW_B3", "13"], + pin14: ["PGND_B34", "14"], + pin15: ["SW_B4", "15"], + pin16: ["PVIN_B4", "16"], + pin17: ["EN", "PB", "VSENSE", "17"], + pin18: ["VIO", "18"], + pin19: ["VOUT_LDO1", "19"], + pin20: ["PVIN_LDO12", "20"], + pin21: ["VOUT_LDO2", "21"], + pin22: ["FB_B4", "22"], + pin23: ["AGND", "23", "AGND_23"], + pin24: ["FB_B3", "24"], + pin25: ["VOUT_LDO3", "25"], + pin26: ["PVIN_LDO3", "26"], + pin27: ["N_INT", "EN_DRV", "27"], + pin28: ["N_RSTOUT", "28"], + pin29: ["GPIO6", "29"], + pin30: ["PVIN_B2", "30"], + pin31: ["SW_B2", "31"], + pin32: ["PGND_B12", "32"], + pin33: ["SW_B1", "33"], + pin34: ["PVIN_B1", "34"], + pin35: ["GPIO1", "SDA_I2C2", "SDO_SPI", "35"], + pin36: ["GPIO2", "SCL_I2C2", "CS0_SPI", "36"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "bidirectional", + pin3: "power", + pin4: "unknown", + pin5: "ground", + pin6: "unknown", + pin7: "output", + pin8: "bidirectional", + pin9: "power", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "unknown", + pin13: "output", + pin14: "ground", + pin15: "output", + pin16: "unknown", + pin17: "control", + pin18: "unknown", + pin19: "output", + pin20: "unknown", + pin21: "output", + pin22: "unknown", + pin23: "ground", + pin24: "unknown", + pin25: "output", + pin26: "unknown", + pin27: "control", + pin28: "control", + pin29: "bidirectional", + pin30: "unknown", + pin31: "output", + pin32: "ground", + pin33: "output", + pin34: "unknown", + pin35: "bidirectional", + pin36: "control", +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin5: { requiresGround: true }, + pin9: { requiresPower: true }, + pin14: { requiresGround: true }, + pin23: { requiresGround: true }, + pin32: { requiresGround: true }, +} as const; + +export const TPS6522430RAHRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing RAH0036A; official source https://www.ti.com/lit/gpn/TPS65224-Q1 pages 11 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS6522430RAHRQ1; diff --git a/lib/chips/TPS65296RJER.circuit.tsx b/lib/chips/TPS65296RJER.circuit.tsx new file mode 100644 index 00000000..3907bc24 --- /dev/null +++ b/lib/chips/TPS65296RJER.circuit.tsx @@ -0,0 +1,290 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VLDOIN"], + pin2: ["VDDQ"], + pin3: ["AGND"], + pin4: ["VDDQSNS"], + pin5: ["VDD2SNS"], + pin6: ["VDDQREF"], + pin7: ["PVIN"], + pin8: ["PGOOD"], + pin9: ["PGND"], + pin10: ["VDDQ_EN"], + pin11: ["VDD_EN"], + pin12: ["VDD1SNS"], + pin13: ["VCC_5V"], + pin14: ["PVIN_VDD1"], + pin15: ["SW_VDD1"], + pin16: ["PGND_VDD1"], + pin17: ["SW"], + pin18: ["BST"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin9: { requiresGround: true }, +} as const; + +export const TPS65296RJER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1849557.obj?uuid=bc5c0769fe184f889a4f2bc9c663b263", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1849557.step?uuid=bc5c0769fe184f889a4f2bc9c663b263", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.0026162000000340413, + y: -0.00007619999996677507, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TPS65296RJER; diff --git a/lib/chips/TPS65381AQDAPRQ1.circuit.tsx b/lib/chips/TPS65381AQDAPRQ1.circuit.tsx new file mode 100644 index 00000000..4d5942b8 --- /dev/null +++ b/lib/chips/TPS65381AQDAPRQ1.circuit.tsx @@ -0,0 +1,455 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VBAT_SAFING"], + pin2: ["VCP"], + pin3: ["CP1"], + pin4: ["CP2"], + pin5: ["PGND2"], + pin6: ["NRES"], + pin7: ["DIAG_OUT"], + pin8: ["NCS"], + pin9: ["SDI"], + pin10: ["SDO"], + pin11: ["SCLK"], + pin12: ["RSTEXT"], + pin13: ["pin13"], + pin14: ["CANWU"], + pin15: ["VSFB1"], + pin16: ["VSIN"], + pin17: ["VSOUT1"], + pin18: ["VTRACK1"], + pin19: ["GND2"], + pin20: ["VDD5"], + pin21: ["pin21"], + pin22: ["VDDIO"], + pin23: ["GND1"], + pin24: ["VDD1_SENSE"], + pin25: ["PGND1"], + pin26: ["VDD1_G"], + pin27: ["VDD6"], + pin28: ["SDN6"], + pin29: ["VBATP"], + pin30: ["IGN"], + pin31: ["pin31"], + pin32: ["ENDRV"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin19: { requiresGround: true }, + pin20: { requiresPower: true }, + pin23: { requiresGround: true }, + pin25: { requiresGround: true }, + pin27: { requiresPower: true }, +} as const; + +export const TPS65381AQDAPRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C702333.obj?uuid=3aaa0d1b9f7541b7b843976deac531b1", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C702333.step?uuid=3aaa0d1b9f7541b7b843976deac531b1", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0.000012699999956566899, z: -0.65 }, + }} + {...props} + /> + ); +}; + +export default TPS65381AQDAPRQ1; diff --git a/lib/chips/TPS65910A31A1RSLR.circuit.tsx b/lib/chips/TPS65910A31A1RSLR.circuit.tsx new file mode 100644 index 00000000..ee4671c4 --- /dev/null +++ b/lib/chips/TPS65910A31A1RSLR.circuit.tsx @@ -0,0 +1,97 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PWRHOLD"], + pin2: ["VMMC"], + pin3: ["VCC3"], + pin4: ["VAUX33"], + pin5: ["VDIG2"], + pin6: ["VCC6"], + pin7: ["VDIG1"], + pin8: ["SDA"], + pin9: ["SCL"], + pin10: ["pin10"], + pin11: ["pin11"], + pin12: ["VDDIO"], + pin13: ["VCCIO"], + pin14: ["SWIO"], + pin15: ["GNDIO"], + pin16: ["VFBIO"], + pin17: ["REFGND"], + pin18: ["VREF"], + pin19: ["BOOT1"], + pin20: ["OSC32KIN"], + pin21: ["OSC32KOUT"], + pin22: ["VDAC"], + pin23: ["VCC5"], + pin24: ["VPLL"], + pin25: ["TESTV"], + pin26: ["BOOT0"], + pin27: ["VBACKUP"], + pin28: ["VCC7"], + pin29: ["VRRTC"], + pin30: ["VFB3"], + pin31: ["SW3"], + pin32: ["VFB1"], + pin33: ["PWRON"], + pin34: ["GND1"], + pin35: ["SW1"], + pin36: ["VCC1"], + pin37: ["SLEEP"], + pin38: ["CLK32KOUT"], + pin39: ["pin39"], + pin40: ["NRESPWRON"], + pin41: ["VCC2"], + pin42: ["SW2"], + pin43: ["GND2"], + pin44: ["VFB2"], + pin45: ["INT1"], + pin46: ["VAUX1"], + pin47: ["VCC4"], + pin48: ["VAUX2"], + pin49: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin6: { requiresPower: true }, + pin23: { requiresPower: true }, + pin28: { requiresPower: true }, + pin34: { requiresGround: true }, + pin36: { requiresPower: true }, + pin41: { requiresPower: true }, + pin43: { requiresGround: true }, + pin47: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin49: [...pinLabels["pin49"], "thermalpad"], +} as const; + +export const TPS65910A31A1RSLR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65910A31A1RSLR; diff --git a/lib/chips/TPS65930A2ZCHR.circuit.tsx b/lib/chips/TPS65930A2ZCHR.circuit.tsx new file mode 100644 index 00000000..8838d685 --- /dev/null +++ b/lib/chips/TPS65930A2ZCHR.circuit.tsx @@ -0,0 +1,1334 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TEST", "A1"], + pin2: ["VMMC1_IN", "A2"], + pin3: ["CLKEN", "A4"], + pin4: ["VINTANA2_OUT", "A5", "VINTANA2_OUT_A5"], + pin5: ["PREDRIV_LEFT", "A7"], + pin6: ["PREDRIV_RIGHT", "A8"], + pin7: ["VBAT_RIGHT", "A10"], + pin8: ["HFCLKIN", "A11"], + pin9: ["VDD1_GND", "A12", "VDD1_GND_A12"], + pin10: ["JTAG_TDI", "BERDATA", "A13"], + pin11: ["TESTV2", "A14"], + pin12: ["VMMC1_OUT", "B1"], + pin13: ["KPD_C3", "B2"], + pin14: ["N_C", "B3"], + pin15: ["I2C_CNTL_SCL", "B4"], + pin16: ["IO_1P8", "B7"], + pin17: ["REGEN", "B8"], + pin18: ["NRESWARM", "B9"], + pin19: ["GPIO13", "B10"], + pin20: ["VDD1_GND", "B11", "VDD1_GND_B11"], + pin21: ["VDD1_GND", "B12", "VDD1_GND_B12"], + pin22: ["CLKREQ", "B13"], + pin23: ["JTAG_TCK", "BERCLK", "B14"], + pin24: ["I2C_CNTL_SDA", "C3"], + pin25: ["VMODE2", "C5"], + pin26: ["AVSS4", "C7"], + pin27: ["NRESPWRON", "C8"], + pin28: ["INT1", "C10"], + pin29: ["VDD1_SW", "C11", "VDD1_SW_C11"], + pin30: ["VDD1_SW", "C12", "VDD1_SW_C12"], + pin31: ["VDD1_SW", "C13", "VDD1_SW_C13"], + pin32: ["MIC_MAIN_P", "D1"], + pin33: ["MICBIAS_GND", "D2"], + pin34: ["KPD_C5", "D5"], + pin35: ["BOOT1", "D7"], + pin36: ["SYSEN", "D8"], + pin37: ["PWRON", "D10"], + pin38: ["VDD1_IN", "D12", "VDD1_IN_D12"], + pin39: ["VDD1_IN", "D13", "VDD1_IN_D13"], + pin40: ["VDD1_IN", "D14", "VDD1_IN_D14"], + pin41: ["MIC_MAIN_M", "E1"], + pin42: ["MICBIAS1_OUT", "E2"], + pin43: ["KPD_C4", "E3"], + pin44: ["VMODE1", "E4"], + pin45: ["KPD_C2", "E5"], + pin46: ["GPIO1", "E7"], + pin47: ["BOOT0", "E8"], + pin48: ["CLK256FS", "E10"], + pin49: ["DATA7", "E11"], + pin50: ["DATA4", "E12"], + pin51: ["LEDA", "E13"], + pin52: ["VDD1_FB", "E14"], + pin53: ["ADCIN2", "F2"], + pin54: ["GPIO0", "CD1", "F7"], + pin55: ["LEDGND", "F13"], + pin56: ["AUXR", "G1"], + pin57: ["AVSS1", "G2"], + pin58: ["KPD_C1", "G3"], + pin59: ["KPD_C0", "G4"], + pin60: ["NSLEEP1", "G5"], + pin61: ["ID", "G6"], + pin62: ["DATA5", "G9"], + pin63: ["DATA3", "G10"], + pin64: ["DATA2", "G11"], + pin65: ["DATA6", "G12"], + pin66: ["LEDB", "G13"], + pin67: ["VPLL1_OUT", "G14"], + pin68: ["VINTANA1_OUT", "H1"], + pin69: ["ADCIN0", "H2"], + pin70: ["I2S_CLK", "H3"], + pin71: ["MSECURE", "H4"], + pin72: ["KPD_R1", "H5"], + pin73: ["KPD_R3", "H6"], + pin74: ["BKBAT", "H9"], + pin75: ["DGND", "H10"], + pin76: ["DIR", "H11"], + pin77: ["STP", "H12"], + pin78: ["VINT_IN", "H13"], + pin79: ["VPLLA3R_IN", "H14"], + pin80: ["VINTANA2_OUT", "J2", "VINTANA2_OUT_J2"], + pin81: ["GPIO7", "J7"], + pin82: ["NXT", "J8"], + pin83: ["VINTDIG_OUT", "J13"], + pin84: ["VDAC_IN", "K1"], + pin85: ["I2S_SYNC", "K2"], + pin86: ["I2S_DOUT", "K3"], + pin87: ["I2S_DIN", "K4"], + pin88: ["KPD_R2", "K5"], + pin89: ["KPD_R0", "K7"], + pin90: ["KPD_R4", "K8"], + pin91: ["DATA1", "K10"], + pin92: ["UCLK", "K11"], + pin93: ["VRTC_OUT", "K12"], + pin94: ["AGND", "K13"], + pin95: ["32KXOUT", "K14"], + pin96: ["VAUX12S_IN", "L1"], + pin97: ["VDAC_OUT", "L2"], + pin98: ["GPIO6", "L5"], + pin99: ["AVSS2", "L7"], + pin100: ["KPD_R5", "L8"], + pin101: ["DATA0", "L10"], + pin102: ["VREF", "L13"], + pin103: ["32KXIN", "L14"], + pin104: ["VIO_IN", "M2", "VIO_IN_M2"], + pin105: ["VIO_IN", "M3", "VIO_IN_M3"], + pin106: ["VIO_FB", "M4"], + pin107: ["PCHGAC", "M5"], + pin108: ["VINTUSB1P5_OUT", "M7"], + pin109: ["VUSB_3P1", "M8"], + pin110: ["32KCLKOUT", "M10"], + pin111: ["HFCLKOUT", "M11"], + pin112: ["VDD2_IN", "M12", "VDD2_IN_M12"], + pin113: ["VDD2_IN", "M13", "VDD2_IN_M13"], + pin114: ["VPRECH", "N1"], + pin115: ["VAUX2_OUT", "N2"], + pin116: ["VIO_GND", "N3", "VIO_GND_N3"], + pin117: ["VIO_SW", "N4", "VIO_SW_N4"], + pin118: ["VBAT", "N5"], + pin119: ["CP_CAPM", "N6"], + pin120: ["CP_CAPP", "N7"], + pin121: ["VINTUSB1P8_OUT", "N8"], + pin122: ["VBAT_USB", "N9"], + pin123: ["DP", "UART3_RXD", "N10"], + pin124: ["VDD2_SW", "N11", "VDD2_SW_N11"], + pin125: ["VDD2_GND", "N12", "VDD2_GND_N12"], + pin126: ["VDD2_FB", "N13"], + pin127: ["AVSS3", "N14"], + pin128: ["TESTV1", "P1"], + pin129: ["GPIO2", "P2"], + pin130: ["VIO_GND", "P3", "VIO_GND_P3"], + pin131: ["VIO_SW", "P4", "VIO_SW_P4"], + pin132: ["CP_GND", "P5"], + pin133: ["CP_IN", "P7"], + pin134: ["VBUS", "P8"], + pin135: ["DN", "UART3_TXD", "P10"], + pin136: ["VDD2_SW", "P11", "VDD2_SW_P11"], + pin137: ["VDD2_GND", "P12", "VDD2_GND_P12"], + pin138: ["GPIO15", "P13"], + pin139: ["TEST_RESET", "P14"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "power", + pin3: "output", + pin4: "power", + pin5: "output", + pin6: "output", + pin7: "power", + pin8: "input", + pin9: "ground", + pin10: "input", + pin11: "bidirectional", + pin12: "power", + pin13: "unknown", + pin14: "no-connect", + pin15: "bidirectional", + pin16: "power", + pin17: "unknown", + pin18: "input", + pin19: "bidirectional", + pin20: "ground", + pin21: "ground", + pin22: "control", + pin23: "input", + pin24: "bidirectional", + pin25: "power", + pin26: "ground", + pin27: "output", + pin28: "output", + pin29: "output", + pin30: "output", + pin31: "output", + pin32: "input", + pin33: "ground", + pin34: "unknown", + pin35: "control", + pin36: "input", + pin37: "input", + pin38: "power", + pin39: "power", + pin40: "power", + pin41: "input", + pin42: "power", + pin43: "unknown", + pin44: "power", + pin45: "unknown", + pin46: "bidirectional", + pin47: "control", + pin48: "output", + pin49: "bidirectional", + pin50: "bidirectional", + pin51: "output", + pin52: "power", + pin53: "input", + pin54: "bidirectional", + pin55: "ground", + pin56: "input", + pin57: "ground", + pin58: "unknown", + pin59: "unknown", + pin60: "input", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "bidirectional", + pin64: "bidirectional", + pin65: "bidirectional", + pin66: "output", + pin67: "power", + pin68: "power", + pin69: "bidirectional", + pin70: "bidirectional", + pin71: "input", + pin72: "input", + pin73: "input", + pin74: "power", + pin75: "ground", + pin76: "output", + pin77: "input", + pin78: "power", + pin79: "power", + pin80: "power", + pin81: "bidirectional", + pin82: "output", + pin83: "power", + pin84: "power", + pin85: "bidirectional", + pin86: "output", + pin87: "input", + pin88: "input", + pin89: "input", + pin90: "input", + pin91: "bidirectional", + pin92: "input", + pin93: "power", + pin94: "ground", + pin95: "output", + pin96: "power", + pin97: "output", + pin98: "bidirectional", + pin99: "ground", + pin100: "input", + pin101: "bidirectional", + pin102: "power", + pin103: "input", + pin104: "power", + pin105: "power", + pin106: "input", + pin107: "input", + pin108: "power", + pin109: "power", + pin110: "output", + pin111: "output", + pin112: "power", + pin113: "power", + pin114: "output", + pin115: "power", + pin116: "ground", + pin117: "output", + pin118: "power", + pin119: "output", + pin120: "output", + pin121: "power", + pin122: "power", + pin123: "bidirectional", + pin124: "output", + pin125: "ground", + pin126: "power", + pin127: "ground", + pin128: "bidirectional", + pin129: "bidirectional", + pin130: "ground", + pin131: "output", + pin132: "ground", + pin133: "power", + pin134: "power", + pin135: "bidirectional", + pin136: "output", + pin137: "ground", + pin138: "bidirectional", + pin139: "control", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin4: { requiresPower: true }, + pin7: { requiresPower: true }, + pin9: { requiresGround: true }, + pin12: { requiresPower: true }, + pin14: { doNotConnect: true }, + pin16: { requiresPower: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin25: { requiresPower: true }, + pin26: { requiresGround: true }, + pin33: { requiresGround: true }, + pin38: { requiresPower: true }, + pin39: { requiresPower: true }, + pin40: { requiresPower: true }, + pin42: { requiresPower: true }, + pin44: { requiresPower: true }, + pin52: { requiresPower: true }, + pin55: { requiresGround: true }, + pin57: { requiresGround: true }, + pin67: { requiresPower: true }, + pin68: { requiresPower: true }, + pin74: { requiresPower: true }, + pin75: { requiresGround: true }, + pin78: { requiresPower: true }, + pin79: { requiresPower: true }, + pin80: { requiresPower: true }, + pin83: { requiresPower: true }, + pin84: { requiresPower: true }, + pin93: { requiresPower: true }, + pin94: { requiresGround: true }, + pin96: { requiresPower: true }, + pin99: { requiresGround: true }, + pin102: { requiresPower: true }, + pin104: { requiresPower: true }, + pin105: { requiresPower: true }, + pin108: { requiresPower: true }, + pin109: { requiresPower: true }, + pin112: { requiresPower: true }, + pin113: { requiresPower: true }, + pin115: { requiresPower: true }, + pin116: { requiresGround: true }, + pin118: { requiresPower: true }, + pin121: { requiresPower: true }, + pin122: { requiresPower: true }, + pin125: { requiresGround: true }, + pin126: { requiresPower: true }, + pin127: { requiresGround: true }, + pin130: { requiresGround: true }, + pin132: { requiresGround: true }, + pin133: { requiresPower: true }, + pin134: { requiresPower: true }, + pin137: { requiresGround: true }, +} as const; + +export const TPS65930A2ZCHR = (props: ChipProps) => { + // Footprint provenance: TI drawing ZCH0139A; official source https://www.ti.com/packaging/tw/docs/searchproductbypackage.tsp?orderablePartNumber=&packageDesignator=ZCH&pinCount=139&results=results + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS65930A2ZCHR; diff --git a/lib/chips/TPS65931211RWERQ1.circuit.tsx b/lib/chips/TPS65931211RWERQ1.circuit.tsx new file mode 100644 index 00000000..00bf7757 --- /dev/null +++ b/lib/chips/TPS65931211RWERQ1.circuit.tsx @@ -0,0 +1,99 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AMUXOUT"], + pin2: ["VOUT_LDOVINT"], + pin3: ["VOUT_LDOVRTC"], + pin4: ["VCCA"], + pin5: ["REFGND1"], + pin6: ["REFGND2"], + pin7: ["VOUT_LDO4"], + pin8: ["PVIN_LDO4"], + pin9: ["VOUT_LDO3"], + pin10: ["PVIN_LDO3"], + pin11: ["VOUT_LDO2"], + pin12: ["PVIN_LDO12"], + pin13: ["VOUT_LDO1"], + pin14: ["nINT"], + pin15: ["SW_B21"], + pin16: ["SW_B22"], + pin17: ["PVIN_B2"], + pin18: ["GPIO7"], + pin19: ["GPIO9"], + pin20: ["pin20"], + pin21: ["FB_B2"], + pin22: ["FB_B1"], + pin23: ["GPIO5"], + pin24: ["GPIO6"], + pin25: ["nRSTOUT"], + pin26: ["PVIN_B1"], + pin27: ["SW_B11"], + pin28: ["SW_B12"], + pin29: ["EN_DRV"], + pin30: ["pin30"], + pin31: ["pin31"], + pin32: ["GPIO1"], + pin33: ["GPIO2"], + pin34: ["SW_B5"], + pin35: ["PVIN_B5"], + pin36: ["VBACKUP"], + pin37: ["FB_B5"], + pin38: ["OSC32KIN"], + pin39: ["OSC32KOUT"], + pin40: ["OSC32KCAP"], + pin41: ["GPIO8"], + pin42: ["GPIO10"], + pin43: ["SW_B31"], + pin44: ["SW_B32"], + pin45: ["PVIN_B3"], + pin46: ["GPIO3"], + pin47: ["GPIO4"], + pin48: ["VIO_IN"], + pin49: ["FB_B3"], + pin50: ["FB_B4"], + pin51: ["GND1"], + pin52: ["GND2"], + pin53: ["GPIO11"], + pin54: ["PVIN_B4"], + pin55: ["SW_B41"], + pin56: ["SW_B42"], + pin57: ["GND3"], +} as const; + +const pinAttributes = { + pin51: { requiresGround: true }, + pin52: { requiresGround: true }, + pin57: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin57: [...pinLabels["pin57"], "thermalpad"], +} as const; + +export const TPS65931211RWERQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS65931211RWERQ1; diff --git a/lib/chips/TPS70950QDBVRQ1.circuit.tsx b/lib/chips/TPS70950QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..2b220be2 --- /dev/null +++ b/lib/chips/TPS70950QDBVRQ1.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["NC"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const TPS70950QDBVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS70950QDBVRQ1; diff --git a/lib/chips/TPS76350QDBVRQ1.circuit.tsx b/lib/chips/TPS76350QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..94971337 --- /dev/null +++ b/lib/chips/TPS76350QDBVRQ1.circuit.tsx @@ -0,0 +1,151 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["NC"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const TPS76350QDBVRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C201605.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C201605.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default TPS76350QDBVRQ1; diff --git a/lib/chips/TPS78233DDCR.circuit.tsx b/lib/chips/TPS78233DDCR.circuit.tsx new file mode 100644 index 00000000..40aaf4c5 --- /dev/null +++ b/lib/chips/TPS78233DDCR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND2"], + pin3: ["EN"], + pin4: ["GND1"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS78233DDCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS78233DDCR; diff --git a/lib/chips/TPS7A1633DGNR.circuit.tsx b/lib/chips/TPS7A1633DGNR.circuit.tsx new file mode 100644 index 00000000..044786e9 --- /dev/null +++ b/lib/chips/TPS7A1633DGNR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["pin2"], + pin3: ["PG"], + pin4: ["GND"], + pin5: ["EN"], + pin6: ["NC"], + pin7: ["DELAY"], + pin8: ["IN"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS7A1633DGNR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS7A1633DGNR; diff --git a/lib/chips/TPS7A2033PDBVR.circuit.tsx b/lib/chips/TPS7A2033PDBVR.circuit.tsx index 2aa45318..5dbc2676 100644 --- a/lib/chips/TPS7A2033PDBVR.circuit.tsx +++ b/lib/chips/TPS7A2033PDBVR.circuit.tsx @@ -1,5 +1,6 @@ import type { ChipProps } from "@tscircuit/props"; import "tscircuit"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; const pinLabels = { pin1: "VIN", @@ -12,31 +13,11 @@ const pinLabels = { /** TPS7A20 3.3 V fixed-output regulator in the 5-pin SOT-23 package. */ export const TPS7A2033PDBVR = (props: ChipProps) => ( ); diff --git a/lib/chips/TPS7A2525DRVR.circuit.tsx b/lib/chips/TPS7A2525DRVR.circuit.tsx new file mode 100644 index 00000000..829d486c --- /dev/null +++ b/lib/chips/TPS7A2525DRVR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["NC"], + pin3: ["PG"], + pin4: ["EN"], + pin5: ["GND"], + pin6: ["IN"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin2: { doNotConnect: true }, + pin5: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TPS7A2525DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS7A2525DRVR; diff --git a/lib/chips/TPS7A4901DGNR.circuit.tsx b/lib/chips/TPS7A4901DGNR.circuit.tsx new file mode 100644 index 00000000..80c1c625 --- /dev/null +++ b/lib/chips/TPS7A4901DGNR.circuit.tsx @@ -0,0 +1,228 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["FB"], + pin3: ["NC"], + pin4: ["GND"], + pin5: ["EN"], + pin6: ["pin6"], + pin7: ["DNC"], + pin8: ["IN"], + pin9: ["PwPd"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS7A4901DGNR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS7A4901DGNR; diff --git a/lib/chips/TPS7A5301BRPSR.circuit.tsx b/lib/chips/TPS7A5301BRPSR.circuit.tsx new file mode 100644 index 00000000..5422ac43 --- /dev/null +++ b/lib/chips/TPS7A5301BRPSR.circuit.tsx @@ -0,0 +1,171 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN", "1", "IN_1"], + pin2: ["IN", "2", "IN_2"], + pin3: ["EN", "3"], + pin4: ["NR", "SS", "4"], + pin5: ["BIAS", "5"], + pin6: ["GND", "6", "GND_6"], + pin7: ["GND", "7", "GND_7"], + pin8: ["PG", "8"], + pin9: ["FB", "9"], + pin10: ["OUT", "10", "OUT_10"], + pin11: ["OUT", "11", "OUT_11"], + pin12: ["GND", "12", "GND_12"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "control", + pin4: "control", + pin5: "input", + pin6: "ground", + pin7: "ground", + pin8: "output", + pin9: "input", + pin10: "output", + pin11: "output", + pin12: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin6: { requiresGround: true }, + pin7: { requiresGround: true }, + pin12: { requiresGround: true }, +} as const; + +export const TPS7A5301BRPSR = (props: ChipProps) => { + // Footprint provenance: TI drawing RPS0012A; official source https://www.ti.com/lit/gpn/TPS7A53B pages 41 + return ( + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS7A5301BRPSR; diff --git a/lib/chips/TPS7A9401DSCR.circuit.tsx b/lib/chips/TPS7A9401DSCR.circuit.tsx new file mode 100644 index 00000000..e4430b04 --- /dev/null +++ b/lib/chips/TPS7A9401DSCR.circuit.tsx @@ -0,0 +1,217 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["EN_UV"], + pin4: ["PG"], + pin5: ["FB_PG"], + pin6: ["GND"], + pin7: ["pin7"], + pin8: ["SNS"], + pin9: ["OUT1"], + pin10: ["OUT2"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, +} as const; + +export const TPS7A9401DSCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5220127.obj?uuid=156e205a83594893a980adc9e51e4d53", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C5220127.step?uuid=156e205a83594893a980adc9e51e4d53", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000038099999983387534, + y: 0.00008889999980965513, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS7A9401DSCR; diff --git a/lib/chips/TPS7A9601DSCR.circuit.tsx b/lib/chips/TPS7A9601DSCR.circuit.tsx new file mode 100644 index 00000000..539a365f --- /dev/null +++ b/lib/chips/TPS7A9601DSCR.circuit.tsx @@ -0,0 +1,217 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["EN_UV"], + pin4: ["PG"], + pin5: ["FB_PG"], + pin6: ["GND"], + pin7: ["pin7"], + pin8: ["SNS"], + pin9: ["OUT1"], + pin10: ["OUT2"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, +} as const; + +export const TPS7A9601DSCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22015929.obj?uuid=156e205a83594893a980adc9e51e4d53", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22015929.step?uuid=156e205a83594893a980adc9e51e4d53", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000038099999983387534, + y: 0.00008889999980965513, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TPS7A9601DSCR; diff --git a/lib/chips/TPS7B4255QDBVRQ1.circuit.tsx b/lib/chips/TPS7B4255QDBVRQ1.circuit.tsx new file mode 100644 index 00000000..ee29adac --- /dev/null +++ b/lib/chips/TPS7B4255QDBVRQ1.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["GND"], + pin3: ["IN"], + pin4: ["OUT"], + pin5: ["NC"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { doNotConnect: true }, +} as const; + +export const TPS7B4255QDBVRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS7B4255QDBVRQ1; diff --git a/lib/chips/TPS7B4260QDDARQ1.circuit.tsx b/lib/chips/TPS7B4260QDDARQ1.circuit.tsx new file mode 100644 index 00000000..0147d2b3 --- /dev/null +++ b/lib/chips/TPS7B4260QDDARQ1.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["OUT"], + pin2: ["DNC"], + pin3: ["GND1"], + pin4: ["FB"], + pin5: ["pin5"], + pin6: ["GND2"], + pin7: ["NC"], + pin8: ["IN"], + pin9: ["GND3"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin9: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS7B4260QDDARQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS7B4260QDDARQ1; diff --git a/lib/chips/TPS7E7101DBVR.circuit.tsx b/lib/chips/TPS7E7101DBVR.circuit.tsx new file mode 100644 index 00000000..10cf5f59 --- /dev/null +++ b/lib/chips/TPS7E7101DBVR.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN", "1"], + pin2: ["GND", "2"], + pin3: ["EN", "3"], + pin4: ["NC", "ADJ", "4"], + pin5: ["OUT", "5"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "control", + pin4: "no-connect", + pin5: "output", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const TPS7E7101DBVR = (props: ChipProps) => { + // Footprint provenance: TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363) + return ( + + ); +}; + +export default TPS7E7101DBVR; diff --git a/lib/chips/TPS7E8150DBVR.circuit.tsx b/lib/chips/TPS7E8150DBVR.circuit.tsx new file mode 100644 index 00000000..6a0cd4ae --- /dev/null +++ b/lib/chips/TPS7E8150DBVR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["GND"], + pin3: ["EN"], + pin4: ["NC"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const TPS7E8150DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS7E8150DBVR; diff --git a/lib/chips/TPS92200D2RXLR.circuit.tsx b/lib/chips/TPS92200D2RXLR.circuit.tsx new file mode 100644 index 00000000..f68f9731 --- /dev/null +++ b/lib/chips/TPS92200D2RXLR.circuit.tsx @@ -0,0 +1,165 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["BOOT"], + pin2: ["SW"], + pin3: ["VIN"], + pin4: ["GND"], + pin5: ["DIM"], + pin6: ["FB"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const TPS92200D2RXLR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS92200D2RXLR; diff --git a/lib/chips/TPS922051D1DGNR.circuit.tsx b/lib/chips/TPS922051D1DGNR.circuit.tsx new file mode 100644 index 00000000..45a3792c --- /dev/null +++ b/lib/chips/TPS922051D1DGNR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["VIN"], + pin3: ["DIM"], + pin4: ["VCC"], + pin5: ["COMP"], + pin6: ["CSP"], + pin7: ["CSN"], + pin8: ["SW"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresPower: true }, + pin4: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const TPS922051D1DGNR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS922051D1DGNR; diff --git a/lib/chips/TPS92612DBVR.circuit.tsx b/lib/chips/TPS92612DBVR.circuit.tsx new file mode 100644 index 00000000..587de935 --- /dev/null +++ b/lib/chips/TPS92612DBVR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["PWM"], + pin3: ["SUPPLY"], + pin4: ["IN"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, +} as const; + +export const TPS92612DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS92612DBVR; diff --git a/lib/chips/TPS92640PWPR_NOPB.circuit.tsx b/lib/chips/TPS92640PWPR_NOPB.circuit.tsx new file mode 100644 index 00000000..d37d76dd --- /dev/null +++ b/lib/chips/TPS92640PWPR_NOPB.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["RON"], + pin3: ["UDIM"], + pin4: ["VOUT"], + pin5: ["VREF"], + pin6: ["IADJ"], + pin7: ["COMP"], + pin8: ["GND"], + pin9: ["CS"], + pin10: ["LG"], + pin11: ["VCC"], + pin12: ["BOOT"], + pin13: ["SW"], + pin14: ["HG"], + pin15: ["pin15"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin8: { requiresGround: true }, + pin11: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin15: [...pinLabels["pin15"], "thermalpad"], +} as const; + +export const TPS92640PWPR_NOPB = (props: ChipProps) => { + return ( + + ); +}; + +export default TPS92640PWPR_NOPB; diff --git a/lib/chips/TPS92761QPHPRQ1.circuit.tsx b/lib/chips/TPS92761QPHPRQ1.circuit.tsx new file mode 100644 index 00000000..56351215 --- /dev/null +++ b/lib/chips/TPS92761QPHPRQ1.circuit.tsx @@ -0,0 +1,530 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1", "GND_1"], + pin2: ["LED6", "2"], + pin3: ["LED5", "3"], + pin4: ["LED4", "4"], + pin5: ["LED3", "5"], + pin6: ["LED2", "6"], + pin7: ["LED1", "7"], + pin8: ["VBCK", "8"], + pin9: ["SW", "9", "SW_9"], + pin10: ["SW", "10", "SW_10"], + pin11: ["BST", "11", "BST_11"], + pin12: ["BST", "12", "BST_12"], + pin13: ["PGND", "13", "PGND_13"], + pin14: ["PGND", "14", "PGND_14"], + pin15: ["VIN", "15", "VIN_15"], + pin16: ["VIN", "16", "VIN_16"], + pin17: ["GND", "17", "GND_17"], + pin18: ["COMP", "18"], + pin19: ["EN", "19"], + pin20: ["TX", "20"], + pin21: ["RX", "21"], + pin22: ["V5D", "22"], + pin23: ["V5A", "23"], + pin24: ["GND", "24", "GND_24"], + pin25: ["RREF", "25"], + pin26: ["VREF", "26"], + pin27: ["IN", "VEXT", "27"], + pin28: ["MPIO1", "28"], + pin29: ["MPIO0", "29"], + pin30: ["LED24", "N_FLT", "30"], + pin31: ["LED23", "31"], + pin32: ["LED22", "32"], + pin33: ["LED21", "33"], + pin34: ["LED20", "34"], + pin35: ["LED19", "35"], + pin36: ["GND", "36", "GND_36"], + pin37: ["LED18", "37"], + pin38: ["LED17", "38"], + pin39: ["LED16", "39"], + pin40: ["LED15", "40"], + pin41: ["LED14", "41"], + pin42: ["LED13", "42"], + pin43: ["LED12", "43"], + pin44: ["LED11", "44"], + pin45: ["LED10", "45"], + pin46: ["LED9", "46"], + pin47: ["LED8", "47"], + pin48: ["LED7", "48"], + pin49: ["THERMAL_PAD", "49"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "output", + pin3: "output", + pin4: "output", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "unknown", + pin9: "output", + pin10: "output", + pin11: "unknown", + pin12: "unknown", + pin13: "ground", + pin14: "ground", + pin15: "power", + pin16: "power", + pin17: "ground", + pin18: "unknown", + pin19: "control", + pin20: "output", + pin21: "input", + pin22: "unknown", + pin23: "unknown", + pin24: "ground", + pin25: "unknown", + pin26: "power", + pin27: "input", + pin28: "unknown", + pin29: "unknown", + pin30: "output", + pin31: "output", + pin32: "output", + pin33: "output", + pin34: "output", + pin35: "output", + pin36: "ground", + pin37: "output", + pin38: "output", + pin39: "output", + pin40: "output", + pin41: "output", + pin42: "output", + pin43: "output", + pin44: "output", + pin45: "output", + pin46: "output", + pin47: "output", + pin48: "output", + pin49: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin13: { requiresGround: true }, + pin14: { requiresGround: true }, + pin15: { requiresPower: true }, + pin16: { requiresPower: true }, + pin17: { requiresGround: true }, + pin24: { requiresGround: true }, + pin26: { requiresPower: true }, + pin36: { requiresGround: true }, + pin49: { requiresGround: true }, +} as const; + +export const TPS92761QPHPRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing PHP0048L; official source https://www.ti.com/lit/gpn/TPS92761-Q1 pages 9 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPS92761QPHPRQ1; diff --git a/lib/chips/TPSM64406RCHR.circuit.tsx b/lib/chips/TPSM64406RCHR.circuit.tsx new file mode 100644 index 00000000..29097440 --- /dev/null +++ b/lib/chips/TPSM64406RCHR.circuit.tsx @@ -0,0 +1,433 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PG1"], + pin2: ["EN1"], + pin3: ["VOSNS1"], + pin4: ["FB1"], + pin5: ["VCC"], + pin6: ["AGND"], + pin7: ["RT"], + pin8: ["FB2"], + pin9: ["VOSNS2"], + pin10: ["EN2"], + pin11: ["CONFIG"], + pin12: ["PG2"], + pin13: ["PGND2"], + pin14: ["VIN2"], + pin15: ["CB2"], + pin16: ["SW22"], + pin17: ["SW21"], + pin18: ["VOUT21"], + pin19: ["VOUT22"], + pin20: ["VOUT11"], + pin21: ["VOUT12"], + pin22: ["SW11"], + pin23: ["SW12"], + pin24: ["CB1"], + pin25: ["VIN1"], + pin26: ["PGND1"], + pin27: ["SYNC"], + pin28: ["PGND"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin6: { requiresGround: true }, + pin13: { requiresGround: true }, + pin14: { requiresPower: true }, + pin25: { requiresPower: true }, + pin26: { requiresGround: true }, + pin28: { requiresGround: true }, +} as const; + +export const TPSM64406RCHR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22445537.obj?uuid=9d2da92084ec473fbe109d73500bbbae", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C22445537.step?uuid=9d2da92084ec473fbe109d73500bbbae", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.11999594999997498, + y: -0.000025400000026820635, + z: -0.01, + }, + }} + {...props} + /> + ); +}; + +export default TPSM64406RCHR; diff --git a/lib/chips/TPSM828214SILR.circuit.tsx b/lib/chips/TPSM828214SILR.circuit.tsx new file mode 100644 index 00000000..02cbf21f --- /dev/null +++ b/lib/chips/TPSM828214SILR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN1"], + pin2: ["VIN2"], + pin3: ["EN"], + pin4: ["PG"], + pin5: ["VOUT2"], + pin6: ["VOUT3"], + pin7: ["VOUT1"], + pin8: ["FB"], + pin9: ["GND2"], + pin10: ["GND1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, +} as const; + +export const TPSM828214SILR = (props: ChipProps) => { + return ( + + ); +}; + +export default TPSM828214SILR; diff --git a/lib/chips/TPSM828223SILR.circuit.tsx b/lib/chips/TPSM828223SILR.circuit.tsx new file mode 100644 index 00000000..ea9e2772 --- /dev/null +++ b/lib/chips/TPSM828223SILR.circuit.tsx @@ -0,0 +1,177 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN2"], + pin2: ["VIN1"], + pin3: ["EN"], + pin4: ["PG"], + pin5: ["VOUT3"], + pin6: ["VOUT2"], + pin7: ["VOUT1"], + pin8: ["FB"], + pin9: ["GND2"], + pin10: ["GND1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin9: { requiresGround: true }, + pin10: { requiresGround: true }, +} as const; + +export const TPSM828223SILR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM828223SILR; diff --git a/lib/chips/TPSM828301ARDSR.circuit.tsx b/lib/chips/TPSM828301ARDSR.circuit.tsx new file mode 100644 index 00000000..aea868cf --- /dev/null +++ b/lib/chips/TPSM828301ARDSR.circuit.tsx @@ -0,0 +1,295 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN", "1"], + pin2: ["GND", "2"], + pin3: ["MODE", "3"], + pin4: ["FB", "4"], + pin5: ["VOS", "5"], + pin6: ["VOUT", "6"], + pin7: ["PG", "7"], + pin8: ["SW", "8"], + pin9: ["EN", "9"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "ground", + pin3: "control", + pin4: "input", + pin5: "output", + pin6: "output", + pin7: "output", + pin8: "output", + pin9: "control", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const TPSM828301ARDSR = (props: ChipProps) => { + // Footprint provenance: TI drawing RDS0009A; donor TPSM828303ARDSR (JLCPCB C22445538) + return ( + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM828301ARDSR; diff --git a/lib/chips/TPSM828303ARDSR.circuit.tsx b/lib/chips/TPSM828303ARDSR.circuit.tsx new file mode 100644 index 00000000..4067434a --- /dev/null +++ b/lib/chips/TPSM828303ARDSR.circuit.tsx @@ -0,0 +1,285 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN"], + pin2: ["GND"], + pin3: ["MODE"], + pin4: ["FB"], + pin5: ["VOS"], + pin6: ["VOUT"], + pin7: ["PG"], + pin8: ["SW"], + pin9: ["EN"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const TPSM828303ARDSR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM828303ARDSR; diff --git a/lib/chips/TPSM82901SISR.circuit.tsx b/lib/chips/TPSM82901SISR.circuit.tsx new file mode 100644 index 00000000..3ac2a0a4 --- /dev/null +++ b/lib/chips/TPSM82901SISR.circuit.tsx @@ -0,0 +1,229 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN", "1", "VIN_1"], + pin2: ["VIN", "2", "VIN_2"], + pin3: ["EN", "3"], + pin4: ["MODE", "S_CONF", "4"], + pin5: ["SS", "TR", "5"], + pin6: ["PG", "6"], + pin7: ["FB", "VSET", "7"], + pin8: ["SW", "NC", "8"], + pin9: ["VOUT", "9", "VOUT_9"], + pin10: ["VOUT", "10", "VOUT_10"], + pin11: ["GND", "11"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "control", + pin4: "control", + pin5: "control", + pin6: "output", + pin7: "input", + pin8: "no-connect", + pin9: "output", + pin10: "output", + pin11: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin8: { doNotConnect: true }, + pin11: { requiresGround: true }, +} as const; + +export const TPSM82901SISR = (props: ChipProps) => { + // Footprint provenance: TI drawing SIS0011A; donor TPSM82903SISR (JLCPCB C6290583) + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM82901SISR; diff --git a/lib/chips/TPSM82903SISR.circuit.tsx b/lib/chips/TPSM82903SISR.circuit.tsx new file mode 100644 index 00000000..a8440749 --- /dev/null +++ b/lib/chips/TPSM82903SISR.circuit.tsx @@ -0,0 +1,228 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN1"], + pin2: ["VIN2"], + pin3: ["EN"], + pin4: ["pin4"], + pin5: ["pin5"], + pin6: ["PG"], + pin7: ["pin7"], + pin8: ["pin8"], + pin9: ["VOUT1"], + pin10: ["VOUT2"], + pin11: ["GND"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin11: { requiresGround: true }, +} as const; + +export const TPSM82903SISR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6290583.obj?uuid=e08582a09e52401f9230d8ca36a20ab5", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C6290583.step?uuid=e08582a09e52401f9230d8ca36a20ab5", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.00005080000005364127, + y: -0.00007620000019414874, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TPSM82903SISR; diff --git a/lib/chips/TPSM843620SITR.circuit.tsx b/lib/chips/TPSM843620SITR.circuit.tsx new file mode 100644 index 00000000..fad3c10d --- /dev/null +++ b/lib/chips/TPSM843620SITR.circuit.tsx @@ -0,0 +1,204 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["FB"], + pin2: ["AGND"], + pin3: ["BP5"], + pin4: ["PG"], + pin5: ["MODE"], + pin6: ["EN"], + pin7: ["PGND1"], + pin8: ["PGND2"], + pin9: ["PGND3"], + pin10: ["VIN"], + pin11: ["SW"], + pin12: ["BOOT"], + pin13: ["pin13"], + pin14: ["VOUT"], + pin15: ["pin15"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, + pin9: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const TPSM843620SITR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C37033163.obj?uuid=969e5c722afb4cbc9a50ddbab23a7549", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C37033163.step?uuid=969e5c722afb4cbc9a50ddbab23a7549", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.0001142999999501626, + y: -0.00013969999997698324, + z: -0.05, + }, + }} + {...props} + /> + ); +}; + +export default TPSM843620SITR; diff --git a/lib/chips/TPSM863252RDXR.circuit.tsx b/lib/chips/TPSM863252RDXR.circuit.tsx new file mode 100644 index 00000000..0eb57935 --- /dev/null +++ b/lib/chips/TPSM863252RDXR.circuit.tsx @@ -0,0 +1,128 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VIN", "1"], + pin2: ["SW", "2"], + pin3: ["VOUT", "3"], + pin4: ["PGND", "4"], + pin5: ["PG", "5"], + pin6: ["EN", "6"], + pin7: ["FB", "7"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "no-connect", + pin3: "output", + pin4: "ground", + pin5: "power", + pin6: "control", + pin7: "unknown", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { doNotConnect: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const TPSM863252RDXR = (props: ChipProps) => { + // Footprint provenance: TI drawing RDX0007A; official source https://www.ti.com/lit/gpn/TPSM863252 pages 29 + return ( + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM863252RDXR; diff --git a/lib/chips/TPSM8A29RDGR.circuit.tsx b/lib/chips/TPSM8A29RDGR.circuit.tsx new file mode 100644 index 00000000..07fb6096 --- /dev/null +++ b/lib/chips/TPSM8A29RDGR.circuit.tsx @@ -0,0 +1,296 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["PGND", "1", "PGND_1"], + pin2: ["SW", "2"], + pin3: ["VCC", "3"], + pin4: ["VIN", "4", "VIN_4"], + pin5: ["VIN", "5", "VIN_5"], + pin6: ["BOOT", "6"], + pin7: ["MODE", "7"], + pin8: ["AGND", "8", "AGND_8"], + pin9: ["TRIP", "9"], + pin10: ["VOUT", "10", "VOUT_10"], + pin11: ["VOUT", "11", "VOUT_11"], + pin12: ["FB", "12"], + pin13: ["VSNS", "13"], + pin14: ["AGND", "14", "AGND_14"], + pin15: ["SS", "REFIN", "15"], + pin16: ["VIN", "16", "VIN_16"], + pin17: ["VIN", "17", "VIN_17"], + pin18: ["EN", "18"], + pin19: ["PGOOD", "19"], + pin20: ["PGND", "20", "PGND_20"], + pin21: ["PGND", "21", "PGND_21"], + pin22: ["PGND", "22", "PGND_22"], + pin23: ["VIN", "23", "VIN_23"], + pin24: ["PGND", "24", "PGND_24"], + pin25: ["PGND", "25", "PGND_25"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "no-connect", + pin3: "bidirectional", + pin4: "power", + pin5: "power", + pin6: "no-connect", + pin7: "control", + pin8: "ground", + pin9: "bidirectional", + pin10: "output", + pin11: "output", + pin12: "output", + pin13: "input", + pin14: "ground", + pin15: "bidirectional", + pin16: "power", + pin17: "power", + pin18: "no-connect", + pin19: "output", + pin20: "ground", + pin21: "ground", + pin22: "ground", + pin23: "power", + pin24: "ground", + pin25: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { doNotConnect: true }, + pin4: { requiresPower: true }, + pin5: { requiresPower: true }, + pin6: { doNotConnect: true }, + pin8: { requiresGround: true }, + pin14: { requiresGround: true }, + pin16: { requiresPower: true }, + pin17: { requiresPower: true }, + pin18: { doNotConnect: true }, + pin20: { requiresGround: true }, + pin21: { requiresGround: true }, + pin22: { requiresGround: true }, + pin23: { requiresPower: true }, + pin24: { requiresGround: true }, + pin25: { requiresGround: true }, +} as const; + +export const TPSM8A29RDGR = (props: ChipProps) => { + // Footprint provenance: TI drawing RDG0025A; official source https://www.ti.com/lit/gpn/TPSM8A29 pages 43 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TPSM8A29RDGR; diff --git a/lib/chips/TRF7964ARHBR.circuit.tsx b/lib/chips/TRF7964ARHBR.circuit.tsx new file mode 100644 index 00000000..434d238d --- /dev/null +++ b/lib/chips/TRF7964ARHBR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD_A"], + pin2: ["VIN"], + pin3: ["VDD_RF"], + pin4: ["VDD_PA"], + pin5: ["TX_OUT"], + pin6: ["VSS_RF"], + pin7: ["VSS_RX"], + pin8: ["RX_IN1"], + pin9: ["RX_IN2"], + pin10: ["VSS"], + pin11: ["BG"], + pin12: ["pin12"], + pin13: ["IRQ"], + pin14: ["MOD"], + pin15: ["VSS_A"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["EN2"], + pin26: ["DATA_CLK"], + pin27: ["SYS_CLK"], + pin28: ["EN"], + pin29: ["VSS_D"], + pin30: ["OSC_OUT"], + pin31: ["OSC_IN"], + pin32: ["VDD_X"], + pin33: ["EPAD"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin10: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const TRF7964ARHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRF7964ARHBR; diff --git a/lib/chips/TRF7970ARHBR.circuit.tsx b/lib/chips/TRF7970ARHBR.circuit.tsx new file mode 100644 index 00000000..8377f167 --- /dev/null +++ b/lib/chips/TRF7970ARHBR.circuit.tsx @@ -0,0 +1,78 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD_A"], + pin2: ["VIN"], + pin3: ["VDD_RF"], + pin4: ["VDD_PA"], + pin5: ["TX_OUT"], + pin6: ["VSS_PA"], + pin7: ["VSS_RX"], + pin8: ["RX_IN1"], + pin9: ["RX_IN2"], + pin10: ["Vss"], + pin11: ["BAND_GAP"], + pin12: ["pin12"], + pin13: ["IRQ"], + pin14: ["MOD"], + pin15: ["VSS_A"], + pin16: ["pin16"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["EN2"], + pin26: ["DATA_CLK"], + pin27: ["SYS_CLK"], + pin28: ["EN"], + pin29: ["VSS_D"], + pin30: ["OSC_OUT"], + pin31: ["OSC_IN"], + pin32: ["VDD_X"], + pin33: ["EP"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin10: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin33: [...pinLabels["pin33"], "thermalpad"], +} as const; + +export const TRF7970ARHBR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRF7970ARHBR; diff --git a/lib/chips/TRS3122ERGER.circuit.tsx b/lib/chips/TRS3122ERGER.circuit.tsx new file mode 100644 index 00000000..0bf05167 --- /dev/null +++ b/lib/chips/TRS3122ERGER.circuit.tsx @@ -0,0 +1,72 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C3_POS"], + pin2: ["C3_NEG"], + pin3: ["RIN1"], + pin4: ["RIN2"], + pin5: ["DOUT1"], + pin6: ["DOUT2"], + pin7: ["NC2"], + pin8: ["NC1"], + pin9: ["DIN2"], + pin10: ["DIN1"], + pin11: ["ROUT2"], + pin12: ["ROUT1"], + pin13: ["INVALID"], + pin14: ["FORCEOFF"], + pin15: ["FORCEON"], + pin16: ["C1_NEG"], + pin17: ["GND"], + pin18: ["VL"], + pin19: ["VCC"], + pin20: ["V_POS"], + pin21: ["C1_POS"], + pin22: ["C2_POS"], + pin23: ["C2_NEG"], + pin24: ["V_NEG"], + pin25: ["EP"], +} as const; + +const pinAttributes = { + pin7: { doNotConnect: true }, + pin8: { doNotConnect: true }, + pin17: { requiresGround: true }, + pin19: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin25: [...pinLabels["pin25"], "thermalpad"], +} as const; + +export const TRS3122ERGER = (props: ChipProps) => { + return ( + + ); +}; + +export default TRS3122ERGER; diff --git a/lib/chips/TRS3232EIRGTR.circuit.tsx b/lib/chips/TRS3232EIRGTR.circuit.tsx new file mode 100644 index 00000000..61462fc8 --- /dev/null +++ b/lib/chips/TRS3232EIRGTR.circuit.tsx @@ -0,0 +1,58 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C1_NEG"], + pin2: ["C2_POS"], + pin3: ["C2_NEG"], + pin4: ["V_NEG"], + pin5: ["DOUT2"], + pin6: ["RIN2"], + pin7: ["ROUT2"], + pin8: ["DIN2"], + pin9: ["DIN1"], + pin10: ["ROUT1"], + pin11: ["RIN1"], + pin12: ["DOUT1"], + pin13: ["GND"], + pin14: ["VCC"], + pin15: ["V_POS"], + pin16: ["C1_POS"], + pin17: ["EP"], +} as const; + +const pinAttributes = { + pin13: { requiresGround: true }, + pin14: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin17: [...pinLabels["pin17"], "thermalpad"], +} as const; + +export const TRS3232EIRGTR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRS3232EIRGTR; diff --git a/lib/chips/TRS3243ECDBR.circuit.tsx b/lib/chips/TRS3243ECDBR.circuit.tsx new file mode 100644 index 00000000..dba67df4 --- /dev/null +++ b/lib/chips/TRS3243ECDBR.circuit.tsx @@ -0,0 +1,64 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C2_POS"], + pin2: ["C2_NEG"], + pin3: ["V_NEG"], + pin4: ["RIN1"], + pin5: ["RIN2"], + pin6: ["RIN3"], + pin7: ["RIN4"], + pin8: ["RIN5"], + pin9: ["DOUT1"], + pin10: ["DOUT2"], + pin11: ["DOUT3"], + pin12: ["DIN3"], + pin13: ["DIN2"], + pin14: ["DIN1"], + pin15: ["ROUT5"], + pin16: ["ROUT4"], + pin17: ["ROUT3"], + pin18: ["ROUT2"], + pin19: ["ROUT1"], + pin20: ["ROUT2B"], + pin21: ["INVALID"], + pin22: ["FORCEOFF"], + pin23: ["FORCEON"], + pin24: ["C1_NEG"], + pin25: ["GND"], + pin26: ["VCC"], + pin27: ["V_POS"], + pin28: ["C1_POS"], +} as const; + +const pinAttributes = { + pin25: { requiresGround: true }, + pin26: { requiresPower: true }, +} as const; + +export const TRS3243ECDBR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRS3243ECDBR; diff --git a/lib/chips/TRS3318EIPWR.circuit.tsx b/lib/chips/TRS3318EIPWR.circuit.tsx new file mode 100644 index 00000000..2cd55036 --- /dev/null +++ b/lib/chips/TRS3318EIPWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["READY"], + pin2: ["C1_POS"], + pin3: ["V_POS"], + pin4: ["pin4"], + pin5: ["C2_POS"], + pin6: ["pin6"], + pin7: ["pin7"], + pin8: ["DOUT2"], + pin9: ["RIN2"], + pin10: ["ROUT2"], + pin11: ["INVALID"], + pin12: ["DIN2"], + pin13: ["DIN1"], + pin14: ["FORCEON"], + pin15: ["ROUT1"], + pin16: ["RIN1"], + pin17: ["DOUT1"], + pin18: ["GND"], + pin19: ["VCC"], + pin20: ["FORCEOFF"], +} as const; + +const pinAttributes = { + pin18: { requiresGround: true }, + pin19: { requiresPower: true }, +} as const; + +export const TRS3318EIPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRS3318EIPWR; diff --git a/lib/chips/TRS3386ECPWR.circuit.tsx b/lib/chips/TRS3386ECPWR.circuit.tsx new file mode 100644 index 00000000..dbe8de60 --- /dev/null +++ b/lib/chips/TRS3386ECPWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C1_POS"], + pin2: ["V_POS"], + pin3: ["C1_NEG"], + pin4: ["C2_POS"], + pin5: ["C2_NEG"], + pin6: ["V_NEG"], + pin7: ["DIN1"], + pin8: ["DIN2"], + pin9: ["DIN3"], + pin10: ["ROUT2"], + pin11: ["ROUT1"], + pin12: ["VL"], + pin13: ["RIN2"], + pin14: ["RIN1"], + pin15: ["DOUT3"], + pin16: ["DOUT2"], + pin17: ["DOUT1"], + pin18: ["GND"], + pin19: ["VCC"], + pin20: ["PWRDOWN"], +} as const; + +const pinAttributes = { + pin18: { requiresGround: true }, + pin19: { requiresPower: true }, +} as const; + +export const TRS3386ECPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRS3386ECPWR; diff --git a/lib/chips/TRSF3223EIRGWR.circuit.tsx b/lib/chips/TRSF3223EIRGWR.circuit.tsx new file mode 100644 index 00000000..343e8784 --- /dev/null +++ b/lib/chips/TRSF3223EIRGWR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["C1_POS"], + pin2: ["C1_NEG"], + pin3: ["C2_POS"], + pin4: ["C2_NEG"], + pin5: ["V_NEG"], + pin6: ["DOUT2"], + pin7: ["RIN2"], + pin8: ["ROUT2"], + pin9: ["INVALID"], + pin10: ["DIN2"], + pin11: ["DIN1"], + pin12: ["FORCEON"], + pin13: ["ROUT1"], + pin14: ["RIN1"], + pin15: ["DOUT1"], + pin16: ["GND"], + pin17: ["VCC"], + pin18: ["FORCEOFF"], + pin19: ["EN"], + pin20: ["V_POS"], + pin21: ["EP"], +} as const; + +const pinAttributes = { + pin16: { requiresGround: true }, + pin17: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin21: [...pinLabels["pin21"], "thermalpad"], +} as const; + +export const TRSF3223EIRGWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TRSF3223EIRGWR; diff --git a/lib/chips/TS3DV642RUATQ1.circuit.tsx b/lib/chips/TS3DV642RUATQ1.circuit.tsx new file mode 100644 index 00000000..54ed38e9 --- /dev/null +++ b/lib/chips/TS3DV642RUATQ1.circuit.tsx @@ -0,0 +1,505 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC"], + pin2: ["EN"], + pin3: ["SCL"], + pin4: ["SDA"], + pin5: ["D0_POS"], + pin6: ["D0_NEG"], + pin7: ["D1_POS"], + pin8: ["D1_NEG"], + pin9: ["NC2"], + pin10: ["D2_POS"], + pin11: ["D2_NEG"], + pin12: ["D3_POS"], + pin13: ["D3_NEG"], + pin14: ["HPD"], + pin15: ["CEC"], + pin16: ["SEL1"], + pin17: ["SEL2"], + pin18: ["CEC_A"], + pin19: ["HPD_A"], + pin20: ["CEC_B"], + pin21: ["HPD_B"], + pin22: ["D3_N_B"], + pin23: ["D3_P_B"], + pin24: ["D2_N_B"], + pin25: ["D2_P_B"], + pin26: ["D1_N_B"], + pin27: ["D1_P_B"], + pin28: ["D0_N_B"], + pin29: ["D0_P_B"], + pin30: ["NC1"], + pin31: ["D3_N_A"], + pin32: ["D3_P_A"], + pin33: ["D2_N_A"], + pin34: ["D2_P_A"], + pin35: ["D1_N_A"], + pin36: ["D1_P_A"], + pin37: ["D0_N_A"], + pin38: ["D0_P_A"], + pin39: ["SDA_B"], + pin40: ["SCL_B"], + pin41: ["SDA_A"], + pin42: ["SCL_A"], + pin43: ["GND"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin9: { doNotConnect: true }, + pin30: { doNotConnect: true }, + pin43: { requiresGround: true }, +} as const; + +export const TS3DV642RUATQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3226203.obj?uuid=534c77f4186a49ceb297beee1f7e8304", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3226203.step?uuid=534c77f4186a49ceb297beee1f7e8304", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000025399999913133797, + y: 0.0001142999999501626, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TS3DV642RUATQ1; diff --git a/lib/chips/TS3USB221RSER.circuit.tsx b/lib/chips/TS3USB221RSER.circuit.tsx new file mode 100644 index 00000000..dd7d4d1c --- /dev/null +++ b/lib/chips/TS3USB221RSER.circuit.tsx @@ -0,0 +1,212 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1D_POS"], + pin2: ["1D_NEG"], + pin3: ["2D_POS"], + pin4: ["2D_NEG"], + pin5: ["GND"], + pin6: ["OE"], + pin7: ["D_NEG"], + pin8: ["D_POS"], + pin9: ["S"], + pin10: ["VCC"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin10: { requiresPower: true }, +} as const; + +export const TS3USB221RSER = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130085.obj?uuid=0d4863c7ce0547a4bbb320a855cfdb87", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C130085.step?uuid=0d4863c7ce0547a4bbb320a855cfdb87", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default TS3USB221RSER; diff --git a/lib/chips/TS5A3157DCKR.circuit.tsx b/lib/chips/TS5A3157DCKR.circuit.tsx new file mode 100644 index 00000000..10b09c92 --- /dev/null +++ b/lib/chips/TS5A3157DCKR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NO"], + pin2: ["GND"], + pin3: ["NC"], + pin4: ["COM"], + pin5: ["V_POS"], + pin6: ["IN"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { doNotConnect: true }, +} as const; + +export const TS5A3157DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A3157DCKR; diff --git a/lib/chips/TS5A3159ADBVR.circuit.tsx b/lib/chips/TS5A3159ADBVR.circuit.tsx new file mode 100644 index 00000000..b9003041 --- /dev/null +++ b/lib/chips/TS5A3159ADBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NO"], + pin2: ["GND"], + pin3: ["NC"], + pin4: ["COM"], + pin5: ["V_POS"], + pin6: ["IN"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { doNotConnect: true }, +} as const; + +export const TS5A3159ADBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A3159ADBVR; diff --git a/lib/chips/TS5A3160DBVR.circuit.tsx b/lib/chips/TS5A3160DBVR.circuit.tsx new file mode 100644 index 00000000..1d4cbc33 --- /dev/null +++ b/lib/chips/TS5A3160DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NO"], + pin2: ["GND"], + pin3: ["NC"], + pin4: ["COM"], + pin5: ["V_POS"], + pin6: ["IN"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin3: { doNotConnect: true }, +} as const; + +export const TS5A3160DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A3160DBVR; diff --git a/lib/chips/TS5A3166DBVR.circuit.tsx b/lib/chips/TS5A3166DBVR.circuit.tsx new file mode 100644 index 00000000..31458061 --- /dev/null +++ b/lib/chips/TS5A3166DBVR.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NO"], + pin2: ["COM"], + pin3: ["GND"], + pin4: ["IN"], + pin5: ["V_POS"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const TS5A3166DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A3166DBVR; diff --git a/lib/chips/TS5A3166QDCKRQ1.circuit.tsx b/lib/chips/TS5A3166QDCKRQ1.circuit.tsx new file mode 100644 index 00000000..528343ed --- /dev/null +++ b/lib/chips/TS5A3166QDCKRQ1.circuit.tsx @@ -0,0 +1,40 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["NO"], + pin2: ["COM"], + pin3: ["GND"], + pin4: ["IN"], + pin5: ["V_POS"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, +} as const; + +export const TS5A3166QDCKRQ1 = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A3166QDCKRQ1; diff --git a/lib/chips/TS5A9411DCKR.circuit.tsx b/lib/chips/TS5A9411DCKR.circuit.tsx new file mode 100644 index 00000000..97633487 --- /dev/null +++ b/lib/chips/TS5A9411DCKR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["VCC"], + pin3: ["GND"], + pin4: ["NC"], + pin5: ["COM"], + pin6: ["NO"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, + pin4: { doNotConnect: true }, +} as const; + +export const TS5A9411DCKR = (props: ChipProps) => { + return ( + + ); +}; + +export default TS5A9411DCKR; diff --git a/lib/chips/TSD05DYFR.circuit.tsx b/lib/chips/TSD05DYFR.circuit.tsx new file mode 100644 index 00000000..81a7231a --- /dev/null +++ b/lib/chips/TSD05DYFR.circuit.tsx @@ -0,0 +1,37 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO"], + pin2: ["GND"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, +} as const; + +export const TSD05DYFR = (props: ChipProps) => { + return ( + + ); +}; + +export default TSD05DYFR; diff --git a/lib/chips/TSM24CADBZR.circuit.tsx b/lib/chips/TSM24CADBZR.circuit.tsx new file mode 100644 index 00000000..bd8148eb --- /dev/null +++ b/lib/chips/TSM24CADBZR.circuit.tsx @@ -0,0 +1,42 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IO1"], + pin2: ["IO2"], + pin3: ["NC"], +} as const; + +const pinAttributes = { + pin3: { doNotConnect: true }, +} as const; + +export const TSM24CADBZR = (props: ChipProps) => { + return ( + + ); +}; + +export default TSM24CADBZR; diff --git a/lib/chips/TUSB1004RNQR.circuit.tsx b/lib/chips/TUSB1004RNQR.circuit.tsx new file mode 100644 index 00000000..f73cd591 --- /dev/null +++ b/lib/chips/TUSB1004RNQR.circuit.tsx @@ -0,0 +1,528 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC", "1", "VCC_1"], + pin2: ["SSEQ1", "A1", "2"], + pin3: ["EQCFG", "3"], + pin4: ["SLP_S0", "4"], + pin5: ["NC", "5", "NC_5"], + pin6: ["VCC", "6", "VCC_6"], + pin7: ["TESTOUT1", "7"], + pin8: ["TESTOUT2", "8"], + pin9: ["SSTX2P", "9"], + pin10: ["SSTX2N", "10"], + pin11: ["NC", "11", "NC_11"], + pin12: ["SSRX2P", "12"], + pin13: ["SSRX2N", "13"], + pin14: ["VIO_SEL", "14"], + pin15: ["SSTX1P", "15"], + pin16: ["SSTX1N", "16"], + pin17: ["MODE", "17"], + pin18: ["SSRX1P", "18"], + pin19: ["SSRX1N", "19"], + pin20: ["VCC", "20", "VCC_20"], + pin21: ["TEST2", "SCL", "21"], + pin22: ["AEQENZ", "SDA", "22"], + pin23: ["AEQCFG", "23"], + pin24: ["NC", "24", "NC_24"], + pin25: ["NC", "25", "NC_25"], + pin26: ["EN", "26"], + pin27: ["TEST1", "27"], + pin28: ["VCC", "28", "VCC_28"], + pin29: ["CEQ1", "29"], + pin30: ["CRX1N", "30"], + pin31: ["CRX1P", "31"], + pin32: ["NC", "32", "NC_32"], + pin33: ["CTX1N", "33"], + pin34: ["CTX1P", "34"], + pin35: ["SSEQ0", "A0", "35"], + pin36: ["CRX2N", "36"], + pin37: ["CRX2P", "37"], + pin38: ["CEQ0", "38"], + pin39: ["CTX2N", "39"], + pin40: ["CTX2P", "40"], + pin41: ["THERMAL_PAD"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "control", + pin3: "input", + pin4: "input", + pin5: "no-connect", + pin6: "power", + pin7: "output", + pin8: "output", + pin9: "control", + pin10: "control", + pin11: "no-connect", + pin12: "output", + pin13: "output", + pin14: "control", + pin15: "control", + pin16: "control", + pin17: "control", + pin18: "output", + pin19: "output", + pin20: "power", + pin21: "control", + pin22: "bidirectional", + pin23: "input", + pin24: "no-connect", + pin25: "no-connect", + pin26: "control", + pin27: "control", + pin28: "power", + pin29: "control", + pin30: "input", + pin31: "input", + pin32: "no-connect", + pin33: "output", + pin34: "output", + pin35: "control", + pin36: "input", + pin37: "input", + pin38: "control", + pin39: "output", + pin40: "output", + pin41: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin5: { doNotConnect: true }, + pin6: { requiresPower: true }, + pin11: { doNotConnect: true }, + pin20: { requiresPower: true }, + pin24: { doNotConnect: true }, + pin25: { doNotConnect: true }, + pin28: { requiresPower: true }, + pin32: { doNotConnect: true }, + pin41: { requiresGround: true }, +} as const; + +export const TUSB1004RNQR = (props: ChipProps) => { + // Footprint provenance: TI drawing RNQ0040A; donor TUSB1046-DCIRNQR (JLCPCB C2151061) + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TUSB1004RNQR; diff --git a/lib/chips/TUSB1046_DCIRNQR.circuit.tsx b/lib/chips/TUSB1046_DCIRNQR.circuit.tsx new file mode 100644 index 00000000..8e174185 --- /dev/null +++ b/lib/chips/TUSB1046_DCIRNQR.circuit.tsx @@ -0,0 +1,492 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["DPEQ1"], + pin3: ["SSEQ1"], + pin4: ["SSRXn"], + pin5: ["SSRXp"], + pin6: ["VCC2"], + pin7: ["SSTXn"], + pin8: ["SSTXp"], + pin9: ["DP0p"], + pin10: ["DP0n"], + pin11: ["pin11"], + pin12: ["DP1p"], + pin13: ["DP1n"], + pin14: ["pin14"], + pin15: ["DP2p"], + pin16: ["DP2n"], + pin17: ["I2C_EN"], + pin18: ["DP3p"], + pin19: ["DP3n"], + pin20: ["VCC3"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["AUXp"], + pin25: ["AUXn"], + pin26: ["SBU2"], + pin27: ["SBU1"], + pin28: ["VCC4"], + pin29: ["pin29"], + pin30: ["RX1p"], + pin31: ["RX1n"], + pin32: ["pin32"], + pin33: ["TX1p"], + pin34: ["TX1n"], + pin35: ["EQ1"], + pin36: ["TX2n"], + pin37: ["TX2p"], + pin38: ["EQ0"], + pin39: ["RX2n"], + pin40: ["RX2p"], + pin41: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin6: { requiresPower: true }, + pin20: { requiresPower: true }, + pin28: { requiresPower: true }, +} as const; + +export const TUSB1046_DCIRNQR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2151061.obj?uuid=cedd14baf11e4fce9e63055258a4bbf3", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2151061.step?uuid=cedd14baf11e4fce9e63055258a4bbf3", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.0001396999998632964, + y: 0.00007619999996677507, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default TUSB1046_DCIRNQR; diff --git a/lib/chips/TUSB8041RGCR.circuit.tsx b/lib/chips/TUSB8041RGCR.circuit.tsx new file mode 100644 index 00000000..c0ab997d --- /dev/null +++ b/lib/chips/TUSB8041RGCR.circuit.tsx @@ -0,0 +1,118 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["USB_DP_DN1"], + pin2: ["USB_DM_DN1"], + pin3: ["USB_SSTXP_DN1"], + pin4: ["USB_SSTXM_DN1"], + pin5: ["VDD8"], + pin6: ["USB_SSRXP_DN1"], + pin7: ["USB_SSRXM_DN1"], + pin8: ["VDD7"], + pin9: ["USB_DP_DN2"], + pin10: ["USB_DM_DN2"], + pin11: ["USB_SSTXP_DN2"], + pin12: ["USB_SSTXM_DN2"], + pin13: ["VDD6"], + pin14: ["USB_SSRXP_DN2"], + pin15: ["USB_SSRXM_DN2"], + pin16: ["VDD334"], + pin17: ["USB_DP_DN3"], + pin18: ["USB_DM_DN3"], + pin19: ["USB_SSTXP_DN3"], + pin20: ["USB_SSTXM_DN3"], + pin21: ["VDD5"], + pin22: ["USB_SSRXP_DN3"], + pin23: ["USB_SSRXM_DN3"], + pin24: ["USB_DP_DN4"], + pin25: ["USB_DM_DN4"], + pin26: ["USB_SSTXP_DN4"], + pin27: ["USB_SSTXM_DN4"], + pin28: ["VDD4"], + pin29: ["USB_SSRXP_DN4"], + pin30: ["USB_SSRXM_DN4"], + pin31: ["VDD3"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["VDD333"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["PWRCTL_POL"], + pin42: ["pin42"], + pin43: ["OVERCUR4z"], + pin44: ["OVERCUR3z"], + pin45: ["pin45"], + pin46: ["OVERCUR1z"], + pin47: ["OVERCUR2z"], + pin48: ["USB_VBUS"], + pin49: ["TEST"], + pin50: ["GRSTz"], + pin51: ["VDD2"], + pin52: ["VDD332"], + pin53: ["USB_DP_UP"], + pin54: ["USB_DM_UP"], + pin55: ["USB_SSTXP_UP"], + pin56: ["USB_SSTXM_UP"], + pin57: ["VDD1"], + pin58: ["USB_SSRXP_UP"], + pin59: ["USB_SSRXM_UP"], + pin60: ["NC"], + pin61: ["XO"], + pin62: ["XI"], + pin63: ["VDD331"], + pin64: ["USB_R1"], + pin65: ["VSS"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin8: { requiresPower: true }, + pin13: { requiresPower: true }, + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin28: { requiresPower: true }, + pin31: { requiresPower: true }, + pin34: { requiresPower: true }, + pin51: { requiresPower: true }, + pin52: { requiresPower: true }, + pin57: { requiresPower: true }, + pin60: { doNotConnect: true }, + pin63: { requiresPower: true }, + pin65: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const TUSB8041RGCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TUSB8041RGCR; diff --git a/lib/chips/TUSB8042ARGCR.circuit.tsx b/lib/chips/TUSB8042ARGCR.circuit.tsx new file mode 100644 index 00000000..bd4d3e54 --- /dev/null +++ b/lib/chips/TUSB8042ARGCR.circuit.tsx @@ -0,0 +1,121 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["USB_DP_DN1"], + pin2: ["USB_DM_DN1"], + pin3: ["USB_SSTXP_DN1"], + pin4: ["USB_SSTXM_DN1"], + pin5: ["VDD8"], + pin6: ["USB_SSRXP_DN1"], + pin7: ["USB_SSRXM_DN1"], + pin8: ["VDD7"], + pin9: ["USB_DP_DN2"], + pin10: ["USB_DM_DN2"], + pin11: ["USB_SSTXP_DN2"], + pin12: ["USB_SSTXM_DN2"], + pin13: ["VDD6"], + pin14: ["USB_SSRXP_DN2"], + pin15: ["USB_SSRXM_DN2"], + pin16: ["VDD334"], + pin17: ["USB_DP_DN3"], + pin18: ["USB_DM_DN3"], + pin19: ["USB_SSTXP_DN3"], + pin20: ["USB_SSTXM_DN3"], + pin21: ["VDD5"], + pin22: ["USB_SSRXP_DN3"], + pin23: ["USB_SSRXM_DN3"], + pin24: ["USB_DP_DN4"], + pin25: ["USB_DM_DN4"], + pin26: ["USB_SSTXP_DN4"], + pin27: ["USB_SSTXM_DN4"], + pin28: ["VDD4"], + pin29: ["USB_SSRXP_DN4"], + pin30: ["USB_SSRXM_DN4"], + pin31: ["VDD3"], + pin32: ["pin32"], + pin33: ["pin33"], + pin34: ["VDD333"], + pin35: ["pin35"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["pin40"], + pin41: ["PWRCTL_POL"], + pin42: ["pin42"], + pin43: ["OVERCUR4z"], + pin44: ["OVERCUR3z"], + pin45: ["pin45"], + pin46: ["OVERCUR1z"], + pin47: ["OVERCUR2z"], + pin48: ["USB_VBUS"], + pin49: ["TEST"], + pin50: ["GRSTz"], + pin51: ["VDD2"], + pin52: ["VDD332"], + pin53: ["USB_DP_UP"], + pin54: ["USB_DM_UP"], + pin55: ["USB_SSTXP_UP"], + pin56: ["USB_SSTXM_UP"], + pin57: ["VDD1"], + pin58: ["USB_SSRXP_UP"], + pin59: ["USB_SSRXM_UP"], + pin60: ["NC"], + pin61: ["XO"], + pin62: ["XI"], + pin63: ["VDD331"], + pin64: ["USB_R1"], + pin65: ["EP"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin8: { requiresPower: true }, + pin13: { requiresPower: true }, + pin16: { requiresPower: true }, + pin21: { requiresPower: true }, + pin28: { requiresPower: true }, + pin31: { requiresPower: true }, + pin34: { requiresPower: true }, + pin51: { requiresPower: true }, + pin52: { requiresPower: true }, + pin57: { requiresPower: true }, + pin60: { doNotConnect: true }, + pin63: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const TUSB8042ARGCR = (props: ChipProps) => { + return ( + + ); +}; + +export default TUSB8042ARGCR; diff --git a/lib/chips/TVS0500DRVR.circuit.tsx b/lib/chips/TVS0500DRVR.circuit.tsx new file mode 100644 index 00000000..8d50989a --- /dev/null +++ b/lib/chips/TVS0500DRVR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND4"], + pin2: ["GND3"], + pin3: ["GND2"], + pin4: ["IN3"], + pin5: ["IN2"], + pin6: ["IN1"], + pin7: ["GND1"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TVS0500DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TVS0500DRVR; diff --git a/lib/chips/TVS1400DRVR.circuit.tsx b/lib/chips/TVS1400DRVR.circuit.tsx new file mode 100644 index 00000000..9ac6d63c --- /dev/null +++ b/lib/chips/TVS1400DRVR.circuit.tsx @@ -0,0 +1,49 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["GND3"], + pin4: ["IN1"], + pin5: ["IN2"], + pin6: ["IN3"], + pin7: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TVS1400DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TVS1400DRVR; diff --git a/lib/chips/TVS1401DRBR.circuit.tsx b/lib/chips/TVS1401DRBR.circuit.tsx new file mode 100644 index 00000000..baf79a57 --- /dev/null +++ b/lib/chips/TVS1401DRBR.circuit.tsx @@ -0,0 +1,238 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN1"], + pin2: ["IN2"], + pin3: ["IN3"], + pin4: ["IN4"], + pin5: ["GND1"], + pin6: ["GND2"], + pin7: ["GND3"], + pin8: ["GND4"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { requiresGround: true }, + pin7: { requiresGround: true }, + pin8: { requiresGround: true }, +} as const; + +export const TVS1401DRBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1849891.obj?uuid=398b5838886d4b48973dd3114bdbaf8b", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C1849891.step?uuid=398b5838886d4b48973dd3114bdbaf8b", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000025399999913133797, + y: -0.00010160000010728254, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default TVS1401DRBR; diff --git a/lib/chips/TVS2700DRVR.circuit.tsx b/lib/chips/TVS2700DRVR.circuit.tsx new file mode 100644 index 00000000..5a9d9441 --- /dev/null +++ b/lib/chips/TVS2700DRVR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND4"], + pin2: ["GND3"], + pin3: ["GND2"], + pin4: ["IN3"], + pin5: ["IN2"], + pin6: ["IN1"], + pin7: ["GND1"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const TVS2700DRVR = (props: ChipProps) => { + return ( + + ); +}; + +export default TVS2700DRVR; diff --git a/lib/chips/TVS3300YZFR.circuit.tsx b/lib/chips/TVS3300YZFR.circuit.tsx new file mode 100644 index 00000000..0499a2a2 --- /dev/null +++ b/lib/chips/TVS3300YZFR.circuit.tsx @@ -0,0 +1,61 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin2: ["IN", "B1", "IN_B1"], + pin1: ["IN", "B2", "IN_B2"], + pin4: ["GND", "A1", "GND_A1"], + pin3: ["GND", "A2", "GND_A2"], +} as const; + +const pinRoles = { + pin2: "input", + pin1: "input", + pin4: "ground", + pin3: "ground", +} as const; + +const pinAttributes = { + pin4: { + requiresGround: true, + }, + pin3: { + requiresGround: true, + }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin4: [...pinLabels["pin4"], "pin1"], + pin1: [...pinLabels["pin1"], "pin4"], +} as const; + +export const TVS3300YZFR = (props: ChipProps) => { + return ( + + ); +}; + +export default TVS3300YZFR; diff --git a/lib/chips/TXE8124DGSR.circuit.tsx b/lib/chips/TXE8124DGSR.circuit.tsx new file mode 100644 index 00000000..d76f942d --- /dev/null +++ b/lib/chips/TXE8124DGSR.circuit.tsx @@ -0,0 +1,352 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SDO", "1"], + pin2: ["VCC", "2"], + pin3: ["GND", "3"], + pin4: ["P0_0", "4"], + pin5: ["P0_1", "5"], + pin6: ["P0_2", "6"], + pin7: ["P0_3", "7"], + pin8: ["P0_4", "8"], + pin9: ["P0_5", "9"], + pin10: ["P0_6", "10"], + pin11: ["P0_7", "11"], + pin12: ["P2_0", "12"], + pin13: ["P2_1", "13"], + pin14: ["P2_2", "14"], + pin15: ["P2_3", "15"], + pin16: ["P2_4", "16"], + pin17: ["P2_5", "17"], + pin18: ["P2_6", "18"], + pin19: ["P2_7", "19"], + pin20: ["P1_7", "20"], + pin21: ["P1_6", "21"], + pin22: ["P1_5", "22"], + pin23: ["P1_4", "23"], + pin24: ["P1_3", "24"], + pin25: ["P1_2", "25"], + pin26: ["P1_1", "26"], + pin27: ["P1_0", "27"], + pin28: ["CS", "28"], + pin29: ["SCLK", "29"], + pin30: ["SDI", "30"], + pin31: ["RESET", "FAIL_SAFE", "31"], + pin32: ["INT", "32"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "power", + pin3: "ground", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "bidirectional", + pin13: "bidirectional", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "bidirectional", + pin23: "bidirectional", + pin24: "bidirectional", + pin25: "bidirectional", + pin26: "bidirectional", + pin27: "bidirectional", + pin28: "control", + pin29: "control", + pin30: "input", + pin31: "control", + pin32: "output", +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, +} as const; + +export const TXE8124DGSR = (props: ChipProps) => { + // Footprint provenance: TI drawing DGS0032A; official source https://www.ti.com/lit/gpn/TXE8124 pages 63 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TXE8124DGSR; diff --git a/lib/chips/TXS0104ERGYR.circuit.tsx b/lib/chips/TXS0104ERGYR.circuit.tsx new file mode 100644 index 00000000..4a824ad0 --- /dev/null +++ b/lib/chips/TXS0104ERGYR.circuit.tsx @@ -0,0 +1,272 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCCA"], + pin2: ["A1"], + pin3: ["A2"], + pin4: ["A3"], + pin5: ["A4"], + pin6: ["NC1"], + pin7: ["GND"], + pin8: ["OE"], + pin9: ["NC2"], + pin10: ["B4"], + pin11: ["B3"], + pin12: ["B2"], + pin13: ["B1"], + pin14: ["VCCB"], + pin15: ["EP"], +} as const; + +const pinAttributes = { + pin6: { doNotConnect: true }, + pin7: { requiresGround: true }, + pin9: { doNotConnect: true }, +} as const; + +export const TXS0104ERGYR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C154926.obj?uuid=cc9a7c4d6c3844ba9e2ed6c3b0f8d939", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C154926.step?uuid=cc9a7c4d6c3844ba9e2ed6c3b0f8d939", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: 0, z: -0.02 }, + }} + {...props} + /> + ); +}; + +export default TXS0104ERGYR; diff --git a/lib/chips/TXS0108EPWR.circuit.tsx b/lib/chips/TXS0108EPWR.circuit.tsx new file mode 100644 index 00000000..2eec53d1 --- /dev/null +++ b/lib/chips/TXS0108EPWR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["A1"], + pin2: ["VCCA"], + pin3: ["A2"], + pin4: ["A3"], + pin5: ["A4"], + pin6: ["A5"], + pin7: ["A6"], + pin8: ["A7"], + pin9: ["A8"], + pin10: ["OE"], + pin11: ["GND"], + pin12: ["B8"], + pin13: ["B7"], + pin14: ["B6"], + pin15: ["B5"], + pin16: ["B4"], + pin17: ["B3"], + pin18: ["B2"], + pin19: ["VCCB"], + pin20: ["B1"], +} as const; + +const pinAttributes = { + pin11: { requiresGround: true }, +} as const; + +export const TXS0108EPWR = (props: ChipProps) => { + return ( + + ); +}; + +export default TXS0108EPWR; diff --git a/lib/chips/TXV0108QWRGYRQ1.circuit.tsx b/lib/chips/TXV0108QWRGYRQ1.circuit.tsx new file mode 100644 index 00000000..7ea938ee --- /dev/null +++ b/lib/chips/TXV0108QWRGYRQ1.circuit.tsx @@ -0,0 +1,286 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCCA", "1"], + pin2: ["DIR", "2"], + pin3: ["A1", "3"], + pin4: ["A2", "4"], + pin5: ["A3", "5"], + pin6: ["A4", "6"], + pin7: ["A5", "7"], + pin8: ["A6", "8"], + pin9: ["A7", "9"], + pin10: ["A8", "10"], + pin11: ["GND", "11", "GND_11"], + pin12: ["GND", "12", "GND_12"], + pin13: ["GND", "13", "GND_13"], + pin14: ["B8", "14"], + pin15: ["B7", "15"], + pin16: ["B6", "16"], + pin17: ["B5", "17"], + pin18: ["B4", "18"], + pin19: ["B3", "19"], + pin20: ["B2", "20"], + pin21: ["B1", "21"], + pin22: ["OE", "22"], + pin23: ["VCCB", "23", "VCCB_23"], + pin24: ["VCCB", "24", "VCCB_24"], + pin25: ["THERMAL_PAD"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "bidirectional", + pin4: "bidirectional", + pin5: "bidirectional", + pin6: "bidirectional", + pin7: "bidirectional", + pin8: "bidirectional", + pin9: "bidirectional", + pin10: "bidirectional", + pin11: "ground", + pin12: "ground", + pin13: "ground", + pin14: "bidirectional", + pin15: "bidirectional", + pin16: "bidirectional", + pin17: "bidirectional", + pin18: "bidirectional", + pin19: "bidirectional", + pin20: "bidirectional", + pin21: "bidirectional", + pin22: "output", + pin23: "power", + pin24: "power", + pin25: "thermal", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin11: { requiresGround: true }, + pin12: { requiresGround: true }, + pin13: { requiresGround: true }, + pin23: { requiresPower: true }, + pin24: { requiresPower: true }, +} as const; + +export const TXV0108QWRGYRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing RGY0024E; official source https://www.ti.com/lit/gpn/TXV0108-Q1 pages 30 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default TXV0108QWRGYRQ1; diff --git a/lib/chips/UA78M05CDCYR.circuit.tsx b/lib/chips/UA78M05CDCYR.circuit.tsx new file mode 100644 index 00000000..09739583 --- /dev/null +++ b/lib/chips/UA78M05CDCYR.circuit.tsx @@ -0,0 +1,104 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INPUT"], + pin2: ["GND1"], + pin3: ["OUTPUT"], + pin4: ["GND2"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin4: { requiresGround: true }, +} as const; + +export const UA78M05CDCYR = (props: ChipProps) => { + return ( + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C201654.obj?uuid=e80246a9471445bfb635be848806a22e", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C201654.step?uuid=e80246a9471445bfb635be848806a22e", + pcbRotationOffset: 180, + modelOriginPosition: { + x: 0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.049394, + }, + }} + {...props} + /> + ); +}; + +export default UA78M05CDCYR; diff --git a/lib/chips/UC2845D8TR.circuit.tsx b/lib/chips/UC2845D8TR.circuit.tsx new file mode 100644 index 00000000..0c37455b --- /dev/null +++ b/lib/chips/UC2845D8TR.circuit.tsx @@ -0,0 +1,43 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["VEB"], + pin3: ["ISENSE"], + pin4: ["pin4"], + pin5: ["GROUND"], + pin6: ["OUTPUT"], + pin7: ["VCC"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, +} as const; + +export const UC2845D8TR = (props: ChipProps) => { + return ( + + ); +}; + +export default UC2845D8TR; diff --git a/lib/chips/UCC21330ADR.circuit.tsx b/lib/chips/UCC21330ADR.circuit.tsx new file mode 100644 index 00000000..7d9a426b --- /dev/null +++ b/lib/chips/UCC21330ADR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INA"], + pin2: ["INB"], + pin3: ["VCCI1"], + pin4: ["GND"], + pin5: ["DIS"], + pin6: ["DT"], + pin7: ["NC1"], + pin8: ["VCCI2"], + pin9: ["VSSB"], + pin10: ["OUTB"], + pin11: ["VDDB"], + pin12: ["NC3"], + pin13: ["NC2"], + pin14: ["VSSA"], + pin15: ["OUTA"], + pin16: ["VDDA"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin12: { doNotConnect: true }, + pin13: { doNotConnect: true }, + pin16: { requiresPower: true }, +} as const; + +export const UCC21330ADR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC21330ADR; diff --git a/lib/chips/UCC21550ADWR.circuit.tsx b/lib/chips/UCC21550ADWR.circuit.tsx new file mode 100644 index 00000000..c75eb756 --- /dev/null +++ b/lib/chips/UCC21550ADWR.circuit.tsx @@ -0,0 +1,55 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INA"], + pin2: ["INB"], + pin3: ["VCCI1"], + pin4: ["GND"], + pin5: ["DIS"], + pin6: ["DT"], + pin7: ["NC1"], + pin8: ["VCCI2"], + pin9: ["VSSB"], + pin10: ["OUTB"], + pin11: ["VDDB"], + pin12: ["NC3"], + pin13: ["NC2"], + pin14: ["VSSA"], + pin15: ["OUTA"], + pin16: ["VDDA"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin7: { doNotConnect: true }, + pin12: { doNotConnect: true }, + pin13: { doNotConnect: true }, + pin16: { requiresPower: true }, +} as const; + +export const UCC21550ADWR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC21550ADWR; diff --git a/lib/chips/UCC21750DWR.circuit.tsx b/lib/chips/UCC21750DWR.circuit.tsx new file mode 100644 index 00000000..93f10041 --- /dev/null +++ b/lib/chips/UCC21750DWR.circuit.tsx @@ -0,0 +1,53 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AIN"], + pin2: ["DESAT"], + pin3: ["COM"], + pin4: ["OUTH"], + pin5: ["VDD"], + pin6: ["OUTL"], + pin7: ["CLMPI"], + pin8: ["VEE"], + pin9: ["GND"], + pin10: ["IN_POS"], + pin11: ["IN_NEG"], + pin12: ["RDY"], + pin13: ["FLT"], + pin14: ["pin14"], + pin15: ["VCC"], + pin16: ["APWM"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin9: { requiresGround: true }, + pin15: { requiresPower: true }, +} as const; + +export const UCC21750DWR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC21750DWR; diff --git a/lib/chips/UCC23525CDWYR.circuit.tsx b/lib/chips/UCC23525CDWYR.circuit.tsx new file mode 100644 index 00000000..ed14e695 --- /dev/null +++ b/lib/chips/UCC23525CDWYR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ANODE"], + pin2: ["NC"], + pin3: ["CATHODE"], + pin4: ["VSS"], + pin5: ["OUT"], + pin6: ["VDD"], +} as const; + +const pinAttributes = { + pin2: { doNotConnect: true }, + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC23525CDWYR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC23525CDWYR; diff --git a/lib/chips/UCC24610DRBR.circuit.tsx b/lib/chips/UCC24610DRBR.circuit.tsx new file mode 100644 index 00000000..ea869943 --- /dev/null +++ b/lib/chips/UCC24610DRBR.circuit.tsx @@ -0,0 +1,232 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SYNC"], + pin2: ["pin2"], + pin3: ["TON"], + pin4: ["VCC"], + pin5: ["GATE"], + pin6: ["GND"], + pin7: ["VS"], + pin8: ["VD"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const UCC24610DRBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2650188.obj?uuid=e674e2bdf5a0456bb02fe0267cbd5342", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2650188.step?uuid=e674e2bdf5a0456bb02fe0267cbd5342", + pcbRotationOffset: 180, + modelOriginPosition: { x: -0.000012700000070253736, y: 0, z: 0 }, + }} + {...props} + /> + ); +}; + +export default UCC24610DRBR; diff --git a/lib/chips/UCC24612_2DBVR.circuit.tsx b/lib/chips/UCC24612_2DBVR.circuit.tsx new file mode 100644 index 00000000..1baf83f4 --- /dev/null +++ b/lib/chips/UCC24612_2DBVR.circuit.tsx @@ -0,0 +1,150 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VG"], + pin2: ["VS"], + pin3: ["REG"], + pin4: ["VDD"], + pin5: ["VD"], +} as const; + +const pinAttributes = { + pin4: { requiresPower: true }, +} as const; + +export const UCC24612_2DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471044.obj?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C471044.step?uuid=460193f9bf2d42e58cf3c2f675b07dc6", + pcbRotationOffset: 90, + modelOriginPosition: { + x: 0.004489450000050965, + y: 0.000012700000070253736, + z: -0.049083, + }, + }} + {...props} + /> + ); +}; + +export default UCC24612_2DBVR; diff --git a/lib/chips/UCC24624DT.circuit.tsx b/lib/chips/UCC24624DT.circuit.tsx new file mode 100644 index 00000000..4d260887 --- /dev/null +++ b/lib/chips/UCC24624DT.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VG1"], + pin2: ["PGND"], + pin3: ["REG"], + pin4: ["VD1"], + pin5: ["VSS"], + pin6: ["VD2"], + pin7: ["VDD"], + pin8: ["VG2"], +} as const; + +const pinAttributes = { + pin2: { requiresGround: true }, + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC24624DT = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC24624DT; diff --git a/lib/chips/UCC24630DBVT.circuit.tsx b/lib/chips/UCC24630DBVT.circuit.tsx new file mode 100644 index 00000000..c46b6b00 --- /dev/null +++ b/lib/chips/UCC24630DBVT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VPC"], + pin2: ["VSC"], + pin3: ["TBLK"], + pin4: ["DRV"], + pin5: ["GND"], + pin6: ["VDD"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC24630DBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC24630DBVT; diff --git a/lib/chips/UCC24636DBVR.circuit.tsx b/lib/chips/UCC24636DBVR.circuit.tsx new file mode 100644 index 00000000..330610d4 --- /dev/null +++ b/lib/chips/UCC24636DBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VPC"], + pin2: ["VSC"], + pin3: ["TBLK"], + pin4: ["DRV"], + pin5: ["GND"], + pin6: ["VDD"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC24636DBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC24636DBVR; diff --git a/lib/chips/UCC25600DR.circuit.tsx b/lib/chips/UCC25600DR.circuit.tsx new file mode 100644 index 00000000..bc2cec0c --- /dev/null +++ b/lib/chips/UCC25600DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["DT"], + pin2: ["RT"], + pin3: ["OC"], + pin4: ["SS"], + pin5: ["GD2"], + pin6: ["GND"], + pin7: ["VCC"], + pin8: ["GD1"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC25600DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC25600DR; diff --git a/lib/chips/UCC256610DDBR.circuit.tsx b/lib/chips/UCC256610DDBR.circuit.tsx new file mode 100644 index 00000000..68a13b66 --- /dev/null +++ b/lib/chips/UCC256610DDBR.circuit.tsx @@ -0,0 +1,217 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["HV"], + pin3: ["BLK"], + pin4: ["pin4"], + pin5: ["FB"], + pin6: ["LL"], + pin7: ["TSET"], + pin8: ["V5P"], + pin9: ["ISNS"], + pin10: ["GNDP"], + pin11: ["LO"], + pin12: ["VCCP"], + pin14: ["HB"], + pin15: ["HO"], + pin16: ["HS"], +} as const; + +export const UCC256610DDBR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C49247863.obj?uuid=e67eebb554c34962b9e6671d12c54581", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C49247863.step?uuid=e67eebb554c34962b9e6671d12c54581", + pcbRotationOffset: 0, + modelOriginPosition: { + x: -0.000025399999913133797, + y: -0.000012700000070253736, + z: -0.95, + }, + }} + {...props} + /> + ); +}; + +export default UCC256610DDBR; diff --git a/lib/chips/UCC25800AQDGNRQ1.circuit.tsx b/lib/chips/UCC25800AQDGNRQ1.circuit.tsx new file mode 100644 index 00000000..83cc101c --- /dev/null +++ b/lib/chips/UCC25800AQDGNRQ1.circuit.tsx @@ -0,0 +1,210 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SYNC"], + pin2: ["pin2"], + pin3: ["VREG"], + pin4: ["pin4"], + pin5: ["RT"], + pin6: ["GND"], + pin7: ["SW"], + pin8: ["VCC"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const UCC25800AQDGNRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3191149.obj?uuid=9b5216ddf7f84345b33810f2e8094164", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C3191149.step?uuid=9b5216ddf7f84345b33810f2e8094164", + pcbRotationOffset: 0, + modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.6 }, + }} + {...props} + /> + ); +}; + +export default UCC25800AQDGNRQ1; diff --git a/lib/chips/UCC27201ADDAR.circuit.tsx b/lib/chips/UCC27201ADDAR.circuit.tsx new file mode 100644 index 00000000..a9954bc8 --- /dev/null +++ b/lib/chips/UCC27201ADDAR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["HB"], + pin3: ["HO"], + pin4: ["HS"], + pin5: ["HI"], + pin6: ["LI"], + pin7: ["VSS"], + pin8: ["LO"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const UCC27201ADDAR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27201ADDAR; diff --git a/lib/chips/UCC27211DR.circuit.tsx b/lib/chips/UCC27211DR.circuit.tsx new file mode 100644 index 00000000..123f04a5 --- /dev/null +++ b/lib/chips/UCC27211DR.circuit.tsx @@ -0,0 +1,48 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["HB"], + pin3: ["HO"], + pin4: ["HS"], + pin5: ["HI"], + pin6: ["LI"], + pin7: ["VSS"], + pin8: ["LO"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const UCC27211DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27211DR; diff --git a/lib/chips/UCC27301ADR.circuit.tsx b/lib/chips/UCC27301ADR.circuit.tsx new file mode 100644 index 00000000..bc4778be --- /dev/null +++ b/lib/chips/UCC27301ADR.circuit.tsx @@ -0,0 +1,36 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["HB"], + pin3: ["HO"], + pin4: ["HS"], + pin5: ["HI"], + pin6: ["LI"], + pin7: ["VSS"], + pin8: ["LO"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const UCC27301ADR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27301ADR; diff --git a/lib/chips/UCC27302ADRCR.circuit.tsx b/lib/chips/UCC27302ADRCR.circuit.tsx new file mode 100644 index 00000000..29ac30fd --- /dev/null +++ b/lib/chips/UCC27302ADRCR.circuit.tsx @@ -0,0 +1,270 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["NC"], + pin3: ["HB"], + pin4: ["HO"], + pin5: ["HS"], + pin6: ["EN"], + pin7: ["HI"], + pin8: ["LI"], + pin9: ["VSS"], + pin10: ["LO"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { doNotConnect: true }, + pin9: { requiresGround: true }, +} as const; + +export const UCC27302ADRCR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C50092311.obj?uuid=a784593ea7bb47bab3157096b9efd880", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C50092311.step?uuid=a784593ea7bb47bab3157096b9efd880", + pcbRotationOffset: 270, + modelOriginPosition: { + x: 0.003886200000124518, + y: 0.000025399999913133797, + z: 0, + }, + }} + {...props} + /> + ); +}; + +export default UCC27302ADRCR; diff --git a/lib/chips/UCC27332QDGNRQ1.circuit.tsx b/lib/chips/UCC27332QDGNRQ1.circuit.tsx new file mode 100644 index 00000000..a1ad6f03 --- /dev/null +++ b/lib/chips/UCC27332QDGNRQ1.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD", "1", "VDD_1"], + pin2: ["IN", "2"], + pin3: ["EN", "3"], + pin4: ["GND", "4", "GND_4"], + pin5: ["GND", "5", "GND_5"], + pin6: ["OUT", "6", "OUT_6"], + pin7: ["OUT", "7", "OUT_7"], + pin8: ["VDD", "8", "VDD_8"], + pin9: ["THERMAL_PAD"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "input", + pin3: "control", + pin4: "ground", + pin5: "ground", + pin6: "output", + pin7: "output", + pin8: "power", + pin9: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, + pin9: { requiresGround: true }, +} as const; + +export const UCC27332QDGNRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing DGN0008H; donor UCC27624DGNR (JLCPCB C6581862) + return ( + + ); +}; + +export default UCC27332QDGNRQ1; diff --git a/lib/chips/UCC27444DR.circuit.tsx b/lib/chips/UCC27444DR.circuit.tsx new file mode 100644 index 00000000..94690db3 --- /dev/null +++ b/lib/chips/UCC27444DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ENA"], + pin2: ["INA"], + pin3: ["GND"], + pin4: ["INB"], + pin5: ["OUTB"], + pin6: ["VDD"], + pin7: ["OUTA"], + pin8: ["ENB"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC27444DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27444DR; diff --git a/lib/chips/UCC27511ADBVT.circuit.tsx b/lib/chips/UCC27511ADBVT.circuit.tsx new file mode 100644 index 00000000..bb0ed5d1 --- /dev/null +++ b/lib/chips/UCC27511ADBVT.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["OUTH"], + pin3: ["OUTL"], + pin4: ["GND"], + pin5: ["pin5"], + pin6: ["IN_POS"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const UCC27511ADBVT = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2676984.obj?uuid=229b69761e2c45dba6a83d8866dec72d", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C2676984.step?uuid=229b69761e2c45dba6a83d8866dec72d", + pcbRotationOffset: 90, + modelOriginPosition: { + x: -0.000012700000070253736, + y: 0.000012700000070253736, + z: -0.048939, + }, + }} + {...props} + /> + ); +}; + +export default UCC27511ADBVT; diff --git a/lib/chips/UCC27517ADBVR.circuit.tsx b/lib/chips/UCC27517ADBVR.circuit.tsx new file mode 100644 index 00000000..407097e8 --- /dev/null +++ b/lib/chips/UCC27517ADBVR.circuit.tsx @@ -0,0 +1,41 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["GND"], + pin3: ["IN_POS"], + pin4: ["IN_NEG"], + pin5: ["OUT"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresGround: true }, +} as const; + +export const UCC27517ADBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27517ADBVR; diff --git a/lib/chips/UCC27523D.circuit.tsx b/lib/chips/UCC27523D.circuit.tsx new file mode 100644 index 00000000..eccb98eb --- /dev/null +++ b/lib/chips/UCC27523D.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ENA"], + pin2: ["INA"], + pin3: ["GND"], + pin4: ["INB"], + pin5: ["OUTB"], + pin6: ["VDD"], + pin7: ["OUTA"], + pin8: ["ENB"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC27523D = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27523D; diff --git a/lib/chips/UCC27614DR.circuit.tsx b/lib/chips/UCC27614DR.circuit.tsx new file mode 100644 index 00000000..5b968131 --- /dev/null +++ b/lib/chips/UCC27614DR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD2"], + pin2: ["IN"], + pin3: ["EN"], + pin4: ["GND2"], + pin5: ["GND1"], + pin6: ["OUT1"], + pin7: ["OUT2"], + pin8: ["VDD1"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const UCC27614DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27614DR; diff --git a/lib/chips/UCC27624DSDR.circuit.tsx b/lib/chips/UCC27624DSDR.circuit.tsx new file mode 100644 index 00000000..2f06410a --- /dev/null +++ b/lib/chips/UCC27624DSDR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["ENA"], + pin2: ["INA"], + pin3: ["GND"], + pin4: ["INB"], + pin5: ["OUTB"], + pin6: ["VDD"], + pin7: ["OUTA"], + pin8: ["ENB"], + pin9: ["EP"], +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin9: [...pinLabels["pin9"], "thermalpad"], +} as const; + +export const UCC27624DSDR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC27624DSDR; diff --git a/lib/chips/UCC27734DR.circuit.tsx b/lib/chips/UCC27734DR.circuit.tsx new file mode 100644 index 00000000..6d07ccb8 --- /dev/null +++ b/lib/chips/UCC27734DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["HI", "1"], + pin2: ["LI", "2"], + pin3: ["COM", "3"], + pin4: ["LO", "4"], + pin5: ["VDD", "5"], + pin6: ["HS", "6"], + pin7: ["HO", "7"], + pin8: ["HB", "8"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "unknown", + pin4: "output", + pin5: "power", + pin6: "unknown", + pin7: "output", + pin8: "input", +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, +} as const; + +export const UCC27734DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307) + return ( + + ); +}; + +export default UCC27734DR; diff --git a/lib/chips/UCC27735DR.circuit.tsx b/lib/chips/UCC27735DR.circuit.tsx new file mode 100644 index 00000000..16676aa3 --- /dev/null +++ b/lib/chips/UCC27735DR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["HI", "1"], + pin2: ["LI", "2"], + pin3: ["VSS", "3"], + pin4: ["EN", "NC", "4"], + pin5: ["COM", "5"], + pin6: ["LO", "6"], + pin7: ["VDD", "7"], + pin8: ["NC", "8", "NC_8"], + pin9: ["NC", "9", "NC_9"], + pin10: ["NC", "10", "NC_10"], + pin11: ["HS", "11"], + pin12: ["HO", "12"], + pin13: ["HB", "13"], + pin14: ["NC", "14", "NC_14"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "input", + pin3: "ground", + pin4: "no-connect", + pin5: "unknown", + pin6: "output", + pin7: "power", + pin8: "no-connect", + pin9: "no-connect", + pin10: "no-connect", + pin11: "unknown", + pin12: "output", + pin13: "input", + pin14: "no-connect", +} as const; + +const pinAttributes = { + pin3: { requiresGround: true }, + pin4: { doNotConnect: true }, + pin7: { requiresPower: true }, + pin8: { doNotConnect: true }, + pin9: { doNotConnect: true }, + pin10: { doNotConnect: true }, + pin14: { doNotConnect: true }, +} as const; + +export const UCC27735DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672) + return ( + + ); +}; + +export default UCC27735DR; diff --git a/lib/chips/UCC28019ADR.circuit.tsx b/lib/chips/UCC28019ADR.circuit.tsx new file mode 100644 index 00000000..fc9c60d9 --- /dev/null +++ b/lib/chips/UCC28019ADR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["ICOMP"], + pin3: ["ISENSE"], + pin4: ["VINS"], + pin5: ["VCOMP"], + pin6: ["VSENSE"], + pin7: ["VCC"], + pin8: ["GATE"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28019ADR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28019ADR; diff --git a/lib/chips/UCC2803DTR.circuit.tsx b/lib/chips/UCC2803DTR.circuit.tsx new file mode 100644 index 00000000..228f2d61 --- /dev/null +++ b/lib/chips/UCC2803DTR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["RC"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VCC"], + pin8: ["REF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC2803DTR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC2803DTR; diff --git a/lib/chips/UCC28051DR.circuit.tsx b/lib/chips/UCC28051DR.circuit.tsx new file mode 100644 index 00000000..6cab4f2f --- /dev/null +++ b/lib/chips/UCC28051DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VO_SNS"], + pin2: ["COMP"], + pin3: ["MULTIN"], + pin4: ["CS"], + pin5: ["ZCD"], + pin6: ["GND"], + pin7: ["DRV"], + pin8: ["VCC"], +} as const; + +const pinAttributes = { + pin6: { requiresGround: true }, + pin8: { requiresPower: true }, +} as const; + +export const UCC28051DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28051DR; diff --git a/lib/chips/UCC28056BDBVR.circuit.tsx b/lib/chips/UCC28056BDBVR.circuit.tsx new file mode 100644 index 00000000..6a0f9c8c --- /dev/null +++ b/lib/chips/UCC28056BDBVR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VOSNS"], + pin2: ["pin2"], + pin3: ["VCC"], + pin4: ["GND"], + pin5: ["DRV"], + pin6: ["COMP"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const UCC28056BDBVR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28056BDBVR; diff --git a/lib/chips/UCC2805DTR.circuit.tsx b/lib/chips/UCC2805DTR.circuit.tsx new file mode 100644 index 00000000..e12c330f --- /dev/null +++ b/lib/chips/UCC2805DTR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["RC"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VCC"], + pin8: ["REF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC2805DTR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC2805DTR; diff --git a/lib/chips/UCC28070PWR.circuit.tsx b/lib/chips/UCC28070PWR.circuit.tsx new file mode 100644 index 00000000..91ff946b --- /dev/null +++ b/lib/chips/UCC28070PWR.circuit.tsx @@ -0,0 +1,56 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CDR"], + pin2: ["RDM"], + pin3: ["VAO"], + pin4: ["VSENSE"], + pin5: ["VINAC"], + pin6: ["IMO"], + pin7: ["RSYNTH"], + pin8: ["CSB"], + pin9: ["CSA"], + pin10: ["PKLMT"], + pin11: ["CAOB"], + pin12: ["CAOA"], + pin13: ["VREF"], + pin14: ["GDA"], + pin15: ["VCC"], + pin16: ["GND"], + pin17: ["GDB"], + pin18: ["SS"], + pin19: ["RT"], + pin20: ["DMAX"], +} as const; + +const pinAttributes = { + pin15: { requiresPower: true }, + pin16: { requiresGround: true }, +} as const; + +export const UCC28070PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28070PWR; diff --git a/lib/chips/UCC28070QPWRQ1.circuit.tsx b/lib/chips/UCC28070QPWRQ1.circuit.tsx new file mode 100644 index 00000000..0bba928e --- /dev/null +++ b/lib/chips/UCC28070QPWRQ1.circuit.tsx @@ -0,0 +1,70 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CDR", "1"], + pin2: ["RDM_SYNC", "2"], + pin3: ["VAO", "3"], + pin4: ["VSENSE", "4"], + pin5: ["VINAC", "5"], + pin6: ["IMO", "6"], + pin7: ["RSYNTH", "7"], + pin8: ["CSB", "8"], + pin9: ["CSA", "9"], + pin10: ["PKLMT", "10"], + pin11: ["CAOB", "11"], + pin12: ["CAOA", "12"], + pin13: ["VREF", "13"], + pin14: ["GDA", "14"], + pin15: ["VCC", "15"], + pin16: ["GND", "16"], + pin17: ["GDB", "17"], + pin18: ["SS", "18"], + pin19: ["RT", "19"], + pin20: ["DMAX", "20"], +} as const; + +const pinRoles = { + pin1: "input", + pin2: "control", + pin3: "output", + pin4: "output", + pin5: "power", + pin6: "output", + pin7: "input", + pin8: "control", + pin9: "control", + pin10: "input", + pin11: "output", + pin12: "output", + pin13: "output", + pin14: "output", + pin15: "power", + pin16: "ground", + pin17: "output", + pin18: "control", + pin19: "input", + pin20: "input", +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin15: { requiresPower: true }, + pin16: { requiresGround: true }, +} as const; + +export const UCC28070QPWRQ1 = (props: ChipProps) => { + // Footprint provenance: TI drawing PW0020A; donor TXS0108EPWR (JLCPCB C17206) + return ( + + ); +}; + +export default UCC28070QPWRQ1; diff --git a/lib/chips/UCC28180DR.circuit.tsx b/lib/chips/UCC28180DR.circuit.tsx new file mode 100644 index 00000000..9a3a14f7 --- /dev/null +++ b/lib/chips/UCC28180DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["ICOMP"], + pin3: ["ISENSE"], + pin4: ["FREQ"], + pin5: ["VCOMP"], + pin6: ["VSENSE"], + pin7: ["VCC"], + pin8: ["GATE"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28180DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28180DR; diff --git a/lib/chips/UCC28600DR.circuit.tsx b/lib/chips/UCC28600DR.circuit.tsx new file mode 100644 index 00000000..8eb00eb1 --- /dev/null +++ b/lib/chips/UCC28600DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SS"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["GND"], + pin5: ["OUT"], + pin6: ["VDD"], + pin7: ["OVP"], + pin8: ["STATUS"], +} as const; + +const pinAttributes = { + pin4: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC28600DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28600DR; diff --git a/lib/chips/UCC28700DBVT.circuit.tsx b/lib/chips/UCC28700DBVT.circuit.tsx new file mode 100644 index 00000000..c8dc1e4a --- /dev/null +++ b/lib/chips/UCC28700DBVT.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["CBC"], + pin2: ["VDD"], + pin3: ["DRV"], + pin4: ["CS"], + pin5: ["GND"], + pin6: ["VS"], +} as const; + +const pinAttributes = { + pin2: { requiresPower: true }, + pin5: { requiresGround: true }, +} as const; + +export const UCC28700DBVT = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28700DBVT; diff --git a/lib/chips/UCC28711DR.circuit.tsx b/lib/chips/UCC28711DR.circuit.tsx new file mode 100644 index 00000000..42b9dd39 --- /dev/null +++ b/lib/chips/UCC28711DR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["VS"], + pin3: ["NTC"], + pin4: ["GND"], + pin5: ["CS"], + pin6: ["DRV"], + pin7: ["HV"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const UCC28711DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28711DR; diff --git a/lib/chips/UCC28740DR.circuit.tsx b/lib/chips/UCC28740DR.circuit.tsx new file mode 100644 index 00000000..7c99ef3a --- /dev/null +++ b/lib/chips/UCC28740DR.circuit.tsx @@ -0,0 +1,47 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VDD"], + pin2: ["VS"], + pin3: ["FB"], + pin4: ["GND"], + pin5: ["CS"], + pin6: ["DRV"], + pin7: ["HV"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, +} as const; + +export const UCC28740DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28740DR; diff --git a/lib/chips/UCC287501DBVR.circuit.tsx b/lib/chips/UCC287501DBVR.circuit.tsx new file mode 100644 index 00000000..60a84103 --- /dev/null +++ b/lib/chips/UCC287501DBVR.circuit.tsx @@ -0,0 +1,154 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND"], + pin2: ["FB"], + pin3: ["FLT"], + pin4: ["CS"], + pin5: ["VDD"], + pin6: ["DRV"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const UCC287501DBVR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C32489193.obj?uuid=6f37130fd61d48febac97e962793fd76", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C32489193.step?uuid=6f37130fd61d48febac97e962793fd76", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000012699999956566899, + y: -0.000012699999842880061, + z: -0.75, + }, + }} + {...props} + /> + ); +}; + +export default UCC287501DBVR; diff --git a/lib/chips/UCC28881D.circuit.tsx b/lib/chips/UCC28881D.circuit.tsx new file mode 100644 index 00000000..ae47e837 --- /dev/null +++ b/lib/chips/UCC28881D.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND2"], + pin2: ["GND1"], + pin3: ["FB"], + pin4: ["VDD"], + pin5: ["HVIN"], + pin6: ["NC"], + pin8: ["DRAIN"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin4: { requiresPower: true }, + pin6: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin8: [...pinLabels["pin8"], "pin7"], +} as const; + +export const UCC28881D = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28881D; diff --git a/lib/chips/UCC28910DR.circuit.tsx b/lib/chips/UCC28910DR.circuit.tsx new file mode 100644 index 00000000..6e89faa1 --- /dev/null +++ b/lib/chips/UCC28910DR.circuit.tsx @@ -0,0 +1,49 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND1"], + pin2: ["GND2"], + pin3: ["GND3"], + pin4: ["IPK"], + pin5: ["VS"], + pin6: ["VDD"], + pin7: ["DRAIN"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +export const UCC28910DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28910DR; diff --git a/lib/chips/UCC28911DR.circuit.tsx b/lib/chips/UCC28911DR.circuit.tsx new file mode 100644 index 00000000..732e82d7 --- /dev/null +++ b/lib/chips/UCC28911DR.circuit.tsx @@ -0,0 +1,54 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND3"], + pin2: ["GND2"], + pin3: ["GND1"], + pin4: ["IPK"], + pin5: ["VS"], + pin6: ["VDD"], + pin8: ["DRAIN"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + pin6: { requiresPower: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin8: [...pinLabels["pin8"], "pin7"], +} as const; + +export const UCC28911DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28911DR; diff --git a/lib/chips/UCC28950PWR.circuit.tsx b/lib/chips/UCC28950PWR.circuit.tsx new file mode 100644 index 00000000..2987e7ac --- /dev/null +++ b/lib/chips/UCC28950PWR.circuit.tsx @@ -0,0 +1,60 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VREF"], + pin2: ["EA_POS"], + pin3: ["EA_NEG"], + pin4: ["COMP"], + pin5: ["pin5"], + pin6: ["DELAB"], + pin7: ["DELCD"], + pin8: ["DELEF"], + pin9: ["TMIN"], + pin10: ["RT"], + pin11: ["RSUM"], + pin12: ["DCM"], + pin13: ["ADELEF"], + pin14: ["ADEL"], + pin15: ["CS"], + pin16: ["SYNC"], + pin17: ["OUTF"], + pin18: ["OUTE"], + pin19: ["OUTD"], + pin20: ["OUTC"], + pin21: ["OUTB"], + pin22: ["OUTA"], + pin23: ["VDD"], + pin24: ["GND"], +} as const; + +const pinAttributes = { + pin23: { requiresPower: true }, + pin24: { requiresGround: true }, +} as const; + +export const UCC28950PWR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28950PWR; diff --git a/lib/chips/UCC28C50DGKR.circuit.tsx b/lib/chips/UCC28C50DGKR.circuit.tsx new file mode 100644 index 00000000..e08eeef7 --- /dev/null +++ b/lib/chips/UCC28C50DGKR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP", "1"], + pin2: ["FB", "2"], + pin3: ["CS", "3"], + pin4: ["RT", "CT", "4"], + pin5: ["GND", "5"], + pin6: ["OUT", "6"], + pin7: ["VDD", "7"], + pin8: ["VREF", "8"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "input", + pin3: "control", + pin4: "bidirectional", + pin5: "ground", + pin6: "output", + pin7: "power", + pin8: "output", +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28C50DGKR = (props: ChipProps) => { + // Footprint provenance: TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632) + return ( + + ); +}; + +export default UCC28C50DGKR; diff --git a/lib/chips/UCC28C52DR.circuit.tsx b/lib/chips/UCC28C52DR.circuit.tsx new file mode 100644 index 00000000..f41080ec --- /dev/null +++ b/lib/chips/UCC28C52DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28C52DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28C52DR; diff --git a/lib/chips/UCC28C53DR.circuit.tsx b/lib/chips/UCC28C53DR.circuit.tsx new file mode 100644 index 00000000..d4f6ff18 --- /dev/null +++ b/lib/chips/UCC28C53DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28C53DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28C53DR; diff --git a/lib/chips/UCC28C54DR.circuit.tsx b/lib/chips/UCC28C54DR.circuit.tsx new file mode 100644 index 00000000..8b4f9b9b --- /dev/null +++ b/lib/chips/UCC28C54DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28C54DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28C54DR; diff --git a/lib/chips/UCC28C55DR.circuit.tsx b/lib/chips/UCC28C55DR.circuit.tsx new file mode 100644 index 00000000..addd128a --- /dev/null +++ b/lib/chips/UCC28C55DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC28C55DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC28C55DR; diff --git a/lib/chips/UCC29950DR.circuit.tsx b/lib/chips/UCC29950DR.circuit.tsx new file mode 100644 index 00000000..21518339 --- /dev/null +++ b/lib/chips/UCC29950DR.circuit.tsx @@ -0,0 +1,62 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["GND", "1"], + pin2: ["GD2", "2"], + pin3: ["VCC", "3"], + pin4: ["SUFG", "4"], + pin5: ["SUFS", "5"], + pin6: ["AGND", "6"], + pin7: ["MD_SEL", "PS_ON", "7"], + pin8: ["VBULK", "8"], + pin9: ["AC2", "9"], + pin10: ["AC1", "10"], + pin11: ["LLC_CS", "11"], + pin12: ["FB", "12"], + pin13: ["PFC_CS", "13"], + pin14: ["GD1", "14"], + pin15: ["AC_DET", "15"], + pin16: ["PFC_GD", "16"], +} as const; + +const pinRoles = { + pin1: "ground", + pin2: "output", + pin3: "power", + pin4: "output", + pin5: "input", + pin6: "ground", + pin7: "control", + pin8: "input", + pin9: "input", + pin10: "input", + pin11: "control", + pin12: "input", + pin13: "control", + pin14: "output", + pin15: "output", + pin16: "output", +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin3: { requiresPower: true }, + pin6: { requiresGround: true }, +} as const; + +export const UCC29950DR = (props: ChipProps) => { + // Footprint provenance: TI drawing D0016A; donor AM26C31IDR (JLCPCB C34923) + return ( + + ); +}; + +export default UCC29950DR; diff --git a/lib/chips/UCC33420QRAQRQ1.circuit.tsx b/lib/chips/UCC33420QRAQRQ1.circuit.tsx new file mode 100644 index 00000000..82f1c2d4 --- /dev/null +++ b/lib/chips/UCC33420QRAQRQ1.circuit.tsx @@ -0,0 +1,204 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["VINP"], + pin3: ["GNDP2"], + pin6: ["GNDP1"], + pin7: ["SEL"], + pin8: ["VCC"], + pin9: ["GNDS2"], + pin12: ["GNDS1"], +} as const; + +const pinAttributes = { + pin8: { requiresPower: true }, +} as const; + +export const UCC33420QRAQRQ1 = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C45082636.obj?uuid=b5bcbb964f3244d79f3a7508063243c0", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C45082636.step?uuid=b5bcbb964f3244d79f3a7508063243c0", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000038099999983387534, + y: -0.004949199999946252, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default UCC33420QRAQRQ1; diff --git a/lib/chips/UCC33420RAQR.circuit.tsx b/lib/chips/UCC33420RAQR.circuit.tsx new file mode 100644 index 00000000..cdc64871 --- /dev/null +++ b/lib/chips/UCC33420RAQR.circuit.tsx @@ -0,0 +1,204 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["pin1"], + pin2: ["VINP"], + pin3: ["GNDP2"], + pin6: ["GNDP1"], + pin7: ["SEL"], + pin8: ["VCC"], + pin9: ["GNDS2"], + pin12: ["GNDS1"], +} as const; + +const pinAttributes = { + pin8: { requiresPower: true }, +} as const; + +export const UCC33420RAQR = (props: ChipProps) => { + return ( + + + + + + + + + + + + + + + + + } + cadModel={{ + objUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C46461551.obj?uuid=b5bcbb964f3244d79f3a7508063243c0", + stepUrl: + "https://modelcdn.tscircuit.com/easyeda_models/assets/C46461551.step?uuid=b5bcbb964f3244d79f3a7508063243c0", + pcbRotationOffset: 0, + modelOriginPosition: { + x: 0.000038099999983387534, + y: -0.004949199999946252, + z: -0.02, + }, + }} + {...props} + /> + ); +}; + +export default UCC33420RAQR; diff --git a/lib/chips/UCC38C42DR.circuit.tsx b/lib/chips/UCC38C42DR.circuit.tsx new file mode 100644 index 00000000..133f21e6 --- /dev/null +++ b/lib/chips/UCC38C42DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC38C42DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC38C42DR; diff --git a/lib/chips/UCC38C43DR.circuit.tsx b/lib/chips/UCC38C43DR.circuit.tsx new file mode 100644 index 00000000..feef6f3d --- /dev/null +++ b/lib/chips/UCC38C43DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC38C43DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC38C43DR; diff --git a/lib/chips/UCC38C45DR.circuit.tsx b/lib/chips/UCC38C45DR.circuit.tsx new file mode 100644 index 00000000..e1a7f6c5 --- /dev/null +++ b/lib/chips/UCC38C45DR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["COMP"], + pin2: ["FB"], + pin3: ["CS"], + pin4: ["pin4"], + pin5: ["GND"], + pin6: ["OUT"], + pin7: ["VDD"], + pin8: ["VREF"], +} as const; + +const pinAttributes = { + pin5: { requiresGround: true }, + pin7: { requiresPower: true }, +} as const; + +export const UCC38C45DR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC38C45DR; diff --git a/lib/chips/UCC5320ECDR.circuit.tsx b/lib/chips/UCC5320ECDR.circuit.tsx new file mode 100644 index 00000000..bc761731 --- /dev/null +++ b/lib/chips/UCC5320ECDR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["IN_POS"], + pin3: ["IN_NEG"], + pin4: ["GND1"], + pin5: ["VCC2"], + pin6: ["OUT"], + pin7: ["GND2"], + pin8: ["VEE2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const UCC5320ECDR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC5320ECDR; diff --git a/lib/chips/UCC5350SBDR.circuit.tsx b/lib/chips/UCC5350SBDR.circuit.tsx new file mode 100644 index 00000000..5987aed6 --- /dev/null +++ b/lib/chips/UCC5350SBDR.circuit.tsx @@ -0,0 +1,45 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["IN_POS"], + pin3: ["IN_NEG"], + pin4: ["GND1"], + pin5: ["VCC2"], + pin6: ["OUTH"], + pin7: ["OUTL"], + pin8: ["VEE2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, +} as const; + +export const UCC5350SBDR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC5350SBDR; diff --git a/lib/chips/UCC5390ECDWVR.circuit.tsx b/lib/chips/UCC5390ECDWVR.circuit.tsx new file mode 100644 index 00000000..4523aafd --- /dev/null +++ b/lib/chips/UCC5390ECDWVR.circuit.tsx @@ -0,0 +1,50 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["VCC1"], + pin2: ["IN_POS"], + pin3: ["IN_NEG"], + pin4: ["GND1"], + pin5: ["VCC2"], + pin6: ["OUT"], + pin7: ["GND2"], + pin8: ["VEE2"], +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin4: { requiresGround: true }, + pin5: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +export const UCC5390ECDWVR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC5390ECDWVR; diff --git a/lib/chips/UCC57108CDR.circuit.tsx b/lib/chips/UCC57108CDR.circuit.tsx new file mode 100644 index 00000000..4c4d855f --- /dev/null +++ b/lib/chips/UCC57108CDR.circuit.tsx @@ -0,0 +1,44 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["VREF"], + pin3: ["FLT"], + pin4: ["DESAT"], + pin5: ["VDD"], + pin6: ["OUTH"], + pin7: ["OUTL"], + pin8: ["GND"], +} as const; + +const pinAttributes = { + pin5: { requiresPower: true }, + pin8: { requiresGround: true }, +} as const; + +export const UCC57108CDR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCC57108CDR; diff --git a/lib/chips/UCD3138ARGCR.circuit.tsx b/lib/chips/UCD3138ARGCR.circuit.tsx new file mode 100644 index 00000000..2ecce754 --- /dev/null +++ b/lib/chips/UCD3138ARGCR.circuit.tsx @@ -0,0 +1,112 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["AGND1"], + pin2: ["AD13"], + pin3: ["AD12"], + pin4: ["AD10"], + pin5: ["AD07"], + pin6: ["AD06"], + pin7: ["AD04"], + pin8: ["AD03"], + pin9: ["V33DIO1"], + pin10: ["DGND1"], + pin11: ["RESET"], + pin12: ["pin12"], + pin13: ["SCI_RX0"], + pin14: ["SCI_TX0"], + pin15: ["pin15"], + pin16: ["pin16"], + pin17: ["DPWM0A"], + pin18: ["DPWM0B"], + pin19: ["DPWM1A"], + pin20: ["DPWM1B"], + pin21: ["DPWM2A"], + pin22: ["DPWM2B"], + pin23: ["DPWM3A"], + pin24: ["DPWM3B"], + pin25: ["DGND2"], + pin26: ["pin26"], + pin27: ["PMBUS_ALERT"], + pin28: ["PMBUS_CTRL"], + pin29: ["pin29"], + pin30: ["pin30"], + pin31: ["PWM0"], + pin32: ["PWM1"], + pin33: ["DGND3"], + pin34: ["INT_EXT"], + pin35: ["FAULT0"], + pin36: ["FAULT1"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["TMS"], + pin41: ["TCAP"], + pin42: ["FAULT2"], + pin43: ["FAULT3"], + pin44: ["DGND4"], + pin45: ["V33DIO2"], + pin46: ["BP18"], + pin47: ["V33D"], + pin48: ["AGND2"], + pin49: ["AGND3"], + pin50: ["EAP0"], + pin51: ["EAN0"], + pin52: ["EAP1"], + pin53: ["EAN1"], + pin54: ["EAP2"], + pin55: ["EAN2"], + pin56: ["AGND4"], + pin57: ["V33A"], + pin58: ["AD00"], + pin59: ["AD01"], + pin60: ["AD02"], + pin61: ["AD05"], + pin62: ["AD08"], + pin63: ["AD09"], + pin64: ["AD11"], + pin65: ["EP"], +} as const; + +const pinAttributes = { + pin1: { requiresGround: true }, + pin48: { requiresGround: true }, + pin49: { requiresGround: true }, + pin56: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const UCD3138ARGCR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCD3138ARGCR; diff --git a/lib/chips/UCD7138DRSR.circuit.tsx b/lib/chips/UCD7138DRSR.circuit.tsx new file mode 100644 index 00000000..8b08bc11 --- /dev/null +++ b/lib/chips/UCD7138DRSR.circuit.tsx @@ -0,0 +1,52 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["IN"], + pin2: ["DTC"], + pin3: ["VCC"], + pin4: ["OUT"], + pin5: ["VD"], + pin6: ["CTRL"], + pin7: ["GND"], +} as const; + +const pinAttributes = { + pin3: { requiresPower: true }, + pin7: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin7: [...pinLabels["pin7"], "thermalpad"], +} as const; + +export const UCD7138DRSR = (props: ChipProps) => { + return ( + + ); +}; + +export default UCD7138DRSR; diff --git a/lib/chips/UCD90160RGCT.circuit.tsx b/lib/chips/UCD90160RGCT.circuit.tsx new file mode 100644 index 00000000..919d49c7 --- /dev/null +++ b/lib/chips/UCD90160RGCT.circuit.tsx @@ -0,0 +1,110 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["MON1"], + pin2: ["MON2"], + pin3: ["MON3"], + pin4: ["MON4"], + pin5: ["MON5"], + pin6: ["MON6"], + pin7: ["V33DIO1"], + pin8: ["DVSS1"], + pin9: ["RESET"], + pin10: ["TRCK"], + pin11: ["GPIO1"], + pin12: ["GPIO2"], + pin13: ["GPIO3"], + pin14: ["GPIO4"], + pin15: ["PMBUS_CLK"], + pin16: ["PMBUS_DATA"], + pin17: ["pin17"], + pin18: ["pin18"], + pin19: ["pin19"], + pin20: ["pin20"], + pin21: ["pin21"], + pin22: ["pin22"], + pin23: ["pin23"], + pin24: ["pin24"], + pin25: ["GPIO13"], + pin26: ["DVSS2"], + pin27: ["PMBUS_ALERT"], + pin28: ["PMBUS_CNTRL"], + pin29: ["GPIO14"], + pin30: ["GPIO15"], + pin31: ["pin31"], + pin32: ["pin32"], + pin33: ["GPIO16"], + pin34: ["GPIO17"], + pin35: ["GPIO18"], + pin36: ["pin36"], + pin37: ["pin37"], + pin38: ["pin38"], + pin39: ["pin39"], + pin40: ["TRST"], + pin41: ["pin41"], + pin42: ["pin42"], + pin43: ["DVSS3"], + pin44: ["V33DIO2"], + pin45: ["V33D"], + pin46: ["V33A"], + pin47: ["BPCAP"], + pin48: ["AVSS2"], + pin49: ["AVSS1"], + pin50: ["MON14"], + pin51: ["NC1"], + pin52: ["MON15"], + pin53: ["NC2"], + pin54: ["MON16"], + pin55: ["MON7"], + pin56: ["MON8"], + pin57: ["MON9"], + pin58: ["MON10"], + pin59: ["MON11"], + pin60: ["PMBUS_ADDR1"], + pin61: ["PMBUS_ADDR0"], + pin62: ["MON12"], + pin63: ["MON13"], + pin64: ["AVSS3"], + pin65: ["EP"], +} as const; + +const pinAttributes = { + pin51: { doNotConnect: true }, + pin53: { doNotConnect: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin65: [...pinLabels["pin65"], "thermalpad"], +} as const; + +export const UCD90160RGCT = (props: ChipProps) => { + return ( + + ); +}; + +export default UCD90160RGCT; diff --git a/lib/chips/UCG28828_1REZR.circuit.tsx b/lib/chips/UCG28828_1REZR.circuit.tsx new file mode 100644 index 00000000..6b6f86f3 --- /dev/null +++ b/lib/chips/UCG28828_1REZR.circuit.tsx @@ -0,0 +1,311 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["HV", "1"], + pin2: ["SW", "2"], + pin3: ["GND", "3", "GND_3"], + pin4: ["FLT", "4"], + pin5: ["FB", "5"], + pin6: ["TR", "6"], + pin7: ["IPK", "7"], + pin8: ["FCL", "8"], + pin9: ["CDX", "9"], + pin10: ["GND", "10", "GND_10"], + pin11: ["VCC", "11"], + pin12: ["GND", "12", "GND_12"], +} as const; + +const pinRoles = { + pin1: "power", + pin2: "power", + pin3: "ground", + pin4: "output", + pin5: "input", + pin6: "input", + pin7: "input", + pin8: "input", + pin9: "input", + pin10: "ground", + pin11: "power", + pin12: "ground", +} as const; + +const pinAttributes = { + pin1: { requiresPower: true }, + pin2: { requiresPower: true }, + pin3: { requiresGround: true }, + pin10: { requiresGround: true }, + pin11: { requiresPower: true }, + pin12: { requiresGround: true }, +} as const; + +export const UCG28828_1REZR = (props: ChipProps) => { + // Footprint provenance: TI drawing REZ0012A; official source https://www.ti.com/lit/gpn/UCG28828 pages 41,42 + return ( + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default UCG28828_1REZR; diff --git a/lib/chips/ULN2003AIDR.circuit.tsx b/lib/chips/ULN2003AIDR.circuit.tsx new file mode 100644 index 00000000..305c6b5d --- /dev/null +++ b/lib/chips/ULN2003AIDR.circuit.tsx @@ -0,0 +1,46 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1B"], + pin2: ["2B"], + pin3: ["3B"], + pin4: ["4B"], + pin5: ["5B"], + pin6: ["6B"], + pin7: ["7B"], + pin8: ["E"], + pin9: ["COM"], + pin10: ["7C"], + pin11: ["6C"], + pin12: ["5C"], + pin13: ["4C"], + pin14: ["3C"], + pin15: ["2C"], + pin16: ["1C"], +} as const; + +export const ULN2003AIDR = (props: ChipProps) => { + return ( + + ); +}; + +export default ULN2003AIDR; diff --git a/lib/chips/ULN2803CDWR.circuit.tsx b/lib/chips/ULN2803CDWR.circuit.tsx new file mode 100644 index 00000000..37620211 --- /dev/null +++ b/lib/chips/ULN2803CDWR.circuit.tsx @@ -0,0 +1,57 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["1B"], + pin2: ["2B"], + pin3: ["3B"], + pin4: ["4B"], + pin5: ["5B"], + pin6: ["6B"], + pin7: ["7B"], + pin8: ["8B"], + pin9: ["GND"], + pin10: ["NC2"], + pin11: ["NC1"], + pin12: ["COM"], + pin13: ["8C"], + pin14: ["7C"], + pin15: ["6C"], + pin16: ["5C"], + pin17: ["4C"], + pin18: ["3C"], + pin19: ["2C"], + pin20: ["1C"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, + pin10: { doNotConnect: true }, + pin11: { doNotConnect: true }, +} as const; + +export const ULN2803CDWR = (props: ChipProps) => { + return ( + + ); +}; + +export default ULN2803CDWR; diff --git a/lib/chips/XI6432BAFCLIMBBR.circuit.tsx b/lib/chips/XI6432BAFCLIMBBR.circuit.tsx new file mode 100644 index 00000000..e3592521 --- /dev/null +++ b/lib/chips/XI6432BAFCLIMBBR.circuit.tsx @@ -0,0 +1,348 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["SPI_BUSY", "1"], + pin2: ["PRESENCE_INDICATION_OUTPUT", "2"], + pin3: ["MODULE_WAKE_UP_INPUT", "3"], + pin4: ["NC", "4", "NC_4"], + pin5: ["GND", "5", "GND_5"], + pin6: ["GND", "6", "GND_6"], + pin7: ["VCC", "7", "VCC_7"], + pin8: ["VCC", "8", "VCC_8"], + pin9: ["NC", "9", "NC_9"], + pin10: ["SOP0", "10"], + pin11: ["NC", "11", "NC_11"], + pin12: ["UART_RX", "12"], + pin13: ["UART_TX", "13"], + pin14: ["NC", "14", "NC_14"], + pin15: ["NRESET", "15"], + pin16: ["NC", "16", "NC_16"], + pin17: ["NC", "17", "NC_17"], + pin18: ["SPI_MISO", "18"], + pin19: ["SPI_CS", "19"], + pin20: ["SPI_CLK", "20"], + pin21: ["SPI_MOSI", "21"], + pin22: ["NC", "22", "NC_22"], + pin23: ["NC", "23", "NC_23"], + pin24: ["NC", "24", "NC_24"], + pin25: ["GND", "25", "GND_25"], + pin26: ["NC", "26", "NC_26"], + pin27: ["GND", "27", "GND_27"], + pin28: ["GND", "28", "GND_28"], + pin29: ["VIOIN", "29"], + pin30: ["GND", "30", "GND_30"], +} as const; + +const pinRoles = { + pin1: "output", + pin2: "output", + pin3: "control", + pin4: "no-connect", + pin5: "ground", + pin6: "ground", + pin7: "power", + pin8: "power", + pin9: "no-connect", + pin10: "unknown", + pin11: "no-connect", + pin12: "input", + pin13: "output", + pin14: "no-connect", + pin15: "unknown", + pin16: "no-connect", + pin17: "no-connect", + pin18: "output", + pin19: "control", + pin20: "control", + pin21: "input", + pin22: "no-connect", + pin23: "no-connect", + pin24: "no-connect", + pin25: "ground", + pin26: "no-connect", + pin27: "ground", + pin28: "ground", + pin29: "unknown", + pin30: "ground", +} as const; + +const pinAttributes = { + pin4: { doNotConnect: true }, + pin5: { requiresGround: true }, + pin6: { requiresGround: true }, + pin7: { requiresPower: true }, + pin8: { requiresPower: true }, + pin9: { doNotConnect: true }, + pin11: { doNotConnect: true }, + pin14: { doNotConnect: true }, + pin16: { doNotConnect: true }, + pin17: { doNotConnect: true }, + pin22: { doNotConnect: true }, + pin23: { doNotConnect: true }, + pin24: { doNotConnect: true }, + pin25: { requiresGround: true }, + pin26: { doNotConnect: true }, + pin27: { requiresGround: true }, + pin28: { requiresGround: true }, + pin30: { requiresGround: true }, +} as const; + +export const XI6432BAFCLIMBBR = (props: ChipProps) => { + // Footprint provenance: TI drawing MBB0030A; official source https://www.ti.com/lit/gpn/IWRL6432WMOD pages 30,31,32 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default XI6432BAFCLIMBBR; diff --git a/lib/chips/XM33C321ASPZR.circuit.tsx b/lib/chips/XM33C321ASPZR.circuit.tsx new file mode 100644 index 00000000..1b0f8fab --- /dev/null +++ b/lib/chips/XM33C321ASPZR.circuit.tsx @@ -0,0 +1,1035 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["UC13_3_SCK_SCL", "1"], + pin2: ["UC12_RX", "2", "UC12_RX_2"], + pin3: ["UC1_0_SDA_TX", "3", "UC1_0_SDA_TX_3"], + pin4: ["UC13_3_POCI_RT", "4", "UC13_3_POCI_RT_4"], + pin5: ["TIMA0_0_FAL2", "5", "TIMA0_0_FAL2_5"], + pin6: ["NRST", "6"], + pin7: ["VBAT", "7"], + pin8: ["VDD", "8", "VDD_8"], + pin9: ["VSS", "9", "VSS_9"], + pin10: ["SDIO", "10", "SDIO_10"], + pin11: ["SDIO", "11", "SDIO_11"], + pin12: ["TIMG4_1_C0", "12"], + pin13: ["TIMG4_1_C1", "13", "TIMG4_1_C1_13"], + pin14: ["IO", "14", "IO_14"], + pin15: ["UC12_RX", "15", "UC12_RX_15"], + pin16: ["UC1_1_SDA_TX", "16", "UC1_1_SDA_TX_16"], + pin17: ["UC1_1_SCL_RX", "17", "UC1_1_SCL_RX_17"], + pin18: ["TIMG4_2_C0", "18"], + pin19: ["TIMA0_0_C2N", "19"], + pin20: ["UC1_0_SDA_TX", "20", "UC1_0_SDA_TX_20"], + pin21: ["UC1_0_SCL_RX", "21"], + pin22: ["CLK_OUT", "22", "CLK_OUT_22"], + pin23: ["TIMA0_0_C3", "23", "TIMA0_0_C3_23"], + pin24: ["TIMA0_0_C3N", "24"], + pin25: ["UC1_1_SDA_TX", "25", "UC1_1_SDA_TX_25"], + pin26: ["UC1_1_SCL_RX", "26", "UC1_1_SCL_RX_26"], + pin27: ["UC1_0_RTS", "27"], + pin28: ["TDO", "28"], + pin29: ["TIMA0_0_C0", "29", "TIMA0_0_C0_29"], + pin30: ["TIMG8_1_C0", "30", "TIMG8_1_C0_30"], + pin31: ["TIMA0_0_C1", "31", "TIMA0_0_C1_31"], + pin32: ["UC13_3_POCI_RT", "32", "UC13_3_POCI_RT_32"], + pin33: ["UC2_POCI", "33"], + pin34: ["UC2_SCK", "34"], + pin35: ["PC16", "35"], + pin36: ["SDIO", "36", "SDIO_36"], + pin37: ["TIMA0_1_C1N", "37"], + pin38: ["IO", "38", "IO_38"], + pin39: ["SDIO", "39", "SDIO_39"], + pin40: ["I2S1_AD0", "40"], + pin41: ["I2S1_AD1", "41"], + pin42: ["TIMA0_1_FAL1", "42"], + pin43: ["I2S1_BCLK", "43", "I2S1_BCLK_43"], + pin44: ["I2S1_MCLK", "44"], + pin45: ["CLK_OUT", "45", "CLK_OUT_45"], + pin46: ["UC13_0_PICO_SD", "46"], + pin47: ["UC13_0_SCK_SCL", "47", "UC13_0_SCK_SCL_47"], + pin48: ["TIMA0_0_C0", "48", "TIMA0_0_C0_48"], + pin49: ["TIMA0_1_C3", "49"], + pin50: ["TIMA0_1_C3N", "50", "TIMA0_1_C3N_50"], + pin51: ["FCC_IN", "51"], + pin52: ["QSPI_IO2", "52"], + pin53: ["QSPI_IO1", "53"], + pin54: ["UC15_1_SCL", "54"], + pin55: ["UC1_1_SDA_TX", "55", "UC1_1_SDA_TX_55"], + pin56: ["TIMG8_0_C0", "56"], + pin57: ["IO", "57", "IO_57"], + pin58: ["SDIO", "58", "SDIO_58"], + pin59: ["SDIO", "59", "SDIO_59"], + pin60: ["IO", "60", "IO_60"], + pin61: ["SDIO", "61", "SDIO_61"], + pin62: ["SDIO", "62", "SDIO_62"], + pin63: ["VSS", "63", "VSS_63"], + pin64: ["VDD", "64", "VDD_64"], + pin65: ["UC13_0_SCK_SCL", "65", "UC13_0_SCK_SCL_65"], + pin66: ["TIMG4_3_C1", "66"], + pin67: ["IO", "67", "IO_67"], + pin68: ["TIMA0_0_C1N", "68", "TIMA0_0_C1N_68"], + pin69: ["TIMA0_0_C3", "69", "TIMA0_0_C3_69"], + pin70: ["UC13_1_CS0_CTS", "70"], + pin71: ["UC15_0_SDA", "71"], + pin72: ["SWCLK", "72"], + pin73: ["UC13_1_PICO_SD", "73"], + pin74: ["UC13_1_SCK_SCL", "74"], + pin75: ["TIMA0_1_C2", "75"], + pin76: ["UC1_1_CTS", "76"], + pin77: ["TDI", "77"], + pin78: ["TIMA0_0_C0", "78", "TIMA0_0_C0_78"], + pin79: ["TIMA0_0_C0N", "79"], + pin80: ["TIMA0_0_C1", "80", "TIMA0_0_C1_80"], + pin81: ["TIMA0_0_C1N", "81", "TIMA0_0_C1N_81"], + pin82: ["TIMA0_1_C2N", "82"], + pin83: ["CAN1_TX", "83", "CAN1_TX_83"], + pin84: ["TIMA0_1_C3N", "84", "TIMA0_1_C3N_84"], + pin85: ["I2S1_BCLK", "85", "I2S1_BCLK_85"], + pin86: ["TIMG4_1_C1", "86", "TIMG4_1_C1_86"], + pin87: ["TIMG8_1_C0", "87", "TIMG8_1_C0_87"], + pin88: ["TIMG8_1_C1", "88"], + pin89: ["IO", "89", "IO_89"], + pin90: ["CAN1_TX", "90", "CAN1_TX_90"], + pin91: ["SDIO", "91", "SDIO_91"], + pin92: ["UC13_0_CS0_CTS", "92"], + pin93: ["S", "93"], + pin94: ["RX", "94"], + pin95: ["TIMA0_0_FAL2", "95", "TIMA0_0_FAL2_95"], + pin96: ["I2S0_MCLK", "96"], + pin97: ["TIMG4_2_C1", "97"], + pin98: ["A_TX", "98"], + pin99: ["TIMA0_0_FAL2", "99", "TIMA0_0_FAL2_99"], + pin100: ["VCORE", "100"], +} as const; + +const pinRoles = { + pin1: "control", + pin2: "input", + pin3: "bidirectional", + pin4: "unknown", + pin5: "unknown", + pin6: "unknown", + pin7: "power", + pin8: "power", + pin9: "ground", + pin10: "bidirectional", + pin11: "bidirectional", + pin12: "unknown", + pin13: "unknown", + pin14: "bidirectional", + pin15: "input", + pin16: "bidirectional", + pin17: "control", + pin18: "unknown", + pin19: "unknown", + pin20: "bidirectional", + pin21: "control", + pin22: "control", + pin23: "unknown", + pin24: "unknown", + pin25: "bidirectional", + pin26: "control", + pin27: "unknown", + pin28: "unknown", + pin29: "unknown", + pin30: "unknown", + pin31: "unknown", + pin32: "unknown", + pin33: "unknown", + pin34: "control", + pin35: "unknown", + pin36: "bidirectional", + pin37: "unknown", + pin38: "bidirectional", + pin39: "bidirectional", + pin40: "unknown", + pin41: "unknown", + pin42: "unknown", + pin43: "unknown", + pin44: "unknown", + pin45: "control", + pin46: "unknown", + pin47: "control", + pin48: "unknown", + pin49: "unknown", + pin50: "unknown", + pin51: "input", + pin52: "bidirectional", + pin53: "bidirectional", + pin54: "control", + pin55: "bidirectional", + pin56: "unknown", + pin57: "bidirectional", + pin58: "bidirectional", + pin59: "bidirectional", + pin60: "bidirectional", + pin61: "bidirectional", + pin62: "bidirectional", + pin63: "ground", + pin64: "power", + pin65: "control", + pin66: "unknown", + pin67: "bidirectional", + pin68: "unknown", + pin69: "unknown", + pin70: "control", + pin71: "bidirectional", + pin72: "output", + pin73: "unknown", + pin74: "control", + pin75: "unknown", + pin76: "unknown", + pin77: "unknown", + pin78: "unknown", + pin79: "unknown", + pin80: "unknown", + pin81: "unknown", + pin82: "unknown", + pin83: "output", + pin84: "unknown", + pin85: "unknown", + pin86: "unknown", + pin87: "unknown", + pin88: "unknown", + pin89: "bidirectional", + pin90: "output", + pin91: "bidirectional", + pin92: "control", + pin93: "unknown", + pin94: "input", + pin95: "unknown", + pin96: "unknown", + pin97: "unknown", + pin98: "output", + pin99: "unknown", + pin100: "unknown", +} as const; + +const pinAttributes = { + pin7: { requiresPower: true }, + pin8: { requiresPower: true }, + pin9: { requiresGround: true }, + pin63: { requiresGround: true }, + pin64: { requiresPower: true }, +} as const; + +export const XM33C321ASPZR = (props: ChipProps) => { + // Footprint provenance: TI drawing PZ0100A; official source https://www.ti.com/lit/gpn/MSPM33C321A pages 111 + return ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + {...props} + /> + ); +}; + +export default XM33C321ASPZR; diff --git a/lib/chips/XMSPM0G1218SRGZR.circuit.tsx b/lib/chips/XMSPM0G1218SRGZR.circuit.tsx new file mode 100644 index 00000000..02d90a16 --- /dev/null +++ b/lib/chips/XMSPM0G1218SRGZR.circuit.tsx @@ -0,0 +1,128 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["TIMA0_C0", "1", "TIMA0_C0_1"], + pin2: ["TIMA_FAL2", "2"], + pin3: ["UC0_SDA_TX", "3", "UC0_SDA_TX_3"], + pin4: ["NRST", "4"], + pin5: ["UC0_SCL_RX", "5", "UC0_SCL_RX_5"], + pin6: ["VDD", "6"], + pin7: ["VSS", "7"], + pin8: ["TIMA0_C3N", "8", "TIMA0_C3N_8"], + pin9: ["TIMA0_C1", "9"], + pin10: ["TIMA0_C1N", "10", "TIMA0_C1N_10"], + pin11: ["UC5_SDA_TX", "11"], + pin12: ["TIMG0_C1", "12", "TIMG0_C1_12"], + pin13: ["TIMA0_C2", "13"], + pin14: ["TIMA0_C3", "14", "TIMA0_C3_14"], + pin15: ["TIMA0_C3N", "15", "TIMA0_C3N_15"], + pin16: ["TIMA0_C0", "16", "TIMA0_C0_16"], + pin17: ["TIMA0_C0N", "17", "TIMA0_C0N_17"], + pin18: ["CLK_OUT", "18", "CLK_OUT_18"], + pin19: ["COMP0_OUT", "19"], + pin20: ["TIMG8_C0", "20"], + pin21: ["UC4_POCI_RTS", "21", "UC4_POCI_RTS_21"], + pin22: ["UC4_PICO_TX", "22"], + pin23: ["UC4_SCLK_RX", "23", "UC4_SCLK_RX_23"], + pin24: ["UC4_POCI_RTS", "24", "UC4_POCI_RTS_24"], + pin25: ["UC0_SDA_TX", "25", "UC0_SDA_TX_25"], + pin26: ["UC0_SCL_RX", "26", "UC0_SCL_RX_26"], + pin27: ["FCC_IN", "27"], + pin28: ["TIMG0_C1", "28", "TIMG0_C1_28"], + pin29: ["UC9_TX", "29"], + pin30: ["TIMG8_IDX", "30"], + pin31: ["TIMA0_C2N", "31", "TIMA0_C2N_31"], + pin32: ["TIMA0_C3", "32", "TIMA0_C3_32"], + pin33: ["TIMA0_C3N", "33", "TIMA0_C3N_33"], + pin34: ["UC4_POCI_RTS", "34", "UC4_POCI_RTS_34"], + pin35: ["UC4_SCLK_RX", "35", "UC4_SCLK_RX_35"], + pin36: ["UC0_SCL_RX", "36", "UC0_SCL_RX_36"], + pin37: ["TIMA0_C2N", "37", "TIMA0_C2N_37"], + pin38: ["TIMG8_C1", "38"], + pin39: ["TIMA0_C0", "39", "TIMA0_C0_39"], + pin40: ["TIMA0_C0N", "40", "TIMA0_C0N_40"], + pin41: ["TIMA_FAL1", "41"], + pin42: ["TIMA0_C1N", "42", "TIMA0_C1N_42"], + pin43: ["TIMA0_C3", "43", "TIMA0_C3_43"], + pin44: ["TIMA0_C3N", "44", "TIMA0_C3N_44"], + pin45: ["TIMA0_C1N", "45", "TIMA0_C1N_45"], + pin46: ["TIMA_FAL0", "46"], + pin47: ["CLK_OUT", "47", "CLK_OUT_47"], + pin48: ["VCORE", "48"], + pin49: ["QFN_PAD", "THERMAL_PAD", "49"], +} as const; + +const pinRoles = { + pin1: "unknown", + pin2: "unknown", + pin3: "bidirectional", + pin4: "unknown", + pin5: "control", + pin6: "power", + pin7: "ground", + pin8: "unknown", + pin9: "unknown", + pin10: "unknown", + pin11: "bidirectional", + pin12: "unknown", + pin13: "unknown", + pin14: "unknown", + pin15: "unknown", + pin16: "unknown", + pin17: "unknown", + pin18: "control", + pin19: "output", + pin20: "unknown", + pin21: "unknown", + pin22: "output", + pin23: "control", + pin24: "unknown", + pin25: "bidirectional", + pin26: "control", + pin27: "input", + pin28: "unknown", + pin29: "output", + pin30: "unknown", + pin31: "unknown", + pin32: "unknown", + pin33: "unknown", + pin34: "unknown", + pin35: "control", + pin36: "control", + pin37: "unknown", + pin38: "unknown", + pin39: "unknown", + pin40: "unknown", + pin41: "unknown", + pin42: "unknown", + pin43: "unknown", + pin44: "unknown", + pin45: "unknown", + pin46: "unknown", + pin47: "control", + pin48: "unknown", + pin49: "ground", +} as const; + +const pinAttributes = { + pin6: { requiresPower: true }, + pin7: { requiresGround: true }, + pin49: { requiresGround: true }, +} as const; + +export const XMSPM0G1218SRGZR = (props: ChipProps) => { + // Footprint provenance: TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766) + return ( + + ); +}; + +export default XMSPM0G1218SRGZR; diff --git a/lib/chips/XTR200DQCR.circuit.tsx b/lib/chips/XTR200DQCR.circuit.tsx new file mode 100644 index 00000000..29be3772 --- /dev/null +++ b/lib/chips/XTR200DQCR.circuit.tsx @@ -0,0 +1,51 @@ +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const pinLabels = { + pin1: ["INPUT"], + pin2: ["MODE"], + pin3: ["EF"], + pin4: ["OD"], + pin5: ["VSP"], + pin6: ["OUT"], + pin7: ["IS"], + pin8: ["VG"], + pin9: ["GND"], + pin10: ["SET"], + pin11: ["EP"], +} as const; + +const pinAttributes = { + pin9: { requiresGround: true }, +} as const; + +const footprinterPinLabels = { + ...pinLabels, + pin11: [...pinLabels["pin11"], "thermalpad"], +} as const; + +export const XTR200DQCR = (props: ChipProps) => { + return ( + + ); +}; + +export default XTR200DQCR; diff --git a/lib/chips/get-ti-schematic-layout.test.ts b/lib/chips/get-ti-schematic-layout.test.ts new file mode 100644 index 00000000..4090b9b9 --- /dev/null +++ b/lib/chips/get-ti-schematic-layout.test.ts @@ -0,0 +1,191 @@ +/// + +import { describe, expect, test } from "bun:test"; +import type { ChipProps } from "@tscircuit/props"; +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts"; + +const getPins = ( + side: undefined | Array | { pins: Array }, +) => (Array.isArray(side) ? side : (side?.pins ?? [])); + +describe("getTiSchematicLayout", () => { + test("places pins by function and hides no-connect pins", () => { + const pinLabels = { + pin1: "VIN", + pin2: "GND", + pin3: "EN", + pin4: "NC", + pin5: "VOUT", + pin6: "SENSE", + pin7: "GPIO1", + pin8: "EP", + } as const; + const layout = getTiSchematicLayout(pinLabels); + const chipProps = { + name: "U1", + pinLabels, + ...layout, + } satisfies ChipProps; + + expect(getPins(chipProps.schPinArrangement.topSide)).toEqual(["pin1"]); + expect(getPins(layout.schPinArrangement.bottomSide)).toEqual([ + "pin2", + "pin8", + ]); + expect(getPins(layout.schPinArrangement.leftSide)).toEqual([ + "pin6", + "pin3", + "pin7", + ]); + expect(getPins(layout.schPinArrangement.rightSide)).toEqual(["pin5"]); + expect(layout.noConnect).toEqual(["pin4"]); + }); + + test("adds only 0.2 mm margins between functional groups", () => { + const layout = getTiSchematicLayout({ + pin1: "AIN0", + pin2: "AIN1", + pin3: "RESET", + pin4: "SCLK", + pin5: "GPIO0", + pin6: "GPIO1", + pin7: "OUT0", + pin8: "OUT1", + } as const); + + expect(layout.schPinStyle).toEqual({ + pin2: { marginBottom: 0.2 }, + pin4: { marginBottom: 0.2 }, + }); + expect("schPinSpacing" in layout).toBe(false); + for (const style of Object.values(layout.schPinStyle)) { + for (const margin of Object.values(style)) { + expect(Number(margin) % 0.2).toBeCloseTo(0); + } + } + }); + + test("balances unknown pins across the left and right sides", () => { + const layout = getTiSchematicLayout({ + pin1: "MYSTERY1", + pin2: "MYSTERY2", + pin3: "MYSTERY3", + pin4: "MYSTERY4", + pin5: "MYSTERY5", + } as const); + + const leftPins = getPins(layout.schPinArrangement.leftSide); + const rightPins = getPins(layout.schPinArrangement.rightSide); + expect(leftPins).toEqual(["pin1", "pin3", "pin5"]); + expect(rightPins).toEqual(["pin2", "pin4"]); + expect(Math.abs(leftPins.length - rightPins.length)).toBeLessThanOrEqual(1); + }); + + test("classifies functional aliases after alphanumeric physical pins", () => { + const layout = getTiSchematicLayout({ + pin1: ["A1", "VDD"], + pin2: ["A2", "UART_RX"], + pin3: ["B1", "UART_TX"], + pin4: ["B2", "VSS"], + pin5: ["AA23", "DNC"], + } as const); + + expect(getPins(layout.schPinArrangement.topSide)).toEqual(["pin1"]); + expect(getPins(layout.schPinArrangement.leftSide)).toEqual(["pin2"]); + expect(getPins(layout.schPinArrangement.rightSide)).toEqual(["pin3"]); + expect(getPins(layout.schPinArrangement.bottomSide)).toEqual(["pin4"]); + expect(layout.noConnect).toEqual(["pin5"]); + }); + + test("supports datasheet-specific role overrides", () => { + const layout = getTiSchematicLayout( + { + pin1: "BIAS", + pin2: "SUBSTRATE", + } as const, + { + pinRoles: { + pin1: "power", + pin2: "ground", + }, + }, + ); + + expect(getPins(layout.schPinArrangement.topSide)).toEqual(["pin1"]); + expect(getPins(layout.schPinArrangement.bottomSide)).toEqual(["pin2"]); + }); + + test("places non-electrical thermal pads on the bottom without making them ground", () => { + const layout = getTiSchematicLayout( + { + pin1: "GND", + pin2: "THERMAL_PAD", + pin3: "PADCONFIG", + } as const, + { pinRoles: { pin2: "thermal" } }, + ); + + expect(getPins(layout.schPinArrangement.bottomSide)).toEqual([ + "pin1", + "pin2", + ]); + expect(getPins(layout.schPinArrangement.leftSide)).toEqual(["pin3"]); + expect(layout.noConnect).toEqual([]); + }); + + test("keeps side pins clear of long top and bottom labels", () => { + const layout = getTiSchematicLayout({ + pin1: "VDD_VERY_LONG_POWER_RAIL", + pin2: "INPUT_A", + pin3: "INPUT_B", + pin4: "OUTPUT_A", + pin5: "OUTPUT_B", + pin6: "VQFN_THERMAL_PAD", + } as const); + + expect(layout.schPinStyle.pin2?.marginTop).toBeGreaterThan(0); + expect(layout.schPinStyle.pin3?.marginBottom).toBeGreaterThan(0); + expect(layout.schPinStyle.pin4?.marginTop).toBeGreaterThan(0); + expect(layout.schPinStyle.pin5?.marginBottom).toBeGreaterThan(0); + for (const pin of ["pin2", "pin3", "pin4", "pin5"] as const) { + for (const margin of Object.values(layout.schPinStyle[pin] ?? {})) { + const gridUnits = Number(margin) / 0.2; + expect(gridUnits).toBeCloseTo(Math.round(gridUnits)); + } + } + }); + + test("recognizes common analog-supply and address-control aliases", () => { + const layout = getTiSchematicLayout({ + pin1: "VA", + pin2: "ADR0", + pin3: "ADR1", + pin4: "GND", + } as const); + + expect(getPins(layout.schPinArrangement.topSide)).toEqual(["pin1"]); + expect(getPins(layout.schPinArrangement.leftSide)).toEqual([ + "pin2", + "pin3", + ]); + expect(getPins(layout.schPinArrangement.bottomSide)).toEqual(["pin4"]); + }); + + test("returns dimensions rounded up to the 0.2 mm grid", () => { + const layout = getTiSchematicLayout({ + pin1: "VERY_LONG_ANALOG_INPUT_NAME", + pin2: "VERY_LONG_DIGITAL_OUTPUT_NAME", + pin3: "VDD", + pin4: "GND", + } as const); + + expect(layout.schWidth / 0.2).toBeCloseTo( + Math.round(layout.schWidth / 0.2), + ); + expect(layout.schHeight / 0.2).toBeCloseTo( + Math.round(layout.schHeight / 0.2), + ); + expect(layout.schWidth).toBeGreaterThanOrEqual(1.6); + expect(layout.schHeight).toBeGreaterThanOrEqual(1.2); + }); +}); diff --git a/lib/chips/get-ti-schematic-layout.ts b/lib/chips/get-ti-schematic-layout.ts new file mode 100644 index 00000000..0b834fe6 --- /dev/null +++ b/lib/chips/get-ti-schematic-layout.ts @@ -0,0 +1,374 @@ +import type { + SchematicPinArrangement, + SchematicPinStyle, +} from "@tscircuit/props"; + +const PIN_SPACING_MM = 0.2; +const GROUP_GAP_MM = 0.2; +const BOX_PADDING_MM = 0.8; +const LABEL_CHARACTER_WIDTH_MM = 0.11; +const SIDE_PIN_EDGE_ALLOWANCE_MM = 0.4; + +export type TiPinLabels = Readonly>; + +export type TiSchematicPinRole = + | "power" + | "ground" + | "input" + | "control" + | "bidirectional" + | "output" + | "thermal" + | "unknown" + | "no-connect"; + +export interface GetTiSchematicLayoutOptions { + /** Override the heuristic when the datasheet defines a less obvious role. */ + pinRoles?: Readonly>>; +} + +export interface TiSchematicLayout { + schPinArrangement: SchematicPinArrangement; + schPinStyle: SchematicPinStyle; + schWidth: number; + schHeight: number; + noConnect: PinKey[]; +} + +interface ClassifiedPin { + key: PinKey; + labels: string[]; + role: TiSchematicPinRole; +} + +const normalizeLabel = (label: string) => + label + .trim() + .toUpperCase() + .replace(/[^A-Z0-9]+/g, "_") + .replace(/^_+|_+$/g, ""); + +const isPhysicalPinIdentifier = (label: string) => + /^\d+$/.test(label) || /^[A-Z]{1,3}\d{1,3}$/.test(label); + +const isNoConnectLabel = (label: string) => + /^(?:NC|N_C|DNC|DNU|NU|RSVD|RESERVED|NO_CONNECT|NOT_CONNECTED|DO_NOT_CONNECT)\d*$/.test( + label, + ) || label.startsWith("NC_"); + +const isGroundLabel = (label: string) => + /(?:^|_)(?:GND|AGND|DGND|PGND|SGND|CGND|GNDA|GNDD|VSS|VSSA|VSSD)(?:\d*|$|_)/.test( + label, + ); + +const isThermalLabel = (label: string) => + /^(?:EP|EPAD|PAD|DAP|POWERPAD|PADDLE|EXPOSED|EXPOSED_PAD|THERMAL|THERMALPAD|THERMAL_PAD|QFN_PAD|VQFN_THERMAL_PAD)$/.test( + label, + ); + +const isOutputLabel = (label: string) => + /^(?:OUT|OUTPUT|VOUT|IOUT|TX|TXD|SDO|DOUT|MISO|Q\d*|Y|Z|SW\d*|LX\d*|PH\d*|PHASE\d*|GATE\d*|DRV\d*|LED\d*|INT\d*|IRQ\d*|ALERT\d*|FAULT\d*|PGOOD\d*|POWERGOOD\d*|STAT\d*|READY\d*|DONE\d*|LOCK\d*|CLKOUT\d*|REFOUT\d*)/.test( + label, + ) || + /(?:^|_)(?:OUT|OUTPUT|TX|TXD|SDO|DOUT|MISO|SW|LX|PHASE|GATE|DRV|INT|IRQ|ALERT|FAULT|PGOOD|POWERGOOD|STAT|READY|DONE|LOCK|CLKOUT|REFOUT)(?:\d*|$|_)/.test( + label, + ) || + /^\d*[YQZ]\d*$/.test(label) || + /DRV\d*$/.test(label); + +const isPowerLabel = (label: string) => + /^(?:VCC|VDD|AVCC|AVDD|DVCC|DVDD|PVCC|PVDD|IOVCC|IOVDD|VA|VAA|VBB|VCCA|VCCB|VDDA|VDDD|VDDIO|VDDR|VBAT|VBUS|VSUPPLY|VS|VIN|VBIAS|VREF|REFIN|REFP|REFN|VCOM|VREG|VLDO|VMOTOR|VM|VP|VN|VPP|VEE|REGN|BAT|SYS)(?:\d*|_[A-Z0-9]+)*$/.test( + label, + ) || /(?:^|_)(?:POWER|SUPPLY)(?:$|_)/.test(label); + +const isBidirectionalLabel = (label: string) => + /(?:^|_)(?:GPIO|DIO|SDA|SDIO|I2C|I3C|USB_DP|USB_DM|CANH|CANL|MDIO)(?:\d*|$|_)/.test( + label, + ) || + /^(?:IO|DQ|DAT)\d+$/.test(label) || + label === "DATA"; + +const isInputLabel = (label: string) => + /^(?:IN|INPUT|AIN|ADC_IN|RX|RXD|MOSI|SDI|DIN|SENSE|SNS|FB|VINP|VINN|INP|INN|IP|IM|A|B|C|D)(?:\d*|_[A-Z0-9]+)*$/.test( + label, + ) || + /(?:^|_)(?:INPUT|AIN|ADC_IN|RX|RXD|MOSI|SDI|DIN|SENSE|SNS|FB|INP|INN)(?:\d*|$|_)/.test( + label, + ) || + /^\d+[ABCD]$/.test(label); + +const isControlLabel = (label: string) => + /(?:^|_)(?:EN|ENABLE|RESET|RST|SHDN|SHUTDOWN|SLEEP|WAKE|CLK|CLOCK|SCK|SCL|CS|CE|OE|SEL|MODE|ADR|ADDR|SYNC|LATCH|TRIG|TRIGGER|PWM|ILIM|ISET|FREQ|RT|SS|BOOT|BST|TMR|TEST|TCK|TMS|TDI|TDO|TRST)(?:\d*|$|_)/.test( + label, + ); + +const classifyPin = ( + labels: string[], + override: TiSchematicPinRole | undefined, +): TiSchematicPinRole => { + if (override) return override; + + const normalizedLabels = labels + .map(normalizeLabel) + .filter(Boolean) + .filter( + (label, index) => + !(labels.length > 1 && index === 0 && isPhysicalPinIdentifier(label)), + ); + + if (normalizedLabels.some(isNoConnectLabel)) return "no-connect"; + if (normalizedLabels.some(isGroundLabel)) return "ground"; + + const hasBidirectionalLabel = normalizedLabels.some(isBidirectionalLabel); + const hasOutputLabel = normalizedLabels.some(isOutputLabel); + + if (hasOutputLabel && !hasBidirectionalLabel) return "output"; + if (normalizedLabels.some(isPowerLabel)) return "power"; + if (normalizedLabels.some(isThermalLabel)) return "thermal"; + if (hasBidirectionalLabel) return "bidirectional"; + if (hasOutputLabel) return "output"; + if (normalizedLabels.some(isInputLabel)) return "input"; + if (normalizedLabels.some(isControlLabel)) return "control"; + return "unknown"; +}; + +const compareNatural = (left: string, right: string) => { + const leftParts = left.replace(/^pin/i, "").match(/\d+|\D+/g) ?? [left]; + const rightParts = right.replace(/^pin/i, "").match(/\d+|\D+/g) ?? [right]; + const partCount = Math.max(leftParts.length, rightParts.length); + + for (let index = 0; index < partCount; index += 1) { + const leftPart = leftParts[index]; + const rightPart = rightParts[index]; + if (leftPart === undefined) return -1; + if (rightPart === undefined) return 1; + if (leftPart === rightPart) continue; + + const leftNumber = /^\d+$/.test(leftPart) ? Number(leftPart) : null; + const rightNumber = /^\d+$/.test(rightPart) ? Number(rightPart) : null; + if (leftNumber !== null && rightNumber !== null) { + return leftNumber - rightNumber; + } + + return leftPart.localeCompare(rightPart); + } + + return 0; +}; + +const getLabels = (label: string | readonly string[]) => + typeof label === "string" ? [label] : [...label]; + +const addVerticalGroups = ( + groups: Array[]>, + schPinStyle: SchematicPinStyle, +) => { + const pins: PinKey[] = []; + + for (const group of groups.filter((candidate) => candidate.length > 0)) { + const previousPin = pins[pins.length - 1]; + if (previousPin) { + schPinStyle[previousPin] = { marginBottom: GROUP_GAP_MM }; + } + pins.push(...group.map((pin) => pin.key)); + } + + return pins; +}; + +const roundUpToGrid = (value: number) => + Number( + ( + Math.ceil((value - Number.EPSILON) / PIN_SPACING_MM) * PIN_SPACING_MM + ).toFixed(10), + ); + +const getBestDisplayLabel = (pin: ClassifiedPin) => { + const firstLabel = pin.labels[0] ?? pin.key; + if ( + pin.labels.length > 1 && + isPhysicalPinIdentifier(normalizeLabel(firstLabel)) + ) { + return pin.labels[1] ?? firstLabel; + } + return firstLabel; +}; + +const getLongestLabelWidth = (pins: ClassifiedPin[]) => + Math.max( + 0, + ...pins.map( + (pin) => getBestDisplayLabel(pin).length * LABEL_CHARACTER_WIDTH_MM, + ), + ); + +const getPinSpan = (pinCount: number, groupGapCount = 0) => + Math.max(0, pinCount - 1) * PIN_SPACING_MM + groupGapCount * GROUP_GAP_MM; + +const getSidePinEdgeClearance = (pins: ClassifiedPin[]) => + roundUpToGrid( + Math.max(0, getLongestLabelWidth(pins) - SIDE_PIN_EDGE_ALLOWANCE_MM), + ); + +const addSidePinEdgeClearance = ( + pins: PinKey[], + schPinStyle: SchematicPinStyle, + topClearance: number, + bottomClearance: number, +) => { + const firstPin = pins[0]; + const lastPin = pins[pins.length - 1]; + if (firstPin && topClearance > 0) { + schPinStyle[firstPin] = { + ...schPinStyle[firstPin], + marginTop: topClearance, + }; + } + if (lastPin && bottomClearance > 0) { + schPinStyle[lastPin] = { + ...schPinStyle[lastPin], + marginBottom: bottomClearance, + }; + } +}; + +/** + * Produce a readable default schematic box from imported TI pin labels. + * + * tscircuit fixes adjacent schematic-box pins at 0.2 mm. This helper therefore + * does not return the deprecated `schPinSpacing` prop. It adds only 0.2 mm + * margins between functional groups. + */ +export const getTiSchematicLayout = ( + pinLabels: Labels, + options: GetTiSchematicLayoutOptions> = {}, +): TiSchematicLayout> => { + type PinKey = Extract; + + const pins = ( + Object.entries(pinLabels) as Array<[PinKey, string | readonly string[]]> + ) + .map(([key, label]) => { + const labels = getLabels(label); + return { + key, + labels, + role: classifyPin(labels, options.pinRoles?.[key]), + } satisfies ClassifiedPin; + }) + .sort((left, right) => compareNatural(left.key, right.key)); + + const pinsByRole = (role: TiSchematicPinRole) => + pins.filter((pin) => pin.role === role); + + const inputs = pinsByRole("input"); + const controls = pinsByRole("control"); + const bidirectional = pinsByRole("bidirectional"); + const outputs = pinsByRole("output"); + const unknown = pinsByRole("unknown"); + const power = pinsByRole("power"); + const ground = pinsByRole("ground"); + const thermal = pinsByRole("thermal"); + const noConnectPins = pinsByRole("no-connect"); + + const leftUnknown: ClassifiedPin[] = []; + const rightUnknown: ClassifiedPin[] = []; + let leftCount = inputs.length + controls.length + bidirectional.length; + let rightCount = outputs.length; + + for (const pin of unknown) { + if (leftCount <= rightCount) { + leftUnknown.push(pin); + leftCount += 1; + } else { + rightUnknown.push(pin); + rightCount += 1; + } + } + + const schPinStyle: SchematicPinStyle = {}; + const leftGroups = [inputs, controls, bidirectional, leftUnknown]; + const rightGroups = [outputs, rightUnknown]; + const leftPins = addVerticalGroups(leftGroups, schPinStyle); + const rightPins = addVerticalGroups(rightGroups, schPinStyle); + const powerPins = power.map((pin) => pin.key); + const bottomPins = ground.concat(thermal).map((pin) => pin.key); + const topClearance = getSidePinEdgeClearance(power); + const bottomClearance = getSidePinEdgeClearance(ground.concat(thermal)); + addSidePinEdgeClearance(leftPins, schPinStyle, topClearance, bottomClearance); + addSidePinEdgeClearance( + rightPins, + schPinStyle, + topClearance, + bottomClearance, + ); + + const schPinArrangement: SchematicPinArrangement = {}; + if (leftPins.length > 0) { + schPinArrangement.leftSide = { + direction: "top-to-bottom", + pins: leftPins, + }; + } + if (rightPins.length > 0) { + schPinArrangement.rightSide = { + direction: "top-to-bottom", + pins: rightPins, + }; + } + if (powerPins.length > 0) { + schPinArrangement.topSide = { + direction: "left-to-right", + pins: powerPins, + }; + } + if (bottomPins.length > 0) { + schPinArrangement.bottomSide = { + direction: "left-to-right", + pins: bottomPins, + }; + } + + const nonEmptyLeftGroupCount = leftGroups.filter( + (group) => group.length > 0, + ).length; + const nonEmptyRightGroupCount = rightGroups.filter( + (group) => group.length > 0, + ).length; + const verticalPinSpan = Math.max( + leftPins.length > 0 + ? getPinSpan(leftPins.length, Math.max(0, nonEmptyLeftGroupCount - 1)) + + topClearance + + bottomClearance + : 0, + rightPins.length > 0 + ? getPinSpan(rightPins.length, Math.max(0, nonEmptyRightGroupCount - 1)) + + topClearance + + bottomClearance + : 0, + ); + const horizontalPinSpan = Math.max( + getPinSpan(powerPins.length), + getPinSpan(bottomPins.length), + ); + const sideLabelWidth = + getLongestLabelWidth(inputs.concat(controls, bidirectional, leftUnknown)) + + getLongestLabelWidth(outputs.concat(rightUnknown)) + + 0.6; + const topBottomLabelHeight = + getLongestLabelWidth(power) + + getLongestLabelWidth(ground.concat(thermal)) + + 0.6; + + return { + schPinArrangement, + schPinStyle, + schWidth: roundUpToGrid( + Math.max(1.6, horizontalPinSpan + BOX_PADDING_MM, sideLabelWidth), + ), + schHeight: roundUpToGrid( + Math.max(1.2, verticalPinSpan + BOX_PADDING_MM, topBottomLabelHeight), + ), + noConnect: noConnectPins.map((pin) => pin.key), + }; +}; diff --git a/lib/chips/index.tsx b/lib/chips/index.tsx index 6d07bc51..3cada2f4 100644 --- a/lib/chips/index.tsx +++ b/lib/chips/index.tsx @@ -51,9 +51,10 @@ export { HDC3022DEJR } from "./HDC3022DEJR.circuit.tsx"; export { INA237AQDGSRQ1 } from "./INA237AQDGSRQ1.circuit.tsx"; export { MSP430F5229IRGCR } from "./MSP430F5229IRGCR.circuit.tsx"; export { MSPM0G3507SPMR } from "./MSPM0G3507SPMR.circuit.tsx"; +export { TLC59116IPWR } from "./TLC59116IPWR.circuit.tsx"; export { TMP1075DSGR } from "./TMP1075DSGR.circuit.tsx"; +export { TPS61222DCKR } from "./TPS61222DCKR.circuit.tsx"; export { W25Q128JVSIQ } from "./W25Q128JVSIQ.circuit.tsx"; -export { TPS61299DRLR } from "./TPS61299DRLR.circuit.tsx"; export { TPS63802DLAR } from "./TPS63802DLAR.circuit.tsx"; export { TPS7A0230PDBVR } from "./TPS7A0230PDBVR.circuit.tsx"; export { TPS7A2018PDBVR } from "./TPS7A2018PDBVR.circuit.tsx"; @@ -62,3 +63,5 @@ export { TPS7A2033PDBVR } from "./TPS7A2033PDBVR.circuit.tsx"; export { TLV75533PDBVR } from "./TLV75533PDBVR.circuit.tsx"; export { TXB0104RGYR } from "./TXB0104RGYR.circuit.tsx"; export { TXS0102DCUR } from "./TXS0102DCUR.circuit.tsx"; + +export * from "./ti-sysblocks-components.tsx"; diff --git a/lib/chips/ti-official-footprint-catalog.json b/lib/chips/ti-official-footprint-catalog.json new file mode 100644 index 00000000..d2228af0 --- /dev/null +++ b/lib/chips/ti-official-footprint-catalog.json @@ -0,0 +1,2122 @@ +{ + "schemaVersion": 1, + "matchingRule": "Consume a footprint only when the target's audited exact TI drawing ID equals the drawing key. Never fall back to packageCode or pinCount.", + "coverage": { + "unmatchedTargets": 44, + "sourceReadyTargets": 44, + "unsupportedTargets": 0, + "supplementalTargetPinMaps": 18, + "uniqueDrawings": 38, + "sourceReadyDrawings": 38, + "unsupportedDrawings": 0 + }, + "drawings": { + "ABC0760A": { + "drawingId": "ABC0760A", + "status": "source-ready", + "manufacturerPartNumbers": ["AM5726BABCXA"], + "families": ["AM5726"], + "footprintPropSource": null, + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P", + "R", + "T", + "U", + "V", + "W", + "Y", + "AA", + "AB", + "AC", + "AD", + "AE", + "AF", + "AG", + "AH" + ], + "columnOrder": [ + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28 + ], + "pitchMm": 0.8, + "padShape": "circle", + "padDiameterMm": 0.4 + }, + "officialSourceUrl": "https://www.ti.com/lit/gpn/AM5726", + "officialSourcePages": [414, 415, 416], + "physicalPadToPortHint": {}, + "validationNotes": [ + "TI ABC0760A Example Board Layout: populated balls only on the official 28-row by 28-column coordinate system, 0.8 mm pitch, with 0.4 mm circular copper lands.", + "JEDEC row lettering intentionally skips I, O, Q, S, and X. Coordinate aliases are sorted in the declared physical order to produce deterministic pinN assignments." + ] + }, + "AMW0594A": { + "drawingId": "AMW0594A", + "status": "source-ready", + "manufacturerPartNumbers": ["AM67A74AKGHIAMWR"], + "families": ["AM67A"], + "footprintPropSource": null, + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P", + "R", + "T", + "U", + "V", + "W", + "Y", + "AA", + "AB", + "AC", + "AD", + "AE", + "AF", + "AG" + ], + "columnOrder": [ + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27 + ], + "pitchMm": 0.65, + "padShape": "circle", + "padDiameterMm": 0.35 + }, + "officialSourceUrl": "https://www.ti.com/lit/gpn/AM67A", + "officialSourcePages": [244, 245, 246], + "physicalPadToPortHint": {}, + "validationNotes": [ + "TI AMW0594A Example Board Layout: populated balls only on the official 27-row by 27-column coordinate system, 0.65 mm pitch, with 0.35 mm circular copper lands." + ] + }, + "AMY0101A": { + "drawingId": "AMY0101A", + "status": "source-ready", + "manufacturerPartNumbers": ["IWRL6432BRQAAMYR"], + "families": ["IWRL6432AOP"], + "footprintPropSource": null, + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N" + ], + "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], + "rowPitchMm": 0.5, + "columnPositionsMm": { + "1": -5.125, + "2": -4.625, + "3": -4.125, + "4": -3.625, + "5": -3.125, + "6": 3.125, + "7": 3.625, + "8": 4.125, + "9": 4.625, + "10": 5.125 + }, + "padShape": "circle", + "padDiameterMm": 0.25 + }, + "officialSourceUrl": "https://www.ti.com/lit/gpn/IWRL6432AOP", + "officialSourcePages": [72, 73, 74], + "physicalPadToPortHint": {}, + "validationNotes": [ + "TI AMY0101A Example Board Layout is on pages 72-74 of the current IWRL6432AOP datasheet: 101 populated 0.25 mm lands, 0.5 mm pitch within each left/right block, and the official antenna-array center gap.", + "The earlier enriched page metadata pointed to pages 67-68 and truncated the A revision; both are corrected here." + ] + }, + "DCA0048B": { + "drawingId": "DCA0048B", + "status": "source-ready", + "manufacturerPartNumbers": ["O3853QDCARQ1"], + "families": ["TPS653853-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS653853-Q1", + "officialSourcePages": [10], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "validationNotes": [ + "TI DCA0048B-C01 Example Board Layout: 48 x 1.5 mm by 0.3 mm, 0.5 mm pitch, 7.5 mm row span; exposed pad opening is 2.73 mm by 4.69 mm.", + "Optional thermal vias and solder-mask-covered copper outside the exposed pad are intentionally omitted from the component footprint." + ] + }, + "DEH0008A": { + "drawingId": "DEH0008A", + "status": "source-ready", + "manufacturerPartNumbers": ["HDC3021QDEHRQ1"], + "families": ["HDC3021-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/HDC3021-Q1", + "officialSourcePages": [44], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9" + }, + "validationNotes": [ + "TI DEH0008A-C01 Example Board Layout: eight 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 2.3 mm row span, and 1.2 mm by 1.9 mm exposed pad 9." + ] + }, + "DGS0032A": { + "drawingId": "DGS0032A", + "status": "source-ready", + "manufacturerPartNumbers": ["TXE8124DGSR"], + "families": ["TXE8124"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TXE8124", + "officialSourcePages": [63], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32" + }, + "validationNotes": [ + "TI DGS0032A Example Board Layout: 32 x 1.45 mm by 0.3 mm pads, 0.5 mm pitch, 4.4 mm row span." + ] + }, + "DLF0006B": { + "drawingId": "DLF0006B", + "status": "source-ready", + "manufacturerPartNumbers": ["LMK6DA10000ADLFR"], + "families": ["LMK6D"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/LMK6D", + "officialSourcePages": [64], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6" + }, + "validationNotes": [ + "Current LMK6D datasheet shows DLF0006B (not enriched-image DLF0006A): six 0.9 mm by 0.4 mm pads on the dedicated land pattern.", + "The dedicated DLF0006B pattern is used instead of the wider universal land-pattern alternative on the same page." + ] + }, + "DPL0002A": { + "drawingId": "DPL0002A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPD1E0B04DPLT"], + "families": ["TPD1E0B04"], + "footprintPropSource": "footprint=\"0201\"", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPD1E0B04", + "officialSourcePages": [], + "physicalPadToPortHint": {}, + "validationNotes": [ + "The current TPD1E0B04 datasheet omits the DPL land-pattern page, but TI identifies DPL as the 0.6 mm by 0.3 mm 0201/X2SON package. The user-authorized visual/package-family fallback is tscircuit's 0201 footprint.", + "This entry is explicitly a package-family fallback, not a claim that an exact TI DPL0002A Example Board Layout was available." + ] + }, + "DRR0012G": { + "drawingId": "DRR0012G", + "status": "source-ready", + "manufacturerPartNumbers": ["TLC69699DRRR"], + "families": ["TLC69699"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TLC69699", + "officialSourcePages": [22], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "Exposed Pad": "pin13" + }, + "validationNotes": [ + "TI DRR0012G Example Board Layout: twelve 0.62 mm by 0.25 mm pads, 0.5 mm pitch, 2.78 mm row span, and 1.3 mm by 2.5 mm exposed pad 13." + ] + }, + "FQD-2510852": { + "drawingId": "FQD-2510852", + "status": "source-ready", + "manufacturerPartNumbers": ["DLP4500AFQD"], + "families": ["DLP4500"], + "footprintPropSource": null, + "coordinateGrid": { + "rowOrder": ["A", "B", "C", "D", "E", "F", "G", "H", "J", "K"], + "columnOrder": [1, 2, 3, 4, 5, 18, 19, 20, 21, 22], + "rowAxis": "x", + "rowPitchMm": 0.742, + "columnPositionsMm": { + "1": -6.307, + "2": -5.565, + "3": -4.823, + "4": -4.081, + "5": -3.339, + "18": 3.339, + "19": 4.081, + "20": 4.823, + "21": 5.565, + "22": 6.307 + }, + "padShape": "rect", + "padWidthMm": 0.6, + "padHeightMm": 0.6 + }, + "officialSourceUrl": "https://www.ti.com/lit/gpn/DLP4500", + "officialSourcePages": [50, 51, 52], + "physicalPadToPortHint": {}, + "validationNotes": [ + "TI DLP4500 mechanical ICD 2510852 defines 80 LGA terminals plus 18 test pads: 98 populated 0.6 mm square lands on a 0.742 mm coordinate pitch.", + "Only aliases present in TI's official 98-position pin table are emitted; unpopulated K5 and K18 are intentionally absent.", + "This is the exact custom optical-package copper map; optical alignment, window, keepout, and assembly constraints remain governed by ICD 2510852." + ] + }, + "MBB0030A": { + "drawingId": "MBB0030A", + "status": "source-ready", + "manufacturerPartNumbers": ["XI6432BAFCLIMBBR"], + "families": ["IWRL6432WMOD"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/IWRL6432WMOD", + "officialSourcePages": [30, 31, 32], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30" + }, + "validationNotes": [ + "TI MBB0030A Example Board Layout transcribed pad-by-pad: 30 square 0.7 mm lands across four asymmetric columns at x = -5.7, -1.9, 1.9, and 5.7 mm.", + "The official 3.4 mm row pitch and all omitted inner-column positions are preserved; no generic module grid is substituted." + ] + }, + "MHA0024A": { + "drawingId": "MHA0024A", + "status": "source-ready", + "manufacturerPartNumbers": ["CC2340R5MODAN0MHAR"], + "families": ["CC2340R5MODA"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/CC2340R5MODA", + "officialSourcePages": [64], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24" + }, + "validationNotes": [ + "TI MHA0024A Example Board Layout was transcribed explicitly: left pins 1-9 at 1 mm pitch, bottom pins 10-15 at 1 mm pitch, and right pins 16-24 at 1 mm pitch.", + "All 24 copper lands are 1.1 mm by 0.6 mm. The asymmetric y coordinates preserve TI's antenna-side clearance." + ] + }, + "MOZ0065A": { + "drawingId": "MOZ0065A", + "status": "source-ready", + "manufacturerPartNumbers": [ + "CC3300MODENIAMOZR", + "CC3301MODENIAMOZR", + "CC3350MODENIAMOZR", + "CC3351MODENIAMOZR" + ], + "families": ["CC3300MOD", "CC3301MOD", "CC3350MOD", "CC3351MOD"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/CC3300MOD", + "officialSourcePages": [32], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57", + "58": "pin58", + "59": "pin59", + "60": "pin60", + "61": "pin61", + "62": "pin62", + "63": "pin63", + "64": "pin64", + "65": "pin65" + }, + "validationNotes": [ + "TI MOZ0065A Example Board Layout transcribed explicitly: 56 perimeter lands with 0.65 mm regular pitch and 1.1 mm corner gaps, plus the offset 3 by 3 matrix of 1 mm square lands 57-65.", + "The four corner lands are 0.5 mm square; the remaining perimeter lands are 0.5 mm by 0.3 mm. The central matrix offsets are retained from the official package centerlines." + ] + }, + "PAP0064N": { + "drawingId": "PAP0064N", + "status": "source-ready", + "manufacturerPartNumbers": ["DRV3256EPAPRQ1"], + "families": ["DRV3256-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/DRV3256-Q1", + "officialSourcePages": [16], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57", + "58": "pin58", + "59": "pin59", + "60": "pin60", + "61": "pin61", + "62": "pin62", + "63": "pin63", + "64": "pin64", + "Exposed Pad": "pin65" + }, + "validationNotes": [ + "Current DRV3256-Q1 mechanical pages identify PAP0064N, not enriched-image PAP0064A.", + "TI PAP0064N Example Board Layout: 64 x 1.5 mm by 0.3 mm pads, 0.5 mm pitch, 11.4 mm spans, and a 5.3 mm square exposed opening." + ] + }, + "PHP0048L": { + "drawingId": "PHP0048L", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS92761QPHPRQ1"], + "families": ["TPS92761-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS92761-Q1", + "officialSourcePages": [9], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "validationNotes": [ + "TI PHP0048L Example Board Layout: 48 x 1.6 mm by 0.3 mm pads, 0.5 mm pitch, 8.5 mm spans, and 5 mm square exposed pad 49." + ] + }, + "PZ0100A": { + "drawingId": "PZ0100A", + "status": "source-ready", + "manufacturerPartNumbers": ["XM33C321ASPZR"], + "families": ["MSPM33C321A"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/MSPM33C321A", + "officialSourcePages": [111], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57", + "58": "pin58", + "59": "pin59", + "60": "pin60", + "61": "pin61", + "62": "pin62", + "63": "pin63", + "64": "pin64", + "65": "pin65", + "66": "pin66", + "67": "pin67", + "68": "pin68", + "69": "pin69", + "70": "pin70", + "71": "pin71", + "72": "pin72", + "73": "pin73", + "74": "pin74", + "75": "pin75", + "76": "pin76", + "77": "pin77", + "78": "pin78", + "79": "pin79", + "80": "pin80", + "81": "pin81", + "82": "pin82", + "83": "pin83", + "84": "pin84", + "85": "pin85", + "86": "pin86", + "87": "pin87", + "88": "pin88", + "89": "pin89", + "90": "pin90", + "91": "pin91", + "92": "pin92", + "93": "pin93", + "94": "pin94", + "95": "pin95", + "96": "pin96", + "97": "pin97", + "98": "pin98", + "99": "pin99", + "100": "pin100" + }, + "validationNotes": [ + "TI PZ0100A Example Board Layout: 100 x 1.5 mm by 0.3 mm pads, 0.5 mm pitch, 15.4 mm spans." + ] + }, + "RAA0004A": { + "drawingId": "RAA0004A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS22991CNRAAR"], + "families": ["TPS22991"], + "footprintPropSource": "footprint={\n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS22991", + "officialSourcePages": [26], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4" + }, + "validationNotes": [ + "TI RAA0004A Example Board Layout transcribed explicitly: four 0.475 mm by 0.2 mm pads, 0.675 mm x center span, and 0.4 mm y center span." + ] + }, + "RAH0036A": { + "drawingId": "RAH0036A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS6522430RAHRQ1"], + "families": ["TPS65224-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS65224-Q1", + "officialSourcePages": [11], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36" + }, + "validationNotes": [ + "TI RAH0036A Example Board Layout transcribed pad-by-pad: 32 nonuniform perimeter lands, four compound corner lands, and the shared central horizontal copper represented as two touching polygon regions for physical pins 5 and 23.", + "Optional thermal vias are omitted. Copper dimensions and polygon vertices were cross-checked against the TI-supplied package CAD preview; no uniform VQFN substitution is used." + ] + }, + "RDG0025A": { + "drawingId": "RDG0025A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPSM8A29RDGR"], + "families": ["TPSM8A29"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPSM8A29", + "officialSourcePages": [43], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25" + }, + "validationNotes": [ + "TI RDG0025A Example Board Layout transcribed as 20 nonuniform perimeter lands and five separately dimensioned central power lands.", + "Optional thermal vias are omitted. The exact centers and copper sizes were cross-checked against the TI-supplied package CAD preview." + ] + }, + "RDX0007A": { + "drawingId": "RDX0007A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPSM863252RDXR"], + "families": ["TPSM863252"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPSM863252", + "officialSourcePages": [29], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7" + }, + "validationNotes": [ + "TI RDX0007A QFN-FCMOD Example Board Layout transcribed with the two asymmetric upper polygon lands, two 1.5 mm by 2.3 mm power lands, and three 0.22 mm by 0.6 mm signal lands.", + "The central red region in the TI drawing is a copper keepout, not a terminal, and optional vias are intentionally omitted. Polygon vertices were cross-checked against the TI-supplied package CAD preview." + ] + }, + "REQ0038A": { + "drawingId": "REQ0038A", + "status": "source-ready", + "manufacturerPartNumbers": ["LMG3612REQR"], + "families": ["LMG3612"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/LMG3612", + "officialSourcePages": [26], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39" + }, + "validationNotes": [ + "TI REQ0038A Example Board Layout transcribed pad-by-pad: nonuniform 38-pad perimeter, asymmetric top/bottom groups, and 2.1 mm by 6.6 mm package pad 39 centered at x = 0.9 mm.", + "Optional 0.2 mm thermal vias shown inside pad 39 are intentionally omitted from the component footprint." + ] + }, + "REZ0012A": { + "drawingId": "REZ0012A", + "status": "source-ready", + "manufacturerPartNumbers": ["UCG28828-1REZR"], + "families": ["UCG28828"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/UCG28828", + "officialSourcePages": [41, 42], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12" + }, + "validationNotes": [ + "TI REZ0012A drawing 4230527/B was transcribed terminal-by-terminal: compound lower-left pin 1, five-finger upper-left pin 2, five conventional bottom lands 3-7, rounded corner land 8, right-side lands 9-11, and the exact top/right/central thermal polygon for pin 12.", + "Pin-12 polygon vertices were extracted from TI's vector Example Board Layout and normalized to the package centerline; pin-1/pin-2 detail shapes were mirrored into their physical package-outline positions. The special pin-8 land follows the official 0.55 mm by 0.575 mm envelope with R0.1 approximated by an eight-vertex chamfer.", + "Optional 0.2 mm thermal vias and solder-mask/paste geometry are intentionally omitted from the component copper footprint." + ] + }, + "RGY0024E": { + "drawingId": "RGY0024E", + "status": "source-ready", + "manufacturerPartNumbers": ["TXV0108QWRGYRQ1"], + "families": ["TXV0108-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TXV0108-Q1", + "officialSourcePages": [30], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "Thermal Pad": "pin25" + }, + "validationNotes": [ + "TI RGY0024E Example Board Layout transcribed explicitly: ten pads on each vertical side, two top pads, two bottom pads, and 2.1 mm by 4.1 mm thermal pad 25.", + "This corrects package-drawing PDF metadata that truncates the exact revision to RGY0024." + ] + }, + "RGZ0048M": { + "drawingId": "RGZ0048M", + "status": "source-ready", + "manufacturerPartNumbers": ["DRV8363QRGZRQ1"], + "families": ["DRV8363-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/DRV8363-Q1", + "officialSourcePages": [101], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "validationNotes": [ + "The selected automotive OPN DRV8363QRGZRQ1 is followed by RGZ0048M in the production package section; RGZ0048N belongs the catalog/preproduction section. The enriched image's RGZ0048P is not present in the current datasheet.", + "TI RGZ0048M Example Board Layout: 48 x 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 6.8 mm spans, and 5.6 mm square exposed pad 49." + ] + }, + "RHA0040T": { + "drawingId": "RHA0040T", + "status": "source-ready", + "manufacturerPartNumbers": ["CC2755P105E0WRHAR", "CC2755P207E0WRHAR"], + "families": ["CC2755P10", "CC2755P20"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/CC2755P10", + "officialSourcePages": [91], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41" + }, + "validationNotes": [ + "TI RHA0040T Example Board Layout: 40 x 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 5.8 mm spans, and 4.7 mm square exposed pad 41." + ] + }, + "RPS0012A": { + "drawingId": "RPS0012A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS7A5301BRPSR"], + "families": ["TPS7A53B"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS7A53B", + "officialSourcePages": [41], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12" + }, + "validationNotes": [ + "TI RPS0012A Example Board Layout transcribed with the four exact L-shaped high-current corner lands and the eight individually dimensioned rectangular lands.", + "The L-pad polygon extents, 0.5 mm vertical pitch, and asymmetric pin-6/pin-12 lengths follow TI drawing 4224847/A; no uniform VQFN substitution is used." + ] + }, + "RSH0056G": { + "drawingId": "RSH0056G", + "status": "source-ready", + "manufacturerPartNumbers": ["CC3501ENJARSHR", "CC3551ENJARSHR"], + "families": ["CC3501E", "CC3551E"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/CC3501E", + "officialSourcePages": [60], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57" + }, + "validationNotes": [ + "TI RSH0056G Example Board Layout: 56 x 0.75 mm by 0.2 mm pads, 0.4 mm pitch, 6.65 mm spans, and 5.3 mm square exposed pad 57." + ] + }, + "RSN0032D": { + "drawingId": "RSN0032D", + "status": "source-ready", + "manufacturerPartNumbers": ["TLC69624QRSNRQ1", "TLC69634QRSNRQ1"], + "families": ["TLC69624-Q1", "TLC69634-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TLC69624-Q1", + "officialSourcePages": [18], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33" + }, + "validationNotes": [ + "TI RSN0032D Example Board Layout: 32 x 0.55 mm by 0.2 mm pads, 0.4 mm pitch, 3.85 mm spans, and 2.8 mm square exposed pad 33." + ] + }, + "RUG0010B": { + "drawingId": "RUG0010B", + "status": "source-ready", + "manufacturerPartNumbers": ["TLV9022L1RUGR"], + "families": ["TLV9022L"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TLV9022L", + "officialSourcePages": [35], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10" + }, + "validationNotes": [ + "TI RUG0010B X2QFN Example Board Layout transcribed explicitly. Side pads use 0.5 mm pitch and the two end pads are rotated 0.3 mm by 0.6 mm lands." + ] + }, + "RUV0036A": { + "drawingId": "RUV0036A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS24750RUVR"], + "families": ["TPS24750"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS24750", + "officialSourcePages": [44, 45, 46], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "Pad-1": "pin4", + "Pad-2": "pin5" + }, + "validationNotes": [ + "TI RUV0036A land-pattern data: 36 perimeter lands at 0.5 mm pitch, 6.8 mm by 3.3 mm outer spans, 0.24 mm tangential copper width, and two nonuniform 2.25 mm-high thermal lands.", + "Physical Pad-1 (drawing pad 37) is tied to GND and intentionally port-hinted to pin4; physical Pad-2 (drawing pad 38) is tied to DRAIN and intentionally port-hinted to pin5, matching the TPS24750 package notes.", + "Optional thermal vias and stencil segmentation are omitted from the component copper footprint." + ] + }, + "RVR0019A": { + "drawingId": "RVR0019A", + "status": "source-ready", + "manufacturerPartNumbers": ["LMG1210RVRR"], + "families": ["LMG1210"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/LMG1210", + "officialSourcePages": [24], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21" + }, + "validationNotes": [ + "TI RVR0019A Example Board Layout transcribed exactly: 19 perimeter lands, the intentional gaps in the top/bottom sequences, 1.2 mm by 1.7 mm thermal pad 20, and 0.75 mm by 1.7 mm thermal pad 21.", + "Although the package name counts 19 perimeter pins, the official LMG1210 pin table exposes thermal pads 20 and 21 as physical terminals; both are mapped to pin20 and pin21." + ] + }, + "VAF0024A": { + "drawingId": "VAF0024A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS6521401VAFR"], + "families": ["TPS65214"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS65214", + "officialSourcePages": [139], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24" + }, + "validationNotes": [ + "TI VAF0024A Example Board Layout transcribed with all four L-shaped corner lands, 18 conventional perimeter lands, and the central continuous PGND cross.", + "The continuous PGND copper is partitioned at its symmetry line into touching pin10 and pin22 polygon regions so both official physical terminals remain addressable by the schematic while preserving the TI copper envelope." + ] + }, + "VAH0011A": { + "drawingId": "VAH0011A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS1HC03PQVAHRQ1"], + "families": ["TPS1HC03-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS1HC03-Q1", + "officialSourcePages": [71], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "validationNotes": [ + "TI VAH0011A Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", + "VAH0011A's wider 0.8 mm side lands and 0.7 mm bottom lands are retained; it is not substituted with the B or C revision." + ] + }, + "VAH0011B": { + "drawingId": "VAH0011B", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS2HC16PQVAHRQ1"], + "families": ["TPS2HC16-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS2HC16-Q1", + "officialSourcePages": [72], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "validationNotes": [ + "TI VAH0011B Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", + "Copper vertices and centers were cross-checked against the TI-supplied VAH0011B CAD preview; optional vias are omitted." + ] + }, + "VAH0011C": { + "drawingId": "VAH0011C", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS2HC08PQVAHRQ1"], + "families": ["TPS2HC08-Q1"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS2HC08-Q1", + "officialSourcePages": [74], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "validationNotes": [ + "TI VAH0011C Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", + "The C revision's 0.7 mm outer side and bottom lands are retained and were cross-checked against the TI-supplied VAH0011C CAD preview; optional vias are omitted." + ] + }, + "YFF0012": { + "drawingId": "YFF0012", + "status": "source-ready", + "manufacturerPartNumbers": ["LM3644YFFR"], + "families": ["LM3644"], + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/LM3644", + "officialSourcePages": [40], + "physicalPadToPortHint": { + "A1": "pin1", + "A2": "pin2", + "A3": "pin3", + "B1": "pin4", + "B2": "pin5", + "B3": "pin6", + "C1": "pin7", + "C2": "pin8", + "C3": "pin9", + "D1": "pin10", + "D2": "pin11", + "D3": "pin12" + }, + "validationNotes": [ + "TI YFF0012 Example Board Layout: complete A-D by 1-3 DSBGA grid, 0.4 mm pitch, 0.23 mm circular copper lands.", + "Physical ball identifiers map row-major to the materializer's pin1-pin12 convention: A1-A3, B1-B3, C1-C3, D1-D3." + ] + }, + "YJK0003A": { + "drawingId": "YJK0003A", + "status": "source-ready", + "manufacturerPartNumbers": ["CSD18541F5T"], + "families": ["CSD18541F5"], + "footprintPropSource": "footprint={\n \n \n \n }", + "officialSourceUrl": "https://www.ti.com/lit/gpn/CSD18541F5", + "officialSourcePages": [14], + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3" + }, + "validationNotes": [ + "TI YJK0003A Example Board Layout: three 0.39 mm by 0.15 mm lands on 0.25 mm center spacing (0.5 mm pin-1 to pin-3 span)." + ] + }, + "ZCH0139A": { + "drawingId": "ZCH0139A", + "status": "source-ready", + "manufacturerPartNumbers": ["TPS65930A2ZCHR"], + "families": ["TPS65930"], + "footprintPropSource": null, + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P" + ], + "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14], + "pitchMm": 0.65, + "padShape": "circle", + "padDiameterMm": 0.35 + }, + "officialSourceUrl": "https://www.ti.com/packaging/tw/docs/searchproductbypackage.tsp?orderablePartNumber=&packageDesignator=ZCH&pinCount=139&results=results", + "officialSourcePages": [], + "physicalPadToPortHint": {}, + "validationNotes": [ + "TI's package database identifies ZCH as a 139-position, 10 mm by 10 mm NFBGA on 0.65 mm pitch. The official TPS65930 pin table supplies the exact 139 populated A-P/1-14 aliases.", + "Only populated aliases from the official pin table are rendered; the 14 by 14 bounding grid is not filled generically. The 0.35 mm circular land is cross-checked against the TI-supplied ZCH139 CAD preview." + ] + } + }, + "targets": { + "AM5726BABCXA": { + "drawingId": "ABC0760A", + "status": "source-ready" + }, + "AM67A74AKGHIAMWR": { + "drawingId": "AMW0594A", + "status": "source-ready" + }, + "CC2340R21N0RGER": { + "drawingId": "RGE0024B", + "status": "source-ready", + "physicalPadToPortHint": { + "25": "pin25" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "25", + "name": "THERMAL_PAD", + "type": "GND", + "description": "Exposed thermal and RF ground pad; connect to the PCB ground plane." + } + ], + "validationNotes": [ + "CC2340R2 RGE0024B mechanical pages 71 and 73 number the exposed thermal pad 25; TI E2E support confirms the thermal pad also acts as IC/RF ground." + ] + }, + "CC2340R5MODAN0MHAR": { + "drawingId": "MHA0024A", + "status": "source-ready" + }, + "CC2531F128RHAR": { + "drawingId": "RHA0040H", + "status": "source-ready", + "physicalPadToPortHint": { + "41": "pin41" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "41", + "name": "GND", + "type": "Ground", + "description": "Exposed ground pad; the chip ground connection. Connect to a solid ground plane." + } + ], + "validationNotes": [ + "CC2531-RF4CE page 16 defines the exposed pad as the chip GND connection; RHA0040H mechanical pages 34-36 number it 41." + ] + }, + "CC2755P105E0WRHAR": { + "drawingId": "RHA0040T", + "status": "source-ready", + "physicalPadToPortHint": { + "41": "pin41" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "41", + "name": "EGP", + "type": "GND", + "description": "Ground exposed pad; this is the device's only ground connection." + } + ], + "validationNotes": [ + "CC2755P10 page 11 names EGP as the only device ground; the RHA0040T drawing on page 92 numbers the exposed pad 41." + ] + }, + "CC2755P207E0WRHAR": { + "drawingId": "RHA0040T", + "status": "source-ready", + "physicalPadToPortHint": { + "41": "pin41" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "41", + "name": "EGP", + "type": "GND", + "description": "Ground exposed pad; this is the device's only ground connection." + } + ], + "validationNotes": [ + "CC2755P20 page 9 names EGP as the only device ground; the RHA0040T drawing on page 70 numbers the exposed pad 41." + ] + }, + "CC3300MODENIAMOZR": { + "drawingId": "MOZ0065A", + "status": "source-ready" + }, + "CC3301MODENIAMOZR": { + "drawingId": "MOZ0065A", + "status": "source-ready" + }, + "CC3350MODENIAMOZR": { + "drawingId": "MOZ0065A", + "status": "source-ready" + }, + "CC3351MODENIAMOZR": { + "drawingId": "MOZ0065A", + "status": "source-ready" + }, + "CC3501ENJARSHR": { + "drawingId": "RSH0056G", + "status": "source-ready", + "physicalPadToPortHint": { + "57": "pin57" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "57", + "name": "EP/THERMAL_PAD", + "type": "GND", + "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." + } + ], + "validationNotes": [ + "CC3501E reference schematic page 50 ties EP/Thermal_Pad 57 to GND; RSH0056G page 61 numbers the exposed pad 57." + ] + }, + "CC3551ENJARSHR": { + "drawingId": "RSH0056G", + "status": "source-ready", + "physicalPadToPortHint": { + "57": "pin57" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "57", + "name": "EP/THERMAL_PAD", + "type": "GND", + "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." + } + ], + "validationNotes": [ + "CC3551E reference schematic page 49 ties EP/Thermal_Pad 57 to GND; RSH0056G page 62 numbers the exposed pad 57." + ] + }, + "CSD18531Q5AT": { + "drawingId": "DQJ0008A", + "status": "source-ready", + "physicalPadToPortHint": { + "9": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "9", + "name": "D", + "type": "Power", + "description": "Exposed power pad electrically connected to the MOSFET drain." + } + ], + "validationNotes": [ + "CSD18531Q5A page 1 marks the center exposed metal as drain D; DQJ0008A page 9 numbers that contact 9." + ] + }, + "CSD18541F5T": { + "drawingId": "YJK0003A", + "status": "source-ready" + }, + "DAC43701DSGR": { + "drawingId": "DSG0008A", + "status": "source-ready", + "physicalPadToPortHint": { + "9": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "9", + "name": "EP", + "type": "Ground", + "description": "Exposed pad tied to the AGND/VSS ground node." + } + ], + "validationNotes": [ + "DAC43701 DSG0008A pages 56-58 number exposed pad 9; TI DACx3701 EVM guide SLAU841A page 14 ties EP 9 directly to ground." + ] + }, + "DLP4500AFQD": { + "drawingId": "FQD-2510852", + "status": "source-ready" + }, + "DP83826AERHBR": { + "drawingId": "RHB0032M", + "status": "source-ready", + "physicalPadToPortHint": { + "33": "pin33" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "33", + "name": "THERMAL_PAD", + "type": "Ground", + "description": "Thermal pad; connect to GND." + } + ], + "validationNotes": [ + "DP83826AE pages 4 and 7 name the Thermal Pad and require GND; RHB0032M pages 109-111 number the center pad 33." + ] + }, + "DRV3256EPAPRQ1": { + "drawingId": "PAP0064N", + "status": "source-ready" + }, + "DRV8363QRGZRQ1": { + "drawingId": "RGZ0048M", + "status": "source-ready", + "physicalPadToPortHint": { + "49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "49", + "name": "THERMAL_PAD", + "type": "Thermal", + "description": "Used for thermal dissipation, not electrical grounding; has a high-impedance connection to GND and AGND." + } + ], + "validationNotes": [ + "DRV8363-Q1 page 3 names the Thermal Pad and RGZ0048M page 92 numbers it 49; page 86 explicitly says it is not electrical ground." + ] + }, + "HDC3021QDEHRQ1": { + "drawingId": "DEH0008A", + "status": "source-ready" + }, + "IWRL6432BRQAAMYR": { + "drawingId": "AMY0101A", + "status": "source-ready" + }, + "LM111733QKVURQ1": { + "drawingId": "KVU0003A", + "status": "source-ready", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "Tab": "pin2" + }, + "ignoredPhysicalPins": [], + "validationNotes": [ + "Official LM1117-Q1 pin table identifies both physical lead 2 and the package Tab as OUT; both intentionally map to pin2." + ] + }, + "LM3644YFFR": { + "drawingId": "YFF0012", + "status": "source-ready" + }, + "LMG1210RVRR": { + "drawingId": "RVR0019A", + "status": "source-ready" + }, + "LMG3612REQR": { + "drawingId": "REQ0038A", + "status": "source-ready", + "physicalPadToPortHint": { + "39": "pin39" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "39", + "name": "PAD/S", + "type": "Power", + "description": "Thermal power pad internally connected to S, AGND, and NC2; PAD equals S and may conduct all source current." + } + ], + "validationNotes": [ + "LMG3612 page 4 defines PAD=S and permits all source current through it; REQ0038A page 27 numbers the exposed pad 39." + ] + }, + "LMK6DA10000ADLFR": { + "drawingId": "DLF0006B", + "status": "source-ready" + }, + "MSP430FR5969IRGZR": { + "drawingId": "RGZ0048B", + "status": "source-ready", + "physicalPadToPortHint": { + "Pad": "pin49" + }, + "ignoredPhysicalPins": [], + "validationNotes": [ + "The official pin table names the exposed QFN terminal Pad; the exact RGZ0048B footprint donor identifies that same copper as pin49." + ] + }, + "O3853QDCARQ1": { + "drawingId": "DCA0048B", + "status": "source-ready" + }, + "PTLIN821DRBRQ1": { + "drawingId": "DRB0008J", + "status": "source-ready", + "physicalPadToPortHint": { + "9": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "9", + "name": "THERMAL_PAD", + "type": "GND", + "description": "Thermal pad electrically connected to GND; connect to PCB ground." + } + ], + "validationNotes": [ + "TLIN821-Q1 page 3 defines the Thermal Pad as electrically connected to GND; DRB0008J pages 30-31 number it 9." + ] + }, + "SN74LVC1G04YZPR": { + "drawingId": "YZP0005", + "status": "source-ready", + "physicalPadToPortHint": { + "C2": "pin1", + "B1": "pin2", + "C1": "pin3", + "A1": "pin4", + "A2": "pin5" + }, + "ignoredPhysicalPins": ["B2"], + "validationNotes": [ + "Exact YZP0005 copper has five populated balls: C2, B1, C1, A1, and A2. TI's function table also lists coordinate B2 as NC, but that coordinate is unpopulated in the five-ball package and is intentionally ignored." + ] + }, + "TLC69624QRSNRQ1": { + "drawingId": "RSN0032D", + "status": "source-ready" + }, + "TLC69634QRSNRQ1": { + "drawingId": "RSN0032D", + "status": "source-ready" + }, + "TLC69699DRRR": { + "drawingId": "DRR0012G", + "status": "source-ready", + "physicalPadToPortHint": { + "13": "pin13" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "13", + "name": "NC3", + "type": "NC", + "description": "Exposed pad with no connection; electrically isolate from every signal except Ground." + } + ], + "validationNotes": [ + "TLC69699 page 3 defines NC3 as the exposed no-connect pad; DRR0012G page 12 numbers it 13." + ] + }, + "TLV9022L1RUGR": { + "drawingId": "RUG0010B", + "status": "source-ready" + }, + "TPD1E0B04DPLT": { + "drawingId": "DPL0002A", + "status": "source-ready" + }, + "TPS1HC03PQVAHRQ1": { + "drawingId": "VAH0011A", + "status": "source-ready" + }, + "TPS22991CNRAAR": { + "drawingId": "RAA0004A", + "status": "source-ready" + }, + "TPS24750RUVR": { + "drawingId": "RUV0036A", + "status": "source-ready" + }, + "TPS2HC08PQVAHRQ1": { + "drawingId": "VAH0011C", + "status": "source-ready" + }, + "TPS2HC16PQVAHRQ1": { + "drawingId": "VAH0011B", + "status": "source-ready" + }, + "TPS6521401VAFR": { + "drawingId": "VAF0024A", + "status": "source-ready" + }, + "TPS6522430RAHRQ1": { + "drawingId": "RAH0036A", + "status": "source-ready" + }, + "TPS65930A2ZCHR": { + "drawingId": "ZCH0139A", + "status": "source-ready" + }, + "TPS7A5301BRPSR": { + "drawingId": "RPS0012A", + "status": "source-ready" + }, + "TPS7E7101DBVR": { + "drawingId": "DBV0005A", + "status": "source-ready", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5" + }, + "ignoredPhysicalPins": ["Thermal pad"], + "validationNotes": [ + "The TI HTML table's Thermal pad row belongs to the alternate DRV package. DBV0005A and TPS7E71 Figure 7-11 contain only SOT-23 pads 1-5; ignore that row for TPS7E7101DBVR." + ] + }, + "TPS92761QPHPRQ1": { + "drawingId": "PHP0048L", + "status": "source-ready" + }, + "TPSM863252RDXR": { + "drawingId": "RDX0007A", + "status": "source-ready" + }, + "TPSM8A29RDGR": { + "drawingId": "RDG0025A", + "status": "source-ready" + }, + "TXE8124DGSR": { + "drawingId": "DGS0032A", + "status": "source-ready" + }, + "TXV0108QWRGYRQ1": { + "drawingId": "RGY0024E", + "status": "source-ready" + }, + "UCG28828-1REZR": { + "drawingId": "REZ0012A", + "status": "source-ready" + }, + "XI6432BAFCLIMBBR": { + "drawingId": "MBB0030A", + "status": "source-ready" + }, + "XM33C321ASPZR": { + "drawingId": "PZ0100A", + "status": "source-ready" + }, + "XMSPM0G1218SRGZR": { + "drawingId": "RGZ0048B", + "status": "source-ready", + "physicalPadToPortHint": { + "49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "49", + "name": "QFN_PAD/THERMAL_PAD", + "type": "GND", + "description": "QFN exposed thermal pad; TI recommends connection to VSS and a continuous ground plane." + } + ], + "validationNotes": [ + "MSPM0G1218 page 13 and RGZ0048B page 102 identify Thermal Pad 49; MSPM0G1107's same-platform RGZ48 table recommends VSS and TI application note SLAAE76E routes it to ground." + ] + } + } +} diff --git a/lib/chips/ti-sysblocks-chip-catalog.json b/lib/chips/ti-sysblocks-chip-catalog.json new file mode 100644 index 00000000..89a24e33 --- /dev/null +++ b/lib/chips/ti-sysblocks-chip-catalog.json @@ -0,0 +1,13627 @@ +[ + { + "family": "74ACT16244", + "exportName": "TI_74ACT16244", + "description": "16-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs", + "tiProductUrl": "https://www.ti.com/product/74ACT16244", + "datasheetUrl": "https://www.ti.com/lit/gpn/74ACT16244", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "ti-datasheet", + "manufacturerPartNumber": "74ACT16244DGGR", + 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"BQ32000", + "description": "Serial real-time clock (RTC) with battery backup and trickle charge", + "tiProductUrl": "https://www.ti.com/product/BQ32000", + "datasheetUrl": "https://www.ti.com/lit/gpn/BQ32000", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "BQ32000DR", + "componentExportName": "BQ32000DR", + "lcscPartNumber": "C52495", + "package": "SOP-8", + "stockAtSelection": 1126, + "packageCode": "D", + "pinCount": 8, + "packageDrawing": "D0008A" + }, + { + "family": "BQ51003", + "exportName": "BQ51003", + "description": "BQ51003 Wireless power Receiver", + "tiProductUrl": "https://www.ti.com/product/BQ51003", + "datasheetUrl": "https://www.ti.com/lit/gpn/BQ51003", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "BQ51003YFPR", + "componentExportName": "BQ51003YFPR", + "lcscPartNumber": "C134093", + "package": "DSBGA-28", + "stockAtSelection": 204, + "packageCode": "YFP", + "pinCount": 28, + "packageDrawing": "YFP0028" + }, + { + "family": "BQ51013C", + "exportName": "BQ51013C", + "description": "WPC 1.3 compatible fully integrated wireless power receiver IC", + "tiProductUrl": "https://www.ti.com/product/BQ51013C", + "datasheetUrl": "https://www.ti.com/lit/gpn/BQ51013C", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "BQ51013CRHLR", + "componentExportName": "BQ51013CRHLR", + "lcscPartNumber": "C43043533", + "package": "VQFN-20(3.5x4.5)", + "stockAtSelection": 453, + "packageCode": "RHL", + "pinCount": 20, + "packageDrawing": "RHL0020A" + }, + { + "family": "CC1101", + "exportName": "CC1101", + "description": "Low-power Sub-1 GHz wireless transceiver", + "tiProductUrl": "https://www.ti.com/product/CC1101", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1101", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1101RGPR", + "componentExportName": "CC1101RGPR", + "lcscPartNumber": "C29953", + "package": "QFN-20-EP(4x4)", + "stockAtSelection": 7495, + "packageCode": "RGP", + "pinCount": 20, + "packageDrawing": "RGP0020C" + }, + { + "family": "CC1120", + "exportName": "CC1120", + "description": "High performance Sub-1 GHz wireless transceiver for narrowband systems", + "tiProductUrl": "https://www.ti.com/product/CC1120", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1120", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1120RHBR", + "componentExportName": "CC1120RHBR", + "lcscPartNumber": "C66751", + "package": "VQFN-32-EP(5x5)", + "stockAtSelection": 26995, + "packageCode": "RHB", + "pinCount": 32, + "packageDrawing": "RHB0032E" + }, + { + "family": "CC1125", + "exportName": "CC1125", + "description": "Ultra-high performance Sub-1 GHz wireless transceiver for narrowband systems", + "tiProductUrl": "https://www.ti.com/product/CC1125", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1125", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1125RHBR", + "componentExportName": "CC1125RHBR", + "lcscPartNumber": "C133234", + "package": "HVQFN-32-EP(5x5)", + "stockAtSelection": 2982, + "packageCode": "RHB", + "pinCount": 32, + "packageDrawing": "RHB0032E" + }, + { + "family": "CC113L", + "exportName": "CC113L", + "description": "Value line Sub-1 GHz wireless receiver", + "tiProductUrl": "https://www.ti.com/product/CC113L", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC113L", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC113LRGPR", + "componentExportName": "CC113LRGPR", + "lcscPartNumber": "C374064", + "package": "QFN-20-EP(4x4)", + "stockAtSelection": 73, + "packageCode": "RGP", + "pinCount": 20, + "packageDrawing": "RGP0020C" + }, + { + "family": "CC1310", + "exportName": "CC1310", + "description": "SimpleLink™ 32-bit Arm Cortex-M3 Sub-1 GHz wireless MCU with 128kB Flash", + "tiProductUrl": "https://www.ti.com/product/CC1310", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1310", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1310F128RHBR", + "componentExportName": "CC1310F128RHBR", + "lcscPartNumber": "C69860", + "package": "VQFN-32-EP(5x5)", + "stockAtSelection": 11300, + "packageCode": "RHB", + "pinCount": 32, + "packageDrawing": "RHB0032E" + }, + { + "family": "CC1311R3", + "exportName": "CC1311R3", + "description": "SimpleLink™ Arm® Cortex®-M4 Sub-1 GHz wireless MCU with 352-kB flash", + "tiProductUrl": "https://www.ti.com/product/CC1311R3", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1311R3", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": 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SRAM", + "tiProductUrl": "https://www.ti.com/product/CC1314R10", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1314R10", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1314R106T0RGZR", + "componentExportName": "CC1314R106T0RGZR", + "lcscPartNumber": "C38465488", + "package": "VQFN-48(7x7)", + "stockAtSelection": 100, + "packageCode": "RGZ", + "pinCount": 48, + "packageDrawing": "RGZ0048A" + }, + { + "family": "CC1354P10", + "exportName": "CC1354P10", + "description": "SimpleLink™ Arm® Cortex®-M33 multiband wireless MCU with EdgeAI support, 1MB + 296KB, +20dBm", + "tiProductUrl": "https://www.ti.com/product/CC1354P10", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC1354P10", + "sourceRepository": "https://github.com/tscircuit/ti-sysblocks", + "source": "jlcpcb", + "manufacturerPartNumber": "CC1354P106T0RSKR", + "componentExportName": "CC1354P106T0RSKR", + "lcscPartNumber": "C22442559", + "package": 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"family": "CC2531-RF4CE", + "componentExportName": "CC2531F128RHAR", + "manufacturerPartNumber": "CC2531F128RHAR", + "packageDrawing": "RHA0040H", + "status": "source-ready", + "drawingId": "RHA0040H", + "footprintPropSource": "footprint=\"qfn40_thermalpad4.6mmx4.6mm_p0.4999mm_pw0.28mm_pl0.8mm\"", + "physicalPadToPortHint": { + "41": "pin41", + "DGND_BUS": "pin1", + "USB_P": "pin2", + "USB_N": "pin3", + "DVDD_USB": "pin4", + "P1_5": "pin5", + "P1_4": "pin6", + "P1_3": "pin7", + "P1_2": "pin8", + "P1_1": "pin9", + "DVDD2": "pin10", + "P1_0": "pin11", + "P0_7": "pin12", + "P0_6": "pin13", + "P0_5": "pin14", + "P0_4": "pin15", + "P0_3": "pin16", + "P0_2": "pin17", + "P0_1": "pin18", + "P0_0": "pin19", + "RESET_N": "pin20", + "AVDD5": "pin21", + "XOSC_Q1": "pin22", + "XOSC_Q2": "pin23", + "AVDD3": "pin24", + "RF_P": "pin25", + "RF_N": "pin26", + "AVDD2": "pin27", + "AVDD1": "pin28", + "AVDD4": "pin29", + "R_BIAS": "pin30", + "AVDD6": "pin31", + "pin32": "pin32", + "pin33": "pin33", + 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Connect to a solid ground plane." + } + ], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RHA0040H; donor CC2540F256RHAR (JLCPCB C22649)" + }, + "CC2755P105E0WRHAR": { + "family": "CC2755P10", + "componentExportName": "CC2755P105E0WRHAR", + "manufacturerPartNumber": "CC2755P105E0WRHAR", + "packageDrawing": "RHA0040T", + "status": "source-ready", + "drawingId": "RHA0040T", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": 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\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "41", + "name": "EGP", + "type": "GND", + "description": "Ground exposed pad; this is the device's only ground connection." + } + ], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RHA0040T; official source https://www.ti.com/lit/gpn/CC2755P10 pages 91" + }, + "CC3100R11MRGCR": { + "family": "CC3100", + "componentExportName": "CC3100R11MRGCR", + "manufacturerPartNumber": "CC3100R11MRGCR", + "packageDrawing": "RGC0064M", + "status": "source-ready", + "drawingId": "RGC0064M", + "footprintPropSource": "footprint=\"qfn64_thermalpad7.3mmx7.3mm_p0.4999mm_h9.6798mm_pw0.28mm_pl0.665mm_pin1location(bottomside,left)\"", + "physicalPadToPortHint": { + "GPIO10": "pin1", + "GPIO11": "pin2", + "GPIO12": "pin3", + "GPIO13": "pin4", + "GPIO14": "pin5", + "GPIO15": "pin6", + "GPIO16": "pin7", + "GPIO17": "pin8", + "VDD_DIG1": "pin9", + "VIN_IO1": "pin10", + "FLASH_SPI_CLK": "pin11", + "FLASH_SPI_DOUT": "pin12", + "FLASH_SPI_DIN": "pin13", + "FLASH_SPI_CS": "pin14", + "GPIO22": "pin15", + "TDI": "pin16", + "TDO": "pin17", + "GPIO28": "pin18", + "TCK": "pin19", + "TMS": "pin20", + "SOP2": "pin21", + "WLAN_TXAL_N": "pin22", + "WLAN_TXAL_P": "pin23", + "VDD_PLL": "pin24", + "LDO_IN2": "pin25", + "NC3": "pin26", + "NC2": "pin27", + "NC1": "pin28", + "ANTSEL1": "pin29", + "ANTSEL2": "pin30", + "RF_BG": "pin31", + "nRESET": "pin32", + "VDD_PA_IN": "pin33", + "SOP1": "pin34", + "SOP0": "pin35", + "LDO_IN1": "pin36", + "VIN_DCDC_ANA": "pin37", + "DCDC_ANA_SW": "pin38", + "VIN_DCDC_PA": "pin39", + "DCDC_PA_SW_P": "pin40", + "DCDC_PA_SW_N": "pin41", + "DCDC_PA_OUT": "pin42", + "DCDC_DIG_SW": "pin43", + "VIN_DCDC_DIG": "pin44", + "DCDC_ANA2_SW_P": "pin45", + "DCDC_ANA2_SW_N": "pin46", + "VDD_ANA2": "pin47", + "VDD_ANA1": "pin48", + "VDD_RAM": "pin49", + "GPIO0": "pin50", + "RTC_XTAL_P": "pin51", + "RTC_XTAL_N": "pin52", + "GPIO30": "pin53", + "VIN_IO2": "pin54", + "GPIO1": "pin55", + "VDD_DIG2": "pin56", + "GPIO2": "pin57", + "GPIO3": "pin58", + "GPIO4": "pin59", + "GPIO5": "pin60", + "GPIO6": "pin61", + "GPIO7": "pin62", + "GPIO8": "pin63", + "GPIO9": "pin64", + "EP": "pin65" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RGC0064M; donor CC3200R1M2RGC (JLCPCB C1526162)" + }, + "CC3300MODENIAMOZR": { + "family": "CC3300MOD", + "componentExportName": "CC3300MODENIAMOZR", + "manufacturerPartNumber": "CC3300MODENIAMOZR", + "packageDrawing": "MOZ0065A", + "status": "source-ready", + "drawingId": "MOZ0065A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + 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"CC3301MOD", + "componentExportName": "CC3301MODENIAMOZR", + "manufacturerPartNumber": "CC3301MODENIAMOZR", + "packageDrawing": "MOZ0065A", + "status": "source-ready", + "drawingId": "MOZ0065A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": 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\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": 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"official-ti-drawing", + "provenanceComment": "TI drawing FQD-2510852; official source https://www.ti.com/lit/gpn/DLP4500 pages 50,51,52" + }, + "DP83826AERHBR": { + "family": "DP83826AE", + "componentExportName": "DP83826AERHBR", + "manufacturerPartNumber": "DP83826AERHBR", + "packageDrawing": "RHB0032M", + "status": "source-ready", + "drawingId": "RHB0032M", + "footprintPropSource": "footprint=\"qfn32_thermalpad2.1mmx2.1mm_p0.4999mm_h5.6798mm_pw0.28mm_pl0.665mm\"", + "physicalPadToPortHint": { + "33": "pin33", + "ModeSelect": "pin1", + "CEXT": "pin2", + "VDDA3V3": "pin3", + "RD_M": "pin4", + "RD_P": "pin5", + "TD_M": "pin6", + "TD_P": "pin7", + "XO": "pin8", + "pin9": "pin9", + "RBIAS": "pin10", + "MDIO": "pin11", + "MDC": "pin12", + "pin13": "pin13", + "pin14": "pin14", + "pin15": "pin15", + "pin16": "pin16", + "VDDIO": "pin17", + "pin18": "pin18", + "pin19": "pin19", + "pin20": "pin20", + "pin21": "pin21", + "pin22": "pin22", + "TX_EN": "pin23", + "TX_D0": "pin24", + "TX_D1": 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"3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57", + "58": "pin58", + "59": "pin59", + "60": "pin60", + "61": "pin61", + "62": "pin62", + "63": "pin63", + "64": "pin64", + "Exposed Pad": "pin65" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing PAP0064N; official source https://www.ti.com/lit/gpn/DRV3256-Q1 pages 16" + }, + "DRV8363QRGZRQ1": { + "family": "DRV8363-Q1", + "componentExportName": "DRV8363QRGZRQ1", + "manufacturerPartNumber": "DRV8363QRGZRQ1", + "packageDrawing": "RGZ0048M", + "status": "source-ready", + "drawingId": "RGZ0048M", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "49", + "name": "THERMAL_PAD", + "type": "Thermal", + "description": "Used for thermal dissipation, not electrical grounding; has a high-impedance connection to GND and AGND." + } + ], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RGZ0048M; official source https://www.ti.com/lit/gpn/DRV8363-Q1 pages 101" + }, + "ESD751DYAR": { + "family": "ESD751", + "componentExportName": "ESD751DYAR", + "manufacturerPartNumber": "ESD751DYAR", + "packageDrawing": "DYA0002A", + "status": "source-ready", + "drawingId": "DYA0002A", + "footprintPropSource": "footprint=\"res_p1.4999mm_pw0.6mm_ph0.4mm\"", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "I_O": "pin1", + "GND": "pin2" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DYA0002A; donor TPD1E10B06DYAR (JLCPCB C3712135)" + }, + "HDC3021QDEHRQ1": { + "family": "HDC3021-Q1", + "componentExportName": "HDC3021QDEHRQ1", + "manufacturerPartNumber": "HDC3021QDEHRQ1", + "packageDrawing": "DEH0008A", + "status": "source-ready", + "drawingId": "DEH0008A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DEH0008A; official source https://www.ti.com/lit/gpn/HDC3021-Q1 pages 44" + }, + "INA280A3IDCKT": { + "family": "INA280", + "componentExportName": "INA280A3IDCKT", + "manufacturerPartNumber": "INA280A3IDCKT", + "packageDrawing": "DCK0005A", + "status": "source-ready", + "drawingId": "DCK0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "B": "pin2", + "GND": "pin3", + "Y": "pin4", + "VCC": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" + }, + "ISO6420DR": { + "family": "ISO6420", + "componentExportName": "ISO6420DR", + "manufacturerPartNumber": "ISO6420DR", + "packageDrawing": "D0008B", + "status": "source-ready", + "drawingId": "D0008B", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "IN_POS": "pin2", + "IN_NEG": "pin3", + "GND1": "pin4", + "VCC2": "pin5", + "OUTH": "pin6", + "OUTL": "pin7", + "VEE2": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" + }, + "ISO6421DR": { + "family": "ISO6421", + "componentExportName": "ISO6421DR", + "manufacturerPartNumber": "ISO6421DR", + "packageDrawing": "D0008B", + "status": "source-ready", + "drawingId": "D0008B", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "IN_POS": "pin2", + "IN_NEG": "pin3", + "GND1": "pin4", + "VCC2": "pin5", + "OUTH": "pin6", + "OUTL": "pin7", + "VEE2": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" + }, + "ISO6421DRQ1": { + "family": "ISO6421-Q1", + "componentExportName": "ISO6421DRQ1", + "manufacturerPartNumber": "ISO6421DRQ1", + "packageDrawing": "D0008B", + "status": "source-ready", + "drawingId": "D0008B", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "IN_POS": "pin2", + "IN_NEG": "pin3", + "GND1": "pin4", + "VCC2": "pin5", + "OUTH": "pin6", + "OUTL": "pin7", + "VEE2": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" + }, + "ISO6431DBQR": { + "family": "ISO6431", + "componentExportName": "ISO6431DBQR", + "manufacturerPartNumber": "ISO6431DBQR", + "packageDrawing": "DBQ0016A", + "status": "source-ready", + "drawingId": "DBQ0016A", + "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "INA": "pin2", + "INB": "pin3", + "INC": "pin4", + "IND": "pin5", + "INE": "pin6", + "INF": "pin7", + "GND1": "pin8", + "GND2": "pin9", + "OUTF": "pin10", + "OUTE": "pin11", + "OUTD": "pin12", + "OUTC": "pin13", + "OUTB": "pin14", + "OUTA": "pin15", + "VCC2": "pin16" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" + }, + "ISO6440DBQR": { + "family": "ISO6440", + "componentExportName": "ISO6440DBQR", + "manufacturerPartNumber": "ISO6440DBQR", + "packageDrawing": "DBQ0016A", + "status": "source-ready", + "drawingId": "DBQ0016A", + "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "INA": "pin2", + "INB": "pin3", + "INC": "pin4", + "IND": "pin5", + "INE": "pin6", + "INF": "pin7", + "GND1": "pin8", + "GND2": "pin9", + "OUTF": "pin10", + "OUTE": "pin11", + "OUTD": "pin12", + "OUTC": "pin13", + "OUTB": "pin14", + "OUTA": "pin15", + "VCC2": "pin16" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" + }, + "ISO6440DBQRQ1": { + "family": "ISO6440-Q1", + "componentExportName": "ISO6440DBQRQ1", + "manufacturerPartNumber": "ISO6440DBQRQ1", + "packageDrawing": "DBQ0016A", + "status": "source-ready", + "drawingId": "DBQ0016A", + "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "INA": "pin2", + "INB": "pin3", + "INC": "pin4", + "IND": "pin5", + "INE": "pin6", + "INF": "pin7", + "GND1": "pin8", + "GND2": "pin9", + "OUTF": "pin10", + "OUTE": "pin11", + "OUTD": "pin12", + "OUTC": "pin13", + "OUTB": "pin14", + "OUTA": "pin15", + "VCC2": "pin16" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" + }, + "ISO6442DBQR": { + "family": "ISO6442", + "componentExportName": "ISO6442DBQR", + "manufacturerPartNumber": "ISO6442DBQR", + "packageDrawing": "DBQ0016A", + "status": "source-ready", + "drawingId": "DBQ0016A", + "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "INA": "pin2", + "INB": "pin3", + "INC": "pin4", + "IND": "pin5", + "INE": "pin6", + "INF": "pin7", + "GND1": "pin8", + "GND2": "pin9", + "OUTF": "pin10", + "OUTE": "pin11", + "OUTD": "pin12", + "OUTC": "pin13", + "OUTB": "pin14", + "OUTA": "pin15", + "VCC2": "pin16" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" + }, + "IWRL6432BRQAAMYR": { + "family": "IWRL6432AOP", + "componentExportName": "IWRL6432BRQAAMYR", + "manufacturerPartNumber": "IWRL6432BRQAAMYR", + "packageDrawing": "AMY0101A", + "status": "source-ready", + "drawingId": "AMY0101A", + "physicalPadToPortHint": {}, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N" + ], + "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], + "rowPitchMm": 0.5, + "columnPositionsMm": { + "1": -5.125, + "2": -4.625, + "3": -4.125, + "4": -3.625, + "5": -3.125, + "6": 3.125, + "7": 3.625, + "8": 4.125, + "9": 4.625, + "10": 5.125 + }, + "padShape": "circle", + "padDiameterMm": 0.25 + }, + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing AMY0101A; official source https://www.ti.com/lit/gpn/IWRL6432AOP pages 72,73,74" + }, + "XI6432BAFCLIMBBR": { + "family": "IWRL6432WMOD", + "componentExportName": "XI6432BAFCLIMBBR", + "manufacturerPartNumber": "XI6432BAFCLIMBBR", + "packageDrawing": "MBB0030A", + "status": "source-ready", + "drawingId": "MBB0030A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing MBB0030A; official source https://www.ti.com/lit/gpn/IWRL6432WMOD pages 30,31,32" + }, + "LM111733QKVURQ1": { + "family": "LM1117-Q1", + "componentExportName": "LM111733QKVURQ1", + "manufacturerPartNumber": "LM111733QKVURQ1", + "packageDrawing": "KVU0003A", + "status": "source-ready", + "drawingId": "KVU0003A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "GND": "pin1", + "OUT": "pin2", + "IN": "pin3", + "Tab": "pin2" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing KVU0003A; donor TLV76133KVUR (JLCPCB C41835077)" + }, + "LM2902BIDR": { + "family": "LM2902B", + "componentExportName": "LM2902BIDR", + "manufacturerPartNumber": "LM2902BIDR", + "packageDrawing": "D0014A", + "status": "source-ready", + "drawingId": "D0014A", + "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "pin2": "pin2", + "B": "pin3", + "pin4": "pin4", + "C": "pin5", + "pin6": "pin6", + "VSS": "pin7", + "pin8": "pin8", + "D": "pin9", + "pin10": "pin10", + "E": "pin11", + "pin12": "pin12", + "F": "pin13", + "VDD": "pin14" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" + }, + "LM3644YFFR": { + "family": "LM3644", + "componentExportName": "LM3644YFFR", + "manufacturerPartNumber": "LM3644YFFR", + "packageDrawing": "YFF0012", + "status": "source-ready", + "drawingId": "YFF0012", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "A1": "pin1", + "A2": "pin2", + "A3": "pin3", + "B1": "pin4", + "B2": "pin5", + "B3": "pin6", + "C1": "pin7", + "C2": "pin8", + "C3": "pin9", + "D1": "pin10", + "D2": "pin11", + "D3": "pin12" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing YFF0012; official source https://www.ti.com/lit/gpn/LM3644 pages 40" + }, + "LM4060A12EDBZR": { + "family": "LM4060", + "componentExportName": "LM4060A12EDBZR", + "manufacturerPartNumber": "LM4060A12EDBZR", + "packageDrawing": "DBZ0003A", + "status": "source-ready", + "drawingId": "DBZ0003A", + "footprintPropSource": "footprint=\"sot23w_p0.9813mm_pw0.6494mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "GND": "pin1", + "RESET": "pin2", + "VDD": "pin3" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016)" + }, + "LMG1210RVRR": { + "family": "LMG1210", + "componentExportName": "LMG1210RVRR", + "manufacturerPartNumber": "LMG1210RVRR", + "packageDrawing": "RVR0019A", + "status": "source-ready", + "drawingId": "RVR0019A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RVR0019A; official source https://www.ti.com/lit/gpn/LMG1210 pages 24" + }, + "LMG3612REQR": { + "family": "LMG3612", + "componentExportName": "LMG3612REQR", + "manufacturerPartNumber": "LMG3612REQR", + "packageDrawing": "REQ0038A", + "status": "source-ready", + "drawingId": "REQ0038A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "39", + "name": "PAD/S", + "type": "Power", + "description": "Thermal power pad internally connected to S, AGND, and NC2; PAD equals S and may conduct all source current." + } + ], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing REQ0038A; official source https://www.ti.com/lit/gpn/LMG3612 pages 26" + }, + "LMK6DA10000ADLFR": { + "family": "LMK6D", + "componentExportName": "LMK6DA10000ADLFR", + "manufacturerPartNumber": "LMK6DA10000ADLFR", + "packageDrawing": "DLF0006B", + "status": "source-ready", + "drawingId": "DLF0006B", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DLF0006B; official source https://www.ti.com/lit/gpn/LMK6D pages 64" + }, + "LMP8480MMX-T/NOPB": { + "family": "LMP8480", + "componentExportName": "LMP8480MMX_T_NOPB", + "manufacturerPartNumber": "LMP8480MMX-T/NOPB", + "packageDrawing": "DGK0008A", + "status": "source-ready", + "drawingId": "DGK0008A", + "footprintPropSource": "footprint=\"dfn8_pillpads_p0.65mm_w5.8498mm_pw0.38mm_pl1.45mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "OUTA": "pin1", + "-INA": "pin2", + "+INA": "pin3", + "V": "pin4", + "+INB": "pin5", + "-INB": "pin6", + "OUTB": "pin7", + "V_POS": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632)" + }, + "LMP8601MA/NOPB": { + "family": "LMP8601", + "componentExportName": "LMP8601MA_NOPB", + "manufacturerPartNumber": "LMP8601MA/NOPB", + "packageDrawing": "D0008A", + "status": "source-ready", + "drawingId": "D0008A", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "1OUT": "pin1", + "1IN_N": "pin2", + "1IN_P": "pin3", + "GND": "pin4", + "2IN_P": "pin5", + "2IN_N": "pin6", + "2OUT": "pin7", + "VCC": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" + }, + "MSP430F5437AIPNR": { + "family": "MSP430F5437A", + "componentExportName": "MSP430F5437AIPNR", + "manufacturerPartNumber": "MSP430F5437AIPNR", + "packageDrawing": "PN0080A", + "status": "source-ready", + "drawingId": "PN0080A", + "footprintPropSource": "footprint=\"qfn80_pillpads_p0.4999mm_h15.4998mm_pw0.28mm_pl1.5mm\"", + "physicalPadToPortHint": { + "GPIO30": "pin1", + "GPIO31": "pin2", + "GPIO29": "pin3", + "GPIO28": "pin4", + "XRSn": "pin5", + "GPIO46": "pin6", + "VDDIO1": "pin7", + "VDD1": "pin8", + "VSS1": "pin9", + "A6": "pin10", + "C6": "pin11", + "pin12": "pin12", + "pin13": "pin13", + "pin14": "pin14", + "pin15": "pin15", + "pin16": "pin16", + "pin17": "pin17", + "A1": "pin18", + "pin19": "pin19", + "VREFHI": "pin20", + "VREFLO": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "VSSA": "pin25", + "VDDA": "pin26", + "pin27": "pin27", + "pin28": "pin28", + "pin29": "pin29", + "VSS2": "pin30", + "VDD2": "pin31", + "VDDIO2": "pin32", + "FLT2": "pin33", + "FLT1": "pin34", + "GPIO13": "pin35", + "GPIO12": "pin36", + "GPIO11": "pin37", + "GPIO33": "pin38", + "GPIO16": "pin39", + "GPIO17": "pin40", + "GPIO24": "pin41", + "GPIO25": "pin42", + "GPIO26": "pin43", + "GPIO27": "pin44", + "TCK": "pin45", + "pin46": "pin46", + "TMS": "pin47", + "pin48": "pin48", + "GPIO32": "pin49", + "pin50": "pin50", + "pin51": "pin51", + "VDDIO3": "pin52", + "VDD3": "pin53", + "GPIO43": "pin54", + "VSS3": "pin55", + "GPIO39": "pin56", + "GPIO42": "pin57", + "GPIO8": "pin58", + "GPIO4": "pin59", + "GPIO3": "pin60", + "GPIO2": "pin61", + "GPIO1": "pin62", + "GPIO0": "pin63", + "GPIO40": "pin64", + "GPIO23": "pin65", + "GPIO41": "pin66", + "GPIO22": "pin67", + "GPIO7": "pin68", + "GPIO44": "pin69", + "VSS4": "pin70", + "VDD4": "pin71", + "VDDIO4": "pin72", + "GPIO45": "pin73", + "GPIO5": "pin74", + "GPIO9": "pin75", + "GPIO10": "pin76", + "GPIO34": "pin77", + "GPIO15": "pin78", + "GPIO14": "pin79", + "GPIO6": "pin80" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing PN0080A; donor F280025PNSR (JLCPCB C5218674)" + }, + "MSP430FR2532IRGER": { + "family": "MSP430FR2532", + "componentExportName": "MSP430FR2532IRGER", + "manufacturerPartNumber": "MSP430FR2532IRGER", + "packageDrawing": "RGE0024H", + "status": "source-ready", + "drawingId": "RGE0024H", + "footprintPropSource": "footprint=\"qfn24_thermalpad2.7mmx2.7mm_p0.4999mm_h4.6562mm_pw0.28mm_pl0.633mm\"", + "physicalPadToPortHint": { + "IN2": "pin1", + "IN1": "pin2", + "B_GATE": "pin3", + "DRV": "pin4", + "IN_SYS": "pin5", + "UVLO": "pin6", + "PLIM": "pin7", + "GND": "pin8", + "dVdT": "pin9", + "ILIM": "pin10", + "MODE": "pin11", + "SHDN": "pin12", + "IMON": "pin13", + "FLT": "pin14", + "PGTH": "pin15", + "PGOOD": "pin16", + "OUT2": "pin17", + "OUT1": "pin18", + "pin19": "pin19", + "pin20": "pin20", + "pin21": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "EP": "pin25" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529)" + }, + "MSP430FR5969IRGZR": { + "family": "MSP430FR5969", + "componentExportName": "MSP430FR5969IRGZR", + "manufacturerPartNumber": "MSP430FR5969IRGZR", + "packageDrawing": "RGZ0048B", + "status": "source-ready", + "drawingId": "RGZ0048B", + "footprintPropSource": "footprint=\"qfn48_thermalpad4.1mmx4.1mm_pillpads_p0.5004mm_h7.9995mm_pw0.28mm_pl0.85mm_pin1location(bottomside,left)\"", + "physicalPadToPortHint": { + "TD_P_A": "pin1", + "TD_M_A": "pin2", + "VDDA2P52": "pin3", + "TD_P_B": "pin4", + "TD_M_B": "pin5", + "VDD1P04": "pin6", + "TD_P_C": "pin7", + "TD_M_C": "pin8", + "VDDA2P51": "pin9", + "TD_P_D": "pin10", + "TD_M_D": "pin11", + "RBIAS": "pin12", + "VDDA1P82": "pin13", + "X_O": "pin14", + "X_I": "pin15", + "MDC": "pin16", + "MDIO": "pin17", + "CLK_OUT": "pin18", + "VDDIO3": "pin19", + "JTAG_CLK": "pin20", + "JTAG_TDO": "pin21", + "JTAG_TMS": "pin22", + "JTAG_TDI": "pin23", + "VDD1P03": "pin24", + "TX_D3": "pin25", + "TX_D2": "pin26", + "TX_D1": "pin27", + "TX_D0": "pin28", + "GTX_CLK": "pin29", + "VDDIO2": "pin30", + "VDD1P02": "pin31", + "RX_CLK": "pin32", + "RX_D0": "pin33", + "RX_D1": "pin34", + "RX_D2": "pin35", + "RX_D3": "pin36", + "TX_CTRL": "pin37", + "RX_CTRL": "pin38", + "GPIO_0": "pin39", + "GPIO_1": "pin40", + "VDDIO1": "pin41", + "VDD1P01": "pin42", + "RESET_N": "pin43", + "pin44": "pin44", + "LED_2": "pin45", + "LED_1": "pin46", + "LED_0": "pin47", + "VDDA1P81": "pin48", + "pin49": "pin49", + "Pad": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766)" + }, + "XMSPM0G1218SRGZR": { + "family": "MSPM0G1218", + "componentExportName": "XMSPM0G1218SRGZR", + "manufacturerPartNumber": "XMSPM0G1218SRGZR", + "packageDrawing": "RGZ0048B", + "status": "source-ready", + "drawingId": "RGZ0048B", + "footprintPropSource": "footprint=\"qfn48_thermalpad4.1mmx4.1mm_pillpads_p0.5004mm_h7.9995mm_pw0.28mm_pl0.85mm_pin1location(bottomside,left)\"", + "physicalPadToPortHint": { + "49": "pin49", + "TD_P_A": "pin1", + "TD_M_A": "pin2", + "VDDA2P52": "pin3", + "TD_P_B": "pin4", + "TD_M_B": "pin5", + "VDD1P04": "pin6", + "TD_P_C": "pin7", + "TD_M_C": "pin8", + "VDDA2P51": "pin9", + "TD_P_D": "pin10", + "TD_M_D": "pin11", + "RBIAS": "pin12", + "VDDA1P82": "pin13", + "X_O": "pin14", + "X_I": "pin15", + "MDC": "pin16", + "MDIO": "pin17", + "CLK_OUT": "pin18", + "VDDIO3": "pin19", + "JTAG_CLK": "pin20", + "JTAG_TDO": "pin21", + "JTAG_TMS": "pin22", + "JTAG_TDI": "pin23", + "VDD1P03": "pin24", + "TX_D3": "pin25", + "TX_D2": "pin26", + "TX_D1": "pin27", + "TX_D0": "pin28", + "GTX_CLK": "pin29", + "VDDIO2": "pin30", + "VDD1P02": "pin31", + "RX_CLK": "pin32", + "RX_D0": "pin33", + "RX_D1": "pin34", + "RX_D2": "pin35", + "RX_D3": "pin36", + "TX_CTRL": "pin37", + "RX_CTRL": "pin38", + "GPIO_0": "pin39", + "GPIO_1": "pin40", + "VDDIO1": "pin41", + "VDD1P01": "pin42", + "RESET_N": "pin43", + "pin44": "pin44", + "LED_2": "pin45", + "LED_1": "pin46", + "LED_0": "pin47", + "VDDA1P81": "pin48", + "pin49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "49", + "name": "QFN_PAD/THERMAL_PAD", + "type": "GND", + "description": "QFN exposed thermal pad; TI recommends connection to VSS and a continuous ground plane." + } + ], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766)" + }, + "MSPM0G5117SPMR": { + "family": "MSPM0G5117", + "componentExportName": "MSPM0G5117SPMR", + "manufacturerPartNumber": "MSPM0G5117SPMR", + "packageDrawing": "PM0064A", + "status": "source-ready", + "drawingId": "PM0064A", + "footprintPropSource": "footprint=\"lga64_grid16x16_pillpads_p0.4999mm_w12.8998mm_h12.8998mm_pl1.8mm\"", + "physicalPadToPortHint": { + "pin1": "pin1", + "pin2": "pin2", + "pin3": "pin3", + "pin4": "pin4", + "pin5": "pin5", + "pin6": "pin6", + "pin7": "pin7", + "DVSS": "pin8", + "DVCC": "pin9", + "pin10": "pin10", + "pin11": "pin11", + "pin12": "pin12", + "pin13": "pin13", + "pin14": "pin14", + "pin15": "pin15", + "pin16": "pin16", + "pin17": "pin17", + "pin18": "pin18", + "pin19": "pin19", + "pin20": "pin20", + "pin21": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "pin25": "pin25", + "pin26": "pin26", + "pin27": "pin27", + "pin28": "pin28", + "pin29": "pin29", + "pin30": "pin30", + "pin31": "pin31", + "pin32": "pin32", + "pin33": "pin33", + "pin34": "pin34", + "pin35": "pin35", + "pin36": "pin36", + "pin37": "pin37", + "pin38": "pin38", + "pin39": "pin39", + "pin40": "pin40", + "pin41": "pin41", + "pin42": "pin42", + "pin43": "pin43", + "pin44": "pin44", + "pin45": "pin45", + "pin46": "pin46", + "pin47": "pin47", + "pin48": "pin48", + "pin49": "pin49", + "pin50": "pin50", + "pin51": "pin51", + "pin52": "pin52", + "pin53": "pin53", + "pin54": "pin54", + "pin55": "pin55", + "pin56": "pin56", + "pin57": "pin57", + "pin58": "pin58", + "pin59": "pin59", + "pin60": "pin60", + "pin61": "pin61", + "pin62": "pin62", + "pin63": "pin63", + "pin64": "pin64" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing PM0064A; donor MSP430FR4133IPMR (JLCPCB C106759)" + }, + "MSPM0L1343TDGS20R": { + "family": "MSPM0L1343", + "componentExportName": "MSPM0L1343TDGS20R", + "manufacturerPartNumber": "MSPM0L1343TDGS20R", + "packageDrawing": "DGS0020A", + "status": "source-ready", + "drawingId": "DGS0020A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "GNA": "pin1", + "VREF_A": "pin2", + "A1": "pin3", + "A2": "pin4", + "A3": "pin5", + "A4": "pin6", + "A5": "pin7", + "A6": "pin8", + "A7": "pin9", + "A8": "pin10", + "B8": "pin11", + "B7": "pin12", + "B6": "pin13", + "B5": "pin14", + "B4": "pin15", + "B3": "pin16", + "B2": "pin17", + "B1": "pin18", + "VREF_B": "pin19", + "EN": "pin20" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DGS0020A; donor LSF0108DGSR (JLCPCB C6653422)" + }, + "XM33C321ASPZR": { + "family": "MSPM33C321A", + "componentExportName": "XM33C321ASPZR", + "manufacturerPartNumber": "XM33C321ASPZR", + "packageDrawing": "PZ0100A", + "status": "source-ready", + "drawingId": "PZ0100A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49", + "50": "pin50", + "51": "pin51", + "52": "pin52", + "53": "pin53", + "54": "pin54", + "55": "pin55", + "56": "pin56", + "57": "pin57", + "58": "pin58", + "59": "pin59", + "60": "pin60", + "61": "pin61", + "62": "pin62", + "63": "pin63", + "64": "pin64", + "65": "pin65", + "66": "pin66", + "67": "pin67", + "68": "pin68", + "69": "pin69", + "70": "pin70", + "71": "pin71", + "72": "pin72", + "73": "pin73", + "74": "pin74", + "75": "pin75", + "76": "pin76", + "77": "pin77", + "78": "pin78", + "79": "pin79", + "80": "pin80", + "81": "pin81", + "82": "pin82", + "83": "pin83", + "84": "pin84", + "85": "pin85", + "86": "pin86", + "87": "pin87", + "88": "pin88", + "89": "pin89", + "90": "pin90", + "91": "pin91", + "92": "pin92", + "93": "pin93", + "94": "pin94", + "95": "pin95", + "96": "pin96", + "97": "pin97", + "98": "pin98", + "99": "pin99", + "100": "pin100" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing PZ0100A; official source https://www.ti.com/lit/gpn/MSPM33C321A pages 111" + }, + "OPA371DDBVR": { + "family": "OPA371D", + "componentExportName": "OPA371DDBVR", + "manufacturerPartNumber": "OPA371DDBVR", + "packageDrawing": "DBV0005A", + "status": "source-ready", + "drawingId": "DBV0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "OUT": "pin1", + "V_NEG": "pin2", + "IN_POS": "pin3", + "IN_NEG": "pin4", + "V_POS": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" + }, + "REF2125IDBVR": { + "family": "REF2125", + "componentExportName": "REF2125IDBVR", + "manufacturerPartNumber": "REF2125IDBVR", + "packageDrawing": "DBV0005A", + "status": "source-ready", + "drawingId": "DBV0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "OUT": "pin1", + "V_NEG": "pin2", + "IN_POS": "pin3", + "IN_NEG": "pin4", + "V_POS": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" + }, + "SN65HVD96DR": { + "family": "SN65HVD96", + "componentExportName": "SN65HVD96DR", + "manufacturerPartNumber": "SN65HVD96DR", + "packageDrawing": "D0008A", + "status": "source-ready", + "drawingId": "D0008A", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "1OUT": "pin1", + "1IN_N": "pin2", + "1IN_P": "pin3", + "GND": "pin4", + "2IN_P": "pin5", + "2IN_N": "pin6", + "2OUT": "pin7", + "VCC": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" + }, + "SN65LV1224BDB": { + "family": "SN65LV1224B", + "componentExportName": "SN65LV1224BDB", + "manufacturerPartNumber": "SN65LV1224BDB", + "packageDrawing": "DB0028A", + "status": "source-ready", + "drawingId": "DB0028A", + "footprintPropSource": "footprint=\"dfn28_pillpads_p0.65mm_w8.9258mm_pw0.364mm_pl2.0155mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "SYNC1": "pin1", + "SYNC2": "pin2", + "DIN0": "pin3", + "DIN1": "pin4", + "DIN2": "pin5", + "DIN3": "pin6", + "DIN4": "pin7", + "DIN5": "pin8", + "DIN6": "pin9", + "DIN7": "pin10", + "DIN8": "pin11", + "DIN9": "pin12", + "pin13": "pin13", + "TCLK": "pin14", + "DGND2": "pin15", + "DGND1": "pin16", + "AVCC2": "pin17", + "AGND4": "pin18", + "DEN": "pin19", + "AGND3": "pin20", + "pin21": "pin21", + "DO_POS": "pin22", + "AGND2": "pin23", + "PWRDN": "pin24", + "AGND1": "pin25", + "AVCC1": "pin26", + "DVCC2": "pin27", + "DVCC1": "pin28" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DB0028A; donor SN65LV1023ADB (JLCPCB C2863118)" + }, + "SN74AUP2G14DSFR": { + "family": "SN74AUP2G14", + "componentExportName": "SN74AUP2G14DSFR", + "manufacturerPartNumber": "SN74AUP2G14DSFR", + "packageDrawing": "DSF0006A", + "status": "source-ready", + "drawingId": "DSF0006A", + "footprintPropSource": "footprint=\"sot963_w1.2001mm_pw0.17mm_pl0.4mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "D": "pin1", + "CLK": "pin2", + "GND": "pin3", + "Q": "pin4", + "NC": "pin5", + "VCC": "pin6" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DSF0006A; donor SN74AUP1G79DSFR (JLCPCB C2677981)" + }, + "SN74AUP2G240DCUR": { + "family": "SN74AUP2G240", + "componentExportName": "SN74AUP2G240DCUR", + "manufacturerPartNumber": "SN74AUP2G240DCUR", + "packageDrawing": "DCU0008A", + "status": "source-ready", + "drawingId": "DCU0008A", + "footprintPropSource": "footprint=\"dfn8_pillpads_p0.5001mm_w3.8498mm_pw0.25mm_pl0.75mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "1A": "pin1", + "1B": "pin2", + "2Y": "pin3", + "GND": "pin4", + "2A": "pin5", + "2B": "pin6", + "1Y": "pin7", + "VCC": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DCU0008A; donor SN74LVC2G08DCUR (JLCPCB C91875)" + }, + "SN74HCS03DR": { + "family": "SN74HCS03", + "componentExportName": "SN74HCS03DR", + "manufacturerPartNumber": "SN74HCS03DR", + "packageDrawing": "D0014A", + "status": "source-ready", + "drawingId": "D0014A", + "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "pin2": "pin2", + "B": "pin3", + "pin4": "pin4", + "C": "pin5", + "pin6": "pin6", + "VSS": "pin7", + "pin8": "pin8", + "D": "pin9", + "pin10": "pin10", + "E": "pin11", + "pin12": "pin12", + "F": "pin13", + "VDD": "pin14" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" + }, + "SN74LVC1G04YZPR": { + "family": "SN74LVC1G04", + "componentExportName": "SN74LVC1G04YZPR", + "manufacturerPartNumber": "SN74LVC1G04YZPR", + "packageDrawing": "YZP0005", + "status": "source-ready", + "drawingId": "YZP0005", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "A": "pin2", + "B1": "pin2", + "GND": "pin3", + "C1": "pin3", + "OE": "pin4", + "A1": "pin4", + "VCC": "pin5", + "A2": "pin5", + "Y": "pin1", + "C2": "pin1" + }, + "ignoredPhysicalPins": ["B2"], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing YZP0005; donor SN74LVC1G125YZPR (JLCPCB C2675663)" + }, + "THVD8010DDFR": { + "family": "THVD8010", + "componentExportName": "THVD8010DDFR", + "manufacturerPartNumber": "THVD8010DDFR", + "packageDrawing": "DDF0008A", + "status": "source-ready", + "drawingId": "DDF0008A", + "footprintPropSource": "footprint=\"soic_p0.65mm_w3.4199mm_pw0.4mm_pl0.9mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VS": "pin1", + "ENABLE": "pin2", + "REF": "pin3", + "GND": "pin4", + "OUT": "pin5", + "NC": "pin6", + "IN_POS": "pin7", + "IN_NEG": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DDF0008A; donor INA186A2IDDFR (JLCPCB C2869854)" + }, + "TIOL221RGER": { + "family": "TIOL221", + "componentExportName": "TIOL221RGER", + "manufacturerPartNumber": "TIOL221RGER", + "packageDrawing": "RGE0024H", + "status": "source-ready", + "drawingId": "RGE0024H", + "footprintPropSource": "footprint=\"qfn24_thermalpad2.7mmx2.7mm_p0.4999mm_h4.6562mm_pw0.28mm_pl0.633mm\"", + "physicalPadToPortHint": { + "IN2": "pin1", + "IN1": "pin2", + "B_GATE": "pin3", + "DRV": "pin4", + "IN_SYS": "pin5", + "UVLO": "pin6", + "PLIM": "pin7", + "GND": "pin8", + "dVdT": "pin9", + "ILIM": "pin10", + "MODE": "pin11", + "SHDN": "pin12", + "IMON": "pin13", + "FLT": "pin14", + "PGTH": "pin15", + "PGOOD": "pin16", + "OUT2": "pin17", + "OUT1": "pin18", + "pin19": "pin19", + "pin20": "pin20", + "pin21": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "EP": "pin25" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529)" + }, + "TL391LVDBVR": { + "family": "TL391LV", + "componentExportName": "TL391LVDBVR", + "manufacturerPartNumber": "TL391LVDBVR", + "packageDrawing": "DBV0005A", + "status": "source-ready", + "drawingId": "DBV0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "OUT": "pin1", + "V_NEG": "pin2", + "IN_POS": "pin3", + "IN_NEG": "pin4", + "V_POS": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" + }, + "TLA432AQDBZR": { + "family": "TLA432", + "componentExportName": "TLA432AQDBZR", + "manufacturerPartNumber": "TLA432AQDBZR", + "packageDrawing": "DBZ0003A", + "status": "source-ready", + "drawingId": "DBZ0003A", + "footprintPropSource": "footprint=\"sot23w_p0.9813mm_pw0.6494mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "GND": "pin1", + "RESET": "pin2", + "VDD": "pin3" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016)" + }, + "TLC69624QRSNRQ1": { + "family": "TLC69624-Q1", + "componentExportName": "TLC69624QRSNRQ1", + "manufacturerPartNumber": "TLC69624QRSNRQ1", + "packageDrawing": "RSN0032D", + "status": "source-ready", + "drawingId": "RSN0032D", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18" + }, + "TLC69634QRSNRQ1": { + "family": "TLC69634-Q1", + "componentExportName": "TLC69634QRSNRQ1", + "manufacturerPartNumber": "TLC69634QRSNRQ1", + "packageDrawing": "RSN0032D", + "status": "source-ready", + "drawingId": "RSN0032D", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18" + }, + "TLC69699DRRR": { + "family": "TLC69699", + "componentExportName": "TLC69699DRRR", + "manufacturerPartNumber": "TLC69699DRRR", + "packageDrawing": "DRR0012G", + "status": "source-ready", + "drawingId": "DRR0012G", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "Exposed Pad": "pin13" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "13", + "name": "NC3", + "type": "NC", + "description": "Exposed pad with no connection; electrically isolate from every signal except Ground." + } + ], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DRR0012G; official source https://www.ti.com/lit/gpn/TLC69699 pages 22" + }, + "PTLIN821DRBRQ1": { + "family": "TLIN821-Q1", + "componentExportName": "PTLIN821DRBRQ1", + "manufacturerPartNumber": "PTLIN821DRBRQ1", + "packageDrawing": "DRB0008J", + "status": "source-ready", + "drawingId": "DRB0008J", + "footprintPropSource": "footprint=\"dfn8_thermalpad1.6mmx2.4mm_pillpads_p0.65mm_w3.8301mm_pw0.35mm_pl0.84mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "9": "pin9", + "TXD": "pin1", + "GND": "pin2", + "VCC": "pin3", + "RXD": "pin4", + "pin5": "pin5", + "CANL": "pin6", + "CANH": "pin7", + "STB": "pin8", + "Pad": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [ + { + "number": "9", + "name": "THERMAL_PAD", + "type": "GND", + "description": "Thermal pad electrically connected to GND; connect to PCB ground." + } + ], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DRB0008J; donor TCAN1044AVDRBRQ1 (JLCPCB C3234119)" + }, + "TLV1811QDBVRQ1": { + "family": "TLV1811-Q1", + "componentExportName": "TLV1811QDBVRQ1", + "manufacturerPartNumber": "TLV1811QDBVRQ1", + "packageDrawing": "DBV0005A", + "status": "source-ready", + "drawingId": "DBV0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "OUT": "pin1", + "V_NEG": "pin2", + "IN_POS": "pin3", + "IN_NEG": "pin4", + "V_POS": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" + }, + "TLV1824DR": { + "family": "TLV1824", + "componentExportName": "TLV1824DR", + "manufacturerPartNumber": "TLV1824DR", + "packageDrawing": "D0014A", + "status": "source-ready", + "drawingId": "D0014A", + "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "pin2": "pin2", + "B": "pin3", + "pin4": "pin4", + "C": "pin5", + "pin6": "pin6", + "VSS": "pin7", + "pin8": "pin8", + "D": "pin9", + "pin10": "pin10", + "E": "pin11", + "pin12": "pin12", + "F": "pin13", + "VDD": "pin14" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" + }, + "TLV3211DCKR": { + "family": "TLV3211", + "componentExportName": "TLV3211DCKR", + "manufacturerPartNumber": "TLV3211DCKR", + "packageDrawing": "DCK0005A", + "status": "source-ready", + "drawingId": "DCK0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "B": "pin2", + "GND": "pin3", + "Y": "pin4", + "VCC": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" + }, + "TLV3212DGKR": { + "family": "TLV3212", + "componentExportName": "TLV3212DGKR", + "manufacturerPartNumber": "TLV3212DGKR", + "packageDrawing": "DGK0008A", + "status": "source-ready", + "drawingId": "DGK0008A", + "footprintPropSource": "footprint=\"dfn8_pillpads_p0.65mm_w5.8498mm_pw0.38mm_pl1.45mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "OUTA": "pin1", + "-INA": "pin2", + "+INA": "pin3", + "V": "pin4", + "+INB": "pin5", + "-INB": "pin6", + "OUTB": "pin7", + "V_POS": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632)" + }, + "TLV369IDCKR": { + "family": "TLV369", + "componentExportName": "TLV369IDCKR", + "manufacturerPartNumber": "TLV369IDCKR", + "packageDrawing": "DCK0005A", + "status": "source-ready", + "drawingId": "DCK0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "B": "pin2", + "GND": "pin3", + "Y": "pin4", + "VCC": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" + }, + "TLV61047DDCR": { + "family": "TLV61047", + "componentExportName": "TLV61047DDCR", + "manufacturerPartNumber": "TLV61047DDCR", + "packageDrawing": "DDC0005A", + "status": "source-ready", + "drawingId": "DDC0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "IN": "pin1", + "GND2": "pin2", + "EN": "pin3", + "GND1": "pin4", + "OUT": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DDC0005A; donor TPS78233DDCR (JLCPCB C14878)" + }, + "TLV9022L1RUGR": { + "family": "TLV9022L", + "componentExportName": "TLV9022L1RUGR", + "manufacturerPartNumber": "TLV9022L1RUGR", + "packageDrawing": "RUG0010B", + "status": "source-ready", + "drawingId": "RUG0010B", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RUG0010B; official source https://www.ti.com/lit/gpn/TLV9022L pages 35" + }, + "TMP107BIDR": { + "family": "TMP107", + "componentExportName": "TMP107BIDR", + "manufacturerPartNumber": "TMP107BIDR", + "packageDrawing": "D0008A", + "status": "source-ready", + "drawingId": "D0008A", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "1OUT": "pin1", + "1IN_N": "pin2", + "1IN_P": "pin3", + "GND": "pin4", + "2IN_P": "pin5", + "2IN_N": "pin6", + "2OUT": "pin7", + "VCC": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" + }, + "F280041CPZQR": { + "family": "TMS320F280041C-Q1", + "componentExportName": "F280041CPZQR", + "manufacturerPartNumber": "F280041CPZQR", + "packageDrawing": "PZ0100A1", + "status": "source-ready", + "drawingId": "PZ0100A1", + "footprintPropSource": "footprint=\"qfn100_pillpads_p0.4999mm_h17.2996mm_pw0.3mm_pl1.6mm\"", + "physicalPadToPortHint": { + "GPIO28": "pin1", + "XRSn": "pin2", + "VDDIO4": "pin3", + "VDD4": "pin4", + "VSS4": "pin5", + "pin6": "pin6", + "pin7": "pin7", + "pin8": "pin8", + "pin9": "pin9", + "A3": "pin10", + "VDDA2": "pin11", + "VSSA2": "pin12", + "PGA5_GND": "pin13", + "PGA1_GND": "pin14", + "PGA3_GND": "pin15", + "PGA5_IN": "pin16", + "C4": "pin17", + "PGA1_IN": "pin18", + "C0": "pin19", + "PGA3_IN": "pin20", + "C2": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "VREFHIA": "pin25", + "pin26": "pin26", + "VREFLOA": "pin27", + "pin28": "pin28", + "C1": "pin29", + "PGA2_IN": "pin30", + "pin31": "pin31", + "pin32": "pin32", + "VSSA1": "pin33", + "VDDA1": "pin34", + "A5": "pin35", + "pin36": "pin36", + "pin37": "pin37", + "A9": "pin38", + "pin39": "pin39", + "pin40": "pin40", + "B0": "pin41", + "PGA7_GND": "pin42", + "PGA7_IN": "pin43", + "C14": "pin44", + "VSS3": "pin45", + "VDD3": "pin46", + "VDDIO3": "pin47", + "FLT2": "pin48", + "FLT1": "pin49", + "GPIO13": "pin50", + "GPIO12": "pin51", + "GPIO11": "pin52", + "GPIO33": "pin53", + "GPIO16": "pin54", + "GPIO17": "pin55", + "GPIO24": "pin56", + "GPIO25": "pin57", + "GPIO26": "pin58", + "GPIO27": "pin59", + "TCK": "pin60", + "pin61": "pin61", + "TMS": "pin62", + "pin63": "pin63", + "GPIO32": "pin64", + "GPIO56": "pin65", + "GPIO57": "pin66", + "GPIO58": "pin67", + "GPIO18_X2": "pin68", + "X1": "pin69", + "VDDIO2": "pin70", + "VDD2": "pin71", + "VSS2": "pin72", + "VREGENZ": "pin73", + "GPIO8": "pin74", + "GPIO4": "pin75", + "GPIO3": "pin76", + "GPIO2": "pin77", + "GPIO1": "pin78", + "GPIO0": "pin79", + "VDDIO_SW": "pin80", + "GPIO23_VSW": "pin81", + "VSS_SW": "pin82", + "GPIO22_VFBSW": "pin83", + "GPIO7": "pin84", + "GPIO40": "pin85", + "VSS1": "pin86", + "VDD1": "pin87", + "VDDIO1": "pin88", + "GPIO5": "pin89", + "GPIO9": "pin90", + "GPIO39": "pin91", + "GPIO59": "pin92", + "GPIO10": "pin93", + "GPIO34": "pin94", + "GPIO15": "pin95", + "GPIO14": "pin96", + "GPIO6": "pin97", + "GPIO30": "pin98", + "GPIO31": "pin99", + "GPIO29": "pin100" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing PZ0100A1; donor F280049CPZQR (JLCPCB C1880111)" + }, + "TMS320F28027PTQR": { + "family": "TMS320F28027-Q1", + "componentExportName": "TMS320F28027PTQR", + "manufacturerPartNumber": "TMS320F28027PTQR", + "packageDrawing": "PT0048A", + "status": "source-ready", + "drawingId": "PT0048A", + "footprintPropSource": "footprint=\"qfn48_pillpads_p0.4999mm_h10.1001mm_pw0.28mm_pl1.8mm\"", + "physicalPadToPortHint": { + "GPIO29": "pin1", + "pin2": "pin2", + "XRSn": "pin3", + "A6C6GPIO226GPIO228": "pin4", + "pin5": "pin5", + "pin6": "pin6", + "pin7": "pin7", + "pin8": "pin8", + "pin9": "pin9", + "A1": "pin10", + "pin11": "pin11", + "VREFHI": "pin12", + "VREFLO": "pin13", + "pin14": "pin14", + "pin15": "pin15", + "pin16": "pin16", + "VSSA": "pin17", + "VDDA": "pin18", + "pin19": "pin19", + "pin20": "pin20", + "pin21": "pin21", + "VSS1": "pin22", + "pin23": "pin23", + "pin24": "pin24", + "GPIO33": "pin25", + "GPIO16": "pin26", + "GPIO24": "pin27", + "TCK": "pin28", + "pin29": "pin29", + "TMS": "pin30", + "pin31": "pin31", + "GPIO32": "pin32", + "GPIO18_X2": "pin33", + "GPIO19_X1": "pin34", + "VDDIO1": "pin35", + "VDD1": "pin36", + "VSS2": "pin37", + "GPIO4": "pin38", + "GPIO3": "pin39", + "GPIO2": "pin40", + "GPIO1": "pin41", + "GPIO0": "pin42", + "GPIO7": "pin43", + "VSS3": "pin44", + "VDD2": "pin45", + "VDDIO2": "pin46", + "GPIO5": "pin47", + "GPIO6": "pin48" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing PT0048A; donor F2800132PTR (JLCPCB C20345402)" + }, + "TPD1E0B04DPLT": { + "family": "TPD1E0B04", + "componentExportName": "TPD1E0B04DPLT", + "manufacturerPartNumber": "TPD1E0B04DPLT", + "packageDrawing": "DPL0002A", + "status": "source-ready", + "drawingId": "DPL0002A", + "footprintPropSource": "footprint=\"0201\"", + "physicalPadToPortHint": {}, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DPL0002A; official source https://www.ti.com/lit/gpn/TPD1E0B04" + }, + "TPS1HC03PQVAHRQ1": { + "family": "TPS1HC03-Q1", + "componentExportName": "TPS1HC03PQVAHRQ1", + "manufacturerPartNumber": "TPS1HC03PQVAHRQ1", + "packageDrawing": "VAH0011A", + "status": "source-ready", + "drawingId": "VAH0011A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing VAH0011A; official source https://www.ti.com/lit/gpn/TPS1HC03-Q1 pages 71" + }, + "TPS22970YZPR": { + "family": "TPS22970", + "componentExportName": "TPS22970YZPR", + "manufacturerPartNumber": "TPS22970YZPR", + "packageDrawing": "YZP0008", + "status": "source-ready", + "drawingId": "YZP0008", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "D2": "pin1", + "D1": "pin2", + "C1": "pin3", + "C2": "pin4", + "B2": "pin5", + "B1": "pin6", + "A1": "pin7", + "A2": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing YZP0008; donor SN74LVC2G132YZPR (JLCPCB C2872358)" + }, + "TPS22991CNRAAR": { + "family": "TPS22991", + "componentExportName": "TPS22991CNRAAR", + "manufacturerPartNumber": "TPS22991CNRAAR", + "packageDrawing": "RAA0004A", + "status": "source-ready", + "drawingId": "RAA0004A", + "footprintPropSource": "footprint={\n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RAA0004A; official source https://www.ti.com/lit/gpn/TPS22991 pages 26" + }, + "TPS24750RUVR": { + "family": "TPS24750", + "componentExportName": "TPS24750RUVR", + "manufacturerPartNumber": "TPS24750RUVR", + "packageDrawing": "RUV0036A", + "status": "source-ready", + "drawingId": "RUV0036A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "Pad-1": "pin4", + "Pad-2": "pin5" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RUV0036A; official source https://www.ti.com/lit/gpn/TPS24750 pages 44,45,46" + }, + "TPS25972ARPWR": { + "family": "TPS2597", + "componentExportName": "TPS25972ARPWR", + "manufacturerPartNumber": "TPS25972ARPWR", + "packageDrawing": "RPW0010A", + "status": "source-ready", + "drawingId": "RPW0010A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "pin1": "pin1", + "pin2": "pin2", + "pin3": "pin3", + "pin4": "pin4", + "IN": "pin5", + "OUT": "pin6", + "DVDT": "pin7", + "GND": "pin8", + "ILM": "pin9", + "ITIMER": "pin10" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RPW0010A; donor TPS259472ARPWR (JLCPCB C3662789)" + }, + "TPS2HC08PQVAHRQ1": { + "family": "TPS2HC08-Q1", + "componentExportName": "TPS2HC08PQVAHRQ1", + "manufacturerPartNumber": "TPS2HC08PQVAHRQ1", + "packageDrawing": "VAH0011C", + "status": "source-ready", + "drawingId": "VAH0011C", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing VAH0011C; official source https://www.ti.com/lit/gpn/TPS2HC08-Q1 pages 74" + }, + "TPS2HC16PQVAHRQ1": { + "family": "TPS2HC16-Q1", + "componentExportName": "TPS2HC16PQVAHRQ1", + "manufacturerPartNumber": "TPS2HC16PQVAHRQ1", + "packageDrawing": "VAH0011B", + "status": "source-ready", + "drawingId": "VAH0011B", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing VAH0011B; official source https://www.ti.com/lit/gpn/TPS2HC16-Q1 pages 72" + }, + "TPS3424A11C13ADRLR": { + "family": "TPS3424", + "componentExportName": "TPS3424A11C13ADRLR", + "manufacturerPartNumber": "TPS3424A11C13ADRLR", + "packageDrawing": "DRL0008A", + "status": "source-ready", + "drawingId": "DRL0008A", + "footprintPropSource": "footprint=\"soic_p0.5001mm_w1.9602mm_pw0.28mm_pl0.68mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VOUT": "pin1", + "LX2": "pin2", + "LX1": "pin3", + "VIN": "pin4", + "EN": "pin5", + "MODE": "pin6", + "GND": "pin7", + "FB": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DRL0008A; donor TPS631000DRLR (JLCPCB C5219190)" + }, + "TPS3435JFMAFDSER": { + "family": "TPS3435", + "componentExportName": "TPS3435JFMAFDSER", + "manufacturerPartNumber": "TPS3435JFMAFDSER", + "packageDrawing": "DSE0006A", + "status": "source-ready", + "drawingId": "DSE0006A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "SENSE": "pin1", + "GND": "pin2", + "MR": "pin3", + "VDD": "pin4", + "CT": "pin5", + "RESET": "pin6" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DSE0006A; donor TPS389030DSER (JLCPCB C2066942)" + }, + "TPS389006007RTER": { + "family": "TPS389006", + "componentExportName": "TPS389006007RTER", + "manufacturerPartNumber": "TPS389006007RTER", + "packageDrawing": "RTE0016C", + "status": "source-ready", + "drawingId": "RTE0016C", + "footprintPropSource": "footprint=\"qfn16_thermalpad1.7mmx1.7mm_p0.4999mm_pw0.28mm_pl0.8mm\"", + "physicalPadToPortHint": { + "pin1": "pin1", + "pin2": "pin2", + "pin3": "pin3", + "pin4": "pin4", + "pin5": "pin5", + "pin6": "pin6", + "AVDD": "pin7", + "DECAP": "pin8", + "GND2": "pin9", + "DVDD": "pin10", + "ADDR": "pin11", + "NC": "pin12", + "SCL": "pin13", + "SDA": "pin14", + "pin15": "pin15", + "pin16": "pin16", + "GND1": "pin17" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RTE0016C; donor TLA2528IRTER (JLCPCB C2866175)" + }, + "TPS6521401VAFR": { + "family": "TPS65214", + "componentExportName": "TPS6521401VAFR", + "manufacturerPartNumber": "TPS6521401VAFR", + "packageDrawing": "VAF0024A", + "status": "source-ready", + "drawingId": "VAF0024A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing VAF0024A; official source https://www.ti.com/lit/gpn/TPS65214 pages 139" + }, + "TPS6522430RAHRQ1": { + "family": "TPS65224-Q1", + "componentExportName": "TPS6522430RAHRQ1", + "manufacturerPartNumber": "TPS6522430RAHRQ1", + "packageDrawing": "RAH0036A", + "status": "source-ready", + "drawingId": "RAH0036A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RAH0036A; official source https://www.ti.com/lit/gpn/TPS65224-Q1 pages 11" + }, + "O3853QDCARQ1": { + "family": "TPS653853-Q1", + "componentExportName": "O3853QDCARQ1", + "manufacturerPartNumber": "O3853QDCARQ1", + "packageDrawing": "DCA0048B", + "status": "source-ready", + "drawingId": "DCA0048B", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DCA0048B; official source https://www.ti.com/lit/gpn/TPS653853-Q1 pages 10" + }, + "TPS65930A2ZCHR": { + "family": "TPS65930", + "componentExportName": "TPS65930A2ZCHR", + "manufacturerPartNumber": "TPS65930A2ZCHR", + "packageDrawing": "ZCH0139A", + "status": "source-ready", + "drawingId": "ZCH0139A", + "physicalPadToPortHint": {}, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "coordinateGrid": { + "rowOrder": [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P" + ], + "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14], + "pitchMm": 0.65, + "padShape": "circle", + "padDiameterMm": 0.35 + }, + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing ZCH0139A; official source https://www.ti.com/packaging/tw/docs/searchproductbypackage.tsp?orderablePartNumber=&packageDesignator=ZCH&pinCount=139&results=results" + }, + "TPS7A5301BRPSR": { + "family": "TPS7A53B", + "componentExportName": "TPS7A5301BRPSR", + "manufacturerPartNumber": "TPS7A5301BRPSR", + "packageDrawing": "RPS0012A", + "status": "source-ready", + "drawingId": "RPS0012A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RPS0012A; official source https://www.ti.com/lit/gpn/TPS7A53B pages 41" + }, + "TPS7E7101DBVR": { + "family": "TPS7E71", + "componentExportName": "TPS7E7101DBVR", + "manufacturerPartNumber": "TPS7E7101DBVR", + "packageDrawing": "DBV0005A", + "status": "source-ready", + "drawingId": "DBV0005A", + "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "OUT": "pin1", + "V_NEG": "pin2", + "IN_POS": "pin3", + "IN_NEG": "pin4", + "V_POS": "pin5" + }, + "ignoredPhysicalPins": ["Thermal pad"], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" + }, + "TPS92761QPHPRQ1": { + "family": "TPS92761-Q1", + "componentExportName": "TPS92761QPHPRQ1", + "manufacturerPartNumber": "TPS92761QPHPRQ1", + "packageDrawing": "PHP0048L", + "status": "source-ready", + "drawingId": "PHP0048L", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32", + "33": "pin33", + "34": "pin34", + "35": "pin35", + "36": "pin36", + "37": "pin37", + "38": "pin38", + "39": "pin39", + "40": "pin40", + "41": "pin41", + "42": "pin42", + "43": "pin43", + "44": "pin44", + "45": "pin45", + "46": "pin46", + "47": "pin47", + "48": "pin48", + "49": "pin49" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing PHP0048L; official source https://www.ti.com/lit/gpn/TPS92761-Q1 pages 9" + }, + "TPSM828301ARDSR": { + "family": "TPSM828301", + "componentExportName": "TPSM828301ARDSR", + "manufacturerPartNumber": "TPSM828301ARDSR", + "packageDrawing": "RDS0009A", + "status": "source-ready", + "drawingId": "RDS0009A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "VIN": "pin1", + "GND": "pin2", + "MODE": "pin3", + "FB": "pin4", + "VOS": "pin5", + "VOUT": "pin6", + "PG": "pin7", + "SW": "pin8", + "EN": "pin9" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing RDS0009A; donor TPSM828303ARDSR (JLCPCB C22445538)" + }, + "TPSM82901SISR": { + "family": "TPSM82901", + "componentExportName": "TPSM82901SISR", + "manufacturerPartNumber": "TPSM82901SISR", + "packageDrawing": "SIS0011A", + "status": "source-ready", + "drawingId": "SIS0011A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "VIN1": "pin1", + "VIN2": "pin2", + "EN": "pin3", + "pin4": "pin4", + "pin5": "pin5", + "PG": "pin6", + "pin7": "pin7", + "pin8": "pin8", + "VOUT1": "pin9", + "VOUT2": "pin10", + "GND": "pin11" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing SIS0011A; donor TPSM82903SISR (JLCPCB C6290583)" + }, + "TPSM863252RDXR": { + "family": "TPSM863252", + "componentExportName": "TPSM863252RDXR", + "manufacturerPartNumber": "TPSM863252RDXR", + "packageDrawing": "RDX0007A", + "status": "source-ready", + "drawingId": "RDX0007A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RDX0007A; official source https://www.ti.com/lit/gpn/TPSM863252 pages 29" + }, + "TPSM8A29RDGR": { + "family": "TPSM8A29", + "componentExportName": "TPSM8A29RDGR", + "manufacturerPartNumber": "TPSM8A29RDGR", + "packageDrawing": "RDG0025A", + "status": "source-ready", + "drawingId": "RDG0025A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + "14": "pin14", + "15": "pin15", + "16": "pin16", + "17": "pin17", + "18": "pin18", + "19": "pin19", + "20": "pin20", + "21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing RDG0025A; official source https://www.ti.com/lit/gpn/TPSM8A29 pages 43" + }, + "TUSB1004RNQR": { + "family": "TUSB1004", + "componentExportName": "TUSB1004RNQR", + "manufacturerPartNumber": "TUSB1004RNQR", + "packageDrawing": "RNQ0040A", + "status": "source-ready", + "drawingId": "RNQ0040A", + "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", + "physicalPadToPortHint": { + "VCC1": "pin1", + "DPEQ1": "pin2", + "SSEQ1": "pin3", + "SSRXn": "pin4", + "SSRXp": "pin5", + "VCC2": "pin6", + "SSTXn": "pin7", + "SSTXp": "pin8", + "DP0p": "pin9", + "DP0n": "pin10", + "pin11": "pin11", + "DP1p": "pin12", + "DP1n": "pin13", + "pin14": "pin14", + "DP2p": "pin15", + "DP2n": "pin16", + "I2C_EN": "pin17", + "DP3p": "pin18", + "DP3n": "pin19", + "VCC3": "pin20", + "pin21": "pin21", + "pin22": "pin22", + "pin23": "pin23", + "AUXp": "pin24", + "AUXn": "pin25", + "SBU2": "pin26", + "SBU1": "pin27", + "VCC4": "pin28", + "pin29": "pin29", + "RX1p": "pin30", + "RX1n": "pin31", + "pin32": "pin32", + "TX1p": "pin33", + "TX1n": "pin34", + "EQ1": "pin35", + "TX2n": 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"21": "pin21", + "22": "pin22", + "23": "pin23", + "24": "pin24", + "25": "pin25", + "26": "pin26", + "27": "pin27", + "28": "pin28", + "29": "pin29", + "30": "pin30", + "31": "pin31", + "32": "pin32" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing DGS0032A; official source https://www.ti.com/lit/gpn/TXE8124 pages 63" + }, + "TXV0108QWRGYRQ1": { + "family": "TXV0108-Q1", + "componentExportName": "TXV0108QWRGYRQ1", + "manufacturerPartNumber": "TXV0108QWRGYRQ1", + "packageDrawing": "RGY0024E", + "status": "source-ready", + "drawingId": "RGY0024E", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12", + "13": "pin13", + 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"supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing DGN0008H; donor UCC27624DGNR (JLCPCB C6581862)" + }, + "UCC27734DR": { + "family": "UCC27734", + "componentExportName": "UCC27734DR", + "manufacturerPartNumber": "UCC27734DR", + "packageDrawing": "D0008B", + "status": "source-ready", + "drawingId": "D0008B", + "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "VCC1": "pin1", + "IN_POS": "pin2", + "IN_NEG": "pin3", + "GND1": "pin4", + "VCC2": "pin5", + "OUTH": "pin6", + "OUTL": "pin7", + "VEE2": "pin8" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" + }, + "UCC27735DR": { + "family": "UCC27735", + "componentExportName": "UCC27735DR", + "manufacturerPartNumber": "UCC27735DR", + "packageDrawing": "D0014A", + "status": "source-ready", + "drawingId": "D0014A", + "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + "A": "pin1", + "pin2": "pin2", + "B": "pin3", + "pin4": "pin4", + "C": "pin5", + "pin6": "pin6", + "VSS": "pin7", + "pin8": "pin8", + "D": "pin9", + "pin10": "pin10", + "E": "pin11", + "pin12": "pin12", + "F": "pin13", + "VDD": "pin14" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "exact-jlc-drawing", + "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" + }, + "UCC28070QPWRQ1": { + "family": "UCC28070-Q1", + "componentExportName": "UCC28070QPWRQ1", + "manufacturerPartNumber": "UCC28070QPWRQ1", + "packageDrawing": "PW0020A", + "status": "source-ready", + "drawingId": "PW0020A", + "footprintPropSource": "footprint=\"dfn20_pillpads_p0.65mm_w7.4839mm_pw0.364mm_pl1.742mm_pin1location(leftside,bottom)\"", + "physicalPadToPortHint": { + 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(JLCPCB C34923)" + }, + "UCG28828-1REZR": { + "family": "UCG28828", + "componentExportName": "UCG28828_1REZR", + "manufacturerPartNumber": "UCG28828-1REZR", + "packageDrawing": "REZ0012A", + "status": "source-ready", + "drawingId": "REZ0012A", + "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", + "physicalPadToPortHint": { + "1": "pin1", + "2": "pin2", + "3": "pin3", + "4": "pin4", + "5": "pin5", + "6": "pin6", + "7": "pin7", + "8": "pin8", + "9": "pin9", + "10": "pin10", + "11": "pin11", + "12": "pin12" + }, + "ignoredPhysicalPins": [], + "supplementalPins": [], + "footprintSource": "official-ti-drawing", + "provenanceComment": "TI drawing REZ0012A; official source https://www.ti.com/lit/gpn/UCG28828 pages 41,42" + } + } +} diff --git a/lib/chips/ti-sysblocks-materialization-report.json b/lib/chips/ti-sysblocks-materialization-report.json new file mode 100644 index 00000000..42e34190 --- /dev/null +++ b/lib/chips/ti-sysblocks-materialization-report.json @@ -0,0 +1,791 @@ +{ + "schemaVersion": 1, + "summary": { + "targetEntries": 111, + "readyEntries": 111, + "blockedEntries": 0, + "officialPinoutBlockers": 0, + "exactFootprintBlockers": 0, + "pinMappingBlockers": 0 + }, + "ready": [ + { + "family": "74ACT16244", + "manufacturerPartNumber": "74ACT16244DGGR", + "componentExportName": "A_74ACT16244DGGR", + "packageDrawing": "DGG0048A", + "footprintSource": "exact-jlc-drawing" + }, + { + "family": "AM5726", + "manufacturerPartNumber": "AM5726BABCXA", + "componentExportName": "AM5726BABCXA", + "packageDrawing": "ABC0760A", + "footprintSource": "official-ti-drawing" + }, + { + "family": "AM62A3", + "manufacturerPartNumber": "AM62A32AOMHIAMBR", + "componentExportName": "AM62A32AOMHIAMBR", + "packageDrawing": "AMB0484A", + "footprintSource": "exact-jlc-drawing" + }, + { + "family": "AM67A", + "manufacturerPartNumber": "AM67A74AKGHIAMWR", + "componentExportName": "AM67A74AKGHIAMWR", + "packageDrawing": "AMW0594A", + "footprintSource": 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"number": "C10", + "name": "gpmc_be0n_cle", + "type": "", + "description": "" + }, + { + "number": "C11", + "name": "gpmc_ad13", + "type": "", + "description": "" + }, + { + "number": "C13", + "name": "mii1_txd2", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "mii1_rxd3", + "type": "", + "description": "" + }, + { + "number": "C16", + "name": "mii1_txd3", + "type": "", + "description": "" + }, + { + "number": "C17", + "name": "dss_data14", + "type": "", + "description": "" + }, + { + "number": "C19", + "name": "dss_data12", + "type": "", + "description": "" + }, + { + "number": "C20", + "name": "dss_data6", + "type": "", + "description": "" + }, + { + "number": "C21", + "name": "dss_data3", + "type": "", + "description": "" + }, + { + "number": "C23", + "name": "VDDS_OSC", + "type": "PWR", + "description": "" + }, + { + "number": "C24", + "name": "xdma_event_intr1", + "type": "", + "description": "" + }, + { + "number": "C25", + "name": "XTALIN", + "type": "", + "description": "" + }, + { + "number": "D1", + "name": "mmc0_clk", + "type": "", + "description": "" + }, + { + "number": "D2", + "name": "mmc0_cmd", + "type": "", + "description": "" + }, + { + "number": "D6", + "name": "CAP_VDDS1P8V_IO", + "type": "", + "description": "" + }, + { + "number": "D7", + "name": "gpmc_a4", + "type": "", + "description": "" + }, + { + "number": "D8", + "name": "gpmc_a11", + "type": "", + "description": "" + }, + { + "number": "D10", + "name": "gpmc_wen", + "type": "", + "description": "" + }, + { + "number": "D11", + "name": "gpmc_ad11", + "type": "", + "description": "" + }, + { + "number": "D13", + "name": "mii1_rx_clk", + "type": "", + "description": "" + }, + { + "number": "D14", + "name": "mii1_tx_clk", + "type": "", + "description": "" + }, + { + "number": "D16", + "name": "mii1_col", + "type": "", + "description": "" + }, + { + "number": "D17", + "name": "dss_data15", + "type": "", + "description": "" + }, + { + "number": "D19", + "name": "dss_data13", + "type": "", + "description": "" + }, + { + "number": "D20", + "name": "vdd_mpu_mon", + "type": "PWR", + "description": "" + }, + { + "number": "D24", + "name": "xdma_event_intr0", + "type": "", + "description": "" + }, + { + "number": "D25", + "name": "gpio5_8", + "type": "", + "description": "" + }, + { + "number": "E1", + "name": "ddr_d2", + "type": "", + "description": "" + }, + { + "number": "E2", + "name": "ddr_d1", + "type": "", + "description": "" + }, + { + "number": "E3", + "name": "ddr_d0", + "type": "", + "description": "" + }, + { + "number": "E7", + "name": "gpmc_a5", + "type": "", + "description": "" + }, + { + "number": "E8", + "name": "gpmc_a6", + "type": "", + "description": "" + }, + { + "number": "E10", + "name": "gpmc_oen_ren", + "type": "", + "description": "" + }, + { + "number": "E11", + "name": "gpmc_ad12", + "type": "", + "description": "" + }, + { + "number": "E13", + "name": "CAP_VDD_SRAM_C", + "type": "", + "description": "" + }, + { + "number": "E14", + "name": "CAP_VDD_SRAM_", + "type": "", + "description": "" + }, + { + "number": "E16", + "name": "mii1_rxd2", + "type": "", + "description": "" + }, + { + "number": "E17", + "name": "VDDS_PLL_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "E19", + "name": "dss_data7", + "type": "", + "description": "" + }, + { + "number": "E23", + "name": "VDDS_CLKOUT", + "type": "PWR", + "description": "" + }, + { + "number": "E24", + "name": "gpio5_13", + "type": "", + "description": "" + }, + { + "number": "E25", + "name": "gpio5_12", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "ddr_dqsn0", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "ddr_dqs0", + "type": "", + "description": "" + }, + { + "number": "F3", + "name": "ddr_d3", + "type": "", + "description": "" + }, + { + "number": "F4", + "name": "ddr_dqm0", + "type": "", + "description": "" + }, + { + "number": "F6", + "name": "gpmc_a7", + "type": "", + "description": "" + }, + { + "number": "F7", + "name": "gpmc_a8", + "type": "", + "description": "" + }, + { + "number": "F8", + "name": "VDDS3P3V_IOLDO", + "type": "PWR", + "description": "" + }, + { + "number": "F10", + "name": "gpmc_csn2", + "type": "", + "description": "" + }, + { + "number": "F11", + "name": "gpmc_ad10", + "type": "", + "description": "" + }, + { + "number": "F13", + "name": "VDDS_SRAM_COR", + "type": "PWR", + "description": "" + }, + { + "number": "F14", + "name": "VDDS_SRAM_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "F16", + "name": "VDDSHV7", + "type": "", + "description": "" + }, + { + "number": "F17", + "name": "mii1_rxd0", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "CAP_VBB_MPU", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "F22", + "name": "VDDSHV5", + "type": "", + "description": "" + }, + { + "number": "F23", + "name": "gpio5_11", + "type": "", + "description": "" + }, + { + "number": "F24", + "name": "gpio5_9", + "type": "", + "description": "" + }, + { + "number": "F25", + "name": "USB1_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "ddr_d7", + "type": "", + "description": "" + }, + { + "number": "G2", + "name": "ddr_d6", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "ddr_d5", + "type": "", + "description": "" + }, + { + "number": "G4", + "name": "ddr_d4", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "VDDS_PLL_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "G6", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "G8", + "name": "gpmc_a10", + "type": "", + "description": "" + }, + { + "number": "G10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "G11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "G13", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G14", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G16", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G20", + "name": "gpio5_10", + "type": "", + "description": "" + }, + { + "number": "G21", + "name": "USB0_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G22", + "name": "WARMRSTn", + "type": "", + "description": "" + }, + { + "number": "G24", + "name": "eCAP0_in_PWM0_o", + "type": "", + "description": "" + }, + { + "number": "G25", + "name": "EXTINTn", + "type": "", + "description": "" + }, + { + "number": "H1", + "name": "ddr_d8", + "type": "", + "description": "" + }, + { + "number": "H2", + "name": "ddr_dqm1", + "type": "", + "description": "" + }, + { + "number": "H8", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H9", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "H11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "H12", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "H13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "H18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H19", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H20", + "name": "clkreq", + "type": "", + "description": "" + }, + { + "number": "H21", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H22", + "name": "uart3_ctsn", + "type": "", + "description": "" + }, + { + "number": "H23", + "name": "mcasp0_axr0", + "type": "", + "description": "" + }, + { + "number": "H24", + "name": "uart3_txd", + "type": "", + "description": "" + }, + { + "number": "H25", + "name": "uart3_rxd", + "type": "", + "description": "" + }, + { + "number": "J1", + "name": "ddr_dqsn1", + "type": "", + "description": "" + }, + { + "number": "J2", + "name": "ddr_dqs1", + "type": "", + "description": "" + }, + { + "number": "J3", + "name": "ddr_d12", + "type": "", + "description": "" + }, + { + "number": "J4", + "name": "ddr_d11", + "type": "", + "description": "" + }, + { + "number": "J5", + "name": "ddr_d10", + "type": "", + "description": "" + }, + { + "number": "J6", + "name": "ddr_d9", + "type": "", + "description": "" + }, + { + "number": "J7", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J8", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J10", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "J24", + "name": "uart0_txd", + "type": "", + "description": "" + }, + { + "number": "J25", + "name": "uart0_rtsn", + "type": "", + "description": "" + }, + { + "number": "K1", + "name": "ddr_ba0", + "type": "", + "description": "" + }, + { + "number": "K2", + "name": "ddr_ba1", + "type": "", + "description": "" + }, + { + "number": "K3", + "name": "ddr_ba2", + "type": "", + "description": "" + }, + { + "number": "K4", + "name": "ddr_d15", + "type": "", + "description": "" + }, + { + "number": "K5", + "name": "ddr_d14", + "type": "", + "description": "" + }, + { + "number": "K6", + "name": "ddr_d13", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K17", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K21", + "name": "uart1_rxd", + "type": "", + "description": "" + }, + { + "number": "K22", + "name": "uart1_ctsn", + "type": "", + "description": "" + }, + { + "number": "K23", + "name": "mcasp0_fsr", + "type": "", + "description": "" + }, + { + "number": "K24", + "name": "uart3_rtsn", + "type": "", + "description": "" + }, + { + "number": "K25", + "name": "uart0_rxd", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "ddr_a1", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "ddr_a2", + "type": "", + "description": "" + }, + { + "number": "L8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L21", + "name": "uart1_txd", + "type": "", + "description": "" + }, + { + "number": "L22", + "name": "uart1_rtsn", + "type": "", + "description": "" + }, + { + "number": "L23", + "name": "mcasp0_aclkr", + "type": "", + "description": "" + }, + { + "number": "L24", + "name": "mcasp0_ahclkx", + "type": "", + "description": "" + }, + { + "number": "L25", + "name": "uart0_ctsn", + "type": "", + "description": "" + }, + { + "number": "M1", + "name": "ddr_nck", + "type": "", + "description": "" + }, + { + "number": "M2", + "name": "ddr_ck", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "ddr_cke0", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "ddr_csn1", + "type": "", + "description": "" + }, + { + "number": "M5", + "name": "ddr_csn0", + "type": "", + "description": "" + }, + { + "number": "M6", + "name": "ddr_a10", + "type": "", + "description": "" + }, + { + "number": "M7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M17", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M18", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M24", + "name": "mcasp0_ahclkr", + "type": "", + "description": "" + }, + { + "number": "M25", + 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+ "type": "", + "description": "" + }, + { + "number": "AC3", + "name": "ddr_vtp", + "type": "", + "description": "" + }, + { + "number": "AC5", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC6", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC7", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC9", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC10", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC12", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AC13", + "name": "ADC0_AIN5", + "type": "", + "description": "" + }, + { + "number": "AC15", + "name": "VSSA_ADC", + "type": "GND", + "description": "" + }, + { + "number": "AC16", + "name": "ADC1_AIN0", + "type": "", + "description": "" + }, + { + "number": "AC18", + "name": "cam0_field", + "type": "", + "description": "" + }, + { + "number": "AC20", + "name": "cam0_pclk", + "type": "", + "description": "" + }, + { + "number": "AC21", + "name": "cam1_data1", + "type": "", + "description": "" + }, + { + "number": "AC23", + "name": "cam1_vd", + "type": "", + "description": "" + }, + { + "number": "AC24", + "name": "cam1_data9", + "type": "", + "description": "" + }, + { + "number": "AC25", + "name": "cam1_field", + "type": "", + "description": "" + }, + { + "number": "AD1", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AD2", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AD3", + "name": "CAP_VDD_RTC", + "type": "", + "description": "" + }, + { + "number": "AD4", + "name": "VSS_RTC", + "type": "GND", + "description": "" + }, + { + "number": "AD5", + "name": "VDDS_RTC", + "type": "PWR", + "description": "" + }, + { + "number": "AD6", + "name": "RTC_PMIC_EN", + "type": "", + "description": "" + }, + { + "number": "AD7", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AD8", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "AD9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "AD10", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AD11", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AD12", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "AD13", + "name": "ADC0_AIN6", + "type": "", + "description": "" + }, + { + "number": "AD14", + "name": "ADC0_VREFP", + "type": "", + "description": "" + }, + { + "number": "AD15", + "name": "ADC1_VREFN", + "type": "", + "description": "" + }, + { + "number": "AD16", + "name": "ADC1_AIN7", + "type": "", + "description": "" + }, + { + "number": "AD17", + "name": "cam0_wen", + "type": "", + "description": "" + }, + { + "number": "AD18", + "name": "cam0_vd", + "type": "", + "description": "" + }, + { + "number": "AD19", + "name": "cam0_data5", + "type": "", + "description": "" + }, + { + "number": "AD20", + "name": "cam0_data7", + "type": "", + "description": "" + }, + { + "number": "AD21", + "name": "cam1_data2", + "type": "", + "description": "" + }, + { + "number": "AD22", + "name": "cam1_data4", + "type": "", + "description": "" + }, + { + "number": "AD23", + "name": "cam1_data6", + "type": "", + "description": "" + }, + { + "number": "AD24", + "name": "cam1_data8", + "type": "", + "description": "" + }, + { + "number": "AD25", + "name": "cam1_hd", + "type": "", + "description": "" + }, + { + "number": "AE1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AE2", + "name": "RTC_KALDO_EN", + "type": "", + "description": "" + }, + { + "number": "AE3", + "name": "RTC_WAKEUP", + "type": "", + "description": "" + }, + { + "number": "AE4", + "name": "RTC_XTALOUT", + "type": "", + "description": "" + }, + { + "number": "AE5", + "name": "RTC_XTALIN", + "type": "", + "description": "" + }, + { + "number": "AE6", + "name": "RTC_PWRONRST", + "type": "", + "description": "" + }, + { + "number": "AE7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AE8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AE9", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AE10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AE11", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AE12", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "AE13", + "name": "ADC0_AIN7", + "type": "", + "description": "" + }, + { + "number": "AE14", + "name": "ADC0_VREFN", + "type": "", + "description": "" + }, + { + "number": "AE15", + "name": "ADC1_VREFP", + "type": "", + "description": "" + }, + { + "number": "AE16", + "name": "ADC1_AIN6", + "type": "", + "description": "" + }, + { + "number": "AE17", + "name": "cam0_hd", + "type": "", + "description": "" + }, + { + "number": "AE18", + "name": "cam0_data0", + "type": "", + "description": "" + }, + { + "number": "AE19", + "name": "cam0_data4", + "type": "", + "description": "" + }, + { + "number": "AE20", + "name": "cam0_data6", + "type": "", + "description": "" + }, + { + "number": "AE21", + "name": "cam1_pclk", + "type": "", + "description": "" + }, + { + "number": "AE22", + "name": "cam1_data3", + "type": "", + "description": "" + }, + { + "number": "AE23", + "name": "cam1_data5", + "type": "", + "description": "" + }, + { + "number": "AE24", + "name": "cam1_data7", + "type": "", + "description": "" + }, + { + "number": "AE25", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "mmc0_dat3", + "type": "", + "description": "" + }, + { + "number": "B2", + "name": "mmc0_dat2", + "type": "", + "description": "" + }, + { + "number": "B3", + "name": "gpmc_wpn", + "type": "", + "description": "" + }, + { + "number": "B4", + "name": "gpmc_a9", + "type": "", + "description": "" + }, + { + "number": "B5", + "name": "gpmc_ad0", + "type": "", + "description": "" + }, + { + "number": "B6", + "name": "gpmc_ad2", + "type": "", + "description": "" + }, + { + "number": "B7", + "name": "gpmc_ad4", + "type": "", + "description": "" + }, + { + "number": "B8", + "name": "gpmc_ad7", + "type": "", + "description": "" + }, + { + "number": "B9", + "name": "gpmc_csn1", + "type": "", + "description": "" + }, + { + "number": "B10", + "name": "gpmc_ad8", + "type": "", + "description": "" + }, + { + "number": "B11", + "name": "gpmc_ad14", + "type": "", + "description": "" + }, + { + "number": "B12", + "name": "gpmc_csn3", + "type": "", + "description": "" + }, + { + "number": "B13", + "name": "mii1_rx_er", + "type": "", + "description": "" + }, + { + "number": "B14", + "name": "mii1_crs", + "type": "", + "description": "" + }, + { + "number": "B15", + "name": "mii1_txd0", + "type": "", + "description": "" + }, + { + "number": "B16", + "name": "mii1_rxd1", + "type": "", + "description": "" + }, + { + "number": "B17", + "name": "mdio_clk", + "type": "", + "description": "" + }, + { + "number": "B18", + "name": "dss_data11", + "type": "", + "description": "" + }, + { + "number": "B19", + "name": "dss_data9", + "type": "", + "description": "" + }, + { + "number": "B20", + "name": "dss_data5", + "type": "", + "description": "" + }, + { + "number": "B21", + "name": "dss_data2", + "type": "", + "description": "" + }, + { + "number": "B22", + "name": "dss_data0", + "type": "", + "description": "" + }, + { + "number": "B23", + "name": "dss_vsync", + "type": "", + "description": "" + }, + { + "number": "B24", + "name": "VSS_OSC", + "type": "GND", + "description": "" + }, + { + "number": "B25", + "name": "XTALOUT", + "type": "", + "description": "" + }, + { + "number": "C1", + "name": "mmc0_dat0", + "type": "", + "description": "" + }, + { + "number": "C2", + "name": "mmc0_dat1", + "type": "", + "description": "" + }, + { + "number": "C3", + "name": "gpmc_a0", + "type": "", + "description": "" + }, + { + "number": "C5", + "name": "gpmc_a1", + "type": "", + "description": "" + }, + { + "number": "C6", + "name": "gpmc_a2", + "type": "", + "description": "" + }, + { + "number": "C8", + "name": "gpmc_ad6", + "type": "", + "description": "" + }, + { + "number": "C10", + "name": "gpmc_be0n_cle", + "type": "", + "description": "" + }, + { + "number": "C11", + "name": "gpmc_ad13", + "type": "", + "description": "" + }, + { + "number": "C13", + "name": "mii1_txd2", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "mii1_rxd3", + "type": "", + "description": "" + }, + { + "number": "C16", + "name": "mii1_txd3", + "type": "", + "description": "" + }, + { + "number": "C17", + "name": "dss_data14", + "type": "", + "description": "" + }, + { + "number": "C19", + "name": "dss_data12", + "type": "", + "description": "" + }, + { + "number": "C20", + "name": "dss_data6", + "type": "", + "description": "" + }, + { + "number": "C21", + "name": "dss_data3", + "type": "", + "description": "" + }, + { + "number": "C23", + "name": "VDDS_OSC", + "type": "PWR", + "description": "" + }, + { + "number": "C24", + "name": "xdma_event_intr1", + "type": "", + "description": "" + }, + { + "number": "C25", + "name": "XTALIN", + "type": "", + "description": "" + }, + { + "number": "D1", + "name": "mmc0_clk", + "type": "", + "description": "" + }, + { + "number": "D2", + "name": "mmc0_cmd", + "type": "", + "description": "" + }, + { + "number": "D6", + "name": "CAP_VDDS1P8V_IO", + "type": "", + "description": "" + }, + { + "number": "D7", + "name": "gpmc_a4", + "type": "", + "description": "" + }, + { + "number": "D8", + "name": "gpmc_a11", + "type": "", + "description": "" + }, + { + "number": "D10", + "name": "gpmc_wen", + "type": "", + "description": "" + }, + { + "number": "D11", + "name": "gpmc_ad11", + "type": "", + "description": "" + }, + { + "number": "D13", + "name": "mii1_rx_clk", + "type": "", + "description": "" + }, + { + "number": "D14", + "name": "mii1_tx_clk", + "type": "", + "description": "" + }, + { + "number": "D16", + "name": "mii1_col", + "type": "", + "description": "" + }, + { + "number": "D17", + "name": "dss_data15", + "type": "", + "description": "" + }, + { + "number": "D19", + "name": "dss_data13", + "type": "", + "description": "" + }, + { + "number": "D20", + "name": "vdd_mpu_mon", + "type": "PWR", + "description": "" + }, + { + "number": "D24", + "name": "xdma_event_intr0", + "type": "", + "description": "" + }, + { + "number": "D25", + "name": "gpio5_8", + "type": "", + "description": "" + }, + { + "number": "E1", + "name": "ddr_d2", + "type": "", + "description": "" + }, + { + "number": "E2", + "name": "ddr_d1", + "type": "", + "description": "" + }, + { + "number": "E3", + "name": "ddr_d0", + "type": "", + "description": "" + }, + { + "number": "E7", + "name": "gpmc_a5", + "type": "", + "description": "" + }, + { + "number": "E8", + "name": "gpmc_a6", + "type": "", + "description": "" + }, + { + "number": "E10", + "name": "gpmc_oen_ren", + "type": "", + "description": "" + }, + { + "number": "E11", + "name": "gpmc_ad12", + "type": "", + "description": "" + }, + { + "number": "E13", + "name": "CAP_VDD_SRAM_C", + "type": "", + "description": "" + }, + { + "number": "E14", + "name": "CAP_VDD_SRAM_", + "type": "", + "description": "" + }, + { + "number": "E16", + "name": "mii1_rxd2", + "type": "", + "description": "" + }, + { + "number": "E17", + "name": "VDDS_PLL_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "E19", + "name": "dss_data7", + "type": "", + "description": "" + }, + { + "number": "E23", + "name": "VDDS_CLKOUT", + "type": "PWR", + "description": "" + }, + { + "number": "E24", + "name": "gpio5_13", + "type": "", + "description": "" + }, + { + "number": "E25", + "name": "gpio5_12", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "ddr_dqsn0", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "ddr_dqs0", + "type": "", + "description": "" + }, + { + "number": "F3", + "name": "ddr_d3", + "type": "", + "description": "" + }, + { + "number": "F4", + "name": "ddr_dqm0", + "type": "", + "description": "" + }, + { + "number": "F6", + "name": "gpmc_a7", + "type": "", + "description": "" + }, + { + "number": "F7", + "name": "gpmc_a8", + "type": "", + "description": "" + }, + { + "number": "F8", + "name": "VDDS3P3V_IOLDO", + "type": "PWR", + "description": "" + }, + { + "number": "F10", + "name": "gpmc_csn2", + "type": "", + "description": "" + }, + { + "number": "F11", + "name": "gpmc_ad10", + "type": "", + "description": "" + }, + { + "number": "F13", + "name": "VDDS_SRAM_COR", + "type": "PWR", + "description": "" + }, + { + "number": "F14", + "name": "VDDS_SRAM_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "F16", + "name": "VDDSHV7", + "type": "", + "description": "" + }, + { + "number": "F17", + "name": "mii1_rxd0", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "CAP_VBB_MPU", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "F22", + "name": "VDDSHV5", + "type": "", + "description": "" + }, + { + "number": "F23", + "name": "gpio5_11", + "type": "", + "description": "" + }, + { + "number": "F24", + "name": "gpio5_9", + "type": "", + "description": "" + }, + { + "number": "F25", + "name": "USB1_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "ddr_d7", + "type": "", + "description": "" + }, + { + "number": "G2", + "name": "ddr_d6", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "ddr_d5", + "type": "", + "description": "" + }, + { + "number": "G4", + "name": "ddr_d4", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "VDDS_PLL_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "G6", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "G8", + "name": "gpmc_a10", + "type": "", + "description": "" + }, + { + "number": "G10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "G11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "G13", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G14", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G16", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G20", + "name": "gpio5_10", + "type": "", + "description": "" + }, + { + "number": "G21", + "name": "USB0_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G22", + "name": "WARMRSTn", + "type": "", + "description": "" + }, + { + "number": "G24", + "name": "eCAP0_in_PWM0_o", + "type": "", + "description": "" + }, + { + "number": "G25", + "name": "EXTINTn", + "type": "", + "description": "" + }, + { + "number": "H1", + "name": "ddr_d8", + "type": "", + "description": "" + }, + { + "number": "H2", + "name": "ddr_dqm1", + "type": "", + "description": "" + }, + { + "number": "H8", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H9", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "H11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "H12", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "H13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "H18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H19", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H20", + "name": "clkreq", + "type": "", + "description": "" + }, + { + "number": "H21", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H22", + "name": "uart3_ctsn", + "type": "", + "description": "" + }, + { + "number": "H23", + "name": "mcasp0_axr0", + "type": "", + "description": "" + }, + { + "number": "H24", + "name": "uart3_txd", + "type": "", + "description": "" + }, + { + "number": "H25", + "name": "uart3_rxd", + "type": "", + "description": "" + }, + { + "number": "J1", + "name": "ddr_dqsn1", + "type": "", + "description": "" + }, + { + "number": "J2", + "name": "ddr_dqs1", + "type": "", + "description": "" + }, + { + "number": "J3", + "name": "ddr_d12", + "type": "", + "description": "" + }, + { + "number": "J4", + "name": "ddr_d11", + "type": "", + "description": "" + }, + { + "number": "J5", + "name": "ddr_d10", + "type": "", + "description": "" + }, + { + "number": "J6", + "name": "ddr_d9", + "type": "", + "description": "" + }, + { + "number": "J7", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J8", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J10", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "J24", + "name": "uart0_txd", + "type": "", + "description": "" + }, + { + "number": "J25", + "name": "uart0_rtsn", + "type": "", + "description": "" + }, + { + "number": "K1", + "name": "ddr_ba0", + "type": "", + "description": "" + }, + { + "number": "K2", + "name": "ddr_ba1", + "type": "", + "description": "" + }, + { + "number": "K3", + "name": "ddr_ba2", + "type": "", + "description": "" + }, + { + "number": "K4", + "name": "ddr_d15", + "type": "", + "description": "" + }, + { + "number": "K5", + "name": "ddr_d14", + "type": "", + "description": "" + }, + { + "number": "K6", + "name": "ddr_d13", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K17", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K21", + "name": "uart1_rxd", + "type": "", + "description": "" + }, + { + "number": "K22", + "name": "uart1_ctsn", + "type": "", + "description": "" + }, + { + "number": "K23", + "name": "mcasp0_fsr", + "type": "", + "description": "" + }, + { + "number": "K24", + "name": "uart3_rtsn", + "type": "", + "description": "" + }, + { + "number": "K25", + "name": "uart0_rxd", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "ddr_a1", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "ddr_a2", + "type": "", + "description": "" + }, + { + "number": "L8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L21", + "name": "uart1_txd", + "type": "", + "description": "" + }, + { + "number": "L22", + "name": "uart1_rtsn", + "type": "", + "description": "" + }, + { + "number": "L23", + "name": "mcasp0_aclkr", + "type": "", + "description": "" + }, + { + "number": "L24", + "name": "mcasp0_ahclkx", + "type": "", + "description": "" + }, + { + "number": "L25", + "name": "uart0_ctsn", + "type": "", + "description": "" + }, + { + "number": "M1", + "name": "ddr_nck", + "type": "", + "description": "" + }, + { + "number": "M2", + "name": "ddr_ck", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "ddr_cke0", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "ddr_csn1", + "type": "", + "description": "" + }, + { + "number": "M5", + "name": "ddr_csn0", + "type": "", + "description": "" + }, + { + "number": "M6", + "name": "ddr_a10", + "type": "", + "description": "" + }, + { + "number": "M7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M17", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M18", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M24", + "name": "mcasp0_ahclkr", + "type": "", + "description": "" + }, + { + "number": "M25", + "name": "mcasp0_axr1", + "type": "", + "description": "" + }, + { + "number": "N1", + "name": "ddr_a0", + "type": "", + "description": "" + }, + { + "number": "N2", + "name": "ddr_rasn", + "type": "", + "description": "" + }, + { + "number": "N3", + "name": "ddr_casn", + "type": "", + "description": "" + }, + { + "number": "N4", + "name": "ddr_wen", + "type": "", + "description": "" + }, + { + "number": "N5", + "name": "ddr_a13", + "type": "", + "description": "" + }, + { + "number": "N6", + "name": "ddr_cke1", + "type": "", + "description": "" + }, + { + "number": "N7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "N8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "N9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N16", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N17", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "N19", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "N20", + "name": "spi2_sclk", + "type": "", + "description": "" + }, + { + "number": "N21", + "name": "VDDS_PLL_CORE_", + "type": "PWR", + "description": "" + }, + { + "number": "N22", + "name": "mcasp0_fsx", + "type": "", + "description": "" + }, + { + "number": "N23", + "name": "EMU0", + "type": "", + "description": "" + }, + { + "number": "N24", + "name": "mcasp0_aclkx", + "type": "", + "description": "" + }, + { + "number": "N25", + "name": "spi4_cs0", + "type": "", + "description": "" + }, + { + "number": "P1", + "name": "ddr_a4", + "type": "", + "description": "" + }, + { + "number": "P2", + "name": "ddr_a3", + "type": "", + "description": "" + }, + { + "number": "P8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P16", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P17", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "P19", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "P20", + "name": "spi2_d1", + "type": "", + "description": "" + }, + { + "number": "P21", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "P22", + "name": "spi2_d0", + "type": "", + "description": "" + }, + { + "number": "P23", + "name": "spi0_sclk", + "type": "", + "description": "" + }, + { + "number": "P24", + "name": "spi4_d1", + "type": "", + "description": "" + }, + { + "number": "P25", + "name": "spi4_sclk", + "type": "", + "description": "" + }, + { + "number": "R1", + "name": "ddr_a9", + "type": "", + "description": "" + }, + { + "number": "R2", + "name": "ddr_a8", + "type": "", + "description": "" + }, + { + "number": "R3", + "name": "ddr_a7", + "type": "", + "description": "" + }, + { + "number": "R4", + "name": "ddr_a6", + "type": "", + "description": "" + }, + { + "number": "R5", + "name": "ddr_a5", + "type": "", + "description": "" + }, + { + "number": "R6", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R24", + "name": "spi4_d0", + "type": "", + "description": "" + }, + { + "number": "R25", + "name": "spi0_cs1", + "type": "", + "description": "" + }, + { + "number": "T1", + "name": "ddr_resetn", + "type": "", + "description": "" + }, + { + "number": "T2", + "name": "ddr_a15", + "type": "", + "description": "" + }, + { + "number": "T3", + "name": "ddr_a14", + "type": "", + "description": "" + }, + { + "number": "T4", + "name": "ddr_a12", + "type": "", + "description": "" + }, + { + "number": "T5", + "name": "ddr_a11", + "type": "", + "description": "" + }, + { + "number": "T6", + "name": "ddr_vref", + "type": "", + "description": "" + }, + { + "number": "T7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "T8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "T9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T18", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T19", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T20", + "name": "spi0_cs0", + "type": "", + "description": "" + }, + { + "number": "T21", + "name": "spi0_d1", + "type": "", + "description": "" + }, + { + "number": "T22", + "name": "spi0_d0", + "type": "", + "description": "" + }, + { + "number": "T23", + "name": "spi2_cs0", + "type": "", + "description": "" + }, + { + "number": "T24", + "name": "EMU1", + "type": "", + "description": "" + }, + { + "number": "T25", + "name": "USB1_VBUS", + "type": "", + "description": "" + }, + { + "number": "U1", + "name": "ddr_odt0", + "type": "", + "description": "" + }, + { + "number": "U2", + "name": "ddr_odt1", + "type": "", + "description": "" + }, + { + "number": "U8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U15", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "U16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U19", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U20", + "name": "VDDA3P3V_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "U21", + "name": "VDDA1P8V_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "U22", + "name": "USB1_CE", + "type": "", + "description": "" + }, + { + "number": "U23", + "name": "USB0_VBUS", + "type": "", + "description": "" + }, + { + "number": "U24", + "name": "USB0_ID", + "type": "", + "description": "" + }, + { + "number": "U25", + "name": "USB1_ID", + "type": "", + "description": "" + }, + { + "number": "V1", + "name": "ddr_d20", + "type": "", + "description": "" + }, + { + "number": "V2", + "name": "ddr_d19", + "type": "", + "description": "" + }, + { + "number": "V3", + "name": "ddr_d18", + "type": "", + "description": "" + }, + { + "number": "V4", + "name": "ddr_d17", + "type": "", + "description": "" + }, + { + "number": "V5", + "name": "ddr_d16", + "type": "", + "description": "" + }, + { + "number": "V6", + "name": "ddr_dqm2", + "type": "", + "description": "" + }, + { + "number": "V7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "V8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "V9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V15", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "V16", + "name": "VDDSHV2", + "type": "", + "description": "" + }, + { + "number": "V17", + "name": "VDDSHV2", + "type": "", + "description": "" + }, + { + "number": "V18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V24", + "name": "USB1_DP", + "type": "", + "description": "" + }, + { + "number": "V25", + "name": "USB1_DM", + "type": "", + "description": "" + }, + { + "number": "W1", + "name": "ddr_dqs2", + "type": "", + "description": "" + }, + { + "number": "W2", + "name": "ddr_dqsn2", + "type": "", + "description": "" + }, + { + "number": "W4", + "name": "ddr_d21", + "type": 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"number": "E14", + "name": "CAP_VDD_SRAM_", + "type": "", + "description": "" + }, + { + "number": "E16", + "name": "mii1_rxd2", + "type": "", + "description": "" + }, + { + "number": "E17", + "name": "VDDS_PLL_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "E19", + "name": "dss_data7", + "type": "", + "description": "" + }, + { + "number": "E23", + "name": "VDDS_CLKOUT", + "type": "PWR", + "description": "" + }, + { + "number": "E24", + "name": "gpio5_13", + "type": "", + "description": "" + }, + { + "number": "E25", + "name": "gpio5_12", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "ddr_dqsn0", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "ddr_dqs0", + "type": "", + "description": "" + }, + { + "number": "F3", + "name": "ddr_d3", + "type": "", + "description": "" + }, + { + "number": "F4", + "name": "ddr_dqm0", + "type": "", + "description": "" + }, + { + "number": "F6", + "name": "gpmc_a7", + "type": "", + "description": "" + }, + { + "number": "F7", + "name": "gpmc_a8", + "type": "", + "description": "" + }, + { + "number": "F8", + "name": "VDDS3P3V_IOLDO", + "type": "PWR", + "description": "" + }, + { + "number": "F10", + "name": "gpmc_csn2", + "type": "", + "description": "" + }, + { + "number": "F11", + "name": "gpmc_ad10", + "type": "", + "description": "" + }, + { + "number": "F13", + "name": "VDDS_SRAM_COR", + "type": "PWR", + "description": "" + }, + { + "number": "F14", + "name": "VDDS_SRAM_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "F16", + "name": "VDDSHV7", + "type": "", + "description": "" + }, + { + "number": "F17", + "name": "mii1_rxd0", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "CAP_VBB_MPU", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "F22", + "name": "VDDSHV5", + "type": "", + "description": "" + }, + { + "number": "F23", + "name": "gpio5_11", + "type": "", + "description": "" + }, + { + "number": "F24", + "name": "gpio5_9", + "type": "", + "description": "" + }, + { + "number": "F25", + "name": "USB1_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "ddr_d7", + "type": "", + "description": "" + }, + { + "number": "G2", + "name": "ddr_d6", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "ddr_d5", + "type": "", + "description": "" + }, + { + "number": "G4", + "name": "ddr_d4", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "VDDS_PLL_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "G6", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "G8", + "name": "gpmc_a10", + "type": "", + "description": "" + }, + { + "number": "G10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "G11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "G13", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G14", + "name": "VDDSHV8", + "type": "", + "description": "" + }, + { + "number": "G16", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "G20", + "name": "gpio5_10", + "type": "", + "description": "" + }, + { + "number": "G21", + "name": "USB0_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "G22", + "name": "WARMRSTn", + "type": "", + "description": "" + }, + { + "number": "G24", + "name": "eCAP0_in_PWM0_o", + "type": "", + "description": "" + }, + { + "number": "G25", + "name": "EXTINTn", + "type": "", + "description": "" + }, + { + "number": "H1", + "name": "ddr_d8", + "type": "", + "description": "" + }, + { + "number": "H2", + "name": "ddr_dqm1", + "type": "", + "description": "" + }, + { + "number": "H8", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H9", + "name": "VDDSHV11", + "type": "", + "description": "" + }, + { + "number": "H10", + "name": "VDDSHV10", + "type": "", + "description": "" + }, + { + "number": "H11", + "name": "VDDSHV9", + "type": "", + "description": "" + }, + { + "number": "H12", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "H13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "H17", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "H18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H19", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H20", + "name": "clkreq", + "type": "", + "description": "" + }, + { + "number": "H21", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "H22", + "name": "uart3_ctsn", + "type": "", + "description": "" + }, + { + "number": "H23", + "name": "mcasp0_axr0", + "type": "", + "description": "" + }, + { + "number": "H24", + "name": "uart3_txd", + "type": "", + "description": "" + }, + { + "number": "H25", + "name": "uart3_rxd", + "type": "", + "description": "" + }, + { + "number": "J1", + "name": "ddr_dqsn1", + "type": "", + "description": "" + }, + { + "number": "J2", + "name": "ddr_dqs1", + "type": "", + "description": "" + }, + { + "number": "J3", + "name": "ddr_d12", + "type": "", + "description": "" + }, + { + "number": "J4", + "name": "ddr_d11", + "type": "", + "description": "" + }, + { + "number": "J5", + "name": "ddr_d10", + "type": "", + "description": "" + }, + { + "number": "J6", + "name": "ddr_d9", + "type": "", + "description": "" + }, + { + "number": "J7", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J8", + "name": "VDDSHV1", + "type": "", + "description": "" + }, + { + "number": "J9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J10", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "J12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J13", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J14", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J16", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "J17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "J24", + "name": "uart0_txd", + "type": "", + "description": "" + }, + { + "number": "J25", + "name": "uart0_rtsn", + "type": "", + "description": "" + }, + { + "number": "K1", + "name": "ddr_ba0", + "type": "", + "description": "" + }, + { + "number": "K2", + "name": "ddr_ba1", + "type": "", + "description": "" + }, + { + "number": "K3", + "name": "ddr_ba2", + "type": "", + "description": "" + }, + { + "number": "K4", + "name": "ddr_d15", + "type": "", + "description": "" + }, + { + "number": "K5", + "name": "ddr_d14", + "type": "", + "description": "" + }, + { + "number": "K6", + "name": "ddr_d13", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K17", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "K19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "K21", + "name": "uart1_rxd", + "type": "", + "description": "" + }, + { + "number": "K22", + "name": "uart1_ctsn", + "type": "", + "description": "" + }, + { + "number": "K23", + "name": "mcasp0_fsr", + "type": "", + "description": "" + }, + { + "number": "K24", + "name": "uart3_rtsn", + "type": "", + "description": "" + }, + { + "number": "K25", + "name": "uart0_rxd", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "ddr_a1", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "ddr_a2", + "type": "", + "description": "" + }, + { + "number": "L8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "L15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "L19", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L20", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "L21", + "name": "uart1_txd", + "type": "", + "description": "" + }, + { + "number": "L22", + "name": "uart1_rtsn", + "type": "", + "description": "" + }, + { + "number": "L23", + "name": "mcasp0_aclkr", + "type": "", + "description": "" + }, + { + "number": "L24", + "name": "mcasp0_ahclkx", + "type": "", + "description": "" + }, + { + "number": "L25", + "name": "uart0_ctsn", + "type": "", + "description": "" + }, + { + "number": "M1", + "name": "ddr_nck", + "type": "", + "description": "" + }, + { + "number": "M2", + "name": "ddr_ck", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "ddr_cke0", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "ddr_csn1", + "type": "", + "description": "" + }, + { + "number": "M5", + "name": "ddr_csn0", + "type": "", + "description": "" + }, + { + "number": "M6", + "name": "ddr_a10", + "type": "", + "description": "" + }, + { + "number": "M7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "M15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "M17", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M18", + "name": "VDD_MPU", + "type": "PWR", + "description": "" + }, + { + "number": "M24", + "name": "mcasp0_ahclkr", + "type": "", + "description": "" + }, + { + "number": "M25", + "name": "mcasp0_axr1", + "type": "", + "description": "" + }, + { + "number": "N1", + "name": "ddr_a0", + "type": "", + "description": "" + }, + { + "number": "N2", + "name": "ddr_rasn", + "type": "", + "description": "" + }, + { + "number": "N3", + "name": "ddr_casn", + "type": "", + "description": "" + }, + { + "number": "N4", + "name": "ddr_wen", + "type": "", + "description": "" + }, + { + "number": "N5", + "name": "ddr_a13", + "type": "", + "description": "" + }, + { + "number": "N6", + "name": "ddr_cke1", + "type": "", + "description": "" + }, + { + "number": "N7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "N8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "N9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "N16", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N17", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "N18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "N19", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "N20", + "name": "spi2_sclk", + "type": "", + "description": "" + }, + { + "number": "N21", + "name": "VDDS_PLL_CORE_", + "type": "PWR", + "description": "" + }, + { + "number": "N22", + "name": "mcasp0_fsx", + "type": "", + "description": "" + }, + { + "number": "N23", + "name": "EMU0", + "type": "", + "description": "" + }, + { + "number": "N24", + "name": "mcasp0_aclkx", + "type": "", + "description": "" + }, + { + "number": "N25", + "name": "spi4_cs0", + "type": "", + "description": "" + }, + { + "number": "P1", + "name": "ddr_a4", + "type": "", + "description": "" + }, + { + "number": "P2", + "name": "ddr_a3", + "type": "", + "description": "" + }, + { + "number": "P8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P16", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P17", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "P19", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "P20", + "name": "spi2_d1", + "type": "", + "description": "" + }, + { + "number": "P21", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "P22", + "name": "spi2_d0", + "type": "", + "description": "" + }, + { + "number": "P23", + "name": "spi0_sclk", + "type": "", + "description": "" + }, + { + "number": "P24", + "name": "spi4_d1", + "type": "", + "description": "" + }, + { + "number": "P25", + "name": "spi4_sclk", + "type": "", + "description": "" + }, + { + "number": "R1", + "name": "ddr_a9", + "type": "", + "description": "" + }, + { + "number": "R2", + "name": "ddr_a8", + "type": "", + "description": "" + }, + { + "number": "R3", + "name": "ddr_a7", + "type": "", + "description": "" + }, + { + "number": "R4", + "name": "ddr_a6", + "type": "", + "description": "" + }, + { + "number": "R5", + "name": "ddr_a5", + "type": "", + "description": "" + }, + { + "number": "R6", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "R9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "R15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R24", + "name": "spi4_d0", + "type": "", + "description": "" + }, + { + "number": "R25", + "name": "spi0_cs1", + "type": "", + "description": "" + }, + { + "number": "T1", + "name": "ddr_resetn", + "type": "", + "description": "" + }, + { + "number": "T2", + "name": "ddr_a15", + "type": "", + "description": "" + }, + { + "number": "T3", + "name": "ddr_a14", + "type": "", + "description": "" + }, + { + "number": "T4", + "name": "ddr_a12", + "type": "", + "description": "" + }, + { + "number": "T5", + "name": "ddr_a11", + "type": "", + "description": "" + }, + { + "number": "T6", + "name": "ddr_vref", + "type": "", + "description": "" + }, + { + "number": "T7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "T8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "T9", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T11", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "T18", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T19", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "T20", + "name": "spi0_cs0", + "type": "", + "description": "" + }, + { + "number": "T21", + "name": "spi0_d1", + "type": "", + "description": "" + }, + { + "number": "T22", + "name": "spi0_d0", + "type": "", + "description": "" + }, + { + "number": "T23", + "name": "spi2_cs0", + "type": "", + "description": "" + }, + { + "number": "T24", + "name": "EMU1", + "type": "", + "description": "" + }, + { + "number": "T25", + "name": "USB1_VBUS", + "type": "", + "description": "" + }, + { + "number": "U1", + "name": "ddr_odt0", + "type": "", + "description": "" + }, + { + "number": "U2", + "name": "ddr_odt1", + "type": "", + "description": "" + }, + { + "number": "U8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U15", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "U16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U19", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "U20", + "name": "VDDA3P3V_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "U21", + "name": "VDDA1P8V_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "U22", + "name": "USB1_CE", + "type": "", + "description": "" + }, + { + "number": "U23", + "name": "USB0_VBUS", + "type": "", + "description": "" + }, + { + "number": "U24", + "name": "USB0_ID", + "type": "", + "description": "" + }, + { + "number": "U25", + "name": "USB1_ID", + "type": "", + "description": "" + }, + { + "number": "V1", + "name": "ddr_d20", + "type": "", + "description": "" + }, + { + "number": "V2", + "name": "ddr_d19", + "type": "", + "description": "" + }, + { + "number": "V3", + "name": "ddr_d18", + "type": "", + "description": "" + }, + { + "number": "V4", + "name": "ddr_d17", + "type": "", + "description": "" + }, + { + "number": "V5", + "name": "ddr_d16", + "type": "", + "description": "" + }, + { + "number": "V6", + "name": "ddr_dqm2", + "type": "", + "description": "" + }, + { + "number": "V7", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "V8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "V9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V15", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "V16", + "name": "VDDSHV2", + "type": "", + "description": "" + }, + { + "number": "V17", + "name": "VDDSHV2", + "type": "", + "description": "" + }, + { + "number": "V18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V24", + "name": "USB1_DP", + "type": "", + "description": "" + }, + { + "number": "V25", + "name": "USB1_DM", + "type": "", + "description": "" + }, + { + "number": "W1", + "name": "ddr_dqs2", + "type": "", + "description": "" + }, + { + "number": "W2", + "name": "ddr_dqsn2", + "type": "", + "description": "" + }, + { + "number": "W4", + "name": "ddr_d21", + "type": "", + "description": "" + }, + { + "number": "W5", + "name": "ddr_d22", + "type": "", + "description": "" + }, + { + "number": "W6", + "name": "ddr_d23", + "type": "", + "description": "" + }, + { + "number": "W10", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "W12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "W13", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "W15", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "W16", + "name": "VDDSHV2", + "type": "", + "description": "" + }, + { + "number": "W18", + "name": "VDDSHV3", + "type": "", + "description": "" + }, + { + "number": "W20", + "name": "VDDA3P3V_USB0", + "type": "PWR", + "description": "" + }, + { + "number": "W21", + "name": "VDDA1P8V_USB0", + "type": "PWR", + "description": "" + }, + { + "number": "W22", + "name": "USB0_CE", + "type": "", + "description": "" + }, + { + "number": "W23", + "name": "VSSA_USB", + "type": "GND", + "description": "" + }, + { + "number": "W24", + "name": "USB0_DM", + "type": "", + "description": "" + }, + { + "number": "W25", + "name": "USB0_DP", + "type": "", + "description": "" + }, + { + "number": "Y1", + "name": "ddr_dqm3", + "type": "", + "description": "" + }, + { + "number": "Y2", + "name": "ddr_d24", + "type": "", + "description": "" + }, + { + "number": "Y3", + "name": "ddr_d25", + "type": "", + "description": "" + }, + { + "number": "Y4", + "name": "ddr_d26", + "type": "", + "description": "" + }, + { + "number": "Y6", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "Y7", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "Y10", + "name": "Reserved", + "type": "NC", + "description": "" + }, + { + "number": "Y12", + "name": "ADC0_AIN1", + "type": "", + "description": "" + }, + { + "number": "Y13", + "name": "ADC0_AIN2", + "type": "", + "description": "" + }, + { + "number": "Y15", + "name": "ADC1_AIN5", + "type": "", + "description": "" + }, + { + "number": "Y16", + "name": "VDDA_ADC1", + "type": "PWR", + "description": "" + }, + { + "number": "Y18", + "name": "cam0_data2", + "type": "", + "description": "" + }, + { + "number": "Y19", + "name": "VDDS", + "type": "PWR", + "description": "" + }, + { + "number": "Y20", + "name": "TDI", + "type": "", + "description": "" + }, + { + "number": "Y22", + "name": "I2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "Y23", + "name": "PWRONRSTn", + "type": "", + "description": "" + }, + { + "number": "Y24", + "name": "TMS", + "type": "", + "description": "" + }, + { + "number": "Y25", + "name": "nTRST", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/AM4379", + "pdfSha256": "0e5ea8386004c6073b3fbba836188621a1ec567ddb906b568e6acbbbba7fdff2", + "pdfPageNumbers": [12, 13, 14, 15, 16, 17, 18, 19, 20], + "pdfParser": "fixed-width-package-ball-map", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "AM5726": { + "family": "AM5726", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "AM5726BABCXA", + "packageCode": "ABC", + "expectedPinCount": 760, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"AM5726\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"AM5726BABCXA\",\"packageCode\":\"ABC\",\"expectedPinCount\":760,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:04.124Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/AM5726/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/AM5726#page=9", + "warnings": [ + "Recovered 760/760 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin L7: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin L8: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin N10: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin P11: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin P12: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin P13: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin R11: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin R16: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin R19: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin T13: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin T16: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin T19: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin U13: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin U16: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin U8: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin U9: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin V16: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin V8: kept vdd, ignored N13.", + "Official PDF contains conflicting names for pin L7: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin L8: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin N10: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin N13: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin P11: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin P12: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin R11: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin R16: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin R19: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin T13: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin T16: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin T19: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin U13: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin U16: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin U8: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin U9: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin V16: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin V8: kept vdd, ignored P13.", + "Official PDF contains conflicting names for pin L7: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin L8: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin N10: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin N13: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin P11: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin P12: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin P13: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin R11: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin R16: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin T13: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin T16: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin T19: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin U13: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin U16: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin U8: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin U9: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin V16: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin V8: kept vdd, ignored R19.", + "Official PDF contains conflicting names for pin L7: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin L8: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin N10: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin N13: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin P11: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin P12: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin P13: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin R11: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin R16: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin R19: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin T13: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin T16: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin U13: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin U16: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin U8: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin U9: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin V16: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin V8: kept vdd, ignored T19.", + "Official PDF contains conflicting names for pin L7: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin L8: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin N10: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin N13: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin P11: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin P12: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin P13: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin R11: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin R16: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin R19: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin T13: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin T16: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin T19: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin U13: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin U16: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin U8: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin V16: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin V8: kept vdd, ignored U9.", + "Official PDF contains conflicting names for pin N8: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin P8: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin R8: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin V21: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin V22: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin W17: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin W18: kept vdds18v, ignored T8.", + "Official PDF contains conflicting names for pin N8: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin P8: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin R8: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin T8: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin V21: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin V22: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin W18: kept vdds18v, ignored W17.", + "Official PDF contains conflicting names for pin N8: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin P8: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin R8: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin T8: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin V21: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin V22: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin W17: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin W18: kept vdds18v, ignored vdds18v_ddr1.", + "Official PDF contains conflicting names for pin Y21: kept vdds18v_ddr1, ignored vdds18v_ddr2.", + "Official PDF contains conflicting names for pin P21: kept vdds18v_ddr2, ignored vddshv1.", + "Official PDF contains conflicting names for pin R7: kept vddshv10, ignored T5.", + "Official PDF contains conflicting names for pin T4: kept vddshv10, ignored T5.", + "Official PDF contains conflicting names for pin H11: kept vddshv2, ignored vddshv3.", + "Official PDF contains conflicting names for pin E16: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin E22: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin H15: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin H16: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin H18: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin H19: kept vddshv3, ignored G15.", + "Official PDF contains conflicting names for pin E16: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin E22: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin G15: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin H15: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin H16: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin H19: kept vddshv3, ignored H18.", + "Official PDF contains conflicting names for pin AF5: kept vddshv6, ignored vddshv7.", + "Official PDF contains conflicting names for pin AB22: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AB24: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AC22: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AD26: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AG20: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AG28: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AH27: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin W16: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin W27: kept vdds_ddr1, ignored AB25.", + "Official PDF contains conflicting names for pin AB22: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AB24: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AB25: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AC22: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AD26: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AG28: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AH27: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin W16: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin W27: kept vdds_ddr1, ignored AG20.", + "Official PDF contains conflicting names for pin AB22: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AB24: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AB25: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AC22: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AD26: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AG20: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AG28: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin AH27: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin W27: kept vdds_ddr1, ignored W16.", + "Official PDF contains conflicting names for pin H20: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin H21: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin J27: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin L20: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin L21: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin M20: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin M21: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin T24: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin T25: kept vdds_ddr2, ignored H22.", + "Official PDF contains conflicting names for pin H20: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin H21: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin H22: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin J27: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin L20: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin L21: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin M21: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin T24: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin T25: kept vdds_ddr2, ignored M20.", + "Official PDF contains conflicting names for pin H20: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin H21: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin H22: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin J27: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin L20: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin L21: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin M20: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin M21: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin T24: kept vdds_ddr2, ignored T25.", + "Official PDF contains conflicting names for pin H20: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin H21: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin H22: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin J27: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin L20: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin L21: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin M20: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin M21: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin T24: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin T25: kept vdds_ddr2, ignored vdds_mlbp.", + "Official PDF contains conflicting names for pin K13: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin L10: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin L11: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin M10: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin M11: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin M12: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin M13: kept vdd_dspeve, ignored L12.", + "Official PDF contains conflicting names for pin K13: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin L10: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin L11: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin L12: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin M10: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin M11: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin M13: kept vdd_dspeve, ignored M12.", + "Official PDF contains conflicting names for pin K13: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin L10: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin L11: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin L12: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin M10: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin M11: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin M12: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin M13: kept vdd_dspeve, ignored vdd_gpu.", + "Official PDF contains conflicting names for pin V11: kept vdd_gpu, ignored W10.", + "Official PDF contains conflicting names for pin V14: kept vdd_gpu, ignored W10.", + "Official PDF contains conflicting names for pin W11: kept vdd_gpu, ignored W10.", + "Official PDF contains conflicting names for pin W13: kept vdd_gpu, ignored W10.", + "Official PDF contains conflicting names for pin V11: kept vdd_gpu, ignored vdd_iva.", + "Official PDF contains conflicting names for pin V14: kept vdd_gpu, ignored vdd_iva.", + "Official PDF contains conflicting names for pin W10: kept vdd_gpu, ignored vdd_iva.", + "Official PDF contains conflicting names for pin W11: kept vdd_gpu, ignored vdd_iva.", + "Official PDF contains conflicting names for pin W13: kept vdd_gpu, ignored vdd_iva.", + "Official PDF contains conflicting names for pin L17: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin L18: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin L19: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin M16: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin M17: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin M18: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin N17: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin N18: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin P17: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin P18: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin R18: kept vdd_mpu, ignored M15.", + "Official PDF contains conflicting names for pin L17: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin L18: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin L19: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin M15: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin M16: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin M17: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin N17: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin N18: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin P17: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin P18: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin R18: kept vdd_mpu, ignored M18.", + "Official PDF contains conflicting names for pin L17: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin L18: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin L19: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin M15: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin M16: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin M17: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin M18: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin N17: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin N18: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin P18: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin R18: kept vdd_mpu, ignored P17.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AA10.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AA20.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AB14.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AD24.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AH2.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored AH8.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored E13.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored G7.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored J12.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored K15.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored K5.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored M19.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored N19.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored R1.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored R15.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored T11.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored T17.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored U15.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored U21.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin W25: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored W1.", + "Official PDF contains conflicting names for pin A28: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin A6: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA10: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA14: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA20: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA8: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AA9: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AB14: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AB20: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AD1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AD24: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AG1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AH1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AH2: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AH20: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AH28: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin AH8: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin B1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin D13: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin D19: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin E13: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin E19: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin F1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin F7: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin G7: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin G8: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin G9: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin H12: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin J12: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin J15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin J28: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K24: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K25: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K4: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin K5: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin L13: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin L14: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin M19: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin N14: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin N15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin N19: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin N24: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin N25: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin P28: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin R1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin R12: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin R13: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin R15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin R21: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T11: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T12: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T14: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T17: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T18: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin T21: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin U15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin U17: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin U20: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin U21: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin V15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin V17: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin W1: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin W15: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin W24: kept vss, ignored W25.", + "Official PDF contains conflicting names for pin W28: kept vss, ignored W25.", + "Added official PDF supplemental row Y5=RESERVED from page 9: following balls are reserved: Y5 / Y10 / K14 / B28 /A27 These balls must be left unconnected", + "Added official PDF supplemental row Y10=RESERVED from page 9: following balls are reserved: Y5 / Y10 / K14 / B28 /A27 These balls must be left unconnected", + "Added official PDF supplemental row K14=RESERVED from page 9: following balls are reserved: Y5 / Y10 / K14 / B28 /A27 These balls must be left unconnected", + "Added official PDF supplemental row B28=RESERVED from page 9: following balls are reserved: Y5 / Y10 / K14 / B28 /A27 These balls must be left unconnected", + "Added official PDF supplemental row A27=RESERVED from page 9: following balls are reserved: Y5 / Y10 / K14 / B28 /A27 These balls must be left unconnected" + ], + "packageColumn": "single ABC pin/ball-number column", + "tableClass": "official-ti-pdf/fixed-width-single-package-table", + "pins": [ + { + "number": "A1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "A2", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "A3", + "name": "vin2a_d19", + "type": "PWR", + "description": "" + }, + { + "number": "A4", + "name": "vin2a_d23", + "type": "PWR", + "description": "" + }, + { + "number": "A5", + "name": "vout1_d12", + "type": "PWR", + "description": "" + }, + { + "number": "A6", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "A7", + "name": "vout1_d18", + "type": "PWR", + "description": "" + }, + { + "number": "A8", + "name": "vout1_d19", + "type": "PWR", + "description": "" + }, + { + "number": "A9", + "name": "vout1_d21", + "type": "PWR", + "description": "" + }, + { + "number": "A10", + "name": "vout1_d23", + "type": "PWR", + "description": "" + }, + { + "number": "A11", + "name": "mcasp1_axr9", + "type": "", + "description": "" + }, + { + "number": "A12", + "name": "mcasp1_axr11", + "type": "", + "description": "" + }, + { + "number": "A13", + "name": "mcasp1_axr13", + "type": "", + "description": "" + }, + { + "number": "A14", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "A15", + "name": "mcasp2_axr1", + "type": "", + "description": "" + }, + { + "number": "A16", + "name": "mcasp2_axr3", + "type": "", + "description": "" + }, + { + "number": "A17", + "name": "mcasp2_axr7", + "type": "", + "description": "" + }, + { + "number": "A18", + "name": "mcasp2_fsx", + "type": "", + "description": "" + }, + { + "number": "A19", + "name": "mcasp2_aclkx", + "type": "", + "description": "" + }, + { + "number": "A20", + "name": "mcasp2_fsr", + "type": "", + "description": "" + }, + { + "number": "A21", + "name": "mcasp4_fsx", + "type": "", + "description": "" + }, + { + "number": "A22", + "name": "spi1_cs1", + "type": "", + "description": "" + }, + { + "number": "A23", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "A24", + "name": "spi1_cs0", + "type": "", + "description": "" + }, + { + "number": "A25", + "name": "spi1_sclk", + "type": "", + "description": "" + }, + { + "number": "A26", + "name": "spi2_sclk", + "type": "", + "description": "" + }, + { + "number": "A27", + "name": "RESERVED", + "type": "NC", + "description": "Reserved ball; TI requires it to be left unconnected." + }, + { + "number": "A28", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA1", + "name": "mlbp_dat_p", + "type": "", + "description": "" + }, + { + "number": "AA2", + "name": "mlbp_dat_n", + "type": "", + "description": "" + }, + { + "number": "AA3", + "name": "mcasp5_aclkx", + "type": "", + "description": "" + }, + { + "number": "AA4", + "name": "mcasp5_axr1", + "type": "", + "description": "" + }, + { + "number": "AA5", + "name": "mmc1_dat2", + "type": "", + "description": "" + }, + { + "number": "AA6", + "name": "mmc1_dat0", + "type": "", + "description": "" + }, + { + "number": "AA7", + "name": "vdds_mlbp", + "type": "PWR", + "description": "" + }, + { + "number": "AA8", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA9", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA10", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA11", + "name": "vssa_usb", + "type": "GND", + "description": "" + }, + { + "number": "AA12", + "name": "vdda33v_usb1", + "type": "PWR", + "description": "" + }, + { + "number": "AA13", + "name": "vdda_usb1", + "type": "PWR", + "description": "" + }, + { + "number": "AA14", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA15", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA16", + "name": "vdda_pcie1", + "type": "PWR", + "description": "" + }, + { + "number": "AA17", + "name": "vdda_pcie0", + "type": "PWR", + "description": "" + }, + { + "number": "AA18", + "name": "vdds18v_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AA19", + "name": "vdds18v_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AA20", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AA21", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AA22", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AA23", + "name": "ddr1_d24", + "type": "", + "description": "" + }, + { + "number": "AA24", + "name": "ddr1_d27", + "type": "", + "description": "" + }, + { + "number": "AA25", + "name": "ddr1_d30", + "type": "", + "description": "" + }, + { + "number": "AA26", + "name": "ddr1_d29", + "type": "", + "description": "" + }, + { + "number": "AA27", + "name": "ddr1_dqm3", + "type": "", + "description": "" + }, + { + "number": "AA28", + "name": "ddr1_d31", + "type": "", + "description": "" + }, + { + "number": "AB1", + "name": "mlbp_clk_p", + "type": "", + "description": "" + }, + { + "number": "AB2", + "name": "mlbp_clk_n", + "type": "", + "description": "" + }, + { + "number": "AB3", + "name": "mcasp5_axr0", + "type": "", + "description": "" + }, + { + "number": "AB4", + "name": "gpio6_11", + "type": "", + "description": "" + }, + { + "number": "AB5", + "name": "mmc3_dat7", + "type": "", + "description": "" + }, + { + "number": "AB6", + "name": "vddshv7", + "type": "", + "description": "" + }, + { + "number": "AB7", + "name": "vddshv7", + "type": "", + "description": "" + }, + { + "number": "AB8", + "name": "mmc3_dat6", + "type": "", + "description": "" + }, + { + "number": "AB9", + "name": "mcasp5_fsx", + "type": "", + "description": "" + }, + { + "number": "AB10", + "name": "usb1_drvvbus", + "type": "", + "description": "" + }, + { + "number": "AB11", + "name": "vssa_usb", + "type": "GND", + "description": "" + }, + { + "number": "AB12", + "name": "vdda_usb2", + "type": "PWR", + "description": "" + }, + { + "number": "AB13", + "name": "vdda_rtc", + "type": "PWR", + "description": "" + }, + { + "number": "AB14", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AB15", + "name": "vdd_rtc", + "type": "PWR", + "description": "" + }, + { + "number": "AB16", + "name": "Wakeup2", + "type": "", + "description": "" + }, + { + "number": "AB17", + "name": "rtc_porz", + "type": "", + "description": "" + }, + { + "number": "AB18", + "name": "ddr1_ba2", + "type": "", + "description": "" + }, + { + "number": "AB19", + "name": "ddr1_a3", + "type": "", + "description": "" + }, + { + "number": "AB20", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AB21", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AB22", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AB23", + "name": "ddr1_dqm1", + "type": "", + "description": "" + }, + { + "number": "AB24", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AB25", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AB27", + "name": "ddr1_d22", + "type": "", + "description": "" + }, + { + "number": "AB28", + "name": "ddr1_d18", + "type": "", + "description": "" + }, + { + "number": "AC1", + "name": "mlbp_sig_p", + "type": "", + "description": "" + }, + { + "number": "AC2", + "name": "mlbp_sig_n", + "type": "", + "description": "" + }, + { + "number": "AC3", + "name": "mmc3_dat3", + "type": "", + "description": "" + }, + { + "number": "AC4", + "name": "mmc3_cmd", + "type": "", + "description": "" + }, + { + "number": "AC5", + "name": "gpio6_10", + "type": "", + "description": "" + }, + { + "number": "AC6", + "name": "mmc3_dat1", + "type": "", + "description": "" + }, + { + "number": "AC7", + "name": "mmc3_dat0", + "type": "", + "description": "" + }, + { + "number": "AC8", + "name": "mmc3_dat4", + "type": "", + "description": "" + }, + { + "number": "AC9", + "name": "mmc3_dat2", + "type": "", + "description": "" + }, + { + "number": "AC10", + "name": "usb2_drvvbus", + "type": "", + "description": "" + }, + { + "number": "AC11", + "name": "usb_txn0", + "type": "", + "description": "" + }, + { + "number": "AC12", + "name": "usb1_dm", + "type": "", + "description": "" + }, + { + "number": "AC13", + "name": "xo_osc1", + "type": "", + "description": "" + }, + { + "number": "AC14", + "name": "vssa_osc1", + "type": "GND", + "description": "" + }, + { + "number": "AC15", + "name": "xi_osc1", + "type": "", + "description": "" + }, + { + "number": "AC16", + "name": "Wakeup3", + "type": "", + "description": "" + }, + { + "number": "AC17", + "name": "Wakeup1", + "type": "", + "description": "" + }, + { + "number": "AC18", + "name": "ddr1_casn", + "type": "", + "description": "" + }, + { + "number": "AC19", + "name": "ddr1_a1", + "type": "", + "description": "" + }, + { + "number": "AC20", + "name": "ddr1_a2", + "type": "", + "description": "" + }, + { + "number": "AC21", + "name": "ddr1_a12", + "type": "", + "description": "" + }, + { + "number": "AC22", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AC23", + "name": "ddr1_d8", + "type": "", + "description": "" + }, + { + "number": "AC24", + "name": "ddr1_d14", + "type": "", + "description": "" + }, + { + "number": "AC25", + "name": "ddr1_d13", + "type": "", + "description": "" + }, + { + "number": "AC26", + "name": "ddr1_dqm2", + "type": "", + "description": "" + }, + { + "number": "AC27", + "name": "ddr1_d20", + "type": "", + "description": "" + }, + { + "number": "AC28", + "name": "ddr1_d19", + "type": "", + "description": "" + }, + { + "number": "AD1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AD2", + "name": "vin1a_d22", + "type": "PWR", + "description": "" + }, + { + "number": "AD3", + "name": "vin1a_d23", + "type": "PWR", + "description": "" + }, + { + "number": "AD4", + "name": "mmc3_clk", + "type": "", + "description": "" + }, + { + "number": "AD5", + "name": "vddshv6", + "type": "", + "description": "" + }, + { + "number": "AD6", + "name": "mmc3_dat5", + "type": "", + "description": "" + }, + { + "number": "AD7", + "name": "vddshv6", + "type": "", + "description": "" + }, + { + "number": "AD8", + "name": "vin1a_d1", + "type": "PWR", + "description": "" + }, + { + "number": "AD9", + "name": "vin1a_de0", + "type": "PWR", + "description": "" + }, + { + "number": "AD10", + "name": "vssa_usb3", + "type": "GND", + "description": "" + }, + { + "number": "AD11", + "name": "usb_txp0", + "type": "", + "description": "" + }, + { + "number": "AD12", + "name": "usb1_dp", + "type": "", + "description": "" + }, + { + "number": "AD13", + "name": "vssa_pcie", + "type": "GND", + "description": "" + }, + { + "number": "AD14", + "name": "rtc_osc_xo", + "type": "", + "description": "" + }, + { + "number": "AD15", + "name": "xo_osc0", + "type": "", + "description": "" + }, + { + "number": "AD16", + "name": "vdda_osc", + "type": "PWR", + "description": "" + }, + { + "number": "AD17", + "name": "Wakeup0", + "type": "", + "description": "" + }, + { + "number": "AD18", + "name": "ddr1_a15", + "type": "", + "description": "" + }, + { + "number": "AD19", + "name": "vssa_hdmi", + "type": "GND", + "description": "" + }, + { + "number": "AD20", + "name": "ddr1_a0", + "type": "", + "description": "" + }, + { + "number": "AD21", + "name": "ddr1_a10", + "type": "", + "description": "" + }, + { + "number": "AD22", + "name": "ddr1_a11", + "type": "", + "description": "" + }, + { + "number": "AD23", + "name": "ddr1_dqm0", + "type": "", + "description": "" + }, + { + "number": "AD24", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AD25", + "name": "ddr1_d15", + "type": "", + "description": "" + }, + { + "number": "AD26", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AD27", + "name": "ddr1_dqs2", + "type": "", + "description": "" + }, + { + "number": "AD28", + "name": "ddr1_dqsn2", + "type": "", + "description": "" + }, + { + "number": "AE1", + "name": "vin1a_d19", + "type": "PWR", + "description": "" + }, + { + "number": "AE2", + "name": "vin1a_d20", + "type": "PWR", + "description": "" + }, + { + "number": "AE3", + "name": "vin1a_d17", + "type": "PWR", + "description": "" + }, + { + "number": "AE5", + "name": "vin1a_d18", + "type": "PWR", + "description": "" + }, + { + "number": "AE6", + "name": "vin1a_d21", + "type": "PWR", + "description": "" + }, + { + "number": "AE7", + "name": "vddshv6", + "type": "", + "description": "" + }, + { + "number": "AE8", + "name": "vin1a_d0", + "type": "PWR", + "description": "" + }, + { + "number": "AE9", + "name": "vin1a_hsync0", + "type": "PWR", + "description": "" + }, + { + "number": "AE10", + "name": "vssa_sata", + "type": "GND", + "description": "" + }, + { + "number": "AE11", + "name": "usb2_dp", + "type": "", + "description": "" + }, + { + "number": "AE12", + "name": "usb_rxp0", + "type": "", + "description": "" + }, + { + "number": "AE13", + "name": "vssa_pcie", + "type": "GND", + "description": "" + }, + { + "number": "AE14", + "name": "rtc_osc_xi_clkin32", + "type": "", + "description": "" + }, + { + "number": "AE15", + "name": "xi_osc0", + "type": "", + "description": "" + }, + { + "number": "AE16", + "name": "vdda_osc", + "type": "PWR", + "description": "" + }, + { + "number": "AE17", + "name": "ddr1_a14", + "type": "", + "description": "" + }, + { + "number": "AE18", + "name": "ddr1_ba1", + "type": "", + "description": "" + }, + { + "number": "AE19", + "name": "vssa_hdmi", + "type": "GND", + "description": "" + }, + { + "number": "AE20", + "name": "ddr1_odt0", + "type": "", + "description": "" + }, + { + "number": "AE21", + "name": "ddr1_a7", + "type": "", + "description": "" + }, + { + "number": "AE22", + "name": "ddr1_a9", + "type": "", + "description": "" + }, + { + "number": "AE23", + "name": "ddr1_d7", + "type": "", + "description": "" + }, + { + "number": "AE24", + "name": "ddr1_d5", + "type": "", + "description": "" + }, + { + "number": "AE26", + "name": "ddr1_d12", + "type": "", + "description": "" + }, + { + "number": "AE27", + "name": "ddr1_dqs1", + "type": "", + "description": "" + }, + { + "number": "AE28", + "name": "ddr1_dqsn1", + "type": "", + "description": "" + }, + { + "number": "AF1", + "name": "vin1a_d16", + "type": "PWR", + "description": "" + }, + { + "number": "AF2", + "name": "vin1a_d12", + "type": "PWR", + "description": "" + }, + { + "number": "AF3", + "name": "vin1a_d14", + "type": "PWR", + "description": "" + }, + { + "number": "AF4", + "name": "vin1a_d15", + "type": "PWR", + "description": "" + }, + { + "number": "AF5", + "name": "vddshv6", + "type": "", + "description": "" + }, + { + "number": "AF6", + "name": "vin1a_d13", + "type": "PWR", + "description": "" + }, + { + "number": "AF8", + "name": "vin1a_vsync0", + "type": "PWR", + "description": "" + }, + { + "number": "AF9", + "name": "vin1a_fld0", + "type": "PWR", + "description": "" + }, + { + "number": "AF11", + "name": "usb2_dm", + "type": "", + "description": "" + }, + { + "number": "AF12", + "name": "usb_rxn0", + "type": "", + "description": "" + }, + { + "number": "AF14", + "name": "rtc_iso", + "type": "", + "description": "" + }, + { + "number": "AF15", + "name": "vssa_osc0", + "type": "GND", + "description": "" + }, + { + "number": "AF17", + "name": "ddr1_ba0", + "type": "", + "description": "" + }, + { + "number": "AF18", + "name": "ddr1_a13", + "type": "", + "description": "" + }, + { + "number": "AF20", + "name": "ddr1_rasn", + "type": "", + "description": "" + }, + { + "number": "AF21", + "name": "ddr1_a4", + "type": "", + "description": "" + }, + { + "number": "AF22", + "name": "ddr1_a8", + "type": "", + "description": "" + }, + { + "number": "AF23", + "name": "ddr1_d6", + "type": "", + "description": "" + }, + { + "number": "AF24", + "name": "ddr1_d4", + "type": "", + "description": "" + }, + { + "number": "AF25", + "name": "ddr1_d0", + "type": "", + "description": "" + }, + { + "number": "AF26", + "name": "ddr1_d1", + "type": "", + "description": "" + }, + { + "number": "AF27", + "name": "ddr1_d9", + "type": "", + "description": "" + }, + { + "number": "AF28", + "name": "ddr1_d11", + "type": "", + "description": "" + }, + { + "number": "AG1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AG2", + "name": "vin1a_d9", + "type": "PWR", + "description": "" + }, + { + "number": "AG3", + "name": "vin1a_d10", + "type": "PWR", + "description": "" + }, + { + "number": "AG4", + "name": "vin1a_d8", + "type": "PWR", + "description": "" + }, + { + "number": "AG5", + "name": "vin1a_d11", + "type": "PWR", + "description": "" + }, + { + "number": "AG6", + "name": "vin1a_d6", + "type": "PWR", + "description": "" + }, + { + "number": "AG7", + "name": "vin1a_d2", + "type": "PWR", + "description": "" + }, + { + "number": "AG8", + "name": "vin1a_clk0", + "type": "PWR", + "description": "" + }, + { + "number": "AG9", + "name": "sata1_rxp0", + "type": "", + "description": "" + }, + { + "number": "AG10", + "name": "sata1_txn0", + "type": "", + "description": "" + }, + { + "number": "AG11", + "name": "pcie_rxn1", + "type": "", + "description": "" + }, + { + "number": "AG12", + "name": "pcie_txn1", + "type": "", + "description": "" + }, + { + "number": "AG13", + "name": "pcie_rxn0", + "type": "", + "description": "" + }, + { + "number": "AG14", + "name": "pcie_txn0", + "type": "", + "description": "" + }, + { + "number": "AG15", + "name": "ljcb_clkp", + "type": "", + "description": "" + }, + { + "number": "AG16", + "name": "hdmi1_clockx", + "type": "", + "description": "" + }, + { + "number": "AG17", + "name": "hdmi1_data0x", + "type": "", + "description": "" + }, + { + "number": "AG18", + "name": "hdmi1_data1x", + "type": "", + "description": "" + }, + { + "number": "AG19", + "name": "hdmi1_data2x", + "type": "", + "description": "" + }, + { + "number": "AG20", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AG21", + "name": "ddr1_rst", + "type": "", + "description": "" + }, + { + "number": "AG22", + "name": "ddr1_cke", + "type": "", + "description": "" + }, + { + "number": "AG23", + "name": "ddr1_a6", + "type": "", + "description": "" + }, + { + "number": "AG24", + "name": "ddr1_ck", + "type": "", + "description": "" + }, + { + "number": "AG25", + "name": "ddr1_dqsn0", + "type": "", + "description": "" + }, + { + "number": "AG26", + "name": "ddr1_d2", + "type": "", + "description": "" + }, + { + "number": "AG27", + "name": "ddr1_d10", + "type": "", + "description": "" + }, + { + "number": "AG28", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AH1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AH2", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AH3", + "name": "vin1a_d4", + "type": "PWR", + "description": "" + }, + { + "number": "AH4", + "name": "vin1a_d7", + "type": "PWR", + "description": "" + }, + { + "number": "AH5", + "name": "vin1a_d5", + "type": "PWR", + "description": "" + }, + { + "number": "AH6", + "name": "vin1a_d3", + "type": "PWR", + "description": "" + }, + { + "number": "AH7", + "name": "vin1b_clk1", + "type": "PWR", + "description": "" + }, + { + "number": "AH8", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AH9", + "name": "sata1_rxn0", + "type": "", + "description": "" + }, + { + "number": "AH10", + "name": "sata1_txp0", + "type": "", + "description": "" + }, + { + "number": "AH11", + "name": "pcie_rxp1", + "type": "", + "description": "" + }, + { + "number": "AH12", + "name": "pcie_txp1", + "type": "", + "description": "" + }, + { + "number": "AH13", + "name": "pcie_rxp0", + "type": "", + "description": "" + }, + { + "number": "AH14", + "name": "pcie_txp0", + "type": "", + "description": "" + }, + { + "number": "AH15", + "name": "ljcb_clkn", + "type": "", + "description": "" + }, + { + "number": "AH16", + "name": "hdmi1_clocky", + "type": "", + "description": "" + }, + { + "number": "AH17", + "name": "hdmi1_data0y", + "type": "", + "description": "" + }, + { + "number": "AH18", + "name": "hdmi1_data1y", + "type": "", + "description": "" + }, + { + "number": "AH19", + "name": "hdmi1_data2y", + "type": "", + "description": "" + }, + { + "number": "AH20", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "AH21", + "name": "ddr1_wen", + "type": "", + "description": "" + }, + { + "number": "AH22", + "name": "ddr1_a5", + "type": "", + "description": "" + }, + { + "number": "AH23", + "name": "ddr1_csn0", + "type": "", + "description": "" + }, + { + "number": "AH24", + "name": "ddr1_nck", + "type": "", + "description": "" + }, + { + "number": "AH25", + "name": "ddr1_dqs0", + "type": "", + "description": "" + }, + { + "number": "AH26", + "name": "ddr1_d3", + "type": "", + "description": "" + }, + { + "number": "AH27", + "name": "vdds_ddr1", + "type": "PWR", + "description": "" + }, + { + "number": "AH28", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "B2", + "name": "vin2a_d16", + "type": "PWR", + "description": "" + }, + { + "number": "B3", + "name": "vin2a_d20", + "type": "PWR", + "description": "" + }, + { + "number": "B4", + "name": "vin2a_d21", + "type": "PWR", + "description": "" + }, + { + "number": "B5", + "name": "vin2a_d22", + "type": "PWR", + "description": "" + }, + { + "number": "B6", + "name": "vddshv2", + "type": "", + "description": "" + }, + { + "number": "B7", + "name": "vout1_d16", + "type": "PWR", + "description": "" + }, + { + "number": "B8", + "name": "vout1_d17", + "type": "PWR", + "description": "" + }, + { + "number": "B9", + "name": "vout1_d22", + "type": "PWR", + "description": "" + }, + { + "number": "B10", + "name": "vout1_de", + "type": "PWR", + "description": "" + }, + { + "number": "B11", + "name": "vout1_fld", + "type": "PWR", + "description": "" + }, + { + "number": "B12", + "name": "mcasp1_axr8", + "type": "", + "description": "" + }, + { + "number": "B13", + "name": "mcasp1_axr10", + "type": "", + "description": "" + }, + { + "number": "B14", + "name": "mcasp1_aclkr", + "type": "", + "description": "" + }, + { + "number": "B15", + "name": "mcasp2_axr0", + "type": "", + "description": "" + }, + { + "number": "B16", + "name": "mcasp2_axr5", + "type": "", + "description": "" + }, + { + "number": "B17", + "name": "mcasp2_axr6", + "type": "", + "description": "" + }, + { + "number": "B18", + "name": "mcasp3_aclkx", + "type": "", + "description": "" + }, + { + "number": "B19", + "name": "mcasp3_axr0", + "type": "", + "description": "" + }, + { + "number": "B20", + "name": "spi1_cs3", + "type": "", + "description": "" + }, + { + "number": "B21", + "name": "spi1_cs2", + "type": "", + "description": "" + }, + { + "number": "B22", + "name": "spi2_d1", + "type": "", + "description": "" + }, + { + "number": "B23", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "B24", + "name": "spi2_cs0", + "type": "", + "description": "" + }, + { + "number": "B25", + "name": "spi1_d0", + "type": "", + "description": "" + }, + { + "number": "B26", + "name": "xref_clk2", + "type": "", + "description": "" + }, + { + "number": "B27", + "name": "uart1_rxd", + "type": "", + "description": "" + }, + { + "number": "B28", + "name": "RESERVED", + "type": "NC", + "description": "Reserved ball; TI requires it to be left unconnected." + }, + { + "number": "C1", + "name": "vin2a_d6", + "type": "PWR", + "description": "" + }, + { + "number": "C2", + "name": "vin2a_d13", + "type": "PWR", + "description": "" + }, + { + "number": "C3", + "name": "vin2a_d14", + "type": "PWR", + "description": "" + }, + { + "number": "C4", + "name": "vin2a_d15", + "type": "PWR", + "description": "" + }, + { + "number": "C5", + "name": "vin2a_d18", + "type": "PWR", + "description": "" + }, + { + "number": "C6", + "name": "vout1_d13", + "type": "PWR", + "description": "" + }, + { + "number": "C7", + "name": "vout1_d15", + "type": "PWR", + "description": "" + }, + { + "number": "C8", + "name": "vout1_d14", + "type": "PWR", + "description": "" + }, + { + "number": "C9", + "name": "vout1_d20", + "type": "PWR", + "description": "" + }, + { + "number": "C11", + "name": "vout1_hsync", + "type": "PWR", + "description": "" + }, + { + "number": "C12", + "name": "mcasp1_axr6", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "mcasp1_aclkx", + "type": "", + "description": "" + }, + { + "number": "C15", + "name": "mcasp2_axr2", + "type": "", + "description": "" + }, + { + "number": "C17", + "name": "mcasp3_axr1", + "type": "", + "description": "" + }, + { + "number": "C18", + "name": "mcasp4_aclkx", + "type": "", + "description": "" + }, + { + "number": "C20", + "name": "i2c1_scl", + "type": "", + "description": "" + }, + { + "number": "C21", + "name": "i2c1_sda", + "type": "", + "description": "" + }, + { + "number": "C23", + "name": "xref_clk3", + "type": "", + "description": "" + }, + { + "number": "C24", + "name": "vddshv4", + "type": "", + "description": "" + }, + { + "number": "C25", + "name": "i2c2_sda", + "type": "", + "description": "" + }, + { + "number": "C26", + "name": "uart1_txd", + "type": "", + "description": "" + }, + { + "number": "C27", + "name": "uart1_rtsn", + "type": "", + "description": "" + }, + { + "number": "C28", + "name": "uart2_rtsn", + "type": "", + "description": "" + }, + { + "number": "D1", + "name": "vin2a_d2", + "type": "PWR", + "description": "" + }, + { + "number": "D2", + "name": "vin2a_d4", + "type": "PWR", + "description": "" + }, + { + "number": "D3", + "name": "vin2a_d10", + "type": "PWR", + "description": "" + }, + { + "number": "D5", + "name": "vin2a_d12", + "type": "PWR", + "description": "" + }, + { + "number": "D6", + "name": "vin2a_d17", + "type": "PWR", + "description": "" + }, + { + "number": "D7", + "name": "vout1_d10", + "type": "PWR", + "description": "" + }, + { + "number": "D8", + "name": "vout1_d11", + "type": "PWR", + "description": "" + }, + { + "number": "D9", + "name": "vout1_d9", + "type": "PWR", + "description": "" + }, + { + "number": "D10", + "name": "vddshv2", + "type": "", + "description": "" + }, + { + "number": "D11", + "name": "vout1_clk", + "type": "PWR", + "description": "" + }, + { + "number": "D12", + "name": "mcasp1_axr7", + "type": "", + "description": "" + }, + { + "number": "D13", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "D14", + "name": "mcasp1_fsx", + "type": "", + "description": "" + }, + { + "number": "D15", + "name": "mcasp2_axr4", + "type": "", + "description": "" + }, + { + "number": "D16", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "D17", + "name": "mcasp4_axr1", + "type": "", + "description": "" + }, + { + "number": "D18", + "name": "xref_clk0", + "type": "", + "description": "" + }, + { + "number": "D19", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "D20", + "name": "trstn", + "type": "", + "description": "" + }, + { + "number": "D21", + "name": "nmin_dsp", + "type": "", + "description": "" + }, + { + "number": "D22", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "D23", + "name": "tdi", + "type": "", + "description": "" + }, + { + "number": "D24", + "name": "emu1", + "type": "", + "description": "" + }, + { + "number": "D26", + "name": "uart2_txd", + "type": "", + "description": "" + }, + { + "number": "D27", + "name": "uart2_ctsn", + "type": "", + "description": "" + }, + { + "number": "D28", + "name": "uart2_rxd", + "type": "", + "description": "" + }, + { + "number": "E1", + "name": "vin2a_clk0", + "type": "PWR", + "description": "" + }, + { + "number": "E2", + "name": "vin2a_d3", + "type": "PWR", + "description": "" + }, + { + "number": "E3", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "E4", + "name": "vin2a_d7", + "type": "PWR", + "description": "" + }, + { + "number": "E5", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "E6", + "name": "vin2a_d9", + "type": "PWR", + "description": "" + }, + { + "number": "E7", + "name": "vout1_d7", + "type": "PWR", + "description": "" + }, + { + "number": "E8", + "name": "vout1_d8", + "type": "PWR", + "description": "" + }, + { + "number": "E9", + "name": "vout1_d4", + "type": "PWR", + "description": "" + }, + { + "number": "E10", + "name": "vddshv2", + "type": "", + "description": "" + }, + { + "number": "E11", + "name": "vout1_vsync", + "type": "PWR", + "description": "" + }, + { + "number": "E12", + "name": "mcasp1_axr4", + "type": "", + "description": "" + }, + { + "number": "E13", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "E14", + "name": "mcasp1_axr12", + "type": "", + "description": "" + }, + { + "number": "E15", + "name": "mcasp2_aclkr", + "type": "", + "description": "" + }, + { + "number": "E16", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "E17", + "name": "xref_clk1", + "type": "", + "description": "" + }, + { + "number": "E18", + "name": "rtck", + "type": "", + "description": "" + }, + { + "number": "E19", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "E20", + "name": "tclk", + "type": "", + "description": "" + }, + { + "number": "E21", + "name": "gpio6_14", + "type": "", + "description": "" + }, + { + "number": "E22", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "E23", + "name": "resetn", + "type": "", + "description": "" + }, + { + "number": "E24", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "E25", + "name": "uart1_ctsn", + "type": "", + "description": "" + }, + { + "number": "E26", + "name": "ddr2_d0", + "type": "", + "description": "" + }, + { + "number": "E27", + "name": "ddr2_d6", + "type": "", + "description": "" + }, + { + "number": "E28", + "name": "ddr2_d7", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "F2", + "name": "vin2a_d0", + "type": "PWR", + "description": "" + }, + { + "number": "F3", + "name": "vin2a_d1", + "type": "PWR", + "description": "" + }, + { + "number": "F4", + "name": "vin2a_d5", + "type": "PWR", + "description": "" + }, + { + "number": "F5", + "name": "vin2a_d8", + "type": "PWR", + "description": "" + }, + { + "number": "F6", + "name": "vin2a_d11", + "type": "PWR", + "description": "" + }, + { + "number": "F7", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "F8", + "name": "vout1_d6", + "type": "PWR", + "description": "" + }, + { + "number": "F9", + "name": "vout1_d5", + "type": "PWR", + "description": "" + }, + { + "number": "F10", + "name": "vout1_d2", + "type": "PWR", + "description": "" + }, + { + "number": "F11", + "name": "vout1_d0", + "type": "PWR", + "description": "" + }, + { + "number": "F12", + "name": "mcasp1_axr1", + "type": "", + "description": "" + }, + { + "number": "F13", + "name": "mcasp1_axr5", + "type": "", + "description": "" + }, + { + "number": "F14", + "name": "mcasp1_axr15", + "type": "", + "description": "" + }, + { + "number": "F15", + "name": "mcasp3_fsx", + "type": "", + "description": "" + }, + { + "number": "F16", + "name": "spi1_d1", + "type": "", + "description": "" + }, + { + "number": "F17", + "name": "i2c2_scl", + "type": "", + "description": "" + }, + { + "number": "F18", + "name": "tms", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "tdo", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "gpio6_15", + "type": "", + "description": "" + }, + { + "number": "F21", + "name": "gpio6_16", + "type": "", + "description": "" + }, + { + "number": "F22", + "name": "porz", + "type": "", + "description": "" + }, + { + "number": "F23", + "name": "rstoutn", + "type": "", + "description": "" + }, + { + "number": "F24", + "name": "ddr2_d3", + "type": "", + "description": "" + }, + { + "number": "F25", + "name": "ddr2_d2", + "type": "", + "description": "" + }, + { + "number": "F26", + "name": "ddr2_d4", + "type": "", + "description": "" + }, + { + "number": "F27", + "name": "ddr2_d5", + "type": "", + "description": "" + }, + { + "number": "F28", + "name": "ddr2_dqm0", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "vin2a_hsync0", + "type": "PWR", + "description": "" + }, + { + "number": "G2", + "name": "vin2a_de0", + "type": "PWR", + "description": "" + }, + { + "number": "G4", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "G6", + "name": "vin2a_vsync0", + "type": "PWR", + "description": "" + }, + { + "number": "G7", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "G8", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "G9", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "G10", + "name": "vout1_d1", + "type": "PWR", + "description": "" + }, + { + "number": "G11", + "name": "vout1_d3", + "type": "PWR", + "description": "" + }, + { + "number": "G12", + "name": "mcasp1_axr0", + "type": "", + "description": "" + }, + { + "number": "G13", + "name": "mcasp1_axr2", + "type": "", + "description": "" + }, + { + "number": "G14", + "name": "mcasp1_axr14", + "type": "", + "description": "" + }, + { + "number": "G15", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "G16", + "name": "mcasp4_axr0", + "type": "", + "description": "" + }, + { + "number": "G17", + "name": "spi2_d0", + "type": "", + "description": "" + }, + { + "number": "G18", + "name": "vdds18v", + "type": "PWR", + "description": "" + }, + { + "number": "G19", + "name": "dcan1_rx", + "type": "", + "description": "" + }, + { + "number": "G20", + "name": "dcan1_tx", + "type": "", + "description": "" + }, + { + "number": "G21", + "name": "emu0", + "type": "", + "description": "" + }, + { + "number": "G22", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "G23", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "G24", + "name": "ddr2_dqm1", + "type": "", + "description": "" + }, + { + "number": "G25", + "name": "ddr2_d1", + "type": "", + "description": "" + }, + { + "number": "G26", + "name": "ddr2_d12", + "type": "", + "description": "" + }, + { + "number": "G27", + "name": "ddr2_dqsn0", + "type": "", + "description": "" + }, + { + "number": "G28", + "name": "ddr2_dqs0", + "type": "", + "description": "" + }, + { + "number": "H1", + "name": "gpmc_ad12", + "type": "", + "description": "" + }, + { + "number": "H2", + "name": "gpmc_ad14", + "type": "", + "description": "" + }, + { + "number": "H3", + "name": "gpmc_ad15", + "type": "", + "description": "" + }, + { + "number": "H4", + "name": "gpmc_a26", + "type": "", + "description": "" + }, + { + "number": "H5", + "name": "gpmc_a27", + "type": "", + "description": "" + }, + { + "number": "H6", + "name": "gpmc_cs1", + "type": "", + "description": "" + }, + { + "number": "H7", + "name": "vin2a_fld0", + "type": "PWR", + "description": "" + }, + { + "number": "H8", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "H9", + "name": "vddshv1", + "type": "", + "description": "" + }, + { + "number": "H10", + "name": "vddshv2", + "type": "", + "description": "" + }, + { + "number": "H11", + "name": "vddshv2", + "type": "", + "description": "" + }, + { + "number": "H12", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "H13", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "H14", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "H15", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "H16", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "H17", + "name": "vdds18v", + "type": "PWR", + "description": "" + }, + { + "number": "H18", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "H19", + "name": "vddshv3", + "type": "", + "description": "" + }, + { + "number": "H20", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "H21", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "H22", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "H23", + "name": "ddr2_d8", + "type": "", + "description": "" + }, + { + "number": "H24", + "name": "ddr2_d10", + "type": "", + "description": "" + }, + { + "number": "H25", + "name": "ddr2_d9", + "type": "", + "description": "" + }, + { + "number": "H26", + "name": "ddr2_d11", + "type": "", + "description": "" + }, + { + "number": "H27", + "name": "ddr2_dqs1", + "type": "", + "description": "" + }, + { + "number": "H28", + "name": "ddr2_dqsn1", + "type": "", + "description": "" + }, + { + "number": "J1", + "name": "gpmc_ad10", + "type": "", + "description": "" + }, + { + "number": "J2", + "name": "gpmc_ad11", + "type": "", + "description": "" + }, + { + "number": "J3", + "name": "gpmc_ad13", + "type": "", + "description": "" + }, + { + "number": "J4", + "name": "gpmc_a24", + "type": "", + "description": "" + }, + { + "number": "J5", + "name": "gpmc_a21", + "type": "", + "description": "" + }, + { + "number": "J6", + "name": "gpmc_a25", + "type": "", + "description": "" + }, + { + "number": "J7", + "name": "gpmc_a23", + "type": "", + "description": "" + }, + { + "number": "J8", + "name": "vddshv11", + "type": "", + "description": "" + }, + { + "number": "J9", + "name": "cap_vddram_dspeve2", + "type": "", + "description": "" + }, + { + "number": "J10", + "name": "cap_vddram_dspeve1", + "type": "", + "description": "" + }, + { + "number": "J11", + "name": "mcasp1_axr3", + "type": "", + "description": "" + }, + { + "number": "J12", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "J13", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "J14", + "name": "mcasp1_fsr", + "type": "", + "description": "" + }, + { + "number": "J15", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "J16", + "name": "cap_vbbldo_mpu", + "type": "", + "description": "" + }, + { + "number": "J17", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "J18", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "J19", + "name": "cap_vddram_core2", + "type": "", + "description": "" + }, + { + "number": "J20", + "name": "ddr2_d23", + "type": "", + "description": "" + }, + { + "number": "J21", + "name": "vdds18v_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "J22", + "name": "vdds18v_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "J23", + "name": "ddr2_d21", + "type": "", + "description": "" + }, + { + "number": "J24", + "name": "ddr2_d15", + "type": "", + "description": "" + }, + { + "number": "J25", + "name": "ddr2_d13", + "type": "", + "description": "" + }, + { + "number": "J26", + "name": "ddr2_d14", + "type": "", + "description": "" + }, + { + "number": "J27", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "J28", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K1", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K2", + "name": "gpmc_ad9", + "type": "", + "description": "" + }, + { + "number": "K4", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K5", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K6", + "name": "gpmc_a22", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "gpmc_a19", + "type": "", + "description": "" + }, + { + "number": "K8", + "name": "vddshv11", + "type": "", + "description": "" + }, + { + "number": "K9", + "name": "cap_vbbldo_dspeve", + "type": "", + "description": "" + }, + { + "number": "K10", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "K11", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "K12", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "K13", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "K14", + "name": "RESERVED", + "type": "NC", + "description": "Reserved ball; TI requires it to be left unconnected." + }, + { + "number": "K15", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K16", + "name": "cap_vddram_mpu1", + "type": "", + "description": "" + }, + { + "number": "K17", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "K18", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "K19", + "name": "cap_vddram_mpu2", + "type": "", + "description": "" + }, + { + "number": "K20", + "name": "ddr2_d17", + "type": "", + "description": "" + }, + { + "number": "K21", + "name": "ddr2_d18", + "type": "", + "description": "" + }, + { + "number": "K22", + "name": "ddr2_d22", + "type": "", + "description": "" + }, + { + "number": "K23", + "name": "ddr2_dqm2", + "type": "", + "description": "" + }, + { + "number": "K24", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K25", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "K27", + "name": "ddr2_dqs2", + "type": "", + "description": "" + }, + { + "number": "K28", + "name": "ddr2_dqsn2", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "gpmc_ad8", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "gpmc_ad7", + "type": "", + "description": "" + }, + { + "number": "L3", + "name": "gpmc_ad6", + "type": "", + "description": "" + }, + { + "number": "L4", + "name": "gpmc_ad5", + "type": "", + "description": "" + }, + { + "number": "L5", + "name": "gpmc_ad2", + "type": "", + "description": "" + }, + { + "number": "L6", + "name": "gpmc_ad4", + "type": "", + "description": "" + }, + { + "number": "L7", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "L8", + "name": "vdd", + "type": "PWR", + "description": "" + }, + { + "number": "L9", + "name": "cap_vddram_core1", + "type": "", + "description": "" + }, + { + "number": "L10", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "L11", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "L12", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "L13", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "L14", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "L15", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "L16", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "L17", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "L18", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "L19", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "L20", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "L21", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "L22", + "name": "ddr2_d16", + "type": "", + "description": "" + }, + { + "number": "L23", + "name": "ddr2_d19", + "type": "", + "description": "" + }, + { + "number": "L24", + "name": "ddr2_d20", + "type": "", + "description": "" + }, + { + "number": "L25", + "name": "ddr2_d26", + "type": "", + "description": "" + }, + { + "number": "L26", + "name": "ddr2_d25", + "type": "", + "description": "" + }, + { + "number": "L27", + "name": "ddr2_d24", + "type": "", + "description": "" + }, + { + "number": "L28", + "name": "ddr2_d27", + "type": "", + "description": "" + }, + { + "number": "M1", + "name": "gpmc_ad3", + "type": "", + "description": "" + }, + { + "number": "M2", + "name": "gpmc_ad1", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "gpmc_wen", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "gpmc_ben1", + "type": "", + "description": "" + }, + { + "number": "M5", + "name": "gpmc_oen_ren", + "type": "", + "description": "" + }, + { + "number": "M6", + "name": "gpmc_ad0", + "type": "", + "description": "" + }, + { + "number": "M7", + "name": "gpmc_a20", + "type": "", + "description": "" + }, + { + "number": "M8", + "name": "vdds18v", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "vdds18v", + "type": "PWR", + "description": "" + }, + { + "number": "M10", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "M11", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "M12", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "M13", + "name": "vdd_dspeve", + "type": "PWR", + "description": "" + }, + { + "number": "M14", + "name": "vdda_abe_per", + "type": "PWR", + "description": "" + }, + { + "number": "M15", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "M16", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "M17", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "M18", + "name": "vdd_mpu", + "type": "PWR", + "description": "" + }, + { + "number": "M19", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "M20", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "M21", + "name": "vdds_ddr2", + "type": "PWR", + "description": "" + }, + { + "number": "M22", + "name": "ddr2_dqm3", + "type": "", + "description": "" + }, + { + "number": "M23", + "name": "ddr2_d28", + "type": "", + "description": "" + }, + { + "number": "M24", + "name": "ddr2_d29", + "type": "", + "description": "" + }, + { + "number": "M25", + "name": "ddr2_d30", + "type": "", + "description": "" + }, + { + "number": "M26", + "name": "ddr2_d31", + "type": "", + "description": "" + }, + { + "number": "M27", + "name": "ddr2_dqsn3", + "type": "", + "description": "" + }, + { + "number": "M28", + "name": "ddr2_dqs3", + "type": "", + "description": "" + }, + { + "number": "N1", + "name": "gpmc_advn_ale", + "type": "", + "description": "" + }, + { + "number": "N2", + "name": "gpmc_wait0", + "type": "", + "description": "" + }, + { + "number": "N4", + "name": "vddshv10", + "type": "", + "description": "" + }, + { + "number": "N5", + "name": "vddshv10", + "type": "", + "description": "" + }, + { + "number": "N6", + "name": "gpmc_ben0", + "type": "", + "description": "" + }, + { + "number": "N7", + "name": "gpmc_a8", + "type": "", + "description": "" + }, + { + "number": "N8", + "name": "vdds18v", + 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"A1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A2", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "A3", + "name": "DDR0_DQ7", + "type": "", + "description": "" + }, + { + "number": "A4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A5", + "name": "DDR0_DQ0", + "type": "", + "description": "" + }, + { + "number": "A6", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A7", + "name": "CU_PORz", + "type": "", + "description": "" + }, + { + "number": "A8", + "name": "WKUP_LFOSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A9", + "name": "WKUP_LFOSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A11", + "name": "MCU_OSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A12", + "name": "MCU_OSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A14", + "name": "CK", + "type": "", + "description": "" + }, + { + "number": "A15", + "name": "MCU_SPI0_D0", + "type": "", + "description": "" + }, + { + "number": "A16", + "name": "DI", + "type": "", + "description": "" + }, + { + "number": "A17", + "name": "ADCONFIG111", + "type": "", + "description": "" + }, + { + "number": "A18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A19", + "name": "MCASP0_ACLKX", + "type": "", + "description": "" + }, + { + "number": "A20", + "name": "MCASP0_AFSX", + "type": "", + "description": "" + }, + { + "number": "A21", + "name": "PADCONFIG108", + "type": "", + "description": "" + }, + { + "number": "A22", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA1", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "AA2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA3", + "name": "DDR0_DQ29", + "type": "", + "description": "" + }, + { + "number": "AA4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA5", + "name": "DDR0_DQ30", + "type": "", + "description": "" + }, + { + "number": "AA6", + "name": "MMC0_DAT0", + "type": "", + "description": "" + }, + { + "number": "AA7", + "name": "MMC0_DAT3", + "type": "", + "description": "" + }, + { + "number": "AA8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA9", + "name": "USB0_DP", + "type": "", + "description": "" + }, + { + "number": "AA10", + "name": "USB0_DM", + "type": "", + "description": "" + }, + { + "number": "AA11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA12", + "name": "CSI0_RXP2", + "type": "", + "description": "" + }, + { + "number": "AA13", + "name": "CSI0_RXN2", + "type": "", + "description": "" + }, + { + "number": "AA14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA15", + "name": "RGMII1_RX_CTL", + "type": "", + "description": "" + }, + { + "number": "AA16", + "name": "RGMII1_RXC", + "type": "", + "description": "" + }, + { + "number": "AA17", + "name": "RGMII1_TD3", + "type": "", + "description": "" + }, + { + "number": "AA18", + "name": "ADCONFIG93", + "type": "", + "description": "" + }, + { + "number": "AA19", + "name": "ADCONFIG91", + "type": "", + "description": "" + }, + { + "number": "AA20", + "name": "ADCONFIG96", + "type": "", + "description": "" + }, + { + "number": "AA21", + "name": "ADCONFIG97", + "type": "", + "description": "" + }, + { + "number": "AA22", + "name": "VOUT0_PCLK", + "type": "PWR", + "description": "" + }, + { + "number": "AB1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB2", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "AB3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB4", + "name": "DDR0_DQ31", + "type": "", + "description": "" + }, + { + "number": "AB5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB6", + "name": "PADCONFIG132", + "type": "", + "description": "" + }, + { + "number": "AB7", + "name": "PADCONFIG134", + "type": "", + "description": "" + }, + { + "number": "AB8", + "name": "ADCONFIG126", + "type": "", + "description": "" + }, + { + "number": "AB9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB10", + "name": "CSI0_RXP3", + "type": "", + "description": "" + }, + { + "number": "AB11", + "name": "CSI0_RXN3", + "type": "", + "description": "" + }, + { + "number": "AB12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB13", + "name": "CSI0_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AB14", + "name": "CSI0_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AB15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB16", + "name": "RGMII1_RD0", + "type": "", + "description": "" + }, + { + "number": "AB17", + "name": "RGMII1_TXC", + "type": "", + "description": "" + }, + { + "number": "AB18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB19", + "name": "RGMII2_TXC", + "type": "", + "description": "" + }, + { + "number": "AB20", + "name": "ADCONFIG100", + "type": "", + "description": "" + }, + { + "number": "AB21", + "name": "ADCONFIG99", + "type": "", + "description": "" + }, + { + "number": "AB22", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "B2", + "name": "DDR0_DQ6", + "type": "", + "description": "" + }, + { + "number": "B3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B4", + "name": "DDR0_DQ1", + "type": "", + "description": "" + }, + { + "number": "B5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B6", + "name": "DDR0_DQ2", + "type": "", + "description": "" + }, + { + "number": "B7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B8", + "name": "CU_ERRORn", + "type": "", + "description": "" + }, + { + "number": "B9", + "name": "CU_PADCONFIG16", + "type": "", + "description": "" + }, + { + "number": "B10", + "name": "WKUP_CLKOUT0", + "type": "", + "description": "" + }, + { + "number": "B11", + "name": "MCU_PADCONFIG7", + "type": "", + "description": "" + }, + { + "number": "B12", + "name": "MCU_SPI0_D1", + "type": "", + "description": "" + }, + { + "number": "B13", + "name": "MCU_SPI0_CLK", + "type": "", + "description": "" + }, + { + "number": "B14", + "name": "MS", + "type": "", + "description": "" + }, + { + "number": "B15", + "name": "SPI0_D0", + "type": "", + "description": "" + }, + { + "number": "B16", + "name": "XT_REFCLK1", + "type": "", + "description": "" + }, + { + "number": "B17", + "name": "CAN0_TX", + "type": "", + "description": "" + }, + { + "number": "B18", + "name": "MCASP0_AXR1", + "type": "", + "description": "" + }, + { + "number": "B19", + "name": "CASP0_AXR2", + "type": "", + "description": "" + }, + { + "number": "B20", + "name": "MCASP0_AXR0", + "type": "", + "description": "" + }, + { + "number": "B21", + "name": "PADCONFIG107", + "type": "", + "description": "" + }, + { + "number": "B22", + "name": "ADCONFIG140", + "type": "", + "description": "" + }, + { + "number": "C1", + "name": "DDR0_DQS0_n", + "type": "", + "description": "" + }, + { + "number": "C2", + "name": "DDR0_DM0", + "type": "", + "description": "" + }, + { + "number": "C3", + "name": "DDR0_DQ5", + "type": "", + "description": "" + }, + { + "number": "C4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "C5", + "name": "DDR0_DQ4", + "type": "", + "description": "" + }, + { + "number": "C6", + "name": "RSVD0", + "type": "NC", + "description": "" + }, + { + "number": "C7", + "name": "CU_PADCONFIG13", + "type": "", + "description": "" + }, + { + "number": "C8", + "name": "CU_PADCONFIG12", + "type": "", + "description": "" + }, + { + "number": "C9", + "name": "WKUP_UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "C10", + "name": "WKUP_UART0_CTSn", + "type": "", + "description": "" + }, + { + "number": "C11", + "name": "CU_PADCONFIG1", + "type": "", + "description": "" + }, + { + "number": "C12", + "name": "CU_RESETz", + "type": "", + "description": "" + }, + { + "number": "C13", + "name": "MU0", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "DO", + "type": "", + "description": "" + }, + { + "number": "C15", + "name": "ART0_RTSn", + "type": "", + "description": "" + }, + { + "number": "C16", + "name": "ADCONFIG110", + "type": "", + "description": "" + }, + { + "number": "C17", + "name": "ADCONFIG122", + "type": "", + "description": "" + }, + { + "number": "C18", + "name": "CAN0_RX", + "type": "", + "description": "" + }, + { + "number": "C19", + "name": "CASP0_AXR3", + "type": "", + "description": "" + }, + { + "number": "C20", + "name": "USB0_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "C21", + "name": "PADCONFIG143", + "type": "", + "description": "" + }, + { + "number": "C22", + "name": "MC1_DAT2", + "type": "", + "description": "" + }, + { + "number": "D1", + "name": "DDR0_DQS0", + "type": "", + "description": "" + }, + { + "number": "D2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "D3", + "name": "DDR0_DQ15", + "type": "", + "description": "" + }, + { + "number": "D4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "D5", + "name": "DDR0_DQ3", + "type": "", + "description": "" + }, + { + "number": "D6", + "name": "RSVD1", + "type": "NC", + "description": "" + }, + { + "number": "D7", + "name": "CU_MCAN1_TX", + "type": "", + "description": "" + }, + { + "number": "D8", + "name": "MCU_UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "D9", + "name": "MCU_I2C0_SDA", + "type": "", + "description": "" + }, + { + "number": "D10", + "name": "MCU_PADCONFIG8", + "type": "", + "description": "" + }, + { + "number": "D11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "D12", + "name": "PMIC_LPM_EN0", + "type": "", + "description": "" + }, + { + "number": "D13", + "name": "WKUP_I2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "D14", + "name": "MCU_RESETSTATz", + "type": "", + "description": "" + }, + { + "number": "D15", + "name": "UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "D16", + "name": "SPI0_CS0", + "type": "", + "description": "" + }, + { + "number": "D17", + "name": "2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "D18", + "name": "MMC1_SDWP", + "type": "", + "description": "" + }, + { + "number": "D19", + "name": "USB1_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "D20", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "D21", + "name": "ADCONFIG139", + "type": "", + "description": "" + }, + { + "number": "D22", + "name": "MC1_DAT3", + "type": "", + "description": "" + }, + { + "number": "E1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E2", + "name": "DDR0_DQ8", + "type": "", + "description": "" + }, + { + "number": "E3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E4", + "name": "DDR0_DQ14", + "type": "", + "description": "" + }, + { + "number": "E5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E6", + "name": "DDR0_DQ10", + "type": "", + "description": "" + }, + { + "number": "E7", + "name": "RSVD2", + "type": "NC", + "description": "" + }, + { + "number": "E8", + "name": "CU_PADCONFIG14", + "type": "", + "description": "" + }, + { + "number": "E9", + "name": "WKUP_UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "E10", + "name": "MU1", + "type": "", + "description": "" + }, + { + "number": "E11", + "name": "MCU_SPI0_CS0", + "type": "", + "description": "" + }, + { + "number": "E12", + "name": "MCU_I2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "E13", + "name": "WKUP_I2C0_SDA", + "type": "", + "description": "" + }, + { + "number": "E14", + "name": "UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "E15", + "name": "ADCONFIG113", + "type": "", + "description": "" + }, + { + "number": "E16", + "name": "ADCONFIG121", + "type": "", + "description": "" + }, + { + "number": "E17", + "name": "ADCONFIG123", + "type": "", + "description": "" + }, + { + "number": "E18", + "name": "MMC1_SDCD", + "type": "", + "description": "" + }, + { + "number": "E19", + "name": "ESET_REQz", + "type": "", + "description": "" + }, + { + "number": "E20", + "name": "MMC2_DAT0", + "type": "", + "description": "" + }, + { + "number": "E21", + "name": "PADCONFIG74", + "type": "", + "description": "" + }, + { + "number": "E22", + "name": "MMC1_CLK", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "DDR0_DQS1_n", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F3", + "name": "DDR0_DM1", + "type": "", + "description": "" + }, + { + "number": "F4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F5", + "name": "DDR0_DQ9", + "type": "", + "description": "" + }, + { + "number": "F6", + "name": "RSVD3", + "type": "NC", + "description": "" + }, + { + "number": "F7", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "F8", + "name": "MCU_UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "F9", + "name": "VMON_3P3_SOC", + "type": "", + "description": "" + }, + { + "number": "F10", + "name": "RSVD4", + "type": "NC", + "description": "" + }, + { + "number": "F11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F12", + "name": "VMON_1P8_SOC", + "type": "", + "description": "" + }, + { + "number": "F13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F14", + "name": "ART0_CTSn", + "type": "", + "description": "" + }, + { + "number": "F15", + "name": "RSTn", + "type": "", + "description": "" + }, + { + "number": "F16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F17", + "name": "EXTINTn", + "type": "", + "description": "" + }, + { + "number": "F18", + "name": "ORz_OUT", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "ESETSTATz", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "MMC2_DAT2", + "type": "", + "description": "" + }, + { + "number": "F21", + "name": "MMC2_DAT1", + "type": "", + "description": "" + }, + { + "number": "F22", + "name": "PADCONFIG73", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "DDR0_DQS1", + "type": "", + "description": "" + }, + { + "number": "G2", + "name": "DDR0_DQ11", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G4", + "name": "DDR0_DQ13", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G6", + "name": "DDR0_DQ12", + "type": "", + "description": "" + }, + { + "number": "G7", + "name": "RSVD5", + "type": "NC", + "description": "" + }, + { + "number": "G8", + "name": "CAP_VDDS_CANUART", + "type": "", + "description": "" + }, + { + "number": "G9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G10", + "name": "CAP_VDDS_MCU", + "type": "", + "description": "" + }, + { + "number": "G11", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "G12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G13", + "name": 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"number": "V7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V8", + "name": "USB0_VBUS", + "type": "", + "description": "" + }, + { + "number": "V9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V10", + "name": "CSI0_RXRCALIB", + "type": "", + "description": "" + }, + { + "number": "V11", + "name": "RSVD7", + "type": "NC", + "description": "" + }, + { + "number": "V12", + "name": "MDIO0_MDC", + "type": "", + "description": "" + }, + { + "number": "V13", + "name": "MDIO0_MDIO", + "type": "", + "description": "" + }, + { + "number": "V14", + "name": "RGMII1_RD3", + "type": "", + "description": "" + }, + { + "number": "V15", + "name": "RGMII1_RD1", + "type": "", + "description": "" + }, + { + "number": "V16", + "name": "RGMII1_TD1", + "type": "", + "description": "" + }, + { + "number": "V17", + "name": "PADCONFIG64", + "type": "", + "description": "" + }, + { + "number": "V18", + "name": "PADCONFIG55", + "type": "", + "description": "" + }, + { + "number": "V19", + "name": "PADCONFIG54", + "type": "", + "description": "" + }, + { + "number": "V20", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "V21", + "name": "VOUT0_DATA7", + "type": "PWR", + "description": "" + }, + { + "number": "V22", + "name": "PADCONFIG52", + "type": "", + "description": "" + }, + { + "number": "W1", + "name": "DDR0_DQS3", + "type": "", + "description": "" + }, + { + "number": "W2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W3", + "name": "DDR0_DM3", + "type": "", + "description": "" + }, + { + "number": "W4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W5", + "name": "DDR0_DQ27", + "type": "", + "description": "" + }, + { + "number": "W6", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W7", + "name": "MC0_DAT5", + "type": "", + "description": "" + }, + { + "number": "W8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W9", + "name": "MC0_DAT6", + "type": "", + "description": "" + }, + { + "number": "W10", + "name": "USB0_RCALIB", + "type": "", + "description": "" + }, + { + "number": "W11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W12", + "name": "CSI0_RXN0", + "type": "", + "description": "" + }, + { + "number": "W13", + "name": "CSI0_RXP0", + "type": "", + "description": "" + }, + { + "number": "W14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "W15", + "name": "RGMII1_RD2", + "type": "", + "description": "" + }, + { + "number": "W16", + "name": "RGMII1_TX_CTL", + "type": "", + "description": "" + }, + { + "number": "W17", + "name": "GMII2_TD3", + "type": "", + "description": "" + }, + { + "number": "W18", + "name": "ADCONFIG95", + "type": "", + "description": "" + }, + { + "number": "W19", + "name": "PADCONFIG59", + "type": "", + "description": "" + }, + { + "number": "W20", + "name": "VOUT0_DATA12", + "type": "PWR", + "description": "" + }, + { + "number": "W21", + "name": "PADCONFIG57", + "type": "", + "description": "" + }, + { + "number": "W22", + "name": "PADCONFIG56", + "type": "", + "description": "" + }, + { + "number": "Y1", + "name": "DDR0_DQS3_n", + "type": "", + "description": "" + }, + { + "number": "Y2", + "name": "DDR0_DQ24", + "type": "", + "description": "" + }, + { + "number": "Y3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y4", + "name": "DDR0_DQ28", + "type": "", + "description": "" + }, + { + "number": "Y5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y6", + "name": "PADCONFIG136", + "type": "", + "description": "" + }, + { + "number": "Y7", + "name": "PADCONFIG131", + "type": "", + "description": "" + }, + { + "number": "Y8", + "name": "MMC0_DAT4", + "type": "", + "description": "" + }, + { + "number": "Y9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y10", + "name": "USB1_DP", + "type": "", + "description": "" + }, + { + "number": "Y11", + "name": "USB1_DM", + "type": "", + "description": "" + }, + { + "number": "Y12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y13", + "name": "CSI0_RXN1", + "type": "", + "description": "" + }, + { + "number": "Y14", + "name": "CSI0_RXP1", + "type": "", + "description": "" + }, + { + "number": "Y15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y16", + "name": "RGMII1_TD2", + "type": "", + "description": "" + }, + { + "number": "Y17", + "name": "RGMII1_TD0", + "type": "", + "description": "" + }, + { + "number": "Y18", + "name": "GMII2_TD1", + "type": "", + "description": "" + }, + { + "number": "Y19", + "name": "ADCONFIG89", + "type": "", + "description": "" + }, + { + "number": "Y20", + "name": "GMII2_RD1", + "type": "", + "description": "" + }, + { + "number": "Y21", + "name": "PADCONFIG60", + "type": "", + "description": "" + }, + { + "number": "Y22", + "name": "PADCONFIG61", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/AM62A3", + "pdfSha256": "e3d5b9ab5496f4f73f70437596d567d9ef7c4f9f5e75c6624e3842719a3c2a78", + "pdfPageNumbers": [ + 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 77 + ], + "pdfParser": "fixed-width-package-column", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "AM62A7": { + "family": "AM62A7", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "AM62A74AUMHAAMBR", + "packageDescription": "FCBGA-484", + "packageCode": "AMB", + "expectedPinCount": 484, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/AM62A74AUMHAAMBR.circuit.tsx", + "pinLabelCount": 484, + "coordinateLabelCount": 484, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 484, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"AM62A7\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM62A74AUMHAAMBR\",\"packageDescription\":\"FCBGA-484\",\"packageCode\":\"AMB\",\"expectedPinCount\":484,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM62A74AUMHAAMBR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:04.553Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/AM62A7/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/AM62A7#page=14", + "warnings": [ + "Recovered 484/484 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin W1: kept DDR0_DQS3, ignored DDR0_DQS2.", + "Official PDF contains conflicting names for pin Y1: kept DDR0_DQS3_n, ignored DDR0_DQS2_n.", + "Added official PDF supplemental row L7=VDDS_DDR from page 40: AMB Pin Attributes row: J7, K8, L7 = VDDS_DDR" + ], + "packageColumn": "AMB package column", + "tableClass": "official-ti-pdf/fixed-width-package-column", + "pins": [ + { + "number": "A1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A2", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "A3", + "name": "DDR0_DQ7", + "type": "", + "description": "" + }, + { + "number": "A4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A5", + "name": "DDR0_DQ0", + "type": "", + "description": "" + }, + { + "number": "A6", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A7", + "name": "CU_PORz", + "type": "", + "description": "" + }, + { + "number": "A8", + "name": "WKUP_LFOSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A9", + "name": "WKUP_LFOSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A11", + "name": "MCU_OSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A12", + "name": "MCU_OSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A13", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A14", + "name": "CK", + "type": "", + "description": "" + }, + { + "number": "A15", + "name": "MCU_SPI0_D0", + "type": "", + "description": "" + }, + { + "number": "A16", + "name": "DI", + "type": "", + "description": "" + }, + { + "number": "A17", + "name": "ADCONFIG111", + "type": "", + "description": "" + }, + { + "number": "A18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A19", + "name": "MCASP0_ACLKX", + "type": "", + "description": "" + }, + { + "number": "A20", + "name": "MCASP0_AFSX", + "type": "", + "description": "" + }, + { + "number": "A21", + "name": "PADCONFIG108", + "type": "", + "description": "" + }, + { + "number": "A22", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA1", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "AA2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA3", + "name": "DDR0_DQ29", + "type": "", + "description": "" + }, + { + "number": "AA4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA5", + "name": "DDR0_DQ30", + "type": "", + "description": "" + }, + { + "number": "AA6", + "name": "MMC0_DAT0", + "type": "", + "description": "" + }, + { + "number": "AA7", + "name": "MMC0_DAT3", + "type": "", + "description": "" + }, + { + "number": "AA8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA9", + "name": "USB0_DP", + "type": "", + "description": "" + }, + { + "number": "AA10", + "name": "USB0_DM", + "type": "", + "description": "" + }, + { + "number": "AA11", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA12", + "name": "CSI0_RXP2", + "type": "", + "description": "" + }, + { + "number": "AA13", + "name": "CSI0_RXN2", + "type": "", + "description": "" + }, + { + "number": "AA14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA15", + "name": "RGMII1_RX_CTL", + "type": "", + "description": "" + }, + { + "number": "AA16", + "name": "RGMII1_RXC", + "type": "", + "description": "" + }, + { + "number": "AA17", + "name": "RGMII1_TD3", + "type": "", + "description": "" + }, + { + "number": "AA18", + "name": "ADCONFIG93", + "type": "", + "description": "" + }, + { + "number": "AA19", + "name": "ADCONFIG91", + "type": "", + "description": "" + }, + { + "number": "AA20", + "name": "ADCONFIG96", + "type": "", + "description": "" + }, + { + "number": "AA21", + "name": "ADCONFIG97", + "type": "", + "description": "" + }, + { + "number": "AA22", + "name": "VOUT0_PCLK", + "type": "PWR", + "description": "" + }, + { + "number": "AB1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB2", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "AB3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB4", + "name": "DDR0_DQ31", + "type": "", + "description": "" + }, + { + "number": "AB5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB6", + "name": "PADCONFIG132", + "type": "", + "description": "" + }, + { + "number": "AB7", + "name": "PADCONFIG134", + "type": "", + "description": "" + }, + { + "number": "AB8", + "name": "ADCONFIG126", + "type": "", + "description": "" + }, + { + "number": "AB9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB10", + "name": "CSI0_RXP3", + "type": "", + "description": "" + }, + { + "number": "AB11", + "name": "CSI0_RXN3", + "type": "", + "description": "" + }, + { + "number": "AB12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB13", + "name": "CSI0_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AB14", + "name": "CSI0_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AB15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB16", + "name": "RGMII1_RD0", + "type": "", + "description": "" + }, + { + "number": "AB17", + "name": "RGMII1_TXC", + "type": "", + "description": "" + }, + { + "number": "AB18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AB19", + "name": "RGMII2_TXC", + "type": "", + "description": "" + }, + { + "number": "AB20", + "name": "ADCONFIG100", + "type": "", + "description": "" + }, + { + "number": "AB21", + "name": "ADCONFIG99", + "type": "", + "description": "" + }, + { + "number": "AB22", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "B2", + "name": "DDR0_DQ6", + "type": "", + "description": "" + }, + { + "number": "B3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B4", + "name": "DDR0_DQ1", + "type": "", + "description": "" + }, + { + "number": "B5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B6", + "name": "DDR0_DQ2", + "type": "", + "description": "" + }, + { + "number": "B7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B8", + "name": "CU_ERRORn", + "type": "", + "description": "" + }, + { + "number": "B9", + "name": "CU_PADCONFIG16", + "type": "", + "description": "" + }, + { + "number": "B10", + "name": "WKUP_CLKOUT0", + "type": "", + "description": "" + }, + { + "number": "B11", + "name": "MCU_PADCONFIG7", + "type": "", + "description": "" + }, + { + "number": "B12", + "name": "MCU_SPI0_D1", + "type": "", + "description": "" + }, + { + "number": "B13", + "name": "MCU_SPI0_CLK", + "type": "", + "description": "" + }, + { + "number": "B14", + "name": "MS", + "type": "", + "description": "" + }, + { + "number": "B15", + "name": "SPI0_D0", + "type": "", + "description": "" + }, + { + "number": "B16", + "name": "XT_REFCLK1", + "type": "", + "description": "" + }, + { + "number": "B17", + "name": "CAN0_TX", + "type": "", + "description": "" + }, + { + "number": "B18", + "name": "MCASP0_AXR1", + "type": "", + "description": "" + }, + { + "number": "B19", + "name": "CASP0_AXR2", + "type": "", + "description": "" + }, + { + "number": "B20", + "name": "MCASP0_AXR0", + "type": "", + "description": "" + }, + { + "number": "B21", + "name": "PADCONFIG107", + "type": "", + "description": "" + }, + { + "number": "B22", + "name": "ADCONFIG140", + "type": "", + "description": "" + }, + { + "number": "C1", + "name": "DDR0_DQS0_n", + "type": "", + "description": "" + }, + { + "number": "C2", + "name": "DDR0_DM0", + "type": "", + "description": "" + }, + { + "number": "C3", + "name": "DDR0_DQ5", + "type": "", + "description": "" + }, + { + "number": "C4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "C5", + "name": "DDR0_DQ4", + "type": "", + "description": "" + }, + { + "number": "C6", + "name": "RSVD0", + "type": "NC", + "description": "" + }, + { + "number": "C7", + "name": "CU_PADCONFIG13", + "type": "", + "description": "" + }, + { + "number": "C8", + "name": "CU_PADCONFIG12", + "type": "", + "description": "" + }, + { + "number": "C9", + "name": "WKUP_UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "C10", + "name": "WKUP_UART0_CTSn", + "type": "", + "description": "" + }, + { + "number": "C11", + "name": "CU_PADCONFIG1", + "type": "", + "description": "" + }, + { + "number": "C12", + "name": "CU_RESETz", + "type": "", + "description": "" + }, + { + "number": "C13", + "name": "MU0", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "DO", + "type": "", + "description": "" + }, + { + "number": "C15", + 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"status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/AM62L#page=12", + "warnings": [ + "Recovered 373/373 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin M8: kept VDDS_DDR, ignored P8.", + "Official PDF contains conflicting names for pin N8: kept VDDS_DDR, ignored P8.", + "Official PDF contains conflicting names for pin J11: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J13: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J15: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J9: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K10: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K14: kept VDDS_WKUP, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin C1: kept MC0_DAT2, ignored VSS.", + "Official PDF contains conflicting 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"description": "" + }, + { + "number": "P8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "P9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P10", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P12", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P14", + "name": "VDD_CORE", + "type": "PWR", + "description": "" + }, + { + "number": "P15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "P16", + "name": "VDDS_WKUP", + "type": "PWR", + "description": "" + }, + { + "number": "P22", + "name": "GPMC0_BE1n", + "type": "", + "description": "" + }, + { + "number": "P23", + "name": "GPMC0_BE0n_CLE", + "type": "", + "description": "" + }, + { + "number": "R1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "R2", + "name": "DDR0_A6", + "type": "", + "description": "" + }, + { + "number": "R8", + "name": "VSS", + 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"https://www.ti.com/lit/gpn/AM6442#page=15", + "warnings": [ + "Recovered 441/441 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin 7: kept VDDSHV1, ignored VDDS_DDR.", + "Official PDF contains conflicting names for pin 10: kept VDDSHV2, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin G14: kept VDDSHV0, ignored VDDSHV1.", + "Official PDF contains conflicting names for pin J6: kept VDDS_DDR, ignored L6.", + "Official PDF contains conflicting names for pin K7: kept VDDS_DDR, ignored L6.", + "Official PDF contains conflicting names for pin L8: kept VDD_CORE, ignored M9.", + "Official PDF contains conflicting names for pin M11: kept VDD_CORE, ignored M9.", + "Official PDF contains conflicting names for pin N10: kept VDD_CORE, ignored M9.", + "Official PDF contains conflicting names for pin N8: kept VDD_CORE, ignored M9.", + "Official PDF contains conflicting names for pin P9: kept VDD_CORE, ignored M9.", + "Official PDF contains conflicting names for pin L8: kept VDD_CORE, ignored P9.", + "Official PDF contains conflicting names for pin M11: kept VDD_CORE, ignored P9.", + "Official PDF contains conflicting names for pin M9: kept VDD_CORE, ignored P9.", + "Official PDF contains conflicting names for pin N10: kept VDD_CORE, ignored P9.", + "Official PDF contains conflicting names for pin N8: kept VDD_CORE, ignored P9.", + "Official PDF contains conflicting names for pin 1: kept VDD_CORE, ignored VSS.", + "Official PDF contains conflicting names for pin A15: kept SPI1_D1, ignored VSS.", + "Official PDF contains conflicting names for pin 10: kept VDDSHV2, ignored VSS.", + "Official PDF contains conflicting names for pin 7: kept VDDSHV1, ignored VSS.", + "Official PDF contains conflicting names for pin 8: kept VDD_CORE, ignored VSS.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored A5.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored D1.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored D1.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored F8.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored F8.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored G3.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored G3.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored H11.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored H11.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored J14.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin K6: kept VSS, ignored J14.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin A5: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin A6: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin C10: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin C3: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin D1: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin E11: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin E13: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin F8: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin G3: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin G9: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin H11: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin H20: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin H21: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored K6.", + "Official PDF contains conflicting names for pin H8: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin J14: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin J7: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored K6.", + "Official PDF contains conflicting names for pin A1: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin AA15: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin AA21: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin C15: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin F10: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin G1: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin G7: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin H6: kept A5, ignored VSS.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored L9.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored N11.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored P1.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored P6.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored R7.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin T8: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored T11.", + "Official PDF contains conflicting names for pin L3: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin L7: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin L9: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin M10: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin M12: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin M6: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin N11: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin N13: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin N7: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin P1: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin P18: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin P6: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin P8: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin R12: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin R9: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin T11: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin T15: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin V17: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin W10: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin W18: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin Y17: kept VSS, ignored T8.", + "Official PDF contains conflicting names for pin Y19: kept VSS, ignored T8." + ], + "packageColumn": "single ALV pin/ball-number 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"description": "" + }, + { + "number": "Y12", + "name": "PADCONFIG69", + "type": "", + "description": "" + }, + { + "number": "Y13", + "name": "PRG1_PRU1_GPO18", + "type": "", + "description": "" + }, + { + "number": "Y14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y15", + "name": "SERDES0_RX0_N", + "type": "", + "description": "" + }, + { + "number": "Y16", + "name": "SERDES0_RX0_P", + "type": "", + "description": "" + }, + { + "number": "Y17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y18", + "name": "PADCONFIG39", + "type": "", + "description": "" + }, + { + "number": "Y19", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "Y20", + "name": "GPMC0_AD15", + "type": "", + "description": "" + }, + { + "number": "Y21", + "name": "PADCONFIG29", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/AM6442", + "pdfSha256": "f831452a8d3a712c2f6aae8c100f9ba4c025f9ba1d71b18e74038df908395ea6", + "pdfPageNumbers": [ + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, + 51, 52, 53, 54, 55, 56, 97 + ], + "pdfParser": "fixed-width-single-package-table", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "AM67A": { + "family": "AM67A", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "AM67A74AKGHIAMWR", + "packageCode": "AMW", + "expectedPinCount": 594, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"AM67A\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"AM67A74AKGHIAMWR\",\"packageCode\":\"AMW\",\"expectedPinCount\":594,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:05.246Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/AM67A/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/AM67A#page=14", + "warnings": [ + "Recovered 594/594 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin B1: kept MCU_PADCONFIG16, ignored VDDSHV_MCU.", + "Official PDF contains conflicting names for pin 6: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin D1: kept VDDSHV_MCU, ignored L7.", + "Official PDF contains conflicting names for pin AB1: kept L7, ignored VDDS_DDR.", + "Official PDF contains conflicting names for pin D1: kept VDDSHV_MCU, ignored VDDS_DDR.", + "Official PDF contains conflicting names for pin L7: kept VDDSHV_MCU, ignored VDDS_DDR.", + "Official PDF contains conflicting names for pin J14: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin J18: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin K11: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin K12: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin K14: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin K18: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin K9: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin L12: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin L17: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin M10: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin M15: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin M17: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin M9: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin N10: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin N11: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin N14: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin N16: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin N18: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin P11: kept VDD_CANUART, ignored J16.", + "Official PDF contains conflicting names for pin J11: kept J16, ignored K9.", + "Official PDF contains conflicting names for pin J14: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin J16: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin J18: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin K11: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin K12: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin K14: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin K16: kept J16, ignored K9.", + "Official PDF contains conflicting names for pin K18: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin L12: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin L17: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin M10: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin M15: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin M17: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin M9: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin N10: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin N11: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin N14: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin N16: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin N18: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin P11: kept VDD_CANUART, ignored K9.", + "Official PDF contains conflicting names for pin J11: kept J16, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J14: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J16: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin J18: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K11: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K12: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K14: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K16: kept J16, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K18: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin K9: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin L12: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin L17: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin M10: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin M15: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin M17: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin M9: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin N10: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin N11: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin N14: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin N16: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin N18: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin P11: kept VDD_CANUART, ignored VDD_CORE.", + "Official PDF contains conflicting names for pin P18: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin R12: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin R13: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin R15: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin R17: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin R9: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin T15: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin T17: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin T9: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin U12: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin U14: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin U16: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin U8: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin V12: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin V14: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin V16: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin V19: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin V8: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin W19: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin Y20: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin Y21: kept VDD_CORE, ignored T13.", + "Official PDF contains conflicting names for pin P18: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin R12: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin R13: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin R15: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin R17: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin R9: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin T13: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin T15: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin T17: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin U12: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin U14: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin U16: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin U8: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin V12: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin V14: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin V16: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin V19: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin V8: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin W19: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin Y20: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin Y21: kept VDD_CORE, ignored T9.", + "Official PDF contains conflicting names for pin P18: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin R12: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin R13: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin R15: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin R17: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin R9: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin T13: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin T15: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin T17: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin T9: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin U12: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin U14: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin U16: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin U8: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin V12: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin V14: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin V16: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin V19: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin W19: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin Y20: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin Y21: kept VDD_CORE, ignored V8.", + "Official PDF contains conflicting names for pin 6: kept VDD_CANUART, ignored VSS.", + "Official PDF contains conflicting names for pin 7: kept VDD_CORE, ignored VSS.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored A21.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored A7.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored A7.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored F15.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored F15.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored F2.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored F2.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored G8.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored G8.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored H7.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored H7.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored J17.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored J17.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored J3.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored J3.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored K1.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin M1: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored K1.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin A18: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin A21: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin A4: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin A7: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AA1: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AA18: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin AA26: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AA4: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AD26: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin AG27: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin C2: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin C23: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin E6: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin F15: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin F17: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin F2: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin F21: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G1: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G10: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G12: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G14: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G16: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G17: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G20: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin G5: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin G8: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin H4: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin H7: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin J15: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J17: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin J26: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J3: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J5: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin J9: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin K1: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin K13: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin K15: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin K17: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin K19: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin L10: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin L11: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin L13: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin L14: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored M1.", + "Official PDF contains conflicting names for pin L18: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin M11: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin M14: kept VSS, ignored M1.", + "Official PDF contains conflicting names for pin A1: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin A27: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin AA21: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin AG1: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin D26: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin F16: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin G3: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin H14: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin J12: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin J19: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin L16: kept A21, ignored VSS.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored N12.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored P7.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored R8.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored U7.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored V11.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin Y7: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored V7.", + "Official PDF contains conflicting names for pin M7: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin M8: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin N12: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin N15: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin N17: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin N26: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin N9: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P10: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P13: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P15: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P17: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P19: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P5: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin P7: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R1: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R10: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R14: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R16: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R18: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R19: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R4: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R7: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin R8: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T10: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T12: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T14: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T16: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T18: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin T26: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U11: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U13: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U15: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U18: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U19: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U3: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U7: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin U9: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V1: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V11: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V13: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V15: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V20: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V4: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V7: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin V9: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W12: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W14: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W17: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W20: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W5: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin W8: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin Y10: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin Y14: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin Y18: kept VSS, ignored Y7.", + "Official PDF contains conflicting names for pin Y8: kept VSS, ignored Y7." + ], + "packageColumn": "single AMW pin/ball-number column", + "tableClass": "official-ti-pdf/fixed-width-single-package-table", + "pins": [ + { + "number": "A1", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "A2", + "name": "WKUP_LFOSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A3", + "name": "WKUP_LFOSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A5", + "name": "MCU_OSC0_XI", + "type": "", + "description": "" + }, + { + "number": "A6", + "name": "MCU_OSC0_XO", + "type": "", + "description": "" + }, + { + "number": "A7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A8", + "name": "PMIC_LPM_EN0", + "type": "", + "description": "" + }, + { + "number": "A9", + "name": "MCU_SPI0_CLK", + "type": "", + "description": "" + }, + { + "number": "A10", + "name": "MCU_PADCONFIG1", + "type": "", + "description": "" + }, + { + "number": "A11", + "name": "TCK", + "type": "", + "description": "" + }, + { + "number": "A13", + "name": "SERDES1_TX0_N", + "type": "", + "description": "" + }, + { + "number": "A14", + "name": "SERDES1_TX0_P", + "type": "", + "description": "" + }, + { + "number": "A16", + "name": "SERDES0_REFCLK0P", + "type": "", + "description": "" + }, + { + "number": "A17", + "name": "SERDES0_REFCLK0N", + "type": "", + "description": "" + }, + { + "number": "A18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A19", + "name": "SERDES0_RX0_P", + "type": "", + "description": "" + }, + { + "number": "A20", + "name": "SERDES0_RX0_N", + "type": "", + "description": "" + }, + { + "number": "A21", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A22", + "name": "PADCONFIG123", + "type": "", + "description": "" + }, + { + "number": "A23", + "name": "EXT_REFCLK1", + "type": "", + "description": "" + }, + { + "number": "A24", + "name": "MMC1_SDWP", + "type": "", + "description": "" + }, + { + "number": "A25", + "name": "MCASP0_AXR3", + "type": "", + "description": "" + }, + { + "number": "A26", + "name": "MCASP0_AXR2", + "type": "", + "description": "" + }, + { + "number": "A27", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "AA1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA2", + "name": "DDR0_DM3", + "type": "", + "description": "" + }, + { + "number": "AA3", + "name": "DDR0_DQ30", + "type": "", + "description": "" + }, + { + "number": "AA4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA5", + "name": "DDR0_DQ31", + "type": "", + "description": "" + }, + { + "number": "AA6", + "name": "USB0_DP", + "type": "", + "description": "" + }, + { + "number": "AA8", + "name": "USB0_RCALIB", + "type": "", + "description": "" + }, + { + "number": "AA10", + "name": "CSI1_RXRCALIB", + "type": "", + "description": "" + }, + { + "number": "AA12", + "name": "RSVD5", + "type": "NC", + "description": "" + }, + { + "number": "AA14", + "name": "RSVD9", + "type": "NC", + "description": "" + }, + { + "number": "AA15", + "name": "RSVD8", + "type": "NC", + "description": "" + }, + { + "number": "AA16", + "name": "DSI0_TXRCALIB", + "type": "", + "description": "" + }, + { + "number": "AA18", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA19", + "name": "RSVD1", + "type": "NC", + "description": "" + }, + { + "number": "AA20", + "name": "OLDI0_A7P", + "type": "", + "description": "" + }, + { + "number": "AA21", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "AA22", + "name": "VOUT0_DATA13", + "type": "PWR", + "description": "" + }, + { + "number": "AA23", + "name": "PADCONFIG58", + "type": "", + "description": "" + }, + { + "number": "AA24", + "name": "VOUT0_DATA8", + "type": "PWR", + "description": "" + }, + { + "number": "AA25", + "name": "PADCONFIG56", + "type": "", + "description": "" + }, + { + "number": "AA26", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AA27", + "name": "VOUT0_DATA9", + "type": "PWR", + "description": "" + }, + { + "number": "AB1", + "name": "L7", + "type": "", + "description": "" + }, + { + "number": "AB2", + "name": "MMC0_DAT7", + "type": "", + "description": "" + }, + { + "number": "AB3", + "name": "MMC0_DAT5", + "type": "", + "description": "" + }, + { + "number": "AB4", + "name": "MMC0_DAT2", + "type": "", + "description": "" + }, + { + "number": "AB5", + "name": "USB0_DM", + "type": "", + "description": "" + }, + { + "number": "AB7", + "name": "RSVD2", + "type": "NC", + "description": "" + }, + { + "number": "AB8", + "name": "CSI0_RXRCALIB", + "type": "", + "description": "" + }, + { + "number": "AB10", + "name": "RSVD4", + "type": "NC", + "description": "" + }, + { + "number": "AB12", + "name": "RSVD6", + "type": "NC", + "description": "" + }, + { + "number": "AB13", + "name": "RSVD7", + "type": "NC", + "description": "" + }, + { + "number": "AB14", + "name": "CSI2_RXRCALIB", + "type": "", + "description": "" + }, + { + "number": "AB15", + "name": "CSI3_RXRCALIB", + "type": "", + "description": "" + }, + { + "number": "AB16", + "name": "RSVD12", + "type": "NC", + "description": "" + }, + { + "number": "AB18", + "name": "RSVD13", + "type": "NC", + "description": "" + }, + { + "number": "AB19", + "name": "OLDI0_A7N", + "type": "", + "description": "" + }, + { + "number": "AB20", + "name": "OLDI0_A2N", + "type": "", + "description": "" + }, + { + "number": "AB21", + "name": "OLDI0_A2P", + "type": "", + "description": "" + }, + { + "number": "AB23", + "name": "PADCONFIG64", + "type": "", + "description": "" + }, + { + "number": "AB24", + "name": "VOUT0_HSYNC", + "type": "PWR", + "description": "" + }, + { + "number": "AB25", + "name": "PADCONFIG57", + "type": "", + "description": "" + }, + { + "number": "AB26", + "name": "VOUT0_DATA14", + "type": "PWR", + "description": "" + }, + { + "number": "AB27", + "name": "VOUT0_DATA15", + "type": "PWR", + "description": "" + }, + { + "number": "AC1", + "name": "MMC0_CALPAD", + "type": "", + "description": "" + }, + { + "number": "AC2", + "name": "MMC0_DAT3", + "type": "", + "description": "" + }, + { + "number": "AC3", + "name": "MMC0_DAT4", + "type": "", + "description": "" + }, + { + "number": "AC5", + "name": "RSVD3", + "type": "NC", + "description": "" + }, + { + "number": "AC6", + "name": "CSI0_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AC7", + "name": "CSI0_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AC9", + "name": "CSI1_RXP3", + "type": "", + "description": "" + }, + { + "number": "AC10", + "name": "CSI1_RXN3", + "type": "", + "description": "" + }, + { + "number": "AC12", + "name": "CSI2_RXP3", + "type": "", + "description": "" + }, + { + "number": "AC13", + "name": "CSI2_RXN3", + "type": "", + "description": "" + }, + { + "number": "AC15", + "name": "CSI3_RXN3", + "type": "", + "description": "" + }, + { + "number": "AC16", + "name": "CSI3_RXP3", + "type": "", + "description": "" + }, + { + "number": "AC18", + "name": "DSI0_TXN3", + "type": "", + "description": "" + }, + { + "number": "AC19", + "name": "DSI0_TXP3", + "type": "", + "description": "" + }, + { + "number": "AC21", + "name": "OLDI0_A4P", + "type": "", + "description": "" + }, + { + "number": "AC24", + "name": "MDIO0_MDC", + "type": "", + "description": "" + }, + { + "number": "AC25", + "name": "RGMII1_RD0", + "type": "", + "description": "" + }, + { + "number": "AC26", + "name": "VOUT0_PCLK", + "type": "PWR", + "description": "" + }, + { + "number": "AC27", + "name": "VOUT0_DE", + "type": "PWR", + "description": "" + }, + { + "number": "AD1", + "name": "MMC0_DS", + "type": "", + "description": "" + }, + { + "number": "AD2", + "name": "MMC0_DAT1", + "type": "", + "description": "" + }, + { + "number": "AD3", + "name": "MMC0_DAT0", + "type": "", + "description": "" + }, + { + "number": "AD5", + "name": "CSI0_RXP0", + "type": "", + "description": "" + }, + { + "number": "AD6", + "name": "CSI0_RXN0", + "type": "", + "description": "" + }, + { + "number": "AD8", + "name": "CSI1_RXP2", + "type": "", + "description": "" + }, + { + "number": "AD9", + "name": "CSI1_RXN2", + "type": "", + "description": "" + }, + { + "number": "AD11", + "name": "CSI2_RXN2", + "type": "", + "description": "" + }, + { + "number": "AD12", + "name": "CSI2_RXP2", + "type": "", + "description": "" + }, + { + "number": "AD14", + "name": "CSI3_RXP2", + "type": "", + "description": "" + }, + { + "number": "AD15", + "name": "CSI3_RXN2", + "type": "", + "description": "" + }, + { + "number": "AD17", + "name": "DSI0_TXN0", + "type": "", + "description": "" + }, + { + "number": "AD18", + "name": "DSI0_TXP0", + "type": "", + "description": "" + }, + { + "number": "AD20", + "name": "OLDI0_CLK1N", + "type": "", + "description": "" + }, + { + "number": "AD21", + "name": "OLDI0_A4N", + "type": "", + "description": "" + }, + { + "number": "AD23", + "name": "RGMII1_RX_CTL", + "type": "", + "description": "" + }, + { + "number": "AD25", + "name": "MDIO0_MDIO", + "type": "", + "description": "" + }, + { + "number": "AD26", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "AD27", + "name": "RGMII1_RD1", + "type": "", + "description": "" + }, + { + "number": "AE1", + "name": "MMC0_CLK", + "type": "", + "description": "" + }, + { + "number": "AE2", + "name": "MMC0_CMD", + "type": "", + "description": "" + }, + { + "number": "AE4", + "name": "CSI0_RXP1", + "type": "", + "description": "" + }, + { + "number": "AE5", + "name": "CSI0_RXN1", + "type": "", + "description": "" + }, + { + "number": "AE7", + "name": "CSI1_RXP1", + "type": "", + "description": "" + }, + { + "number": "AE8", + "name": "CSI1_RXN1", + "type": "", + "description": "" + }, + { + "number": "AE10", + "name": "CSI2_RXN1", + "type": "", + "description": "" + }, + { + "number": "AE11", + "name": "CSI2_RXP1", + "type": "", + "description": "" + }, + { + "number": "AE13", + "name": "CSI3_RXP1", + "type": "", + "description": "" + }, + { + "number": "AE14", + "name": "CSI3_RXN1", + "type": "", + "description": "" + }, + { + "number": "AE16", + "name": "DSI0_TXCLKN", + "type": "", + "description": "" + }, + { + "number": "AE17", + "name": "DSI0_TXCLKP", + "type": "", + "description": "" + }, + { + "number": "AE19", + "name": "OLDI0_CLK1P", + "type": "", + "description": "" + }, + { + "number": "AE20", + "name": "OLDI0_CLK0P", + "type": "", + "description": "" + }, + { + "number": "AE23", + "name": "RGMII1_TD1", + "type": "", + "description": "" + }, + { + "number": "AE24", + "name": "RGMII1_RD2", + "type": "", + "description": "" + }, + { + "number": "AE26", + "name": "RGMII1_RD3", + "type": "", + "description": "" + }, + { + "number": "AE27", + "name": "RGMII1_RXC", + "type": "", + "description": "" + }, + { + "number": "AF1", + "name": "MMC0_DAT6", + "type": "", + "description": "" + }, + { + "number": "AF3", + "name": "CSI0_RXP2", + "type": "", + "description": "" + }, + { + "number": "AF4", + "name": "CSI0_RXN2", + "type": "", + "description": "" + }, + { + "number": "AF6", + "name": "CSI1_RXP0", + "type": "", + "description": "" + }, + { + "number": "AF7", + "name": "CSI1_RXN0", + "type": "", + "description": "" + }, + { + "number": "AF9", + "name": "CSI2_RXN0", + "type": "", + "description": "" + }, + { + "number": "AF10", + "name": "CSI2_RXP0", + "type": "", + "description": "" + }, + { + "number": "AF12", + "name": "CSI3_RXP0", + "type": "", + "description": "" + }, + { + "number": "AF13", + "name": "CSI3_RXN0", + "type": "", + "description": "" + }, + { + "number": "AF15", + "name": "DSI0_TXN1", + "type": "", + "description": "" + }, + { + "number": "AF16", + "name": "DSI0_TXP1", + "type": "", + "description": "" + }, + { + "number": "AF18", + "name": "OLDI0_A5P", + "type": "", + "description": "" + }, + { + "number": "AF19", + "name": "OLDI0_A5N", + "type": "", + "description": "" + }, + { + "number": "AF21", + "name": "OLDI0_CLK0N", + "type": "", + "description": "" + }, + { + "number": "AF23", + "name": "OLDI0_A0N", + "type": "", + "description": "" + }, + { + "number": "AF24", + "name": "RGMII1_TD3", + "type": "", + "description": "" + }, + { + "number": "AF25", + "name": "RGMII1_TX_CTL", + "type": "", + "description": "" + }, + { + "number": "AF27", + "name": "RGMII1_TD0", + "type": "", + "description": "" + }, + { + "number": "AG1", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "AG2", + "name": "CSI0_RXP3", + "type": "", + "description": "" + }, + { + "number": "AG3", + "name": "CSI0_RXN3", + "type": "", + "description": "" + }, + { + "number": "AG5", + "name": "CSI1_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AG6", + "name": "CSI1_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AG8", + "name": "CSI2_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AG9", + "name": "CSI2_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AG11", + "name": "CSI3_RXCLKP", + "type": "", + "description": "" + }, + { + "number": "AG12", + "name": "CSI3_RXCLKN", + "type": "", + "description": "" + }, + { + "number": "AG14", + "name": "DSI0_TXN2", + "type": "", + "description": "" + }, + { + "number": "AG15", + "name": "DSI0_TXP2", + "type": "", + "description": "" + }, + { + "number": "AG17", + "name": "OLDI0_A6N", + "type": "", + "description": "" + }, + { + "number": "AG18", + "name": "OLDI0_A6P", + "type": "", + "description": "" + }, + { + "number": "AG20", + "name": "OLDI0_A3N", + "type": "", + "description": "" + }, + { + "number": "AG21", + "name": "OLDI0_A3P", + "type": "", + "description": "" + }, + { + "number": "AG22", + "name": "OLDI0_A1N", + "type": "", + "description": "" + }, + { + "number": "AG23", + "name": "OLDI0_A1P", + "type": "", + "description": "" + }, + { + "number": "AG24", + "name": "OLDI0_A0P", + "type": "", + "description": "" + }, + { + "number": "AG25", + "name": "RGMII1_TD2", + "type": "", + "description": "" + }, + { + "number": "AG26", + "name": "RGMII1_TXC", + "type": "", + "description": "" + }, + { + "number": "AG27", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "MCU_PADCONFIG16", + "type": "", + "description": "" + }, + { + "number": "B2", + "name": "MCU_MCAN0_TX", + "type": "", + "description": "" + }, + { + "number": "B3", + "name": "WKUP_UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "B4", + "name": "MCU_UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "B5", + "name": "MCU_PADCONFIG7", + "type": "", + "description": "" + }, + { + "number": "B6", + "name": "RSVD16", + "type": "NC", + "description": "" + }, + { + "number": "B7", + "name": "MCU_ERRORn", + "type": "", + "description": "" + }, + { + "number": "B8", + "name": "MCU_UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "B9", + "name": "WKUP_I2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "B10", + "name": "TRSTn", + "type": "", + "description": "" + }, + { + "number": "B12", + "name": "MCU_SPI0_D0", + "type": "", + "description": "" + }, + { + "number": "B13", + "name": "MCU_I2C0_SCL", + "type": "", + "description": "" + }, + { + "number": "B15", + "name": "SERDES1_REFCLK0N", + "type": "", + "description": "" + }, + { + "number": "B16", + "name": "SERDES1_REFCLK0P", + "type": "", + "description": "" + }, + { + "number": "B18", + "name": "SERDES0_TX0_P", + "type": "", + "description": "" + }, + { + "number": "B19", + "name": "SERDES0_TX0_N", + "type": "", + "description": "" + }, + { + "number": "B20", + "name": "SPI0_CS0", + "type": "", + "description": "" + }, + { + "number": "B21", + "name": "UART0_RTSn", + "type": "", + "description": "" + }, + { + "number": "B22", + "name": "PADCONFIG121", + "type": "", + "description": "" + }, + { + "number": "B23", + "name": "EXTINTn", + "type": "", + "description": "" + }, + { + "number": "B24", + "name": "PADCONFIG144", + "type": "", + "description": "" + }, + { + "number": "B25", + "name": "MCASP0_AXR1", + "type": "", + "description": "" + }, + { + "number": "B27", + "name": "USB1_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "C1", + "name": "MCU_MCAN1_TX", + "type": "", + "description": "" + }, + { + "number": "C2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "C3", + "name": "MCU_PADCONFIG12", + "type": "", + "description": "" + }, + { + "number": "C4", + "name": "MCU_PADCONFIG11", + "type": "", + "description": "" + }, + { + "number": "C5", + "name": "MCU_UART0_RTSn", + "type": "", + "description": "" + }, + { + "number": "C6", + "name": "RSVD14", + "type": "NC", + "description": "" + }, + { + "number": "C8", + "name": "WKUP_UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "C9", + "name": "EMU0", + "type": "", + "description": "" + }, + { + "number": "C11", + "name": "MCU_SPI0_D1", + "type": "", + "description": "" + }, + { + "number": "C12", + "name": "MCU_SPI0_CS0", + "type": "", + "description": "" + }, + { + "number": "C14", + "name": "SERDES1_RX0_N", + "type": "", + "description": "" + }, + { + "number": "C15", + "name": "SERDES1_RX0_P", + "type": "", + "description": "" + }, + { + "number": "C17", + "name": "RSVD17", + "type": "NC", + "description": "" + }, + { + "number": "C20", + "name": "SPI0_CS1", + "type": "", + "description": "" + }, + { + "number": "C22", + "name": "PADCONFIG119", + "type": "", + "description": "" + }, + { + "number": "C23", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "C24", + "name": "I2C1_SCL", + "type": "", + "description": "" + }, + { + "number": "C26", + "name": "MCASP0_AFSX", + "type": "", + "description": "" + }, + { + "number": "C27", + "name": "MCASP0_AFSR", + "type": "", + "description": "" + }, + { + "number": "D1", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "D2", + "name": "DDR0_DQ1", + "type": "", + "description": "" + }, + { + "number": "D3", + "name": "DDR0_DQ3", + "type": "", + "description": "" + }, + { + "number": "D6", + "name": "DDR0_DQ0", + "type": "", + "description": "" + }, + { + "number": "D8", + "name": "MCU_PADCONFIG14", + "type": "", + "description": "" + }, + { + "number": "D10", + "name": "MCU_RESETz", + "type": "", + "description": "" + }, + { + "number": "D11", + "name": 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}, + { + "number": "E22", + "name": "UART0_CTSn", + "type": "", + "description": "" + }, + { + "number": "E25", + "name": "USB0_DRVVBUS", + "type": "", + "description": "" + }, + { + "number": "E26", + "name": "RESET_REQz", + "type": "", + "description": "" + }, + { + "number": "E27", + "name": "RESETSTATz", + "type": "", + "description": "" + }, + { + "number": "F1", + "name": "DDR0_DQS0_n", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F3", + "name": "DDR0_DQ7", + "type": "", + "description": "" + }, + { + "number": "F6", + "name": "DDR0_DQ2", + "type": "", + "description": "" + }, + { + "number": "F8", + "name": "RSVD15", + "type": "NC", + "description": "" + }, + { + "number": "F9", + "name": "EMU1", + "type": "", + "description": "" + }, + { + "number": "F10", + "name": "TDO", + "type": "", + "description": "" + }, + { + "number": "F11", + "name": "TMS", + "type": "", + "description": "" + }, + { + "number": "F12", + "name": "WKUP_CLKOUT0", + "type": "", + "description": "" + }, + { + "number": "F14", + "name": "SERDES1_REXT", + "type": "", + "description": "" + }, + { + "number": "F15", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F16", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "F17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F18", + "name": "USB1_VBUS", + "type": "", + "description": "" + }, + { + "number": "F19", + "name": "UART0_RXD", + "type": "", + "description": "" + }, + { + "number": "F20", + "name": "UART0_TXD", + "type": "", + "description": "" + }, + { + "number": "F21", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F23", + "name": "MCASP0_AXR0", + "type": "", + "description": "" + }, + { + "number": "F24", + "name": "PADCONFIG108", + "type": "", + "description": "" + }, + { + "number": "F25", + "name": "PCIE0_CLKREQn", + "type": "", + "description": "" + }, + { + "number": "F26", + "name": "PADCONFIG73", + "type": "", + "description": "" + }, + { + "number": "F27", + "name": "PADCONFIG72", + "type": "", + "description": "" + }, + { + "number": "G1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G2", + "name": "DDR0_DM0", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "G4", + "name": "DDR0_DQ4", + "type": "", + "description": "" + }, + { + "number": "G5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G6", + "name": "DDR0_DQ6", + "type": "", + "description": "" + }, + { + "number": "G7", + "name": "VMON_ER_VSYS", + "type": "", + "description": "" + }, + { + "number": "G8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G9", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "G10", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G11", + "name": "VDDA_MCU", + "type": "PWR", + "description": "" + }, + { + "number": "G12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G13", + "name": "VDDA_1P8_SERDES", + "type": "PWR", + "description": "" + }, + { + "number": "G14", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G15", + "name": "VDDA_3P3_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "G16", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G17", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G18", + "name": "VDDSHV0", + "type": "", + "description": "" + }, + { + "number": "G19", + "name": "CAP_VDDS5", + "type": "", + "description": "" + }, + { + "number": "G20", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "G26", + "name": "PADCONFIG69", + "type": "", + "description": "" + }, + { + "number": "G27", + "name": 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"number": "H12", + "name": "VDDA_0P85_SERDES", + "type": "PWR", + "description": "" + }, + { + "number": "H13", + "name": "VDDA_0P85_SERDES", + "type": "PWR", + "description": "" + }, + { + "number": "H14", + "name": "A21", + "type": "", + "description": "" + }, + { + "number": "H15", + "name": "VDDA_CORE_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "H16", + "name": "VDDA_1P8_USB1", + "type": "PWR", + "description": "" + }, + { + "number": "H17", + "name": "CAP_VDDS0", + "type": "", + "description": "" + }, + { + "number": "H18", + "name": "VDDSHV0", + "type": "", + "description": "" + }, + { + "number": "H19", + "name": "VDDSHV5", + "type": "", + "description": "" + }, + { + "number": "H20", + "name": "PADCONFIG139", + "type": "", + "description": "" + }, + { + "number": "H21", + "name": "PADCONFIG74", + "type": "", + "description": "" + }, + { + "number": "H22", + "name": "PADCONFIG143", + "type": "", + "description": "" + }, + { + "number": "H23", + "name": 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"description": "" + }, + { + "number": "J20", + "name": "CAP_VDDS6", + "type": "", + "description": "" + }, + { + "number": "J21", + "name": "VDDSHV6", + "type": "", + "description": "" + }, + { + "number": "J22", + "name": "OSPI0_CSn3", + "type": "", + "description": "" + }, + { + "number": "J23", + "name": "PADCONFIG138", + "type": "", + "description": "" + }, + { + "number": "J26", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J27", + "name": "PADCONFIG66", + "type": "", + "description": "" + }, + { + "number": "K1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K2", + "name": "DDR0_DQ10", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "VMON_3P3_SOC", + "type": "", + "description": "" + }, + { + "number": "K8", + "name": "VDDS_OSC0", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VDD_CANUART", + "type": "PWR", + "description": "" + }, + { + "number": "K10", + "name": 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"number": "K23", + "name": "OSPI0_CSn1", + "type": "", + "description": "" + }, + { + "number": "K26", + "name": "OSPI0_CSn0", + "type": "", + "description": "" + }, + { + "number": "K27", + "name": "OSPI0_D0", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "DDR0_DQ11", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "DDR0_A5", + "type": "", + "description": "" + }, + { + "number": "L3", + "name": "DDR0_A3", + "type": "", + "description": "" + }, + { + "number": "L4", + "name": "DDR0_A0", + "type": "", + "description": "" + }, + { + "number": "L5", + "name": "RSVD10", + "type": "NC", + "description": "" + }, + { + "number": "L6", + "name": "DDR0_A1", + "type": "", + "description": "" + }, + { + "number": "L7", + "name": "VDDSHV_MCU", + "type": "", + "description": "" + }, + { + "number": "L8", + "name": "VDDS_DDR", + "type": "PWR", + "description": "" + }, + { + "number": "L9", + "name": "VDDA_TEMP2", + "type": "PWR", + "description": "" + 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"description": "GND1 sense pin and inverting analog input to the amplifier. Connect to GND1." + }, + { + "number": "4", + "name": "GND1", + "type": "High-side ground", + "description": "High-side analog ground" + }, + { + "number": "5", + "name": "GND2", + "type": "Low-side ground", + "description": "Low-side analog ground" + }, + { + "number": "6", + "name": "OUTN", + "type": "Analog output", + "description": "Inverting analog output" + }, + { + "number": "7", + "name": "OUTP", + "type": "Analog output", + "description": "Noninverting analog output" + }, + { + "number": "8", + "name": "VDD2", + "type": "Low-side power", + "description": "Low-side power supply" + } + ], + "warnings": [] + }, + "BQ25188": { + "family": "BQ25188", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "BQ25188YBGR", + "packageDescription": "DSBGA-8(1.1X1.6)", + "packageCode": "YBG", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/BQ25188YBGR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 8, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"BQ25188\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25188YBGR\",\"packageDescription\":\"DSBGA-8(1.1X1.6)\",\"packageCode\":\"YBG\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25188YBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:06.070Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/BQ25188/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/BQ25188/datasheet/GUID-DB0441BE-7A4A-4B82-A214-D757BEBC2A7B", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "A2", + "name": "IN", + "type": "P", + "description": "DC Input Power Supply. IN is connected to the external DC supply. Bypass IN to GND with at least 1 μF of effective capacitance using a ceramic capacitor. Due to DC Bias derating, higher input voltages require larger capacitors to ensure at least 1 μF of effective capacitance." + }, + { + "number": "B2", + "name": "SYS", + "type": "P", + "description": "Regulated System Output. Connect at least 10-μF ceramic capacitor (at least 1 μF of ceramic capacitance with DC bias de-rating) from SYS to GND as close to the SYS and GND pins as possible." + }, + { + "number": "C2", + "name": "BAT", + "type": "P", + "description": "Battery Connection. Connect to the positive terminal of the battery. Bypass BAT to GND with at least 1 μF of ceramic capacitance." + }, + { + "number": "D2", + "name": "GND", + "type": "-", + "description": "Ground connection. Connect to the ground plane of the circuit." + }, + { + "number": "B1", + "name": "SCL", + "type": "I/O", + "description": "IC Interface Clock. Connect SCL to the logic rail through a 10-kΩ resistor." + }, + { + "number": "C1", + "name": "SDA", + "type": "I/O", + "description": "IC Interface Data. Connect SDA to the logic rail through a 10-kΩ resistor." + }, + { + "number": "A1", + "name": "/INT", + "type": "O", + "description": "INT is an open-drain output that signals fault interrupts. When a fault occurs, a 128-μs active low pulse is sent out as an interrupt for the host. INT is enabled/disabled using the MASK_INT bit in the control register. Can be pulled up to a 1- to 20-kΩ resistor. Typical pull-up voltage = 1.8 V, max pull-up voltage = 5 V." + }, + { + "number": "D1", + "name": "TS/MR", + "type": "I/O", + "description": "Manual Reset Input/ NTC thermistor pin. TSMR is a general purpose input that must be held low for greater than tLPRESS to go into Shipmode or perform a hardware reset. It can also be used to detect shorter button press durations such as twake1 and twake2 TSMR may be driven by a momentary push-button or a MOS switch. The TSMR pin will also have an NTC thermistor connected on to it." + } + ], + "warnings": [] + }, + "BQ25630": { + "family": "BQ25630", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "BQ25630YBGR", + "packageDescription": "DSBGA-30(2.3x2.4)", + "packageCode": "YBG", + "expectedPinCount": 30, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/BQ25630YBGR.circuit.tsx", + "pinLabelCount": 30, + "coordinateLabelCount": 30, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 30, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"BQ25630\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25630YBGR\",\"packageDescription\":\"DSBGA-30(2.3x2.4)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25630YBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:06.086Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/BQ25630/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/BQ25630/datasheet/GUID-099FC7B6-08D0-4BE3-8467-32E0C8474096", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "E1", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "E2", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "E3", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "F1", + "name": "BATP", + "type": "AI", + "description": "Positive Battery Voltage Sense – Kelvin connect to positive battery terminal. Place 100Ω series resistance between this pin and the battery positive terminal." + }, + { + "number": "B5", + "name": "BTST", + "type": "P", + "description": "PWM High-side Driver Supply – Internally, BTST is connected to the cathode of the boot-strap diode. Connect a 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "C1", + "name": "CE", + "type": "DI", + "description": "Active Low Charge Enable Pin – Battery charging is enabled when EN_CHG bit is 1 and CE pin is LOW. CE pin must be pulled HIGH or LOW, do not leave floating." + }, + { + "number": "F2", + "name": "D+", + "type": "AIO", + "description": "Positive USB data line – D+/D– based USB host/charging port detection. The detection includes data contact detection (DCD), primary and secondary detection in BC1.2 and non-standard adaptors." + }, + { + "number": "F3", + "name": "D−", + "type": "AIO", + "description": "Negative USB data line – D+/D– based USB host/charging port detection. The detection includes data contact detection (DCD), primary and secondary detection in BC1.2 and non-standard adaptors." + }, + { + "number": "F4", + "name": "CC1", + "type": "AIO", + "description": "Type-C Configuration Channel 1 – Used for USB-C connector orientation, connection detection, connection removal, and current capabilities." + }, + { + "number": "F5", + "name": "CC2", + "type": "AIO", + "description": "Type-C Configuration Channel 2 – Used for USB-C connector orientation, connection detection, connection removal, and current capabilities." + }, + { + "number": "C5", + "name": "INT", + "type": "DO", + "description": "Open Drain Active Low Interrupt Output – Connect /INT to the logic rail via a 10kΩ resistor. The INT pin sends active low, 256µs pulse to the host to report charger device status and fault." + }, + { + "number": "C2", + "name": "PG", + "type": "DO", + "description": "Open Drain Active Low Power Good Indicator – Connect to the pull up rail via a 2.2kΩ resistor. LOW indicates a valid input source above PG_TH." + }, + { + "number": "A4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "B4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "C4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "A2", + "name": "PMID", + "type": "P", + "description": "Blocking MOSFET Connection – Given the total input capacitance, place 1µF on VBUS, and the rest on PMID, as close to the IC as possible. Typical value: 10µF in parallel with 0.1µF ceramic capacitor." + }, + { + "number": "B2", + "name": "PMID", + "type": "P", + "description": "Blocking MOSFET Connection – Given the total input capacitance, place 1µF on VBUS, and the rest on PMID, as close to the IC as possible. Typical value: 10µF in parallel with 0.1µF ceramic capacitor." + }, + { + "number": "D4", + "name": "QON", + "type": "DI", + "description": "BATFET Enable or System Power Reset Control Input – Pull low to wake up from ship mode or standby mode, or hold low for System Reset. The pin contains an internal pull-up to maintain default high logic." + }, + { + "number": "A5", + "name": "REGN", + "type": "P", + "description": "Internal Linear Regulator Output – Internally, REGN is connected to the anode of the boot-strap diode. Connect a 10V or higher rating 4.7µF ceramic capacitor from REGN to power ground. The capacitor must be close to the IC. The REGN LDO output is used for the internal MOSFETs gate driving voltage and for biasing the external TS pin thermistor." + }, + { + "number": "D5", + "name": "SCL", + "type": "DI", + "description": "IC Interface Clock – Connect SCL to the logic rail through a 10kΩ resistor." + }, + { + "number": "E5", + "name": "SDA", + "type": "DIO", + "description": "IC Interface Data – Connect SDA to the logic rail through a 10kΩ resistor." + }, + { + "number": "A3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "B3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "C3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "D1", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "D2", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "D3", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "E4", + "name": "TS", + "type": "AI", + "description": "Temperature Qualification Voltage Input – Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from TS pin bias reference to TS, then to GND. Charge suspends when TS pin voltage is out of range. Recommend a 103AT-2 10kΩ thermistor." + }, + { + "number": "A1", + "name": "VBUS", + "type": "P", + "description": "Charger Input Voltage – The internal n-channel reverse blocking MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1µF ceramic capacitor from VBUS to GND as close as possible to IC." + }, + { + "number": "B1", + "name": "VBUS", + "type": "P", + "description": "Charger Input Voltage – The internal n-channel reverse blocking MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1µF ceramic capacitor from VBUS to GND as close as possible to IC." + } + ], + "warnings": [] + }, + "BQ25638": { + "family": "BQ25638", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "BQ25638YBGR", + "packageDescription": "DSBGA-30(2x2.5)", + "packageCode": "YBG", + "expectedPinCount": 30, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/BQ25638YBGR.circuit.tsx", + "pinLabelCount": 30, + "coordinateLabelCount": 30, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 30, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"BQ25638\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25638YBGR\",\"packageDescription\":\"DSBGA-30(2x2.5)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25638YBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:06.159Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/BQ25638/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/BQ25638/datasheet/GUID-71140AC5-3CF8-4F5B-9343-791521598784", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "C5", + "name": "ADCIN", + "type": "AI", + "description": "External ADC Input – Connect an external analog signal up-to 1V to monitor." + }, + { + "number": "E1", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "E2", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "E3", + "name": "BAT", + "type": "P", + "description": "Positive Terminal of Battery Pack Connection – The internal BATFET is connected between SYS and BAT. Connect a 10µF ceramic capacitor closely to the BAT pin and GND." + }, + { + "number": "F1", + "name": "BATP", + "type": "AI", + "description": "Positive Battery Voltage Sense – Kelvin connect to positive battery terminal. Place 100Ω series resistance between this pin and the battery positive terminal." + }, + { + "number": "B5", + "name": "BTST", + "type": "P", + "description": "PWM High-side Driver Supply – Internally, BTST is connected to the cathode of the boot-strap diode. Connect a 0.047µF bootstrap capacitor from SW to BTST." + }, + { + "number": "F2", + "name": "CE", + "type": "DI", + "description": "Active Low Charge Enable Pin – Battery charging is enabled when EN_CHG bit is 1 and CE pin is LOW. CE pin must be pulled HIGH or LOW, do not leave floating." + }, + { + "number": "F4", + "name": "TS_BIAS", + "type": "AO", + "description": "Bias for the TS Resistor Voltage Divider– Provides the bias voltage for the TS resistor voltage divider." + }, + { + "number": "F3", + "name": "ILIM", + "type": "AI", + "description": "Input Current Limit Setting Pin – ILIM pin sets the input current limit as IINREG = KILIM / RILIM, where RILIM is connected from ILIM pin to GND. The input current is limited to the lower of the two values set by ILIM pin and IINDPM register bits. The ILIM pin can also be used to monitor input current. The input current is proportional to the voltage on ILIM pin and can be calculated by IIN = (KILIM x VILIM) / (RILIM x 0.8V). The ILIM pin function is disabled when EN_EXTILIM bit is set to 0." + }, + { + "number": "F5", + "name": "INT", + "type": "DO", + "description": "Open Drain Active Low Interrupt Output – Connect /INT to the logic rail via a 10kΩ resistor. The INT pin sends active low, 256µs pulse to the host to report charger device status and fault." + }, + { + "number": "C2", + "name": "PG", + "type": "DO", + "description": "Open Drain Active Low Power Good Indicator – Connect to the pull up rail via a 2.2kΩ resistor. LOW indicates a valid input source above PG_TH" + }, + { + "number": "A4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "B4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "C4", + "name": "PGND", + "type": "P", + "description": "Ground Return" + }, + { + "number": "A2", + "name": "PMID", + "type": "P", + "description": "Blocking MOSFET Connection – Given the total input capacitance, place 1µF on VBUS, and the rest on PMID, as close to the IC as possible. Typical value: 10µF in parallel with 0.1µF ceramic capacitor." + }, + { + "number": "B2", + "name": "PMID", + "type": "P", + "description": "Blocking MOSFET Connection – Given the total input capacitance, place 1µF on VBUS, and the rest on PMID, as close to the IC as possible. Typical value: 10µF in parallel with 0.1µF ceramic capacitor." + }, + { + "number": "D4", + "name": "QON", + "type": "DI", + "description": "BATFET Enable or System Power Reset Control Input – If the charger is in ultra-low power mode, a logic low on this pin with tSM_EXIT duration forces the device to exit the mode. If the charger is not in ultra-low power mode, a logic low on this pin with tQON_RST initiates a full system power reset if either VVBUS < VVBUS_UVLO or BATFET_CTRL_WVBUS = 1. QON has no effect during shutdown mode. The pin contains an internal pull-up to maintain default high logic." + }, + { + "number": "A5", + "name": "REGN", + "type": "P", + "description": "Internal Linear Regulator Output – Internally, REGN is connected to the anode of the boot-strap diode. Connect a 10V or higher rating 4.7µF ceramic capacitor from REGN to power ground. The capacitor must be close to the IC. The REGN LDO output is used for the internal MOSFETs gate driving voltage and for biasing the external TS pin thermistor." + }, + { + "number": "D5", + "name": "SCL", + "type": "DI", + "description": "IC Interface Clock – Connect SCL to the logic rail through a 10kΩ resistor." + }, + { + "number": "E5", + "name": "SDA", + "type": "DIO", + "description": "IC Interface Data – Connect SDA to the logic rail through a 10kΩ resistor." + }, + { + "number": "C1", + "name": "STAT", + "type": "DO", + "description": "Open Drain Charge Status Output – Indicates various charger operations. Connect to the pull up rail using a 2.2kΩ resistor. LOW indicates charging in progress. HIGH indicates charging completed or charging disabled. When any fault condition occurs, STAT pin blinks at 1Hz. Setting DIS_STAT = 1 disables the STAT pin function, causing the pin to be pulled high. Leave floating if unused." + }, + { + "number": "A3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "B3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "C3", + "name": "SW", + "type": "P", + "description": "Switching Node Connecting to Output Inductor – Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 47nF bootstrap capacitor from SW to BTST." + }, + { + "number": "D1", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "D2", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "D3", + "name": "SYS", + "type": "P", + "description": "Charger Output Voltage to System – Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. Connect 20μF close to the SYS pin." + }, + { + "number": "E4", + "name": "TS", + "type": "AI", + "description": "Temperature Qualification Voltage Input – Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from TS pin bias reference to TS, then to GND. Charge suspends when TS pin voltage is out of range. Recommend a 103AT-2 10kΩ thermistor." + }, + { + "number": "A1", + "name": "VBUS", + "type": "P", + "description": "Charger Input Voltage – The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1µF ceramic capacitor from VBUS to GND as close as possible to IC." + }, + { + "number": "B1", + "name": "VBUS", + "type": "P", + "description": "Charger Input Voltage – The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1µF ceramic capacitor from VBUS to GND as close as possible to IC." + } + ], + "warnings": [] + }, + "BQ27426": { + "family": "BQ27426", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "BQ27426YZFR", + "packageDescription": "DSBGA-9", + "packageCode": "YZF", + "expectedPinCount": 9, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/BQ27426YZFR.circuit.tsx", + "pinLabelCount": 9, + "coordinateLabelCount": 9, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 9, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"BQ27426\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ27426YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ27426YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:06.376Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/BQ27426/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/BQ27426/datasheet/GUID-7DE625F9-121C-4946-91C2-EB87C274860C", + "packageColumn": "PIN / NUMBER", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "C3", + "name": "BAT", + "type": "PI, AI", + "description": "LDO regulator input and battery voltage measurement input. Kelvin sense connect to positive battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor close to the gauge." + }, + { + "number": "B1", + "name": "BIN", + "type": "DI", + "description": "Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If the battery is embedded in the system, it is recommended to leave [BI_PU_EN] = 1 and use a 10-kΩ pulldown resistor from BIN to VSS. If [BI_PU_EN] = 0, then the host must inform the gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. , A 10-kΩ pulldown resistor should be placed between BIN and VSS, even if this pin is unused., NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN pin must be connected only to VDD and not an external voltage rail. If an external thermistor is used for temperature input, the thermistor should be connected between this pin and VSS." + }, + { + "number": "A1", + "name": "GPOUT", + "type": "DO", + "description": "This open-drain output can be configured to indicate BAT_LOW when the OpConfig [BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not be left floating, even if unused; therefore, a 10-kΩ pullup resistor is recommended. If the device is in SHUTDOWN mode, toggling GPOUT causes the gauge exit SHUTDOWN. , Connect GPOUT to a GPIO of the host MCU so that in case of any inadvertent shutdown condition, the gauge can be commanded to come out of SHUTDOWN." + }, + { + "number": "A3", + "name": "SCL", + "type": "DIO", + "description": "Slave IC serial bus for communication with system (Master). Open-drain pins. Use with external 10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected from these pins during normal operation, use an external 1-MΩ pulldown resistors to VSS at each pin to avoid floating inputs." + }, + { + "number": "A2", + "name": "SDA", + "type": "DIO", + "description": "Slave IC serial bus for communication with system (Master). Open-drain pins. Use with external 10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected from these pins during normal operation, use an external 1-MΩ pulldown resistors to VSS at each pin to avoid floating inputs." + }, + { + "number": "C2", + "name": "SRN", + "type": "AI", + "description": "Coulomb counter differential inputs expecting an external 10 mΩ, 1% sense resistor in the high-side current path. Kelvin sense connect SRP to the positive battery terminal (PACKP) side of the external sense resistor. Kelvin sense connect SRN to the other side of the external sense resistor, the positive connection to the system (VSYS). No calibration is required. The fuel gauge is precalibrated for a standard 10 mΩ, 1% sense resistor., Low-side current sensing can be enabled. For more information, see Typical Applications ." + }, + { + "number": "C1", + "name": "SRP", + "type": "AI", + "description": "Coulomb counter differential inputs expecting an external 10 mΩ, 1% sense resistor in the high-side current path. Kelvin sense connect SRP to the positive battery terminal (PACKP) side of the external sense resistor. Kelvin sense connect SRN to the other side of the external sense resistor, the positive connection to the system (VSYS). No calibration is required. The fuel gauge is precalibrated for a standard 10 mΩ, 1% sense resistor., Low-side current sensing can be enabled. For more information, see Typical Applications ." + }, + { + "number": "B3", + "name": "VDD", + "type": "PO", + "description": "1.8-V regulator output. Decouple with 2.2-μF ceramic capacitor to VSS. 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When a voltage is applied to this pin wireless charging is disabled and AD_EN is driven low. Connect to GND through a 1 µF capacitor. If unused, capacitor is not required and should be grounded directly." + }, + { + "number": "F3", + "name": "AD-EN", + "type": "O", + "description": "Push-pull driver for external PFET connecting AD and OUT. This node is pulled to the higher of OUT and AD when turning off the external FET. This voltage tracks approximately 4 V below AD when voltage is present at AD and provides a regulated VGS bias for the external FET. Float this pin if unused." + }, + { + "number": "C4", + "name": "BOOT1", + "type": "O", + "description": "Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10 nF ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2." + }, + { + "number": "C1", + "name": "BOOT2", + "type": "O", + "description": "Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10 nF ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2." + }, + { + "number": "F4", + "name": "CHG", + "type": "O", + "description": "Open-drain output – Active when the output of the wireless power supply is enabled." + }, + { + "number": "E3", + "name": "CLAMP1", + "type": "O", + "description": "Open-drain output – Active when the output of the wireless power supply is enabled." + }, + { + "number": "E2", + "name": "CLAMP2", + "type": "O", + "description": "Open drain FETs which are utilized for a non-power dissipative over-voltage AC clamp protection. When the RECT voltage goes above 15 V, both switches will be turned on and the capacitors will act as a low impedance to protect the IC from damage. If used, CLAMP1 is required to be connected to AC1, and CLAMP2 is required to be connected to AC2 through 0.47-µF capacitors." + }, + { + "number": "E4", + "name": "COMM1", + "type": "O", + "description": "Open-drain output used to communicate with primary by varying reflected impedance. Connect COMM1 through a capacitor to either AC1 or AC2 for capacitive load modulation (COMM2 must be connected to the alternate AC1 or AC2 pin). For resistive modulation connect COMM1 and COMM2 to RECT through a single resistor; connect through separate capacitors for capacitive load modulation." + }, + { + "number": "E1", + "name": "COMM2", + "type": "O", + "description": "Open-drain output used to communicate with primary by varying reflected impedance. Connect COMM1 through a capacitor to either AC1 or AC2 for capacitive load modulation (COMM2 must be connected to the alternate AC1 or AC2 pin). For resistive modulation connect COMM1 and COMM2 to RECT through a single resistor; connect through separate capacitors for capacitive load modulation." + }, + { + "number": "G3", + "name": "EN1", + "type": "I", + "description": "Inputs that allow user to enable/disable wireless and wired charging : , <00> Wireless charging is enabled , <01> Dynamic communication current limit disabled , <10> Wireless charging disabled , <11> Wireless charging disabled." + }, + { + "number": "G2", + "name": "EN2", + "type": "I", + "description": "Inputs that allow user to enable/disable wireless and wired charging : , <00> Wireless charging is enabled , <01> Dynamic communication current limit disabled , <10> Wireless charging disabled , <11> Wireless charging disabled." + }, + { + "number": "F2", + "name": "FOD", + "type": "I", + "description": "Input for the recieved power measurement. Connect to GND with a RFOD resistor." + }, + { + "number": "G1", + "name": "ILIM", + "type": "I/O", + "description": "Programming pin for the over current limit. Connect external resistor to VSS. Size RILIM with the following equation: RILIM = 262 / IMAX where IMAX is the expected maximum output current of the wireless power supply. The hardware current limit (IILIM) will be 20% greater than IMAX or 1.2 x IMAX. If the supply is meant to operate in current limit use , RILIM = 314 / IILIM , RILIM = R1 + RFOD" + }, + { + "number": "D1", + "name": "OUT", + "type": "O", + "description": "Output pin, delivers power to the load." + }, + { + "number": "D2", + "name": "OUT", + "type": "O", + "description": "Output pin, delivers power to the load." + }, + { + "number": "D3", + "name": "OUT", + "type": "O", + "description": "Output pin, delivers power to the load." + }, + { + "number": "D4", + "name": "OUT", + "type": "O", + "description": "Output pin, delivers power to the load." + }, + { + "number": "A1", + "name": "PGND", + "type": "", + "description": "Power ground" + }, + { + "number": "A2", + "name": "PGND", + "type": "", + "description": "Power ground" + }, + { + "number": "A3", + "name": "PGND", + "type": "", + "description": "Power ground" + }, + { + "number": "A4", + "name": "PGND", + "type": "", + "description": "Power ground" + }, + { + "number": "C2", + "name": "RECT", + "type": "O", + "description": "Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND. Depending on the power levels, the value may be 4.7 μF to 22 μF." + }, + { + "number": "C3", + "name": "RECT", + "type": "O", + "description": "Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND. Depending on the power levels, the value may be 4.7 μF to 22 μF." + }, + { + "number": "F1", + "name": "TS-CTRL", + "type": "I", + "description": "Must be connected to ground through a resistor. If an NTC function is not desired connect to GND with a 10-kΩ resistor. As a CTRL pin pull to ground to send end power transfer (EPT) fault to the transmitter or pullup to an internal rail (i.e. 1.8 V) to send EPT termination to the transmitter. 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connection" + }, + { + "number": "11", + "name": "P1_0", + "type": "Digital I/O", + "description": "Digital I/O Port 1.0 - 20-mA drive capability" + }, + { + "number": "12", + "name": "P0_7", + "type": "Digital I/O", + "description": "Digital I/O Port 0.7" + }, + { + "number": "13", + "name": "P0_6", + "type": "Digital I/O", + "description": "Digital I/O Port 0.6" + }, + { + "number": "14", + "name": "P0_5", + "type": "Digital I/O", + "description": "Digital I/O Port 0.5" + }, + { + "number": "15", + "name": "P0_4", + "type": "Digital I/O", + "description": "Digital I/O Port 0.4" + }, + { + "number": "16", + "name": "P0_3", + "type": "Digital I/O", + "description": "Digital I/O Port 0.3" + }, + { + "number": "17", + "name": "P0_2", + "type": "Digital I/O", + "description": "Digital I/O Port 0.2" + }, + { + "number": "18", + "name": "P0_1", + "type": "Digital I/O", + "description": "Digital I/O Port 0.1" + }, + { + "number": "19", + "name": "P0_0", + "type": "Digital I/O", + "description": "Digital I/O Port 0.0" + }, + { + "number": "20", + "name": "RESET_N", + "type": "Digital input", + "description": "Digital input Reset, active-low" + }, + { + "number": "21", + "name": "AVDD5", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "22", + "name": "XOSC_Q1", + "type": "Analog I/O", + "description": "Analog I/O 32-MHz crystal oscillator pin 1 or external-clock input" + }, + { + "number": "23", + "name": "XOSC_Q2", + "type": "Analog I/O", + "description": "Analog I/O 32-MHz crystal oscillator pin 2" + }, + { + "number": "24", + "name": "AVDD3", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "25", + "name": "RF_P", + "type": "RF I/O", + "description": "RF I/O Positive RF input signal to LNA during RX" + }, + { + "number": "26", + "name": "RF_N", + "type": "RF I/O", + "description": "RF I/O Negative RF input signal to LNA during RX" + }, + { + "number": "27", + "name": "AVDD2", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "28", + "name": "AVDD1", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "29", + "name": "AVDD4", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "30", + "name": "RBIAS", + "type": "Analog I/O", + "description": "Analog I/O External precision bias resistor for reference current" + }, + { + "number": "31", + "name": "AVDD6", + "type": "Power", + "description": "Power (analog) 2-V-3.6-V analog power-supply connection" + }, + { + "number": "32", + "name": "P2_4/", + "type": "Digital I/O", + "description": "Digital I/O, Port 2.4/32.768 kHz XOSC" + }, + { + "number": "33", + "name": "P2_3/", + "type": "Digital I/O", + "description": "Digital I/O, Port 2.3/32.768 kHz XOSC" + }, + { + "number": "34", + "name": "P2_2", + "type": "Digital I/O", + "description": "Digital I/O Port 2.2" + }, + { + "number": "35", + "name": "P2_1", + "type": "Digital I/O", + "description": "Digital I/O Port 2.1" + }, + { + "number": "36", + "name": "P2_0", + "type": "Digital I/O", + "description": "Digital I/O Port 2.0" + }, + { + "number": "37", + "name": "P1_7", + "type": "Digital I/O", + "description": "Digital I/O Port 1.7" + }, + { + "number": "38", + "name": "P1_6", + "type": "Digital I/O", + "description": "Digital I/O Port 1.6" + }, + { + "number": "39", + "name": "DVDD1", + "type": "Power", + "description": "Power (digital) 2-V-3.6-V digital power-supply connection" + }, + { + "number": "40", + "name": "DCOUPL", + "type": "Power", + "description": "Power (digital) 1.8-V digital power-supply decoupling. Do not use for supplying external circuits." + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/CC2531-RF4CE", + "pdfSha256": "c6785cf55a42110db727fcea39afc91b069808d8b3c70206b2ff0c2af37332b0", + "pdfPageNumbers": [16, 17], + "pdfParser": "name-number-pin-function-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for CC2531-RF4CE has neither a Pin/Terminal Functions section nor a RHA package pin-map link." + }, + "CC2755P10": { + "family": "CC2755P10", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CC2755P105E0WRHAR", + "packageCode": "RHA", + "expectedPinCount": 40, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"CC2755P10\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"CC2755P105E0WRHAR\",\"packageCode\":\"RHA\",\"expectedPinCount\":40,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:07.032Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/CC2755P10/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/CC2755P10#page=10", + "warnings": [ + "Recovered 40/40 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin 1: kept VDDR, ignored SPI0SCLK.", + "Official PDF contains conflicting names for pin 2: kept VDDR, ignored SPI1CSN.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored I2S0SD0.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored T1C2N.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored ADC10.", + "Official PDF contains conflicting names for pin 1: kept VDDR, ignored SPI0PICO.", + "Official PDF contains conflicting names for pin 3: kept DIO0, ignored I2C0SDA.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored I2S0SD1.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored ADC9.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored ADC0.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored ADC1.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored ADC3.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored ADC5.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored ADC6.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored ADC7.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored ADC8.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored AREF-.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored X32P.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored X32N.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored CKMIN.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored LFCI.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored LPCO.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored LPC+.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored LPC-.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored DTB0.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored DTB1.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored DTB2.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored DTB3.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored DTB4.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored DTB5.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored DTB6.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored DTB8.", + "Official PDF contains conflicting names for pin 13: kept DIO11, ignored DTB9.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored DTB10.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored DTB11.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored DTB12.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored DTB13.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored DTB14.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored DTB15.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored I2C0SCL.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored I2C0SDA.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored I2S0MCLK.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored I2S0SCLK.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored I2S0WS.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored I2S0SD1.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored EXTCI.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored LRFD0.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored LRFD1.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored LRFD2.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored LRFD5.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored LRFD6.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored LRFD7.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored SPI0POCI.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored SPI0CSN.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored SPI0PICO.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored SPI1SCLK.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored SPI1POCI.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored SPI1CSN.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored SPI1PICO.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored SWDCK.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored T0C0.", + "Official PDF contains conflicting names for pin 11: kept DIO9_SWDIO, ignored T0C1.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored T0C2.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T1C0.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T1C1.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T2C0.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored T2C1.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored T2C2.", + "Official PDF contains conflicting names for pin 13: kept DIO11, ignored T3C0.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T3C1.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T3C2.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored T0C0N.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored T0C1N.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored T0C2N.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored T1C0N.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored T1C1N.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T2C2N.", + "Official PDF contains conflicting names for pin 3: kept DIO0, ignored T3C0N.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored T3C1N.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored T3C2N.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored T0PE.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored T2PE.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored UART0TXD.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored UART0RXD.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored UART0RTS.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored UART1TXD.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored UART1RXD.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored UART1CTS.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored UART1RTS." + ], + "packageColumn": "RHA pin-number column", + "tableClass": "official-ti-pdf/name-number-pin-function-table", + "pins": [ + { + "number": "1", + "name": "VDDR", + "type": "", + "description": "- Power Internal supply, must be powered from the internal DC/DC" + }, + { + "number": "2", + "name": "VDDR", + "type": "", + "description": "- Power Internal supply, must be powered from the internal DC/DC" + }, + { + "number": "3", + "name": "DIO0", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "4", + "name": "DIO1", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "5", + "name": "DIO2", + "type": "I/O", + "description": "I/O Digital GPIO, high-drive capability" + }, + { + "number": "6", + "name": "DIO3", + "type": "I/O", + "description": "I/O Digital GPIO, high-drive capability" + }, + { + "number": "7", + "name": "DIO4", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "8", + "name": "DIO5", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "9", + "name": "VDDIO", + "type": "", + "description": "- Power 1.71V to 3.8V split rail I/O supply(4)" + }, + { + "number": "10", + "name": "DIO7", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "11", + "name": "DIO9_SWDIO", + "type": "I/O", + "description": "I/O Digital GPIO, SWD interface: mode select or SWDIO, high-drive capability" + }, + { + "number": "12", + "name": "DIO10_SWDCK", + "type": "I/O", + "description": "I/O Digital GPIO, SWD interface: serial wire clock, high-drive capability" + }, + { + "number": "13", + "name": "DIO11", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "14", + "name": "DIO12", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "15", + "name": "DIO15", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "16", + "name": "DIO16", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "17", + "name": "VDDIO", + "type": "", + "description": "- Power 1.71V to 3.8V split rail I/O supply(4)" + }, + { + "number": "18", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply(4)" + }, + { + "number": "19", + "name": "DIO17_A8", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability, high-drive capability" + }, + { + "number": "20", + "name": "DIO18_A7", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability, high-drive capability" + }, + { + "number": "21", + "name": "DIO19_A6", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "22", + "name": "DIO20_A5", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "23", + "name": "DIO21_A4", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "24", + "name": "DIO22_A3", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "25", + "name": "RSTN", + "type": "", + "description": "I Digital Reset, active low. No internal pullup resistor" + }, + { + "number": "26", + "name": "DIO23_X32P", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 1, optional TCXO input" + }, + { + "number": "27", + "name": "DIO24_X32N", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 2" + }, + { + "number": "28", + "name": "VDDD", + "type": "", + "description": "- Power Internal 1.32V regulated core-supply. Connect an external 1μF" + }, + { + "number": "29", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply (4)" + }, + { + "number": "30", + "name": "DCDC", + "type": "", + "description": "- Power Switching node of internal DC/DC converter(4)" + }, + { + "number": "31", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply. Connect an external 10μF decoupling" + }, + { + "number": "32", + "name": "DIO27_A1", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "33", + "name": "DIO28_A0", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "34", + "name": "VDDR", + "type": "", + "description": "- Power converter or the internal LDO. Connect an external 10μF" + }, + { + "number": "35", + "name": "X48P", + "type": "", + "description": "- Analog 48MHz crystal oscillator pin 1" + }, + { + "number": "36", + "name": "X48N", + "type": "", + "description": "- Analog 48MHz crystal oscillator pin 2" + }, + { + "number": "37", + "name": "NC", + "type": "NC", + "description": "- - No Connect" + }, + { + "number": "38", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply(4)" + }, + { + "number": "39", + "name": "ANT", + "type": "", + "description": "- RF 2.4GHz TX, RX" + }, + { + "number": "40", + "name": "NC", + "type": "NC", + "description": "- - No Connect(6)" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/CC2755P10", + "pdfSha256": "4a44ff10ea0d9f7929a61f293955673dd1906aed6a0a4e16aa34736bc56c15f3", + "pdfPageNumbers": [10, 11, 13, 24, 25, 26, 27, 28, 29], + "pdfParser": "name-number-pin-function-table", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "CC2755P20": { + "family": "CC2755P20", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CC2755P207E0WRHAR", + "packageCode": "RHA", + "expectedPinCount": 40, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"CC2755P20\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"CC2755P207E0WRHAR\",\"packageCode\":\"RHA\",\"expectedPinCount\":40,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:07.144Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/CC2755P20/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/CC2755P20#page=8", + "warnings": [ + "Recovered 40/40 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin 1: kept VDDR, ignored SPI1SCLK.", + "Official PDF contains conflicting names for pin 2: kept VDDR, ignored UART1CTS.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored LPCO.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored T0C0.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored LFXT_N.", + "Official PDF contains conflicting names for pin 1: kept VDDR, ignored SPI1PICO.", + "Official PDF contains conflicting names for pin 2: kept VDDR, ignored I2C0SCL.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T0C1N.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored LRFD6.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored ADC1/AREF+.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored DTB0.", + "Official PDF contains conflicting names for pin 1: kept VDDR, ignored SPI1POCI.", + "Official PDF contains conflicting names for pin 2: kept VDDR, ignored I2C0SDA.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T0C2N.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored LRFD7.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored ADC0/AREF-.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored ADC0.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored ADC1.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored ADC3.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored ADC5.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored ADC6.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored ADC7.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored ADC8.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored AREF-.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored X32P.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored X32N.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored CKMIN.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored LFCI.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored LPCO.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored LPC+.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored LPC-.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored DTB0.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored DTB1.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored DTB2.", + "Official PDF contains conflicting names for pin 22: kept DIO20_A5, ignored DTB3.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored DTB4.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored DTB5.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored DTB6.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored DTB8.", + "Official PDF contains conflicting names for pin 13: kept DIO11, ignored DTB9.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored DTB10.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored DTB11.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored DTB12.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored DTB13.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored DTB14.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored DTB15.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored I2C0SCL.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored I2C0SDA.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored I2S0MCLK.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored I2S0SCLK.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored I2S0WS.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored I2S0SD1.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored EXTCI.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored LRFD0.", + "Official PDF contains conflicting names for pin 20: kept DIO18_A7, ignored LRFD1.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored LRFD2.", + "Official PDF contains conflicting names for pin 24: kept DIO22_A3, ignored LRFD5.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored LRFD6.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored LRFD7.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored SPI0POCI.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored SPI0CSN.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored SPI0PICO.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored SPI1SCLK.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored SPI1POCI.", + "Official PDF contains conflicting names for pin 16: kept DIO16, ignored SPI1CSN.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored SPI1PICO.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored SWDCK.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored T0C0.", + "Official PDF contains conflicting names for pin 11: kept DIO9_SWDIO, ignored T0C1.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored T0C2.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T1C0.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T1C1.", + "Official PDF contains conflicting names for pin 4: kept DIO1, ignored T2C0.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored T2C1.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored T2C2.", + "Official PDF contains conflicting names for pin 13: kept DIO11, ignored T3C0.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T3C1.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T3C2.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored T0C0N.", + "Official PDF contains conflicting names for pin 32: kept DIO27_A1, ignored T0C1N.", + "Official PDF contains conflicting names for pin 33: kept DIO28_A0, ignored T0C2N.", + "Official PDF contains conflicting names for pin 15: kept DIO15, ignored T1C0N.", + "Official PDF contains conflicting names for pin 23: kept DIO21_A4, ignored T1C1N.", + "Official PDF contains conflicting names for pin 14: kept DIO12, ignored T2C2N.", + "Official PDF contains conflicting names for pin 3: kept DIO0, ignored T3C0N.", + "Official PDF contains conflicting names for pin 8: kept DIO5, ignored T3C1N.", + "Official PDF contains conflicting names for pin 10: kept DIO7, ignored T3C2N.", + "Official PDF contains conflicting names for pin 5: kept DIO2, ignored T0PE.", + "Official PDF contains conflicting names for pin 12: kept DIO10_SWDCK, ignored T2PE.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored UART0TXD.", + "Official PDF contains conflicting names for pin 21: kept DIO19_A6, ignored UART0RXD.", + "Official PDF contains conflicting names for pin 19: kept DIO17_A8, ignored UART0RTS.", + "Official PDF contains conflicting names for pin 6: kept DIO3, ignored UART1TXD.", + "Official PDF contains conflicting names for pin 7: kept DIO4, ignored UART1RXD.", + "Official PDF contains conflicting names for pin 27: kept DIO24_X32N, ignored UART1CTS.", + "Official PDF contains conflicting names for pin 26: kept DIO23_X32P, ignored UART1RTS." + ], + "packageColumn": "RHA pin-number column", + "tableClass": "official-ti-pdf/name-number-pin-function-table", + "pins": [ + { + "number": "1", + "name": "VDDR", + "type": "", + "description": "- Power Internal supply, must be powered from the internal DC/DC" + }, + { + "number": "2", + "name": "VDDR", + "type": "", + "description": "- Power Internal supply, must be powered from the internal DC/DC" + }, + { + "number": "3", + "name": "DIO0", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "4", + "name": "DIO1", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "5", + "name": "DIO2", + "type": "I/O", + "description": "I/O Digital GPIO, high-drive capability" + }, + { + "number": "6", + "name": "DIO3", + "type": "I/O", + "description": "I/O Digital GPIO, high-drive capability" + }, + { + "number": "7", + "name": "DIO4", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "8", + "name": "DIO5", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "9", + "name": "VDDIO", + "type": "", + "description": "- Power 1.71V to 3.8V split rail I/O supply(4)" + }, + { + "number": "10", + "name": "DIO7", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "11", + "name": "DIO9_SWDIO", + "type": "I/O", + "description": "I/O Digital GPIO, SWD interface: mode select or SWDIO, high-drive capability" + }, + { + "number": "12", + "name": "DIO10_SWDCK", + "type": "I/O", + "description": "I/O Digital GPIO, SWD interface: serial wire clock, high-drive capability" + }, + { + "number": "13", + "name": "DIO11", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "14", + "name": "DIO12", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "15", + "name": "DIO15", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "16", + "name": "DIO16", + "type": "I/O", + "description": "I/O Digital GPIO" + }, + { + "number": "17", + "name": "VDDIO", + "type": "", + "description": "- Power 1.71V to 3.8V split rail I/O supply(4)" + }, + { + "number": "18", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply(4)" + }, + { + "number": "19", + "name": "DIO17_A8", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability, high-drive capability" + }, + { + "number": "20", + "name": "DIO18_A7", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability, high-drive capability" + }, + { + "number": "21", + "name": "DIO19_A6", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "22", + "name": "DIO20_A5", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "23", + "name": "DIO21_A4", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "24", + "name": "DIO22_A3", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "25", + "name": "RSTN", + "type": "", + "description": "I Digital Reset, active low. No internal pullup resistor" + }, + { + "number": "26", + "name": "DIO23_X32P", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 1, optional TCXO input" + }, + { + "number": "27", + "name": "DIO24_X32N", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 2" + }, + { + "number": "28", + "name": "VDDD", + "type": "", + "description": "- Power Internal 1.32V regulated core-supply. Connect an external 1μF" + }, + { + "number": "29", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply (4)" + }, + { + "number": "30", + "name": "DCDC", + "type": "", + "description": "- Power Switching node of internal DC/DC converter(4)" + }, + { + "number": "31", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply. Connect an external 10μF decoupling" + }, + { + "number": "32", + "name": "DIO27_A1", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "33", + "name": "DIO28_A0", + "type": "I/O", + "description": "I/O Digital or Analog GPIO, analog capability" + }, + { + "number": "34", + "name": "VDDR", + "type": "", + "description": "- Power converter or the internal LDO. Connect an external 10μF" + }, + { + "number": "35", + "name": "X48P", + "type": "", + "description": "- Analog 48MHz crystal oscillator pin 1" + }, + { + "number": "36", + "name": "X48N", + "type": "", + "description": "- Analog 48MHz crystal oscillator pin 2" + }, + { + "number": "37", + "name": "NC", + "type": "NC", + "description": "- - No Connect" + }, + { + "number": "38", + "name": "VDDS", + "type": "PWR", + "description": "- Power 1.71V to 3.8V supply(4)" + }, + { + "number": "39", + "name": "ANT", + "type": "", + "description": "- RF 2.4GHz TX, RX" + }, + { + "number": "40", + "name": "NC", + "type": "NC", + "description": "- - No Connect(6)" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/CC2755P20", + "pdfSha256": "dd30bd601ab7d2fe813eb2a1e5ae42bff8dd53e40a7512bb5e600b94bdd9a8a5", + "pdfPageNumbers": [8, 9, 14, 15, 16, 17, 18, 19], + "pdfParser": "name-number-pin-function-table", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "CC3100": { + "family": "CC3100", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CC3100R11MRGCR", + "packageCode": "RGC", + "expectedPinCount": 64, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"CC3100\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"CC3100R11MRGCR\",\"packageCode\":\"RGC\",\"expectedPinCount\":64,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:07.818Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/CC3100/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/CC3100/datasheet/terminal_configuration_and_functions", + "packageColumn": "PIN", + "tableClass": "gentable", + "pins": [ + { + "number": "1", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "2", + "name": "nHIB", + "type": "I", + "description": "Hibernate signal input to the NWP (active low). This is connected to the MCU GPIO. If the GPIO from the MCU can float while the MCU enters low power, consider adding a pull-up resistor on the board to avoid floating." + }, + { + "number": "3", + "name": "Reserved", + "type": "NA", + "description": "Reserved for future use" + }, + { + "number": "4", + "name": "FORCE_AP", + "type": "I", + "description": "For forced AP mode, pull to high on the board using 100k resistor. Otherwise, pull down to ground using 100k resistor." + }, + { + "number": "5", + "name": "HOST_SPI_CLK", + "type": "I", + "description": "Host interface SPI clock" + }, + { + "number": "6", + "name": "HOST_SPI_MOSI", + "type": "I", + "description": "Host interface SPI data input" + }, + { + "number": "7", + "name": "HOST_SPI_MISO", + "type": "O", + "description": "Host interface SPI data output" + }, + { + "number": "8", + "name": "HOST_SPI_nCS", + "type": "I", + "description": "Host interface SPI chip select (active low)" + }, + { + "number": "9", + "name": "VDD_DIG1", + "type": "Power", + "description": "Digital core supply (1.2 V)" + }, + { + "number": "10", + "name": "VIN_IO1", + "type": "Power", + "description": "I/O supply" + }, + { + "number": "11", + "name": "FLASH_SPI_CLK", + "type": "O", + "description": "Serial flash interface: SPI clock" + }, + { + "number": "12", + "name": "FLASH_SPI_MOSI", + "type": "O", + "description": "Serial flash interface: SPI data out" + }, + { + "number": "13", + "name": "FLASH _SPI_MISO, (active high)", + "type": "I", + "description": "Serial flash interface: SPI data in" + }, + { + "number": "14", + "name": "FLASH _SPI_nCS", + "type": "O", + "description": "Serial flash interface: SPI chip select (active low)" + }, + { + "number": "15", + "name": "HOST_INTR", + "type": "O", + "description": "Interrupt output (active high)" + }, + { + "number": "16", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "17", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "18", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "19", + "name": "Reserved", + "type": "N/A", + "description": "Connect 100K pull-down to ground." + }, + { + "number": "20", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "21", + "name": "SOP2/TCXO_EN", + "type": "O", + "description": "Enable signal for external TCXO. Add 10k pulldown to ground." + }, + { + "number": "22", + "name": "WLAN_XTAL_N", + "type": "Analog", + "description": "Connect the WLAN 40-MHz XTAL here." + }, + { + "number": "23", + "name": "WLAN_XTAL_P", + "type": "Analog", + "description": "Connect the WLAN 40-MHz XTAL here." + }, + { + "number": "24", + "name": "VDD_PLL", + "type": "Power", + "description": "Internal PLL power supply (1.4 V nominal)" + }, + { + "number": "25", + "name": "LDO_IN2", + "type": "Power", + "description": "Input to internal LDO" + }, + { + "number": "26", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "27", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "28", + "name": "NC", + "type": "N/A", + "description": "Unused; leave unconnected." + }, + { + "number": "29", + "name": "Reserved", + "type": "O", + "description": "Reserved for future use" + }, + { + "number": "30", + "name": "Reserved", + "type": "O", + "description": "Reserved for future use" + }, + { + "number": "31", + "name": "RF_BG", + "type": "RF", + "description": "2.4-GHz RF TX/RX" + }, + { + "number": "32", + "name": "nRESET", + "type": "I", + "description": "RESET input for the device. Active low input. Use RC circuit (100k || 0.1 µF) for power on reset." + }, + { + "number": "33", + "name": "VDD_PA_IN", + "type": "Power", + "description": "Power supply for the RF power amplifier (PA)" + }, + { + "number": "34", + "name": "SOP1", + "type": "N/A", + "description": "Add 100K pulldown to ground." + }, + { + "number": "35", + "name": "SOP0", + "type": "N/A", + "description": "Add 100K pulldown to ground." + }, + { + "number": "36", + "name": "LDO_IN1", + "type": "Power", + "description": "Input to internal LDO" + }, + { + "number": "37", + "name": "VIN_DCDC_ANA", + "type": "Power", + "description": "Power supply for the DC-DC converter for analog section" + }, + { + "number": "38", + "name": "DCDC_ANA_SW", + "type": "Power", + "description": "Analog DC-DC converter switch output" + }, + { + "number": "39", + "name": "VIN_DCDC_PA", + "type": "Power", + "description": "PA DC-DC converter input supply" + }, + { + "number": "40", + "name": "DCDC_PA_SW_P", + "type": "Power", + "description": "PA DC-DC converter switch output +ve" + }, + { + "number": "41", + "name": "DCDC_PA_SW_N", + "type": "Power", + "description": "PA DC-DC converter switch output –ve" + }, + { + "number": "42", + "name": "DCDC_PA_OUT", + "type": "Power", + "description": "PA DC-DC converter output. Connect the output capacitor for DC-DC here." + }, + { + "number": "43", + "name": "DCDC_DIG_SW", + "type": "Power", + "description": "Digital DC-DC converter switch output" + }, + { + "number": "44", + "name": "VIN_DCDC_DIG", + "type": "Power", + "description": "Power supply input for the digital DC-DC converter" + }, + { + "number": "45", + "name": "DCDC_ANA2_SW_P", + "type": "Power", + "description": "Analog2 DC-DC converter switch output +ve" + }, + { + "number": "46", + "name": "DCDC_ANA2_SW_N", + "type": "Power", + "description": "Analog2 DC-DC converter switch output –ve" + }, + { + "number": "47", + "name": "VDD_ANA2", + "type": "Power", + "description": "Analog2 power supply input" + }, + { + "number": "48", + "name": "VDD_ANA1", + "type": "Power", + "description": "Analog1 power supply input" + }, + { + "number": "49", + "name": "VDD_RAM", + "type": "Power", + "description": "Power supply for the internal RAM" + }, + { + "number": "50", + "name": "UART1_nRTS", + "type": "O", + "description": "UART host interface" + }, + { + "number": "51", + "name": "RTC_XTAL_P", + "type": "Analog", + "description": "32.768 kHz XTAL_P/external CMOS level clock input" + }, + { + "number": "52", + "name": "RTC_XTAL_N", + "type": "Analog", + "description": "32.768 kHz XTAL_N/100k external pullup for external clock" + }, + { + "number": "53", + "name": "NC", + "type": "N/A", + "description": "Unused. Leave unconnected." + }, + { + "number": "54", + "name": "VIN_IO2", + "type": "Power", + "description": "I/O power supply. Same as battery voltage." + }, + { + "number": "55", + "name": "UART1_TX", + "type": "O", + "description": "UART host interface. Connect to test point on prototype for flash programming." + }, + { + "number": "56", + "name": "VDD_DIG2", + "type": "Power", + "description": "Digital power supply (1.2 V)" + }, + { + "number": "57", + "name": "UART1_RX", + "type": "I", + "description": "UART host interface. Connect to test point on prototype for flash programming." + }, + { + "number": "58", + "name": "TEST_58", + "type": "N/A", + "description": "Test signal. Connect to an external test point." + }, + { + "number": "59", + "name": "TEST_59", + "type": "N/A", + "description": "Test signal. Connect to an external test point." + }, + { + "number": "60", + "name": "TEST_60", + "type": "O", + "description": "Test signal. Connect to an external test point." + }, + { + "number": "61", + "name": "UART1_nCTS", + "type": "I", + "description": "UART host interface" + }, + { + "number": "62", + "name": "TEST_62", + "type": "O", + "description": "Test signal. Connect to an external test point." + }, + { + "number": "63", + "name": "NC", + "type": "I/O", + "description": "Leave unconnected" + }, + { + "number": "64", + "name": "NC", + "type": "I/O", + "description": "Leave unconnected" + }, + { + "number": "65", + "name": "GND", + "type": "Power", + "description": "Ground tab used as thermal and electrical ground" + } + ], + "warnings": ["Official TI pin count 65 does not match catalog pinCount 64."] + }, + "CC3300MOD": { + "family": "CC3300MOD", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CC3300MODENIAMOZR", + "packageCode": "MOZ", + "expectedPinCount": 65, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"CC3300MOD\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"CC3300MODENIAMOZR\",\"packageCode\":\"MOZ\",\"expectedPinCount\":65,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:07.482Z", + "attempts": 1, + "rootUrl": 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"type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "28", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "18", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "12", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "9", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "32", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "29", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "16", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "11", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "27", + "name": "COEX_PRIORITY", + "type": "I", + "description": "External Coexistence Interface - Priority" + }, + { + "number": "17", + "name": "COEX_PRIORITY", + "type": "I", + "description": "External Coexistence Interface - Priority" + }, + { + "number": "34", + "name": "GPIO12", + "type": "I/O", + "description": "General Purpose Inputs or Outputs" + }, + { + "number": "38", + "name": "Logger", + "type": "O", + "description": "Tracer (UART TX Debug Logger)" + }, + { + "number": "21", + "name": "xSPI_CLK", + "type": "O", + "description": "Clock to xSPI Flash/RAM" + }, + { + "number": "20", + "name": "xSPI_DATA_0", + "type": "I/O", + "description": "Data 0 to xSPI Flash/RAM" + }, + { + "number": "25", + "name": "xSPI_DATA_1", + "type": "I/O", + "description": "Data 1 to xSPI Flash/RAM" + }, + { + "number": "24", + "name": "xSPI_DATA_2", + "type": "I/O", + "description": "Data 2 to xSPI Flash/RAM" + }, + { + "number": "22", + "name": "xSPI_DATA_3", + "type": "I/O", + "description": "Data 3 to xSPI Flash/RAM" + }, + { + "number": "26", + "name": "xSPI_CS_FLASH", + "type": "O", + "description": "Chip select to xSPI Flash" + }, + { + "number": "48", + "name": "VDDMAIN_IN", + "type": "N/A", + "description": "1.8V Supply Input for SRAM and Digital" + }, + { + "number": "10", + "name": "VDD_DIG_IN", + "type": "N/A", + "description": "Internal Digital Core Voltage - Must be Shorted to DIG_LDO_OUT" + }, + { + "number": "4", + "name": "VDD_ANA_IN1", + "type": "N/A", + "description": "1.8V supply to Analog Domain" + }, + { + "number": "5", + "name": "VDD_ANA_IN2", + "type": "N/A", + "description": "1.8V supply to Analog Domain" + }, + { + "number": "56", + "name": "PA_LDO_IN1", + "type": "N/A", + "description": "3.3V supply for PA" + }, + { + "number": "55", + "name": "PA_LDO_IN2", + "type": "N/A", + "description": "3.3V supply for PA" + }, + { + "number": "37", + "name": "VIO1", + "type": "N/A", + "description": "1.8/3.3V IO supply for IO Ring 1" + }, + { + "number": "15", + "name": "VIO2", + "type": "N/A", + "description": "1.8/3.3V IO supply for IO Ring 2" + }, + { + "number": "23", + "name": "VDDSF", + "type": "N/A", + "description": "1.8/3.3V IO supply for IO Ring VDD_SF" + }, + { + "number": "47", + "name": "DIG_LDO_OUT", + "type": "N/A", + "description": "Digital LDO output to VDD_DIG_IN" + }, + { + "number": "1", + "name": "PA_LDO_OUT", + "type": "N/A", + "description": "PA LDO output" + }, + { + "number": "49", + "name": "nReset", + "type": "N/A", + "description": "Reset line for enabling or disabling device (active low)" + }, + { + "number": "2", + "name": "RF_BG", + "type": "N/A", + "description": "Bluetooth Low Energy and WLAN 2.4GHz RF port" + }, + { + "number": "40", + "name": "SWDIO", + "type": "I/O", + "description": "Serial Wire Debug I/O" + }, + { + "number": "39", + "name": "SWCLK", + "type": "I", + "description": "Serial Wire Debug Clock" + } + ], + "warnings": [ + "Pin 50 appears more than once with conflicting data; kept the first row.", + "Pin 41 appears more than once with conflicting data; kept the first row.", + "Pin 52 appears more than once with conflicting data; kept the first row.", + "Pin 46 appears more than once with conflicting data; kept the first row.", + "Pin 36 appears more than once with conflicting data; kept the first row.", + "Pin 35 appears more than once with conflicting data; kept the first row.", + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 51 appears more than once with conflicting data; kept the first row.", + "Pin 53 appears more than once with conflicting data; kept the first row.", + "Pin 44 appears more than once with conflicting data; kept the first row.", + "Pin 42 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row.", + "Pin 8 appears more than once with conflicting data; kept the first row.", + "Pin 45 appears more than once with conflicting data; kept the first row.", + "Pin 13 appears more than once with conflicting data; kept the first row.", + "Pin 43 appears more than once with conflicting data; kept the first row.", + "Pin 6 appears more than once with conflicting data; kept the first row.", + "Pin 33 appears more than once with conflicting data; kept the first row.", + "Pin 28 appears more than once with conflicting data; kept the first row.", + "Pin 11 appears more than once with conflicting data; kept the first row.", + "Pin 27 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 12 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 32 appears more than once with conflicting data; kept the first row.", + "Pin 31 appears more than once with conflicting data; kept the first row.", + "Pin 30 appears more than once with conflicting data; kept the first row.", + "Pin 29 appears more than once with conflicting data; kept the first row.", + "Pin 18 appears more than once with conflicting data; kept the first row.", + "Pin 17 appears more than once with conflicting data; kept the first row.", + "Pin 34 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 54 does not match catalog pinCount 56." + ] + }, + "CC3551E": { + "family": "CC3551E", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CC3551ENJARSHR", + "packageCode": "RSH", + "expectedPinCount": 56, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"CC3551E\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"CC3551ENJARSHR\",\"packageCode\":\"RSH\",\"expectedPinCount\":56,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.238Z", + 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"number": "50", + "name": "ADC7", + "type": "I", + "description": "ADC channel 7 input" + }, + { + "number": "33", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "30", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "19", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "14", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "13", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "8", + "name": "ANT_SEL_0", + "type": "O", + "description": "Antenna Selection Control" + }, + { + "number": "6", + "name": "HFXT_P/External Input", + "type": "N/A", + "description": "52MHz crystal, HFXTAL_P pin" + }, + { + "number": "7", + "name": "HFXT_N", + "type": "N/A", + "description": "52MHz crystal, HFXTAL_N pin" + }, + { + "number": "51", + "name": "SLOW_CLOCK_IN", + "type": "I", + "description": "32.768kHz oscillator clock input or crystal LFXTAL_P pin" + }, + { + "number": "45", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "31", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "28", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "18", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "12", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "9", + "name": "COEX_REQ", + "type": "I", + "description": "External Coexistence Interface - Request" + }, + { + "number": "32", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "29", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "16", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "11", + "name": "COEX_GRANT", + "type": "O", + "description": "External Coexistence Interface - Grant" + }, + { + "number": "27", + "name": "COEX_PRIORITY", + "type": "I", + "description": "External Coexistence Interface - Priority" + }, + { + "number": "17", + "name": "COEX_PRIORITY", + "type": "I", + "description": "External Coexistence Interface - Priority" + }, + { + "number": "34", + "name": "GPIO12", + "type": "I/O", + "description": "General Purpose Inputs or Outputs" + }, + { + "number": "38", + "name": "Logger", + "type": "O", + "description": "Tracer (UART TX Debug Logger)" + }, + { + "number": "21", + "name": "xSPI_CLK", + "type": "O", + "description": "Clock to xSPI Flash/RAM" + }, + { + "number": "20", + "name": "xSPI_DATA_0", + "type": "I/O", + "description": "Data 0 to xSPI Flash/RAM" + }, + { + "number": "25", + "name": "xSPI_DATA_1", + "type": "I/O", + "description": "Data 1 to xSPI Flash/RAM" + }, + { + "number": "24", + "name": "xSPI_DATA_2", + "type": "I/O", + "description": "Data 2 to xSPI Flash/RAM" + }, + { + "number": "22", + "name": "xSPI_DATA_3", + "type": "I/O", + "description": "Data 3 to xSPI Flash/RAM" + }, + { + "number": "26", + "name": "xSPI_CS_FLASH", + "type": "O", + "description": "Chip select to xSPI Flash" + }, + { + "number": "48", + "name": "VDDMAIN_IN", + "type": "N/A", + "description": "1.8V Supply Input for SRAM and Digital" + }, + { + "number": "10", + "name": "VDD_DIG_IN", + "type": "N/A", + "description": "Internal Digital Core Voltage - Must be Shorted to DIG_LDO_OUT" + }, + { + "number": "4", + "name": "VDD_ANA_IN1", + "type": "N/A", + "description": "1.8V supply to Analog Domain" + }, + { + "number": "5", + "name": "VDD_ANA_IN2", + "type": "N/A", + "description": "1.8V supply to Analog Domain" + }, + { + "number": "56", + "name": "PA_LDO_IN1", + "type": "N/A", + "description": "3.3V supply for PA" + }, + { + "number": "55", + "name": "PA_LDO_IN2", + "type": "N/A", + "description": "3.3V supply for PA" + }, + { + "number": "15", + "name": "VIO2", + "type": "N/A", + "description": "1.8/3.3V IO supply for IO Ring 2" + }, + { + "number": "23", + "name": "VDDSF", + "type": "N/A", + "description": "1.8/3.3V IO supply for IO Ring VDD_SF" + }, + { + "number": "47", + "name": "DIG_LDO_OUT", + "type": "N/A", + "description": "Digital LDO output to VDD_DIG_IN" + }, + { + "number": "1", + "name": "PA_LDO_OUT", + "type": "N/A", + "description": "PA LDO output" + }, + { + "number": "49", + "name": "nReset", + "type": "N/A", + "description": "Reset line for enabling or disabling device (active low)" + }, + { + "number": "2", + "name": "RF_BG", + "type": "N/A", + "description": "Bluetooth Low Energy and WLAN 2.4GHz RF port" + }, + { + "number": "54", + "name": "RF_A", + "type": "N/A", + "description": "WLAN 5GHz RF port" + }, + { + "number": "40", + "name": "SWDIO", + "type": "I/O", + "description": "Serial Wire Debug I/O" + }, + { + "number": "39", + "name": "SWCLK", + "type": "I", + "description": "Serial Wire Debug Clock" + } + ], + "warnings": [ + "Pin 50 appears more than once with conflicting data; kept the first row.", + "Pin 41 appears more than once with conflicting data; kept the first row.", + "Pin 46 appears more than once with conflicting data; kept the first row.", + "Pin 36 appears more than once with conflicting data; kept the first row.", + "Pin 35 appears more than once with conflicting data; kept the first row.", + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 51 appears more than once with conflicting data; kept the first row.", + "Pin 44 appears more than once with conflicting data; kept the first row.", + "Pin 42 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row.", + "Pin 8 appears more than once with conflicting data; kept the first row.", + "Pin 45 appears more than once with conflicting data; kept the first row.", + "Pin 13 appears more than once with conflicting data; kept the first row.", + "Pin 43 appears more than once with conflicting data; kept the first row.", + "Pin 6 appears more than once with conflicting data; kept the first row.", + "Pin 33 appears more than once with conflicting data; kept the first row.", + "Pin 28 appears more than once with conflicting data; kept the first row.", + "Pin 11 appears more than once with conflicting data; kept the first row.", + "Pin 27 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 12 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 32 appears more than once with conflicting data; kept the first row.", + "Pin 31 appears more than once with conflicting data; kept the first row.", + "Pin 30 appears more than once with conflicting data; kept the first row.", + "Pin 29 appears more than once with conflicting data; kept the first row.", + "Pin 18 appears more than once with conflicting data; kept the first row.", + "Pin 17 appears more than once with conflicting data; kept the first row.", + "Pin 34 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 52 does not match catalog pinCount 56." + ] + }, + "CSD18531Q5A": { + "family": "CSD18531Q5A", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CSD18531Q5AT", + "packageCode": "DQJ", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": 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{ + "number": "5", + "name": "DRAIN", + "type": "", + "description": "MOSFET drain" + }, + { + "number": "6", + "name": "DRAIN", + "type": "", + "description": "MOSFET drain" + }, + { + "number": "7", + "name": "DRAIN", + "type": "", + "description": "MOSFET drain" + }, + { + "number": "8", + "name": "DRAIN", + "type": "", + "description": "MOSFET drain" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/CSD18531Q5A", + "pdfSha256": "4b43b38fc33a7be86ded9bd5735141d0f9a009a62bd342319ea9e44d22a64fba", + "pdfPageNumbers": [1], + "pdfParser": "official-pdf-evidence-override", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for CSD18531Q5A has neither a Pin/Terminal Functions section nor a DQJ package pin-map link." + }, + "CSD18541F5": { + "family": "CSD18541F5", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "CSD18541F5T", + "packageCode": "YJK", + "expectedPinCount": 3, + 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"https://www.ti.com/lit/gpn/CSD18541F5", + "pdfSha256": "48d1927e7d25b2364673d5e694cf5f1042ce022cf91acadc59135d7dfa7f13d3", + "pdfPageNumbers": [8], + "pdfParser": "number-name-pin-function-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for CSD18541F5 has neither a Pin/Terminal Functions section nor a YJK package pin-map link." + }, + "DAC43701": { + "family": "DAC43701", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "DAC43701DSGR", + "packageCode": "DSG", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"DAC43701\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"DAC43701DSGR\",\"packageCode\":\"DSG\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:08.962Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DAC43701/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/DAC43701/datasheet/GUID-E21553F6-CE6E-480D-8B9F-1DA63533AB6C", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "5", + "name": "AGND", + "type": "Ground", + "description": "Ground reference point for all circuitry on the device" + }, + { + "number": "4", + "name": "CAP", + "type": "Input", + "description": "External capacitor for the internal LDO. Connect a capacitor (approximately 1.5 µF) between CAP and AGND." + }, + { + "number": "7", + "name": "FB", + "type": "Input", + "description": "Voltage-feedback pin" + }, + { + "number": "1", + "name": "GPI", + "type": "Input", + "description": "General-purpose input" + }, + { + "number": "8", + "name": "OUT", + "type": "Output", + "description": "Analog output voltage from DAC" + }, + { + "number": "2", + "name": "SCL", + "type": "Input", + "description": "Serial interface clock. This pin must be connected to the supply voltage with an external pullup resistor." + }, + { + "number": "3", + "name": "SDA", + "type": "Input/output", + "description": "Data are clocked into or out of the input register. This pin is a bidirectional, and must be connected to the supply voltage with an external pullup resistor." + }, + { + "number": "6", + "name": "VDD", + "type": "Power", + "description": "Analog supply voltage: 1.8 V to 5.5 V" + } + ], + "warnings": [] + }, + "DAC53204W": { + "family": "DAC53204W", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "DAC53204YBHR", + "packageDescription": "DSBGA-16(1.6x1.6)", + "packageCode": "YBH", + "expectedPinCount": 16, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/DAC53204YBHR.circuit.tsx", + "pinLabelCount": 16, + "coordinateLabelCount": 16, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 16, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"DAC53204W\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DAC53204YBHR\",\"packageDescription\":\"DSBGA-16(1.6x1.6)\",\"packageCode\":\"YBH\",\"expectedPinCount\":16,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DAC53204YBHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.333Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DAC53204W/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/DAC53204W/datasheet/GUID-323B5283-6ED6-4C45-8DD8-DA3DF6B004F3", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "A1", + "name": "VREF", + "type": "Power", + "description": "External reference input. Connect a capacitor (approximately 0.1 μF) between VREF and AGND. , Use a pullup resistor to VDD when the external reference is not used. Do not ramp up this pin before VDD. In case an external reference is used, make sure the reference ramps up after VDD." + }, + { + "number": "A2", + "name": "OUT3", + "type": "Output", + "description": "Analog output voltage from DAC channel 3." + }, + { + "number": "A3", + "name": "OUT2", + "type": "Output", + "description": "Analog output voltage from DAC channel 2." + }, + { + "number": "A4", + "name": "GPIO/SDO", + "type": "Input/Output", + "description": "General-purpose input/output configurable as LDAC , PD , PROTECT , RESET , SDO, and STATUS . For STATUS and SDO, connect the pin to the IO voltage with an external pullup resistor. If unused, connect the GPIO pin to VDD or AGND using an external resistor. This pin can ramp up before VDD." + }, + { + "number": "B1", + "name": "VDD", + "type": "Power", + "description": "Supply voltage." + }, + { + "number": "B2", + "name": "FB3", + "type": "Input", + "description": "Voltage feedback pin for channel 3. In voltage-output mode, connect to OUT3 for closed-loop amplifier output. In current-output mode, keep the FB3 pin unconnected to minimize leakage current." + }, + { + "number": "B3", + "name": "FB2", + "type": "Input", + "description": "Voltage feedback pin for channel 2. In voltage-output mode, connect to OUT2 for closed-loop amplifier output. In current-output mode, keep the FB2 pin unconnected to minimize leakage current." + }, + { + "number": "B4", + "name": "SCL/ SYNC", + "type": "Output", + "description": "IC serial interface clock or SPI chip select input. Connect this to the IO voltage using an external pullup resistor. This pin can ramp up before VDD." + }, + { + "number": "C1", + "name": "AGND", + "type": "Ground", + "description": "Ground reference point for all circuitry on the device." + }, + { + "number": "C2", + "name": "FB0", + "type": "Input", + "description": "Voltage feedback pin for channel 0. In voltage-output mode, connect to OUT0 for closed-loop amplifier output. In current-output mode, keep the FB0 pin unconnected to minimize leakage current." + }, + { + "number": "C3", + "name": "FB1", + "type": "Input", + "description": "Voltage feedback pin for channel 1. In voltage-output mode, connect to OUT1 for closed-loop amplifier output. In current-output mode, keep the FB1 pin unconnected to minimize leakage current." + }, + { + "number": "C4", + "name": "A0/SDI", + "type": "Input", + "description": "Address configuration pin for IC or serial data input for SPI. , For A0, connect this pin to VDD, AGND, SDA, or SCL for address configuration ( Section 6.5.2.2.1 ). , For SDI, this pin need not be pulled up or pulled down. This pin can ramp up before VDD." + }, + { + "number": "D1", + "name": "CAP", + "type": "Power", + "description": "External bypass capacitor for the internal LDO. Connect a capacitor (approximately 1.5 μF) between CAP and AGND." + }, + { + "number": "D2", + "name": "OUT0", + "type": "Output", + "description": "Analog output voltage from DAC channel 0." + }, + { + "number": "D3", + "name": "OUT1", + "type": "Output", + "description": "Analog output voltage from DAC channel 1." + }, + { + "number": "D4", + "name": "SDA/SCLK", + "type": "Input/Output", + "description": "Bidirectional IC serial data bus or SPI clock input. Connect this pinto the IO voltage using an external pullup resistor in IC mode. This pin can ramp up before VDD." + } + ], + "warnings": [] + }, + "DLP4500": { + "family": "DLP4500", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "DLP4500AFQD", + "packageCode": "FQD", + "expectedPinCount": 98, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"DLP4500\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"DLP4500AFQD\",\"packageCode\":\"FQD\",\"expectedPinCount\":98,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.448Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DLP4500/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/DLP4500/datasheet/GUID-939D8425-3634-46AD-83FB-04A5552967B1", + "packageColumn": "PIN / NO. + PIN", + "tableClass": "table page-break table wide-orientation", + "pins": [ + { + "number": "A1", + "name": "DATA(0)", + "type": "Input", + "description": "Input data bus, bit 0, LSB" + }, + { + "number": "A2", + "name": "DATA(1)", + "type": "Input", + "description": "Input data bus, bit 1" + }, + { + "number": "A3", + "name": "DATA(2)", + "type": "Input", + "description": "Input data bus, bit 2" + }, + { + "number": "A4", + "name": "DATA(3)", + "type": "Input", + "description": "Input data bus, bit 3" + }, + { + "number": "B1", + "name": "DATA(4)", + "type": "Input", + "description": "Input data bus, bit 4" + }, + { + "number": "B3", + "name": "DATA(5)", + "type": "Input", + "description": "Input data bus, bit 5" + }, + { + "number": "C1", + "name": "DATA(6)", + "type": "Input", + "description": "Input data bus, bit 6" + }, + { + "number": "C3", + "name": "DATA(7)", + "type": "Input", + "description": "Input data bus, bit 7" + }, + { + "number": "C4", + "name": "DATA(8)", + "type": "Input", + "description": "Input data bus, bit 8" + }, + { + "number": "D1", + "name": "DATA(9)", + "type": "Input", + "description": "Input data bus, bit 9" + }, + { + "number": "D4", + "name": "DATA(10)", + "type": "Input", + "description": "Input data bus, bit 10" + }, + { + "number": "E1", + "name": "DATA(11)", + "type": "Input", + "description": "Input data bus, bit 11" + }, + { + "number": "E4", + "name": "DATA(12)", + "type": "Input", + "description": "Input data bus, bit 12" + }, + { + "number": "F1", + "name": "DATA(13)", + "type": "Input", + "description": "Input data bus, bit 13" + }, + { + "number": "F3", + "name": "DATA(14)", + "type": "Input", + "description": "Input data bus, bit 14" + }, + { + "number": "G1", + "name": "DATA(15)", + "type": "Input", + "description": "Input data bus, bit 15" + }, + { + "number": "G2", + "name": "DATA(16)", + "type": "Input", + "description": "Input data bus, bit 16" + }, + { + "number": "G4", + "name": "DATA(17)", + "type": "Input", + "description": "Input data bus, bit 17" + }, + { + "number": "H1", + "name": "DATA(18)", + "type": "Input", + "description": "Input data bus, bit 18" + }, + { + "number": "H2", + "name": "DATA(19)", + "type": "Input", + "description": "Input data bus, bit 19" + }, + { + "number": "H4", + "name": "DATA(20)", + "type": "Input", + "description": "Input data bus, bit 20" + }, + { + "number": "J1", + "name": "DATA(21)", + "type": "Input", + "description": "Input data bus, bit 21" + }, + { + "number": "J3", + "name": "DATA(22)", + "type": "Input", + "description": "Input data bus, bit 22" + }, + { + "number": "J4", + "name": "DATA(23)", + "type": "Input", + "description": "Input data bus, bit 23, MSB" + }, + { + "number": "K1", + "name": "DCLK", + "type": "Input", + "description": "Input data bus clock" + }, + { + "number": "K2", + "name": "LOADB", + "type": "Input", + "description": "Parallel-data load enable" + }, + { + "number": "K4", + "name": "TRC", + "type": "Input", + "description": "Input-data toggle rate control" + }, + { + "number": "K3", + "name": "SCTRL", + "type": "Input", + "description": "Serial-control bus" + }, + { + "number": "C20", + "name": "SAC_BUS", + "type": "Input", + "description": "Stepped address-control serial-bus data" + }, + { + "number": "C22", + "name": "SAC_CLK", + "type": "Input", + "description": "Stepped address-control serial-bus clock" + }, + { + "number": "B21", + "name": "DRC_BUS", + "type": "Input", + "description": "DMD reset-control serial bus" + }, + { + "number": "A20", + "name": "DRC_OE", + "type": "Input", + "description": "Active-low output enable signal for internal DMD reset driver circuitry" + }, + { + "number": "A22", + "name": "DRC_STROBE", + "type": "Input", + "description": "Strobe signal for DMD reset-control inputs" + }, + { + "number": "C19", + "name": "VBIAS", + "type": "Power", + "description": "Mirror-reset bias voltage" + }, + { + "number": "D19", + "name": "VBIAS", + "type": "Power", + "description": "Mirror-reset bias voltage" + }, + { + "number": "A19", + "name": "VOFFSET", + "type": "Power", + "description": "Mirror-reset offset voltage" + }, + { + "number": "K19", + "name": "VOFFSET", + "type": "Power", + "description": "Mirror-reset offset voltage" + }, + { + "number": "E19", + "name": "VRESET", + "type": "Power", + "description": "Mirror-reset voltage" + }, + { + "number": "F19", + "name": "VRESET", + "type": "Power", + "description": "Mirror-reset voltage" + }, + { + "number": "B19", + "name": "VREF", + "type": "Power", + "description": "Power supply for LVCMOS double-data-rate (DDR) interface" + }, + { + "number": "J19", + "name": "VREF", + "type": "Power", + "description": "Power supply for LVCMOS double-data-rate (DDR) interface" + }, + { + "number": "B22", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "C2", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "D21", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "E2", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "E20", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "E22", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "F21", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "G3", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "G19", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "G20", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "G22", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "H19", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "H21", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "J20", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "J22", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "K21", + "name": "VCC", + "type": "Power", + "description": "Power supply for LVCMOS logic" + }, + { + "number": "A21", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "B2", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "B4", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "B20", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "C21", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "D2", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "D3", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "D20", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "D22", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "E3", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "E21", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "F2", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "F4", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "F20", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "F22", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "G21", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "H3", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "H20", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "H22", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "J2", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "J21", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "K20", + "name": "VSS", + "type": "Power", + "description": "Ground – Common return for all power inputs" + }, + { + "number": "A5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "A18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "B5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "B18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "C5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "C18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "D5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "D18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "E5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "E18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "F5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "F18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "G5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "G18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "H5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "H18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "J5", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "J18", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + }, + { + "number": "K22", + "name": "UNUSED", + "type": "", + "description": "Do not connect" + } + ], + "warnings": [ + "Combined 2 package-specific TI pin tables.", + "TI's HTML table provides pin names and descriptions but no electrical pin-type column." + ] + }, + "DM3730": { + "family": "DM3730", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "DM3730CUSD100", + "packageDescription": "SPBGA-423", + "packageCode": "CUS", + "expectedPinCount": 423, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/DM3730CUSD100.circuit.tsx", + "pinLabelCount": 423, + "coordinateLabelCount": 423, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 423, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"DM3730\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DM3730CUSD100\",\"packageDescription\":\"SPBGA-423\",\"packageCode\":\"CUS\",\"expectedPinCount\":423,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DM3730CUSD100.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.247Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DM3730/datasheet", + "status": "ok", + "warnings": [ + "Recovered 423/423 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin G16: kept J6,, ignored vdds_mem.", + "Official PDF contains conflicting names for pin H15: kept J6,, ignored vdds_mem.", + "Official PDF contains conflicting names for pin F16: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin G15: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin G16: kept J6,, ignored J6.", + "Official PDF contains conflicting names for pin H15: kept J6,, ignored J6.", + "Official PDF contains conflicting names for pin J7: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin J8: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin K6: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin K7: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin K8: kept vdds_mem, ignored J6.", + "Official PDF contains conflicting names for pin F16: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin G15: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin G16: kept J6,, ignored K6.", + "Official PDF contains conflicting names for pin H15: kept J6,, ignored K6.", + "Official PDF contains conflicting names for pin J6: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin J7: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin J8: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin K7: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin K8: kept vdds_mem, ignored K6.", + "Official PDF contains conflicting names for pin F16: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin G15: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin G16: kept J6,, ignored vdd_core.", + "Official PDF contains conflicting names for pin H15: kept J6,, ignored vdd_core.", + "Official PDF contains conflicting names for pin J6: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin J7: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin J8: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin K6: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin K7: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin K8: kept vdds_mem, ignored vdd_core.", + "Official PDF contains conflicting names for pin G12: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin G13: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin H12: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin H13: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin J17: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin J18: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin K17: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin K18: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin K19: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin L14: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin L15: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin M14: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin M15: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin R17: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin R18: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin R19: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin T17: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin T18: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin T19: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin T20: kept vdd_core, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored vdd_mpu_iva.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored J10.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored J10.", + "Official PDF contains conflicting names for pin M6: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin M12: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin N8: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin R8: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin U12: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored J10.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin J10: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored M6.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored M6.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin M12: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin N8: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin R8: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin U12: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored M6.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin J10: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored M12.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored M12.", + "Official PDF contains conflicting names for pin M6: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin N8: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin R8: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin U12: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored M12.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin J10: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored N8.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored N8.", + "Official PDF contains conflicting names for pin M6: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin M12: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin R8: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin U12: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored N8.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin J10: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored R8.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored R8.", + "Official PDF contains conflicting names for pin M6: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin M12: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin N8: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin U12: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored R8.", + "Official PDF contains conflicting names for pin G10: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin H9: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin H10: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin J9: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin J10: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin L11: kept M6,, ignored U12.", + "Official PDF contains conflicting names for pin L12: kept M6,, ignored U12.", + "Official PDF contains conflicting names for pin M6: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin M7: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin M8: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin M12: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin N6: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin N7: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin N8: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin R6: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin R7: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin R8: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin T7: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin T8: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin U13: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin V12: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin V13: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin W12: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin W13: kept vdd_mpu_iva, ignored U12.", + "Official PDF contains conflicting names for pin M19: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin N17: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin N18: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin N19: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin U10: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin V9: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin W9: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin W10: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin Y9: kept vdds, ignored V10.", + "Official PDF contains conflicting names for pin M19: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin N17: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin N18: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin N19: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin U10: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin V9: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin V10: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin W9: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin W10: kept vdds, ignored Y9.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored vss.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored vss.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored vss.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored vss.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored vss.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored J14.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin L8: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored J14.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P11: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored J14.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored J14.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin U9: kept vss, ignored J14.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored J14.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin J14: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored L8.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored L8.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P11: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored L8.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored L8.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin U9: kept vss, ignored L8.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored L8.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin J14: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored P11.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin L8: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored P11.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored P11.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored P11.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin U9: kept vss, ignored P11.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored P11.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin J14: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored T10.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin L8: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored T10.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P11: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored T10.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored T10.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin U9: kept vss, ignored T10.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored T10.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin J14: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored U9.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin L8: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored U9.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P11: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored U9.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored U9.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored U9.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored U9.", + "Official PDF contains conflicting names for pin H16: kept vss, ignored No.", + "Official PDF contains conflicting names for pin J11: kept vss, ignored No.", + "Official PDF contains conflicting names for pin J12: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin J13: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin J14: kept vss, ignored No.", + "Official PDF contains conflicting names for pin J15: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin J16: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin K10: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin K11: kept J14,, ignored No.", + "Official PDF contains conflicting names for pin K14: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin K15: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin L8: kept vss, ignored No.", + "Official PDF contains conflicting names for pin L10: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin L13: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin L17: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin M9: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin M10: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin M11: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin M13: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin M16: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N9: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N10: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N11: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N12: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N13: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N14: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N15: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin N16: kept L8,, ignored No.", + "Official PDF contains conflicting names for pin P8: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P10: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P11: kept vss, ignored No.", + "Official PDF contains conflicting names for pin P12: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P13: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P14: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P15: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin P17: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin R10: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin R11: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin R14: kept P11,, ignored No.", + "Official PDF contains conflicting names for pin R15: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T9: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T10: kept vss, ignored No.", + "Official PDF contains conflicting names for pin T11: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T12: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T13: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T14: kept T10,, ignored No.", + "Official PDF contains conflicting names for pin T15: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin T16: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin U9: kept vss, ignored No.", + "Official PDF contains conflicting names for pin U11: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin U14: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin U15: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin U16: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin V15: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin V16: kept U9,, ignored No.", + "Official PDF contains conflicting names for pin AD1: kept NC, ignored No.", + "Official PDF contains conflicting names for pin A1: kept NC, ignored No.", + "Official PDF contains conflicting names for pin B1: kept NC, ignored No." + ], + "sectionUrl": "https://www.ti.com/lit/gpn/DM3730#page=64", + "packageColumn": "single CUS pin/ball-number column", + "tableClass": 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"J20", + "name": "cam_", + "type": "", + "description": "" + }, + { + "number": "J21", + "name": "dss_acbias", + "type": "", + "description": "" + }, + { + "number": "J22", + "name": "dss_data16", + "type": "", + "description": "" + }, + { + "number": "J23", + "name": "cam_d8", + "type": "", + "description": "" + }, + { + "number": "K2", + "name": "gpmc_a3", + "type": "", + "description": "" + }, + { + "number": "K3", + "name": "gpmc_a2", + "type": "", + "description": "" + }, + { + "number": "K4", + "name": "gpmc_a1", + "type": "", + "description": "" + }, + { + "number": "K5", + "name": "gpmc_nbe0_cle", + "type": "", + "description": "" + }, + { + "number": "K6", + "name": "vdds_mem", + "type": "PWR", + "description": "" + }, + { + "number": "K7", + "name": "vdds_mem", + "type": "PWR", + "description": "" + }, + { + "number": "K8", + "name": "vdds_mem", + "type": "PWR", + "description": "" + }, + { + "number": "K10", + "name": "J14,", + "type": "", + "description": "" + }, + { + "number": "K11", + "name": "J14,", + "type": "", + "description": "" + }, + { + "number": "K14", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "K15", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "K17", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "K18", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "K19", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "K20", + "name": "i2c1_scl", + "type": "", + "description": "" + }, + { + "number": "K21", + "name": "i2c1_sda", + "type": "", + "description": "" + }, + { + "number": "K22", + "name": "dss_data21", + "type": "", + "description": "" + }, + { + "number": "K23", + "name": "cam_d9", + "type": "", + "description": "" + }, + { + "number": "K24", + "name": "cam_d7", + "type": "", + "description": "" + }, + { + "number": "L1", + "name": "gpmc_nbe1", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "gpmc_d0", + "type": "", + "description": "" + }, + { + "number": "L8", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "L10", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "L11", + "name": "M6,", + "type": "", + "description": "" + }, + { + "number": "L12", + "name": "M6,", + "type": "", + "description": "" + }, + { + "number": "L13", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "L14", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "L15", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "L17", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "L23", + "name": "mmc1_cmd", + "type": "", + "description": "" + }, + { + "number": "L24", + "name": "cam_d6", + "type": "", + "description": "" + }, + { + "number": "M1", + "name": "gpmc_d1", + "type": "", + "description": "" + }, + { + "number": "M2", + "name": "gpmc_d2", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "gpmc_d4", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "mcspi2_cs1", + "type": "", + "description": "" + }, + { + "number": "M5", + "name": "mcspi2_cs0", + "type": "", + "description": "" + }, + { + "number": "M6", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "M7", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "M10", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "M11", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "M12", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "M13", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "M14", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "M15", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "M16", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "M17", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "M18", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "M19", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "M20", + "name": "mmc1_dat2", + "type": "", + "description": "" + }, + { + "number": "M21", + "name": "mmc1_dat1", + "type": "", + "description": "" + }, + { + "number": "M22", + "name": "mmc1_dat0", + "type": "", + "description": "" + }, + { + "number": "M23", + "name": "mmc1_clk", + "type": "", + "description": "" + }, + { + "number": "N2", + "name": "gpmc_d3", + "type": "", + "description": "" + }, + { + "number": "N3", + "name": "mcspi2_", + "type": "", + "description": "" + }, + { + "number": "N4", + "name": "mcspi2_", + "type": "", + "description": "" + }, + { + "number": "N5", + "name": "mcspi2_clk", + "type": "", + "description": "" + }, + { + "number": "N6", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "N7", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "N8", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "N9", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N10", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N11", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N12", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N13", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N14", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N15", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N16", + "name": "L8,", + "type": "", + "description": "" + }, + { + "number": "N17", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "N18", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "N19", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "N20", + "name": "cap_vddu_array", + "type": "", + "description": "" + }, + { + "number": "N21", + "name": "cap_vdd_bb_mpu_iv", + "type": "", + "description": "" + }, + { + "number": "N22", + "name": "gpio_126", + "type": "", + "description": "" + }, + { + "number": "N23", + "name": "mmc1_dat3", + "type": "", + "description": "" + }, + { + "number": "N24", + "name": "vdds_mmc1", + "type": "PWR", + "description": "" + }, + { + "number": "P1", + "name": "gpmc_d5", + "type": "", + "description": "" + }, + { + "number": "P2", + "name": "gpmc_d6", + "type": "", + "description": "" + }, + { + "number": "P8", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P10", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P11", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "P12", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P13", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P14", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P15", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P17", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "P23", + "name": "hsusb0_dir", + "type": "", + "description": "" + }, + { + "number": "P24", + "name": "gpio_129", + "type": "", + "description": "" + }, + { + "number": "R1", + "name": "gpmc_d7", + "type": "", + "description": "" + }, + { + "number": "R2", + "name": "gpmc_d8", + "type": "", + "description": "" + }, + { + "number": "R3", + "name": "gpmc_d11", + "type": "", + "description": "" + }, + { + "number": "R4", + "name": "mcspi1_", + "type": "", + "description": "" + }, + { + "number": "R5", + "name": "mcspi1_cs3", + "type": "", + "description": "" + }, + { + "number": "R6", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "R7", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "R8", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "R10", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "R11", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "R14", + "name": "P11,", + "type": "", + "description": "" + }, + { + "number": "R15", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "R17", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "R18", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "R19", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "R20", + "name": "mcbsp2_dx", + "type": "", + "description": "" + }, + { + "number": "R21", + "name": "hsusb0_clk", + "type": "", + "description": "" + }, + { + "number": "R22", + "name": "hsusb0_nxt", + "type": "", + "description": "" + }, + { + "number": "R23", + "name": "hsusb0_stp", + "type": "", + "description": "" + }, + { + "number": "T2", + "name": "gpmc_d9", + "type": "", + "description": "" + }, + { + "number": "T3", + "name": "gpmc_d12", + "type": "", + "description": "" + }, + { + "number": "T4", + "name": "mcspi1_", + "type": "", + "description": "" + }, + { + "number": "T5", + "name": "mcspi1_clk", + "type": "", + "description": "" + }, + { + "number": "T6", + "name": "mcspi1_cs0", + "type": "", + "description": "" + }, + { + "number": "T7", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "T8", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "T9", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "T10", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "T11", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "T12", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "T13", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "T14", + "name": "T10,", + "type": "", + "description": "" + }, + { + "number": "T15", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "T16", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "T17", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "T18", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "T19", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "T20", + "name": "vdd_core", + "type": "PWR", + "description": "" + }, + { + "number": "T21", + "name": "mcbsp2_", + "type": "", + "description": "" + }, + { + "number": "T22", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "T23", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "T24", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "U1", + "name": "gpmc_d10", + "type": "", + "description": "" + }, + { + "number": "U2", + "name": "gpmc_d13", + "type": "", + "description": "" + }, + { + "number": "U8", + "name": "cap_vdd_sram_mpu_", + "type": "", + "description": "" + }, + { + "number": "U9", + "name": "vss", + "type": "GND", + "description": "" + }, + { + "number": "U10", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "U11", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "U12", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "U13", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "U14", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "U15", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "U16", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "U17", + "name": "vdda_dpll_per", + "type": "PWR", + "description": "" + }, + { + "number": "U23", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "U24", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "V1", + "name": "gpmc_d14", + "type": "", + "description": "" + }, + { + "number": "V2", + "name": "gpmc_d15", + "type": "", + "description": "" + }, + { + "number": "V3", + "name": "mmc2_", + "type": "", + "description": "" + }, + { + "number": "V4", + "name": "mcbsp3_fsx", + "type": "", + "description": "" + }, + { + "number": "V5", + "name": "mcbsp3_dr", + "type": "", + "description": "" + }, + { + "number": "V6", + "name": "mcbsp3_dx", + "type": "", + "description": "" + }, + { + "number": "V7", + "name": "uart1_rx", + "type": "", + "description": "" + }, + { + "number": "V9", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "V10", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "V12", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "V13", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "V15", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "V16", + "name": "U9,", + "type": "", + "description": "" + }, + { + "number": "V18", + "name": "mcbsp1_", + "type": "", + "description": "" + }, + { + "number": "V19", + "name": "mcbsp2_dr", + "type": "", + "description": "" + }, + { + "number": "V20", + "name": "mcbsp2_fsx", + "type": "", + "description": "" + }, + { + "number": "V21", + "name": "dss_data22", + "type": "", + "description": "" + }, + { + "number": "V22", + "name": "dss_data15", + "type": "", + "description": "" + }, + { + "number": "V23", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "W2", + "name": "gpmc_clk", + "type": "", + "description": "" + }, + { + "number": "W3", + "name": "mmc2_", + "type": "", + "description": "" + }, + { + "number": "W4", + "name": "mcbsp3_", + "type": "", + "description": "" + }, + { + "number": "W6", + "name": "uart1_rts", + "type": "", + "description": "" + }, + { + "number": "W7", + "name": "uart1_tx", + "type": "", + "description": "" + }, + { + "number": "W9", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "W10", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "W12", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "W13", + "name": "vdd_mpu_iva", + "type": "PWR", + "description": "" + }, + { + "number": "W15", + "name": "sys_xtalgnd", + "type": "", + "description": "" + }, + { + "number": "W16", + "name": "sys_nirq", + "type": "", + "description": "" + }, + { + "number": "W18", + "name": "mcbsp1_dx", + "type": "", + "description": "" + }, + { + "number": "W19", + "name": "mcbsp1_", + "type": "", + "description": "" + }, + { + "number": "W21", + "name": "dss_data23", + "type": "", + "description": "" + }, + { + "number": "W22", + "name": "dss_data14", + "type": "", + "description": "" + }, + { + "number": "W23", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "W24", + "name": "hsusb0_", + "type": "", + "description": "" + }, + { + "number": "Y1", + "name": "mmc2_clk", + "type": "", + "description": "" + }, + { + "number": "Y2", + "name": "mmc2_dat6", + "type": "", + "description": "" + }, + { + "number": "Y3", + "name": "mmc2_", + "type": "", + "description": "" + }, + { + "number": "Y7", + "name": "sys_clkout1", + "type": "", + "description": "" + }, + { + "number": "Y9", + "name": "vdds", + "type": "PWR", + "description": "" + }, + { + "number": "Y10", + "name": "sys_nreswarm", + "type": "", + "description": "" + }, + { + "number": "Y12", + "name": "cap_vddu_", + "type": "", + "description": "" + }, + { + "number": "Y13", + "name": "sys_clkreq", + "type": "", + "description": "" + }, + { + "number": "Y15", + "name": "i2c4_sda", + "type": "", + "description": "" + }, + { + "number": "Y16", + "name": "i2c4_scl", + "type": "", + "description": "" + }, + { + "number": "Y18", + "name": "mcbsp1_dr", + "type": "", + "description": "" + }, + { + "number": "Y22", + "name": "dss_data13", + "type": "", + "description": "" + }, + { + "number": "Y23", + "name": "cvideo2_vfb", + "type": "", + "description": "" + }, + { + "number": "Y24", + "name": "cvideo1_rset", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/DM3730", + "pdfSha256": "0495d0978c382ec7fcb47bb984022122f0140660aa307ff9db62a0aaa7c70a98", + "pdfPageNumbers": [ + 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80 + ], + "pdfParser": "fixed-width-single-package-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for DM3730 has neither a Pin/Terminal Functions section nor a CUS package pin-map link." + }, + "DP83826AE": { + "family": "DP83826AE", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "DP83826AERHBR", + "packageCode": "RHB", + "expectedPinCount": 32, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"DP83826AE\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"DP83826AERHBR\",\"packageCode\":\"RHB\",\"expectedPinCount\":32,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.645Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DP83826AE/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/DP83826AE/datasheet/GUID-7AC72D5A-8E99-4DBE-9633-E509AA1DD154", + "packageColumn": "PIN / NO", + "tableClass": "table page-break", + "pins": [ + { + "number": "1", + "name": "ModeSelect", + "type": "Reset: I, PU Active: I, PU", + "description": "This pin selects the DP83826Ax operating mode: BASIC mode or ENHANCED mode. For ENHANCED mode, this pin shall be left NC or pulled-up with a resistor to VDDIO. For BASIC mode, this pin shall be shorted to GND." + }, + { + "number": "2", + "name": "CEXT", + "type": "A", + "description": "External capacitor: Connect the CEXT pin through a 2nF capacitor to GND." + }, + { + "number": "3", + "name": "VDDA3V3", + "type": "Power", + "description": "Input analog supply: 3.3V. For decoupling capacitor requirements, refer to Power Supply Recommendations section of data sheet." + }, + { + "number": "4", + "name": "RD_M", + "type": "A", + "description": "Differential receive input (physical media dependent: PMD): These differential inputs are automatically configured to accept either 10BASE-Te, 100BASE-TX specific signaling mode." + }, + { + "number": "5", + "name": "RD_P", + "type": "A", + "description": "Differential receive input (physical media dependent: PMD): These differential inputs are automatically configured to accept either 10BASE-Te, 100BASE-TX specific signaling mode." + }, + { + "number": "6", + "name": "TD_M", + "type": "A", + "description": "Differential transmit output (PMD): These differential outputs are configured to either 10BASE-Te or 100BASE-TX signaling mode based on configuration chosen for PHY." + }, + { + "number": "7", + "name": "TD_P", + "type": "A", + "description": "Differential transmit output (PMD): These differential outputs are configured to either 10BASE-Te or 100BASE-TX signaling mode based on configuration chosen for PHY." + }, + { + "number": "8", + "name": "XO", + "type": "A", + "description": "Crystal output: Reference clock output. XO pin is used for crystal only. Leave this pin floating when a CMOS-level oscillator is connected to XI." + }, + { + "number": "9", + "name": "XI/50MHzIn", + "type": "A", + "description": "Crystal or oscillator input clock: MII mode, RMII leader mode: 25MHz ± 50ppm tolerance crystal or oscillator clock. RMII follower mode: 50MHz ± 50ppm tolerance CMOS-level oscillator clock." + }, + { + "number": "10", + "name": "RBIAS", + "type": "A", + "description": "RBIAS ( Bias resistor) value 6.49kΩ with 1% precision connected to ground." + }, + { + "number": "11", + "name": "MDIO", + "type": "Reset: I, PU Active: I/O, PU", + "description": "Management data I/O: Bi-directional management data signal that can be sourced by the management station or the PHY. This pin has internal pullup resistor of 10kΩ. An external pullup resistor can be added if needed." + }, + { + "number": "12", + "name": "MDC", + "type": "Reset: I, PD Active: I, PD", + "description": "Management data clock: Synchronous clock to the MDIO serial management input/output data. This clock can be asynchronous to the MAC transmit and receive clocks. The maximum clock rate is 25MHz. There is no minimum clock rate." + }, + { + "number": "13", + "name": "RX_D3", + "type": "Reset: I, PD Active: O Strap7", + "description": "Receive data: Symbols received on the cable are decoded and presented on these pins synchronous to the rising edge of RX_CLK and contain valid data when RX_DV is asserted. A nibble RX_D[3:0] is received in MII mode. 2-bits RX_D[1:0] is received in RMII mode." + }, + { + "number": "14", + "name": "RX_D2", + "type": "Reset: I, PD Active: O Strap8", + "description": "Receive data: Symbols received on the cable are decoded and presented on these pins synchronous to the rising edge of RX_CLK and contain valid data when RX_DV is asserted. A nibble RX_D[3:0] is received in MII mode. 2-bits RX_D[1:0] is received in RMII mode." + }, + { + "number": "15", + "name": "RX_D1", + "type": "Reset: I, PD Active: O Strap9", + "description": "Receive data: Symbols received on the cable are decoded and presented on these pins synchronous to the rising edge of RX_CLK and contain valid data when RX_DV is asserted. A nibble RX_D[3:0] is received in MII mode. 2-bits RX_D[1:0] is received in RMII mode." + }, + { + "number": "16", + "name": "RX_D0", + "type": "Reset: I, PD Active: O Strap0", + "description": "Receive data: Symbols received on the cable are decoded and presented on these pins synchronous to the rising edge of RX_CLK and contain valid data when RX_DV is asserted. A nibble RX_D[3:0] is received in MII mode. 2-bits RX_D[1:0] is received in RMII mode." + }, + { + "number": "17", + "name": "VDDIO", + "type": "Power", + "description": "I/O supply voltage: 3.3V or 1.8V. For decoupling capacitor requirements, refer to Power Supply Decoupling Recommendations section of data sheet." + }, + { + "number": "18", + "name": "RX_DV/ CRS_DV", + "type": "Reset: I, PD Active: O Strap10", + "description": "Receive data valid: This pin indicates valid data is present on the RX_D[3:0] for MII mode and on RX_D[1:0] in RMII mode. In MII mode, this pin acts as RX_DV. In RMII mode, this pin acts as CRS_DV and combines the RMII Carrier and Receive Data Valid indications. This pin can be configured to RX_DV in RMII mode to enable RMII Repeater Mode." + }, + { + "number": "19", + "name": "RX_CLK/ 50MHz_RMII", + "type": "Reset: I, PD Active: O Strap11", + "description": "MII receive clock: MII Receive Clock provides a 25MHz reference clock for 100bps speed and a 2.5MHz reference clock for 10Mbps speed, which is derived from the received data stream. In RMII leader mode, this provides 50MHz reference clock. In RMII follower mode, this pin is not used and remains Input, pulldown." + }, + { + "number": "20", + "name": "RX_ER", + "type": "Reset: I, PD Active: O Strap6", + "description": "Receive error: This pin indicates that an error symbol has been detected within a received packet in both MII and RMII mode. In MII mode, RX_ER is asserted high synchronously to the rising edge of RX_CLK. In RMII mode, RX_ER is asserted high synchronously to the rising edge of the reference clock. RX_ER is asserted high for every reception error, including errors during Idle. This strap only latches on power-up and not on pin reset." + }, + { + "number": "21", + "name": "PWRDN/INT", + "type": "Reset: I, PU Active: I/O, PU", + "description": "Power down (default), interrupt: The default function of this pin is power down. Register access is required to configure this pin as an interrupt. In power down function, an active low signal on this pin places the device in power down mode. When this pin is configured as an interrupt pin, this pin is asserted low when an interrupt condition occurs. The pin has an open-drain output with a weak internal pullup resistor (9.5kΩ). Some applications require an external PU resistor." + }, + { + "number": "22", + "name": "TX_CLK", + "type": "Reset: I, PD Active: O Strap5", + "description": "MII transmit clock: MII transmit clock provides a 25MHz reference clock for 100Mbps speed and a 2.5MHz reference clock for 10Mbps speed. Note that in MII mode, this clock has constant phase referenced to the input clock. Unused in RMII Mode." + }, + { + "number": "23", + "name": "TX_EN", + "type": "Reset: I, PD Active: I, PD", + "description": "Transmit enable: TX_EN is presented on the rising edge of the TX_CLK. TX_EN indicates the presence of valid data inputs on TX_D[3:0] in MII mode and on TX_D[1:0] in RMII mode. TX_EN is an active high signal." + }, + { + "number": "24", + "name": "TX_D0", + "type": "Reset: I, PD Active: I, PD", + "description": "Transmit data: In MII mode, the transmit data nibble received from the MAC is synchronous to the rising edge of TX_CLK. In RMII mode, TX_D[1:0] received from the MAC is synchronous to the rising edge of the reference clock." + }, + { + "number": "25", + "name": "TX_D1", + "type": "Reset: I, PD Active: I, PD", + "description": "Transmit data: In MII mode, the transmit data nibble received from the MAC is synchronous to the rising edge of TX_CLK. In RMII mode, TX_D[1:0] received from the MAC is synchronous to the rising edge of the reference clock." + }, + { + "number": "26", + "name": "TX_D2", + "type": "Reset: I, PD Active: I, PD", + "description": "Transmit data: In MII mode, the transmit data nibble received from the MAC is synchronous to the rising edge of TX_CLK. In RMII mode, TX_D[1:0] received from the MAC is synchronous to the rising edge of the reference clock." + }, + { + "number": "27", + "name": "TX_D3", + "type": "Reset: I, PD Active: I, PD", + "description": "Transmit data: In MII mode, the transmit data nibble received from the MAC is synchronous to the rising edge of TX_CLK. In RMII mode, TX_D[1:0] received from the MAC is synchronous to the rising edge of the reference clock." + }, + { + "number": "28", + "name": "COL/LED2/TX_ER/GPIO", + "type": "Reset: I, PD Active: O Strap4", + "description": "Collision Detect (default): In MII mode when the pin is acting as Collision Detect (COL), this pin is always LOW in Full Duplex mode. In Half Duplex mode, COL is asserted HIGH only when both transmit and receive media are non-idle. This pin can also be configured as a second additional LED driver (LED2), the MII TX_ER signal or general purpose I/O (GPIO) through register configurations. In RMII mode, this pin acts as LED2 by default." + }, + { + "number": "29", + "name": "CRS/LED3", + "type": "Reset: I, PD Active: O Strap3", + "description": "Carrier sense (default): In MII mode this pin is asserted high when the receive or transmit medium is non-idle. Carrier sense and receive data valid. This pin can be configured as third LED (LED3) through register configuration. In RMII mode, this pin is configured as LED3 by default." + }, + { + "number": "30", + "name": "LED0", + "type": "Reset: I, PD Active: O Strap2", + "description": "LED0: This LED indicates transmit and receive activity in addition to the status of the Link. The LED is ON when link is good. The LED blinks when the transmitter or receiver is active. LED polarity is auto-detected (Active Low/ Active High) based on external pull-up or pull-down on the pin." + }, + { + "number": "31", + "name": "CLKOUT/ LED1", + "type": "Reset: I, PU Active: O Strap1", + "description": "This pin provides 25MHz reference clock from XI as default output after power-on reset (POR). The output is not affected by Resets allowing Application to reset PHY without impacting other system getting impacted. The output clock switches off only by Deep Power Down. The pin can be configured to act as LED1 using strap or register configuration. The strap only latches on power-up and not on pin reset. The LED is ON when link is 100Mbps. LED remains OFF if Link is 10Mbps or no Link. LED polarity is auto-detected (Active Low/ Active High) based on external pull-up or pull-down on the pin. This strap only latches on power-up and not on pin reset." + }, + { + "number": "32", + "name": "RST_N", + "type": "Reset: I, PU Active: I, PU", + "description": "Reset low: RST_N pin is an active low reset input. Asserting this pin low for at least 25μs forces a reset process to occur. Initiation of reset causes strap pins to be re-scanned and resets all the internal registers of the PHY to default value." + } + ], + "warnings": [] + }, + "DRV2605": { + "family": "DRV2605", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "DRV2605YZFR", + "packageDescription": "DSBGA-9", + "packageCode": "YZF", + "expectedPinCount": 9, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/DRV2605YZFR.circuit.tsx", + "pinLabelCount": 9, + "coordinateLabelCount": 9, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 9, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"DRV2605\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DRV2605YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DRV2605YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.563Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/DRV2605/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/DRV2605/datasheet/pin-configuration-and-functions-slos8545797", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "EN", + "type": "I", + "description": "Device enable" + }, + { + "number": "A2", + "name": "REG", + "type": "O", + "description": "The REG pin is the 1.8-V regulator output. A 1-µF capacitor is required." + }, + { + "number": "A3", + "name": "OUT+", + "type": "O", + "description": "Positive haptic driver differential output" + }, + { + "number": "B1", + "name": "IN/TRIG", + "type": "I", + "description": "Multi-mode Input. IC selectable as PWM, analog, or trigger. If not used, this pin should be connected to GND" + }, + { + "number": "B2", + "name": "SDA", + "type": "I/O", + "description": "IC data" + }, + { + "number": "B3", + "name": "GND", + "type": "P", + "description": "Supply ground" + }, + { + "number": "C1", + "name": "SCL", + "type": "I", + "description": "IC clock" + }, + { + "number": "C3", + "name": "OUT–", + "type": "O", + "description": "Negative haptic-driver differential output" + }, + { + "number": "C2", + "name": "VDD", + "type": "P", + "description": "Supply input ( 2.5 to 5.5 V ). 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"GLC", + "type": "O", + "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET." + }, + { + "number": "2", + "name": "SLC", + "type": "I", + "description": "Low-side source sense input. Connect to the low-side power MOSFET source." + }, + { + "number": "3", + "name": "SPA", + "type": "I", + "description": "Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor." + }, + { + "number": "4", + "name": "SNA", + "type": "I", + "description": "Current sense amplifier input. Connect to the low-side of the current shunt resistor." + }, + { + "number": "5", + "name": "SPB", + "type": "I", + "description": "Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor." + }, + { + "number": "6", + "name": "SNB", + "type": "I", + "description": "Current sense amplifier input. Connect to the low-side of the current shunt resistor." + }, + { + "number": "7", + "name": "SPC", + "type": "I", + "description": "Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor." + }, + { + "number": "8", + "name": "SNC", + "type": "I", + "description": "Current sense amplifier input. Connect to the low-side of the current shunt resistor." + }, + { + "number": "9", + "name": "DRVOFF", + "type": "I", + "description": "Active high shutdown input to pull-down gate driver outputs GHx and GLx." + }, + { + "number": "10", + "name": "AGND", + "type": "PWR", + "description": "Device ground." + }, + { + "number": "11", + "name": "INHA", + "type": "I", + "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver." + }, + { + "number": "12", + "name": "INLA", + "type": "I", + "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver." + }, + { + "number": "13", + "name": "INHB", + "type": "I", + "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver." + }, + { + "number": "14", + "name": "INLB", + "type": "I", + "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver." + }, + { + "number": "15", + "name": "INHC", + "type": "I", + "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver." + }, + { + "number": "16", + "name": "INLC", + "type": "I", + "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver." + }, + { + "number": "17", + "name": "SDO", + "type": "O", + "description": "Serial data output." + }, + { + "number": "18", + "name": "SDI", + "type": "I", + "description": "Serial data input." + }, + { + "number": "19", + "name": "SCLK", + "type": "I", + "description": "Serial clock input." + }, + { + "number": "20", + "name": "nSCS", + "type": "I", + "description": "Serial chip select." + }, + { + "number": "21", + "name": "nSLEEP", + "type": "I", + "description": "Gate driver nSLEEP. When this pin is logic low the device goes to a low-power sleep mode." + }, + { + "number": "22", + "name": "nFAULT", + "type": "OD", + "description": "Fault indicator output. This pin is pulled logic low during a fault condition and requires an external pullup resistor." + }, + { + "number": "23", + "name": "VREF", + "type": "PWR", + "description": "External voltage reference for current sense amplifiers." + }, + { + "number": "24", + "name": "SOC", + "type": "O", + "description": "Current sense amplifier output." + }, + { + "number": "25", + "name": "SOB", + "type": "O", + "description": "Current sense amplifier output." + }, + { + "number": "26", + "name": "SOA", + "type": "O", + "description": "Current sense amplifier output." + }, + { + "number": "27", + "name": "GND", + "type": "PWR", + "description": "Device ground" + }, + { + "number": "28", + "name": "DVDD", + "type": "PWR", + "description": "3.3V / 5V LDO output. Connect to adjacent GND with a >10V-rated ceramic capacitor." + }, + { + "number": "29", + "name": "ASCIN", + "type": "I", + "description": "ASC external trigger pin. When this pin is logic high, the device turns on all three low-side or high-side gates." + }, + { + "number": "30", + "name": "GVDD", + "type": "PWR", + "description": "Gate driver power supply input. Connect an externally regulated 8V-15V supply with a GVDD-rated ceramic between the GVDD and GND pins." + }, + { + "number": "31", + "name": "NC", + "type": "NC", + "description": "Not connected. Leave pin floating." + }, + { + "number": "32", + "name": "CPTL", + "type": "PWR", + "description": "Trickle charge pump switching node. Connect a charge pump flying capacitor between CPTL and CPTH pins." + }, + { + "number": "33", + "name": "CPTH", + "type": "PWR", + "description": "Trickle charge pump switching node. Connect a charge pump flying capacitor between CPTL and CPTH pins." + }, + { + "number": "34", + "name": "VCP", + "type": "PWR", + "description": "Trickle charge pump storage capacitor. Connect a ceramic capacitor between VCP and VDRAIN pins." + }, + { + "number": "35", + "name": "VDRAIN", + "type": "PWR", + "description": "High-side drain sense and charge pump power supply input." + }, + { + "number": "36", + "name": "BSTA", + "type": "O", + "description": "Bootstrap output pin. Connect a bootstrap capacitor between BSTA and SHA" + }, + { + "number": "37", + "name": "SHA", + "type": "I", + "description": "High-side source sense input. Connect to the high-side power MOSFET source." + }, + { + "number": "38", + "name": "GHA", + "type": "O", + "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET." + }, + { + "number": "39", + "name": "GLA", + "type": "O", + "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET." + }, + { + "number": "40", + "name": "SLA", + "type": "I", + "description": "Low-side source sense input. Connect to the low-side power MOSFET source." + }, + { + "number": "41", + "name": "SLB", + "type": "I", + "description": "Low-side source sense input. Connect to the low-side power MOSFET source." + }, + { + "number": "42", + "name": "GLB", + "type": "O", + "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET." + }, + { + "number": "43", + "name": "GHB", + "type": "O", + "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET." + }, + { + "number": "44", + "name": "SHB", + "type": "I", + "description": "High-side source sense input. Connect to the high-side power MOSFET source." + }, + { + "number": "45", + "name": "BSTB", + "type": "O", + "description": "Bootstrap output pin. Connect a bootstrap capacitor between BSTB and SHB" + }, + { + "number": "46", + "name": "BSTC", + "type": "O", + "description": "Bootstrap output pin. Connect a bootstrap capacitor between BSTC and SHC" + }, + { + "number": "47", + "name": "SHC", + "type": "I", + "description": "High-side source sense input. Connect to the high-side power MOSFET source." + }, + { + "number": "48", + "name": "GHC", + "type": "O", + "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET." + } + ], + "warnings": [] + }, + "ESD401": { + "family": "ESD401", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "ESD401DPYR", + "packageDescription": "X1-SON-2(0.6x1)", + "packageCode": "DPY", + "expectedPinCount": 2, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/ESD401DPYR.circuit.tsx", + "pinLabelCount": 2, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 2, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"ESD401\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"ESD401DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/ESD401DPYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.812Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ESD401/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ESD401/datasheet/GUID-734F7F43-BDDA-4953-A9CE-FB5A2CFA60CC", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 2 to ground" + }, + { + "number": "2", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 1 to ground" + } + ], + "warnings": [] + }, + "ESD751": { + "family": "ESD751", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ESD751DYAR", + "packageCode": "DYA", + "expectedPinCount": 2, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ESD751\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ESD751DYAR\",\"packageCode\":\"DYA\",\"expectedPinCount\":2,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:09.960Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ESD751/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ESD751/datasheet/GUID-D7953443-C656-4C48-8892-DE13BFB23E88", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "1", + "name": "IO", + "type": "I/O", + "description": "ESD protected IO" + }, + { + "number": "2", + "name": "GND", + "type": "G", + "description": "Connect to ground." + } + ], + "warnings": [] + }, + "HDC3021-Q1": { + "family": "HDC3021-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "HDC3021QDEHRQ1", + "packageCode": "DEH", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"HDC3021-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"HDC3021QDEHRQ1\",\"packageCode\":\"DEH\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.252Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/HDC3021-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/HDC3021-Q1/datasheet/GUID-D3ADA21A-0774-48C4-AB0D-C5BDFA286EA8", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "2", + "name": "ADDR", + "type": "I", + "description": "IC Device Address Pin., For device addresses 0x44 and 0x45, ADDR1 voltage must be GND., 0x44 requires ADDR voltage to be GND., 0x45 requires ADDR voltage to be VDD. , Can not be left floating." + }, + { + "number": "7", + "name": "ADDR1", + "type": "I", + "description": "IC Device Address Pin., For device addresses 0x46 and 0x47, ADDR1 voltage must be VDD., 0x46 requires ADDR voltage to be GND., 0x47 requires ADDR voltage to be VDD. , Can not be left floating." + }, + { + "number": "3", + "name": "ALERT", + "type": "O", + "description": "Interrupt Pin. Push-Pull Output., If not used, must be left floating." + }, + { + "number": "8", + "name": "GND", + "type": "G", + "description": "Ground" + }, + { + "number": "6", + "name": "RESET", + "type": "I", + "description": "Reset Pin. Active Low, internal pull-up resistor to VDD. If not used, tie to VDD." + }, + { + "number": "4", + "name": "SCL", + "type": "I", + "description": "Serial clock line for IC." + }, + { + "number": "1", + "name": "SDA", + "type": "I/O", + "description": "Serial data line for IC, open-drain; requires a pullup resistor." + }, + { + "number": "5", + "name": "VDD", + "type": "P", + "description": "Supply voltage from 1.62 V to 5.50 V." + }, + { + "number": "9", + "name": "Thermal Pad", + "type": "G", + "description": "The thermal pad can be soldered, or left unsoldered. If choosing to solder the thermal pad, attach to a pad that is connected to GND, or preferably a floating pad. To minimize thermal mass for maximum heater efficiency or to measure ambient temperature, however, the thermal pad can be left unconnected to the PCB." + } + ], + "warnings": ["Official TI pin count 9 does not match catalog pinCount 8."] + }, + "INA2181": { + "family": "INA2181", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "INA2181A2IDGSR", + "packageDescription": "VSSOP-10", + "packageCode": "DGS", + "expectedPinCount": 10, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/INA2181A2IDGSR.circuit.tsx", + "pinLabelCount": 10, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 10, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"INA2181\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA2181A2IDGSR\",\"packageDescription\":\"VSSOP-10\",\"packageCode\":\"DGS\",\"expectedPinCount\":10,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/INA2181A2IDGSR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.249Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/INA2181/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/INA2181/datasheet/GUID-EB19E8CE-89BD-47D1-9E92-919028DEF07D", + "packageColumn": "PIN / INA2181", + "tableClass": "table", + "pins": [ + { + "number": "4", + "name": "GND", + "type": "Analog", + "description": "Ground" + }, + { + "number": "2", + "name": "IN–1", + "type": "Analog input", + "description": "Current-sense amplifier negative input for Channel 1. For high-side applications, connect to load side of Channel 1 sense resistor. For low-side applications, connect to ground side of Channel 1 sense resistor." + }, + { + "number": "3", + "name": "IN+1", + "type": "Analog input", + "description": "Current-sense amplifier positive input for Channel 1. For high-side applications, connect to bus-voltage side of Channel 1 sense resistor. For low-side applications, connect to load side of Channel 1 sense resistor." + }, + { + "number": "8", + "name": "IN–2", + "type": "Analog input", + "description": "Current-sense amplifier negative input for Channel 2. For high-side applications, connect to load side of Channel 2 sense resistor. For low-side applications, connect to ground side of Channel 2 sense resistor." + }, + { + "number": "7", + "name": "IN+2", + "type": "Analog input", + "description": "Current-sense amplifier positive input for Channel 2. For high-side applications, connect to bus-voltage side of Channel 2 sense resistor. For low-side applications, connect to load side of Channel 2 sense resistor." + }, + { + "number": "1", + "name": "OUT1", + "type": "Analog output", + "description": "Channel 1 output voltage" + }, + { + "number": "9", + "name": "OUT2", + "type": "Analog output", + "description": "Channel 2 output voltage" + }, + { + "number": "5", + "name": "REF1", + "type": "Analog input", + "description": "Channel 1 reference voltage, 0 to VS" + }, + { + "number": "6", + "name": "REF2", + "type": "Analog input", + "description": "Channel 2 reference voltage, 0 to VS" + }, + { + "number": "10", + "name": "VS", + "type": "Analog", + "description": "Power supply pin, 2.7 V to 5.5 V" + } + ], + "warnings": [] + }, + "INA236": { + "family": "INA236", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "INA236AIYBJR", + "packageDescription": "DSBGA-8(0.7x1.5)", + "packageCode": "YBJ", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/INA236AIYBJR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 8, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"INA236\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA236AIYBJR\",\"packageDescription\":\"DSBGA-8(0.7x1.5)\",\"packageCode\":\"YBJ\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/INA236AIYBJR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.403Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/INA236/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/INA236/datasheet/GUID-DF866C8D-AF34-44FE-AA57-D51082F445C2", + "packageColumn": "PIN / YBJ (DSBGA)", + "tableClass": "table single-column wide-orientation", + "pins": [ + { + "number": "B1", + "name": "A0", + "type": "Digital input", + "description": "Address pin. Connect to GND, SCL, SDA, or VS. Table 7-1 lists the pin settings and corresponding addresses." + }, + { + "number": "A1", + "name": "ALERT", + "type": "Digital output", + "description": "Multifunctional alert, open-drain output. This pin alerts to report fault conditions or can be configured to notify host when a conversion is complete." + }, + { + "number": "C2", + "name": "GND", + "type": "Ground", + "description": "Ground for both analog and digital." + }, + { + "number": "B2", + "name": "IN–", + "type": "Analog input", + "description": "Current sensing negative input. For high-side applications, connect to load side of sense resistor. For low-side applications, connect to ground side of sense resistor. Bus voltage measurements are made with respect to this pin." + }, + { + "number": "A2", + "name": "IN+", + "type": "Analog input", + "description": "Current sensing positive input. For high-side applications, connect to bus voltage side of sense resistor. For low-side applications, connect to load side of sense resistor." + }, + { + "number": "D1", + "name": "SCL", + "type": "Digital input", + "description": "Serial bus clock line, open-drain input." + }, + { + "number": "C1", + "name": "SDA", + "type": "Digital input/output", + "description": "Serial bus data line, open-drain input/output" + }, + { + "number": "D2", + "name": "VS", + "type": "Power Supply", + "description": "Power supply, 1.7 V to 5.5 V" + } + ], + "warnings": [] + }, + "INA280": { + "family": "INA280", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "INA280A3IDCKT", + "packageCode": "DCK", + "expectedPinCount": 5, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"INA280\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"INA280A3IDCKT\",\"packageCode\":\"DCK\",\"expectedPinCount\":5,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.797Z", + "attempts": 1, + "rootUrl": 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"b25f05be1d98f63618f38614f4669adad6d3ee7ecfa1925476620fa3ba4d2f43", + "pdfPageNumbers": [3], + "pdfParser": "name-number-pin-function-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for INA280 has neither a Pin/Terminal Functions section nor a DCK package pin-map link." + }, + "ISO6420": { + "family": "ISO6420", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6420DR", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6420\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6420DR\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.514Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6420/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6420/datasheet/GUID-DEF86A3C-25CA-4918-97C5-A366ADBDB8D9", + "packageColumn": "PIN / ISO6420 ,, ISO6420F", + "tableClass": "table wide-orientation", + "pins": [ + { + "number": "4", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "5", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "2", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "3", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "7", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "6", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, VCC1" + }, + { + "number": "8", + "name": "VCC2", + "type": "—", + "description": "Power supply, VCC2" + } + ], + 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connection for VCC2" + }, + { + "number": "7", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "3", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "2", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "6", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, VCC1" + }, + { + "number": "8", + "name": "VCC2", + "type": "—", + "description": "Power supply, VCC2" + } + ], + "warnings": [] + }, + "ISO6421-Q1": { + "family": "ISO6421-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6421DRQ1", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6421-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6421DRQ1\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.581Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6421-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6421-Q1/datasheet/GUID-DEF86A3C-25CA-4918-97C5-A366ADBDB8D9", + "packageColumn": "PIN / ISO6421-Q1 ,, ISO6421F-Q1", + "tableClass": "table wide-orientation", + "pins": [ + { + "number": "4", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "5", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "7", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "3", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "2", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "6", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, VCC1" + }, + { + "number": "8", + "name": "VCC2", + "type": "—", + "description": "Power supply, VCC2" + } + ], + "warnings": [] + }, + "ISO6431": { + "family": "ISO6431", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6431DBQR", + "packageCode": "DBQ", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6431\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6431DBQR\",\"packageCode\":\"DBQ\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.807Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6431/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6431/datasheet/GUID-7A90EC2F-3013-41EA-81CF-AB4442026A7C", + "packageColumn": "PIN / ISO6431 ,, ISO6431F", + "tableClass": "table frame-all", + "pins": [ + { + "number": "7", + "name": "EN1", + "type": "I", + "description": "Output enable 1. Output pins on side 1 are enabled when EN1 is high or open and in high-impedance state when EN1 is low." + }, + { + "number": "10", + "name": "EN2", + "type": "I", + "description": "Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low." + }, + { + "number": "2", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "8", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "9", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "15", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "3", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "12", + "name": "INC", + "type": "I", + "description": "Input, channel C" + }, + { + "number": "6", + "name": "NC", + "type": "", + "description": "Not internally connected, do not connect in application" + }, + { + "number": "11", + "name": "NC", + "type": "", + "description": "Not internally connected, do not connect in application" + }, + { + "number": "14", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "5", + "name": "OUTC", + "type": "O", + "description": "Output, channel C" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, side 1" + } + ], + "warnings": [ + "Pin 3 appears more than once with conflicting data; kept the first row.", + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 13 does not match catalog pinCount 16." + ] + }, + "ISO6440": { + "family": "ISO6440", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6440DBQR", + "packageCode": "DBQ", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6440\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6440DBQR\",\"packageCode\":\"DBQ\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.798Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6440/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6440/datasheet/GUID-9E6AEA1B-918D-4A02-A1B1-D09FDEB49EBF", + "packageColumn": "PIN / ISO6440 ,, ISO6440F", + "tableClass": "table frame-all", + "pins": [ + { + "number": "10", + "name": "EN2", + "type": "I", + "description": "Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low." + }, + { + "number": "2", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "8", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "9", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "15", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "3", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "4", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "5", + "name": "INC", + "type": "I", + "description": "Input, channel C" + }, + { + "number": "6", + "name": "IND", + "type": "I", + "description": "Input, channel D" + }, + { + "number": "7", + "name": "NC", + "type": "", + "description": "Not connected" + }, + { + "number": "14", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "13", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "12", + "name": "OUTC", + "type": "O", + "description": "Output, channel C" + }, + { + "number": "11", + "name": "OUTD", + "type": "O", + "description": "Output, channel D" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, side 1" + }, + { + "number": "16", + "name": "VCC2", + "type": "—", + "description": "Power supply, side 2" + } + ], + "warnings": [] + }, + "ISO6440-Q1": { + "family": "ISO6440-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6440DBQRQ1", + "packageCode": "DBQ", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6440-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6440DBQRQ1\",\"packageCode\":\"DBQ\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.737Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6440-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6440-Q1/datasheet/GUID-9E6AEA1B-918D-4A02-A1B1-D09FDEB49EBF", + "packageColumn": "PIN / ISO6440-Q1 ,, ISO6440F-Q1", + "tableClass": "table frame-all", + "pins": [ + { + "number": "10", + "name": "EN2", + "type": "I", + "description": "Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low." + }, + { + "number": "2", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "8", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "9", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "15", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "3", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "4", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "5", + "name": "INC", + "type": "I", + "description": "Input, channel C" + }, + { + "number": "6", + "name": "IND", + "type": "I", + "description": "Input, channel D" + }, + { + "number": "7", + "name": "NC", + "type": "", + "description": "Not connected" + }, + { + "number": "14", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "13", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "12", + "name": "OUTC", + "type": "O", + "description": "Output, channel C" + }, + { + "number": "11", + "name": "OUTD", + "type": "O", + "description": "Output, channel D" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, side 1" + }, + { + "number": "16", + "name": "VCC2", + "type": "—", + "description": "Power supply, side 2" + } + ], + "warnings": [] + }, + "ISO6442": { + "family": "ISO6442", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "ISO6442DBQR", + "packageCode": "DBQ", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"ISO6442\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"ISO6442DBQR\",\"packageCode\":\"DBQ\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:10.934Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/ISO6442/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/ISO6442/datasheet/GUID-9E6AEA1B-918D-4A02-A1B1-D09FDEB49EBF", + "packageColumn": "PIN / ISO6442 ,, ISO6442F", + "tableClass": "table frame-all", + "pins": [ + { + "number": "7", + "name": "EN1", + "type": "I", + "description": "Output enable 1. Output pins on side 1 are enabled when EN1 is high or open and in high-impedance state when EN1 is low." + }, + { + "number": "10", + "name": "EN2", + "type": "I", + "description": "Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low." + }, + { + "number": "2", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "8", + "name": "GND1", + "type": "—", + "description": "Ground connection for VCC1" + }, + { + "number": "9", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "15", + "name": "GND2", + "type": "—", + "description": "Ground connection for VCC2" + }, + { + "number": "3", + "name": "INA", + "type": "I", + "description": "Input, channel A" + }, + { + "number": "4", + "name": "INB", + "type": "I", + "description": "Input, channel B" + }, + { + "number": "12", + "name": "INC", + "type": "I", + "description": "Input, channel C" + }, + { + "number": "11", + "name": "IND", + "type": "I", + "description": "Input, channel D" + }, + { + "number": "14", + "name": "OUTA", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "13", + "name": "OUTB", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "5", + "name": "OUTC", + "type": "O", + "description": "Output, channel C" + }, + { + "number": "6", + "name": "OUTD", + "type": "O", + "description": "Output, channel D" + }, + { + "number": "1", + "name": "VCC1", + "type": "—", + "description": "Power supply, side 1" + }, + { + "number": "16", + "name": "VCC2", + "type": "—", + "description": "Power supply, side 2" + } + ], + "warnings": [] + }, + "IWRL6432": { + "family": "IWRL6432", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "IWRL6432BDBAAMFR", + "packageDescription": "FCCSP-102(6.5x6.5)", + "packageCode": "AMF", + "expectedPinCount": 102, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/IWRL6432BDBAAMFR.circuit.tsx", + "pinLabelCount": 102, + "coordinateLabelCount": 102, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 102, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"IWRL6432\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"IWRL6432BDBAAMFR\",\"packageDescription\":\"FCCSP-102(6.5x6.5)\",\"packageCode\":\"AMF\",\"expectedPinCount\":102,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/IWRL6432BDBAAMFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.013Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/IWRL6432/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/IWRL6432#page=8", + "warnings": [ + "Recovered 102/102 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored RTC_CLK_IN.", + "Official PDF contains conflicting names for pin L11: kept RTC_CLK_IN, ignored EPWMA.", + "Official PDF contains conflicting names for pin E12: kept RTC_CLK_IN, ignored EPWM_SYNC_IN.", + "Official PDF contains conflicting names for pin J10: kept EPWMB, ignored EPWM_SYNC_IN.", + "Official PDF contains conflicting names for pin E12: kept RTC_CLK_IN, ignored EPWM_SYNC_OUT.", + "Official PDF contains conflicting names for pin B12: kept EPWMB, ignored GPIO_0.", + "Official PDF contains conflicting names for pin C11: kept EPWMA, ignored GPIO_1.", + "Official PDF contains conflicting names for pin H10: kept RTC_CLK_IN, ignored GPIO_2.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored GPIO_3.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored GPIO_4.", + "Official PDF contains conflicting names for pin J10: kept EPWMB, ignored GPIO_5.", + "Official PDF contains conflicting names for pin L11: kept RTC_CLK_IN, ignored GPIO_6.", + "Official PDF contains conflicting names for pin M10: kept MCU_CLKOUT, ignored GPIO_7.", + "Official PDF contains conflicting names for pin D10: kept EPWMB, ignored I2C_SCL.", + "Official PDF contains conflicting names for pin E10: kept EPWM_SYNC_IN, ignored I2C_SCL.", + "Official PDF contains conflicting names for pin L12: kept CAN_FD_TX, ignored I2C_SCL.", + "Official PDF contains conflicting names for pin M10: kept MCU_CLKOUT, ignored I2C_SCL.", + "Official PDF contains conflicting names for pin D11: kept EPWMA, ignored I2C_SDA.", + "Official PDF contains conflicting names for pin H10: kept RTC_CLK_IN, ignored I2C_SDA.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored I2C_SDA.", + "Official PDF contains conflicting names for pin C12: kept EPWMB, ignored TCK.", + "Official PDF contains conflicting names for pin G11: kept EPWMA, ignored TDI.", + "Official PDF contains conflicting names for pin E12: kept RTC_CLK_IN, ignored TMS.", + "Official PDF contains conflicting names for pin L11: kept RTC_CLK_IN, ignored RDIF_CLK.", + "Official PDF contains conflicting names for pin H10: kept RTC_CLK_IN, ignored RDIF_D0.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored RDIF_D1.", + "Official PDF contains conflicting names for pin L12: kept CAN_FD_TX, ignored RDIF_D2.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored RDIF_D3.", + "Official PDF contains conflicting names for pin M10: kept MCU_CLKOUT, ignored RDIF_FRM_CLK.", + "Official PDF contains conflicting names for pin B8: kept RTC_CLK_IN, ignored QSPI_D1.", + "Official PDF contains conflicting names for pin B10: kept I2C_SCL, ignored QSPI_D2.", + "Official PDF contains conflicting names for pin B9: kept I2C_SDA, ignored QSPI_D3.", + "Official PDF contains conflicting names for pin F11: kept I2C_SDA, ignored RS232_RX.", + "Official PDF contains conflicting names for pin E10: kept EPWM_SYNC_IN, ignored RS232_TX.", + "Official PDF contains conflicting names for pin D10: kept EPWMB, ignored SPIA_CLK.", + "Official PDF contains conflicting names for pin D11: kept EPWMA, ignored SPIA_CS0_N.", + "Official PDF contains conflicting names for pin C11: kept EPWMA, ignored SPIA_MISO.", + "Official PDF contains conflicting names for pin B12: kept EPWMB, ignored SPIA_MOSI.", + "Official PDF contains conflicting names for pin A11: kept QSPI_SCLK, ignored SPIB_CLK.", + "Official PDF contains conflicting names for pin D10: kept EPWMB, ignored SPIB_CLK.", + "Official PDF contains conflicting names for pin A10: kept QSPI_CS, ignored SPIB_CS0_N.", + "Official PDF contains conflicting names for pin D11: kept EPWMA, ignored SPIB_CS0_N.", + "Official PDF contains conflicting names for pin B8: kept RTC_CLK_IN, ignored SPIB_MISO.", + "Official PDF contains conflicting names for pin C11: kept EPWMA, ignored SPIB_MISO.", + "Official PDF contains conflicting names for pin B11: kept QSPI_D0, ignored SPIB_MOSI.", + "Official PDF contains conflicting names for pin B12: kept EPWMB, ignored SPIB_MOSI.", + "Official PDF contains conflicting names for pin M10: kept MCU_CLKOUT, ignored HOST_CLK_REQ.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored NERROR_OUT.", + "Official PDF contains conflicting names for pin B9: kept I2C_SDA, ignored SYNC_IN.", + "Official PDF contains conflicting names for pin E12: kept RTC_CLK_IN, ignored SYNC_IN.", + "Official PDF contains conflicting names for pin J10: kept EPWMB, ignored SYNC_IN.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored SYNC_IN.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored SYNC_IN.", + "Official PDF contains conflicting names for pin E12: kept RTC_CLK_IN, ignored WARM_RESET_OUT.", + "Official PDF contains conflicting names for pin H10: kept RTC_CLK_IN, ignored WARM_RESET_OUT.", + "Official PDF contains conflicting names for pin B10: kept I2C_SCL, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin H10: kept RTC_CLK_IN, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin K11: kept MCU_CLKOUT, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin L11: kept RTC_CLK_IN, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin L12: kept CAN_FD_TX, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin M10: kept MCU_CLKOUT, ignored WU_REQIN.", + "Official PDF contains conflicting names for pin L11: kept RTC_CLK_IN, ignored UARTA_RTS.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored UARTA_RX.", + "Official PDF contains conflicting names for pin L12: kept CAN_FD_TX, ignored UARTA_TX.", + "Official PDF contains conflicting names for pin F11: kept I2C_SDA, ignored UARTB_RX.", + "Official PDF contains conflicting names for pin J11: kept CAN_FD_RX, ignored UARTB_RX.", + "Official PDF contains conflicting names for pin E10: kept EPWM_SYNC_IN, ignored UARTB_TX.", + "Official PDF contains conflicting names for pin L12: kept CAN_FD_TX, ignored UARTB_TX." + ], + "packageColumn": "AMF BGA pin column", + "tableClass": "official-ti-pdf/signal-description-physical-column", + "pins": [ + { + "number": "A1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A3", + "name": "TX1", + "type": "A", + "description": "" + }, + { + "number": "A4", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A5", + "name": "TX2", + "type": "A", + "description": "" + }, + { + "number": "A6", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A7", + "name": "OSC_CLK_OUT", + "type": "A", + "description": "" + }, + { + "number": "A8", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "A10", + "name": "QSPI_CS", + "type": "O", + "description": "" + }, + { + "number": "A11", + "name": "QSPI_SCLK", + "type": "IO", + "description": "" + }, + { + "number": "A12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "CLKM", + "type": "A", + "description": "" + }, + { + "number": "B2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B3", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B4", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B5", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B6", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "B8", + "name": "RTC_CLK_IN", + "type": "I", + "description": "" + }, + { + "number": "B9", + "name": "I2C_SDA", + "type": "IO", + "description": "" + }, + { + "number": "B10", + "name": "I2C_SCL", + "type": "IO", + "description": "" + }, + { + "number": "B11", + "name": "QSPI_D0", + "type": "IO", + "description": "" + }, + { + "number": "B12", + "name": "EPWMB", + "type": "O", + "description": "" + }, + { + "number": "C1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "C2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "C6", + "name": "VIOIN_18CLK", + "type": "PWR", + "description": "" + }, + { + "number": "C8", + "name": "VIOIN_18", + "type": "PWR", + "description": "" + }, + { + "number": "C9", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "C11", + "name": "EPWMA", + "type": "O", + "description": "" + }, + { + "number": "C12", + "name": "EPWMB", + "type": "O", + "description": "" + }, + { + "number": "D1", + "name": "CLKP", + "type": "A", + "description": "" + }, + { + "number": "D2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "D3", + "name": "VOUT_14SYNTH", + "type": "A", + "description": "" + }, + { + "number": "D10", + "name": "EPWMB", + "type": "O", + "description": "" + }, + { + "number": "D11", + "name": "EPWMA", + "type": "O", + "description": "" + }, + { + "number": "E1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "E2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "E5", + "name": "VSSA_PM", + "type": "GND", + "description": "" + }, + { + "number": "E6", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E10", + "name": "EPWM_SYNC_IN", + "type": "I", + "description": "" + }, + { + "number": "E11", + "name": "TDO", + "type": "O", + "description": "" + }, + { + "number": "E12", + "name": "RTC_CLK_IN", + "type": "I", + "description": "" + }, + { + "number": "F1", + "name": "RX3", + "type": "A", + "description": "" + }, + { + "number": "F2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "F3", + "name": "VDDA_18VCO", + "type": "PWR", + "description": "" + }, + { + "number": "F5", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "F6", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F8", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "F11", + "name": "I2C_SDA", + "type": "IO", + "description": "" + }, + { + "number": "G1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "G2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "G5", + "name": "VOUT_14APLL", + "type": "A", + "description": "" + }, + { + "number": "G7", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "G8", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "G9", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "G11", + "name": "EPWMA", + "type": "O", + "description": "" + }, + { + "number": "G12", + "name": "VIOIN", + "type": "PWR", + "description": "" + }, + { + "number": "H1", + "name": "RX2", + "type": "A", + "description": "" + }, + { + "number": "H2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "H5", + "name": "VBGAP", + "type": "A", + "description": "" + }, + { + "number": "H8", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "H10", + "name": "RTC_CLK_IN", + "type": "I", + "description": "" + }, + { + "number": "H11", + "name": "PMIC_CLKOUT", + "type": "O", + "description": "" + }, + { + "number": "H12", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "J1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "J2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "J5", + "name": "VIN_18PM", + "type": "PWR", + "description": "" + }, + { + "number": "J10", + "name": "EPWMB", + "type": "O", + "description": "" + }, + { + "number": "J11", + "name": "CAN_FD_RX", + "type": "I", + "description": "" + }, + { + "number": "K1", + "name": "RX1", + "type": "A", + "description": "" + }, + { + "number": "K2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "K7", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "K11", + "name": "MCU_CLKOUT", + "type": "O", + "description": "" + }, + { + "number": "K12", + "name": "VIOIN_18", + "type": "PWR", + "description": "" + }, + { + "number": "L1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "L2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "L3", + "name": "VDDA_10RF", + "type": "A", + "description": "" + }, + { + "number": "L4", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "L5", + "name": "VDDA_18BB", + "type": "PWR", + "description": "" + }, + { + "number": "L6", + "name": "GPADC2", + "type": "A", + "description": "" + }, + { + "number": "L8", + "name": "VIOIN_18", + "type": "PWR", + "description": "" + }, + { + "number": "L9", + "name": "VNWA", + "type": "PWR", + "description": "" + }, + { + "number": "L10", + "name": "NRESET", + "type": "A", + "description": "" + }, + { + "number": "L11", + "name": "RTC_CLK_IN", + "type": "", + "description": "" + }, + { + "number": "L12", + "name": "CAN_FD_TX", + "type": "O", + "description": "" + }, + { + "number": "M1", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "M2", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "M3", + "name": "VDDA_10RF", + "type": "A", + "description": "" + }, + { + "number": "M4", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "M5", + "name": "VDDA_18BB", + "type": "PWR", + "description": "" + }, + { + "number": "M6", + "name": "GPADC1", + "type": "A", + "description": "" + }, + { + "number": "M7", + "name": "VDD_SRAM", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "VIOIN_18", + "type": "PWR", + "description": "" + }, + { + "number": "M10", + "name": "MCU_CLKOUT", + "type": "O", + "description": "" + }, + { + "number": "M11", + "name": "VIOIN", + "type": "PWR", + "description": "" + }, + { + "number": "M12", + "name": "VSS", + "type": "GND", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/IWRL6432", + "pdfSha256": "29d09dae169fc426876c640e60df0e09d9de4c6a81d99b21463345e398e59da7", + "pdfPageNumbers": [8, 9, 10, 11, 12], + "pdfParser": "signal-description-physical-column", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "IWRL6432AOP": { + "family": "IWRL6432AOP", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "IWRL6432BRQAAMYR", + "packageCode": "AMY", + "expectedPinCount": 101, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"IWRL6432AOP\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"IWRL6432BRQAAMYR\",\"packageCode\":\"AMY\",\"expectedPinCount\":101,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.117Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/IWRL6432AOP/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/IWRL6432AOP#page=10", + "warnings": [ + "Recovered 101/101 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin N7: kept VDDA_18BB, ignored N9.", + "Official PDF contains conflicting names for pin N8: kept VDDA_18BB, ignored N9.", + "Official PDF contains conflicting names for pin N1: kept VSS, ignored N5.", + "Official PDF contains conflicting names for pin N3: kept VSS, ignored N5.", + "Official PDF contains conflicting names for pin N4: kept VSS, ignored N5.", + "Official PDF contains conflicting names for pin B9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin C10: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin C8: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin C9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin D9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin E10: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin E7: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin E8: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin E9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin F8: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin G10: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin G9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin H9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin J10: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin J7: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin J8: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin J9: kept VSSA, ignored D8.", + "Official PDF contains conflicting names for pin B9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin C10: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin C8: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin C9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin D8: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin D9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin E10: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin E7: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin E8: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin E9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin G10: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin G9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin H9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin J10: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin J7: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin J8: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin J9: kept VSSA, ignored F8.", + "Official PDF contains conflicting names for pin B9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin C10: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin C8: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin C9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin D8: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin D9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin E10: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin E7: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin E8: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin E9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin F8: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin G10: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin G9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin H9: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin J10: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin J7: kept VSSA, ignored J8.", + "Official PDF contains conflicting names for pin J9: kept VSSA, ignored J8." + ], + "packageColumn": "single AMY pin/ball-number column", + "tableClass": "official-ti-pdf/fixed-width-single-package-table", + "pins": [ + { + "number": "A1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A2", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "A3", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A4", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A5", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "A6", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A7", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A8", + "name": "OSC_CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "A9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "A10", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B1", + "name": "VIOIN_18", + "type": "", + "description": "" + }, + { + "number": "B2", + "name": "VPP", + "type": "PWR", + "description": "" + }, + { + "number": "B3", + "name": "QSPI", + "type": "", + "description": "" + }, + { + "number": "B4", + "name": "QSPI", + "type": "", + "description": "" + }, + { + "number": "B7", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B8", + "name": "OSC_CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "B9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "B10", + "name": "CLKM", + "type": "", + "description": "" + }, + { + "number": "C1", + "name": "VIOIN", + "type": "", + "description": "" + }, + { + "number": "C2", + "name": "QSPI", + "type": "", + "description": "" + }, + { + "number": "C3", + "name": "QSPI", + "type": "", + "description": "" + }, + { + "number": "C4", + "name": "QSPI", + "type": "", + "description": "" + }, + { + "number": "C7", + "name": "VDDA_10RF", + "type": "PWR", + "description": "" + }, + { + "number": "C8", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "C9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "C10", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "D2", + "name": "QSPI_CLK", + "type": "", + "description": "" + }, + { + "number": "D3", + "name": "QSPI_CS", + "type": "", + "description": "" + }, + { + "number": "D7", + "name": "VIOIN_18CLK", + "type": "", + "description": "" + }, + { + "number": "D8", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "D9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "D10", + "name": "CLKP", + "type": "", + "description": "" + }, + { + "number": "E1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "E2", + "name": "TDO", + "type": "", + "description": "" + }, + { + "number": "E3", + "name": "SPIA_MOSI", + "type": "", + "description": "" + }, + { + "number": "E4", + "name": "SPIA_MISO", + "type": "", + "description": "" + }, + { + "number": "E7", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "E8", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "E9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "E10", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "F1", + "name": "SPIA_CLK", + "type": "", + "description": "" + }, + { + "number": "F2", + "name": "TDI", + "type": "", + "description": "" + }, + { + "number": "F3", + "name": "TCK", + "type": "", + "description": "" + }, + { + "number": "F4", + "name": "SPIA_CS0_N", + "type": "", + "description": "" + }, + { + "number": "F7", + "name": "VOUT_14SYNTH", + "type": "PWR", + "description": "" + }, + { + "number": "F8", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "F9", + "name": "VDDA_18VCO", + "type": "PWR", + "description": "" + }, + { + "number": "F10", + "name": "VDDA_18VCO", + "type": "PWR", + "description": "" + }, + { + "number": "G2", + "name": "RS232_RX", + "type": "", + "description": "" + }, + { + "number": "G3", + "name": "TMS", + "type": "", + "description": "" + }, + { + "number": "G8", + "name": "VOUT_14APLL", + "type": "PWR", + "description": "" + }, + { + "number": "G9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "G10", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "H1", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "H2", + "name": "GPIO_2", + "type": "", + "description": "" + }, + { + "number": "H3", + "name": "PMIC_CLKOUT", + "type": "", + "description": "" + }, + { + "number": "H4", + "name": "RS232_TX", + "type": "", + "description": "" + }, + { + "number": "H7", + "name": "VIN_18PM", + "type": "PWR", + "description": "" + }, + { + "number": "H8", + "name": "VIN_18PM", + "type": "PWR", + "description": "" + }, + { + "number": "H9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "H10", + "name": "VBGAP", + "type": "", + "description": "" + }, + { + "number": "J1", + "name": "VIOIN", + "type": "", + "description": "" + }, + { + "number": "J2", + "name": "GPIO_5", + "type": "", + "description": "" + }, + { + "number": "J3", + "name": "UARTA_RX", + "type": "", + "description": "" + }, + { + "number": "J4", + "name": "NERROR_OUT", + "type": "", + "description": "" + }, + { + "number": "J7", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "J8", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "J9", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "J10", + "name": "VSSA", + "type": "GND", + "description": "" + }, + { + "number": "K2", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "K3", + "name": "UARTA_TX", + "type": "", + "description": "" + }, + { + "number": "K7", + "name": "VDDA_10RF", + "type": "PWR", + "description": "" + }, + { + "number": "K8", + "name": "VDDA_10RF", + "type": "PWR", + "description": "" + }, + { + "number": "K9", + "name": "VDDA_10RF", + "type": "PWR", + "description": "" + }, + { + "number": "K10", + "name": "VDDA_10RF", + "type": "PWR", + "description": "" + }, + { + "number": "L1", + "name": "VIOIN_18", + "type": "", + "description": "" + }, + { + "number": "L2", + "name": "VIOIN_18", + "type": "", + "description": "" + }, + { + "number": "L3", + "name": "HOST_CLK_REQ", + "type": "", + "description": "" + }, + { + "number": "L4", + "name": "UARTA_RTS", + "type": "", + "description": "" + }, + { + "number": "L7", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "L8", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "L9", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "L10", + "name": "VDDA_12RF", + "type": "PWR", + "description": "" + }, + { + "number": "M1", + "name": "VDD_SRAM", + "type": "PWR", + "description": "" + }, + { + "number": "M2", + "name": "VNWA", + "type": "", + "description": "" + }, + { + "number": "M3", + "name": "NRESET", + "type": "", + "description": "" + }, + { + "number": "M4", + "name": "NRESET", + "type": "", + "description": "" + }, + { + "number": "M7", + "name": "VDDA_18BB", + "type": "PWR", + "description": "" + }, + { + "number": "M8", + "name": "VDDA_18BB", + "type": "PWR", + "description": "" + }, + { + "number": "M9", + "name": "VDDA_18BB", + "type": "PWR", + "description": "" + }, + { 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"number": "8", + "name": "IN3–", + "type": "Input", + "description": "Negative input pin of the comparator 3" + }, + { + "number": "9", + "name": "IN3+", + "type": "Input", + "description": "Positive input pin of the comparator 3" + }, + { + "number": "10", + "name": "IN4–", + "type": "Input", + "description": "Negative input pin of the comparator 4" + }, + { + "number": "11", + "name": "IN4+", + "type": "Input", + "description": "Positive input pin of the comparator 4" + }, + { + "number": "12", + "name": "GND", + "type": "—", + "description": "Negative supply" + }, + { + "number": "13", + "name": "OUT4", + "type": "Output", + "description": "Output pin of the comparator 4" + }, + { + "number": "14", + "name": "OUT3", + "type": "Output", + "description": "Output pin of the comparator 3" + } + ], + "warnings": [] + }, + "LM339LV": { + "family": "LM339LV", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LM339LVPWR", + "packageDescription": "TSSOP-14", + "packageCode": "PW", + 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"packageColumn": "PIN / SOIC", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "OUT2", + "type": "Output", + "description": "Output pin of the comparator 2" + }, + { + "number": "2", + "name": "OUT1", + "type": "Output", + "description": "Output pin of the comparator 1" + }, + { + "number": "3", + "name": "V+", + "type": "—", + "description": "Positive supply" + }, + { + "number": "4", + "name": "IN1–", + "type": "Input", + "description": "Negative input pin of the comparator 1" + }, + { + "number": "5", + "name": "IN1+", + "type": "Input", + "description": "Positive input pin of the comparator 1" + }, + { + "number": "6", + "name": "IN2–", + "type": "Input", + "description": "Negative input pin of the comparator 2" + }, + { + "number": "7", + "name": "IN2+", + "type": "Input", + "description": "Positive input pin of the comparator 2" + }, + { + "number": "8", + "name": "IN3–", + "type": "Input", + "description": "Negative input pin of the comparator 3" + }, + { + "number": "9", + "name": "IN3+", + "type": "Input", + "description": "Positive input pin of the comparator 3" + }, + { + "number": "10", + "name": "IN4–", + "type": "Input", + "description": "Negative input pin of the comparator 4" + }, + { + "number": "11", + "name": "IN4+", + "type": "Input", + "description": "Positive input pin of the comparator 4" + }, + { + "number": "12", + "name": "GND", + "type": "—", + "description": "Negative supply" + }, + { + "number": "13", + "name": "OUT4", + "type": "Output", + "description": "Output pin of the comparator 4" + }, + { + "number": "14", + "name": "OUT3", + "type": "Output", + "description": "Output pin of the comparator 3" + } + ], + "warnings": [] + }, + "LM358B": { + "family": "LM358B", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LM358BIPWR", + "packageDescription": "TSSOP-8", + "packageCode": "PW", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/LM358BIPWR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"LM358B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358BIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358BIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.453Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LM358B/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LM358B/datasheet/GUID-F5F966EA-8CBB-4B4B-9243-39274258E76F", + "packageColumn": "PIN / SOIC, SOT23-8, VSSOP, CDIP, PDIP, SO, TSSOP, CFP", + "tableClass": "table", + "pins": [ + { + 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"selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/LM358LVIPWR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"LM358LV\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358LVIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358LVIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.464Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LM358LV/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LM358LV/datasheet/GUID-FB4A4DBD-125C-49BD-B1BC-9DB5A1119395", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "2", + "name": "IN1–", + "type": "I", + "description": "Inverting input, channel 1" + }, + { + "number": "3", + "name": "IN1+", + "type": "I", + "description": "Noninverting input, channel 1" + }, + { + "number": "6", + "name": "IN2–", + "type": "I", + "description": "Inverting input, channel 2" + }, + { + "number": "5", + "name": "IN2+", + "type": "I", + "description": "Noninverting input, channel 2" + }, + { + "number": "1", + "name": "OUT1", + "type": "O", + "description": "Output, channel 1" + }, + { + "number": "7", + "name": "OUT2", + "type": "O", + "description": "Output, channel 2" + }, + { + "number": "4", + "name": "V–", + "type": "I or —", + "description": "Negative (low) supply or ground (for single-supply operation)" + }, + { + "number": "8", + "name": "V+", + "type": "I", + "description": "Positive (high) supply" + } + ], + "warnings": [] + }, + "LM3644": { + "family": "LM3644", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LM3644YFFR", + "packageCode": "YFF", + "expectedPinCount": 12, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LM3644\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LM3644YFFR\",\"packageCode\":\"YFF\",\"expectedPinCount\":12,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.520Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LM3644/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LM3644/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NUMBER", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "GND", + "type": "Ground", + "description": "Ground" + }, + { + "number": "A2", + "name": "IN", + "type": "Power", + "description": "Input voltage connection. Connect IN to the input supply and bypass to GND with a 10-µF or larger ceramic capacitor." + }, + { + "number": "A3", + "name": "SDA", + "type": "I/O", + "description": "Serial data input/output in the IC Mode on LM3644." + }, + { + "number": "B1", + "name": "SW", + "type": "Power", + "description": "Drain Connection for Internal NMOS and Synchronous PMOS Switches." + }, + { + "number": "B2", + "name": "STROBE", + "type": "I/O", + "description": "Active high hardware flash enable. Drive STROBE high to turn on Flash pulse. Internal pulldown resistor of 300 kΩ between STROBE and GND." + }, + { + "number": "B3", + "name": "SCL", + "type": "I/O", + "description": "Serial clock input for LM3644." + }, + { + "number": "C1", + "name": "OUT", + "type": "Power", + "description": "Step-up DC-DC converter output. Connect a 10-µF ceramic capacitor between this pin and GND." + }, + { + "number": "C2", + "name": "HWEN", + "type": "I/O", + "description": "Active high enable pin. High = Standby, Low = Shutdown/Reset. Internal pulldown resistor of 300 kΩ between HWEN and GND." + }, + { + "number": "C3", + "name": "TORCH/TEMP", + "type": "I/O", + "description": "Torch terminal input or threshold detector for NTC temperature sensing and current scale back." + }, + { + "number": "D1", + "name": "LED2", + "type": "Power", + "description": "High-side current source output for flash LED." + }, + { + "number": "D2", + "name": "TX", + "type": "I/O", + "description": "Configurable dual polarity power amplifier synchronization input. Internal pulldown resistor of 300 kΩ between TX and GND." + }, + { + "number": "D3", + "name": "LED1", + "type": "Power", + "description": "High-side current source output for flash LED." + } + ], + "warnings": [] + }, + "LM393B": { + "family": "LM393B", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LM393BIDR", + "packageDescription": "SOIC-8", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/LM393BIDR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"LM393B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM393BIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM393BIDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.514Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LM393B/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LM393B/datasheet/GUID-CF6D9816-73DE-4971-A2D7-FBC85135CE0D", + "packageColumn": "PIN / SOIC, VSSOP, PDIP, SO, DDF and TSSOP", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "1OUT", + "type": "Output", + "description": "Output pin of comparator 1" + }, + { + "number": "2", + "name": "1IN–", + "type": "Input", + "description": "Negative input pin of comparator 1" + }, + { + "number": "3", + "name": "1IN+", + "type": "Input", + "description": "Positive input pin of comparator 1" + }, + { + "number": "4", + "name": "GND", + "type": "—", + "description": "Ground" + }, + { + "number": "5", + "name": "2IN+", + "type": "Input", + "description": "Positive input pin of comparator 2" + }, + { + "number": "6", + "name": "2IN-", + "type": "Input", + "description": "Negative input pin of comparator 2" + }, + { + "number": "7", + "name": "2OUT", + "type": "Output", + "description": "Output pin of comparator 2" + }, + { + "number": "8", + "name": "VCC", + "type": "—", + "description": "Positive Supply" + } + ], + "warnings": [] + }, + "LM4060": { + "family": "LM4060", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LM4060A12EDBZR", + "packageCode": "DBZ", + "expectedPinCount": 3, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LM4060\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LM4060A12EDBZR\",\"packageCode\":\"DBZ\",\"expectedPinCount\":3,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.630Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LM4060/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LM4060/datasheet/GUID-C5738EF7-9138-48C8-B28D-D083F65B7CFE", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "Cathode", + "type": "I/O", + "description": "Shunt current and input voltage" + }, + { + "number": "2", + "name": "Anode", + "type": "O", + "description": "Common pin, normally connected to ground" + }, + { + "number": "3", + "name": "DNC", + "type": "—", + "description": "This pin must be left floating or connected to pin 2." + } + ], + "warnings": [] + }, + "LMG1210": { + "family": "LMG1210", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LMG1210RVRR", + "packageCode": "RVR", + "expectedPinCount": 19, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LMG1210\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LMG1210RVRR\",\"packageCode\":\"RVR\",\"expectedPinCount\":19,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.602Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMG1210/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMG1210/datasheet/pin-configuration-and-functions-snosd129548", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "17", + "name": "BST", + "type": "O", + "description": "Bootstrap diode anode connection point." + }, + { + "number": "5", + "name": "DHL", + "type": "I", + "description": "Sets the dead time for a high-to-low transition in PWM mode by connecting a resistor to VSS. If using IIM this pin can be left floating, tied to GND, tied to VDD." + }, + { + "number": "6", + "name": "DLH", + "type": "I", + "description": "Sets the dead time for a low-to-high transition in PWM mode by connecting a resistor to VSS. Tie to VDD to select IIM." + }, + { + "number": "18", + "name": "EN/HI", + "type": "I", + "description": "Enable input or high-side driver control. In PWM mode this is the EN pin. In IIM mode this is the HI pin." + }, + { + "number": "19", + "name": "PWM/LI", + "type": "I", + "description": "PWM input or low-side driver control. In PWM mode this is the PWM pin. In IIM mode this is the LI pin." + }, + { + "number": "12", + "name": "HB", + "type": "I", + "description": "High-side driver supply. Bootstrap diode cathode connection point." + }, + { + "number": "10", + "name": "HO", + "type": "O", + "description": "High-side driver output." + }, + { + "number": "9", + "name": "HS", + "type": "I", + "description": "Switch node and high-side driver ground. These pins are internally connected." + }, + { + "number": "13", + "name": "HS", + "type": "I", + "description": "Switch node and high-side driver ground. These pins are internally connected." + }, + { + "number": "16", + "name": "HS", + "type": "I", + "description": "Switch node and high-side driver ground. These pins are internally connected." + }, + { + "number": "8", + "name": "LO", + "type": "O", + "description": "Low-side driver output." + }, + { + "number": "1", + "name": "NC", + "type": "—", + "description": "Not internally connected." + }, + { + "number": "11", + "name": "NC", + "type": "—", + "description": "Not internally connected." + }, + { + "number": "15", + "name": "NC", + "type": "—", + "description": "Not internally connected." + }, + { + "number": "14", + "name": "NC1", + "type": "I", + "description": "For proper operation, this pin should be either unconnected or tied to HS." + }, + { + "number": "21", + "name": "Thermal Pad (HS)", + "type": "I", + "description": "Connected to HS." + }, + { + "number": "20", + "name": "Thermal Pad (VSS)", + "type": "I", + "description": "Connected to VSS." + }, + { + "number": "4", + "name": "VDD", + "type": "O", + "description": "Low-side driver supply and LDO output. 5 V" + }, + { + "number": "2", + "name": "VIN", + "type": "I", + "description": "6 V to 18 V input to LDO. If LDO is not required, connect to VDD." + }, + { + "number": "3", + "name": "VSS", + "type": "—", + "description": "Low-side ground return: all low-side signals are referenced to this ground." + }, + { + "number": "7", + "name": "VSS", + "type": "—", + "description": "Low-side ground return: all low-side signals are referenced to this ground." + } + ], + "warnings": ["Official TI pin count 21 does not match catalog pinCount 19."] + }, + "LMG3612": { + "family": "LMG3612", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LMG3612REQR", + "packageCode": "REQ", + "expectedPinCount": 38, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LMG3612\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LMG3612REQR\",\"packageCode\":\"REQ\",\"expectedPinCount\":38,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.612Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMG3612/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMG3612/datasheet/GUID-26644745-E9C3-4AF7-92F4-D4E9F68C7920", + "packageColumn": "PIN / NO.", + "tableClass": "table page-break frame-all", + "pins": [ + { + "number": "1", + "name": "NC1", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to D." + }, + { + "number": "15", + "name": "NC1", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to D." + }, + { + "number": "2", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "3", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "4", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "5", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "6", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "7", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "8", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "9", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "10", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "11", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "12", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "13", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "14", + "name": "D", + "type": "P", + "description": "GaN FET drain. Internally connected to NC1." + }, + { + "number": "16", + "name": "NC2", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to AGND, S and, PAD." + }, + { + "number": "20", + "name": "NC2", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to AGND, S and, PAD." + }, + { + "number": "38", + "name": "NC2", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to AGND, S and, PAD." + }, + { + "number": "17", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "18", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "19", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "21", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "22", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "23", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "24", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "25", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "26", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "27", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "28", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "29", + "name": "S", + "type": "P", + "description": "GaN FET source. Internally connected to AGND, PAD, and NC2." + }, + { + "number": "30", + "name": "NC3", + "type": "NC", + "description": "Pin is not functional. Do not connect PCB landing pad to other metal. Internally connected to AGND through active impedance." + }, + { + "number": "31", + "name": "IN", + "type": "I", + "description": "Gate-drive control input. There is a forward based ESD diode from IN to AUX so avoid driving IN higher than AUX." + }, + { + "number": "32", + "name": "AGND", + "type": "GND", + "description": "Analog ground. Internally connected to S, PAD, and NC2." + }, + { + "number": "33", + "name": "NC4", + "type": "NC", + "description": "Pin is not functional. Do not connect PCB landing pad to other metal. Internally connected to AGND through active impedance." + }, + { + "number": "34", + "name": "NC5", + "type": "NC", + "description": "Used to anchor QFN package to PCB. Pin must be soldered to a PCB landing pad. The PCB landing pad is non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Pin not connected internally." + }, + { + "number": "35", + "name": "FLT", + "type": "O", + "description": "Active-low fault output. Open-drain output that asserts during overtemperature protection." + }, + { + "number": "36", + "name": "AUX", + "type": "P", + "description": "Auxiliary voltage rail. Device supply voltage. Connect a local bypass capacitor between AUX and AGND." + }, + { + "number": "37", + "name": "RDRV", + "type": "I", + "description": "Drive strength control resistor. Set a resistance between RDRV and AGND to program the GaN FET turn-on slew rate." + } + ], + "warnings": [] + }, + "LMK6D": { + "family": "LMK6D", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LMK6DA10000ADLFR", + "packageCode": "DLF", + "expectedPinCount": 6, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LMK6D\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LMK6DA10000ADLFR\",\"packageCode\":\"DLF\",\"expectedPinCount\":6,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.708Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMK6D/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMK6D/datasheet/GUID-890D7550-BBE1-4F21-9C68-5C49A0ACAE42", + "packageColumn": "PIN / DLE/DLF", + "tableClass": "table frame-all", + "pins": [ + { + "number": "1", + "name": "OE / ST / NC", + "type": "I / NC", + "description": "Output Enable (OE) or Standby (ST) pin or No Connect (NC). See Table 8-1 for more details." + }, + { + "number": "2", + "name": "OE / ST / NC", + "type": "NC / I", + "description": "Output Enable (OE) or Standby (ST) pin or No Connect (NC). See Table 8-1 for more details." + }, + { + "number": "3", + "name": "GND", + "type": "G", + "description": "Device ground" + }, + { + "number": "4", + "name": "OUTP", + "type": "O", + "description": "Positive differential output clock" + }, + { + "number": "5", + "name": "OUTN", + "type": "O", + "description": "Negative differential output clock" + }, + { + "number": "6", + "name": "VDD", + "type": "P", + "description": "Device power supply" + } + ], + "warnings": [] + }, + "LMP8480": { + "family": "LMP8480", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LMP8480MMX-T/NOPB", + "packageCode": "DGK", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LMP8480\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LMP8480MMX-T/NOPB\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.706Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMP8480/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMP8480/datasheet/GUID-00B2FC81-5BF1-4E13-B97B-D245D57984B6", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "RSP", + "type": "I", + "description": "Positive current sense input" + }, + { + "number": "2", + "name": "VCC", + "type": "P", + "description": "Positive supply voltage" + }, + { + "number": "3", + "name": "NC", + "type": "—", + "description": "No connection – not internally connected" + }, + { + "number": "4", + "name": "GND", + "type": "P", + "description": "Ground" + }, + { + "number": "5", + "name": "VOUT", + "type": "O", + "description": "Output" + }, + { + "number": "6", + "name": "NC or REFB", + "type": "I", + "description": "LMP8480: no connection" + }, + { + "number": "7", + "name": "NC or REFA", + "type": "I", + "description": "LMP8480: no connection" + }, + { + "number": "8", + "name": "RSN", + "type": "I", + "description": "Negative current sense input" + } + ], + "warnings": [] + }, + "LMP8601": { + "family": "LMP8601", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "LMP8601MA/NOPB", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"LMP8601\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"LMP8601MA/NOPB\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.716Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMP8601/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMP8601/datasheet/GUID-56ED0FAD-07A1-43DE-BC4F-F5B9BDF0A98D", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "3", + "name": "A1", + "type": "O", + "description": "Preamplifier output" + }, + { + "number": "4", + "name": "A2", + "type": "I", + "description": "Input from the external filter network and, or A1" + }, + { + "number": "2", + "name": "GND", + "type": "P", + "description": "Power ground" + }, + { + "number": "8", + "name": "+IN", + "type": "I", + "description": "Positive input" + }, + { + "number": "1", + "name": "-IN", + "type": "I", + "description": "Negative input" + }, + { + "number": "7", + "name": "OFFSET", + "type": "I", + "description": "DC offset for bidirectional signals" + }, + { + "number": "5", + "name": "OUT", + "type": "O", + "description": "Single-ended output" + }, + { + "number": "6", + "name": "VS", + "type": "P", + "description": "Positive supply voltage" + } + ], + "warnings": [] + }, + "LMT70": { + "family": "LMT70", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LMT70YFQR", + "packageDescription": "DSBGA-4", + "packageCode": "YFQ", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/LMT70YFQR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"LMT70\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMT70YFQR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YFQ\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LMT70YFQR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.760Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMT70/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMT70/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "GND", + "type": "Ground", + "description": "Ground reference for the device" + }, + { + "number": "A2", + "name": "VDD", + "type": "Power", + "description": "Supply voltage" + }, + { + "number": "B1", + "name": "TAO", + "type": "Analog Output", + "description": "Temperature analog output pin" + }, + { + "number": "B2", + "name": "T_ON", + "type": "Digital Input", + "description": "T_ON pin. Active High input. , If T_ON = 0, then the TAO output is open., If T_ON = 1, then TAO pin is connected to the temperature output voltage., Tie this pin to VDD if not used." + } + ], + "warnings": [] + }, + "LMV324A": { + "family": "LMV324A", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LMV324AIPWR", + "packageDescription": "TSSOP-14", + "packageCode": "PW", + "expectedPinCount": 14, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/LMV324AIPWR.circuit.tsx", + "pinLabelCount": 14, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 14, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"LMV324A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMV324AIPWR\",\"packageDescription\":\"TSSOP-14\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LMV324AIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.906Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LMV324A/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LMV324A/datasheet/GUID-D2A195E2-7335-4FF5-AC0F-6ACAE0A3ADC8", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "2", + "name": "–IN A", + "type": "I", + "description": "Inverting input, channel A" + }, + { + "number": "3", + "name": "+IN A", + "type": "I", + "description": "Noninverting input, channel A" + }, + { + "number": "6", + "name": "–IN B", + "type": "I", + "description": "Inverting input, channel B" + }, + { + "number": "5", + "name": "+IN B", + "type": "I", + "description": "Noninverting input, channel B" + }, + { + "number": "9", + "name": "–IN C", + "type": "I", + "description": "Inverting input, channel C" + }, + { + "number": "10", + "name": "+IN C", + "type": "I", + "description": "Noninverting input, channel C" + }, + { + "number": "13", + "name": "–IN D", + "type": "I", + "description": "Inverting input, channel D" + }, + { + "number": "12", + "name": "+IN D", + "type": "I", + "description": "Noninverting input, channel D" + }, + { + "number": "1", + "name": "OUT A", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "7", + "name": "OUT B", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "8", + "name": "OUT C", + "type": "O", + "description": "Output, channel C" + }, + { + "number": "14", + "name": "OUT D", + "type": "O", + "description": "Output, channel D" + }, + { + "number": "11", + "name": "V–", + "type": "—", + "description": "Negative (lowest) supply or ground (for single-supply operation)" + }, + { + "number": "4", + "name": "V+", + "type": "—", + "description": "Positive (highest) supply" + } + ], + "warnings": [] + }, + "LP5813": { + "family": "LP5813", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "LP5813AYBHR", + "packageDescription": "DSBGA-12", + "packageCode": "YBH", + "expectedPinCount": 12, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/LP5813AYBHR.circuit.tsx", + "pinLabelCount": 12, + "coordinateLabelCount": 12, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 12, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"LP5813\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LP5813AYBHR\",\"packageDescription\":\"DSBGA-12\",\"packageCode\":\"YBH\",\"expectedPinCount\":12,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LP5813AYBHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.819Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/LP5813/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/LP5813/datasheet/GUID-93E6BE80-B11D-494F-8631-503C146E436E", + "packageColumn": "PIN / YBH", + "tableClass": "table page-break frame-all", + "pins": [ + { + "number": "A1", + "name": "EN", + "type": "I", + "description": "Enable input of the integrated boost converter." + }, + { + "number": "A2", + "name": "VIN", + "type": "P", + "description": "Power supply of the device. A 10 μF capacitor is recommended to be connected between this pin with GND and be placed as close to the device as possible." + }, + { + "number": "A3", + "name": "SW", + "type": "P", + "description": "Switch pin of the integrated boost converter, which is connected to the drain of low-side power FET and source of high-side rectifier FET. Connect the inductor to this pin" + }, + { + "number": "B1", + "name": "OUT0", + "type": "O", + "description": "Output 0 which contains current sink 0 and high-side scan FET 0. If not used, this pin must be floating." + }, + { + "number": "B2", + "name": "GND", + "type": "G", + "description": "Ground. Must be connected to the common ground plane" + }, + { + "number": "B3", + "name": "VOUT", + "type": "P", + "description": "Boost converter output. A 22 uF capacitor is recommended to be connected between this pin with GND and be placed as close to the device as possible." + }, + { + "number": "C1", + "name": "OUT1", + "type": "O", + "description": "Output 1 which contains current sink 1 and high-side scan FET 1. If not used, this pin must be floating." + }, + { + "number": "C2", + "name": "SYNC", + "type": "I/O", + "description": "Synchronous between multiple devices. If not used, this pin can be connected to ground to save power." + }, + { + "number": "C3", + "name": "SCL", + "type": "I", + "description": "IC serial interface clock input." + }, + { + "number": "D1", + "name": "OUT2", + "type": "O", + "description": "Output 2 which contains current sink 2 and high-side scan FET 2. If not used, this pin must be floating." + }, + { + "number": "D2", + "name": "OUT3", + "type": "O", + "description": "Output 3 which contains current sink 3 and high-side scan FET 3. If not used, this pin must be floating." + }, + { + "number": "D3", + "name": "SDA", + "type": "I/O", + "description": "IC serial interface data input/output." + } + ], + "warnings": [] + }, + "MSP430F5437A": { + "family": "MSP430F5437A", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "MSP430F5437AIPNR", + "packageCode": "PN", + "expectedPinCount": 80, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSP430F5437A\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"MSP430F5437AIPNR\",\"packageCode\":\"PN\",\"expectedPinCount\":80,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.905Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSP430F5437A/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSP430F5437A/datasheet/GUID-0A55A562-C1D2-4697-BDCF-BA7754BB9177", + "packageColumn": "TERMINAL / NO. / PN", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "P6.4/A4", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A4 for the ADC" + }, + { + "number": "2", + "name": "P6.5/A5", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A5 for the ADC" + }, + { + "number": "3", + "name": "P6.6/A6", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A6 for the ADC" + }, + { + "number": "4", + "name": "P6.7/A7", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A7 for the ADC" + }, + { + "number": "5", + "name": "P7.4/A12", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A12 for the ADC" + }, + { + "number": "6", + "name": "P7.5/A13", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A13 for the ADC" + }, + { + "number": "7", + "name": "P7.6/A14", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A14 for the ADC" + }, + { + "number": "8", + "name": "P7.7/A15", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A15 for the ADC" + }, + { + "number": "9", + "name": "P5.0/A8/VREF+/VeREF+", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A8 for the ADC, Output of reference voltage to the ADC , Input for an external reference voltage to the ADC" + }, + { + "number": "10", + "name": "P5.1/A9/VREF-/VeREF-", + "type": "I/O", + "description": "General-purpose digital I/O, Analog input A9 for the ADC , Negative terminal for the ADC reference voltage for both sources, the internal reference voltage, or an external applied reference voltage" + }, + { + "number": "11", + "name": "AVCC", + "type": "", + "description": "Analog power supply" + }, + { + "number": "12", + "name": "AVSS", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "13", + "name": "P7.0/XIN", + "type": "I/O", + "description": "General-purpose digital I/O , Input terminal for crystal oscillator XT1" + }, + { + "number": "14", + "name": "P7.1/XOUT", + "type": "I/O", + "description": "General-purpose digital I/O , Output terminal of crystal oscillator XT1" + }, + { + "number": "15", + "name": "DVSS1", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "16", + "name": "DVCC1", + "type": "", + "description": "Digital power supply" + }, + { + "number": "17", + "name": "P1.0/TA0CLK/ACLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 clock signal TACLK input , ACLK output (divided by 1, 2, 4, 8, 16, or 32)" + }, + { + "number": "18", + "name": "P1.1/TA0.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 CCR0 capture: CCI0A input, compare: Out0 output , BSL transmit output" + }, + { + "number": "19", + "name": "P1.2/TA0.1", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 CCR1 capture: CCI1A input, compare: Out1 output , BSL receive input" + }, + { + "number": "20", + "name": "P1.3/TA0.2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 CCR2 capture: CCI2A input, compare: Out2 output" + }, + { + "number": "21", + "name": "P1.4/TA0.3", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 CCR3 capture: CCI3A input compare: Out3 output" + }, + { + "number": "22", + "name": "P1.5/TA0.4", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA0 CCR4 capture: CCI4A input, compare: Out4 output" + }, + { + "number": "23", + "name": "P1.6/SMCLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, SMCLK output" + }, + { + "number": "24", + "name": "P1.7", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "25", + "name": "P2.0/TA1CLK/MCLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA1 clock signal TA1CLK input , MCLK output" + }, + { + "number": "26", + "name": "P2.1/TA1.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA1 CCR0 capture: CCI0A input, compare: Out0 output" + }, + { + "number": "27", + "name": "P2.2/TA1.1", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA1 CCR1 capture: CCI1A input, compare: Out1 output" + }, + { + "number": "28", + "name": "P2.3/TA1.2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, TA1 CCR2 capture: CCI2A input, compare: Out2 output" + }, + { + "number": "29", + "name": "P2.4/RTCCLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, RTCCLK output" + }, + { + "number": "32", + "name": "P2.5", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt," + }, + { + "number": "33", + "name": "P2.6/ACLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, ACLK output (divided by 1, 2, 4, 8, 16, or 32)" + }, + { + "number": "34", + "name": "P2.7/ADC12CLK/DMAE0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt, Conversion clock output for the ADC , DMA external trigger input" + }, + { + "number": "35", + "name": "P3.0/UCB0STE/UCA0CLK", + "type": "I/O", + "description": "General-purpose digital I/O , Slave transmit enable – USCI_B0 SPI mode , Clock signal input – USCI_A0 SPI slave mode , Clock signal output – USCI_A0 SPI master mode" + }, + { + "number": "36", + "name": "P3.1/UCB0SIMO/UCB0SDA", + "type": "I/O", + "description": "General-purpose digital I/O , Slave in, master out – USCI_B0 SPI mode , IC data – USCI_B0 IC mode" + }, + { + "number": "37", + "name": "P3.2/UCB0SOMI/UCB0SCL", + "type": "I/O", + "description": "General-purpose digital I/O , Slave out, master in – USCI_B0 SPI mode , IC clock – USCI_B0 IC mode" + }, + { + "number": "38", + "name": "P3.3/UCB0CLK/UCA0STE", + "type": "I/O", + "description": "General-purpose digital I/O , Clock signal input – USCI_B0 SPI slave mode , Clock signal output – USCI_B0 SPI master mode , Slave transmit enable – USCI_A0 SPI mode" + }, + { + "number": "30", + "name": "DVSS3", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "31", + "name": "DVCC3", + "type": "", + "description": "Digital power supply" + }, + { + "number": "39", + "name": "P3.4/UCA0TXD/UCA0SIMO", + "type": "I/O", + "description": "General-purpose digital I/O , Transmit data – USCI_A0 UART mode , Slave in, master out – USCI_A0 SPI mode" + }, + { + "number": "40", + "name": "P3.5/UCA0RXD/UCA0SOMI", + "type": "I/O", + "description": "General-purpose digital I/O , Receive data – USCI_A0 UART mode , Slave out, master in – USCI_A0 SPI mode" + }, + { + "number": "41", + "name": "P3.6/UCB1STE/UCA1CLK", + "type": "I/O", + "description": "General-purpose digital I/O , Slave transmit enable – USCI_B1 SPI mode , Clock signal input – USCI_A1 SPI slave mode , Clock signal output – USCI_A1 SPI master mode" + }, + { + "number": "42", + "name": "P3.7/UCB1SIMO/UCB1SDA", + "type": "I/O", + "description": "General-purpose digital I/O , Slave in, master out – USCI_B1 SPI mode , IC data – USCI_B1 IC mode" + }, + { + "number": "43", + "name": "P4.0/TB0.0", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR0: CCI0A/CCI0B input, compare: Out0 output" + }, + { + "number": "44", + "name": "P4.1/TB0.1", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR1: CCI1A/CCI1B input, compare: Out1 output" + }, + { + "number": "45", + "name": "P4.2/TB0.2", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR2: CCI2A/CCI2B input, compare: Out2 output" + }, + { + "number": "46", + "name": "P4.3/TB0.3", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR3: CCI3A/CCI3B input, compare: Out3 output" + }, + { + "number": "47", + "name": "P4.4/TB0.4", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR4: CCI4A/CCI4B input, compare: Out4 output" + }, + { + "number": "48", + "name": "P4.5/TB0.5", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR5: CCI5A/CCI5B input, compare: Out5 output" + }, + { + "number": "52", + "name": "P4.6/TB0.6", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 capture CCR6: CCI6A/CCI6B input, compare: Out6 output" + }, + { + "number": "53", + "name": "P4.7/TB0CLK/SMCLK", + "type": "I/O", + "description": "General-purpose digital I/O , TB0 clock input, SMCLK output" + }, + { + "number": "54", + "name": "P5.4/UCB1SOMI/UCB1SCL", + "type": "I/O", + "description": "General-purpose digital I/O , Slave out, master in – USCI_B1 SPI mode , IC clock – USCI_B1 IC mode" + }, + { + "number": "55", + "name": "P5.5/UCB1CLK/UCA1STE", + "type": "I/O", + "description": "General-purpose digital I/O , Clock signal input – USCI_B1 SPI slave mode , Clock signal output – USCI_B1 SPI master mode , Slave transmit enable – USCI_A1 SPI mode" + }, + { + "number": "56", + "name": "P5.6/UCA1TXD/UCA1SIMO", + "type": "I/O", + "description": "General-purpose digital I/O , Transmit data – USCI_A1 UART mode , Slave in, master out – USCI_A1 SPI mode" + }, + { + "number": "57", + "name": "P5.7/UCA1RXD/UCA1SOMI", + "type": "I/O", + "description": "General-purpose digital I/O , Receive data – USCI_A1 UART mode , Slave out, master in – USCI_A1 SPI mode" + }, + { + "number": "58", + "name": "P7.2/TB0OUTH/SVMOUT", + "type": "I/O", + "description": "General-purpose digital I/O, Switch all PWM outputs to high impedance – Timer TB0, SVM output" + }, + { + "number": "59", + "name": "P7.3/TA1.2", + "type": "I/O", + "description": "General-purpose digital I/O, TA1 CCR2 capture: CCI2B input, compare: Out2 output" + }, + { + "number": "60", + "name": "P8.0/TA0.0", + "type": "I/O", + "description": "General-purpose digital I/O , TA0 CCR0 capture: CCI0B input, compare: Out0 output" + }, + { + "number": "61", + "name": "P8.1/TA0.1", + "type": "I/O", + "description": "General-purpose digital I/O , TA0 CCR1 capture: CCI1B input, compare: Out1 output" + }, + { + "number": "62", + "name": "P8.2/TA0.2", + "type": "I/O", + "description": "General-purpose digital I/O , TA0 CCR2 capture: CCI2B input, compare: Out2 output" + }, + { + "number": "63", + "name": "P8.3/TA0.3", + "type": "I/O", + "description": "General-purpose digital I/O , TA0 CCR3 capture: CCI3B input, compare: Out3 output" + }, + { + "number": "64", + "name": "P8.4/TA0.4", + "type": "I/O", + "description": "General-purpose digital I/O , TA0 CCR4 capture: CCI4B input, compare: Out4 output" + }, + { + "number": "49", + "name": "VCORE", + "type": "", + "description": "Regulated core power supply output (internal use only, no external current loading)" + }, + { + "number": "50", + "name": "DVSS2", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "51", + "name": "DVCC2", + "type": "", + "description": "Digital power supply" + }, + { + "number": "65", + "name": "P8.5/TA1.0", + "type": "I/O", + "description": "General-purpose digital I/O , TA1 CCR0 capture: CCI0B input, compare: Out0 output" + }, + { + "number": "66", + "name": "P8.6/TA1.1", + "type": "I/O", + "description": "General-purpose digital I/O , TA1 CCR1 capture: CCI1B input, compare: Out1 output" + }, + { + "number": "67", + "name": "DVCC4", + "type": "", + "description": "Digital power supply" + }, + { + "number": "68", + "name": "DVSS4", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "69", + "name": "P5.2/XT2IN", + "type": "I/O", + "description": "General-purpose digital I/O , Input terminal for crystal oscillator XT2" + }, + { + "number": "70", + "name": "P5.3/XT2OUT", + "type": "I/O", + "description": "General-purpose digital I/O , Output terminal of crystal oscillator XT2" + }, + { + "number": "71", + "name": "TEST/SBWTCK", + "type": "I", + "description": "Test mode pin – Selects four wire JTAG operation., Spy-Bi-Wire input clock when Spy-Bi-Wire operation activated" + }, + { + "number": "72", + "name": "PJ.0/TDO", + "type": "I/O", + "description": "General-purpose digital I/O , JTAG test data output port" + }, + { + "number": "73", + "name": "PJ.1/TDI/TCLK", + "type": "I/O", + "description": "General-purpose digital I/O , JTAG test data input or test clock input" + }, + { + "number": "74", + "name": "PJ.2/TMS", + "type": "I/O", + "description": "General-purpose digital I/O , JTAG test mode select" + }, + { + "number": "75", + "name": "PJ.3/TCK", + "type": "I/O", + "description": "General-purpose digital I/O , JTAG test clock" + }, + { + "number": "76", + "name": "RST /NMI/SBWTDIO", + "type": "I/O", + "description": "Reset input active low , Nonmaskable interrupt input , Spy-Bi-Wire data input/output when Spy-Bi-Wire operation activated." + }, + { + "number": "77", + "name": "P6.0/A0", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A0 for the ADC" + }, + { + "number": "78", + "name": "P6.1/A1", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A1 for the ADC" + }, + { + "number": "79", + "name": "P6.2/A2", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A2 for the ADC" + }, + { + "number": "80", + "name": "P6.3/A3", + "type": "I/O", + "description": "General-purpose digital I/O , Analog input A3 for the ADC" + } + ], + "warnings": [] + }, + "MSP430F5528": { + "family": "MSP430F5528", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "MSP430F5528IZXHR", + "packageDescription": "NFBGA-80", + "packageCode": "ZXH", + "expectedPinCount": 80, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/MSP430F5528IZXHR.circuit.tsx", + "pinLabelCount": 80, + "coordinateLabelCount": 80, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 80, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"MSP430F5528\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430F5528IZXHR\",\"packageDescription\":\"NFBGA-80\",\"packageCode\":\"ZXH\",\"expectedPinCount\":80,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430F5528IZXHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:11.946Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSP430F5528/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSP430F5528/datasheet/GUID-3341B6BE-234D-49EA-ABC8-0FD54E0A8AC6", + "packageColumn": "TERMINAL / NO. / ZXH, ZQE", + "tableClass": "table", + "pins": [ + { + "number": "A1", + "name": "P6.0/CB0/A0", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "A2", + "name": "RST /NMI/SBWTDIO", + "type": "I/O", + "description": "Reset input, active low" + }, + { + "number": "A3", + "name": "PJ.2/TMS", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "A4", + "name": "TEST/SBWTCK", + "type": "I", + "description": "Test mode pin – selects 4-wire JTAG operation" + }, + { + "number": "A5", + "name": "AVSS2", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "A6", + "name": "VUSB", + "type": "", + "description": "USB LDO output" + }, + { + "number": "A7", + "name": "VBUS", + "type": "", + "description": "USB LDO input (connect to USB power source)" + }, + { + "number": "A8", + "name": "PU.1/DM", + "type": "I/O", + "description": "General-purpose digital I/O. Controlled by USB control register" + }, + { + "number": "A9", + "name": "PU.0/DP", + "type": "I/O", + "description": "General-purpose digital I/O. Controlled by USB control register" + }, + { + "number": "B1", + "name": "P6.2/CB2/A2", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "B2", + "name": "P6.1/CB1/A1", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "B3", + "name": "PJ.3/TCK", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "B4", + "name": "P5.3/XT2OUT", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "B5", + "name": "P5.2/XT2IN", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "B6", + "name": "V18", + "type": "", + "description": "USB regulated power (internal use only, no external current loading)" + }, + { + "number": "B7", + "name": "PUR", + "type": "I/O", + "description": "USB pullup resistor pin (open drain). The voltage level at the PUR pin is used to invoke the default USB BSL. Recommended 1-MΩ resistor to ground. See Section 9.5.1 for more information." + }, + { + "number": "B8", + "name": "VSSU", + "type": "", + "description": "USB PHY ground supply" + }, + { + "number": "B9", + "name": "VSSU", + "type": "", + "description": "USB PHY ground supply" + }, + { + "number": "C1", + "name": "P6.4/CB4/A4", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "C2", + "name": "P6.3/CB3/A3", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "C4", + "name": "PJ.1/TDI/TCLK", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "C5", + "name": "PJ.0/TDO", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "C6", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "C7", + "name": "P4.7/PM_NONE", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "C8", + "name": "P4.6/PM_NONE", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "C9", + "name": "P4.5/PM_UCA1RXD/ PM_UCA1SOMI", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "D1", + "name": "P6.6/CB6/A6", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "D2", + "name": "P6.5/CB5/A5", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "D3", + "name": "P6.7/CB7/A7", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "D4", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "D5", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "D6", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "D7", + "name": "P4.4/PM_UCA1TXD/ PM_UCA1SIMO", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "D8", + "name": "P4.3/PM_UCB1CLK/ PM_UCA1STE", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "D9", + "name": "P4.2/PM_UCB1SOMI/ PM_UCB1SCL", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "E1", + "name": "P5.0/A8/VREF+/VeREF+", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "E2", + "name": "P5.1/A9/VREF-/VeREF-", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "E3", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "E4", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "E5", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "E6", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "E7", + "name": "P4.1/PM_UCB1SIMO/ PM_UCB1SDA", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "E8", + "name": "P4.0/PM_UCB1STE/ PM_UCA1CLK", + "type": "I/O", + "description": "General-purpose digital I/O with reconfigurable port mapping secondary function" + }, + { + "number": "E9", + "name": "DVCC2", + "type": "", + "description": "Digital power supply" + }, + { + "number": "F1", + "name": "P5.4/XIN", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "F2", + "name": "AVCC1", + "type": "", + "description": "Analog power supply" + }, + { + "number": "F3", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F4", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F5", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F6", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F7", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F8", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "F9", + "name": "DVSS2", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "G1", + "name": "P5.5/XOUT", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "G2", + "name": "AVSS1", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "G3", + "name": "NC", + "type": "NC", + "description": "Unassigned physical ball: present in the official ZXH0080A 80-ball package drawing and absent from TI Table 7-1 Terminal Functions." + }, + { + "number": "G4", + "name": "P1.3/TA0.2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "G5", + "name": "P1.6/TA1CLK/CBOUT", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "G6", + "name": "P2.1/TA1.2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "G7", + "name": "P3.4/UCA0RXD/ UCA0SOMI", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "G8", + "name": "P3.2/UCB0CLK/UCA0STE", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "G9", + "name": "P3.3/UCA0TXD/ UCA0SIMO", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "H1", + "name": "DVCC1", + "type": "", + "description": "Digital power supply" + }, + { + "number": "H2", + "name": "P1.0/TA0CLK/ACLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H3", + "name": "P1.1/TA0.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H4", + "name": "P1.4/TA0.3", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H5", + "name": "P1.7/TA1.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H6", + "name": "P2.3/TA2.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H7", + "name": "P2.7/UCB0STE/UCA0CLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "H8", + "name": "P3.0/UCB0SIMO/ UCB0SDA", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "H9", + "name": "P3.1/UCB0SOMI/ UCB0SCL", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "J1", + "name": "DVSS1", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "J2", + "name": "VCORE", + "type": "", + "description": "Regulated core power supply output (internal use only, no external current loading)" + }, + { + "number": "J3", + "name": "P1.2/TA0.1", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J4", + "name": "P1.5/TA0.4", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J5", + "name": "P2.0/TA1.1", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J6", + "name": "P2.2/TA2CLK/SMCLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J7", + "name": "P2.4/TA2.1", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J8", + "name": "P2.5/TA2.2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + }, + { + "number": "J9", + "name": "P2.6/RTCCLK/DMAE0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt" + } + ], + "warnings": [ + "Pin C1 appears more than once with conflicting data; kept the first row.", + "Pin D2 appears more than once with conflicting data; kept the first row.", + "Pin D1 appears more than once with conflicting data; kept the first row.", + "Pin D3 appears more than once with conflicting data; kept the first row.", + "Pin E1 appears more than once with conflicting data; kept the first row.", + "Pin E2 appears more than once with conflicting data; kept the first row.", + "Pin F1 appears more than once with conflicting data; kept the first row.", + "Pin G1 appears more than once with conflicting data; kept the first row.", + "Pin H2 appears more than once with conflicting data; kept the first row.", + "Pin H3 appears more than once with conflicting data; kept the first row.", + "Pin J3 appears more than once with conflicting data; kept the first row.", + "Pin G4 appears more than once with conflicting data; kept the first row.", + "Pin H4 appears more than once with conflicting data; kept the first row.", + "Pin J4 appears more than once with conflicting data; kept the first row.", + "Pin G5 appears more than once with conflicting data; kept the first row.", + "Pin H5 appears more than once with conflicting data; kept the first row.", + "Pin J5 appears more than once with conflicting data; kept the first row.", + "Pin G6 appears more than once with conflicting data; kept the first row.", + "Pin J6 appears more than once with conflicting data; kept the first row.", + "Pin H6 appears more than once with conflicting data; kept the first row.", + "Pin J7 appears more than once with conflicting data; kept the first row.", + "Pin J8 appears more than once with conflicting data; kept the first row.", + "Pin J9 appears more than once with conflicting data; kept the first row.", + "Pin H7 appears more than once with conflicting data; kept the first row.", + "Pin H8 appears more than once with conflicting data; kept the first row.", + "Pin H9 appears more than once with conflicting data; kept the first row.", + "Pin G8 appears more than once with conflicting data; kept the first row.", + "Pin G9 appears more than once with conflicting data; kept the first row.", + "Pin G7 appears more than once with conflicting data; kept the first row.", + "Pin E8 appears more than once with conflicting data; kept the first row.", + "Pin E7 appears more than once with conflicting data; kept the first row.", + "Pin D9 appears more than once with conflicting data; kept the first row.", + "Pin D8 appears more than once with conflicting data; kept the first row.", + "Pin D7 appears more than once with conflicting data; kept the first row.", + "Pin C9 appears more than once with conflicting data; kept the first row.", + "Pin C8 appears more than once with conflicting data; kept the first row.", + "Pin C7 appears more than once with conflicting data; kept the first row.", + "Pin A9 appears more than once with conflicting data; kept the first row.", + "Pin A8 appears more than once with conflicting data; kept the first row.", + "Pin B5 appears more than once with conflicting data; kept the first row.", + "Pin B4 appears more than once with conflicting data; kept the first row.", + "Pin A4 appears more than once with conflicting data; kept the first row.", + "Pin C5 appears more than once with conflicting data; kept the first row.", + "Pin C4 appears more than once with conflicting data; kept the first row.", + "Pin A3 appears more than once with conflicting data; kept the first row.", + "Pin B3 appears more than once with conflicting data; kept the first row.", + "Pin A2 appears more than once with conflicting data; kept the first row.", + "Pin A1 appears more than once with conflicting data; kept the first row.", + "Pin B2 appears more than once with conflicting data; kept the first row.", + "Pin B1 appears more than once with conflicting data; kept the first row.", + "Pin C2 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 65 does not match catalog pinCount 80.", + "Completed 15 unassigned ZXH physical balls as NC by comparing TI Table 7-1 (65 assigned balls) with the official ZXH0080A 80-ball package drawing." + ] + }, + "MSP430FR2532": { + "family": "MSP430FR2532", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "MSP430FR2532IRGER", + "packageCode": "RGE", + "expectedPinCount": 24, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSP430FR2532\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"MSP430FR2532IRGER\",\"packageCode\":\"RGE\",\"expectedPinCount\":24,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.113Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSP430FR2532/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSP430FR2532/datasheet/signal-descriptions-slas9424070", + "packageColumn": "PIN NUMBER / RGE", + "tableClass": "gentable", + "pins": [ + { + "number": "7", + "name": "A0", + "type": "I", + "description": "Analog input A0" + }, + { + "number": "8", + "name": "A1", + "type": "I", + "description": "Analog input A1" + }, + { + "number": "9", + "name": "A2", + "type": "I", + "description": "Analog input A2" + }, + { + "number": "10", + "name": "A3", + "type": "I", + "description": "Analog input A3" + }, + { + "number": "3", + "name": "A4", + "type": "I", + "description": "Analog input A4" + }, + { + "number": "4", + "name": "A5", + "type": "I", + "description": "Analog input A5" + }, + { + "number": "5", + "name": "A6", + "type": "I", + "description": "Analog input A6" + }, + { + "number": "6", + "name": "A7", + "type": "I", + "description": "Analog input A7" + }, + { + "number": "12", + "name": "CAP0.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "13", + "name": "CAP0.3", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "14", + "name": "CAP1.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "15", + "name": "CAP1.3", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "17", + "name": "CAP2.0", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "18", + "name": "CAP2.1", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "19", + "name": "CAP3.0", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "20", + "name": "CAP3.1", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "11", + "name": "SYNC", + "type": "I", + "description": "CapTIvate synchronous trigger input for processing and conversion" + }, + { + "number": "22", + "name": "XIN", + "type": "I", + "description": "Input terminal for crystal oscillator" + }, + { + "number": "21", + "name": "XOUT", + "type": "O", + "description": "Output terminal for crystal oscillator" + }, + { + "number": "2", + "name": "SBWTCK", + "type": "I", + "description": "Spy-Bi-Wire input clock" + }, + { + "number": "1", + "name": "SBWTDIO", + "type": "I/O", + "description": "Spy-Bi-Wire data input/output" + }, + { + "number": "24", + "name": "DVCC", + "type": "P", + "description": "Power supply" + }, + { + "number": "23", + "name": "DVSS", + "type": "P", + "description": "Power ground" + }, + { + "number": "16", + "name": "VREG", + "type": "O", + "description": "CapTIvate regulator external decoupling capacitor" + }, + { + "number": "Pad", + "name": "VQFN thermal pad", + "type": "", + "description": "VQFN package exposed thermal pad. TI recommends connecting to VSS." + } + ], + "warnings": [ + "Pin 7 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 11 appears more than once with conflicting data; kept the first row.", + "Pin 10 appears more than once with conflicting data; kept the first row.", + "Pin 6 appears more than once with conflicting data; kept the first row.", + "Pin 3 appears more than once with conflicting data; kept the first row.", + "Pin 5 appears more than once with conflicting data; kept the first row.", + "Pin 2 appears more than once with conflicting data; kept the first row.", + "Pin 4 appears more than once with conflicting data; kept the first row.", + "Pin 8 appears more than once with conflicting data; kept the first row.", + "Pin 21 appears more than once with conflicting data; kept the first row.", + "Pin 22 appears more than once with conflicting data; kept the first row.", + "Pin 12 appears more than once with conflicting data; kept the first row.", + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 15 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row.", + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 25 does not match catalog pinCount 24." + ] + }, + "MSP430FR2632": { + "family": "MSP430FR2632", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "MSP430FR2632IYQWR", + "packageDescription": "DSBGA-24", + "packageCode": "YQW", + "expectedPinCount": 24, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/MSP430FR2632IYQWR.circuit.tsx", + "pinLabelCount": 24, + "coordinateLabelCount": 24, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 24, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"MSP430FR2632\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430FR2632IYQWR\",\"packageDescription\":\"DSBGA-24\",\"packageCode\":\"YQW\",\"expectedPinCount\":24,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430FR2632IYQWR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.190Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSP430FR2632/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSP430FR2632/datasheet/signal-descriptions-slas9424070", + "packageColumn": "PIN NUMBER / YQW", + "tableClass": "gentable", + "pins": [ + { + "number": "B1", + "name": "A0", + "type": "I", + "description": "Analog input A0" + }, + { + "number": "A1", + "name": "A1", + "type": "I", + "description": "Analog input A1" + }, + { + "number": "B2", + "name": "A2", + "type": "I", + "description": "Analog input A2" + }, + { + "number": "A2", + "name": "A3", + "type": "I", + "description": "Analog input A3" + }, + { + "number": "D1", + "name": "A4", + "type": "I", + "description": "Analog input A4" + }, + { + "number": "C2", + "name": "A5", + "type": "I", + "description": "Analog input A5" + }, + { + "number": "C3", + "name": "A6", + "type": "I", + "description": "Analog input A6" + }, + { + "number": "B3", + "name": "A7", + "type": "I", + "description": "Analog input A7" + }, + { + "number": "A4", + "name": "CAP0.0", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "A5", + "name": "CAP0.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "B4", + "name": "CAP1.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "B5", + "name": "CAP1.3", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "C4", + "name": "CAP2.0", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "D5", + "name": "CAP2.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "E5", + "name": "CAP3.0", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "D4", + "name": "CAP3.2", + "type": "I/O", + "description": "CapTIvate channel" + }, + { + "number": "A3", + "name": "SYNC", + "type": "I", + "description": "CapTIvate synchronous trigger input for processing and conversion" + }, + { + "number": "E3", + "name": "XIN", + "type": "I", + "description": "Input terminal for crystal oscillator" + }, + { + "number": "E4", + "name": "XOUT", + "type": "O", + "description": "Output terminal for crystal oscillator" + }, + { + "number": "D2", + "name": "SBWTCK", + "type": "I", + "description": "Spy-Bi-Wire input clock" + }, + { + "number": "E1", + "name": "SBWTDIO", + "type": "I/O", + "description": "Spy-Bi-Wire data input/output" + }, + { + "number": "E2", + "name": "DVCC", + "type": "P", + "description": "Power supply" + }, + { + "number": "D3", + "name": "DVSS", + "type": "P", + "description": "Power ground" + }, + { + "number": "C5", + "name": "VREG", + "type": "O", + "description": "CapTIvate regulator external decoupling capacitor" + } + ], + "warnings": [ + "Pin B1 appears more than once with conflicting data; kept the first row.", + "Pin B2 appears more than once with conflicting data; kept the first row.", + "Pin A3 appears more than once with conflicting data; kept the first row.", + "Pin A2 appears more than once with conflicting data; kept the first row.", + "Pin B3 appears more than once with conflicting data; kept the first row.", + "Pin D1 appears more than once with conflicting data; kept the first row.", + "Pin C3 appears more than once with conflicting data; kept the first row.", + "Pin D2 appears more than once with conflicting data; kept the first row.", + "Pin C2 appears more than once with conflicting data; kept the first row.", + "Pin A1 appears more than once with conflicting data; kept the first row.", + "Pin E4 appears more than once with conflicting data; kept the first row.", + "Pin E3 appears more than once with conflicting data; kept the first row.", + "Pin A5 appears more than once with conflicting data; kept the first row.", + "Pin B4 appears more than once with conflicting data; kept the first row.", + "Pin B5 appears more than once with conflicting data; kept the first row.", + "Pin E5 appears more than once with conflicting data; kept the first row.", + "Pin A4 appears more than once with conflicting data; kept the first row.", + "Pin D4 appears more than once with conflicting data; kept the first row.", + "Pin E1 appears more than once with conflicting data; kept the first row." + ] + }, + "MSP430FR5969": { + "family": "MSP430FR5969", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "MSP430FR5969IRGZR", + "packageCode": "RGZ", + "expectedPinCount": 48, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSP430FR5969\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"MSP430FR5969IRGZR\",\"packageCode\":\"RGZ\",\"expectedPinCount\":48,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.140Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSP430FR5969/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSP430FR5969/datasheet/signal-descriptions-slas704rod7840", + "packageColumn": "TERMINAL / NO. / RGZ", + "tableClass": "termfunctions", + "pins": [ + { + "number": "1", + "name": "P1.0/TA0.1/DMAE0/ RTCCLK/A0/C0/VREF-/ VeREF-", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "2", + "name": "P1.1/TA0.2/TA1CLK/ COUT/A1/C1/VREF+/ VeREF+", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "3", + "name": "P1.2/TA1.1/TA0CLK/ COUT/A2/C2", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "4", + "name": "P3.0/A12/C12", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "5", + "name": "P3.1/A13/C13", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "6", + "name": "P3.2/A14/C14", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "7", + "name": "P3.3/A15/C15", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "8", + "name": "P4.7", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "9", + "name": "P1.3/TA1.2/UCB0STE/ A3/C3", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "10", + "name": "P1.4/TB0.1/UCA0STE/ A4/C4", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "11", + "name": "P1.5/TB0.2/UCA0CLK/ A5/C5", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "12", + "name": "PJ.0/TDO/TB0OUTH/ SMCLK/SRSCG1/C6", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "13", + "name": "PJ.1/TDI/TCLK/MCLK/ SRSCG0/C7", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "14", + "name": "PJ.2/TMS/ACLK/ SROSCOFF/C8", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "15", + "name": "PJ.3/TCK/ SRCPUOFF/C9", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "16", + "name": "P4.0/A8", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "17", + "name": "P4.1/A9", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "18", + "name": "P4.2/A10", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "19", + "name": "P4.3/A11", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "20", + "name": "P2.5/TB0.0/UCA1TXD/ UCA1SIMO", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "21", + "name": "P2.6/TB0.1/UCA1RXD/ UCA1SOMI", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "22", + "name": "TEST/SBWTCK", + "type": "I", + "description": "Test mode pin – select digital I/O on JTAG pins" + }, + { + "number": "23", + "name": "RST /NMI/SBWTDIO", + "type": "I/O", + "description": "Reset input active low" + }, + { + "number": "24", + "name": "P2.0/TB0.6/UCA0TXD/ UCA0SIMO/TB0CLK/ ACLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "25", + "name": "P2.1/TB0.0/UCA0RXD/ UCA0SOMI/TB0.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "26", + "name": "P2.2/TB0.2/UCB0CLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "27", + "name": "P3.4/TB0.3/SMCLK", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "28", + "name": "P3.5/TB0.4/COUT", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "29", + "name": "P3.6/TB0.5", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "30", + "name": "P3.7/TB0.6", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "31", + "name": "P1.6/TB0.3/UCB0SIMO/ UCB0SDA/TA0.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "32", + "name": "P1.7/TB0.4/UCB0SOMI/ UCB0SCL/TA1.0", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "33", + "name": "P4.4/TB0.5", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "34", + "name": "P4.5", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "35", + "name": "P4.6", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "36", + "name": "DVSS", + "type": "", + "description": "Digital ground supply" + }, + { + "number": "37", + "name": "DVCC", + "type": "", + "description": "Digital power supply" + }, + { + "number": "38", + "name": "P2.7", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "39", + "name": "P2.3/TA0.0/UCA1STE/ A6/C10", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "40", + "name": "P2.4/TA1.0/UCA1CLK/ A7/C11", + "type": "I/O", + "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5" + }, + { + "number": "41", + "name": "AVSS", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "42", + "name": "PJ.6/HFXIN", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "43", + "name": "PJ.7/HFXOUT", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "44", + "name": "AVSS", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "45", + "name": "PJ.4/LFXIN", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "46", + "name": "PJ.5/LFXOUT", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "47", + "name": "AVSS", + "type": "", + "description": "Analog ground supply" + }, + { + "number": "48", + "name": "AVCC", + "type": "", + "description": "Analog power supply" + }, + { + "number": "Pad", + "name": "QFN Pad", + "type": "", + "description": "QFN package exposed thermal pad. TI recommends connection to VSS." + } + ], + "warnings": [ + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Pin 2 appears more than once with conflicting data; kept the first row.", + "Pin 3 appears more than once with conflicting data; kept the first row.", + "Pin 4 appears more than once with conflicting data; kept the first row.", + "Pin 5 appears more than once with conflicting data; kept the first row.", + "Pin 6 appears more than once with conflicting data; kept the first row.", + "Pin 7 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 10 appears more than once with conflicting data; kept the first row.", + "Pin 11 appears more than once with conflicting data; kept the first row.", + "Pin 12 appears more than once with conflicting data; kept the first row.", + "Pin 13 appears more than once with conflicting data; kept the first row.", + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 15 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 17 appears more than once with conflicting data; kept the first row.", + "Pin 18 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row.", + "Pin 20 appears more than once with conflicting data; kept the first row.", + "Pin 21 appears more than once with conflicting data; kept the first row.", + "Pin 22 appears more than once with conflicting data; kept the first row.", + "Pin 23 appears more than once with conflicting data; kept the first row.", + "Pin 24 appears more than once with conflicting data; kept the first row.", + "Pin 25 appears more than once with conflicting data; kept the first row.", + "Pin 26 appears more than once with conflicting data; kept the first row.", + "Pin 27 appears more than once with conflicting data; kept the first row.", + "Pin 28 appears more than once with conflicting data; kept the first row.", + "Pin 29 appears more than once with conflicting data; kept the first row.", + "Pin 30 appears more than once with conflicting data; kept the first row.", + "Pin 31 appears more than once with conflicting data; kept the first row.", + "Pin 32 appears more than once with conflicting data; kept the first row.", + "Pin 33 appears more than once with conflicting data; kept the first row.", + "Pin 39 appears more than once with conflicting data; kept the first row.", + "Pin 40 appears more than once with conflicting data; kept the first row.", + "Pin 42 appears more than once with conflicting data; kept the first row.", + "Pin 43 appears more than once with conflicting data; kept the first row.", + "Pin 45 appears more than once with conflicting data; kept the first row.", + "Pin 46 appears more than once with conflicting data; kept the first row.", + "Official TI pin count 49 does not match catalog pinCount 48." + ] + }, + "MSPM0G1218": { + "family": "MSPM0G1218", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "XMSPM0G1218SRGZR", + "packageCode": "RGZ", + "expectedPinCount": 48, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSPM0G1218\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"XMSPM0G1218SRGZR\",\"packageCode\":\"RGZ\",\"expectedPinCount\":48,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.264Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSPM0G1218/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/MSPM0G1218#page=16", + "warnings": ["Recovered 48/48 physical pins from the official TI PDF."], + "packageColumn": "RGZ package column", + "tableClass": "official-ti-pdf/fixed-width-package-column", + "pins": [ + { + "number": "1", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "2", + "name": "TIMA_FAL2", + "type": "", + "description": "" + }, + { + "number": "3", + "name": "UC0_SDA_TX", + "type": "", + "description": "" + }, + { + "number": "4", + "name": "NRST", + "type": "", + "description": "" + }, + { + "number": "5", + "name": "UC0_SCL_RX", + "type": "", + "description": "" + }, + { + "number": "6", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "7", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "8", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "9", + "name": "TIMA0_C1", + "type": "", + "description": "" + }, + { + "number": "10", + "name": "TIMA0_C1N", + "type": "", + "description": "" + }, + { + "number": "11", + "name": "UC5_SDA_TX", + "type": "", + "description": "" + }, + { + "number": "12", + "name": "TIMG0_C1", + "type": "", + "description": "" + }, + { + "number": "13", + "name": "TIMA0_C2", + "type": "", + "description": "" + }, + { + "number": "14", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "15", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "16", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "17", + "name": "TIMA0_C0N", + "type": "", + "description": "" + }, + { + "number": "18", + "name": "CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "19", + "name": "COMP0_OUT", + "type": "", + "description": "" + }, + { + "number": "20", + "name": "TIMG8_C0", + "type": "", + "description": "" + }, + { + "number": "21", + "name": "UC4_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "22", + "name": "UC4_PICO_TX", + "type": "", + "description": "" + }, + { + "number": "23", + "name": "UC4_SCLK_RX", + "type": "", + "description": "" + }, + { + "number": "24", + "name": "UC4_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "25", + "name": "UC0_SDA_TX", + "type": "", + "description": "" + }, + { + "number": "26", + "name": "UC0_SCL_RX", + "type": "", + "description": "" + }, + { + "number": "27", + "name": "FCC_IN", + "type": "", + "description": "" + }, + { + "number": "28", + "name": "TIMG0_C1", + "type": "", + "description": "" + }, + { + "number": "29", + "name": "UC9_TX", + "type": "", + "description": "" + }, + { + "number": "30", + "name": "TIMG8_IDX", + "type": "", + "description": "" + }, + { + "number": "31", + "name": "TIMA0_C2N", + "type": "", + "description": "" + }, + { + "number": "32", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "33", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "34", + "name": "UC4_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "35", + "name": "UC4_SCLK_RX", + "type": "", + "description": "" + }, + { + "number": "36", + "name": "UC0_SCL_RX", + "type": "", + "description": "" + }, + { + "number": "37", + "name": "TIMA0_C2N", + "type": "", + "description": "" + }, + { + "number": "38", + "name": "TIMG8_C1", + "type": "", + "description": "" + }, + { + "number": "39", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "40", + "name": "TIMA0_C0N", + "type": "", + "description": "" + }, + { + "number": "41", + "name": "TIMA_FAL1", + "type": "", + "description": "" + }, + { + "number": "42", + "name": "TIMA0_C1N", + "type": "", + "description": "" + }, + { + "number": "43", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "44", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "45", + "name": "TIMA0_C1N", + "type": "", + "description": "" + }, + { + "number": "46", + "name": "TIMA_FAL0", + "type": "", + "description": "" + }, + { + "number": "47", + "name": "CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "48", + "name": "VCORE", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/MSPM0G1218", + "pdfSha256": "fb44315efcf5347748023c51fb401d19e7ad0926143d0919e8f2f2487b27e018", + "pdfPageNumbers": [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27], + "pdfParser": "fixed-width-package-column", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "MSPM0G5117": { + "family": "MSPM0G5117", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "MSPM0G5117SPMR", + "packageCode": "PM", + "expectedPinCount": 64, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSPM0G5117\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"MSPM0G5117SPMR\",\"packageCode\":\"PM\",\"expectedPinCount\":64,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.427Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSPM0G5117/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/MSPM0G5117#page=14", + "warnings": [ + "Recovered 64/64 physical pins from the official TI PDF.", + "Official PDF contains conflicting names for pin 1: kept UC3_CS0_CTS, ignored D4." + ], + "packageColumn": "PM package column", + "tableClass": "official-ti-pdf/fixed-width-package-column", + "pins": [ + { + "number": "1", + "name": "UC3_CS0_CTS", + "type": "", + "description": "" + }, + { + "number": "2", + "name": "UC3_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "3", + "name": "UC3_PICO_TX", + "type": "", + "description": "" + }, + { + "number": "4", + "name": "UC3_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "5", + "name": "FCC_IN", + "type": "", + "description": "" + }, + { + "number": "6", + "name": "RTC_OUT", + "type": "", + "description": "" + }, + { + "number": "7", + "name": "TIMG7_C0", + "type": "", + "description": "" + }, + { + "number": "8", + "name": "TIMA0_C2", + "type": "", + "description": "" + }, + { + "number": "9", + "name": "TIMA0_C2N", + "type": "", + "description": "" + }, + { + "number": "10", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "11", + "name": "TIMG7_C1", + "type": "", + "description": "" + }, + { + "number": "12", + "name": "UC1_SDA_TX", + "type": "", + "description": "" + }, + { + "number": "13", + "name": "TIMA0_C2N", + "type": "", + "description": "" + }, + { + "number": "14", + "name": "UC2_PICO", + "type": "", + "description": "" + }, + { + "number": "15", + "name": "UC2_SCK", + "type": "", + "description": "" + }, + { + "number": "16", + "name": "UC2_POCI", + "type": "", + "description": "" + }, + { + "number": "17", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "18", + "name": "TIMA0_C0N", + "type": "", + "description": "" + }, + { + "number": "19", + "name": "UC2_CS2", + "type": "", + "description": "" + }, + { + "number": "20", + "name": "UC3_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "21", + "name": "UC3_PICO_TX", + "type": "", + "description": "" + }, + { + "number": "22", + "name": "UC3_SCK_RX", + "type": "", + "description": "" + }, + { + "number": "23", + "name": "UC2_CS1", + "type": "", + "description": "" + }, + { + "number": "24", + "name": "UC3_CS0_CTS", + "type": "", + "description": "" + }, + { + "number": "25", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "26", + "name": "UC3_PICO_TX", + "type": "", + "description": "" + }, + { + "number": "27", + "name": "TIMA_FAL0", + "type": "", + "description": "" + }, + { + "number": "28", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "29", + "name": "VUSB33", + "type": "", + "description": "" + }, + { + "number": "30", + "name": "TIMG7_C0", + "type": "", + "description": "" + }, + { + "number": "31", + "name": "CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "32", + "name": "VCORE", + "type": "", + "description": "" + }, + { + "number": "33", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "34", + "name": "TIMA0_C1", + "type": "", + "description": "" + }, + { + "number": "35", + "name": "TIMA0_C3", + "type": "", + "description": "" + }, + { + "number": "36", + "name": "UC1_CTS", + "type": "", + "description": "" + }, + { + "number": "37", + "name": "UC1_RTS", + "type": "", + "description": "" + }, + { + "number": "38", + "name": "NRST", + "type": "", + "description": "" + }, + { + "number": "39", + "name": "TIMA0_C3N", + "type": "", + "description": "" + }, + { + "number": "40", + "name": "VDD", + "type": "PWR", + "description": "" + }, + { + "number": "41", + "name": "VSS", + "type": "GND", + "description": "" + }, + { + "number": "42", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "43", + "name": "TIMA0_C1", + "type": "", + "description": "" + }, + { + "number": "44", + "name": "UC2_CS0", + "type": "", + "description": "" + }, + { + "number": "45", + "name": "TIMG0_C0", + "type": "", + "description": "" + }, + { + "number": "46", + "name": "TIMG0_C1", + "type": "", + "description": "" + }, + { + "number": "47", + "name": "UC2_CS3", + "type": "", + "description": "" + }, + { + "number": "48", + "name": "UC2_CS2", + "type": "", + "description": "" + }, + { + "number": "49", + "name": "TIMA0_C2", + "type": "", + "description": "" + }, + { + "number": "50", + "name": "UC1_CTS", + "type": "", + "description": "" + }, + { + "number": "51", + "name": "UC1_RTS", + "type": "", + "description": "" + }, + { + "number": "52", + "name": "UC3_CS0_CTS", + "type": "", + "description": "" + }, + { + "number": "53", + "name": "UC3_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "54", + "name": "TIMA0_C0", + "type": "", + "description": "" + }, + { + "number": "55", + "name": "TIMA0_C0N", + "type": "", + "description": "" + }, + { + "number": "56", + "name": "CLK_OUT", + "type": "", + "description": "" + }, + { + "number": "57", + "name": "COMP0_OUT", + "type": "", + "description": "" + }, + { + "number": "58", + "name": "UC3_CS0_CTS", + "type": "", + "description": "" + }, + { + "number": "59", + "name": "UC3_POCI_RTS", + "type": "", + "description": "" + }, + { + "number": "60", + "name": "UC1_CTS", + "type": "", + "description": "" + }, + { + "number": "61", + "name": "UC1_RTS", + "type": "", + "description": "" + }, + { + "number": "62", + "name": "COMP0_OUT", + "type": "", + "description": "" + }, + { + "number": "63", + "name": "UC2_CS2", + "type": "", + "description": "" + }, + { + "number": "64", + "name": "UC2_CS0", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/MSPM0G5117", + "pdfSha256": "3ee7f5382242545e54c235a27e67665c7fc8661f6581279feb49065a04063ce8", + "pdfPageNumbers": [14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25], + "pdfParser": "fixed-width-package-column", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "MSPM0L1343": { + "family": "MSPM0L1343", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "MSPM0L1343TDGS20R", + "packageCode": "DGS", + "expectedPinCount": 20, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"MSPM0L1343\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"MSPM0L1343TDGS20R\",\"packageCode\":\"DGS\",\"expectedPinCount\":20,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:12.525Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/MSPM0L1343/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/MSPM0L1343/datasheet/GUID-3211147C-D305-4A41-84DB-091604D3C64A", + "packageColumn": "PIN NO. / 20 VSSOP", + "tableClass": "table frame-all", + "pins": [ + { + "number": "2", + "name": "A0", + "type": "I", + "description": "ADC0 analog input 0" + }, + { + "number": "1", + "name": "A1", + "type": "I", + "description": "ADC0 analog input 1" + }, + { + "number": "20", + "name": "A2", + "type": "I", + "description": "ADC0 analog input 2" + }, + { + "number": "19", + "name": "A3", + "type": "I", + "description": "ADC0 analog input 3" + }, + { + "number": "17", + "name": "A4", + "type": "I", + "description": "ADC0 analog input 4" + }, + { + "number": "16", + "name": "A6", + "type": "I", + "description": "ADC0 analog input 6" + }, + { + "number": "14", + "name": "A7", + "type": "I", + "description": "ADC0 analog input 7" + }, + { + "number": "12", + "name": "A8", + "type": "I", + "description": "ADC0 analog input 8" + }, + { + "number": "5", + "name": "BSLSCL", + "type": "I/O", + "description": "Default IC BSL clock" + }, + { + "number": "4", + "name": "BSLSDA", + "type": "I/O", + "description": "Default IC BSL data" + }, + { + "number": "18", + "name": "BSLTX", + "type": "O", + "description": "Default UART BSL transmit" + }, + { + "number": "8", + "name": "ROSC", + "type": "I", + "description": "External resistor used for improving oscillator accuracy" + }, + { + "number": "11", + "name": "COMP0_OUT", + "type": "O", + "description": "Comparator 0 output" + }, + { + "number": "15", + "name": "SWDIO", + "type": "I/O", + "description": "Serial wire debug data input/output" + }, + { + "number": "9", + "name": "PA4", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "10", + "name": "PA6", + "type": "I/O", + "description": "General-purpose digital I/O" + }, + { + "number": "13", + "name": "PA17", + "type": "I/O", + "description": "General-purpose digital I/O with wake up from SHUTDOWN" + }, + { + "number": "7", + "name": "VSS", + "type": "P", + "description": "Ground supply" + }, + { + "number": "6", + "name": "VDD", + "type": "P", + "description": "Power supply" + }, + { + "number": "3", + "name": "VCORE", + "type": "P", + "description": "Regulated core power supply output" + } + ], + "warnings": [ + "Pin 14 appears more than once with conflicting data; kept the first row.", + "Pin 17 appears more than once with conflicting data; kept the first row.", + "Pin 2 appears more than once with conflicting data; kept the first row.", + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Pin 18 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 12 appears more than once with conflicting data; kept the first row.", + "Pin 4 appears more than once with conflicting data; kept the first row.", + "Pin 5 appears more than once with conflicting data; kept the first row.", + "Pin 8 appears more than once with conflicting data; kept the first row.", + "Pin 11 appears more than once with conflicting data; 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"type": "Input", + "description": "Noninverting input, channel C" + }, + { + "number": "12", + "name": "+IN D", + "type": "Input", + "description": "Noninverting input, channel D" + }, + { + "number": "2", + "name": "–IN A", + "type": "Input", + "description": "Inverting input, channel A" + }, + { + "number": "6", + "name": "–IN B", + "type": "Input", + "description": "Inverting input, channel B" + }, + { + "number": "9", + "name": "–IN C", + "type": "Input", + "description": "Inverting input,channel C" + }, + { + "number": "13", + "name": "–IN D", + "type": "Input", + "description": "Inverting input, channel D" + }, + { + "number": "1", + "name": "OUT A", + "type": "Output", + "description": "Output, channel A" + }, + { + "number": "7", + "name": "OUT B", + "type": "Output", + "description": "Output, channel B" + }, + { + "number": "8", + "name": "OUT C", + "type": "Output", + "description": "Output, channel C" + }, + { + "number": "14", + "name": "OUT D", + "type": "Output", + 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TI Figure 6-7 note A requires connection to V−." + } + ], + "warnings": [ + "Added physical pin 9 as THERMAL_PAD from official TI Figure 6-7 (TLV9002 DSG, 8-pin WSON with exposed thermal pad); connect to V−." + ] + }, + "TLV9022L": { + "family": "TLV9022L", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TLV9022L1RUGR", + "packageCode": "RUG", + "expectedPinCount": 10, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TLV9022L\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TLV9022L1RUGR\",\"packageCode\":\"RUG\",\"expectedPinCount\":10,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.489Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TLV9022L/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TLV9022L/datasheet/GUID-14DA61EC-042B-4874-9C06-2D7D03E34BBC", + "packageColumn": "TLV9022L , TLV9032L / PINS / X2QFN", + "tableClass": "table frame-all", + "pins": [ + { + "number": "8", + "name": "OUT A", + "type": "O", + "description": "Output of comparator A" + }, + { + "number": "9", + "name": "IN– A", + "type": "I", + "description": "Inverting (–) input of comparator A" + }, + { + "number": "10", + "name": "IN+ A", + "type": "I", + "description": "Non-Inverting (+) input of comparator A" + }, + { + "number": "1", + "name": "V–", + "type": "—", + "description": "Negative supply voltage" + }, + { + "number": "2", + "name": "CLR A", + "type": "I", + "description": "Clear input for comparator A - clears on falling edge" + }, + { + "number": "3", + "name": "CLR B", + "type": "I", + "description": "Clear input for comparator B - clears on falling edge" + }, + { + "number": "4", + "name": "IN+ B", + "type": "I", + "description": "Non-inverting (+) input of comparator B" + }, + { + "number": "5", + "name": "IN– B", + "type": "I", + "description": "Inverting (–) input of comparator B" + }, + { + "number": "6", + "name": "V+", + "type": "—", + "description": "Positive supply voltage" + }, + { + "number": "7", + "name": "OUT B", + "type": "O", + "description": "Output of comparator B" + } + ], + "warnings": [] + }, + "TLV9062": { + "family": "TLV9062", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TLV9062IDR", + "packageDescription": "SOIC-8", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TLV9062IDR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": 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"description": "Inverting input, channel 2" + }, + { + "number": "5", + "name": "IN2+", + "type": "I", + "description": "Noninverting input, channel 2" + }, + { + "number": "1", + "name": "OUT1", + "type": "O", + "description": "Output, channel 1" + }, + { + "number": "7", + "name": "OUT2", + "type": "O", + "description": "Output, channel 2" + }, + { + "number": "4", + "name": "V–", + "type": "—", + "description": "Negative (lowest) supply or ground (for single-supply operation)" + }, + { + "number": "8", + "name": "V+", + "type": "—", + "description": "Positive (highest) supply" + } + ], + "warnings": [] + }, + "TLV9064": { + "family": "TLV9064", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TLV9064IDR", + "packageDescription": "SOIC-14", + "packageCode": "D", + "expectedPinCount": 14, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TLV9064IDR.circuit.tsx", + "pinLabelCount": 14, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 14, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"TLV9064\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9064IDR\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9064IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.500Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TLV9064/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TLV9064/datasheet/GUID-7B23BC8B-5EE6-439F-A5AC-3FF10DF51FB2", + "packageColumn": "PIN / SOIC,, TSSOP", + "tableClass": "table", + "pins": [ + { + "number": "2", + "name": "IN1–", + "type": "I", + "description": "Inverting input, channel 1" + }, + { + "number": "3", + "name": "IN1+", + "type": "I", + "description": "Noninverting input, channel 1" + }, + { + "number": "6", + "name": "IN2–", + "type": "I", + "description": "Inverting input, channel 2" + }, + { + "number": "5", + "name": "IN2+", + "type": "I", + "description": "Noninverting input, channel 2" + }, + { + "number": "9", + "name": "IN3–", + "type": "I", + "description": "Inverting input, channel 3" + }, + { + "number": "10", + "name": "IN3+", + "type": "I", + "description": "Noninverting input, channel 3" + }, + { + "number": "13", + "name": "IN4–", + "type": "I", + "description": "Inverting input, channel 4" + }, + { + "number": "12", + "name": "IN4+", + "type": "I", + "description": "Noninverting input, channel 4" + }, + { + "number": "1", + "name": "OUT1", + "type": "O", + "description": "Output, channel 1" + }, + { + "number": "7", + "name": "OUT2", + "type": "O", + "description": "Output, channel 2" + }, + { + "number": "8", + "name": "OUT3", + "type": "O", + "description": "Output, channel 3" + }, + { + "number": "14", + "name": "OUT4", + "type": "O", + "description": "Output, channel 4" + }, + { + "number": "11", + "name": "V–", + "type": "I or —", + "description": "Negative (low) supply or ground (for single-supply operation)" + }, + { + "number": "4", + "name": "V+", + "type": "I", + "description": "Positive (high) supply" + } + ], + "warnings": [] + }, + "TLV9152": { + "family": "TLV9152", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TLV9152IDR", + "packageDescription": "SOIC-8", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TLV9152IDR.circuit.tsx", + "pinLabelCount": 8, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 8, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"TLV9152\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9152IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9152IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.611Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TLV9152/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TLV9152/datasheet/GUID-149D8C77-686B-4075-B44E-5AAA5B213C36", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "3", + "name": "+IN A", + "type": "I", + "description": "Noninverting input, channel A" + }, + { + "number": "5", + "name": "+IN B", + "type": "I", + "description": "Noninverting input, channel B" + }, + { + "number": "2", + "name": "–IN A", + "type": "I", + "description": "Inverting input, channel A" + }, + { + "number": "6", + "name": "–IN B", + "type": "I", + "description": "Inverting input, channel B" + }, + { + "number": "1", + "name": "OUT A", + "type": "O", + "description": "Output, channel A" + }, + { + "number": "7", + "name": "OUT B", + "type": "O", + "description": "Output, channel B" + }, + { + "number": "8", + "name": "V+", + "type": "—", + "description": "Positive (highest) power supply" + }, + { + "number": "4", + "name": "V–", + "type": "—", + "description": "Negative (lowest) power supply" + } + ], + "warnings": [] + }, + "TM4C123GH6ZXR": { + "family": "TM4C123GH6ZXR", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TM4C123GH6ZXRI7", + "packageDescription": "NFBGA-168", + "packageCode": "ZXR", + "expectedPinCount": 168, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TM4C123GH6ZXRI7.circuit.tsx", + "pinLabelCount": 168, + "coordinateLabelCount": 168, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 168, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TM4C123GH6ZXR\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TM4C123GH6ZXRI7\",\"packageDescription\":\"NFBGA-168\",\"packageCode\":\"ZXR\",\"expectedPinCount\":168,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TM4C123GH6ZXRI7.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.290Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TM4C123GH6ZXR/datasheet", + "status": "ok", + "warnings": [ + "Official TI PDF fallback unavailable: No supported pin table or text diagram was found in the official PDF extraction.", + "Official TI PDF fallback unavailable: Best official PDF parse produced 130/168 physical pins.", + "Recovered 168/168 physical pins from Table 23-2. Signals by Pin Number.", + "Each primary physical-ball row is grouped with its following blank-number pin-mux rows." + ], + "pdfFallback": { + "status": "unavailable", + "url": "https://www.ti.com/lit/gpn/TM4C123GH6ZXR", + "reason": "Best official PDF parse produced 130/168 physical pins.", + "candidateCounts": [ + { + "parser": "signals-by-pin-number-table", + "pinCount": 130, + "pageNumbers": [ + 1369, 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, + 1380, 1381, 1382, 1383, 1384, 1385 + ] + } + ] + }, + "sectionUrl": "https://www.ti.com/lit/gpn/TM4C123GH6ZXR#page=1369", + "packageColumn": "ZXR package column", + "tableClass": "official-ti-pdf/pdfplumber-structured-table", + "pins": [ + { + "number": "A1", + "name": "PD5/AIN6/U6Tx/WT4CCP1", + "type": "I/O", + "description": "GPIOportDbit5. Analog-to-digitalconverterinput6. UARTmodule6transmit. 32/64-BitWideTimer4Capture/Compare/PWM1." + }, + { + "number": "A2", + "name": "PD4/AIN7/U6Rx/WT4CCP0", + "type": "I/O", + "description": "GPIOportDbit4. Analog-to-digitalconverterinput7. UARTmodule6receive. 32/64-BitWideTimer4Capture/Compare/PWM0." + }, + { + "number": "A3", + "name": "PE5/AIN8/CAN0Tx/I2C2SDA/M0PWM5/M1PWM3/U5Tx", + "type": "I/O", + "description": "GPIOportEbit5. Analog-to-digitalconverterinput8. CANmodule0transmit. I2Cmodule2data. MotionControlModule0PWM5.Thissignaliscontrolledby Module0PWMGenerator2. MotionControlModule1PWM3.Thissignaliscontrolledby Module1PWMGenerator1. UARTmodule5transmit." + }, + { + "number": "A4", + "name": "PB4/AIN10/CAN0Rx/M0PWM2/SSI2Clk/T1CCP0", + "type": "I/O", + "description": "GPIOportBbit4. Analog-to-digitalconverterinput10. CANmodule0receive. MotionControlModule0PWM2.Thissignaliscontrolledby Module0PWMGenerator1. SSImodule2clock. 16/32-BitTimer1Capture/Compare/PWM0." + }, + { + "number": "A5", + "name": "PN0/AIN23/CAN0Rx", + "type": "I/O", + "description": "GPIOportNbit0. Analog-to-digitalconverterinput23. CANmodule0receive." + }, + { + "number": "A6", + "name": "PJ4/C2+/T3CCP0/U6Rx", + "type": "I/O", + "description": "GPIOportJbit4. Analogcomparator2positiveinput. 16/32-BitTimer3Capture/Compare/PWM0. UARTmodule6receive." + }, + { + "number": "A7", + "name": "PP6/M0PWM6/WT1CCP0", + "type": "I/O", + "description": "GPIOportPbit6. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer1Capture/Compare/PWM0." + }, + { + "number": "A8", + "name": "PJ1/T1CCP1/U4Tx", + "type": "I/O", + "description": "GPIOportJbit1. 16/32-BitTimer1Capture/Compare/PWM1. UARTmodule4transmit." + }, + { + "number": "A9", + "name": "PN3/M0PWM7/WT2CCP1", + "type": "I/O", + "description": "GPIOportNbit3. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer2Capture/Compare/PWM1." + }, + { + "number": "A10", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "A11", + "name": "PK4/C0o/M0FAULT0/RTCCLK/U7Rx", + "type": "I/O", + "description": "GPIOportKbit4. Analogcomparator0output. MotionControlModule0PWMFault0. BufferedversionoftheHibernationmodule's32.768-kHzclock. ThissignalisnotoutputwhenthepartisinHibernatemode. UARTmodule7receive." + }, + { + "number": "A12", + "name": "PK6/C2o/M0FAULT2/WT1CCP0", + "type": "I/O", + "description": "GPIOportKbit6. Analogcomparator2output. MotionControlModule0PWMFault2. 32/64-BitWideTimer1Capture/Compare/PWM0." + }, + { + "number": "A13", + "name": "PL0/T0CCP0/WT0CCP0", + "type": "I/O", + "description": "GPIOportLbit0. 16/32-BitTimer0Capture/Compare/PWM0. 32/64-BitWideTimer0Capture/Compare/PWM0." + }, + { + "number": "B1", + "name": "PD0/AIN15/I2C3SCL/M0PWM6/M1PWM0/SSI1Clk/SSI3Clk/WT2CCP0", + "type": "I/O", + "description": "GPIOportDbit0. Analog-to-digitalconverterinput15. I2Cmodule3clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. MotionControlModule1PWM0.Thissignaliscontrolledby Module1PWMGenerator0. SSImodule1clock. SSImodule3clock. 32/64-BitWideTimer2Capture/Compare/PWM0." + }, + { + "number": "B3", + "name": "PE4/AIN9/CAN0Rx/I2C2SCL/M0PWM4/M1PWM2/U5Rx", + "type": "I/O", + "description": "GPIOportEbit4. Analog-to-digitalconverterinput9. CANmodule0receive. I2Cmodule2clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWM4.Thissignaliscontrolledby Module0PWMGenerator2. MotionControlModule1PWM2.Thissignaliscontrolledby Module1PWMGenerator1. UARTmodule5receive." + }, + { + "number": "B4", + "name": "PB5/AIN11/CAN0Tx/M0PWM3/SSI2Fss/T1CCP1", + "type": "I/O", + "description": "GPIOportBbit5. Analog-to-digitalconverterinput11. CANmodule0transmit. MotionControlModule0PWM3.Thissignaliscontrolledby Module0PWMGenerator1. SSImodule2framesignal. 16/32-BitTimer1Capture/Compare/PWM1." + }, + { + "number": "B5", + "name": "PN1/AIN22/CAN0Tx", + "type": "I/O", + "description": "GPIOportNbit1. Analog-to-digitalconverterinput22. CANmodule0transmit." + }, + { + "number": "B6", + "name": "PJ5/C2-/T3CCP1/U6Tx", + "type": "I/O", + "description": "GPIOportJbit5. Analogcomparator2negativeinput. 16/32-BitTimer3Capture/Compare/PWM1. UARTmodule6transmit." + }, + { + "number": "B7", + "name": "NC", + "type": "-", + "description": "Noconnect.Leavethepinelectricallyunconnected/isolated." + }, + { + "number": "B8", + "name": "PJ2/IDX0/T2CCP0/U5Rx", + "type": "I/O", + "description": "GPIOportJbit2. QEImodule0index. 16/32-BitTimer2Capture/Compare/PWM0. UARTmodule5receive." + }, + { + "number": "B9", + "name": "PC0/SWCLK/T4CCP0/TCK", + "type": "I/O", + "description": "GPIOportCbit0. JTAG/SWDCLK. 16/32-BitTimer4Capture/Compare/PWM0." + }, + { + "number": "B10", + "name": "PC2/T5CCP0/TDI", + "type": "I/O", + "description": "GPIOportCbit2. 16/32-BitTimer5Capture/Compare/PWM0. JTAGTDI." + }, + { + "number": "B11", + "name": "PK5/C1o/M0FAULT1/U7Tx", + "type": "I/O", + "description": "GPIOportKbit5. Analogcomparator1output. MotionControlModule0PWMFault1. UARTmodule7transmit." + }, + { + "number": "B12", + "name": "PK7/M0FAULT3/WT1CCP1", + "type": "I/O", + "description": "GPIOportKbit7. MotionControlModule0PWMFault3. 32/64-BitWideTimer1Capture/Compare/PWM1." + }, + { + "number": "B13", + "name": "PL2/T1CCP0/WT1CCP0", + "type": "I/O", + "description": "GPIOportLbit2. 16/32-BitTimer1Capture/Compare/PWM0. 32/64-BitWideTimer1Capture/Compare/PWM0." + }, + { + "number": "C1", + "name": "PD1/AIN14/I2C3SDA/M0PWM7/M1PWM1/SSI1Fss/SSI3Fss/WT2CCP1", + "type": "I/O", + "description": "GPIOportDbit1. Analog-to-digitalconverterinput14. I2Cmodule3data. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. MotionControlModule1PWM1.Thissignaliscontrolledby Module1PWMGenerator0. SSImodule1framesignal. SSImodule3framesignal. 32/64-BitWideTimer2Capture/Compare/PWM1." + }, + { + "number": "C2", + "name": "PD7/AIN4/M0FAULT1/NMI/PhB0/U2Tx/WT5CCP1", + "type": "I/O", + "description": "GPIOportDbit7. Analog-to-digitalconverterinput4. MotionControlModule0PWMFault1. Non-maskableinterrupt. QEImodule0phaseB. UARTmodule2transmit. 32/64-BitWideTimer5Capture/Compare/PWM1." + }, + { + "number": "C3", + "name": "PD6/AIN5/M0FAULT0/PhA0/U2Rx/WT5CCP0", + "type": "I/O", + "description": "GPIOportDbit6. Analog-to-digitalconverterinput5. MotionControlModule0PWMFault0. QEImodule0phaseA. UARTmodule2receive. 32/64-BitWideTimer5Capture/Compare/PWM0." + }, + { + "number": "C4", + "name": "PE7/AIN20/CAN1Tx/U1RI", + "type": "I/O", + "description": "GPIOportEbit7. Analog-to-digitalconverterinput20. CANmodule1transmit. UARTmodule1RingIndicatormodemstatusinputsignal." + }, + { + "number": "C5", + "name": "PE6/AIN21/CAN1Rx", + "type": "I/O", + "description": "GPIOportEbit6. Analog-to-digitalconverterinput21. CANmodule1receive." + }, + { + "number": "C6", + "name": "PJ7", + "type": "I/O", + "description": "GPIOportJbit7." + }, + { + "number": "C7", + "name": "PJ6", + "type": "I/O", + "description": "GPIOportJbit6." + }, + { + "number": "C8", + "name": "PJ3/T2CCP1/U5Tx", + "type": "I/O", + "description": "GPIOportJbit3. 16/32-BitTimer2Capture/Compare/PWM1. UARTmodule5transmit." + }, + { + "number": "C9", + "name": "PC1/SWDIO/T4CCP1/TMS", + "type": "I/O", + "description": "GPIOportCbit1. JTAGTMSandSWDIO. 16/32-BitTimer4Capture/Compare/PWM1." + }, + { + "number": "C10", + "name": "PC3/SWO/T5CCP1/TDO", + "type": "I/O", + "description": "GPIOportCbit3. JTAGTDOandSWO. 16/32-BitTimer5Capture/Compare/PWM1." + }, + { + "number": "C11", + "name": "PL1/T0CCP1/WT0CCP1", + "type": "I/O", + "description": "GPIOportLbit1. 16/32-BitTimer0Capture/Compare/PWM1. 32/64-BitWideTimer0Capture/Compare/PWM1." + }, + { + "number": "C12", + "name": "PL4/T2CCP0/WT2CCP0", + "type": "I/O", + "description": "GPIOportLbit4. 16/32-BitTimer2Capture/Compare/PWM0. 32/64-BitWideTimer2Capture/Compare/PWM0." + }, + { + "number": "C13", + "name": "PL5/T2CCP1/WT2CCP1", + "type": "I/O", + "description": "GPIOportLbit5. 16/32-BitTimer2Capture/Compare/PWM1. 32/64-BitWideTimer2Capture/Compare/PWM1." + }, + { + "number": "D1", + "name": "PQ1/M1PWM1/WT2CCP1", + "type": "I/O", + "description": "GPIOportQbit1. MotionControlModule1PWM1.Thissignaliscontrolledby Module1PWMGenerator0. 32/64-BitWideTimer2Capture/Compare/PWM1." + }, + { + "number": "D2", + "name": "PQ0/M1PWM0/WT2CCP0", + "type": "I/O", + "description": "GPIOportQbit0. MotionControlModule1PWM0.Thissignaliscontrolledby Module1PWMGenerator0. 32/64-BitWideTimer2Capture/Compare/PWM0." + }, + { + "number": "D3", + "name": "PD2/AIN13/M0FAULT0/SSI1Rx/SSI3Rx/USB0EPEN/WT3CCP0", + "type": "I/O", + "description": "GPIOportDbit2. Analog-to-digitalconverterinput13. MotionControlModule0PWMFault0. SSImodule1receive. SSImodule3receive. OptionallyusedinHostmodetocontrolanexternalpowersource tosupplypowertotheUSBbus. 32/64-BitWideTimer3Capture/Compare/PWM0." + }, + { + "number": "D4", + "name": "PD3/AIN12/IDX0/SSI1Tx/SSI3Tx/USB0PFLT/WT3CCP1", + "type": "I/O", + "description": "GPIOportDbit3. Analog-to-digitalconverterinput12. QEImodule0index. SSImodule1transmit. SSImodule3transmit. OptionallyusedinHostmodebyanexternalpowersourceto indicateanerrorstatebythatpowersource. 32/64-BitWideTimer3Capture/Compare/PWM1." + }, + { + "number": "D5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "D6", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "D7", + "name": "VDDC", + "type": "-", + "description": "Positivesupplyformostofthelogicfunction,includingthe processorcoreandmostperipherals.Thevoltageonthispinis 1.2Vandissuppliedbytheon-chipLDO.TheVDDCpinsshould onlybeconnectedtoeachotherandanexternalcapacitoras specifiedinTable24-12onpage1436." + }, + { + "number": "D8", + "name": "PJ0/T1CCP0/U4Rx", + "type": "I/O", + "description": "GPIOportJbit0. 16/32-BitTimer1Capture/Compare/PWM0. UARTmodule4receive." + }, + { + "number": "D9", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "D10", + "name": "PL3/T1CCP1/WT1CCP1", + "type": "I/O", + "description": "GPIOportLbit3. 16/32-BitTimer1Capture/Compare/PWM1. 32/64-BitWideTimer1Capture/Compare/PWM1." + }, + { + "number": "D11", + "name": "PB1/T2CCP1/U1Tx/USB0VBUS", + "type": "I/O", + "description": "GPIOportBbit1.Thispinisnot5-Vtolerant. 16/32-BitTimer2Capture/Compare/PWM1. UARTmodule1transmit. Thissignalisusedduringthesessionrequestprotocol.Thissignal allowstheUSBPHYtobothsensethevoltagelevelofVBUS,and pullupVBUSmomentarilyduringVBUSpulsing." + }, + { + "number": "D12", + "name": "PB3/I2C0SDA/T3CCP1", + "type": "I/O", + "description": "GPIOportBbit3. I2Cmodule0data. 16/32-BitTimer3Capture/Compare/PWM1." + }, + { + "number": "D13", + "name": "PB2/I2C0SCL/T3CCP0", + "type": "I/O", + "description": "GPIOportBbit2. I2Cmodule0clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. 16/32-BitTimer3Capture/Compare/PWM0." + }, + { + "number": "E1", + "name": "VREFA+", + "type": "-", + "description": "AreferencevoltageusedtospecifythevoltageatwhichtheADC convertstoamaximumvalue.Thispinisusedinconjunctionwith VREFA-,whichspecifiestheminimumvalue.Thevoltagethatis appliedtoVREFA+isthevoltagewithwhichanAINnsignalis convertedto4095.TheVREFA+voltageislimitedtotherange specifiedinTable24-33onpage1453." + }, + { + "number": "E2", + "name": "VREFA-", + "type": "-", + "description": "Areferencevoltageusedtospecifytheinputvoltageatwhichthe ADCconvertstoaminimumvalue.Thispinisusedinconjunction withVREFA+,whichspecifiesthemaximumvalue.Inotherwords, thevoltagethatisappliedtoVREFA-isthevoltagewithwhichan AINnsignalisconvertedto0,whilethevoltagethatisappliedto VREFA+isthevoltagewithwhichanAINnsignalisconvertedto 4095.TheVREFA-voltageislimitedtotherangespecifiedinTable 24-33onpage1453." + }, + { + "number": "E3", + "name": "PB6/I2C5SCL/M0PWM0/SSI2Rx/T0CCP0", + "type": "I/O", + "description": "GPIOportBbit6. I2Cmodule5clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWM0.Thissignaliscontrolledby Module0PWMGenerator0. SSImodule2receive. 16/32-BitTimer0Capture/Compare/PWM0." + }, + { + "number": "E4", + "name": "PB7/I2C5SDA/M0PWM1/SSI2Tx/T0CCP1", + "type": "I/O", + "description": "GPIOportBbit7. I2Cmodule5data. MotionControlModule0PWM1.Thissignaliscontrolledby Module0PWMGenerator0. SSImodule2transmit. 16/32-BitTimer0Capture/Compare/PWM1." + }, + { + "number": "E5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "E6", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "E7", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "E8", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "E9", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "E10", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "E11", + "name": "PB0/T2CCP0/U1Rx/USB0ID", + "type": "I/O", + "description": "GPIOportBbit0.Thispinisnot5-Vtolerant. 16/32-BitTimer2Capture/Compare/PWM0. UARTmodule1receive. ThissignalsensesthestateoftheUSBIDsignal.TheUSBPHY enablesanintegratedpull-up,andanexternalelement(USB connector)indicatestheinitialstateoftheUSBcontroller(pulled downistheAsideofthecableandpulledupistheBside)." + }, + { + "number": "E12", + "name": "PL6/T3CCP0/USB0DP/WT3CCP0", + "type": "I/O", + "description": "GPIOportLbit6.Thispinisnot5-Vtolerant. 16/32-BitTimer3Capture/Compare/PWM0. Bidirectionaldifferentialdatapin(D+perUSBspecification)for USB0. 32/64-BitWideTimer3Capture/Compare/PWM0." + }, + { + "number": "E13", + "name": "PL7/T3CCP1/USB0DM/WT3CCP1", + "type": "I/O", + "description": "GPIOportLbit7.Thispinisnot5-Vtolerant. 16/32-BitTimer3Capture/Compare/PWM1. Bidirectionaldifferentialdatapin(D-perUSBspecification)for USB0. 32/64-BitWideTimer3Capture/Compare/PWM1." + }, + { + "number": "F1", + "name": "PQ2/M1PWM2/WT3CCP0", + "type": "I/O", + "description": "GPIOportQbit2. MotionControlModule1PWM2.Thissignaliscontrolledby Module1PWMGenerator1. 32/64-BitWideTimer3Capture/Compare/PWM0." + }, + { + "number": "F2", + "name": "GNDA", + "type": "-", + "description": "Thegroundreferencefortheanalogcircuits(ADC,Analog Comparators,etc.).TheseareseparatedfromGNDtominimize theelectricalnoisecontainedonVDDfromaffectingtheanalog functions." + }, + { + "number": "F3", + "name": "VDDA", + "type": "-", + "description": "Thepositivesupplyfortheanalogcircuits(ADC,Analog Comparators,etc.).TheseareseparatedfromVDDtominimize theelectricalnoisecontainedonVDDfromaffectingtheanalog functions.VDDApinsmustbesuppliedwithavoltagethatmeets thespecificationinTable24-5onpage1423,regardlessofsystem implementation." + }, + { + "number": "F4", + "name": "GNDA", + "type": "-", + "description": "Thegroundreferencefortheanalogcircuits(ADC,Analog Comparators,etc.).TheseareseparatedfromGNDtominimize theelectricalnoisecontainedonVDDfromaffectingtheanalog functions." + }, + { + "number": "F5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "F6", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "F7", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "F8", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "F9", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "F10", + "name": "PM0/T4CCP0/WT4CCP0", + "type": "I/O", + "description": "GPIOportMbit0. 16/32-BitTimer4Capture/Compare/PWM0. 32/64-BitWideTimer4Capture/Compare/PWM0." + }, + { + "number": "F11", + "name": "RST", + "type": "I", + "description": "Systemresetinput." + }, + { + "number": "F12", + "name": "OSC1", + "type": "O", + "description": "Mainoscillatorcrystaloutput.Leaveunconnectedwhenusinga single-endedclocksource." + }, + { + "number": "F13", + "name": "OSC0", + "type": "I", + "description": "Mainoscillatorcrystalinputoranexternalclockreferenceinput." + }, + { + "number": "G1", + "name": "PE0/AIN3/U7Rx", + "type": "I/O", + "description": "GPIOportEbit0. Analog-to-digitalconverterinput3. UARTmodule7receive." + }, + { + "number": "G2", + "name": "PE1/AIN2/U7Tx", + "type": "I/O", + "description": "GPIOportEbit1. Analog-to-digitalconverterinput2. UARTmodule7transmit." + }, + { + "number": "G3", + "name": "PE2/AIN1", + "type": "I/O", + "description": "GPIOportEbit2. Analog-to-digitalconverterinput1." + }, + { + "number": "G4", + "name": "PE3/AIN0", + "type": "I/O", + "description": "GPIOportEbit3. Analog-to-digitalconverterinput0." + }, + { + "number": "G5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "G6", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "G7", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "G8", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "G9", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "G10", + "name": "PM4", + "type": "I/O", + "description": "GPIOportMbit4." + }, + { + "number": "G11", + "name": "PM2/T5CCP0/WT5CCP0", + "type": "I/O", + "description": "GPIOportMbit2. 16/32-BitTimer5Capture/Compare/PWM0. 32/64-BitWideTimer5Capture/Compare/PWM0." + }, + { + "number": "G12", + "name": "PM1/T4CCP1/WT4CCP1", + "type": "I/O", + "description": "GPIOportMbit1. 16/32-BitTimer4Capture/Compare/PWM1. 32/64-BitWideTimer4Capture/Compare/PWM1." + }, + { + "number": "G13", + "name": "PM3/T5CCP1/WT5CCP1", + "type": "I/O", + "description": "GPIOportMbit3. 16/32-BitTimer5Capture/Compare/PWM1. 32/64-BitWideTimer5Capture/Compare/PWM1." + }, + { + "number": "H1", + "name": "PK2/AIN18/M1FAULT2/SSI3Rx", + "type": "I/O", + "description": "GPIOportKbit2. Analog-to-digitalconverterinput18. MotionControlModule1PWMFault2. SSImodule3receive." + }, + { + "number": "H2", + "name": "PK3/AIN19/M1FAULT3/SSI3Tx", + "type": "I/O", + "description": "GPIOportKbit3. Analog-to-digitalconverterinput19. MotionControlModule1PWMFault3. SSImodule3transmit." + }, + { + "number": "H3", + "name": "PK1/AIN17/M1FAULT1/SSI3Fss", + "type": "I/O", + "description": "GPIOportKbit1. Analog-to-digitalconverterinput17. MotionControlModule1PWMFault1. SSImodule3framesignal." + }, + { + "number": "H4", + "name": "PK0/AIN16/M1FAULT0/SSI3Clk", + "type": "I/O", + "description": "GPIOportKbit0. Analog-to-digitalconverterinput16. MotionControlModule1PWMFault0. SSImodule3clock." + }, + { + "number": "H5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "H6", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "H7", + "name": "VDD", + "type": "-", + "description": "PositivesupplyforI/Oandsomelogic." + }, + { + "number": "H8", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "H9", + "name": "VDDC", + "type": "-", + "description": "Positivesupplyformostofthelogicfunction,includingthe processorcoreandmostperipherals.Thevoltageonthispinis 1.2Vandissuppliedbytheon-chipLDO.TheVDDCpinsshould onlybeconnectedtoeachotherandanexternalcapacitoras specifiedinTable24-12onpage1436." + }, + { + "number": "H10", + "name": "PM5", + "type": "I/O", + "description": "GPIOportMbit5." + }, + { + "number": "H11", + "name": "PM7/M0PWM5/WT0CCP1", + "type": "I/O", + "description": "GPIOportMbit7. MotionControlModule0PWM5.Thissignaliscontrolledby Module0PWMGenerator2. 32/64-BitWideTimer0Capture/Compare/PWM1." + }, + { + "number": "H12", + "name": "PP1/M0PWM1/T4CCP1", + "type": "I/O", + "description": "GPIOportPbit1. MotionControlModule0PWM1.Thissignaliscontrolledby Module0PWMGenerator0. 16/32-BitTimer4Capture/Compare/PWM1." + }, + { + "number": "H13", + "name": "PM6/M0PWM4/WT0CCP0", + "type": "I/O", + "description": "GPIOportMbit6. MotionControlModule0PWM4.Thissignaliscontrolledby Module0PWMGenerator2. 32/64-BitWideTimer0Capture/Compare/PWM0." + }, + { + "number": "J1", + "name": "VDDC", + "type": "-", + "description": "Positivesupplyformostofthelogicfunction,includingthe processorcoreandmostperipherals.Thevoltageonthispinis 1.2Vandissuppliedbytheon-chipLDO.TheVDDCpinsshould onlybeconnectedtoeachotherandanexternalcapacitoras specifiedinTable24-12onpage1436." + }, + { + "number": "J2", + "name": "PH6/M0PWM6/SSI2Rx/WT4CCP0", + "type": "I/O", + "description": "GPIOportHbit6. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. SSImodule2receive. 32/64-BitWideTimer4Capture/Compare/PWM0." + }, + { + "number": "J3", + "name": "PH5/M0PWM5/PhB0/SSI2Fss/WT3CCP1", + "type": "I/O", + "description": "GPIOportHbit5. MotionControlModule0PWM5.Thissignaliscontrolledby Module0PWMGenerator2. QEImodule0phaseB. SSImodule2framesignal. 32/64-BitWideTimer3Capture/Compare/PWM1." + }, + { + "number": "J4", + "name": "PH7/M0PWM7/SSI2Tx/WT4CCP1", + "type": "I/O", + "description": "GPIOportHbit7. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. SSImodule2transmit. 32/64-BitWideTimer4Capture/Compare/PWM1." + }, + { + "number": "J5", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "J6", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "J7", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "J8", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "J9", + "name": "VDDC", + "type": "-", + "description": "Positivesupplyformostofthelogicfunction,includingthe processorcoreandmostperipherals.Thevoltageonthispinis 1.2Vandissuppliedbytheon-chipLDO.TheVDDCpinsshould onlybeconnectedtoeachotherandanexternalcapacitoras specifiedinTable24-12onpage1436." + }, + { + "number": "J10", + "name": "PP0/M0PWM0/T4CCP0", + "type": "I/O", + "description": "GPIOportPbit0. MotionControlModule0PWM0.Thissignaliscontrolledby Module0PWMGenerator0. 16/32-BitTimer4Capture/Compare/PWM0." + }, + { + "number": "J11", + "name": "PP3/M0PWM3/T5CCP1", + "type": "I/O", + "description": "GPIOportPbit3. MotionControlModule0PWM3.Thissignaliscontrolledby Module0PWMGenerator1. 16/32-BitTimer5Capture/Compare/PWM1." + }, + { + "number": "J12", + "name": "PP4/M0PWM4/WT0CCP0", + "type": "I/O", + "description": "GPIOportPbit4. MotionControlModule0PWM4.Thissignaliscontrolledby Module0PWMGenerator2. 32/64-BitWideTimer0Capture/Compare/PWM0." + }, + { + "number": "J13", + "name": "VDDC", + "type": "-", + "description": "Positivesupplyformostofthelogicfunction,includingthe processorcoreandmostperipherals.Thevoltageonthispinis 1.2Vandissuppliedbytheon-chipLDO.TheVDDCpinsshould onlybeconnectedtoeachotherandanexternalcapacitoras specifiedinTable24-12onpage1436." + }, + { + "number": "K1", + "name": "PH4/M0PWM4/PhA0/SSI2Clk/WT3CCP0", + "type": "I/O", + "description": "GPIOportHbit4. MotionControlModule0PWM4.Thissignaliscontrolledby Module0PWMGenerator2. QEImodule0phaseA. SSImodule2clock. 32/64-BitWideTimer3Capture/Compare/PWM0." + }, + { + "number": "K2", + "name": "PH3/M0FAULT3/M0PWM3/SSI3Tx/WT5CCP1", + "type": "I/O", + "description": "GPIOportHbit3. MotionControlModule0PWMFault3. MotionControlModule0PWM3.Thissignaliscontrolledby Module0PWMGenerator1. SSImodule3transmit. 32/64-BitWideTimer5Capture/Compare/PWM1." + }, + { + "number": "K3", + "name": "PH2/M0FAULT2/M0PWM2/SSI3Rx/WT5CCP0", + "type": "I/O", + "description": "GPIOportHbit2. MotionControlModule0PWMFault2. MotionControlModule0PWM2.Thissignaliscontrolledby Module0PWMGenerator1. SSImodule3receive. 32/64-BitWideTimer5Capture/Compare/PWM0." + }, + { + "number": "K4", + "name": "PN2/M0PWM6/WT2CCP0", + "type": "I/O", + "description": "GPIOportNbit2. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer2Capture/Compare/PWM0." + }, + { + "number": "K5", + "name": "PA1/CAN1Tx/U0Tx", + "type": "I/O", + "description": "GPIOportAbit1. CANmodule1transmit. UARTmodule0transmit." + }, + { + "number": "K6", + "name": "PP2/M0PWM2/T5CCP0", + "type": "I/O", + "description": "GPIOportPbit2. MotionControlModule0PWM2.Thissignaliscontrolledby Module0PWMGenerator1. 16/32-BitTimer5Capture/Compare/PWM0." + }, + { + "number": "K7", + "name": "PP5/M0PWM5/WT0CCP1", + "type": "I/O", + "description": "GPIOportPbit5. MotionControlModule0PWM5.Thissignaliscontrolledby Module0PWMGenerator2. 32/64-BitWideTimer0Capture/Compare/PWM1." + }, + { + "number": "K8", + "name": "PF7/I2C2SDA/M1FAULT0/T3CCP1", + "type": "I/O", + "description": "GPIOportFbit7. I2Cmodule2data. MotionControlModule1PWMFault0. 16/32-BitTimer3Capture/Compare/PWM1." + }, + { + "number": "K9", + "name": "GND", + "type": "-", + "description": "GroundreferenceforlogicandI/Opins." + }, + { + "number": "K10", + "name": "PF4/IDX0/M0FAULT2/M1FAULT0/T2CCP0/TRD3/U1DTR/USB0EPEN", + "type": "I/O", + "description": "GPIOportFbit4. QEImodule0index. MotionControlModule0PWMFault2. MotionControlModule1PWMFault0. 16/32-BitTimer2Capture/Compare/PWM0. Tracedata3. UARTmodule1DataTerminalReadymodemstatusinputsignal. OptionallyusedinHostmodetocontrolanexternalpowersource tosupplypowertotheUSBbus." + }, + { + "number": "K11", + "name": "XOSC0", + "type": "I", + "description": "Hibernationmoduleoscillatorcrystalinputoranexternalclock referenceinput.Notethatthisiseithera32.768-kHzcrystalora 32.768-kHzoscillatorfortheHibernationmoduleRTC." + }, + { + "number": "K12", + "name": "XOSC1", + "type": "O", + "description": "Hibernationmoduleoscillatorcrystaloutput.Leaveunconnected whenusingasingle-endedclocksource." + }, + { + "number": "K13", + "name": "VBAT", + "type": "-", + "description": "PowersourcefortheHibernationmodule.Itisnormallyconnected tothepositiveterminalofabatteryandservesasthebattery backup/Hibernationmodulepower-sourcesupply." + }, + { + "number": "L1", + "name": "PH1/IDX0/M0FAULT1/M0PWM1/SSI3Fss/WT2CCP1", + "type": "I/O", + "description": "GPIOportHbit1. QEImodule0index. MotionControlModule0PWMFault1. MotionControlModule0PWM1.Thissignaliscontrolledby Module0PWMGenerator0. SSImodule3framesignal. 32/64-BitWideTimer2Capture/Compare/PWM1." + }, + { + "number": "L2", + "name": "PH0/M0FAULT0/M0PWM0/SSI3Clk/WT2CCP0", + "type": "I/O", + "description": "GPIOportHbit0. MotionControlModule0PWMFault0. MotionControlModule0PWM0.Thissignaliscontrolledby Module0PWMGenerator0. SSImodule3clock. 32/64-BitWideTimer2Capture/Compare/PWM0." + }, + { + "number": "L3", + "name": "PA0/CAN1Rx/U0Rx", + "type": "I/O", + "description": "GPIOportAbit0. CANmodule1receive. UARTmodule0receive." + }, + { + "number": "L4", + "name": "PA4/SSI0Rx", + "type": "I/O", + "description": "GPIOportAbit4. SSImodule0receive" + }, + { + "number": "L5", + "name": "PA7/I2C1SDA/M1PWM3", + "type": "I/O", + "description": "GPIOportAbit7. I2Cmodule1data. MotionControlModule1PWM3.Thissignaliscontrolledby Module1PWMGenerator1." + }, + { + "number": "L6", + "name": "PP7/M0PWM7/WT1CCP1", + "type": "I/O", + "description": "GPIOportPbit7. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer1Capture/Compare/PWM1." + }, + { + "number": "L7", + "name": "PQ5/M1PWM5/WT4CCP1", + "type": "I/O", + "description": "GPIOportQbit5. MotionControlModule1PWM5.Thissignaliscontrolledby Module1PWMGenerator2. 32/64-BitWideTimer4Capture/Compare/PWM1." + }, + { + "number": "L8", + "name": "PG3/I2C4SDA/M0FAULT2/M1PWM1/PhA1/T5CCP1", + "type": "I/O", + "description": "GPIOportGbit3. I2Cmodule4data. MotionControlModule0PWMFault2. MotionControlModule1PWM1.Thissignaliscontrolledby Module1PWMGenerator0. QEImodule1phaseA. 16/32-BitTimer5Capture/Compare/PWM1." + }, + { + "number": "L9", + "name": "PG2/I2C4SCL/M0FAULT1/M1PWM0/T5CCP0", + "type": "I/O", + "description": "GPIOportGbit2. I2Cmodule4clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWMFault1. MotionControlModule1PWM0.Thissignaliscontrolledby Module1PWMGenerator0. 16/32-BitTimer5Capture/Compare/PWM0." + }, + { + "number": "L10", + "name": "PF0/C0o/CAN0Rx/M1PWM4/NMI/PhA0/SSI1Rx/T0CCP0/TRD2/U1RTS", + "type": "I/O", + "description": "GPIOportFbit0. Analogcomparator0output. CANmodule0receive. MotionControlModule1PWM4.Thissignaliscontrolledby Module1PWMGenerator2. Non-maskableinterrupt. QEImodule0phaseA. SSImodule1receive. 16/32-BitTimer0Capture/Compare/PWM0. Tracedata2. UARTmodule1RequesttoSendmodemflowcontroloutputline." + }, + { + "number": "L11", + "name": "PN7/M1PWM7/WT4CCP1", + "type": "I/O", + "description": "GPIOportNbit7. MotionControlModule1PWM7.Thissignaliscontrolledby Module1PWMGenerator3. 32/64-BitWideTimer4Capture/Compare/PWM1." + }, + { + "number": "L12", + "name": "PN4/M1PWM4/WT3CCP0", + "type": "I/O", + "description": "GPIOportNbit4. MotionControlModule1PWM4.Thissignaliscontrolledby Module1PWMGenerator2. 32/64-BitWideTimer3Capture/Compare/PWM0." + }, + { + "number": "L13", + "name": "HIB", + "type": "O", + "description": "AnoutputthatindicatestheprocessorisinHibernatemode." + }, + { + "number": "M1", + "name": "PC7/C0-/U3Tx/USB0PFLT/WT1CCP1", + "type": "I/O", + "description": "GPIOportCbit7. Analogcomparator0negativeinput. UARTmodule3transmit. OptionallyusedinHostmodebyanexternalpowersourceto indicateanerrorstatebythatpowersource. 32/64-BitWideTimer1Capture/Compare/PWM1." + }, + { + "number": "M2", + "name": "PC5/C1+/M0PWM7/PhA1/U1CTS/U1Tx/U4Tx/WT0CCP1", + "type": "I/O", + "description": "GPIOportCbit5. Analogcomparator1positiveinput. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. QEImodule1phaseA. UARTmodule1ClearToSendmodemflowcontrolinputsignal. UARTmodule1transmit. UARTmodule4transmit. 32/64-BitWideTimer0Capture/Compare/PWM1." + }, + { + "number": "M3", + "name": "PC4/C1-/IDX1/M0PWM6/U1RTS/U1Rx/U4Rx/WT0CCP0", + "type": "I/O", + "description": "GPIOportCbit4. Analogcomparator1negativeinput. QEImodule1index. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. UARTmodule1RequesttoSendmodemflowcontroloutputline. UARTmodule1receive. UARTmodule4receive. 32/64-BitWideTimer0Capture/Compare/PWM0." + }, + { + "number": "M4", + "name": "PA5/SSI0Tx", + "type": "I/O", + "description": "GPIOportAbit5. SSImodule0transmit" + }, + { + "number": "M5", + "name": "PG7/I2C5SDA/IDX1/M0PWM7/WT1CCP1", + "type": "I/O", + "description": "GPIOportGbit7. I2Cmodule5data. QEImodule1index. MotionControlModule0PWM7.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer1Capture/Compare/PWM1." + }, + { + "number": "M6", + "name": "PQ3/M1PWM3/WT3CCP1", + "type": "I/O", + "description": "GPIOportQbit3. MotionControlModule1PWM3.Thissignaliscontrolledby Module1PWMGenerator1. 32/64-BitWideTimer3Capture/Compare/PWM1." + }, + { + "number": "M7", + "name": "PQ6/M1PWM6/WT5CCP0", + "type": "I/O", + "description": "GPIOportQbit6. MotionControlModule1PWM6.Thissignaliscontrolledby Module1PWMGenerator3. 32/64-BitWideTimer5Capture/Compare/PWM0." + }, + { + "number": "M8", + "name": "PG4/I2C1SCL/M0PWM4/M1PWM2/PhB1/U2Rx/USB0EPEN/WT0CCP0", + "type": "I/O", + "description": "GPIOportGbit4. I2Cmodule1clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWM4.Thissignaliscontrolledby Module0PWMGenerator2. MotionControlModule1PWM2.Thissignaliscontrolledby Module1PWMGenerator1. QEImodule1phaseB. UARTmodule2receive. OptionallyusedinHostmodetocontrolanexternalpowersource tosupplypowertotheUSBbus. 32/64-BitWideTimer0Capture/Compare/PWM0." + }, + { + "number": "M9", + "name": "PG1/I2C3SDA/M1FAULT2/PhB1/T4CCP1", + "type": "I/O", + "description": "GPIOportGbit1. I2Cmodule3data. MotionControlModule1PWMFault2. QEImodule1phaseB. 16/32-BitTimer4Capture/Compare/PWM1." + }, + { + "number": "M10", + "name": "PF5/M0FAULT3/T2CCP1/USB0PFLT", + "type": "I/O", + "description": "GPIOportFbit5. MotionControlModule0PWMFault3. 16/32-BitTimer2Capture/Compare/PWM1. OptionallyusedinHostmodebyanexternalpowersourceto indicateanerrorstatebythatpowersource." + }, + { + "number": "M11", + "name": "PF3/CAN0Tx/M0FAULT1/M1PWM7/SSI1Fss/T1CCP1/TRCLK/U1DSR", + "type": "I/O", + "description": "GPIOportFbit3. CANmodule0transmit. MotionControlModule0PWMFault1. MotionControlModule1PWM7.Thissignaliscontrolledby Module1PWMGenerator3. SSImodule1framesignal. 16/32-BitTimer1Capture/Compare/PWM1. Traceclock. UARTmodule1DataSetReadymodemoutputcontrolline." + }, + { + "number": "M12", + "name": "PN5/M1PWM5/WT3CCP1", + "type": "I/O", + "description": "GPIOportNbit5. MotionControlModule1PWM5.Thissignaliscontrolledby Module1PWMGenerator2. 32/64-BitWideTimer3Capture/Compare/PWM1." + }, + { + "number": "M13", + "name": "WAKE", + "type": "I", + "description": "AnexternalinputthatbringstheprocessoroutofHibernatemode whenasserted." + }, + { + "number": "N1", + "name": "PC6/C0+/PhB1/U3Rx/USB0EPEN/WT1CCP0", + "type": "I/O", + "description": "GPIOportCbit6. Analogcomparator0positiveinput. QEImodule1phaseB. UARTmodule3receive. OptionallyusedinHostmodetocontrolanexternalpowersource tosupplypowertotheUSBbus. 32/64-BitWideTimer1Capture/Compare/PWM0." + }, + { + "number": "N2", + "name": "PA2/SSI0Clk", + "type": "I/O", + "description": "GPIOportAbit2. SSImodule0clock" + }, + { + "number": "N3", + "name": "PA3/SSI0Fss", + "type": "I/O", + "description": "GPIOportAbit3. SSImodule0framesignal" + }, + { + "number": "N4", + "name": "PA6/I2C1SCL/M1PWM2", + "type": "I/O", + "description": "GPIOportAbit6. I2Cmodule1clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule1PWM2.Thissignaliscontrolledby Module1PWMGenerator1." + }, + { + "number": "N5", + "name": "PG6/I2C5SCL/M0PWM6/WT1CCP0", + "type": "I/O", + "description": "GPIOportGbit6. I2Cmodule5clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule0PWM6.Thissignaliscontrolledby Module0PWMGenerator3. 32/64-BitWideTimer1Capture/Compare/PWM0." + }, + { + "number": "N6", + "name": "PQ4/M1PWM4/WT4CCP0", + "type": "I/O", + "description": "GPIOportQbit4. MotionControlModule1PWM4.Thissignaliscontrolledby Module1PWMGenerator2. 32/64-BitWideTimer4Capture/Compare/PWM0." + }, + { + "number": "N7", + "name": "PQ7/M1PWM7/WT5CCP1", + "type": "I/O", + "description": "GPIOportQbit7. MotionControlModule1PWM7.Thissignaliscontrolledby Module1PWMGenerator3. 32/64-BitWideTimer5Capture/Compare/PWM1." + }, + { + "number": "N8", + "name": "PG5/I2C1SDA/IDX1/M0PWM5/M1PWM3/U2Tx/USB0PFLT/WT0CCP1", + "type": "I/O", + "description": "GPIOportGbit5. I2Cmodule1data. QEImodule1index. MotionControlModule0PWM5.Thissignaliscontrolledby Module0PWMGenerator2. MotionControlModule1PWM3.Thissignaliscontrolledby Module1PWMGenerator1. UARTmodule2transmit. OptionallyusedinHostmodebyanexternalpowersourceto indicateanerrorstatebythatpowersource. 32/64-BitWideTimer0Capture/Compare/PWM1." + }, + { + "number": "N9", + "name": "PG0/I2C3SCL/M1FAULT1/PhA1/T4CCP0", + "type": "I/O", + "description": "GPIOportGbit0. I2Cmodule3clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. MotionControlModule1PWMFault1. QEImodule1phaseA. 16/32-BitTimer4Capture/Compare/PWM0." + }, + { + "number": "N10", + "name": "PF6/I2C2SCL/T3CCP0", + "type": "I/O", + "description": "GPIOportFbit6. I2Cmodule2clock.Notethatthissignalhasanactivepull-up.The correspondingportpinshouldnotbeconfiguredasopendrain. 16/32-BitTimer3Capture/Compare/PWM0." + }, + { + "number": "N11", + "name": "PF1/C1o/M1PWM5/PhB0/SSI1Tx/T0CCP1/TRD1/U1CTS", + "type": "I/O", + "description": "GPIOportFbit1. Analogcomparator1output. MotionControlModule1PWM5.Thissignaliscontrolledby Module1PWMGenerator2. QEImodule0phaseB. SSImodule1transmit. 16/32-BitTimer0Capture/Compare/PWM1. Tracedata1. UARTmodule1ClearToSendmodemflowcontrolinputsignal." + }, + { + "number": "N12", + "name": "PF2/C2o/M0FAULT0/M1PWM6/SSI1Clk/T1CCP0/TRD0/U1DCD", + "type": "I/O", + "description": "GPIOportFbit2. Analogcomparator2output. MotionControlModule0PWMFault0. MotionControlModule1PWM6.Thissignaliscontrolledby Module1PWMGenerator3. SSImodule1clock. 16/32-BitTimer1Capture/Compare/PWM0. Tracedata0. UARTmodule1DataCarrierDetectmodemstatusinputsignal." + }, + { + "number": "N13", + "name": "PN6/M1PWM6/WT4CCP0", + "type": "I/O", + "description": "GPIOportNbit6. MotionControlModule1PWM6.Thissignaliscontrolledby Module1PWMGenerator3. 32/64-BitWideTimer4Capture/Compare/PWM0." + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/TM4C123GH6ZXR", + "pdfPageNumbers": [ + 1369, 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, + 1381, 1382, 1383, 1384, 1385 + ], + "pdfParser": "pdfplumber-structured-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for TM4C123GH6ZXR has neither a Pin/Terminal Functions section nor a ZXR package pin-map link." + }, + "TMP107": { + "family": "TMP107", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TMP107BIDR", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TMP107\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TMP107BIDR\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.602Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMP107/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMP107/datasheet/pin-configuration-and-functions-sbos7064265", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "1", + "name": "V+", + "type": "—", + "description": "Supply voltage, 1.7 V to 5.5 V" + }, + { + "number": "2", + "name": "R1", + "type": "I", + "description": "Built-in pullup resistor for ALERT1; float or connect to V+" + }, + { + "number": "3", + "name": "I/O1", + "type": "I/O", + "description": "SMAART wire input, output 1" + }, + { + "number": "4", + "name": "ALERT1", + "type": "O", + "description": "Over- and undertemperature alert. Open-drain output; internally connected to pullup resistor R1." + }, + { + "number": "5", + "name": "GND", + "type": "—", + "description": "Ground" + }, + { + "number": "6", + "name": "ALERT2", + "type": "O", + "description": "Over- and undertemperature alert. Open-drain output; internally connected to pullup resistor R2." + }, + { + "number": "7", + "name": "I/O2", + "type": "I/O", + "description": "SMAART wire input, output 2" + }, + { + "number": "8", + "name": "R2", + "type": "I", + "description": "Built-in pullup resistor for ALERT2; float or connect to V+" + } + ], + "warnings": [] + }, + "TMP118": { + "family": "TMP118", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TMP118MAIYMSR", + "packageDescription": "PICOSTAR-4", + "packageCode": "YMS", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TMP118MAIYMSR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TMP118\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP118MAIYMSR\",\"packageDescription\":\"PICOSTAR-4\",\"packageCode\":\"YMS\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP118MAIYMSR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.612Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMP118/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMP118/datasheet/GUID-5A906A9B-6526-4335-B244-7F52943AB666", + "packageColumn": "PIN / PICOSTAR-4", + "tableClass": "table frame-all", + "pins": [ + { + "number": "A1", + "name": "VDD", + "type": "I", + "description": "Supply voltage" + }, + { + "number": "B1", + "name": "SDA", + "type": "I/O", + "description": "Serial data input and open-drain output. Requires a pullup resistor." + }, + { + "number": "A2", + "name": "GND", + "type": "-", + "description": "Ground" + }, + { + "number": "B2", + "name": "SCL", + "type": "I", + "description": "Serial Clock" + } + ], + "warnings": [] + }, + "TMP119": { + "family": "TMP119", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TMP119AIYBGR", + "packageDescription": "DSBGA-6", + "packageCode": "YBG", + "expectedPinCount": 6, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TMP119AIYBGR.circuit.tsx", + "pinLabelCount": 6, + "coordinateLabelCount": 6, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 6, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TMP119\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP119AIYBGR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YBG\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP119AIYBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.775Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMP119/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMP119/datasheet/GUID-15CBFB91-F2B2-40FB-973E-9CFE2226E761", + "packageColumn": "PIN / DSBGA", + "tableClass": "table frame-all", + "pins": [ + { + "number": "C1", + "name": "ADD0", + "type": "I", + "description": "Address select. Connect to GND, V+, SDA, or SCL." + }, + { + "number": "C2", + "name": "ALERT", + "type": "O", + "description": "Overtemperature alert or data-ready signal. This open-drain output requires a pullup resistor if used." + }, + { + "number": "B2", + "name": "GND", + "type": "—", + "description": "Ground" + }, + { + "number": "A2", + "name": "SCL", + "type": "I", + "description": "Serial clock" + }, + { + "number": "A1", + "name": "SDA", + "type": "I/O", + "description": "Serial data input and open-drain output. Requires a pullup resistor." + }, + { + "number": "B1", + "name": "V+", + "type": "I", + "description": "Supply voltage" + } + ], + "warnings": [] + }, + "TMS320F280041C-Q1": { + "family": "TMS320F280041C-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "F280041CPZQR", + "packageCode": "PZ", + "expectedPinCount": 100, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TMS320F280041C-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"F280041CPZQR\",\"packageCode\":\"PZ\",\"expectedPinCount\":100,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:14.819Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMS320F280041C-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMS320F280041C-Q1/datasheet/GUID-55A965F5-430B-4C68-AD9B-80240BA57899", + "packageColumn": "100 PZ", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "23", + "name": "A0", + "type": "I", + "description": "ADC-A Input 0" + }, + { + "number": "22", + "name": "A1", + "type": "I", + "description": "ADC-A Input 1" + }, + { + "number": "40", + "name": "A10", + "type": "I", + "description": "ADC-A Input 10" + }, + { + "number": "9", + "name": "A2", + "type": "I", + "description": "ADC-A Input 2" + }, + { + "number": "10", + "name": "A3", + "type": "I", + "description": "ADC-A Input 3" + }, + { + "number": "36", + "name": "A4", + "type": "I", + "description": "ADC-A Input 4" + }, + { + "number": "35", + "name": "A5", + "type": "I", + "description": "ADC-A Input 5" + }, + { + "number": "6", + "name": "A6", + "type": "I", + "description": "ADC-A Input 6" + }, + { + "number": "37", + "name": "A8", + "type": "I", + "description": "ADC-A Input 8" + }, + { + "number": "38", + "name": "A9", + "type": "I", + "description": "ADC-A Input 9" + }, + { + "number": "41", + "name": "B0", + "type": "I", + "description": "ADC-B Input 0" + }, + { + "number": "7", + "name": "B2", + "type": "I", + "description": "ADC-B Input 2" + }, + { + "number": "8", + "name": "B3", + "type": "I", + "description": "ADC-B Input 3" + }, + { + "number": "39", + "name": "B4", + "type": "I", + "description": "ADC-B Input 4" + }, + { + "number": "19", + "name": "C0", + "type": "I", + "description": "ADC-C Input 0" + }, + { + "number": "29", + "name": "C1", + "type": "I", + "description": "ADC-C Input 1" + }, + { + "number": "44", + "name": "C14", + "type": "I", + "description": "ADC-C Input 14" + }, + { + "number": "21", + "name": "C2", + "type": "I", + "description": "ADC-C Input 2" + }, + { + "number": "31", + "name": "C3", + "type": "I", + "description": "ADC-C Input 3" + }, + { + "number": "17", + "name": "C4", + "type": "I", + "description": "ADC-C Input 4" + }, + { + "number": "28", + "name": "C5", + "type": "I", + "description": "ADC-C Input 5" + }, + { + "number": "14", + "name": "PGA1_GND", + "type": "I", + "description": "PGA-1 Ground" + }, + { + "number": "18", + "name": "PGA1_IN", + "type": "I", + "description": "PGA-1 Input" + }, + { + "number": "32", + "name": "PGA2_GND", + "type": "I", + "description": "PGA-2 Ground" + }, + { + "number": "30", + "name": "PGA2_IN", + "type": "I", + "description": "PGA-2 Input" + }, + { + "number": "15", + "name": "PGA3_GND", + "type": "I", + "description": "PGA-3 Ground" + }, + { + "number": "20", + "name": "PGA3_IN", + "type": "I", + "description": "PGA-3 Input" + }, + { + "number": "13", + "name": "PGA5_GND", + "type": "I", + "description": "PGA-5 Ground" + }, + { + "number": "16", + "name": "PGA5_IN", + "type": "I", + "description": "PGA-5 Input" + }, + { + "number": "42", + "name": "PGA7_GND", + "type": "I", + "description": "PGA-7 Ground" + }, + { + "number": "43", + "name": "PGA7_IN", + "type": "I", + "description": "PGA-7 Input" + }, + { + "number": "25", + "name": "VREFHIA", + "type": "I/O", + "description": "ADC-A High Reference. In external reference mode, externally drive the high reference voltage onto this pin. In internal reference mode, a voltage is driven onto this pin by the device. In either mode, place at least a 2.2-µF capacitor on this pin. This capacitor should be placed as close to the device as possible between the VREFHIA and VREFLOA pins. Do not load this pin externally in either internal or external reference mode." + }, + { + "number": "24", + "name": "VREFHIB", + "type": "I/O", + "description": "ADC-B High Reference. In external reference mode, externally drive the high reference voltage onto this pin. In internal reference mode, a voltage is driven onto this pin by the device. In either mode, place at least a 2.2-µF capacitor on this pin. This capacitor should be placed as close to the device as possible between the VREFHIB and VREFLOB pins. Do not load this pin externally in either internal or external reference mode." + }, + { + "number": "27", + "name": "VREFLOA", + "type": "I", + "description": "ADC-A Low Reference" + }, + { + "number": "26", + "name": "VREFLOB", + "type": "I", + "description": "ADC-B Low Reference" + }, + { + "number": "79", + "name": "GPIO0", + "type": "I/O", + "description": "General-Purpose Input Output 0" + }, + { + "number": "78", + "name": "GPIO1", + "type": "I/O", + "description": "General-Purpose Input Output 1" + }, + { + "number": "77", + "name": "GPIO2", + "type": "I/O", + "description": "General-Purpose Input Output 2" + }, + { + "number": "76", + "name": "GPIO3", + "type": "I/O", + "description": "General-Purpose Input Output 3" + }, + { + "number": "75", + "name": "GPIO4", + "type": "I/O", + "description": "General-Purpose Input Output 4" + }, + { + "number": "89", + "name": "GPIO5", + "type": "I/O", + "description": "General-Purpose Input Output 5" + }, + { + "number": "97", + "name": "GPIO6", + "type": "I/O", + "description": "General-Purpose Input Output 6" + }, + { + "number": "84", + "name": "GPIO7", + "type": "I/O", + "description": "General-Purpose Input Output 7" + }, + { + "number": "74", + "name": "GPIO8", + "type": "I/O", + "description": "General-Purpose Input Output 8" + }, + { + "number": "90", + "name": "GPIO9", + "type": "I/O", + "description": "General-Purpose Input Output 9" + }, + { + "number": "93", + "name": "GPIO10", + "type": "I/O", + "description": "General-Purpose Input Output 10" + }, + { + "number": "52", + "name": "GPIO11", + "type": "I/O", + "description": "General-Purpose Input Output 11" + }, + { + "number": "51", + "name": "GPIO12", + "type": "I/O", + "description": "General-Purpose Input Output 12" + }, + { + "number": "50", + "name": "GPIO13", + "type": "I/O", + "description": "General-Purpose Input Output 13" + }, + { + "number": "96", + "name": "GPIO14", + "type": "I/O", + "description": "General-Purpose Input Output 14" + }, + { + "number": "95", + "name": "GPIO15", + "type": "I/O", + "description": "General-Purpose Input Output 15" + }, + { + "number": "54", + "name": "GPIO16", + "type": "I/O", + "description": "General-Purpose Input Output 16" + }, + { + "number": "55", + "name": "GPIO17", + "type": "I/O", + "description": "General-Purpose Input Output 17" + }, + { + "number": "68", + "name": "GPIO18_X2", + "type": "I/O", + "description": "General-Purpose Input Output 18. This pin and its digital mux options can only be used when the system is clocked by INTOSC and X1 has an external pulldown resistor (recommended 1 kΩ)." + }, + { + "number": "83", + "name": "GPIO22_VFBSW", + "type": "I/O", + "description": "General-Purpose Input Output 22. This pin is configured for DC-DC mode by default. If the internal DC-DC regulator is not used, this can be configured as General-Purpose Input Output 22 by disabling DC-DC(DCDCCTL.DCDCEN = 0) and clearing their bits in GPAAMSEL register." + }, + { + "number": "81", + "name": "GPIO23_VSW", + "type": "I/O", + "description": "General-Purpose Input Output 23. This pin is configured for DC-DC mode by default. If the internal DC-DC regulator is not used, this can be configured as General-Purpose Input Output 23 by disabling DC-DC(DCDCCTL.DCDCEN = 0) and clearing their bits in GPAAMSEL register. This pin has an internal capacitance of approximately 100 pF. TI Recommends using an alternate GPIO, or using this pin only for applications which do not require a fast switching response." + }, + { + "number": "56", + "name": "GPIO24", + "type": "I/O", + "description": "General-Purpose Input Output 24" + }, + { + "number": "57", + "name": "GPIO25", + "type": "I/O", + "description": "General-Purpose Input Output 25" + }, + { + "number": "58", + "name": "GPIO26", + "type": "I/O", + "description": "General-Purpose Input Output 26" + }, + { + "number": "59", + "name": "GPIO27", + "type": "I/O", + "description": "General-Purpose Input Output 27" + }, + { + "number": "1", + "name": "GPIO28", + "type": "I/O", + "description": "General-Purpose Input Output 28" + }, + { + "number": "100", + "name": "GPIO29", + "type": "I/O", + "description": "General-Purpose Input Output 29" + }, + { + "number": "98", + "name": "GPIO30", + "type": "I/O", + "description": "General-Purpose Input Output 30" + }, + { + "number": "99", + "name": "GPIO31", + "type": "I/O", + "description": "General-Purpose Input Output 31" + }, + { + "number": "64", + "name": "GPIO32", + "type": "I/O", + "description": "General-Purpose Input Output 32" + }, + { + "number": "53", + "name": "GPIO33", + "type": "I/O", + "description": "General-Purpose Input Output 33" + }, + { + "number": "94", + "name": "GPIO34", + "type": "I/O", + "description": "General-Purpose Input Output 34" + }, + { + "number": "63", + "name": "GPIO35", + "type": "I/O", + "description": "General-Purpose Input Output 35" + }, + { + "number": "61", + "name": "GPIO37", + "type": "I/O", + "description": "General-Purpose Input Output 37" + }, + { + "number": "91", + "name": "GPIO39", + "type": "I/O", + "description": "General-Purpose Input Output 39" + }, + { + "number": "85", + "name": "GPIO40", + "type": "I/O", + "description": "General-Purpose Input Output 40" + }, + { + "number": "65", + "name": "GPIO56", + "type": "I/O", + "description": "General-Purpose Input Output 56" + }, + { + "number": "66", + "name": "GPIO57", + "type": "I/O", + "description": "General-Purpose Input Output 57" + }, + { + "number": "67", + "name": "GPIO58", + "type": "I/O", + "description": "General-Purpose Input Output 58" + }, + { + "number": "92", + "name": "GPIO59", + "type": "I/O", + "description": "General-Purpose Input Output 59" + }, + { + "number": "49", + "name": "FLT1", + "type": "I/O", + "description": "Flash test pin 1. Reserved for TI. Must be left unconnected." + }, + { + "number": "48", + "name": "FLT2", + "type": "I/O", + "description": "Flash test pin 2. Reserved for TI. Must be left unconnected." + }, + { + "number": "60", + "name": "TCK", + "type": "I", + "description": "JTAG test clock with internal pullup." + }, + { + "number": "62", + "name": "TMS", + "type": "I/O", + "description": "JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked into the TAP controller on the rising edge of TCK. This device does not have a TRSTn pin. An external pullup resistor (recommended 2.2 kΩ) on the TMS pin to VDDIO should be placed on the board to keep JTAG in reset during normal operation." + }, + { + "number": "73", + "name": "VREGENZ", + "type": "I", + "description": "Internal voltage regulator enable with internal pulldown. Tie directly to VSS (low) to enable the internal VREG. Tie directly to VDDIO (high) to use an external supply." + }, + { + "number": "69", + "name": "X1", + "type": "I/O", + "description": "Crystal oscillator input or single-ended clock input. The device initialization software must configure this pin before the crystal oscillator is enabled. To use this oscillator, a quartz crystal circuit must be connected to X1 and X2. This pin can also be used to feed a single-ended 3.3-V level clock. GPIO19 is not supported. Internally GPIO19 is connected to the X1 function, therefore the GPIO19 should be kept in Input Mode with the Pullup disabled to avoid interference with the X1 clock function." + }, + { + "number": "2", + "name": "XRSn", + "type": "I/OD", + "description": "Device Reset (in) and Watchdog Reset (out). During a power-on condition, this pin is driven low by the device. An external circuit may also drive this pin to assert a device reset. This pin is also driven low by the MCU when a watchdog reset occurs. During watchdog reset, the XRSn pin is driven low for the watchdog reset duration of 512 OSCCLK cycles. A resistor with a value from 2.2 kΩ to 10 kΩ should be placed between XRSn and VDDIO. If a capacitor is placed between XRSn and VSS for noise filtering, it should be 100 nF or smaller. These values allow the watchdog to properly drive the XRSn pin to VOL within 512 OSCCLK cycles when the watchdog reset is asserted. The output buffer of this pin is an open-drain with an internal pullup. If this pin is driven by an external device, It should be done using an open-drain device. If this pin is driven by an external device, it should be done using an open-drain device." + }, + { + "number": "4", + "name": "VDD", + "type": "", + "description": "1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. When not using the internal voltage regulator, the exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "46", + "name": "VDD", + "type": "", + "description": "1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. When not using the internal voltage regulator, the exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "71", + "name": "VDD", + "type": "", + "description": "1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. When not using the internal voltage regulator, the exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "87", + "name": "VDD", + "type": "", + "description": "1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. When not using the internal voltage regulator, the exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "11", + "name": "VDDA", + "type": "", + "description": "3.3-V Analog Power Pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "34", + "name": "VDDA", + "type": "", + "description": "3.3-V Analog Power Pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "3", + "name": "VDDIO", + "type": "", + "description": "3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "47", + "name": "VDDIO", + "type": "", + "description": "3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "70", + "name": "VDDIO", + "type": "", + "description": "3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "88", + "name": "VDDIO", + "type": "", + "description": "3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "80", + "name": "VDDIO_SW", + "type": "", + "description": "3.3-V Supply pin for the internal DC-DC regulator. If the internal DC-DC regulator is used, a bulk input capacitance of 20-µF should be placed on this pin. Always tie this pin to the VDDIO pin. A ferrite bead may be used for isolation if desired but VDDIO_SW and VDDIO must be supplied from the same source." + }, + { + "number": "5", + "name": "VSS", + "type": "", + "description": "Digital Ground" + }, + { + "number": "45", + "name": "VSS", + "type": "", + "description": "Digital Ground" + }, + { + "number": "72", + "name": "VSS", + "type": "", + "description": "Digital Ground" + }, + { + "number": "86", + "name": "VSS", + "type": "", + "description": "Digital Ground" + }, + { + "number": "12", + "name": "VSSA", + "type": "", + "description": "Analog Ground" + }, + { + "number": "33", + "name": "VSSA", + "type": "", + "description": "Analog Ground" + }, + { + "number": "82", + "name": "VSS_SW", + "type": "", + "description": "Internal DC-DC regulator ground. Always tie this pin to the VSS pin." + } + ], + "warnings": [ + "Pin 23 appears more than once with conflicting data; kept the first row.", + "Pin 22 appears more than once with conflicting data; kept the first row.", + "Pin 40 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 10 appears more than once with conflicting data; kept the first row.", + "Pin 36 appears more than once with conflicting data; kept the first row.", + "Pin 35 appears more than once with conflicting data; kept the first row.", + "Pin 6 appears more than once with conflicting data; kept the first row.", + "Pin 37 appears more than once with conflicting data; kept the first row.", + "Pin 38 appears more than once with conflicting data; kept the first row.", + "Pin 41 appears more than once with conflicting data; kept the first row.", + "Pin 7 appears more than once with conflicting data; kept the first row.", + "Pin 8 appears more than once with conflicting data; kept the first row.", + "Pin 39 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row.", + "Pin 29 appears more than once with conflicting data; kept the first row.", + "Pin 44 appears more than once with conflicting data; kept the first row.", + "Pin 21 appears more than once with conflicting data; kept the first row.", + "Pin 31 appears more than once with conflicting data; kept the first row.", + "Pin 17 appears more than once with conflicting data; kept the first row.", + "Pin 28 appears more than once with conflicting data; kept the first row.", + "Pin 18 appears more than once with conflicting data; kept the first row.", + "Pin 30 appears more than once with conflicting data; kept the first row.", + "Pin 20 appears more than once with conflicting data; kept the first row.", + "Pin 32 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 43 appears more than once with conflicting data; kept the first row.", + "Pin 24 appears more than once with conflicting data; kept the first row.", + "Pin 26 appears more than once with conflicting data; kept the first row.", + "Pin 79 appears more than once with conflicting data; kept the first row.", + "Pin 78 appears more than once with conflicting data; kept the first row.", + "Pin 77 appears more than once with conflicting data; kept the first row.", + "Pin 76 appears more than once with conflicting data; kept the first row.", + "Pin 75 appears more than once with conflicting data; kept the first row.", + "Pin 89 appears more than once with conflicting data; kept the first row.", + "Pin 97 appears more than once with conflicting data; kept the first row.", + "Pin 84 appears more than once with conflicting data; kept the first row.", + "Pin 74 appears more than once with conflicting data; kept the first row.", + "Pin 90 appears more than once with conflicting data; kept the first row.", + "Pin 93 appears more than once with conflicting data; kept the first row.", + "Pin 52 appears more than once with conflicting data; kept the first row.", + "Pin 51 appears more than once with conflicting data; kept the first row.", + "Pin 50 appears more than once with conflicting data; kept the first row.", + "Pin 96 appears more than once with conflicting data; kept the first row.", + "Pin 95 appears more than once with conflicting data; kept the first row.", + "Pin 54 appears more than once with conflicting data; kept the first row.", + "Pin 55 appears more than once with conflicting data; kept the first row.", + "Pin 68 appears more than once with conflicting data; kept the first row.", + "Pin 83 appears more than once with conflicting data; kept the first row.", + "Pin 81 appears more than once with conflicting data; kept the first row.", + "Pin 56 appears more than once with conflicting data; kept the first row.", + "Pin 57 appears more than once with conflicting data; kept the first row.", + "Pin 58 appears more than once with conflicting data; kept the first row.", + "Pin 59 appears more than once with conflicting data; kept the first row.", + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Pin 100 appears more than once with conflicting data; kept the first row.", + "Pin 98 appears more than once with conflicting data; kept the first row.", + "Pin 99 appears more than once with conflicting data; kept the first row.", + "Pin 64 appears more than once with conflicting data; kept the first row.", + "Pin 53 appears more than once with conflicting data; kept the first row.", + "Pin 94 appears more than once with conflicting data; kept the first row.", + "Pin 63 appears more than once with conflicting data; kept the first row.", + "Pin 61 appears more than once with conflicting data; kept the first row.", + "Pin 91 appears more than once with conflicting data; kept the first row.", + "Pin 85 appears more than once with conflicting data; kept the first row.", + "Pin 65 appears more than once with conflicting data; kept the first row.", + "Pin 66 appears more than once with conflicting data; kept the first row.", + "Pin 67 appears more than once with conflicting data; kept the first row.", + "Pin 92 appears more than once with conflicting data; kept the first row." + ] + }, + "TMS320F28027-Q1": { + "family": "TMS320F28027-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TMS320F28027PTQR", + "packageCode": "PT", + "expectedPinCount": 48, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TMS320F28027-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TMS320F28027PTQR\",\"packageCode\":\"PT\",\"expectedPinCount\":48,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:15.305Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMS320F28027-Q1/datasheet", + "status": "ok", + "warnings": [ + "Recovered 48/48 physical pins from the official TI PDF.", + "Added official PDF supplemental row 19=GPIO34 from page 14: PT Terminal table continuation row: GPIO34 / COMP2OUT = pin 19", + "Added official PDF supplemental row 25=GPIO19 from page 13: PT Terminal table continuation row: GPIO19 / XCLKIN = pin 25", + "Added official PDF supplemental row 32=VDD from page 12: PT Terminal table vertically merged VDD row includes pin 32", + "Added official PDF supplemental row 44=VSS from page 12: PT Terminal table vertically merged VSS row includes pin 44" + ], + "sectionUrl": "https://www.ti.com/lit/gpn/TMS320F28027-Q1#page=10", + "packageColumn": "PT pin-number column", + "tableClass": "official-ti-pdf/name-number-pin-function-table", + "pins": [ + { + "number": "1", + "name": "SCITXDA", + "type": "", + "description": "15 O SCI transmit data" + }, + { + "number": "2", + "name": "TRST", + "type": "", + "description": "16 I NOTE: TRST is an active high test pin and must be maintained low at all times" + }, + { + "number": "3", + "name": "XRS", + "type": "", + "description": "17 I/OD between XRS and VSS for noise filtering, it should be 100 nF or smaller. These" + }, + { + "number": "4", + "name": "ADCINA6", + "type": "", + "description": "18 I ADC Group A, Channel 6 input" + }, + { + "number": "5", + "name": "COMP2A", + "type": "", + "description": "19 I Comparator Input 2A (available in 48-pin device only)" + }, + { + "number": "6", + "name": "ADCINA7", + "type": "", + "description": "- I ADC Group A, Channel 7 input" + }, + { + "number": "7", + "name": "ADCINA3", + "type": "", + "description": "- I ADC Group A, Channel 3 input" + }, + { + "number": "8", + "name": "ADCINA1", + "type": "", + "description": "- I ADC Group A, Channel 1 input" + }, + { + "number": "9", + "name": "COMP1A", + "type": "", + "description": "20 I Comparator Input 1A" + }, + { + "number": "10", + "name": "VREFHI", + "type": "", + "description": "21 I ADC External Reference High - only used when in ADC external reference mode." + }, + { + "number": "11", + "name": "VDDA", + "type": "PWR", + "description": "22 Analog Power Pin. Tie with a 2.2-µF capacitor (typical) close to the pin." + }, + { + "number": "12", + "name": "VSSA", + "type": "GND", + "description": "23 Analog Ground Pin" + }, + { + "number": "13", + "name": "ADCINB1", + "type": "", + "description": "- I ADC Group B, Channel 1 input" + }, + { + "number": "14", + "name": "COMP1B", + "type": "", + "description": "24 I Comparator Input 1B" + }, + { + "number": "15", + "name": "ADCINB3", + "type": "", + "description": "- I ADC Group B, Channel 3 input" + }, + { + "number": "16", + "name": "COMP2B", + "type": "", + "description": "25 I Comparator Input 2B (available in 48-pin device only)" + }, + { + "number": "17", + "name": "ADCINB6", + "type": "", + "description": "26 I ADC Group B, Channel 6 input" + }, + { + "number": "18", + "name": "ADCINB7", + "type": "", + "description": "- I ADC Group B, Channel 7 input" + }, + { + "number": "19", + "name": "GPIO34", + "type": "I/O/Z", + "description": "General-purpose input/output 34" + }, + { + "number": "20", + "name": "TDI", + "type": "", + "description": "28 I JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected" + }, + { + "number": "21", + "name": "TMS", + "type": "", + "description": "29 I JTAG test-mode select (TMS) with internal pullup. This serial control input is" + }, + { + "number": "22", + "name": "TDO", + "type": "", + "description": "30 O/Z JTAG scan out, test data output (TDO). The contents of the selected register" + }, + { + "number": "23", + "name": "XCLKIN", + "type": "", + "description": "31 I External Oscillator Input. The path from this pin to the clock block is not gated by" + }, + { + "number": "24", + "name": "XCLKOUT", + "type": "", + "description": "32 O/Z Output clock derived from SYSCLKOUT. XCLKOUT is either the same frequency," + }, + { + "number": "25", + "name": "GPIO19", + "type": "I/O/Z", + "description": "General-purpose input/output 19" + }, + { + "number": "26", + "name": "SPISOMIA", + "type": "", + "description": "34 I/O SPI-A slave out, master in" + }, + { + "number": "27", + "name": "SPISIMOA", + "type": "", + "description": "35 I/O SPI slave in, master out" + }, + { + "number": "28", + "name": "EPWM1B", + "type": "", + "description": "36 O Enhanced PWM1 Output B" + }, + { + "number": "29", + "name": "EPWM1A", + "type": "", + "description": "37 O Enhanced PWM1 Output A and HRPWM channel" + }, + { + "number": "30", + "name": "TEST", + "type": "", + "description": "38 I/O Test Pin. Reserved for TI. Must be left unconnected." + }, + { + "number": "31", + "name": "SDAA", + "type": "", + "description": "- I/OD I2C data open-drain bidirectional port" + }, + { + "number": "32", + "name": "VDD", + "type": "PWR", + "description": "CPU and logic digital power" + }, + { + "number": "33", + "name": "VSS", + "type": "GND", + "description": "2 Digital Ground Pins" + }, + { + "number": "34", + "name": "VREGENZ", + "type": "", + "description": "3 I (low) to enable the internal 1.8-V VREG. Tie directly to VDDIO (high) to disable the" + }, + { + "number": "35", + "name": "VDDIO", + "type": "", + "description": "4 is enabled. Place a decoupling capacitor on this pin. The exact value should be" + }, + { + "number": "36", + "name": "SCLA", + "type": "", + "description": "- I/OD I2C clock open-drain bidirectional port" + }, + { + "number": "37", + "name": "EPWM2A", + "type": "", + "description": "5 O Enhanced PWM2 Output A and HRPWM channel" + }, + { + "number": "38", + "name": "EPWM2B", + "type": "", + "description": "6 O Enhanced PWM2 Output B" + }, + { + "number": "39", + "name": "EPWM3A", + "type": "", + "description": "7 O Enhanced PWM3 output A and HRPWM channel" + }, + { + "number": "40", + "name": "EPWM3B", + "type": "", + "description": "8 O Enhanced PWM3 output B" + }, + { + "number": "41", + "name": "EPWM4A", + "type": "", + "description": "9 O Enhanced PWM4 output A and HRPWM channel" + }, + { + "number": "42", + "name": "EPWM4B", + "type": "", + "description": "10 O Enhanced PWM4 output B" + }, + { + "number": "43", + "name": "VDD", + "type": "PWR", + "description": "11 capacitor between each VDD pin and ground. Higher value capacitors may be" + }, + { + "number": "44", + "name": "VSS", + "type": "GND", + "description": "Digital ground" + }, + { + "number": "45", + "name": "X1", + "type": "", + "description": "- I ceramic resonator must be connected across X1 and X2. In this case, the XCLKIN" + }, + { + "number": "46", + "name": "X2", + "type": "", + "description": "- O On-chip crystal-oscillator output. A quartz crystal or a ceramic resonator must be" + }, + { + "number": "47", + "name": "TZ1", + "type": "", + "description": "13 I Trip Zone input 1" + }, + { + "number": "48", + "name": "SCIRXDA", + "type": "", + "description": "14 I SCI receive data" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/TMS320F28027-Q1", + "pdfSha256": "b4afb90459893b01707e5e35c03059ddead888b316b69bd42450b47f58435d5a", + "pdfPageNumbers": [10, 11, 12, 13, 14], + "pdfParser": "name-number-pin-function-table", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for TMS320F28027-Q1 has neither a Pin/Terminal Functions section nor a PT package pin-map link." + }, + "TMS320F28377D-Q1": { + "family": "TMS320F28377D-Q1", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TMS320F28377DZWTQ", + "packageDescription": "NFBGA-337", + "packageCode": "ZWT", + "expectedPinCount": 337, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TMS320F28377DZWTQ.circuit.tsx", + "pinLabelCount": 337, + "coordinateLabelCount": 337, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 337, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TMS320F28377D-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28377DZWTQ\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28377DZWTQ.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.316Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMS320F28377D-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMS320F28377D-Q1/datasheet/GUID-8ED68CEA-4064-416E-A5C1-342A9D1A70E8", + "packageColumn": "TERMINAL / ZWT, BALL, NO.", + "tableClass": "table", + "pins": [ + { + "number": "V1", + "name": "VREFHIA", + "type": "I", + "description": "ADC-A high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIA and VREFLOA pins., NOTE: Do not load this pin externally." + }, + { + "number": "W5", + "name": "VREFHIB", + "type": "I", + "description": "ADC-B high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIB and VREFLOB pins., NOTE: Do not load this pin externally." + }, + { + "number": "R1", + "name": "VREFHIC", + "type": "I", + "description": "ADC-C high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIC and VREFLOC pins., NOTE: Do not load this pin externally." + }, + { + "number": "V5", + "name": "VREFHID", + "type": "I", + "description": "ADC-D high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHID and VREFLOD pins., NOTE: Do not load this pin externally." + }, + { + "number": "R2", + "name": "VREFLOA", + "type": "I", + "description": "ADC-A low reference., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. On the PZP package, pin 17 must be connected to VSSA on the system board." + }, + { + "number": "V6", + "name": "VREFLOB", + "type": "I", + "description": "ADC-B low reference" + }, + { + "number": "P2", + "name": "VREFLOC", + "type": "I", + "description": "ADC-C low reference" + }, + { + "number": "W6", + "name": "VREFLOD", + "type": "I", + "description": "ADC-D low reference" + }, + { + "number": "T4", + "name": "ADCIN14", + "type": "I", + "description": "Input 14 to all ADCs. This pin can be used as a general-purpose ADCIN pin or it can be used to calibrate all ADCs together (either single-ended or differential) from an external reference." + }, + { + "number": "U4", + "name": "ADCIN15", + "type": "I", + "description": "Input 15 to all ADCs. This pin can be used as a general-purpose ADCIN pin or it can be used to calibrate all ADCs together (either single-ended or differential) from an external reference." + }, + { + "number": "U1", + "name": "ADCINA0", + "type": "I", + "description": "ADC-A input 0. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "T1", + "name": "ADCINA1", + "type": "I", + "description": "ADC-A input 1. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "U2", + "name": "ADCINA2", + "type": "I", + "description": "ADC-A input 2" + }, + { + "number": "T2", + "name": "ADCINA3", + "type": "I", + "description": "ADC-A input 3" + }, + { + "number": "U3", + "name": "ADCINA4", + "type": "I", + "description": "ADC-A input 4" + }, + { + "number": "T3", + "name": "ADCINA5", + "type": "I", + "description": "ADC-A input 5" + }, + { + "number": "V2", + "name": "ADCINB0", + "type": "I", + "description": "ADC-B input 0. There is a 100-pF capacitor to VSSA on this pin in both ADC input or DAC reference mode which cannot be disabled. If this pin is being used as a reference for the on-chip DACs, place at least a 1-µF capacitor on this pin." + }, + { + "number": "W2", + "name": "ADCINB1", + "type": "I", + "description": "ADC-B input 1. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "V3", + "name": "ADCINB2", + "type": "I", + "description": "ADC-B input 2" + }, + { + "number": "W3", + "name": "ADCINB3", + "type": "I", + "description": "ADC-B input 3" + }, + { + "number": "V4", + "name": "ADCINB4", + "type": "I", + "description": "ADC-B input 4" + }, + { + "number": "W4", + "name": "ADCINB5", + "type": "I", + "description": "ADC-B input 5" + }, + { + "number": "R3", + "name": "ADCINC2", + "type": "I", + "description": "ADC-C input 2" + }, + { + "number": "P3", + "name": "ADCINC3", + "type": "I", + "description": "ADC-C input 3" + }, + { + "number": "R4", + "name": "ADCINC4", + "type": "I", + "description": "ADC-C input 4" + }, + { + "number": "P4", + "name": "ADCINC5", + "type": "I", + "description": "ADC-C input 5" + }, + { + "number": "T5", + "name": "ADCIND0", + "type": "I", + "description": "ADC-D input 0" + }, + { + "number": "U5", + "name": "ADCIND1", + "type": "I", + "description": "ADC-D input 1" + }, + { + "number": "T6", + "name": "ADCIND2", + "type": "I", + "description": "ADC-D input 2" + }, + { + "number": "U6", + "name": "ADCIND3", + "type": "I", + "description": "ADC-D input 3" + }, + { + "number": "T7", + "name": "ADCIND4", + "type": "I", + "description": "ADC-D input 4" + }, + { + "number": "U7", + "name": "ADCIND5", + "type": "I", + "description": "ADC-D input 5" + }, + { + "number": "C8", + "name": "GPIO0", + "type": "I/O", + "description": "General-purpose input/output 0" + }, + { + "number": "D8", + "name": "GPIO1", + "type": "I/O", + "description": "General-purpose input/output 1" + }, + { + "number": "A7", + "name": "GPIO2", + "type": "I/O", + "description": "General-purpose input/output 2" + }, + { + "number": "B7", + "name": "GPIO3", + "type": "I/O", + "description": "General-purpose input/output 3" + }, + { + "number": "C7", + "name": "GPIO4", + "type": "I/O", + "description": "General-purpose input/output 4" + }, + { + "number": "D7", + "name": "GPIO5", + "type": "I/O", + "description": "General-purpose input/output 5" + }, + { + "number": "A6", + "name": "GPIO6", + "type": "I/O", + "description": "General-purpose input/output 6" + }, + { + "number": "B6", + "name": "GPIO7", + "type": "I/O", + "description": "General-purpose input/output 7" + }, + { + "number": "G2", + "name": "GPIO8", + "type": "I/O", + "description": "General-purpose input/output 8" + }, + { + "number": "G3", + "name": "GPIO9", + "type": "I/O", + "description": "General-purpose input/output 9" + }, + { + "number": "B2", + "name": "GPIO10", + "type": "I/O", + "description": "General-purpose input/output 10" + }, + { + "number": "C1", + "name": "GPIO11", + "type": "I/O", + "description": "General-purpose input/output 11" + }, + { + "number": "C2", + "name": "GPIO12", + "type": "I/O", + "description": "General-purpose input/output 12" + }, + { + "number": "D1", + "name": "GPIO13", + "type": "I/O", + "description": "General-purpose input/output 13" + }, + { + "number": "D2", + "name": "GPIO14", + "type": "I/O", + "description": "General-purpose input/output 14" + }, + { + "number": "D3", + "name": "GPIO15", + "type": "I/O", + "description": "General-purpose input/output 15" + }, + { + "number": "E1", + "name": "GPIO16", + "type": "I/O", + "description": "General-purpose input/output 16" + }, + { + "number": "E2", + "name": "GPIO17", + "type": "I/O", + "description": "General-purpose input/output 17" + }, + { + "number": "E3", + "name": "GPIO18", + "type": "I/O", + "description": "General-purpose input/output 18" + }, + { + "number": "E4", + "name": "GPIO19", + "type": "I/O", + "description": "General-purpose input/output 19" + }, + { + "number": "F2", + "name": "GPIO20", + "type": "I/O", + "description": "General-purpose input/output 20" + }, + { + "number": "F3", + "name": "GPIO21", + "type": "I/O", + "description": "General-purpose input/output 21" + }, + { + "number": "J4", + "name": "GPIO22", + "type": "I/O", + "description": "General-purpose input/output 22" + }, + { + "number": "K4", + "name": "GPIO23", + "type": "I/O", + "description": "General-purpose input/output 23" + }, + { + "number": "K3", + "name": "GPIO24", + "type": "I/O", + "description": "General-purpose input/output 24" + }, + { + "number": "K2", + "name": "GPIO25", + "type": "I/O", + "description": "General-purpose input/output 25" + }, + { + "number": "K1", + "name": "GPIO26", + "type": "I/O", + "description": "General-purpose input/output 26" + }, + { + "number": "L1", + "name": "GPIO27", + "type": "I/O", + "description": "General-purpose input/output 27" + }, + { + "number": "V11", + "name": "GPIO28", + "type": "I/O", + "description": "General-purpose input/output 28" + }, + { + "number": "W11", + "name": "GPIO29", + "type": "I/O", + "description": "General-purpose input/output 29" + }, + { + "number": "T11", + "name": "GPIO30", + "type": "I/O", + "description": "General-purpose input/output 30" + }, + { + "number": "U11", + "name": "GPIO31", + "type": "I/O", + "description": "General-purpose input/output 31" + }, + { + "number": "U13", + "name": "GPIO32", + "type": "I/O", + "description": "General-purpose input/output 32" + }, + { + "number": "T13", + "name": "GPIO33", + "type": "I/O", + "description": "General-purpose input/output 33" + }, + { + "number": "U14", + "name": "GPIO34", + "type": "I/O", + "description": "General-purpose input/output 34" + }, + { + "number": "T14", + "name": "GPIO35", + "type": "I/O", + "description": "General-purpose input/output 35" + }, + { + "number": "V16", + "name": "GPIO36", + "type": "I/O", + "description": "General-purpose input/output 36" + }, + { + "number": "U16", + "name": "GPIO37", + "type": "I/O", + "description": "General-purpose input/output 37" + }, + { + "number": "T16", + "name": "GPIO38", + "type": "I/O", + "description": "General-purpose input/output 38" + }, + { + "number": "W17", + "name": "GPIO39", + "type": "I/O", + "description": "General-purpose input/output 39" + }, + { + "number": "V17", + "name": "GPIO40", + "type": "I/O", + "description": "General-purpose input/output 40" + }, + { + "number": "U17", + "name": "GPIO41", + "type": "I/O", + "description": "General-purpose input/output 41. For applications using the Hibernate low-power mode, this pin serves as the GPIOHIBWAKE signal. For details, see the Low Power Modes section of the System Control chapter in the TMS320F2837xD Dual-Core Real-Time Microcontrollers Technical Reference Manual ." + }, + { + "number": "D19", + "name": "GPIO42", + "type": "I/O", + "description": "General-purpose input/output 42" + }, + { + "number": "C19", + "name": "GPIO43", + "type": "I/O", + "description": "General-purpose input/output 43" + }, + { + "number": "K18", + "name": "GPIO44", + "type": "I/O", + "description": "General-purpose input/output 44" + }, + { + "number": "K19", + "name": "GPIO45", + "type": "I/O", + "description": "General-purpose input/output 45" + }, + { + "number": "E19", + "name": "GPIO46", + "type": "I/O", + "description": "General-purpose input/output 46" + }, + { + "number": "E18", + "name": "GPIO47", + "type": "I/O", + "description": "General-purpose input/output 47" + }, + { + "number": "R16", + "name": "GPIO48", + "type": "I/O", + "description": "General-purpose input/output 48" + }, + { + "number": "R17", + "name": "GPIO49", + "type": "I/O", + "description": "General-purpose input/output 49" + }, + { + "number": "R18", + "name": "GPIO50", + "type": "I/O", + "description": "General-purpose input/output 50" + }, + { + "number": "R19", + "name": "GPIO51", + "type": "I/O", + "description": "General-purpose input/output 51" + }, + { + "number": "P16", + "name": "GPIO52", + "type": "I/O", + "description": "General-purpose input/output 52" + }, + { + "number": "P17", + "name": "GPIO53", + "type": "I/O", + "description": "General-purpose input/output 53" + }, + { + "number": "P18", + "name": "GPIO54", + "type": "I/O", + "description": "General-purpose input/output 54" + }, + { + "number": "P19", + "name": "GPIO55", + "type": "I/O", + "description": "General-purpose input/output 55" + }, + { + "number": "N16", + "name": "GPIO56", + "type": "I/O", + "description": "General-purpose input/output 56" + }, + { + "number": "N18", + "name": "GPIO57", + "type": "I/O", + "description": "General-purpose input/output 57" + }, + { + "number": "N17", + "name": "GPIO58", + "type": "I/O", + "description": "General-purpose input/output 58" + }, + { + "number": "M16", + "name": "GPIO59", + "type": "I/O", + "description": "General-purpose input/output 59" + }, + { + "number": "M17", + "name": "GPIO60", + "type": "I/O", + "description": "General-purpose input/output 60" + }, + { + "number": "L16", + "name": "GPIO61", + "type": "I/O", + "description": "General-purpose input/output 61" + }, + { + "number": "J17", + "name": "GPIO62", + "type": "I/O", + "description": "General-purpose input/output 62" + }, + { + "number": "J16", + "name": "GPIO63", + "type": "I/O", + "description": "General-purpose input/output 63" + }, + { + "number": "L17", + "name": "GPIO64", + "type": "I/O", + "description": "General-purpose input/output 64" + }, + { + "number": "K16", + "name": "GPIO65", + "type": "I/O", + "description": "General-purpose input/output 65" + }, + { + "number": "K17", + "name": "GPIO66", + "type": "I/O", + "description": "General-purpose input/output 66" + }, + { + "number": "B19", + "name": "GPIO67", + "type": "I/O", + "description": "General-purpose input/output 67" + }, + { + "number": "C18", + "name": "GPIO68", + "type": "I/O", + "description": "General-purpose input/output 68" + }, + { + "number": "B18", + "name": "GPIO69", + "type": "I/O", + "description": "General-purpose input/output 69" + }, + { + "number": "A17", + "name": "GPIO70", + "type": "I/O", + "description": "General-purpose input/output 70" + }, + { + "number": "B17", + "name": "GPIO71", + "type": "I/O", + "description": "General-purpose input/output 71" + }, + { + "number": "B16", + "name": "GPIO72", + "type": "I/O", + "description": "General-purpose input/output 72. This is the factory default boot mode select pin 1." + }, + { + "number": "A16", + "name": "GPIO73", + "type": "I/O", + "description": "General-purpose input/output 73" + }, + { + "number": "C17", + "name": "GPIO74", + "type": "I/O", + "description": "General-purpose input/output 74" + }, + { + "number": "D16", + "name": "GPIO75", + "type": "I/O", + "description": "General-purpose input/output 75" + }, + { + "number": "C16", + "name": "GPIO76", + "type": "I/O", + "description": "General-purpose input/output 76" + }, + { + "number": "A15", + "name": "GPIO77", + "type": "I/O", + "description": "General-purpose input/output 77" + }, + { + "number": "B15", + "name": "GPIO78", + "type": "I/O", + "description": "General-purpose input/output 78" + }, + { + "number": "C15", + "name": "GPIO79", + "type": "I/O", + "description": "General-purpose input/output 79" + }, + { + "number": "D15", + "name": "GPIO80", + "type": "I/O", + "description": "General-purpose input/output 80" + }, + { + "number": "A14", + "name": "GPIO81", + "type": "I/O", + "description": "General-purpose input/output 81" + }, + { + "number": "B14", + "name": "GPIO82", + "type": "I/O", + "description": "General-purpose input/output 82" + }, + { + "number": "C14", + "name": "GPIO83", + "type": "I/O", + "description": "General-purpose input/output 83" + }, + { + "number": "A11", + "name": "GPIO84", + "type": "I/O", + "description": "General-purpose input/output 84. This is the factory default boot mode select pin 0." + }, + { + "number": "B11", + "name": "GPIO85", + "type": "I/O", + "description": "General-purpose input/output 85" + }, + { + "number": "C11", + "name": "GPIO86", + "type": "I/O", + "description": "General-purpose input/output 86" + }, + { + "number": "D11", + "name": "GPIO87", + "type": "I/O", + "description": "General-purpose input/output 87" + }, + { + "number": "C6", + "name": "GPIO88", + "type": "I/O", + "description": "General-purpose input/output 88" + }, + { + "number": "D6", + "name": "GPIO89", + "type": "I/O", + "description": "General-purpose input/output 89" + }, + { + "number": "A5", + "name": "GPIO90", + "type": "I/O", + "description": "General-purpose input/output 90" + }, + { + "number": "B5", + "name": "GPIO91", + "type": "I/O", + "description": "General-purpose input/output 91" + }, + { + "number": "A4", + "name": "GPIO92", + "type": "I/O", + "description": "General-purpose input/output 92" + }, + { + "number": "B4", + "name": "GPIO93", + "type": "I/O", + "description": "General-purpose input/output 93" + }, + { + "number": "A3", + "name": "GPIO94", + "type": "I/O", + "description": "General-purpose input/output 94" + }, + { + "number": "B3", + "name": "GPIO95", + "type": "I/O", + "description": "General-purpose input/output 95" + }, + { + "number": "C3", + "name": "GPIO96", + "type": "I/O", + "description": "General-purpose input/output 96" + }, + { + "number": "A2", + "name": "GPIO97", + "type": "I/O", + "description": "General-purpose input/output 97" + }, + { + "number": "F1", + "name": "GPIO98", + "type": "I/O", + "description": "General-purpose input/output 98" + }, + { + "number": "G1", + "name": "GPIO99", + "type": "I/O", + "description": "General-purpose input/output 99" + }, + { + "number": "H1", + "name": "GPIO100", + "type": "I/O", + "description": "General-purpose input/output 100" + }, + { + "number": "H2", + "name": "GPIO101", + "type": "I/O", + "description": "General-purpose input/output 101" + }, + { + "number": "H3", + "name": "GPIO102", + "type": "I/O", + "description": "General-purpose input/output 102" + }, + { + "number": "J1", + "name": "GPIO103", + "type": "I/O", + "description": "General-purpose input/output 103" + }, + { + "number": "J2", + "name": "GPIO104", + "type": "I/O", + "description": "General-purpose input/output 104" + }, + { + "number": "J3", + "name": "GPIO105", + "type": "I/O", + "description": "General-purpose input/output 105" + }, + { + "number": "L2", + "name": "GPIO106", + "type": "I/O", + "description": "General-purpose input/output 106" + }, + { + "number": "L3", + "name": "GPIO107", + "type": "I/O", + "description": "General-purpose input/output 107" + }, + { + "number": "L4", + "name": "GPIO108", + "type": "I/O", + "description": "General-purpose input/output 108" + }, + { + "number": "N2", + "name": "GPIO109", + "type": "I/O", + "description": "General-purpose input/output 109" + }, + { + "number": "M2", + "name": "GPIO110", + "type": "I/O", + "description": "General-purpose input/output 110" + }, + { + "number": "M4", + "name": "GPIO111", + "type": "I/O", + "description": "General-purpose input/output 111" + }, + { + "number": "M3", + "name": "GPIO112", + "type": "I/O", + "description": "General-purpose input/output 112" + }, + { + "number": "N4", + "name": "GPIO113", + "type": "I/O", + "description": "General-purpose input/output 113" + }, + { + "number": "N3", + "name": "GPIO114", + "type": "I/O", + "description": "General-purpose input/output 114" + }, + { + "number": "V12", + "name": "GPIO115", + "type": "I/O", + "description": "General-purpose input/output 115" + }, + { + "number": "W10", + "name": "GPIO116", + "type": "I/O", + "description": "General-purpose input/output 116" + }, + { + "number": "U12", + "name": "GPIO117", + "type": "I/O", + "description": "General-purpose input/output 117" + }, + { + "number": "T12", + "name": "GPIO118", + "type": "I/O", + "description": "General-purpose input/output 118" + }, + { + "number": "T15", + "name": "GPIO119", + "type": "I/O", + "description": "General-purpose input/output 119" + }, + { + "number": "U15", + "name": "GPIO120", + "type": "I/O", + "description": "General-purpose input/output 120" + }, + { + "number": "W16", + "name": "GPIO121", + "type": "I/O", + "description": "General-purpose input/output 121" + }, + { + "number": "T8", + "name": "GPIO122", + "type": "I/O", + "description": "General-purpose input/output 122" + }, + { + "number": "U8", + "name": "GPIO123", + "type": "I/O", + "description": "General-purpose input/output 123" + }, + { + "number": "V8", + "name": "GPIO124", + "type": "I/O", + "description": "General-purpose input/output 124" + }, + { + "number": "T9", + "name": "GPIO125", + "type": "I/O", + "description": "General-purpose input/output 125" + }, + { + "number": "U9", + "name": "GPIO126", + "type": "I/O", + "description": "General-purpose input/output 126" + }, + { + "number": "V9", + "name": "GPIO127", + "type": "I/O", + "description": "General-purpose input/output 127" + }, + { + "number": "W9", + "name": "GPIO128", + "type": "I/O", + "description": "General-purpose input/output 128" + }, + { + "number": "T10", + "name": "GPIO129", + "type": "I/O", + "description": "General-purpose input/output 129" + }, + { + "number": "U10", + "name": "GPIO130", + "type": "I/O", + "description": "General-purpose input/output 130" + }, + { + "number": "V10", + "name": "GPIO131", + "type": "I/O", + "description": "General-purpose input/output 131" + }, + { + "number": "W18", + "name": "GPIO132", + "type": "I/O", + "description": "General-purpose input/output 132" + }, + { + "number": "G18", + "name": "GPIO133/AUXCLKIN", + "type": "I/O", + "description": "General-purpose input/output 133. The AUXCLKIN function of this GPIO pin could be used to provide a single-ended 3.3-V level clock signal to the Auxiliary Phase-Locked Loop (AUXPLL), whose output is used for the USB module. The AUXCLKIN clock may also be used for the CAN module." + }, + { + "number": "V18", + "name": "GPIO134", + "type": "I/O", + "description": "General-purpose input/output 134" + }, + { + "number": "U18", + "name": "GPIO135", + "type": "I/O", + "description": "General-purpose input/output 135" + }, + { + "number": "T17", + "name": "GPIO136", + "type": "I/O", + "description": "General-purpose input/output 136" + }, + { + "number": "T18", + "name": "GPIO137", + "type": "I/O", + "description": "General-purpose input/output 137" + }, + { + "number": "T19", + "name": "GPIO138", + "type": "I/O", + "description": "General-purpose input/output 138" + }, + { + "number": "N19", + "name": "GPIO139", + "type": "I/O", + "description": "General-purpose input/output 139" + }, + { + "number": "M19", + "name": "GPIO140", + "type": "I/O", + "description": "General-purpose input/output 140" + }, + { + "number": "M18", + "name": "GPIO141", + "type": "I/O", + "description": "General-purpose input/output 141" + }, + { + "number": "L19", + "name": "GPIO142", + "type": "I/O", + "description": "General-purpose input/output 142" + }, + { + "number": "F18", + "name": "GPIO143", + "type": "I/O", + "description": "General-purpose input/output 143" + }, + { + "number": "F17", + "name": "GPIO144", + "type": "I/O", + "description": "General-purpose input/output 144" + }, + { + "number": "E17", + "name": "GPIO145", + "type": "I/O", + "description": "General-purpose input/output 145" + }, + { + "number": "D18", + "name": "GPIO146", + "type": "I/O", + "description": "General-purpose input/output 146" + }, + { + "number": "D17", + "name": "GPIO147", + "type": "I/O", + "description": "General-purpose input/output 147" + }, + { + "number": "D14", + "name": "GPIO148", + "type": "I/O", + "description": "General-purpose input/output 148" + }, + { + "number": "A13", + "name": "GPIO149", + "type": "I/O", + "description": "General-purpose input/output 149" + }, + { + "number": "B13", + "name": "GPIO150", + "type": "I/O", + "description": "General-purpose input/output 150" + }, + { + "number": "C13", + "name": "GPIO151", + "type": "I/O", + "description": "General-purpose input/output 151" + }, + { + "number": "D13", + "name": "GPIO152", + "type": "I/O", + "description": "General-purpose input/output 152" + }, + { + "number": "A12", + "name": "GPIO153", + "type": "I/O", + "description": "General-purpose input/output 153" + }, + { + "number": "B12", + "name": "GPIO154", + "type": "I/O", + "description": "General-purpose input/output 154" + }, + { + "number": "C12", + "name": "GPIO155", + "type": "I/O", + "description": "General-purpose input/output 155" + }, + { + "number": "D12", + "name": "GPIO156", + "type": "I/O", + "description": "General-purpose input/output 156" + }, + { + "number": "B10", + "name": "GPIO157", + "type": "I/O", + "description": "General-purpose input/output 157" + }, + { + "number": "C10", + "name": "GPIO158", + "type": "I/O", + "description": "General-purpose input/output 158" + }, + { + "number": "D10", + "name": "GPIO159", + "type": "I/O", + "description": "General-purpose input/output 159" + }, + { + "number": "B9", + "name": "GPIO160", + "type": "I/O", + "description": "General-purpose input/output 160" + }, + { + "number": "C9", + "name": "GPIO161", + "type": "I/O", + "description": "General-purpose input/output 161" + }, + { + "number": "D9", + "name": "GPIO162", + "type": "I/O", + "description": "General-purpose input/output 162" + }, + { + "number": "A8", + "name": "GPIO163", + "type": "I/O", + "description": "General-purpose input/output 163" + }, + { + "number": "B8", + "name": "GPIO164", + "type": "I/O", + "description": "General-purpose input/output 164" + }, + { + "number": "C5", + "name": "GPIO165", + "type": "I/O", + "description": "General-purpose input/output 165" + }, + { + "number": "D5", + "name": "GPIO166", + "type": "I/O", + "description": "General-purpose input/output 166" + }, + { + "number": "C4", + "name": "GPIO167", + "type": "I/O", + "description": "General-purpose input/output 167" + }, + { + "number": "D4", + "name": "GPIO168", + "type": "I/O", + "description": "General-purpose input/output 168" + }, + { + "number": "F19", + "name": "XRS", + "type": "I/OD", + "description": "Device Reset (in) and Watchdog Reset (out). The devices have a built-in power-on reset (POR) circuit. During a power-on condition, this pin is driven low by the device. An external circuit may also drive this pin to assert a device reset. This pin is also driven low by the MCU when a watchdog reset or NMI watchdog reset occurs. During watchdog reset, the XRS pin is driven low for the watchdog reset duration of 512 OSCCLK cycles. A resistor with a value from 2.2 kΩ to 10 kΩ should be placed between XRS and VDDIO. If a capacitor is placed between XRS and VSS for noise filtering, it should be 100 nF or smaller. These values will allow the watchdog to properly drive the XRS pin to VOL within 512 OSCCLK cycles when the watchdog reset is asserted. The output buffer of this pin is an open drain with an internal pullup. If this pin is driven by an external device, it should be done using an open-drain device." + }, + { + "number": "G19", + "name": "X1", + "type": "I", + "description": "On-chip crystal-oscillator input. To use this oscillator, a quartz crystal must be connected across X1 and X2. If this pin is not used, it must be tied to GND., This pin can also be used to feed a single-ended 3.3-V level clock. In this case, X2 is a No Connect (NC)." + }, + { + "number": "J19", + "name": "X2", + "type": "O", + "description": "On-chip crystal-oscillator output. A quartz crystal may be connected across X1 and X2. If X2 is not used, it must be left unconnected." + }, + { + "number": "H4", + "name": "NC", + "type": "", + "description": "No connect. BGA ball is electrically open and not connected to the die." + }, + { + "number": "V15", + "name": "TCK", + "type": "I", + "description": "JTAG test clock with internal pullup (see Section 6.6 )" + }, + { + "number": "W13", + "name": "TDI", + "type": "I", + "description": "JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected register (instruction or data) on a rising edge of TCK." + }, + { + "number": "W15", + "name": "TDO", + "type": "O/Z", + "description": "JTAG scan out, test data output (TDO). The contents of the selected register (instruction or data) are shifted out of TDO on the falling edge of TCK." + }, + { + "number": "W14", + "name": "TMS", + "type": "I", + "description": "JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked into the TAP controller on the rising edge of TCK." + }, + { + "number": "V14", + "name": "TRST", + "type": "I", + "description": "JTAG test reset with internal pulldown. TRST, when driven high, gives the scan system control of the operations of the device. If this signal is driven low, the device operates in its functional mode, and the test reset signals are ignored. NOTE: TRST must be maintained low at all times during normal device operation, so an external pulldown resistor is required on this pin for protection against noise spikes. The value of this resistor should be as small as possible, so long as the JTAG debug probe is still able to drive the TRST pin high. A resistor between 2.2-kΩ and 10-kΩ generally offers adequate protection. Since the value of the resistor is application-specific, TI recommends that each target board be validated for proper operation of the debug probe and the application. This pin has an internal 50-ns (nominal) glitch filter." + }, + { + "number": "J18", + "name": "VREGENZ", + "type": "I", + "description": "Internal voltage regulator enable with internal pulldown. The internal VREG is not supported and must be disabled. Connect VREGENZ to VDDIO." + }, + { + "number": "E9", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E11", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F9", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F11", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G14", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G15", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "J14", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "J15", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "K5", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "K6", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P10", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P13", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R10", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R13", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R11", + "name": "VDD3VFL", + "type": "", + "description": "3.3-V Flash power pin. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "R12", + "name": "VDD3VFL", + "type": "", + "description": "3.3-V Flash power pin. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "P6", + "name": "VDDA", + "type": "", + "description": "3.3-V analog power pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "R6", + "name": "VDDA", + "type": "", + "description": "3.3-V analog power pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "A9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "A18", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "B1", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E7", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E10", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E13", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E16", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F4", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F7", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F10", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F13", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F16", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G4", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "L14", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "L15", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M1", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "N14", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "N15", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "V19", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "W8", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H16", + "name": "VDDOSC", + "type": "", + "description": "Power pins for the 3.3-V on-chip crystal oscillator (X1 and X2) and the two zero-pin internal oscillators (INTOSC). Place a 0.1-μF (minimum) decoupling capacitor on each pin." + }, + { + "number": "H17", + "name": "VDDOSC", + "type": "", + "description": "Power pins for the 3.3-V on-chip crystal oscillator (X1 and X2) and the two zero-pin internal oscillators (INTOSC). Place a 0.1-μF (minimum) decoupling capacitor on each pin." + }, + { + "number": "A1", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "A10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "A19", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "G16", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "G17", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L18", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N1", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "W7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "W19", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H18", + "name": "VSSOSC", + "type": "", + "description": "Crystal oscillator (X1 and X2) ground pin. When using an external crystal, do not connect this pin to the board ground. Instead, connect it to the ground reference of the external crystal oscillator circuit., If an external crystal is not used, this pin may be connected to the board ground." + }, + { + "number": "H19", + "name": "VSSOSC", + "type": "", + "description": "Crystal oscillator (X1 and X2) ground pin. When using an external crystal, do not connect this pin to the board ground. Instead, connect it to the ground reference of the external crystal oscillator circuit., If an external crystal is not used, this pin may be connected to the board ground." + }, + { + "number": "P1", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "P5", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "R5", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "V7", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "W1", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "U19", + "name": "ERRORSTS", + "type": "O", + "description": "Error status output. This pin has an internal pulldown." + }, + { + "number": "W12", + "name": "FLT1", + "type": "I/O", + "description": "Flash test pin 1. Reserved for TI. Must be left unconnected." + }, + { + "number": "V13", + "name": "FLT2", + "type": "I/O", + "description": "Flash test pin 2. Reserved for TI. Must be left unconnected." + } + ], + "warnings": [ + "Pin T4 appears more than once with conflicting data; kept the first row.", + "Pin U4 appears more than once with conflicting data; kept the first row.", + "Pin U1 appears more than once with conflicting data; kept the first row.", + "Pin T1 appears more than once with conflicting data; kept the first row.", + "Pin U2 appears more than once with conflicting data; kept the first row.", + "Pin T2 appears more than once with conflicting data; kept the first row.", + "Pin U3 appears more than once with conflicting data; kept the first row.", + "Pin T3 appears more than once with conflicting data; kept the first row.", + "Pin V2 appears more than once with conflicting data; kept the first row.", + "Pin W2 appears more than once with conflicting data; kept the first row.", + "Pin V3 appears more than once with conflicting data; kept the first row.", + "Pin W3 appears more than once with conflicting data; kept the first row.", + "Pin R3 appears more than once with conflicting data; kept the first row.", + "Pin P3 appears more than once with conflicting data; kept the first row.", + "Pin R4 appears more than once with conflicting data; kept the first row.", + "Pin P4 appears more than once with conflicting data; kept the first row.", + "Pin T5 appears more than once with conflicting data; kept the first row.", + "Pin U5 appears more than once with conflicting data; kept the first row.", + "Pin T6 appears more than once with conflicting data; kept the first row.", + "Pin U6 appears more than once with conflicting data; kept the first row.", + "Pin C8 appears more than once with conflicting data; kept the first row.", + "Pin D8 appears more than once with conflicting data; kept the first row.", + "Pin A7 appears more than once with conflicting data; kept the first row.", + "Pin B7 appears more than once with conflicting data; kept the first row.", + "Pin C7 appears more than once with conflicting data; kept the first row.", + "Pin D7 appears more than once with conflicting data; kept the first row.", + "Pin A6 appears more than once with conflicting data; kept the first row.", + "Pin B6 appears more than once with conflicting data; kept the first row.", + "Pin G2 appears more than once with conflicting data; kept the first row.", + "Pin G3 appears more than once with conflicting data; kept the first row.", + "Pin B2 appears more than once with conflicting data; kept the first row.", + "Pin C1 appears more than once with conflicting data; kept the first row.", + "Pin C2 appears more than once with conflicting data; kept the first row.", + "Pin D1 appears more than once with conflicting data; kept the first row.", + "Pin D2 appears more than once with conflicting data; kept the first row.", + "Pin D3 appears more than once with conflicting data; kept the first row.", + "Pin E1 appears more than once with conflicting data; kept the first row.", + "Pin E2 appears more than once with conflicting data; kept the first row.", + "Pin E3 appears more than once with conflicting data; kept the first row.", + "Pin E4 appears more than once with conflicting data; kept the first row.", + "Pin F2 appears more than once with conflicting data; kept the first row.", + "Pin F3 appears more than once with conflicting data; kept the first row.", + "Pin J4 appears more than once with conflicting data; kept the first row.", + "Pin K4 appears more than once with conflicting data; kept the first row.", + "Pin K3 appears more than once with conflicting data; kept the first row.", + "Pin K2 appears more than once with conflicting data; kept the first row.", + "Pin K1 appears more than once with conflicting data; kept the first row.", + "Pin L1 appears more than once with conflicting data; kept the first row.", + "Pin V11 appears more than once with conflicting data; kept the first row.", + "Pin W11 appears more than once with conflicting data; kept the first row.", + "Pin T11 appears more than once with conflicting data; kept the first row.", + "Pin U11 appears more than once with conflicting data; kept the first row.", + "Pin U13 appears more than once with conflicting data; kept the first row.", + "Pin T13 appears more than once with conflicting data; kept the first row.", + "Pin U14 appears more than once with conflicting data; kept the first row.", + "Pin T14 appears more than once with conflicting data; kept the first row.", + "Pin V16 appears more than once with conflicting data; kept the first row.", + "Pin U16 appears more than once with conflicting data; kept the first row.", + "Pin T16 appears more than once with conflicting data; kept the first row.", + "Pin W17 appears more than once with conflicting data; kept the first row.", + "Pin V17 appears more than once with conflicting data; kept the first row.", + "Pin U17 appears more than once with conflicting data; kept the first row.", + "Pin D19 appears more than once with conflicting data; kept the first row.", + "Pin C19 appears more than once with conflicting data; kept the first row.", + "Pin K18 appears more than once with conflicting data; kept the first row.", + "Pin K19 appears more than once with conflicting data; kept the first row.", + "Pin E19 appears more than once with conflicting data; kept the first row.", + "Pin E18 appears more than once with conflicting data; kept the first row.", + "Pin R16 appears more than once with conflicting data; kept the first row.", + "Pin R17 appears more than once with conflicting data; kept the first row.", + "Pin R18 appears more than once with conflicting data; kept the first row.", + "Pin R19 appears more than once with conflicting data; kept the first row.", + "Pin P16 appears more than once with conflicting data; kept the first row.", + "Pin P17 appears more than once with conflicting data; kept the first row.", + "Pin P18 appears more than once with conflicting data; kept the first row.", + "Pin P19 appears more than once with conflicting data; kept the first row.", + "Pin N16 appears more than once with conflicting data; kept the first row.", + "Pin N18 appears more than once with conflicting data; kept the first row.", + "Pin N17 appears more than once with conflicting data; kept the first row.", + "Pin M16 appears more than once with conflicting data; kept the first row.", + "Pin M17 appears more than once with conflicting data; kept the first row.", + "Pin L16 appears more than once with conflicting data; kept the first row.", + "Pin J17 appears more than once with conflicting data; kept the first row.", + "Pin J16 appears more than once with conflicting data; kept the first row.", + "Pin L17 appears more than once with conflicting data; kept the first row.", + "Pin K16 appears more than once with conflicting data; kept the first row.", + "Pin K17 appears more than once with conflicting data; kept the first row.", + "Pin B19 appears more than once with conflicting data; kept the first row.", + "Pin C18 appears more than once with conflicting data; kept the first row.", + "Pin B18 appears more than once with conflicting data; kept the first row.", + "Pin A17 appears more than once with conflicting data; kept the first row.", + "Pin B17 appears more than once with conflicting data; kept the first row.", + "Pin B16 appears more than once with conflicting data; kept the first row.", + "Pin A16 appears more than once with conflicting data; kept the first row.", + "Pin C17 appears more than once with conflicting data; kept the first row.", + "Pin D16 appears more than once with conflicting data; kept the first row.", + "Pin C16 appears more than once with conflicting data; kept the first row.", + "Pin A15 appears more than once with conflicting data; kept the first row.", + "Pin B15 appears more than once with conflicting data; kept the first row.", + "Pin C15 appears more than once with conflicting data; kept the first row.", + "Pin D15 appears more than once with conflicting data; kept the first row.", + "Pin A14 appears more than once with conflicting data; kept the first row.", + "Pin B14 appears more than once with conflicting data; kept the first row.", + "Pin C14 appears more than once with conflicting data; kept the first row.", + "Pin A11 appears more than once with conflicting data; kept the first row.", + "Pin B11 appears more than once with conflicting data; kept the first row.", + "Pin C11 appears more than once with conflicting data; kept the first row.", + "Pin D11 appears more than once with conflicting data; kept the first row.", + "Pin C6 appears more than once with conflicting data; kept the first row.", + "Pin D6 appears more than once with conflicting data; kept the first row.", + "Pin A5 appears more than once with conflicting data; kept the first row.", + "Pin B5 appears more than once with conflicting data; kept the first row.", + "Pin A4 appears more than once with conflicting data; kept the first row.", + "Pin B4 appears more than once with conflicting data; kept the first row.", + "Pin A3 appears more than once with conflicting data; kept the first row.", + "Pin C3 appears more than once with conflicting data; kept the first row.", + "Pin A2 appears more than once with conflicting data; kept the first row.", + "Pin F1 appears more than once with conflicting data; kept the first row.", + "Pin G1 appears more than once with conflicting data; kept the first row.", + "Pin H1 appears more than once with conflicting data; kept the first row.", + "Pin H2 appears more than once with conflicting data; kept the first row.", + "Pin H3 appears more than once with conflicting data; kept the first row.", + "Pin J1 appears more than once with conflicting data; kept the first row.", + "Pin J2 appears more than once with conflicting data; kept the first row.", + "Pin J3 appears more than once with conflicting data; kept the first row.", + "Pin L2 appears more than once with conflicting data; kept the first row.", + "Pin L3 appears more than once with conflicting data; kept the first row.", + "Pin L4 appears more than once with conflicting data; kept the first row.", + "Pin N2 appears more than once with conflicting data; kept the first row.", + "Pin M2 appears more than once with conflicting data; kept the first row.", + "Pin M4 appears more than once with conflicting data; kept the first row.", + "Pin M3 appears more than once with conflicting data; kept the first row.", + "Pin N4 appears more than once with conflicting data; kept the first row.", + "Pin N3 appears more than once with conflicting data; kept the first row.", + "Pin V12 appears more than once with conflicting data; kept the first row.", + "Pin W10 appears more than once with conflicting data; kept the first row.", + "Pin U12 appears more than once with conflicting data; kept the first row.", + "Pin T12 appears more than once with conflicting data; kept the first row.", + "Pin T15 appears more than once with conflicting data; kept the first row.", + "Pin U15 appears more than once with conflicting data; kept the first row.", + "Pin W16 appears more than once with conflicting data; kept the first row.", + "Pin T8 appears more than once with conflicting data; kept the first row.", + "Pin U8 appears more than once with conflicting data; kept the first row.", + "Pin V8 appears more than once with conflicting data; kept the first row.", + "Pin T9 appears more than once with conflicting data; kept the first row.", + "Pin U9 appears more than once with conflicting data; kept the first row.", + "Pin V9 appears more than once with conflicting data; kept the first row.", + "Pin W9 appears more than once with conflicting data; kept the first row.", + "Pin T10 appears more than once with conflicting data; kept the first row.", + "Pin U10 appears more than once with conflicting data; kept the first row.", + "Pin V10 appears more than once with conflicting data; kept the first row.", + "Pin W18 appears more than once with conflicting data; kept the first row.", + "Pin G18 appears more than once with conflicting data; kept the first row.", + "Pin V18 appears more than once with conflicting data; kept the first row.", + "Pin U18 appears more than once with conflicting data; kept the first row.", + "Pin T17 appears more than once with conflicting data; kept the first row.", + "Pin T18 appears more than once with conflicting data; kept the first row.", + "Pin T19 appears more than once with conflicting data; kept the first row.", + "Pin N19 appears more than once with conflicting data; kept the first row.", + "Pin M19 appears more than once with conflicting data; kept the first row.", + "Pin M18 appears more than once with conflicting data; kept the first row.", + "Pin L19 appears more than once with conflicting data; kept the first row.", + "Pin E17 appears more than once with conflicting data; kept the first row.", + "Pin D18 appears more than once with conflicting data; kept the first row.", + "Pin D17 appears more than once with conflicting data; kept the first row.", + "Pin D14 appears more than once with conflicting data; kept the first row.", + "Pin A13 appears more than once with conflicting data; kept the first row.", + "Pin B13 appears more than once with conflicting data; kept the first row.", + "Pin C13 appears more than once with conflicting data; kept the first row.", + "Pin D13 appears more than once with conflicting data; kept the first row.", + "Pin A12 appears more than once with conflicting data; kept the first row.", + "Pin B12 appears more than once with conflicting data; kept the first row.", + "Pin C12 appears more than once with conflicting data; kept the first row.", + "Pin D12 appears more than once with conflicting data; kept the first row.", + "Pin B10 appears more than once with conflicting data; kept the first row.", + "Pin C10 appears more than once with conflicting data; kept the first row.", + "Pin D10 appears more than once with conflicting data; kept the first row.", + "Pin B9 appears more than once with conflicting data; kept the first row.", + "Pin C9 appears more than once with conflicting data; kept the first row.", + "Pin D9 appears more than once with conflicting data; kept the first row.", + "Pin A8 appears more than once with conflicting data; kept the first row.", + "Pin B8 appears more than once with conflicting data; kept the first row.", + "Pin C5 appears more than once with conflicting data; kept the first row.", + "Pin D5 appears more than once with conflicting data; kept the first row.", + "Pin C4 appears more than once with conflicting data; kept the first row.", + "Pin D4 appears more than once with conflicting data; kept the first row." + ] + }, + "TMS320F28379D": { + "family": "TMS320F28379D", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TMS320F28379DZWTT", + "packageDescription": "NFBGA-337", + "packageCode": "ZWT", + "expectedPinCount": 337, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TMS320F28379DZWTT.circuit.tsx", + "pinLabelCount": 337, + "coordinateLabelCount": 337, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 337, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TMS320F28379D\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28379DZWTT\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28379DZWTT.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.403Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TMS320F28379D/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TMS320F28379D/datasheet/GUID-8ED68CEA-4064-416E-A5C1-342A9D1A70E8", + "packageColumn": "TERMINAL / ZWT, BALL, NO.", + "tableClass": "table", + "pins": [ + { + "number": "V1", + "name": "VREFHIA", + "type": "I", + "description": "ADC-A high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIA and VREFLOA pins., NOTE: Do not load this pin externally." + }, + { + "number": "W5", + "name": "VREFHIB", + "type": "I", + "description": "ADC-B high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIB and VREFLOB pins., NOTE: Do not load this pin externally." + }, + { + "number": "R1", + "name": "VREFHIC", + "type": "I", + "description": "ADC-C high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHIC and VREFLOC pins., NOTE: Do not load this pin externally." + }, + { + "number": "V5", + "name": "VREFHID", + "type": "I", + "description": "ADC-D high reference. This voltage must be driven into the pin from external circuitry. Place at least a 1-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHID and VREFLOD pins., NOTE: Do not load this pin externally." + }, + { + "number": "R2", + "name": "VREFLOA", + "type": "I", + "description": "ADC-A low reference., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. On the PZP package, pin 17 must be connected to VSSA on the system board." + }, + { + "number": "V6", + "name": "VREFLOB", + "type": "I", + "description": "ADC-B low reference" + }, + { + "number": "P2", + "name": "VREFLOC", + "type": "I", + "description": "ADC-C low reference" + }, + { + "number": "W6", + "name": "VREFLOD", + "type": "I", + "description": "ADC-D low reference" + }, + { + "number": "T4", + "name": "ADCIN14", + "type": "I", + "description": "Input 14 to all ADCs. This pin can be used as a general-purpose ADCIN pin or it can be used to calibrate all ADCs together (either single-ended or differential) from an external reference." + }, + { + "number": "U4", + "name": "ADCIN15", + "type": "I", + "description": "Input 15 to all ADCs. This pin can be used as a general-purpose ADCIN pin or it can be used to calibrate all ADCs together (either single-ended or differential) from an external reference." + }, + { + "number": "U1", + "name": "ADCINA0", + "type": "I", + "description": "ADC-A input 0. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "T1", + "name": "ADCINA1", + "type": "I", + "description": "ADC-A input 1. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "U2", + "name": "ADCINA2", + "type": "I", + "description": "ADC-A input 2" + }, + { + "number": "T2", + "name": "ADCINA3", + "type": "I", + "description": "ADC-A input 3" + }, + { + "number": "U3", + "name": "ADCINA4", + "type": "I", + "description": "ADC-A input 4" + }, + { + "number": "T3", + "name": "ADCINA5", + "type": "I", + "description": "ADC-A input 5" + }, + { + "number": "V2", + "name": "ADCINB0", + "type": "I", + "description": "ADC-B input 0. There is a 100-pF capacitor to VSSA on this pin in both ADC input or DAC reference mode which cannot be disabled. If this pin is being used as a reference for the on-chip DACs, place at least a 1-µF capacitor on this pin." + }, + { + "number": "W2", + "name": "ADCINB1", + "type": "I", + "description": "ADC-B input 1. There is a 50-kΩ internal pulldown on this pin in both an ADC input or DAC output mode which cannot be disabled." + }, + { + "number": "V3", + "name": "ADCINB2", + "type": "I", + "description": "ADC-B input 2" + }, + { + "number": "W3", + "name": "ADCINB3", + "type": "I", + "description": "ADC-B input 3" + }, + { + "number": "V4", + "name": "ADCINB4", + "type": "I", + "description": "ADC-B input 4" + }, + { + "number": "W4", + "name": "ADCINB5", + "type": "I", + "description": "ADC-B input 5" + }, + { + "number": "R3", + "name": "ADCINC2", + "type": "I", + "description": "ADC-C input 2" + }, + { + "number": "P3", + "name": "ADCINC3", + "type": "I", + "description": "ADC-C input 3" + }, + { + "number": "R4", + "name": "ADCINC4", + "type": "I", + "description": "ADC-C input 4" + }, + { + "number": "P4", + "name": "ADCINC5", + "type": "I", + "description": "ADC-C input 5" + }, + { + "number": "T5", + "name": "ADCIND0", + "type": "I", + "description": "ADC-D input 0" + }, + { + "number": "U5", + "name": "ADCIND1", + "type": "I", + "description": "ADC-D input 1" + }, + { + "number": "T6", + "name": "ADCIND2", + "type": "I", + "description": "ADC-D input 2" + }, + { + "number": "U6", + "name": "ADCIND3", + "type": "I", + "description": "ADC-D input 3" + }, + { + "number": "T7", + "name": "ADCIND4", + "type": "I", + "description": "ADC-D input 4" + }, + { + "number": "U7", + "name": "ADCIND5", + "type": "I", + "description": "ADC-D input 5" + }, + { + "number": "C8", + "name": "GPIO0", + "type": "I/O", + "description": "General-purpose input/output 0" + }, + { + "number": "D8", + "name": "GPIO1", + "type": "I/O", + "description": "General-purpose input/output 1" + }, + { + "number": "A7", + "name": "GPIO2", + "type": "I/O", + "description": "General-purpose input/output 2" + }, + { + "number": "B7", + "name": "GPIO3", + "type": "I/O", + "description": "General-purpose input/output 3" + }, + { + "number": "C7", + "name": "GPIO4", + "type": "I/O", + "description": "General-purpose input/output 4" + }, + { + "number": "D7", + "name": "GPIO5", + "type": "I/O", + "description": "General-purpose input/output 5" + }, + { + "number": "A6", + "name": "GPIO6", + "type": "I/O", + "description": "General-purpose input/output 6" + }, + { + "number": "B6", + "name": "GPIO7", + "type": "I/O", + "description": "General-purpose input/output 7" + }, + { + "number": "G2", + "name": "GPIO8", + "type": "I/O", + "description": "General-purpose input/output 8" + }, + { + "number": "G3", + "name": "GPIO9", + "type": "I/O", + "description": "General-purpose input/output 9" + }, + { + "number": "B2", + "name": "GPIO10", + "type": "I/O", + "description": "General-purpose input/output 10" + }, + { + "number": "C1", + "name": "GPIO11", + "type": "I/O", + "description": "General-purpose input/output 11" + }, + { + "number": "C2", + "name": "GPIO12", + "type": "I/O", + "description": "General-purpose input/output 12" + }, + { + "number": "D1", + "name": "GPIO13", + "type": "I/O", + "description": "General-purpose input/output 13" + }, + { + "number": "D2", + "name": "GPIO14", + "type": "I/O", + "description": "General-purpose input/output 14" + }, + { + "number": "D3", + "name": "GPIO15", + "type": "I/O", + "description": "General-purpose input/output 15" + }, + { + "number": "E1", + "name": "GPIO16", + "type": "I/O", + "description": "General-purpose input/output 16" + }, + { + "number": "E2", + "name": "GPIO17", + "type": "I/O", + "description": "General-purpose input/output 17" + }, + { + "number": "E3", + "name": "GPIO18", + "type": "I/O", + "description": "General-purpose input/output 18" + }, + { + "number": "E4", + "name": "GPIO19", + "type": "I/O", + "description": "General-purpose input/output 19" + }, + { + "number": "F2", + "name": "GPIO20", + "type": "I/O", + "description": "General-purpose input/output 20" + }, + { + "number": "F3", + "name": "GPIO21", + "type": "I/O", + "description": "General-purpose input/output 21" + }, + { + "number": "J4", + "name": "GPIO22", + "type": "I/O", + "description": "General-purpose input/output 22" + }, + { + "number": "K4", + "name": "GPIO23", + "type": "I/O", + "description": "General-purpose input/output 23" + }, + { + "number": "K3", + "name": "GPIO24", + "type": "I/O", + "description": "General-purpose input/output 24" + }, + { + "number": "K2", + "name": "GPIO25", + "type": "I/O", + "description": "General-purpose input/output 25" + }, + { + "number": "K1", + "name": "GPIO26", + "type": "I/O", + "description": "General-purpose input/output 26" + }, + { + "number": "L1", + "name": "GPIO27", + "type": "I/O", + "description": "General-purpose input/output 27" + }, + { + "number": "V11", + "name": "GPIO28", + "type": "I/O", + "description": "General-purpose input/output 28" + }, + { + "number": "W11", + "name": "GPIO29", + "type": "I/O", + "description": "General-purpose input/output 29" + }, + { + "number": "T11", + "name": "GPIO30", + "type": "I/O", + "description": "General-purpose input/output 30" + }, + { + "number": "U11", + "name": "GPIO31", + "type": "I/O", + "description": "General-purpose input/output 31" + }, + { + "number": "U13", + "name": "GPIO32", + "type": "I/O", + "description": "General-purpose input/output 32" + }, + { + "number": "T13", + "name": "GPIO33", + "type": "I/O", + "description": "General-purpose input/output 33" + }, + { + "number": "U14", + "name": "GPIO34", + "type": "I/O", + "description": "General-purpose input/output 34" + }, + { + "number": "T14", + "name": "GPIO35", + "type": "I/O", + "description": "General-purpose input/output 35" + }, + { + "number": "V16", + "name": "GPIO36", + "type": "I/O", + "description": "General-purpose input/output 36" + }, + { + "number": "U16", + "name": "GPIO37", + "type": "I/O", + "description": "General-purpose input/output 37" + }, + { + "number": "T16", + "name": "GPIO38", + "type": "I/O", + "description": "General-purpose input/output 38" + }, + { + "number": "W17", + "name": "GPIO39", + "type": "I/O", + "description": "General-purpose input/output 39" + }, + { + "number": "V17", + "name": "GPIO40", + "type": "I/O", + "description": "General-purpose input/output 40" + }, + { + "number": "U17", + "name": "GPIO41", + "type": "I/O", + "description": "General-purpose input/output 41. For applications using the Hibernate low-power mode, this pin serves as the GPIOHIBWAKE signal. For details, see the Low Power Modes section of the System Control chapter in the TMS320F2837xD Dual-Core Real-Time Microcontrollers Technical Reference Manual ." + }, + { + "number": "D19", + "name": "GPIO42", + "type": "I/O", + "description": "General-purpose input/output 42" + }, + { + "number": "C19", + "name": "GPIO43", + "type": "I/O", + "description": "General-purpose input/output 43" + }, + { + "number": "K18", + "name": "GPIO44", + "type": "I/O", + "description": "General-purpose input/output 44" + }, + { + "number": "K19", + "name": "GPIO45", + "type": "I/O", + "description": "General-purpose input/output 45" + }, + { + "number": "E19", + "name": "GPIO46", + "type": "I/O", + "description": "General-purpose input/output 46" + }, + { + "number": "E18", + "name": "GPIO47", + "type": "I/O", + "description": "General-purpose input/output 47" + }, + { + "number": "R16", + "name": "GPIO48", + "type": "I/O", + "description": "General-purpose input/output 48" + }, + { + "number": "R17", + "name": "GPIO49", + "type": "I/O", + "description": "General-purpose input/output 49" + }, + { + "number": "R18", + "name": "GPIO50", + "type": "I/O", + "description": "General-purpose input/output 50" + }, + { + "number": "R19", + "name": "GPIO51", + "type": "I/O", + "description": "General-purpose input/output 51" + }, + { + "number": "P16", + "name": "GPIO52", + "type": "I/O", + "description": "General-purpose input/output 52" + }, + { + "number": "P17", + "name": "GPIO53", + "type": "I/O", + "description": "General-purpose input/output 53" + }, + { + "number": "P18", + "name": "GPIO54", + "type": "I/O", + "description": "General-purpose input/output 54" + }, + { + "number": "P19", + "name": "GPIO55", + "type": "I/O", + "description": "General-purpose input/output 55" + }, + { + "number": "N16", + "name": "GPIO56", + "type": "I/O", + "description": "General-purpose input/output 56" + }, + { + "number": "N18", + "name": "GPIO57", + "type": "I/O", + "description": "General-purpose input/output 57" + }, + { + "number": "N17", + "name": "GPIO58", + "type": "I/O", + "description": "General-purpose input/output 58" + }, + { + "number": "M16", + "name": "GPIO59", + "type": "I/O", + "description": "General-purpose input/output 59" + }, + { + "number": "M17", + "name": "GPIO60", + "type": "I/O", + "description": "General-purpose input/output 60" + }, + { + "number": "L16", + "name": "GPIO61", + "type": "I/O", + "description": "General-purpose input/output 61" + }, + { + "number": "J17", + "name": "GPIO62", + "type": "I/O", + "description": "General-purpose input/output 62" + }, + { + "number": "J16", + "name": "GPIO63", + "type": "I/O", + "description": "General-purpose input/output 63" + }, + { + "number": "L17", + "name": "GPIO64", + "type": "I/O", + "description": "General-purpose input/output 64" + }, + { + "number": "K16", + "name": "GPIO65", + "type": "I/O", + "description": "General-purpose input/output 65" + }, + { + "number": "K17", + "name": "GPIO66", + "type": "I/O", + "description": "General-purpose input/output 66" + }, + { + "number": "B19", + "name": "GPIO67", + "type": "I/O", + "description": "General-purpose input/output 67" + }, + { + "number": "C18", + "name": "GPIO68", + "type": "I/O", + "description": "General-purpose input/output 68" + }, + { + "number": "B18", + "name": "GPIO69", + "type": "I/O", + "description": "General-purpose input/output 69" + }, + { + "number": "A17", + "name": "GPIO70", + "type": "I/O", + "description": "General-purpose input/output 70" + }, + { + "number": "B17", + "name": "GPIO71", + "type": "I/O", + "description": "General-purpose input/output 71" + }, + { + "number": "B16", + "name": "GPIO72", + "type": "I/O", + "description": "General-purpose input/output 72. This is the factory default boot mode select pin 1." + }, + { + "number": "A16", + "name": "GPIO73", + "type": "I/O", + "description": "General-purpose input/output 73" + }, + { + "number": "C17", + "name": "GPIO74", + "type": "I/O", + "description": "General-purpose input/output 74" + }, + { + "number": "D16", + "name": "GPIO75", + "type": "I/O", + "description": "General-purpose input/output 75" + }, + { + "number": "C16", + "name": "GPIO76", + "type": "I/O", + "description": "General-purpose input/output 76" + }, + { + "number": "A15", + "name": "GPIO77", + "type": "I/O", + "description": "General-purpose input/output 77" + }, + { + "number": "B15", + "name": "GPIO78", + "type": "I/O", + "description": "General-purpose input/output 78" + }, + { + "number": "C15", + "name": "GPIO79", + "type": "I/O", + "description": "General-purpose input/output 79" + }, + { + "number": "D15", + "name": "GPIO80", + "type": "I/O", + "description": "General-purpose input/output 80" + }, + { + "number": "A14", + "name": "GPIO81", + "type": "I/O", + "description": "General-purpose input/output 81" + }, + { + "number": "B14", + "name": "GPIO82", + "type": "I/O", + "description": "General-purpose input/output 82" + }, + { + "number": "C14", + "name": "GPIO83", + "type": "I/O", + "description": "General-purpose input/output 83" + }, + { + "number": "A11", + "name": "GPIO84", + "type": "I/O", + "description": "General-purpose input/output 84. This is the factory default boot mode select pin 0." + }, + { + "number": "B11", + "name": "GPIO85", + "type": "I/O", + "description": "General-purpose input/output 85" + }, + { + "number": "C11", + "name": "GPIO86", + "type": "I/O", + "description": "General-purpose input/output 86" + }, + { + "number": "D11", + "name": "GPIO87", + "type": "I/O", + "description": "General-purpose input/output 87" + }, + { + "number": "C6", + "name": "GPIO88", + "type": "I/O", + "description": "General-purpose input/output 88" + }, + { + "number": "D6", + "name": "GPIO89", + "type": "I/O", + "description": "General-purpose input/output 89" + }, + { + "number": "A5", + "name": "GPIO90", + "type": "I/O", + "description": "General-purpose input/output 90" + }, + { + "number": "B5", + "name": "GPIO91", + "type": "I/O", + "description": "General-purpose input/output 91" + }, + { + "number": "A4", + "name": "GPIO92", + "type": "I/O", + "description": "General-purpose input/output 92" + }, + { + "number": "B4", + "name": "GPIO93", + "type": "I/O", + "description": "General-purpose input/output 93" + }, + { + "number": "A3", + "name": "GPIO94", + "type": "I/O", + "description": "General-purpose input/output 94" + }, + { + "number": "B3", + "name": "GPIO95", + "type": "I/O", + "description": "General-purpose input/output 95" + }, + { + "number": "C3", + "name": "GPIO96", + "type": "I/O", + "description": "General-purpose input/output 96" + }, + { + "number": "A2", + "name": "GPIO97", + "type": "I/O", + "description": "General-purpose input/output 97" + }, + { + "number": "F1", + "name": "GPIO98", + "type": "I/O", + "description": "General-purpose input/output 98" + }, + { + "number": "G1", + "name": "GPIO99", + "type": "I/O", + "description": "General-purpose input/output 99" + }, + { + "number": "H1", + "name": "GPIO100", + "type": "I/O", + "description": "General-purpose input/output 100" + }, + { + "number": "H2", + "name": "GPIO101", + "type": "I/O", + "description": "General-purpose input/output 101" + }, + { + "number": "H3", + "name": "GPIO102", + "type": "I/O", + "description": "General-purpose input/output 102" + }, + { + "number": "J1", + "name": "GPIO103", + "type": "I/O", + "description": "General-purpose input/output 103" + }, + { + "number": "J2", + "name": "GPIO104", + "type": "I/O", + "description": "General-purpose input/output 104" + }, + { + "number": "J3", + "name": "GPIO105", + "type": "I/O", + "description": "General-purpose input/output 105" + }, + { + "number": "L2", + "name": "GPIO106", + "type": "I/O", + "description": "General-purpose input/output 106" + }, + { + "number": "L3", + "name": "GPIO107", + "type": "I/O", + "description": "General-purpose input/output 107" + }, + { + "number": "L4", + "name": "GPIO108", + "type": "I/O", + "description": "General-purpose input/output 108" + }, + { + "number": "N2", + "name": "GPIO109", + "type": "I/O", + "description": "General-purpose input/output 109" + }, + { + "number": "M2", + "name": "GPIO110", + "type": "I/O", + "description": "General-purpose input/output 110" + }, + { + "number": "M4", + "name": "GPIO111", + "type": "I/O", + "description": "General-purpose input/output 111" + }, + { + "number": "M3", + "name": "GPIO112", + "type": "I/O", + "description": "General-purpose input/output 112" + }, + { + "number": "N4", + "name": "GPIO113", + "type": "I/O", + "description": "General-purpose input/output 113" + }, + { + "number": "N3", + "name": "GPIO114", + "type": "I/O", + "description": "General-purpose input/output 114" + }, + { + "number": "V12", + "name": "GPIO115", + "type": "I/O", + "description": "General-purpose input/output 115" + }, + { + "number": "W10", + "name": "GPIO116", + "type": "I/O", + "description": "General-purpose input/output 116" + }, + { + "number": "U12", + "name": "GPIO117", + "type": "I/O", + "description": "General-purpose input/output 117" + }, + { + "number": "T12", + "name": "GPIO118", + "type": "I/O", + "description": "General-purpose input/output 118" + }, + { + "number": "T15", + "name": "GPIO119", + "type": "I/O", + "description": "General-purpose input/output 119" + }, + { + "number": "U15", + "name": "GPIO120", + "type": "I/O", + "description": "General-purpose input/output 120" + }, + { + "number": "W16", + "name": "GPIO121", + "type": "I/O", + "description": "General-purpose input/output 121" + }, + { + "number": "T8", + "name": "GPIO122", + "type": "I/O", + "description": "General-purpose input/output 122" + }, + { + "number": "U8", + "name": "GPIO123", + "type": "I/O", + "description": "General-purpose input/output 123" + }, + { + "number": "V8", + "name": "GPIO124", + "type": "I/O", + "description": "General-purpose input/output 124" + }, + { + "number": "T9", + "name": "GPIO125", + "type": "I/O", + "description": "General-purpose input/output 125" + }, + { + "number": "U9", + "name": "GPIO126", + "type": "I/O", + "description": "General-purpose input/output 126" + }, + { + "number": "V9", + "name": "GPIO127", + "type": "I/O", + "description": "General-purpose input/output 127" + }, + { + "number": "W9", + "name": "GPIO128", + "type": "I/O", + "description": "General-purpose input/output 128" + }, + { + "number": "T10", + "name": "GPIO129", + "type": "I/O", + "description": "General-purpose input/output 129" + }, + { + "number": "U10", + "name": "GPIO130", + "type": "I/O", + "description": "General-purpose input/output 130" + }, + { + "number": "V10", + "name": "GPIO131", + "type": "I/O", + "description": "General-purpose input/output 131" + }, + { + "number": "W18", + "name": "GPIO132", + "type": "I/O", + "description": "General-purpose input/output 132" + }, + { + "number": "G18", + "name": "GPIO133/AUXCLKIN", + "type": "I/O", + "description": "General-purpose input/output 133. The AUXCLKIN function of this GPIO pin could be used to provide a single-ended 3.3-V level clock signal to the Auxiliary Phase-Locked Loop (AUXPLL), whose output is used for the USB module. The AUXCLKIN clock may also be used for the CAN module." + }, + { + "number": "V18", + "name": "GPIO134", + "type": "I/O", + "description": "General-purpose input/output 134" + }, + { + "number": "U18", + "name": "GPIO135", + "type": "I/O", + "description": "General-purpose input/output 135" + }, + { + "number": "T17", + "name": "GPIO136", + "type": "I/O", + "description": "General-purpose input/output 136" + }, + { + "number": "T18", + "name": "GPIO137", + "type": "I/O", + "description": "General-purpose input/output 137" + }, + { + "number": "T19", + "name": "GPIO138", + "type": "I/O", + "description": "General-purpose input/output 138" + }, + { + "number": "N19", + "name": "GPIO139", + "type": "I/O", + "description": "General-purpose input/output 139" + }, + { + "number": "M19", + "name": "GPIO140", + "type": "I/O", + "description": "General-purpose input/output 140" + }, + { + "number": "M18", + "name": "GPIO141", + "type": "I/O", + "description": "General-purpose input/output 141" + }, + { + "number": "L19", + "name": "GPIO142", + "type": "I/O", + "description": "General-purpose input/output 142" + }, + { + "number": "F18", + "name": "GPIO143", + "type": "I/O", + "description": "General-purpose input/output 143" + }, + { + "number": "F17", + "name": "GPIO144", + "type": "I/O", + "description": "General-purpose input/output 144" + }, + { + "number": "E17", + "name": "GPIO145", + "type": "I/O", + "description": "General-purpose input/output 145" + }, + { + "number": "D18", + "name": "GPIO146", + "type": "I/O", + "description": "General-purpose input/output 146" + }, + { + "number": "D17", + "name": "GPIO147", + "type": "I/O", + "description": "General-purpose input/output 147" + }, + { + "number": "D14", + "name": "GPIO148", + "type": "I/O", + "description": "General-purpose input/output 148" + }, + { + "number": "A13", + "name": "GPIO149", + "type": "I/O", + "description": "General-purpose input/output 149" + }, + { + "number": "B13", + "name": "GPIO150", + "type": "I/O", + "description": "General-purpose input/output 150" + }, + { + "number": "C13", + "name": "GPIO151", + "type": "I/O", + "description": "General-purpose input/output 151" + }, + { + "number": "D13", + "name": "GPIO152", + "type": "I/O", + "description": "General-purpose input/output 152" + }, + { + "number": "A12", + "name": "GPIO153", + "type": "I/O", + "description": "General-purpose input/output 153" + }, + { + "number": "B12", + "name": "GPIO154", + "type": "I/O", + "description": "General-purpose input/output 154" + }, + { + "number": "C12", + "name": "GPIO155", + "type": "I/O", + "description": "General-purpose input/output 155" + }, + { + "number": "D12", + "name": "GPIO156", + "type": "I/O", + "description": "General-purpose input/output 156" + }, + { + "number": "B10", + "name": "GPIO157", + "type": "I/O", + "description": "General-purpose input/output 157" + }, + { + "number": "C10", + "name": "GPIO158", + "type": "I/O", + "description": "General-purpose input/output 158" + }, + { + "number": "D10", + "name": "GPIO159", + "type": "I/O", + "description": "General-purpose input/output 159" + }, + { + "number": "B9", + "name": "GPIO160", + "type": "I/O", + "description": "General-purpose input/output 160" + }, + { + "number": "C9", + "name": "GPIO161", + "type": "I/O", + "description": "General-purpose input/output 161" + }, + { + "number": "D9", + "name": "GPIO162", + "type": "I/O", + "description": "General-purpose input/output 162" + }, + { + "number": "A8", + "name": "GPIO163", + "type": "I/O", + "description": "General-purpose input/output 163" + }, + { + "number": "B8", + "name": "GPIO164", + "type": "I/O", + "description": "General-purpose input/output 164" + }, + { + "number": "C5", + "name": "GPIO165", + "type": "I/O", + "description": "General-purpose input/output 165" + }, + { + "number": "D5", + "name": "GPIO166", + "type": "I/O", + "description": "General-purpose input/output 166" + }, + { + "number": "C4", + "name": "GPIO167", + "type": "I/O", + "description": "General-purpose input/output 167" + }, + { + "number": "D4", + "name": "GPIO168", + "type": "I/O", + "description": "General-purpose input/output 168" + }, + { + "number": "F19", + "name": "XRS", + "type": "I/OD", + "description": "Device Reset (in) and Watchdog Reset (out). The devices have a built-in power-on reset (POR) circuit. During a power-on condition, this pin is driven low by the device. An external circuit may also drive this pin to assert a device reset. This pin is also driven low by the MCU when a watchdog reset or NMI watchdog reset occurs. During watchdog reset, the XRS pin is driven low for the watchdog reset duration of 512 OSCCLK cycles. A resistor with a value from 2.2 kΩ to 10 kΩ should be placed between XRS and VDDIO. If a capacitor is placed between XRS and VSS for noise filtering, it should be 100 nF or smaller. These values will allow the watchdog to properly drive the XRS pin to VOL within 512 OSCCLK cycles when the watchdog reset is asserted. The output buffer of this pin is an open drain with an internal pullup. If this pin is driven by an external device, it should be done using an open-drain device." + }, + { + "number": "G19", + "name": "X1", + "type": "I", + "description": "On-chip crystal-oscillator input. To use this oscillator, a quartz crystal must be connected across X1 and X2. If this pin is not used, it must be tied to GND., This pin can also be used to feed a single-ended 3.3-V level clock. In this case, X2 is a No Connect (NC)." + }, + { + "number": "J19", + "name": "X2", + "type": "O", + "description": "On-chip crystal-oscillator output. A quartz crystal may be connected across X1 and X2. If X2 is not used, it must be left unconnected." + }, + { + "number": "H4", + "name": "NC", + "type": "", + "description": "No connect. BGA ball is electrically open and not connected to the die." + }, + { + "number": "V15", + "name": "TCK", + "type": "I", + "description": "JTAG test clock with internal pullup (see Section 6.6 )" + }, + { + "number": "W13", + "name": "TDI", + "type": "I", + "description": "JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected register (instruction or data) on a rising edge of TCK." + }, + { + "number": "W15", + "name": "TDO", + "type": "O/Z", + "description": "JTAG scan out, test data output (TDO). The contents of the selected register (instruction or data) are shifted out of TDO on the falling edge of TCK." + }, + { + "number": "W14", + "name": "TMS", + "type": "I", + "description": "JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked into the TAP controller on the rising edge of TCK." + }, + { + "number": "V14", + "name": "TRST", + "type": "I", + "description": "JTAG test reset with internal pulldown. TRST, when driven high, gives the scan system control of the operations of the device. If this signal is driven low, the device operates in its functional mode, and the test reset signals are ignored. NOTE: TRST must be maintained low at all times during normal device operation, so an external pulldown resistor is required on this pin for protection against noise spikes. The value of this resistor should be as small as possible, so long as the JTAG debug probe is still able to drive the TRST pin high. A resistor between 2.2-kΩ and 10-kΩ generally offers adequate protection. Since the value of the resistor is application-specific, TI recommends that each target board be validated for proper operation of the debug probe and the application. This pin has an internal 50-ns (nominal) glitch filter." + }, + { + "number": "J18", + "name": "VREGENZ", + "type": "I", + "description": "Internal voltage regulator enable with internal pulldown. The internal VREG is not supported and must be disabled. Connect VREGENZ to VDDIO." + }, + { + "number": "E9", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E11", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F9", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F11", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G14", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G15", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "J14", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "J15", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "K5", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "K6", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P10", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P13", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R10", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R13", + "name": "VDD", + "type": "", + "description": "1.2-V digital logic power pins. There are two options for placing the decoupling capacitors. Option 1 - Even Distribution: Distribute decoupling capacitance evenly across each VDD pin with a minimum total capacitance of approximately 20uF. Option 2 - Bulk Capacitance: Place a 1uF capacitor near each VDD pin and place the remainder of the minimum total 20uF capacitance as bulk capacitance on the VDD net . The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R11", + "name": "VDD3VFL", + "type": "", + "description": "3.3-V Flash power pin. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "R12", + "name": "VDD3VFL", + "type": "", + "description": "3.3-V Flash power pin. Place a minimum 0.1-µF decoupling capacitor on each pin." + }, + { + "number": "P6", + "name": "VDDA", + "type": "", + "description": "3.3-V analog power pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "R6", + "name": "VDDA", + "type": "", + "description": "3.3-V analog power pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin." + }, + { + "number": "A9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "A18", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "B1", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E7", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E10", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E13", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "E16", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F4", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F7", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F10", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F13", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "F16", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G4", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "G6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "L14", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "L15", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M1", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M5", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "M6", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "N14", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "N15", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "P9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "R9", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "V19", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "W8", + "name": "VDDIO", + "type": "", + "description": "3.3-V digital I/O power pins. Place a minimum 0.1-µF decoupling capacitor on each pin. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution." + }, + { + "number": "H16", + "name": "VDDOSC", + "type": "", + "description": "Power pins for the 3.3-V on-chip crystal oscillator (X1 and X2) and the two zero-pin internal oscillators (INTOSC). Place a 0.1-μF (minimum) decoupling capacitor on each pin." + }, + { + "number": "H17", + "name": "VDDOSC", + "type": "", + "description": "Power pins for the 3.3-V on-chip crystal oscillator (X1 and X2) and the two zero-pin internal oscillators (INTOSC). Place a 0.1-μF (minimum) decoupling capacitor on each pin." + }, + { + "number": "A1", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "A10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "A19", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "E15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "F15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "G16", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "G17", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "J12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "K15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "L18", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M9", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M10", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "M15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N1", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N5", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "N6", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P11", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P12", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "P15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R8", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R14", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "R15", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "W7", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "W19", + "name": "VSS", + "type": "", + "description": "Device ground. For Quad Flatpacks (QFPs), the PowerPAD on the bottom of the package must be soldered to the ground plane of the PCB." + }, + { + "number": "H18", + "name": "VSSOSC", + "type": "", + "description": "Crystal oscillator (X1 and X2) ground pin. When using an external crystal, do not connect this pin to the board ground. Instead, connect it to the ground reference of the external crystal oscillator circuit., If an external crystal is not used, this pin may be connected to the board ground." + }, + { + "number": "H19", + "name": "VSSOSC", + "type": "", + "description": "Crystal oscillator (X1 and X2) ground pin. When using an external crystal, do not connect this pin to the board ground. Instead, connect it to the ground reference of the external crystal oscillator circuit., If an external crystal is not used, this pin may be connected to the board ground." + }, + { + "number": "P1", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "P5", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "R5", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "V7", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "W1", + "name": "VSSA", + "type": "", + "description": "Analog ground., On the PZP package, pin 17 is double-bonded to VSSA and VREFLOA. This pin must be connect to VSSA." + }, + { + "number": "U19", + "name": "ERRORSTS", + "type": "O", + "description": "Error status output. This pin has an internal pulldown." + }, + { + "number": "W12", + "name": "FLT1", + "type": "I/O", + "description": "Flash test pin 1. Reserved for TI. Must be left unconnected." + }, + { + "number": "V13", + "name": "FLT2", + "type": "I/O", + "description": "Flash test pin 2. Reserved for TI. Must be left unconnected." + } + ], + "warnings": [ + "Pin T4 appears more than once with conflicting data; kept the first row.", + "Pin U4 appears more than once with conflicting data; kept the first row.", + "Pin U1 appears more than once with conflicting data; kept the first row.", + "Pin T1 appears more than once with conflicting data; kept the first row.", + "Pin U2 appears more than once with conflicting data; kept the first row.", + "Pin T2 appears more than once with conflicting data; kept the first row.", + "Pin U3 appears more than once with conflicting data; kept the first row.", + "Pin T3 appears more than once with conflicting data; kept the first row.", + "Pin V2 appears more than once with conflicting data; kept the first row.", + "Pin W2 appears more than once with conflicting data; kept the first row.", + "Pin V3 appears more than once with conflicting data; kept the first row.", + "Pin W3 appears more than once with conflicting data; kept the first row.", + "Pin R3 appears more than once with conflicting data; kept the first row.", + "Pin P3 appears more than once with conflicting data; kept the first row.", + "Pin R4 appears more than once with conflicting data; kept the first row.", + "Pin P4 appears more than once with conflicting data; kept the first row.", + "Pin T5 appears more than once with conflicting data; kept the first row.", + "Pin U5 appears more than once with conflicting data; kept the first row.", + "Pin T6 appears more than once with conflicting data; kept the first row.", + "Pin U6 appears more than once with conflicting data; kept the first row.", + "Pin C8 appears more than once with conflicting data; kept the first row.", + "Pin D8 appears more than once with conflicting data; kept the first row.", + "Pin A7 appears more than once with conflicting data; kept the first row.", + "Pin B7 appears more than once with conflicting data; kept the first row.", + "Pin C7 appears more than once with conflicting data; kept the first row.", + "Pin D7 appears more than once with conflicting data; kept the first row.", + "Pin A6 appears more than once with conflicting data; kept the first row.", + "Pin B6 appears more than once with conflicting data; kept the first row.", + "Pin G2 appears more than once with conflicting data; kept the first row.", + "Pin G3 appears more than once with conflicting data; kept the first row.", + "Pin B2 appears more than once with conflicting data; kept the first row.", + "Pin C1 appears more than once with conflicting data; kept the first row.", + "Pin C2 appears more than once with conflicting data; kept the first row.", + "Pin D1 appears more than once with conflicting data; kept the first row.", + "Pin D2 appears more than once with conflicting data; kept the first row.", + "Pin D3 appears more than once with conflicting data; kept the first row.", + "Pin E1 appears more than once with conflicting data; kept the first row.", + "Pin E2 appears more than once with conflicting data; kept the first row.", + "Pin E3 appears more than once with conflicting data; kept the first row.", + "Pin E4 appears more than once with conflicting data; kept the first row.", + "Pin F2 appears more than once with conflicting data; kept the first row.", + "Pin F3 appears more than once with conflicting data; kept the first row.", + "Pin J4 appears more than once with conflicting data; kept the first row.", + "Pin K4 appears more than once with conflicting data; kept the first row.", + "Pin K3 appears more than once with conflicting data; kept the first row.", + "Pin K2 appears more than once with conflicting data; kept the first row.", + "Pin K1 appears more than once with conflicting data; kept the first row.", + "Pin L1 appears more than once with conflicting data; kept the first row.", + "Pin V11 appears more than once with conflicting data; kept the first row.", + "Pin W11 appears more than once with conflicting data; kept the first row.", + "Pin T11 appears more than once with conflicting data; kept the first row.", + "Pin U11 appears more than once with conflicting data; kept the first row.", + "Pin U13 appears more than once with conflicting data; kept the first row.", + "Pin T13 appears more than once with conflicting data; kept the first row.", + "Pin U14 appears more than once with conflicting data; kept the first row.", + "Pin T14 appears more than once with conflicting data; kept the first row.", + "Pin V16 appears more than once with conflicting data; kept the first row.", + "Pin U16 appears more than once with conflicting data; kept the first row.", + "Pin T16 appears more than once with conflicting data; kept the first row.", + "Pin W17 appears more than once with conflicting data; kept the first row.", + "Pin V17 appears more than once with conflicting data; kept the first row.", + "Pin U17 appears more than once with conflicting data; kept the first row.", + "Pin D19 appears more than once with conflicting data; kept the first row.", + "Pin C19 appears more than once with conflicting data; kept the first row.", + "Pin K18 appears more than once with conflicting data; kept the first row.", + "Pin K19 appears more than once with conflicting data; kept the first row.", + "Pin E19 appears more than once with conflicting data; kept the first row.", + "Pin E18 appears more than once with conflicting data; kept the first row.", + "Pin R16 appears more than once with conflicting data; kept the first row.", + "Pin R17 appears more than once with conflicting data; kept the first row.", + "Pin R18 appears more than once with conflicting data; kept the first row.", + "Pin R19 appears more than once with conflicting data; kept the first row.", + "Pin P16 appears more than once with conflicting data; kept the first row.", + "Pin P17 appears more than once with conflicting data; kept the first row.", + "Pin P18 appears more than once with conflicting data; kept the first row.", + "Pin P19 appears more than once with conflicting data; kept the first row.", + "Pin N16 appears more than once with conflicting data; kept the first row.", + "Pin N18 appears more than once with conflicting data; kept the first row.", + "Pin N17 appears more than once with conflicting data; kept the first row.", + "Pin M16 appears more than once with conflicting data; kept the first row.", + "Pin M17 appears more than once with conflicting data; kept the first row.", + "Pin L16 appears more than once with conflicting data; kept the first row.", + "Pin J17 appears more than once with conflicting data; kept the first row.", + "Pin J16 appears more than once with conflicting data; kept the first row.", + "Pin L17 appears more than once with conflicting data; kept the first row.", + "Pin K16 appears more than once with conflicting data; kept the first row.", + "Pin K17 appears more than once with conflicting data; kept the first row.", + "Pin B19 appears more than once with conflicting data; kept the first row.", + "Pin C18 appears more than once with conflicting data; kept the first row.", + "Pin B18 appears more than once with conflicting data; kept the first row.", + "Pin A17 appears more than once with conflicting data; kept the first row.", + "Pin B17 appears more than once with conflicting data; kept the first row.", + "Pin B16 appears more than once with conflicting data; kept the first row.", + "Pin A16 appears more than once with conflicting data; kept the first row.", + "Pin C17 appears more than once with conflicting data; kept the first row.", + "Pin D16 appears more than once with conflicting data; kept the first row.", + "Pin C16 appears more than once with conflicting data; kept the first row.", + "Pin A15 appears more than once with conflicting data; kept the first row.", + "Pin B15 appears more than once with conflicting data; kept the first row.", + "Pin C15 appears more than once with conflicting data; kept the first row.", + "Pin D15 appears more than once with conflicting data; kept the first row.", + "Pin A14 appears more than once with conflicting data; kept the first row.", + "Pin B14 appears more than once with conflicting data; kept the first row.", + "Pin C14 appears more than once with conflicting data; kept the first row.", + "Pin A11 appears more than once with conflicting data; kept the first row.", + "Pin B11 appears more than once with conflicting data; kept the first row.", + "Pin C11 appears more than once with conflicting data; kept the first row.", + "Pin D11 appears more than once with conflicting data; kept the first row.", + "Pin C6 appears more than once with conflicting data; kept the first row.", + "Pin D6 appears more than once with conflicting data; kept the first row.", + "Pin A5 appears more than once with conflicting data; kept the first row.", + "Pin B5 appears more than once with conflicting data; kept the first row.", + "Pin A4 appears more than once with conflicting data; kept the first row.", + "Pin B4 appears more than once with conflicting data; kept the first row.", + "Pin A3 appears more than once with conflicting data; kept the first row.", + "Pin C3 appears more than once with conflicting data; kept the first row.", + "Pin A2 appears more than once with conflicting data; kept the first row.", + "Pin F1 appears more than once with conflicting data; kept the first row.", + "Pin G1 appears more than once with conflicting data; kept the first row.", + "Pin H1 appears more than once with conflicting data; kept the first row.", + "Pin H2 appears more than once with conflicting data; kept the first row.", + "Pin H3 appears more than once with conflicting data; kept the first row.", + "Pin J1 appears more than once with conflicting data; kept the first row.", + "Pin J2 appears more than once with conflicting data; kept the first row.", + "Pin J3 appears more than once with conflicting data; kept the first row.", + "Pin L2 appears more than once with conflicting data; kept the first row.", + "Pin L3 appears more than once with conflicting data; kept the first row.", + "Pin L4 appears more than once with conflicting data; kept the first row.", + "Pin N2 appears more than once with conflicting data; kept the first row.", + "Pin M2 appears more than once with conflicting data; kept the first row.", + "Pin M4 appears more than once with conflicting data; kept the first row.", + "Pin M3 appears more than once with conflicting data; kept the first row.", + "Pin N4 appears more than once with conflicting data; kept the first row.", + "Pin N3 appears more than once with conflicting data; kept the first row.", + "Pin V12 appears more than once with conflicting data; kept the first row.", + "Pin W10 appears more than once with conflicting data; kept the first row.", + "Pin U12 appears more than once with conflicting data; kept the first row.", + "Pin T12 appears more than once with conflicting data; kept the first row.", + "Pin T15 appears more than once with conflicting data; kept the first row.", + "Pin U15 appears more than once with conflicting data; kept the first row.", + "Pin W16 appears more than once with conflicting data; kept the first row.", + "Pin T8 appears more than once with conflicting data; kept the first row.", + "Pin U8 appears more than once with conflicting data; kept the first row.", + "Pin V8 appears more than once with conflicting data; kept the first row.", + "Pin T9 appears more than once with conflicting data; kept the first row.", + "Pin U9 appears more than once with conflicting data; kept the first row.", + "Pin V9 appears more than once with conflicting data; kept the first row.", + "Pin W9 appears more than once with conflicting data; kept the first row.", + "Pin T10 appears more than once with conflicting data; kept the first row.", + "Pin U10 appears more than once with conflicting data; kept the first row.", + "Pin V10 appears more than once with conflicting data; kept the first row.", + "Pin W18 appears more than once with conflicting data; kept the first row.", + "Pin G18 appears more than once with conflicting data; kept the first row.", + "Pin V18 appears more than once with conflicting data; kept the first row.", + "Pin U18 appears more than once with conflicting data; kept the first row.", + "Pin T17 appears more than once with conflicting data; kept the first row.", + "Pin T18 appears more than once with conflicting data; kept the first row.", + "Pin T19 appears more than once with conflicting data; kept the first row.", + "Pin N19 appears more than once with conflicting data; kept the first row.", + "Pin M19 appears more than once with conflicting data; kept the first row.", + "Pin M18 appears more than once with conflicting data; kept the first row.", + "Pin L19 appears more than once with conflicting data; kept the first row.", + "Pin E17 appears more than once with conflicting data; kept the first row.", + "Pin D18 appears more than once with conflicting data; kept the first row.", + "Pin D17 appears more than once with conflicting data; kept the first row.", + "Pin D14 appears more than once with conflicting data; kept the first row.", + "Pin A13 appears more than once with conflicting data; kept the first row.", + "Pin B13 appears more than once with conflicting data; kept the first row.", + "Pin C13 appears more than once with conflicting data; kept the first row.", + "Pin D13 appears more than once with conflicting data; kept the first row.", + "Pin A12 appears more than once with conflicting data; kept the first row.", + "Pin B12 appears more than once with conflicting data; kept the first row.", + "Pin C12 appears more than once with conflicting data; kept the first row.", + "Pin D12 appears more than once with conflicting data; kept the first row.", + "Pin B10 appears more than once with conflicting data; kept the first row.", + "Pin C10 appears more than once with conflicting data; kept the first row.", + "Pin D10 appears more than once with conflicting data; kept the first row.", + "Pin B9 appears more than once with conflicting data; kept the first row.", + "Pin C9 appears more than once with conflicting data; kept the first row.", + "Pin D9 appears more than once with conflicting data; kept the first row.", + "Pin A8 appears more than once with conflicting data; kept the first row.", + "Pin B8 appears more than once with conflicting data; kept the first row.", + "Pin C5 appears more than once with conflicting data; kept the first row.", + "Pin D5 appears more than once with conflicting data; kept the first row.", + "Pin C4 appears more than once with conflicting data; kept the first row.", + "Pin D4 appears more than once with conflicting data; kept the first row." + ] + }, + "TPD1E01B04": { + "family": "TPD1E01B04", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPD1E01B04DPYR", + "packageDescription": "X1-SON-2(0.6x1)", + "packageCode": "DPY", + "expectedPinCount": 2, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TPD1E01B04DPYR.circuit.tsx", + "pinLabelCount": 2, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 2, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"TPD1E01B04\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E01B04DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E01B04DPYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.595Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPD1E01B04/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPD1E01B04/datasheet/pin-configuration-and-functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "1", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 2 to ground" + }, + { + "number": "2", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 1 to ground" + } + ], + "warnings": [] + }, + "TPD1E0B04": { + "family": "TPD1E0B04", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPD1E0B04DPLT", + "packageCode": "DPL", + "expectedPinCount": 2, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPD1E0B04\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPD1E0B04DPLT\",\"packageCode\":\"DPL\",\"expectedPinCount\":2,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.417Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPD1E0B04/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPD1E0B04/datasheet/GUID-7E9D9342-EB29-4F91-9A12-5DB7C57449BF", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 2 to ground" + }, + { + "number": "2", + "name": "IO", + "type": "I/O", + "description": "ESD Protected Channel. If used as ESD IO, connect pin 1 to ground" + } + ], + "warnings": [] + }, + "TPD1E10B06": { + "family": "TPD1E10B06", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPD1E10B06DYAR", + "packageDescription": "SOT-5X3", + "packageCode": "DYA", + "expectedPinCount": 2, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TPD1E10B06DYAR.circuit.tsx", + "pinLabelCount": 2, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 2, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"TPD1E10B06\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E10B06DYAR\",\"packageDescription\":\"SOT-5X3\",\"packageCode\":\"DYA\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E10B06DYAR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.501Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPD1E10B06/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/lit/gpn/TPD1E10B06#page=3", + "warnings": [ + "Recovered 2/2 physical pins from the official TI PDF.", + "Added official PDF supplemental row 2=GND from page 3: Pin 1 description states to connect the other pin to ground" + ], + "packageColumn": "DYA pin-number column", + "tableClass": "official-ti-pdf/number-name-pin-function-table", + "pins": [ + { + "number": "1", + "name": "I/O", + "type": "", + "description": "ESD Protected I/O. Connect other pin ground." + }, + { + "number": "2", + "name": "GND", + "type": "GND", + "description": "Ground terminal" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/gpn/TPD1E10B06", + "pdfSha256": "6ffe72cb5f5e607fcafd05eef9809632402241eb44cd859a3652f43a35323da9", + "pdfPageNumbers": [3], + "pdfParser": "number-name-pin-function-table", + "htmlUnavailableReason": "pin-table-not-found", + "htmlUnavailableMessage": "TI's Pin Configuration and Functions section has no parseable HTML pin-function table." + }, + "TPD2E007": { + "family": "TPD2E007", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPD2E007DCKR", + "packageDescription": "SOT-323", + "packageCode": "DCK", + "expectedPinCount": 3, + "selectionReason": "jlcpcb-numeric-physical-labels", + "pinLabelSourcePath": "lib/chips/TPD2E007DCKR.circuit.tsx", + "pinLabelCount": 3, + "coordinateLabelCount": 0, + "coordinateLabelRatio": 0, + "physicalOnlyPinCount": 3, + "physicalOnly": true, + "numericPhysicalOnly": true, + "inputFingerprint": "{\"family\":\"TPD2E007\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2E007DCKR\",\"packageDescription\":\"SOT-323\",\"packageCode\":\"DCK\",\"expectedPinCount\":3,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2E007DCKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.519Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPD2E007/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPD2E007/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / DCK, NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "3", + "name": "GND", + "type": "G", + "description": "Ground" + }, + { + "number": "1", + "name": "IO1", + "type": "IO", + "description": "ESD protected channel" + }, + { + "number": "2", + "name": "IO2", + "type": "IO", + "description": "ESD protected channel" + } + ], + "warnings": [] + }, + "TPD2S300": { + "family": "TPD2S300", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPD2S300YFFR", + "packageDescription": "DSBGA-9", + "packageCode": "YFF", + "expectedPinCount": 9, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TPD2S300YFFR.circuit.tsx", + "pinLabelCount": 9, + "coordinateLabelCount": 9, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 9, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TPD2S300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2S300YFFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YFF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2S300YFFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.583Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPD2S300/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPD2S300/datasheet/pin-configuration-and-functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "C_CC1", + "type": "I/O", + "description": "Connector side of the CC1 OVP FET. Connect to either CC pin of the USB Type-C connector" + }, + { + "number": "A2", + "name": "VBIAS", + "type": "Power", + "description": "Pin for ESD support capacitor. Place a 0.1-µF capacitor on this pin to ground" + }, + { + "number": "A3", + "name": "C_CC2", + "type": "I/O", + "description": "Connector side of the CC2 OVP FET. Connect to either CC pin of the USB Type-C connector" + }, + { + "number": "B1", + "name": "CC1", + "type": "I/O", + "description": "System side of the CC1 OVP FET. Connect to either CC pin of the CC/PD controller" + }, + { + "number": "B2", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "B3", + "name": "CC2", + "type": "I/O", + "description": "System side of the CC2 OVP FET. Connect to either CC pin of the CC/PD controller" + }, + { + "number": "C1", + "name": "FLT", + "type": "O", + "description": "Open drain for fault reporting" + }, + { + "number": "C2", + "name": "VPWR", + "type": "Power", + "description": "2.7 V–4.5 V power supply" + }, + { + "number": "C3", + "name": "VM", + "type": "I", + "description": "Voltage mode pin. Place 2.7 V–4.5 V on pin to operate for CC, PD, and FRS. Place 8.7 V–22 V on pin to operate the device in low resistance mode as well" + } + ], + "warnings": [] + }, + "TPS1HC03-Q1": { + "family": "TPS1HC03-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS1HC03PQVAHRQ1", + "packageCode": "VAH", + "expectedPinCount": 11, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS1HC03-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS1HC03PQVAHRQ1\",\"packageCode\":\"VAH\",\"expectedPinCount\":11,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.700Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS1HC03-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS1HC03-Q1/datasheet/GUID-C5EE51A6-8B19-4AD8-A71C-7795611ACC4F", + "packageColumn": "PIN / NO.", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "1", + "name": "VOUT", + "type": "Power", + "description": "Output of high side switch, connect to load" + }, + { + "number": "2", + "name": "VBB", + "type": "Power", + "description": "Power supply" + }, + { + "number": "3", + "name": "ILIM", + "type": "Input", + "description": "Adjustable current limit. Connect a resistor from the pin to GND to set the current limit." + }, + { + "number": "4", + "name": "GND", + "type": "Power", + "description": "Ground of device. Connect to resistor-diode ground network to have reverse battery protection" + }, + { + "number": "5", + "name": "NC", + "type": "N/A", + "description": "No internal connection" + }, + { + "number": "6", + "name": "DIAG_EN", + "type": "Input", + "description": "Enable-disable pin for diagnostics, internal pulldown" + }, + { + "number": "7", + "name": "EN", + "type": "Input", + "description": "Input control for channel activation, internal pulldown" + }, + { + "number": "8", + "name": "NC", + "type": "N/A", + "description": "No internal connection" + }, + { + "number": "9", + "name": "SNS", + "type": "Output", + "description": "Analog current sense output corresponding to load current. Connect RSNS to ground to convert to a voltage. Also shows fault status by going high" + }, + { + "number": "10", + "name": "FLT", + "type": "Output", + "description": "Open drain global fault output. Referred to FAULT , FLT , or fault pin" + }, + { + "number": "11", + "name": "VOUT", + "type": "Power", + "description": "Output of high side switch, connect to load" + } + ], + "warnings": [] + }, + "TPS22910A": { + "family": "TPS22910A", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPS22910AYZVR", + "packageDescription": "DSBGA-4", + "packageCode": "YZV", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TPS22910AYZVR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TPS22910A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22910AYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22910AYZVR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.628Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22910A/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22910A/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "VOUT", + "type": "O", + "description": "Switch output" + }, + { + "number": "A2", + "name": "VIN", + "type": "I", + "description": "Switch input, use a bypass capacitor (ceramic) to ground." + }, + { + "number": "B1", + "name": "GND", + "type": "–", + "description": "Ground" + }, + { + "number": "B2", + "name": "ON", + "type": "I", + "description": "Switch control input. Do not leave floating" + } + ], + "warnings": [] + }, + "TPS22912C": { + "family": "TPS22912C", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPS22912CYZVR", + "packageDescription": "DSBGA-4", + "packageCode": "YZV", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TPS22912CYZVR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TPS22912C\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22912CYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22912CYZVR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.714Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22912C/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22912C/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "A1", + "name": "VOUT", + "type": "O", + "description": "Switch output" + }, + { + "number": "A2", + "name": "VIN", + "type": "I", + "description": "Switch input, use a bypass capacitor (ceramic) to ground." + }, + { + "number": "B1", + "name": "GND", + "type": "–", + "description": "Ground" + }, + { + "number": "B2", + "name": "ON", + "type": "I", + "description": "Switch control input. Do not leave floating" + } + ], + "warnings": [] + }, + "TPS22916": { + "family": "TPS22916", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPS22916BYFPR", + "packageDescription": "DSBGA-4(0.7x0.7)", + "packageCode": "YFP", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TPS22916BYFPR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TPS22916\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22916BYFPR\",\"packageDescription\":\"DSBGA-4(0.7x0.7)\",\"packageCode\":\"YFP\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22916BYFPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.810Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22916/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22916/datasheet/GUID-BEBC7A9B-2BFE-4B85-BE67-9C10E85E98DF", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "A1", + "name": "VOUT", + "type": "Power", + "description": "Switch output" + }, + { + "number": "A2", + "name": "VIN", + "type": "Power", + "description": "Switch input" + }, + { + "number": "B1", + "name": "GND", + "type": "Ground", + "description": "Device ground" + }, + { + "number": "B2", + "name": "ON", + "type": "Digital input", + "description": "Device enable" + } + ], + "warnings": [] + }, + "TPS22946": { + "family": "TPS22946", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TPS22946YZPR", + "packageDescription": "DSBGA-6", + "packageCode": "YZP", + "expectedPinCount": 6, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TPS22946YZPR.circuit.tsx", + "pinLabelCount": 6, + "coordinateLabelCount": 6, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 6, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TPS22946\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22946YZPR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22946YZPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.766Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22946/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22946/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NO.", + "tableClass": "gentable", + "pins": [ + { + "number": "A1", + "name": "VOUT", + "type": "O", + "description": "Output of the power switch" + }, + { + "number": "A2", + "name": "VIN", + "type": "I", + "description": "Supply. Input to the power switch and the supply voltage for the device" + }, + { + "number": "B1", + "name": "GND", + "type": "–", + "description": "Ground" + }, + { + "number": "B2", + "name": "CL", + "type": "I", + "description": "Current limit selection. CL high is 155-mA current limit, CL low is 70-mA current limit, and CL floating is 30-mA current limit." + }, + { + "number": "C1", + "name": "OC", + "type": "O", + "description": "Overcurrent output flag. Active-low open-drain output that indicates an overcurrent, supply undervoltage, or overtemperature state." + }, + { + "number": "C2", + "name": "ON", + "type": "I", + "description": "On/off control input" + } + ], + "warnings": [] + }, + "TPS22970": { + "family": "TPS22970", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS22970YZPR", + "packageCode": "YZP", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS22970\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS22970YZPR\",\"packageCode\":\"YZP\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.803Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22970/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22970/datasheet/pin-configuration-and-functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "D1", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "D2", + "name": "ON", + "type": "I", + "description": "Switch control input. Do not leave floating" + }, + { + "number": "A2", + "name": "VIN", + "type": "I", + "description": "Switch input" + }, + { + "number": "B2", + "name": "VIN", + "type": "I", + "description": "Switch input" + }, + { + "number": "C2", + "name": "VIN", + "type": "I", + "description": "Switch input" + }, + { + "number": "A1", + "name": "VOUT", + "type": "O", + "description": "Switch output" + }, + { + "number": "B1", + "name": "VOUT", + "type": "O", + "description": "Switch output" + }, + { + "number": "C1", + "name": "VOUT", + "type": "O", + "description": "Switch output" + } + ], + "warnings": [] + }, + "TPS22991": { + "family": "TPS22991", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS22991CNRAAR", + "packageCode": "RAA", + "expectedPinCount": 4, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS22991\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS22991CNRAAR\",\"packageCode\":\"RAA\",\"expectedPinCount\":4,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.897Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS22991/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22991/datasheet/GUID-B5D4BF08-934C-4963-9CE6-931A59D81373", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "VIN", + "type": "I", + "description": "Switch input." + }, + { + "number": "2", + "name": "ON", + "type": "I", + "description": "Active high switch control input." + }, + { + "number": "3", + "name": "VOUT", + "type": "O", + "description": "Switch output." + }, + { + "number": "4", + "name": "GND", + "type": "—", + "description": "Device ground." + } + ], + "warnings": [] + }, + "TPS24750": { + "family": "TPS24750", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS24750RUVR", + "packageCode": "RUV", + "expectedPinCount": 36, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS24750\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS24750RUVR\",\"packageCode\":\"RUV\",\"expectedPinCount\":36,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.944Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS24750/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS24750/datasheet/pin-configuration-and-functions-slvsc87595", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "5", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "14", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "15", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "16", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "17", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "18", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "27", + "name": "DRAIN", + "type": "I", + "description": "The drain of the internal pass MOSFET. Connect to a terminal of current sense resistor in the power path" + }, + { + "number": "33", + "name": "EN", + "type": "I", + "description": "Active high enable input. Logic input. Connects to resistor divider" + }, + { + "number": "30", + "name": "FLTb", + "type": "I", + "description": "Active-low, open-drain output indicates overload fault timer has turned internal FET off" + }, + { + "number": "25", + "name": "GATE", + "type": "I/O", + "description": "Gate driver output for the internal MOSFET" + }, + { + "number": "4", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "28", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "32", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "36", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "2", + "name": "IMON", + "type": "O", + "description": "Load current analog and current limit program point. Connect RIMON to ground" + }, + { + "number": "6", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "7", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "8", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "9", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "10", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "11", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "12", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "13", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "19", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "20", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "21", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "22", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "23", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "24", + "name": "OUT", + "type": "I/O", + "description": "Internally connect to the source of internal pass MOSFET. Connect to output capacitors and load" + }, + { + "number": "1", + "name": "OV", + "type": "I", + "description": "Overvoltage comparator input. Connects to resistor divider. GATE is pulled low when OV exceeds the threshold" + }, + { + "number": "31", + "name": "PGb", + "type": "O", + "description": "Active-low, open-drain power good indicator. Status is determined by the voltage across the MOSFET" + }, + { + "number": "34", + "name": "PROG", + "type": "I", + "description": "Power-limiting programming pin. A resistor from this pin to GND sets the maximum power dissipation for the internal pass MOSFET" + }, + { + "number": "26", + "name": "SENSE", + "type": "I", + "description": "Current sensing input for resistor shunt from VCC to SENSE. Connect to a terminal of current sense resistor" + }, + { + "number": "3", + "name": "SET", + "type": "I", + "description": "Current limit programming set pin. A resistor is connected from this pin to VCC" + }, + { + "number": "35", + "name": "TIMER", + "type": "I/O", + "description": "A capacitor connected from this pin to GND provides a fault timing function" + }, + { + "number": "29", + "name": "VCC", + "type": "I", + "description": "Input voltage sense and power supply" + } + ], + "warnings": [] + }, + "TPS2597": { + "family": "TPS2597", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS25972ARPWR", + "packageCode": "RPW", + "expectedPinCount": 10, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS2597\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS25972ARPWR\",\"packageCode\":\"RPW\",\"expectedPinCount\":10,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.918Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS2597/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS2597/datasheet/GUID-25EFE293-52ED-4363-A0FA-F66E0953A27E", + "packageColumn": "PIN / NO.", + "tableClass": "table wide-orientation frame-all", + "pins": [ + { + "number": "1", + "name": "EN/UVLO", + "type": "Analog Input", + "description": "Active high enable for the device. A resistor divider on this pin from input supply to GND can be used to adjust the undervoltage lockout threshold. Do not leave floating. Refer to Undervoltage Lockout (UVLO and UVP) for details." + }, + { + "number": "2", + "name": "OVLO", + "type": "Analog Input", + "description": "TPS25970x and TPS25974x: A resistor divider on this pin from supply to GND can be used to adjust the overvoltage lockout threshold. This pin can also be used as an active low enable for the device. Do not leave floating. Refer to Overvoltage Lockout (OVLO) for details." + }, + { + "number": "3", + "name": "PG", + "type": "Digital Output", + "description": "TPS25972x and TPS25974x: Power-good indication. This is an open-drain signal, which is asserted high when the internal powerpath is fully turned ON and the PGTH input exceeds a certain threshold. Refer to Power Good Indication (PG) for more details." + }, + { + "number": "4", + "name": "FLT", + "type": "Digital Output", + "description": "TPS25970x: Active low fault event indicator. This pin is an open-drain signal that is pulled low when a fault is detected. Refer to Fault Response and Indication (FLT) for more details." + }, + { + "number": "5", + "name": "IN", + "type": "Power", + "description": "Power input" + }, + { + "number": "6", + "name": "OUT", + "type": "Power", + "description": "Power output" + }, + { + "number": "7", + "name": "DVDT", + "type": "Analog Output", + "description": "A capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn on slew rate. Refer to Slew Rate (dVdt) and Inrush Current Control for details." + }, + { + "number": "8", + "name": "GND", + "type": "Ground", + "description": "This pin is the ground reference for all internal circuits and must be connected to system GND." + }, + { + "number": "9", + "name": "ILM", + "type": "Analog Output", + "description": "This pin is a dual function pin used to limit and monitor the output current. An external resistor from this pin to GND sets the output current limit threshold during start-up as well as steady state. The pin voltage can also be used as analog output load current monitor signal. Do not leave floating. Refer to Circuit-Breaker or Active Current Limiting for more details." + }, + { + "number": "10", + "name": "ITIMER", + "type": "Analog Output", + "description": "A capacitor from this pin to GND sets the overcurrent blanking interval during which the output current can temporarily exceed set current limit (but lower than fast-trip threshold) before the device overcurrent response takes action. Leave this pin open for the fastest response to overcurrent events. Refer to Circuit-Breaker or Active Current Limiting for more details." + } + ], + "warnings": [ + "Pin 2 appears more than once with conflicting data; kept the first row.", + "Pin 3 appears more than once with conflicting data; kept the first row.", + "Pin 4 appears more than once with conflicting data; kept the first row." + ] + }, + "TPS2HC08-Q1": { + "family": "TPS2HC08-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS2HC08PQVAHRQ1", + "packageCode": "VAH", + "expectedPinCount": 11, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS2HC08-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS2HC08PQVAHRQ1\",\"packageCode\":\"VAH\",\"expectedPinCount\":11,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:16.953Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS2HC08-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS2HC08-Q1/datasheet/GUID-6F681D0A-2DAA-43B9-BDCB-E81A1480B48C", + "packageColumn": "PIN / NO.", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "1", + "name": "VOUT1", + "type": "Power", + "description": "Channel 1 output, connect to load." + }, + { + "number": "2", + "name": "VBB", + "type": "Power", + "description": "Power supply." + }, + { + "number": "3", + "name": "ILIM", + "type": "Output", + "description": "Adjustable current limit. Connect RLIM to GND to set the current limit." + }, + { + "number": "4", + "name": "GND", + "type": "Power", + "description": "Ground of device. Connect to resistor-diode ground network to have reverse battery protection." + }, + { + "number": "5", + "name": "SEL", + "type": "Input", + "description": "Selects the channel to output on the SNS pin." + }, + { + "number": "6", + "name": "DIAG_EN", + "type": "Input", + "description": "Enable-disable pin for diagnostics, internal pulldown." + }, + { + "number": "7", + "name": "EN1", + "type": "Input", + "description": "Input control for channel 1 activation, internal pulldown." + }, + { + "number": "8", + "name": "EN2", + "type": "Input", + "description": "Input control for channel 2 activation, internal pulldown." + }, + { + "number": "9", + "name": "SNS", + "type": "Output", + "description": "Analog current sense output corresponding to load current. Connect RSNS to ground to convert to a voltage. Also shows fault status by going high." + }, + { + "number": "10", + "name": "FLT", + "type": "Output", + "description": "Open drain global fault output. Referred to FAULT, FLT, or fault pin." + }, + { + "number": "11", + "name": "VOUT2", + "type": "Power", + "description": "Channel 2 output, connect to load." + } + ], + "warnings": [] + }, + "TPS2HC16-Q1": { + "family": "TPS2HC16-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS2HC16PQVAHRQ1", + "packageCode": "VAH", + "expectedPinCount": 11, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS2HC16-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS2HC16PQVAHRQ1\",\"packageCode\":\"VAH\",\"expectedPinCount\":11,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.004Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS2HC16-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS2HC16-Q1/datasheet/GUID-04A48C5B-3B26-4DA0-A42E-34F396DE5D38", + "packageColumn": "PIN / NO.", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "1", + "name": "VOUT1", + "type": "Power", + "description": "Channel 1 output, connect to load" + }, + { + "number": "2", + "name": "VBB", + "type": "Power", + "description": "Power supply" + }, + { + "number": "3", + "name": "ILIM", + "type": "Input", + "description": "Adjustable current limit. Connect a resistor from the pin to GND to set the current limit." + }, + { + "number": "4", + "name": "GND", + "type": "Power", + "description": "Ground of device. Connect to resistor-diode ground network to have reverse battery protection" + }, + { + "number": "5", + "name": "SEL", + "type": "Input", + "description": "Selects the channel to output on the SNS pin" + }, + { + "number": "6", + "name": "DIAG_EN", + "type": "Input", + "description": "Enable-disable pin for diagnostics, internal pulldown" + }, + { + "number": "7", + "name": "EN1", + "type": "Input", + "description": "Input control for channel 1 activation, internal pulldown" + }, + { + "number": "8", + "name": "EN2", + "type": "Input", + "description": "Input control for channel 2 activation, internal pulldown" + }, + { + "number": "9", + "name": "SNS", + "type": "Output", + "description": "Analog current sense output corresponding to load current. Connect RSNS to ground to convert to a voltage. Also shows fault status by going high" + }, + { + "number": "10", + "name": "FLT", + "type": "Output", + "description": ", Open drain global fault output. Referred to FAULT, FLT, or fault pin, ," + }, + { + "number": "11", + "name": "VOUT2", + "type": "Power", + "description": "Channel 2 output, connect to load" + } + ], + "warnings": [] + }, + "TPS3424": { + "family": "TPS3424", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS3424A11C13ADRLR", + "packageCode": "DRL", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS3424\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS3424A11C13ADRLR\",\"packageCode\":\"DRL\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.094Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS3424/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS3424/datasheet/GUID-5EA0F6DC-312E-4372-8DC8-20F186945343", + "packageColumn": "TPS3424 / 8 PIN SOT-5X3", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "PB", + "type": "I", + "description": "Push-button input, refer Section 7.3.1.1 for additional details." + }, + { + "number": "2", + "name": "GND", + "type": "-", + "description": "Ground connection for IC." + }, + { + "number": "3", + "name": "VDD", + "type": "I", + "description": "Supply connection, connect a 0.1µF capacitor near the pin for best performance." + }, + { + "number": "4", + "name": "SPT", + "type": "", + "description": "Connect capacitor to program short press time as described in Section 7.3.1.1 for SPT Cap version." + }, + { + "number": "5", + "name": "LPT", + "type": "O", + "description": "Connect capacitor to program long press time as described in Section 7.3.1.1 for LPT Cap version." + }, + { + "number": "6", + "name": "RESET/ RESET", + "type": "O", + "description": "RESET output for the device. The response of RESET to short press and long press is described in Section 7.3.2.2 ." + }, + { + "number": "7", + "name": "INT", + "type": "O", + "description": "Interrupt output. INT is open drain active low output which toggles from every short press and long press on push-button input as described in Section 7.3.2.1" + }, + { + "number": "8", + "name": "KILL", + "type": "I", + "description": "Kill is feedback from the host. RESET can be de-asserted in the latched version by pulling KILL low. Connect this pin to VDD if not used. Please refer Section 7.3.1.3 for additional details." + } + ], + "warnings": [] + }, + "TPS3435": { + "family": "TPS3435", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS3435JFMAFDSER", + "packageCode": "DSE", + "expectedPinCount": 6, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS3435\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS3435JFMAFDSER\",\"packageCode\":\"DSE\",\"expectedPinCount\":6,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.067Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS3435/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS3435/datasheet/GUID-6651E90E-38B9-44F8-9183-C5F1703B922F", + "packageColumn": "PIN NUMBER / PINOUT J", + "tableClass": "table page-break", + "pins": [ + { + "number": "4", + "name": "GND", + "type": "—", + "description": "Ground pin" + }, + { + "number": "5", + "name": "WDO", + "type": "O", + "description": "Watchdog output. Connect WDO to VDD using pull up resistance when using open drain output. WDO is asserted when a watchdog error occurs or MR pin is driven LOW. See Section 7.3.3 for more details." + }, + { + "number": "1", + "name": "SET0", + "type": "I", + "description": "Logic input. SET0, SET1, and WD-EN pins select the watchdog timer scaling and enable-disable the watchdog; see Section 7.3.1.4 for more details." + }, + { + "number": "6", + "name": "VDD", + "type": "I", + "description": "Supply voltage pin. For noisy systems, connecting a 0.1µF bypass capacitor is recommended." + }, + { + "number": "2", + "name": "WD-EN", + "type": "I", + "description": "Logic input. Logic high input enables the watchdog monitoring feature. See Section 7.3.1.2 for more details." + }, + { + "number": "3", + "name": "WDI", + "type": "I", + "description": "Watchdog input. A falling transition (edge) must occur at this pin before the timeout expires in order for WDO to not assert. See Section 7.3.1 for more details." + } + ], + "warnings": [] + }, + "TPS389006": { + "family": "TPS389006", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS389006007RTER", + "packageCode": "RTE", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS389006\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS389006007RTER\",\"packageCode\":\"RTE\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.088Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS389006/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS389006/datasheet/GUID-3CBEA282-1774-4462-B4FB-D1D93A7A1732", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "MON3", + "type": "I", + "description": "Voltage monitor channel 3" + }, + { + "number": "2", + "name": "MON6", + "type": "I", + "description": "Voltage monitor channel 6" + }, + { + "number": "3", + "name": "MON4", + "type": "I", + "description": "Voltage monitor channel 4" + }, + { + "number": "4", + "name": "MON5", + "type": "I", + "description": "Voltage monitor channel 5" + }, + { + "number": "5", + "name": "ACT", + "type": "I", + "description": "Active high device enable" + }, + { + "number": "6", + "name": "GND", + "type": "-", + "description": "Power ground" + }, + { + "number": "7", + "name": "SLEEP", + "type": "I", + "description": "Active low sleep enable" + }, + { + "number": "8", + "name": "VDD", + "type": "-", + "description": "Power supply rail" + }, + { + "number": "9", + "name": "SYNC", + "type": "I/O", + "description": "Sequence logging synchronization across multiple devices" + }, + { + "number": "10", + "name": "MON2", + "type": "I", + "description": "Voltage monitor channel 2" + }, + { + "number": "11", + "name": "RS_1/2", + "type": "I", + "description": "Voltage monitor channel 1/2 remote sense" + }, + { + "number": "12", + "name": "MON1", + "type": "I", + "description": "Voltage monitor channel 1" + }, + { + "number": "13", + "name": "NIRQ", + "type": "O", + "description": "Active-low open-drain interrupt output" + }, + { + "number": "14", + "name": "ADDR", + "type": "I", + "description": "IC address select pin" + }, + { + "number": "15", + "name": "SDA", + "type": "I/O", + "description": "IC data pin" + }, + { + "number": "16", + "name": "SCL", + "type": "I", + "description": "IC clock pin" + }, + { + "number": "17", + "name": "GND", + "type": "-", + "description": "Exposed power ground pad" + } + ], + "warnings": ["Official TI pin count 17 does not match catalog pinCount 16."] + }, + "TPS65214": { + "family": "TPS65214", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS6521401VAFR", + "packageCode": "VAF", + "expectedPinCount": 24, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS65214\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS6521401VAFR\",\"packageCode\":\"VAF\",\"expectedPinCount\":24,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.103Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS65214/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS65214/datasheet/GUID-ECBE9781-7681-449C-BC7A-830A94AB6D33", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "1", + "name": "MODE/STBY", + "type": "I", + "description": "Configured as MODE: Connected to SoC or hard-wired pull-up/-down. Forces the Buck-converters into PWM or permits auto-entry in PFM-mode." + }, + { + "number": "2", + "name": "FB_B2", + "type": "I", + "description": "Feedback Input for Buck2. Connect to Buck2 output filter. Nominal output voltage is configured by NVM ." + }, + { + "number": "3", + "name": "VLDO2", + "type": "PWR", + "description": "Output Voltage of LDO2. Nominal output voltage is configured by NVM . Bypass this pin to ground with a 2.2µF or greater ceramic capacitor." + }, + { + "number": "4", + "name": "VSYS/PVIN_LDO12", + "type": "PWR", + "description": "Input supply for reference system and power input for LDO1 and LDO2. Bypass this pin to ground with a 4.7μF or greater ceramic capacitor." + }, + { + "number": "5", + "name": "VLDO1", + "type": "PWR", + "description": "Output Voltage of LDO1. Nominal output voltage is configured by NVM . Bypass this pin to ground with a 2.2µF or greater ceramic capacitor." + }, + { + "number": "6", + "name": "AGND", + "type": "GND", + "description": "Ground pin for Analog GND" + }, + { + "number": "7", + "name": "VDD1P8", + "type": "PWR", + "description": "Internal Reference Voltage: For device internal use only. Do not apply an external load. Bypass this pin to ground with a 2.2µF ceramic capacitor." + }, + { + "number": "8", + "name": "FB_B1", + "type": "I", + "description": "Feedback Input for Buck1. Connect to Buck1 output filter. Nominal output voltage is configured by NVM ." + }, + { + "number": "9", + "name": "GPO/nWAKEUP", + "type": "O", + "description": "Configured as GPO: General purpose open-drain output. Configurable in the power-up and power-down-sequence to enable an external rail." + }, + { + "number": "10", + "name": "PGND", + "type": "GND", + "description": "Power ground. This ground connection must be routed on PCB from both sides (Pin 10 and Pin 22). Connect the exposed pad to a continuous ground plane by multiple interconnect vias directly under the TPS65214 to maximize electrical and thermal conduction." + }, + { + "number": "11", + "name": "LX_B1", + "type": "PWR", + "description": "Switch Pin for Buck1. Connect one side of the Buck1-inductor to this pin." + }, + { + "number": "12", + "name": "PVIN_B1", + "type": "PWR", + "description": "Power Input for BUCK1. Bypass this pin to ground with a 4.7μF or greater ceramic capacitor. Voltage on PVIN_B1 pin must not exceed voltage on VSYS pin." + }, + { + "number": "13", + "name": "SDA", + "type": "I/O", + "description": "Data Pin for the I2C Serial Port. The I2C logic levels depend on the external pull-up voltage." + }, + { + "number": "14", + "name": "SCL", + "type": "I", + "description": "Clock Pin for the I2C Serial Port. The I2C logic levels depend on the external pull-up voltage." + }, + { + "number": "15", + "name": "nINT", + "type": "O", + "description": "Interrupt Request Output. Open-drain driver is pulled low for fault conditions. Released if bit is cleared." + }, + { + "number": "16", + "name": "GPIO/VSEL", + "type": "O", + "description": "Configured as GPO: General purpose open-drain output. Configurable in the power-up and power-down-sequence to enable an external rail." + }, + { + "number": "17", + "name": "nRSTOUT", + "type": "O", + "description": "Reset-output to SoC. Controlled by sequencer. High in ACTIVE state. Configurable level in STBY state." + }, + { + "number": "18", + "name": "FB_B3", + "type": "I", + "description": "Feedback Input for Buck3. Connect to Buck3 output filter. Nominal output voltage is configured by NVM ." + }, + { + "number": "19", + "name": "EN/PB/VSENSE", + "type": "I", + "description": "Configured as EN: Device enable pin, high level is ON-request, low-level is OFF-request." + }, + { + "number": "20", + "name": "PVIN_B3", + "type": "PWR", + "description": "Power Input for BUCK3. Bypass this pin to ground with a 4.7μF or greater ceramic capacitor. Voltage on PVIN_B3 pin must not exceed voltage on VSYS pin." + }, + { + "number": "21", + "name": "LX_B3", + "type": "PWR", + "description": "Switch Pin for Buck3. Connect one side of the Buck3-inductor to this pin." + }, + { + "number": "22", + "name": "PGND", + "type": "GND", + "description": "Power ground. This ground connection must be routed on PCB from both sides (Pin 10 and Pin 22). Connect the exposed pad to a continuous ground plane by multiple interconnect vias directly under the TPS65214 to maximize electrical and thermal conduction." + }, + { + "number": "23", + "name": "LX_B2", + "type": "PWR", + "description": "Switch Pin for Buck2. Connect one side of the Buck2-inductor to this pin." + }, + { + "number": "24", + "name": "PVIN_B2", + "type": "PWR", + "description": "Power Input for BUCK2. Bypass this pin to ground with a 4.7μF or greater ceramic capacitor. Voltage on PVIN_B2 pin must not exceed voltage on VSYS pin." + } + ], + "warnings": [ + "Pin 1 appears more than once with conflicting data; kept the first row.", + "Pin 9 appears more than once with conflicting data; kept the first row.", + "Pin 16 appears more than once with conflicting data; kept the first row.", + "Pin 19 appears more than once with conflicting data; kept the first row." + ] + }, + "TPS65224-Q1": { + "family": "TPS65224-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS6522430RAHRQ1", + "packageCode": "RAH", + "expectedPinCount": 36, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS65224-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS6522430RAHRQ1\",\"packageCode\":\"RAH\",\"expectedPinCount\":36,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.112Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS65224-Q1/datasheet", + "status": "ok", + "warnings": [ + "Official TI PDF fallback unavailable: No supported pin table or text diagram was found in the official PDF extraction.", + "Recovered 36/36 physical pins from the official TI PDF." + ], + "pdfFallback": { + "status": "unavailable", + "url": "https://www.ti.com/lit/gpn/TPS65224-Q1", + "reason": "No supported pin table or text diagram was found in the official PDF extraction.", + "candidateCounts": [] + }, + "sectionUrl": "https://www.ti.com/lit/pdf/SLVUCU6A#page=12", + "packageColumn": "RAH official PDF evidence", + "tableClass": "official-ti-pdf/official-pdf-evidence-override", + "pins": [ + { + "number": "1", + "name": "SCL_I2C1/SCK_SPI", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "2", + "name": "SDA_I2C1/SDI_SPI", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "3", + "name": "VCCA", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "4", + "name": "FB_B1", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "5", + "name": "AGND", + "type": "GND", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "6", + "name": "FB_B2", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "7", + "name": "VOUT_LDOVINT", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "8", + "name": "GPIO3", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "9", + "name": "VMON1", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "10", + "name": "GPIO4", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "11", + "name": "GPIO5", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "12", + "name": "PVIN_B3", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "13", + "name": "SW_B3", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "14", + "name": "PGND_B34", + "type": "GND", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "15", + "name": "SW_B4", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "16", + "name": "PVIN_B4", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "17", + "name": "EN/PB/VSENSE", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "18", + "name": "VIO", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "19", + "name": "VOUT_LDO1", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "20", + "name": "PVIN_LDO12", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "21", + "name": "VOUT_LDO2", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "22", + "name": "FB_B4", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "23", + "name": "AGND", + "type": "GND", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "24", + "name": "FB_B3", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "25", + "name": "VOUT_LDO3", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "26", + "name": "PVIN_LDO3", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "27", + "name": "N_INT/EN_DRV", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "28", + "name": "N_RSTOUT", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "29", + "name": "GPIO6", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "30", + "name": "PVIN_B2", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "31", + "name": "SW_B2", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "32", + "name": "PGND_B12", + "type": "GND", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "33", + "name": "SW_B1", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "34", + "name": "PVIN_B1", + "type": "PWR", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "35", + "name": "GPIO1/SDA_I2C2/SDO_SPI", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + }, + { + "number": "36", + "name": "GPIO2/SCL_I2C2/CS0_SPI", + "type": "", + "description": "Official TPS65224-Q1 RAH package EVM schematic assignment" + } + ], + "pinDataSource": "ti-official-pdf", + "pdfUrl": "https://www.ti.com/lit/pdf/SLVUCU6A", + "pdfPageNumbers": [12], + "pdfParser": "official-pdf-evidence-override", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for TPS65224-Q1 has neither a Pin/Terminal Functions section nor a RAH package pin-map link." + }, + "TPS653853-Q1": { + "family": "TPS653853-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "O3853QDCARQ1", + "packageCode": "DCA", + "expectedPinCount": 48, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS653853-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"O3853QDCARQ1\",\"packageCode\":\"DCA\",\"expectedPinCount\":48,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.490Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS653853-Q1/datasheet", + "status": "ok", + "warnings": [ + "Official TI PDF fallback unavailable: No supported pin table or text diagram was found in the official PDF extraction.", + "Recovered 49 physical contacts from TI-linked exact O3853QDCARQ1 DCA symbol preview, visually transcribed pin number/name pairs.", + "User-authorized visual-inspection exception: only factual pin number/name pairs were transcribed; no third-party SVG or CAD model is committed or reused. Pin 49 remains PAD and is not inferred to be ground." + ], + "pdfFallback": { + "status": "unavailable", + "url": "https://www.ti.com/lit/gpn/TPS653853-Q1", + "reason": "No supported pin table or text diagram was found in the official PDF extraction.", + "candidateCounts": [] + }, + "sectionUrl": "https://vendor.ultralibrarian.com/TI/embedded/?gpn=TPS653853-Q1&package=DCA&pin=48", + "packageColumn": "DCA exact O3853QDCARQ1", + "tableClass": "ti-linked-cad-preview-visual-inspection", + "pins": [ + { + "number": "1", + "name": "ENDRV", + "type": "", + "description": "" + }, + { + "number": "2", + "name": "PGND1", + "type": "GND", + "description": "" + }, + { + "number": "3", + "name": "PGND1", + "type": "GND", + "description": "" + }, + { + "number": "4", + "name": "L1", + "type": "", + "description": "" + }, + { + "number": "5", + "name": "L1", + "type": "", + "description": "" + }, + { + "number": "6", + "name": "BST1", + "type": "", + "description": "" + }, + { + "number": "7", + "name": "PGND1", + "type": "GND", + "description": "" + }, + { + "number": "8", + "name": "VBATP", + "type": "PWR", + "description": "" + }, + { + "number": "9", + "name": "VCP", + "type": "PWR", + "description": "" + }, + { + "number": "10", + "name": "CP1", + "type": "", + "description": "" + }, + { + "number": "11", + "name": "CP2", + "type": "", + "description": "" + }, + { + "number": "12", + "name": "ERROR_WDI", + "type": "", + "description": "" + }, + { + "number": "13", + "name": "GND", + "type": "GND", + "description": "" + }, + { + "number": "14", + "name": "VDD5", + "type": "PWR", + "description": "" + }, + { + "number": "15", + "name": "SEL_VDD3_5", + "type": "", + "description": "" + }, + { + "number": "16", + "name": "NRES", + "type": "", + "description": "" + }, + { + "number": "17", + "name": "DIAG_OUT", + "type": "", + "description": "" + }, + { + "number": "18", + "name": "IGN", + "type": "", + "description": "" + }, + { + "number": "19", + "name": "VSOUT1", + "type": "", + "description": "" + }, + { + "number": "20", + "name": "VSOUT2_CPSW", + "type": "", + "description": "" + }, + { + "number": "21", + "name": "SIN_P", + "type": "", + "description": "" + }, + { + "number": "22", + "name": "SIN_N_O", + "type": "", + "description": "" + }, + { + "number": "23", + "name": "SIN_P_O", + "type": "", + "description": "" + }, + { + "number": "24", + "name": "SIN_N", + "type": "", + "description": "" + }, + { + "number": "25", + "name": "COS_N", + "type": "", + "description": "" + }, + { + "number": "26", + "name": "COS_P_O", + "type": "", + "description": "" + }, + { + "number": "27", + "name": "COS_N_O", + "type": "", + "description": "" + }, + { + "number": "28", + "name": "COS_P", + "type": "", + "description": "" + }, + { + "number": "29", + "name": "VSOUT2", + "type": "", + "description": "" + }, + { + "number": "30", + "name": "VBAT_SAFING", + "type": "PWR", + "description": "" + }, + { + "number": "31", + "name": "CANWU", + "type": "", + "description": "" + }, + { + "number": "32", + "name": "VTRACK", + "type": "", + "description": "" + }, + { + "number": "33", + "name": "SCLK", + "type": "", + "description": "" + }, + { + "number": "34", + "name": "SDO", + "type": "", + "description": "" + }, + { + "number": "35", + "name": "SDI", + "type": "", + "description": "" + }, + { + "number": "36", + "name": "NCS", + "type": "", + "description": "" + }, + { + "number": "37", + "name": "VDDIO", + "type": "PWR", + "description": "" + }, + { + "number": "38", + "name": "VDD3_5", + "type": "PWR", + "description": "" + }, + { + "number": "39", + "name": "VDD6_FB", + "type": "PWR", + "description": "" + }, + { + "number": "40", + "name": "VDD6", + "type": "PWR", + "description": "" + }, + { + "number": "41", + "name": "LGND", + "type": "GND", + "description": "" + }, + { + "number": "42", + "name": "VREG", + "type": "PWR", + "description": "" + }, + { + "number": "43", + "name": "BST2", + "type": "", + "description": "" + }, + { + "number": "44", + "name": "L2", + "type": "", + "description": "" + }, + { + "number": "45", + "name": "L2", + "type": "", + "description": "" + }, + { + "number": "46", + "name": "PGND2", + "type": "GND", + "description": "" + }, + { + "number": "47", + "name": "PGND2", + "type": "GND", + "description": "" + }, + { + "number": "48", + "name": "VBATL", + "type": "PWR", + "description": "" + }, + { + "number": "49", + "name": "PAD", + "type": "", + "description": "" + } + ], + "pinDataSource": "ti-linked-cad-preview-visual-inspection", + "evidenceUrls": [ + "https://vendor.ultralibrarian.com/TI/embedded/?gpn=TPS653853-Q1&package=DCA&pin=48", + "https://static.ultralibrarian.com/part-previews/symbols/5165398/1-1-TPS653853-Q1DCA.svg" + ], + "evidenceNote": "User-authorized visual-inspection exception: only factual pin number/name pairs were transcribed; no third-party SVG or CAD model is committed or reused. Pin 49 remains PAD and is not inferred to be ground.", + "htmlUnavailableReason": "pin-section-not-found", + "htmlUnavailableMessage": "TI's HTML datasheet for TPS653853-Q1 has neither a Pin/Terminal Functions section nor a DCA package pin-map link." + }, + "TPS65930": { + "family": "TPS65930", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS65930A2ZCHR", + "packageCode": "ZCH", + "expectedPinCount": 139, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS65930\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS65930A2ZCHR\",\"packageCode\":\"ZCH\",\"expectedPinCount\":139,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.268Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS65930/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS65930/datasheet/terminal_configuration_and_functions", + "packageColumn": "TPS65930 BALL", + "tableClass": "gentable", + "pins": [ + { + "number": "H2", + "name": "ADCIN0", + "type": "I/O", + "description": "Battery type" + }, + { + "number": "F2", + "name": "ADCIN2", + "type": "I", + "description": "General-purpose ADC input" + }, + { + "number": "M5", + "name": "PCHGAC", + "type": "I", + "description": "AC precharge sense signal. Also used for EEPROM." + }, + { + "number": "N1", + "name": "VPRECH", + "type": "O", + "description": "Precharge regulator output" + }, + { + "number": "N5", + "name": "VBAT", + "type": "Power", + "description": "Battery voltage sensing" + }, + { + "number": "F7", + "name": "GPIO0/CD1", + "type": "I/O", + "description": "GPIO0/card detection 1" + }, + { + "number": "E7", + "name": "GPIO1", + "type": "I/O", + "description": "GPIO1" + }, + { + "number": "P2", + "name": "GPIO2", + "type": "I/O", + "description": "GPIO2" + }, + { + "number": "P13", + "name": "GPIO15", + "type": "I/O", + "description": "GPIO15" + }, + { + "number": "L5", + "name": "GPIO6", + "type": "I/O", + "description": "GPIO6" + }, + { + "number": "J7", + "name": "GPIO7", + "type": "I/O", + "description": "GPIO7" + }, + { + "number": "D8", + "name": "SYSEN", + "type": "Open drain/I", + "description": "System enable output" + }, + { + "number": "A4", + "name": "CLKEN", + "type": "O", + "description": "Clock enable" + }, + { + "number": "B13", + "name": "CLKREQ", + "type": "I", + "description": "Clock request" + }, + { + "number": "C10", + "name": "INT1", + "type": "O", + "description": "Output interrupt line 1" + }, + { + "number": "C8", + "name": "NRESPWRON", + "type": "O", + "description": "Output control the NRESPWRON of the application processor" + }, + { + "number": "B9", + "name": "NRESWARM", + "type": "I", + "description": "Input; detect user action on the reset button" + }, + { + "number": "D10", + "name": "PWRON", + "type": "I", + "description": "Input; detect a control command to start or stop the system" + }, + { + "number": "G5", + "name": "NSLEEP1", + "type": "I", + "description": "Sleep request from device 1" + }, + { + "number": "E10", + "name": "CLK256FS", + "type": "O", + "description": "" + }, + { + "number": "E4", + "name": "VMODE1", + "type": "I", + "description": "Digital voltage scaling linked with VDD1" + }, + { + "number": "E8", + "name": "BOOT0", + "type": "I", + "description": "Boot pin 0" + }, + { + "number": "D7", + "name": "BOOT1", + "type": "I", + "description": "Boot pin 1" + }, + { + "number": "B8", + "name": "REGEN", + "type": "Open drain", + "description": "Enable signal for external LDO" + }, + { + "number": "H4", + "name": "MSECURE", + "type": "I", + "description": "Security and digital rights management" + }, + { + "number": "L13", + "name": "VREF", + "type": "Power", + "description": "Reference voltage" + }, + { + "number": "K13", + "name": "AGND", + "type": "Power GND", + "description": "Analog ground for reference voltage" + }, + { + "number": "B3", + "name": "N.C.", + "type": "", + "description": "Not connected" + }, + { + "number": "C5", + "name": "VMODE2", + "type": "I", + "description": "Digital voltage scaling linked with VDD2" + }, + { + "number": "C3", + "name": "I2C.CNTL.SDA", + "type": "I/O", + "description": "General-purpose IC data" + }, + { + "number": "B4", + "name": "I2C.CNTL.SCL", + "type": "I/O", + "description": "General-purpose IC clock" + }, + { + "number": "H3", + "name": "I2S.CLK", + "type": "I/O", + "description": "Clock signal (audio port)" + }, + { + "number": "K2", + "name": "I2S.SYNC", + "type": "I/O", + "description": "Synchronization signal (audio port)" + }, + { + "number": "K4", + "name": "I2S.DIN", + "type": "I", + "description": "Data receive (audio port)" + }, + { + "number": "K3", + "name": "I2S.DOUT", + "type": "O", + "description": "Data transmit (audio port)" + }, + { + "number": "D1", + "name": "MIC.MAIN.P", + "type": "I", + "description": "Main microphone left input (P)" + }, + { + "number": "E1", + "name": "MIC.MAIN.M", + "type": "I", + "description": "Main microphone left input (M)" + }, + { + "number": "A10", + "name": "VBAT.RIGHT", + "type": "Power", + "description": "Battery voltage input" + }, + { + "number": "A7", + "name": "PreDriv.LEFT", + "type": "O", + "description": "Predriver output left P for external class-D amplifier" + }, + { + "number": "A8", + "name": "PreDriv.RIGHT", + "type": "O", + "description": "Predriver output right P for external class-D amplifier" + }, + { + "number": "G1", + "name": "AUXR", + "type": "I", + "description": "Auxiliary audio input right" + }, + { + "number": "E2", + "name": "MICBIAS1., OUT", + "type": "Power", + "description": "Analog microphone bias 1" + }, + { + "number": "D2", + "name": "MICBIAS.GND", + "type": "Power GND", + "description": "Dedicated ground for microphones" + }, + { + "number": "G2", + "name": "AVSS1", + "type": "Power GND", + "description": "Analog ground" + }, + { + "number": "L7", + "name": "AVSS2", + "type": "Power GND", + "description": "Analog ground" + }, + { + "number": "N14", + "name": "AVSS3", + "type": "Power GND", + "description": "Analog ground" + }, + { + "number": "C7", + "name": "AVSS4", + "type": "Power GND", + "description": "Analog ground" + }, + { + "number": "M10", + "name": "32KCLKOUT", + "type": "O", + "description": "Buffered output of the 32-kHz digital clock" + }, + { + "number": "L14", + "name": "32KXIN", + "type": "I", + "description": "Input of the 32-kHz oscillator" + }, + { + "number": "K14", + "name": "32KXOUT", + "type": "O", + "description": "Output of the 32-kHz oscillator" + }, + { + "number": "A11", + "name": "HFCLKIN", + "type": "I", + "description": "Input of the digital (or sine) HS clock" + }, + { + "number": "M11", + "name": "HFCLKOUT", + "type": "O", + "description": "HS clock output" + }, + { + "number": "P8", + "name": "VBUS", + "type": "Power", + "description": "VBUS power rail" + }, + { + "number": "N10", + "name": "DP/ UART3.RXD", + "type": "I/O", + "description": "USB data P/USB carkit receive data/universal asynchronous receiver/transmitter (UART)3 receive data" + }, + { + "number": "P10", + "name": "DN/ UART3.TXD", + "type": "I/O", + "description": "USB data N/USB carkit transmit data/UART3 transmit data" + }, + { + "number": "G6", + "name": "ID", + "type": "I/O", + "description": "USB ID" + }, + { + "number": "K11", + "name": "UCLK", + "type": "I", + "description": "HS USB clock" + }, + { + "number": "H12", + "name": "STP", + "type": "I", + "description": "HS USB stop" + }, + { + "number": "H11", + "name": "DIR", + "type": "O", + "description": "HS USB direction" + }, + { + "number": "J8", + "name": "NXT", + "type": "O", + "description": "HS USB next" + }, + { + "number": "L10", + "name": "DATA0", + "type": "I/O", + "description": "HS USB Data0" + }, + { + "number": "K10", + "name": "DATA1", + "type": "I/O", + "description": "HS USB Data1" + }, + { + "number": "G11", + "name": "DATA2", + "type": "I/O", + "description": "HS USB Data2" + }, + { + "number": "G10", + "name": "DATA3", + "type": "I/O", + "description": "HS USB Data3" + }, + { + "number": "E12", + "name": "DATA4", + "type": "I/O", + "description": "HS USB Data4" + }, + { + "number": "G9", + "name": "DATA5", + "type": "I/O", + "description": "HS USB Data5" + }, + { + "number": "G12", + "name": "DATA6", + "type": "I/O", + "description": "HS USB Data6" + }, + { + "number": "E11", + "name": "DATA7", + "type": "I/O", + "description": "HS USB Data7" + }, + { + "number": "P14", + "name": "TEST.RESET", + "type": "I", + "description": "Reset T2 device (except power state-machine)" + }, + { + "number": "P1", + "name": "TESTV1", + "type": "I/O", + "description": "Analog test" + }, + { + "number": "A14", + "name": "TESTV2", + "type": "I/O", + "description": "Analog test" + }, + { + "number": "A1", + "name": "TEST", + "type": "I", + "description": "Selection between JTAG mode and application mode for JTAG/GPIOs (with PU or PD)" + }, + { + "number": "A13", + "name": "JTAG.TDI/ BERDATA", + "type": "I", + "description": "JTAG.TDI/BERDATA" + }, + { + "number": "B14", + "name": "JTAG.TCK/ BERCLK", + "type": "I", + "description": "JTAG.TCK/BERCLK" + }, + { + "number": "P7", + "name": "CP.IN", + "type": "Power", + "description": "Charge pump input voltage" + }, + { + "number": "N7", + "name": "CP.CAPP", + "type": "O", + "description": "Charge pump flying capacitor P" + }, + { + "number": "N6", + "name": "CP.CAPM", + "type": "O", + "description": "Charge pump flying capacitor M" + }, + { + "number": "P5", + "name": "CP.GND", + "type": "Power GND", + "description": "Charge pump ground" + }, + { + "number": "N9", + "name": "VBAT.USB", + "type": "Power", + "description": "USB LDOs (VINTUSB1P5, VINTUSB1P8, VUSB.3P1) VBAT" + }, + { + "number": "M8", + "name": "VUSB.3P1", + "type": "Power", + "description": "USB LDO output" + }, + { + "number": "L1", + "name": "VAUX12S.IN", + "type": "Power", + "description": "VAUX1/VAUX2/VSIM LDO input voltage" + }, + { + "number": "N2", + "name": "VAUX2.OUT", + "type": "Power", + "description": "VAUX2 LDO output voltage" + }, + { + "number": "H14", + "name": "VPLLA3R.IN", + "type": "Power", + "description": "Input for VPLL1, VPLL2, VAUX3, and VRTC LDOs" + }, + { + "number": "K12", + "name": "VRTC.OUT", + "type": "Power", + "description": "VRTC internal LDO output (internal use only)" + }, + { + "number": "G14", + "name": "VPLL1.OUT", + "type": "Power", + "description": "LDO output voltage" + }, + { + "number": "A2", + "name": "VMMC1.IN", + "type": "Power", + "description": "VMMC1 LDO input voltage" + }, + { + "number": "B1", + "name": "VMMC1.OUT", + "type": "Power", + "description": "VMMC1 LDO output voltage" + }, + { + "number": "M7", + "name": "VINTUSB1P5. , OUT", + "type": "Power", + "description": "VINTUSB1P5 internal LDO output (internal use only)" + }, + { + "number": "N8", + "name": "VINTUSB1P8. , OUT", + "type": "Power", + "description": "VINTUSB1P8 internal LDO output (internal use only)" + }, + { + "number": "K1", + "name": "VDAC.IN", + "type": "Power", + "description": "Input for VDAC, VINTANA1, and VINTANA2 LDOs" + }, + { + "number": "L2", + "name": "VDAC.OUT", + "type": "Power", + "description": "Output voltage of the regulator" + }, + { + "number": "H13", + "name": "VINT.IN", + "type": "Power", + "description": "Input for VINTDIG LDO" + }, + { + "number": "H1", + "name": "VINTANA1., OUT", + "type": "Power", + "description": "VINTANA1 internal LDO output (internal use only)" + }, + { + "number": "J2", + "name": "VINTANA2., OUT", + "type": "Power", + "description": "VINTANA2 internal LDO output (internal use only)" + }, + { + "number": "A5", + "name": "VINTANA2., OUT", + "type": "Power", + "description": "VINTANA2 internal LDO output (internal use only)" + }, + { + "number": "J13", + "name": "VINTDIG.OUT", + "type": "Power", + "description": "VINTDIG internal LDO output (internal use only)" + }, + { + "number": "D13", + "name": "VDD1.IN", + "type": "Power", + "description": "VDD1 DC-DC input voltage" + }, + { + "number": "D12", + "name": "VDD1.IN", + "type": "Power", + "description": "VDD1 DC-DC input voltage" + }, + { + "number": "D14", + "name": "VDD1.IN", + "type": "Power", + "description": "VDD1 DC-DC input voltage" + }, + { + "number": "C11", + "name": "VDD1.SW", + "type": "O", + "description": "VDD1 DC-DC switch" + }, + { + "number": "C12", + "name": "VDD1.SW", + "type": "O", + "description": "VDD1 DC-DC switch" + }, + { + "number": "C13", + "name": "VDD1.SW", + "type": "O", + "description": "VDD1 DC-DC switch" + }, + { + "number": "E14", + "name": "VDD1.FB", + "type": "I", + "description": "VDD1 DC-DC output voltage (feedback)" + }, + { + "number": "A12", + "name": "VDD1.GND", + "type": "Power GND", + "description": "VDD1 DC-DC ground" + }, + { + "number": "B11", + "name": "VDD1.GND", + "type": "Power GND", + "description": "VDD1 DC-DC ground" + }, + { + "number": "B12", + "name": "VDD1.GND", + "type": "Power GND", + "description": "VDD1 DC-DC ground" + }, + { + "number": "M13", + "name": "VDD2.IN", + "type": "Power", + "description": "VDD2 DC-DC input voltage" + }, + { + "number": "M12", + "name": "VDD2.IN", + "type": "Power", + "description": "VDD2 DC-DC input voltage" + }, + { + "number": "N13", + "name": "VDD2.FB", + "type": "I", + "description": "VDD2 DC-DC output voltage (feedback)" + }, + { + "number": "N11", + "name": "VDD2.SW", + "type": "O", + "description": "VDD2 DC-DC switch" + }, + { + "number": "P11", + "name": "VDD2.SW", + "type": "O", + "description": "VDD2 DC-DC switch" + }, + { + "number": "N12", + "name": "VDD2.GND", + "type": "Power GND", + "description": "VDD2 DC-DC ground" + }, + { + "number": "P12", + "name": "VDD2.GND", + "type": "Power GND", + "description": "VDD2 DC-DC ground" + }, + { + "number": "M2", + "name": "VIO.IN", + "type": "Power", + "description": "VIO DC-DC input voltage" + }, + { + "number": "M3", + "name": "VIO.IN", + "type": "Power", + "description": "VIO DC-DC input voltage" + }, + { + "number": "M4", + "name": "VIO.FB", + "type": "I", + "description": "VIO DC-DC output voltage (feedback)" + }, + { + "number": "N4", + "name": "VIO.SW", + "type": "O", + "description": "VIO DC-DC switch" + }, + { + "number": "P4", + "name": "VIO.SW", + "type": "O", + "description": "VIO DC-DC switch" + }, + { + "number": "N3", + "name": "VIO.GND", + "type": "Power GND", + "description": "VIO DC-DC ground" + }, + { + "number": "P3", + "name": "VIO.GND", + "type": "Power GND", + "description": "VIO DC-DC ground" + }, + { + "number": "H9", + "name": "BKBAT", + "type": "Power", + "description": "Backup battery" + }, + { + "number": "B7", + "name": "IO.1P8", + "type": "Power", + "description": "TPS65920/TPS65930 device I/O input" + }, + { + "number": "H10", + "name": "DGND", + "type": "Power GND", + "description": "Digital ground" + }, + { + "number": "F13", + "name": "LEDGND", + "type": "Power GND", + "description": "LED driver ground" + }, + { + "number": "B10", + "name": "GPIO13", + "type": "I/O", + "description": "GPIO13" + }, + { + "number": "E13", + "name": "LEDA", + "type": "Open drain", + "description": "LED leg A" + }, + { + "number": "G13", + "name": "LEDB", + "type": "Open drain", + "description": "LED leg B" + }, + { + "number": "G4", + "name": "KPD.C0", + "type": "Open drain", + "description": "Keypad column 0" + }, + { + "number": "G3", + "name": "KPD.C1", + "type": "Open drain", + "description": "Keypad column 1" + }, + { + "number": "E5", + "name": "KPD.C2", + "type": "Open drain", + "description": "Keypad column 2" + }, + { + "number": "B2", + "name": "KPD.C3", + "type": "Open drain", + "description": "Keypad column 3" + }, + { + "number": "E3", + "name": "KPD.C4", + "type": "Open drain", + "description": "Keypad column 4" + }, + { + "number": "D5", + "name": "KPD.C5", + "type": "Open drain", + "description": "Keypad column 5" + }, + { + "number": "K7", + "name": "KPD.R0", + "type": "I", + "description": "Keypad row 0" + }, + { + "number": "H5", + "name": "KPD.R1", + "type": "I", + "description": "Keypad row 1" + }, + { + "number": "K5", + "name": "KPD.R2", + "type": "I", + "description": "Keypad row 2" + }, + { + "number": "H6", + "name": "KPD.R3", + "type": "I", + "description": "Keypad row 3" + }, + { + "number": "K8", + "name": "KPD.R4", + "type": "I", + "description": "Keypad row 4" + }, + { + "number": "L8", + "name": "KPD.R5", + "type": "I", + "description": "Keypad row 5" + } + ], + "warnings": [ + "Pin F7 appears more than once with conflicting data; kept the first row.", + "Pin E7 appears more than once with conflicting data; kept the first row.", + "Pin P2 appears more than once with conflicting data; kept the first row.", + "Pin P13 appears more than once with conflicting data; kept the first row.", + "Pin L5 appears more than once with conflicting data; kept the first row.", + "Pin J7 appears more than once with conflicting data; kept the first row.", + "Pin B3 appears more than once with conflicting data; kept the first row.", + "Pin C5 appears more than once with conflicting data; kept the first row.", + "Pin A7 appears more than once with conflicting data; kept the first row.", + "Pin A8 appears more than once with conflicting data; kept the first row.", + "Pin E2 appears more than once with conflicting data; kept the first row.", + "Pin H12 appears more than once with conflicting data; kept the first row.", + "Pin H11 appears more than once with conflicting data; kept the first row.", + "Pin J8 appears more than once with conflicting data; kept the first row.", + "Pin L10 appears more than once with conflicting data; kept the first row.", + "Pin K10 appears more than once with conflicting data; kept the first row.", + "Pin G11 appears more than once with conflicting data; kept the first row.", + "Pin G10 appears more than once with conflicting data; kept the first row.", + "Pin E12 appears more than once with conflicting data; kept the first row.", + "Pin G9 appears more than once with conflicting data; kept the first row.", + "Pin G12 appears more than once with conflicting data; kept the first row.", + "Pin E11 appears more than once with conflicting data; kept the first row.", + "Pin B10 appears more than once with conflicting data; kept the first row.", + "Pin E13 appears more than once with conflicting data; kept the first row.", + "Pin G13 appears more than once with conflicting data; kept the first row." + ] + }, + "TPS7A53B": { + "family": "TPS7A53B", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS7A5301BRPSR", + "packageCode": "RPS", + "expectedPinCount": 12, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS7A53B\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS7A5301BRPSR\",\"packageCode\":\"RPS\",\"expectedPinCount\":12,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.307Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS7A53B/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS7A53B/datasheet/GUID-D934E297-8846-4312-9CED-71E1AA16A1B6", + "packageColumn": "PIN / NO.", + "tableClass": "table standard-orientation", + "pins": [ + { + "number": "5", + "name": "BIAS", + "type": "I", + "description": "BIAS pin. This pin enables using low-input voltage, low-output (LILO) voltage conditions (that is, VIN = 1.2V, VOUT = 1V) to reduce power dissipation across the die. Using a BIAS voltage improves dc and ac performance for VIN ≤ 2.2V. A 1µF capacitor or larger must be connected between this pin and ground. If not used, this pin must be left floating or tied to ground." + }, + { + "number": "3", + "name": "EN", + "type": "I", + "description": "Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. This pin must be connected to IN or BIAS if not driven externally." + }, + { + "number": "9", + "name": "FB", + "type": "I", + "description": "Feedback pin. Although not required, use a 10nF feed-forward capacitor from FB to OUT (as close to the device as possible) to maximize ac performance. A feed-forward capacitor can disrupt power-good (PG) functionality. See the Adjustable Operation section for more details." + }, + { + "number": "6", + "name": "GND", + "type": "—", + "description": "Ground pin. These pins must be connected to ground and each other with a low-impedance connection." + }, + { + "number": "7", + "name": "GND", + "type": "—", + "description": "Ground pin. These pins must be connected to ground and each other with a low-impedance connection." + }, + { + "number": "12", + "name": "GND", + "type": "—", + "description": "Ground pin. These pins must be connected to ground and each other with a low-impedance connection." + }, + { + "number": "1", + "name": "IN", + "type": "I", + "description": "Input supply voltage pin. Use a 10µF or larger ceramic capacitor (5µF or greater of capacitance) from IN to ground to reduce input supply impedance. Place the input capacitor as close to the input as possible. See the Input and Output Capacitor Requirements section for more details." + }, + { + "number": "2", + "name": "IN", + "type": "I", + "description": "Input supply voltage pin. Use a 10µF or larger ceramic capacitor (5µF or greater of capacitance) from IN to ground to reduce input supply impedance. Place the input capacitor as close to the input as possible. See the Input and Output Capacitor Requirements section for more details." + }, + { + "number": "4", + "name": "NR/SS", + "type": "—", + "description": "Noise-reduction and soft-start pin. Connecting an external capacitor between this pin and ground reduces reference voltage noise and also enables the soft-start function. Although not required, connect a 10nF or larger capacitor from NR/SS to GND (as close to the pin as possible) to maximize ac performance. See the Noise-Reduction and Soft-Start Capacitor section for more details." + }, + { + "number": "10", + "name": "OUT", + "type": "O", + "description": "Regulated output pin. A 47µF or larger ceramic capacitor (25µF or greater of capacitance) from OUT to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT pin to the load. See the Input and Output Capacitor Requirements section for more details." + }, + { + "number": "11", + "name": "OUT", + "type": "O", + "description": "Regulated output pin. A 47µF or larger ceramic capacitor (25µF or greater of capacitance) from OUT to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT pin to the load. See the Input and Output Capacitor Requirements section for more details." + }, + { + "number": "8", + "name": "PG", + "type": "O", + "description": "Active-high, power-good pin. An open-drain output indicates when the output voltage reaches VIT(PG) of the target. A feed-forward capacitor can disrupt PG (power good) functionality. See the Power-Good Output section for more details." + } + ], + "warnings": [] + }, + "TPS7E71": { + "family": "TPS7E71", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS7E7101DBVR", + "packageCode": "DBV", + "expectedPinCount": 5, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS7E71\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS7E7101DBVR\",\"packageCode\":\"DBV\",\"expectedPinCount\":5,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.269Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS7E71/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPS7E71/datasheet/GUID-147C8F02-1C1F-4621-88C8-164534634425", + "packageColumn": "PIN / No. / DBV", + "tableClass": "table frame-all", + "pins": [ + { + "number": "2", + "name": "GND", + "type": "—", + "description": "Ground pin." + }, + { + "number": "1", + "name": "IN", + "type": "Input", + "description": "Input supply pin. See the Recommended Operating Conditions table and the Input and Output Capacitor Selection section for more information." + }, + { + "number": "5", + "name": "OUT", + "type": "Output", + "description": "Output of the regulator. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Input and Output Capacitor Selection section. Place the output capacitor as close to output of the device as possible." + }, + { + "number": "3", + "name": "EN", + "type": "Input", + "description": "Enable pin. Driving the enable pin high enables the device. Driving this pin low disables the device. High and low thresholds are listed in the Electrical Characteristics table. This pin has a weak internal pullup and can be left floating to enable the device or the pin can be connected to the input pin. Refer to the Enable (EN) section for more details." + }, + { + "number": "4", + "name": "NC/ADJ", + "type": "Input", + "description": "When using the adjustable device, this pin sets the output voltage with the help of a feedback divider. In the adjustable configuration, this pin must be connected through a resistor divider to the output for the device to function. If using a fixed output device, this pin is not internally connected and can either be left floating or connected to GND." + }, + { + "number": "Thermal pad", + "name": "Thermal pad", + "type": "Thermal pad", + "description": "Thermal pad. Connect the pad to GND for the best possible thermal performance. See the Layout section for more information." + } + ], + "warnings": ["Official TI pin count 6 does not match catalog pinCount 5."] + }, + "TPS92761-Q1": { + "family": "TPS92761-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPS92761QPHPRQ1", + "packageCode": "PHP", + "expectedPinCount": 48, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPS92761-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPS92761QPHPRQ1\",\"packageCode\":\"PHP\",\"expectedPinCount\":48,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.399Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPS92761-Q1/datasheet", + "status": "ok", + "warnings": [ + "Official TI PDF fallback unavailable: No supported pin table or text diagram was found in the official PDF extraction.", + "Recovered 49/48 physical pins from the official TI PDF.", + "Official PDF pin count 49 includes an exposed/thermal pad in addition to catalog pinCount 48." + ], + "pdfFallback": { + "status": "unavailable", + "url": "https://www.ti.com/lit/gpn/TPS92761-Q1", + "reason": "No supported pin table or text diagram was found in the official PDF extraction.", + "candidateCounts": [] + }, + "sectionUrl": "https://www.ti.com/lit/pdf/SLVUDE9#page=26", + "packageColumn": "PHP official PDF evidence", + "tableClass": "official-ti-pdf/official-pdf-evidence-override", + "pins": [ + { + "number": "1", + "name": "GND", + "type": "GND", + "description": "Official TPS92761-Q1 PHP package EVM schematic assignment" + }, + { + "number": "2", + "name": "LED6", + "type": "", + "description": "Official TPS92761-Q1 PHP package EVM schematic assignment" + }, + { + "number": "3", + "name": "LED5", + "type": "", + "description": "Official TPS92761-Q1 PHP package EVM schematic assignment" + }, + { + "number": "4", + "name": "LED4", + "type": "", + "description": "Official TPS92761-Q1 PHP package EVM schematic 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If unused, leave this pin floating." + }, + { + "number": "8", + "name": "SW", + "type": "PWR", + "description": "Switch pin of the converter, internally connected the inductor. For lowest EMI, leave this pin unconnected or solder this pin to a small pad for thermal improvement." + }, + { + "number": "9", + "name": "EN", + "type": "I", + "description": "Device enable pin. To enable the device, pull this pin high. Pulling this pin low disables the device. Do not leave this pin unconnected." + } + ], + "warnings": [] + }, + "TPSM82901": { + "family": "TPSM82901", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPSM82901SISR", + "packageCode": "SIS", + "expectedPinCount": 11, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPSM82901\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPSM82901SISR\",\"packageCode\":\"SIS\",\"expectedPinCount\":11,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.413Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPSM82901/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPSM82901/datasheet/GUID-14573D89-8FA0-41EB-BA27-94C3B8748DB6", + "packageColumn": "Pin / Number", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "VIN", + "type": "I", + "description": "Power supply input pin. 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An external capacitor connected from this pin to GND defines the rise time for the internal reference voltage. The pin can also be used as an input for tracking and sequencing. The pin can be left floating for the fastest ramp-up time." + }, + { + "number": "6", + "name": "PG", + "type": "O", + "description": "Open-drain power-good output. High = VOUT is ready. Low = VOUT is below nominal regulation. This pin requires a pullup resistor." + }, + { + "number": "7", + "name": "FB/VSET", + "type": "I", + "description": "Depends on device configuration (see Section 7.3.1 ) FB: Voltage feedback input. Connect a resistive output voltage divider to this pin. VSET: Output voltage setting pin. Connect a resistor to GND to choose the output voltage according to Table 7-3 ." + }, + { + "number": "8", + "name": "SW/NC", + "type": "NC", + "description": "Switch pin of the converter. Do not connect, leave floating." + }, + { + "number": "9", + "name": "VOUT", + "type": "O", + "description": "Output voltage pin. Connect directly to the positive pin of the output capacitor." + }, + { + "number": "10", + "name": "VOUT", + "type": "O", + "description": "Output voltage pin. Connect directly to the positive pin of the output capacitor." + }, + { + "number": "11", + "name": "GND", + "type": "—", + "description": "Ground pin. It must be connected directly to the common ground plane. It must be soldered to achieve appropriate power dissipation and mechanical reliability." + } + ], + "warnings": [] + }, + "TPSM863252": { + "family": "TPSM863252", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPSM863252RDXR", + "packageCode": "RDX", + "expectedPinCount": 7, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPSM863252\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPSM863252RDXR\",\"packageCode\":\"RDX\",\"expectedPinCount\":7,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.560Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPSM863252/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPSM863252/datasheet/GUID-20221121-SR0T-S39K-KWBW-CDDXBW3M7VHP", + "packageColumn": "Pin / NO.", + "tableClass": "table page-break", + "pins": [ + { + "number": "1", + "name": "VIN", + "type": "P", + "description": "Input voltage supply pin. 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Connect to the center tap of the resistor divider between output voltage and ground." + } + ], + "warnings": [ + "Pin 7 appears more than once with conflicting data; kept the first row." + ] + }, + "TPSM8A29": { + "family": "TPSM8A29", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TPSM8A29RDGR", + "packageCode": "RDG", + "expectedPinCount": 25, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TPSM8A29\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TPSM8A29RDGR\",\"packageCode\":\"RDG\",\"expectedPinCount\":25,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.534Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TPSM8A29/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TPSM8A29/datasheet/GUID-70747522-332D-4A1A-B3D5-B065346A9D0E", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "20", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "21", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "22", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "24", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "25", + "name": "PGND", + "type": "G", + "description": "Power ground of internal low-side MOSFET" + }, + { + "number": "2", + "name": "SW", + "type": "O", + "description": "Output switching terminal of the power converter. No external connection needed. Do not connect." + }, + { + "number": "3", + "name": "VCC", + "type": "I/O", + "description": "Internal 4.5-V LDO output. Float or connect to an external power supply between 4.75 V and 5.3 V to save the power losses on the internal LDO. The voltage source on this pin powers both the internal circuitry and gate driver. A 1-μF bypass capacitor is built in. No external bypass capacitors are required." + }, + { + "number": "4", + "name": "VIN", + "type": "P", + "description": "Power-supply input pins for the integrated power MOSFET pair and the internal LDO. Place the decoupling input capacitors from the VIN pins to PGND pins as close as possible." + }, + { + "number": "5", + "name": "VIN", + "type": "P", + "description": "Power-supply input pins for the integrated power MOSFET pair and the internal LDO. Place the decoupling input capacitors from the VIN pins to PGND pins as close as possible." + }, + { + "number": "16", + "name": "VIN", + "type": "P", + "description": "Power-supply input pins for the integrated power MOSFET pair and the internal LDO. Place the decoupling input capacitors from the VIN pins to PGND pins as close as possible." + }, + { + "number": "17", + "name": "VIN", + "type": "P", + "description": "Power-supply input pins for the integrated power MOSFET pair and the internal LDO. Place the decoupling input capacitors from the VIN pins to PGND pins as close as possible." + }, + { + "number": "23", + "name": "VIN", + "type": "P", + "description": "Power-supply input pins for the integrated power MOSFET pair and the internal LDO. Place the decoupling input capacitors from the VIN pins to PGND pins as close as possible." + }, + { + "number": "6", + "name": "BOOT", + "type": "I/O", + "description": "Supply rail for the high-side gate driver. A boot capacitor is integrated inside module. No external connection is needed. Do not connect." + }, + { + "number": "7", + "name": "MODE", + "type": "I", + "description": "The MODE pin sets Forced continuous-conduction mode (FCCM) or Skip-mode operation. It also selects the operating frequency by connecting a resistor from the MODE pin to AGND pin. ±1% tolerance resistor is recommended. See Table 7-1 for details." + }, + { + "number": "8", + "name": "AGND", + "type": "G", + "description": "Ground pin. Reference point for the internal control circuits" + }, + { + "number": "14", + "name": "AGND", + "type": "G", + "description": "Ground pin. Reference point for the internal control circuits" + }, + { + "number": "9", + "name": "TRIP", + "type": "I/O", + "description": "Current limit setting pin. Connect a resistor to AGND to set the current limit trip point. ±1% tolerance resistor is highly recommended. See Section 7.3.9 for details on the OCL setting." + }, + { + "number": "10", + "name": "VOUT", + "type": "O", + "description": "These pins are connected to the output terminal of inductor. Connect these pins to output bypass capacitors." + }, + { + "number": "11", + "name": "VOUT", + "type": "O", + "description": "These pins are connected to the output terminal of inductor. Connect these pins to output bypass capacitors." + }, + { + "number": "12", + "name": "FB", + "type": "I", + "description": "Output voltage feedback input. A resistor divider from the VOUT to VSNS– (tapped to FB pin) sets the output voltage." + }, + { + "number": "13", + "name": "VSNS–", + "type": "I", + "description": "The return connection for a remote voltage sensing configuration. It is also used as ground for the internal reference. Short to AGND for a single-end sense configuration." + }, + { + "number": "15", + "name": "SS/REFIN", + "type": "I/O", + "description": "Dual-function pin. Soft-start function: Connecting a capacitor to the VSNS– pin programs the soft-start time. Minimum soft-start time (1.5 ms) is fixed internally. REFIN function: The device always looks at the voltage on this SS/REFIN pin as the reference for the control loop. The internal reference voltage can be overridden by an external DC voltage source on this pin for tracking application." + }, + { + "number": "18", + "name": "EN", + "type": "I", + "description": "Enable pin. The enable pin turns the DC/DC switching converter on or off. Floating the EN pin before start-up disables the converter. The recommended operating condition for EN pin is maximum 5.5 V. Do not connect the EN pin to the VIN pin directly." + }, + { + "number": "19", + "name": "PGOOD", + "type": "O", + "description": "Open-drain power-good status signal. When the FB voltage moves outside the specified limits, PGOOD goes low after a 2-µs delay." + } + ], + "warnings": [] + }, + "TUSB1004": { + "family": "TUSB1004", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TUSB1004RNQR", + "packageCode": "RNQ", + "expectedPinCount": 40, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TUSB1004\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TUSB1004RNQR\",\"packageCode\":\"RNQ\",\"expectedPinCount\":40,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.572Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TUSB1004/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TUSB1004/datasheet/GUID-8216FD74-2920-4BF0-AB9B-91FC407D8785", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "1", + "name": "VCC", + "type": "P", + "description": "3.3 V supply" + }, + { + "number": "2", + "name": "SSEQ1/A1", + "type": "4-level I, (PU/PD)", + "description": "In IC mode, this pin along with A0 pin selects the 7-bit I2C target address (refer to Table 7-7 ). In pin-strap mode, this pin along with SSEQ0 selects the receiver EQ for SSTX 1 and/or SSTX 2 (refer to Table 7-3 )." + }, + { + "number": "3", + "name": "EQCFG", + "type": "4-level I, (PU/PD)", + "description": "In pin-strap mode, this controls how CEQ[1:0] pins and SSEQ[1:0] are used. Refer to Rx EQ Configuration in Pin-Strap Mode for details. In IC mode, this pin is for TI internal test and must be left floating for normal operation." + }, + { + "number": "4", + "name": "SLP_S0#", + "type": "I , (PU)", + "description": "SLP_S0#. This pin will control whether or not Rx.Detect function is enabled. If this pin is low and device is in Disconnect state, Rx termination will be disabled. If this pin is low and device is U2/U3 state, Rx termination will be enabled., 1: Rx.Detect Enabled., 0: Rx.Detect Disabled." + }, + { + "number": "5", + "name": "NC", + "type": "", + "description": "No internal connection." + }, + { + "number": "6", + "name": "VCC", + "type": "P", + "description": "3.3 V supply" + }, + { + "number": "7", + "name": "TESTOUT1", + "type": "O", + "description": "For internal TI test only. For normal operation this pin should be left unconnected." + }, + { + "number": "8", + "name": "TESTOUT2", + "type": "O", + "description": "For internal TI test only. For normal operation this pin should be left unconnected." + }, + { + "number": "9", + "name": "SSTX2p", + "type": "I", + "description": "Differential positive input for USB port 2. Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "10", + "name": "SSTX2n", + "type": "I", + "description": "Differential positive input for USB port 2. Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "11", + "name": "NC", + "type": "", + "description": "No internal connection." + }, + { + "number": "12", + "name": "SSRX2p", + "type": "O", + "description": "Differential positive output for USB port 2. Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "13", + "name": "SSRX2n", + "type": "O", + "description": "Differential negative output for USB port 2. Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "14", + "name": "VIO_SEL", + "type": "4-level I, (PU/PD)", + "description": "Selects the input thresholds for I2C (SDA and SCL)., \"0\": I2C 3.3 V, \"R\": I2C 1.8 V, \"F\": I2C 3.3 V., \"1\": I2C 1.8 V." + }, + { + "number": "15", + "name": "SSTX1p", + "type": "I", + "description": "Differential positive input for USB port 1. Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "16", + "name": "SSTX1n", + "type": "I", + "description": "Differential negative input for USB port 1. Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "17", + "name": "MODE", + "type": "4-level I, (PU/PD)", + "description": "This pin selects whether device is in IC mode or pin-strap mode. Refer to Table 7-4 for details." + }, + { + "number": "18", + "name": "SSRX1p", + "type": "O", + "description": "Differential positive output for USB port 1. Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "19", + "name": "SSRX1n", + "type": "O", + "description": "Differential negative output for USB port 1. Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor." + }, + { + "number": "20", + "name": "VCC", + "type": "P", + "description": "3.3 V supply" + }, + { + "number": "21", + "name": "TEST2/SCL", + "type": "I", + "description": "In IC mode, this pin functions as I2C clock., In pin-strap mode, this pin is used for TI internal test and should be pulldown or tied to GND for normal operation." + }, + { + "number": "22", + "name": "AEQENZ/SDA", + "type": "I/O", + "description": "In IC mode, this pin functions as I2C data. In pin-strap mode, this pin controls whether or not AEQ is enabled., 0: AEQ enabled, 1: AEQ disabled" + }, + { + "number": "23", + "name": "AEQCFG", + "type": "4-level I, (PU/PD)", + "description": "In pin-strap mode, this pin controls the FULLAEQ_UPPER_EQ limit. In IC mode, this function is controlled by the FULLAEQ_UPPER_EQ register., \"0\": FULLAEQ_UPPER_EQ = Ah, \"R\": FULLAEQ_UPPER_EQ = Fh, \"F\": FULLAEQ_UPPER_EQ = 8h, \"1\": FULLAEQ_UPPER_EQ = Ch" + }, + { + "number": "24", + "name": "NC", + "type": "", + "description": "No internal connection" + }, + { + "number": "25", + "name": "NC", + "type": "", + "description": "No internal connection" + }, + { + "number": "26", + "name": "EN", + "type": "I, (PU)", + "description": "When low, the differential receiver's termination will be disabled and differential drivers will be disabled. On rising edge of EN, device will sample four-level inputs and function based on the sampled state of the pins. This pin has a internal 500k pullup to VCC. Please note this pin will also reset internal configuration registers." + }, + { + "number": "27", + "name": "TEST1", + "type": "I", + "description": "TI Test1. Under normal operations this pin shall be connected directly or pulled up to VCC." + }, + { + "number": "28", + "name": "VCC", + "type": "P", + "description": "3.3 V supply" + }, + { + "number": "29", + "name": "CEQ1", + "type": "4-level I, (PU/PD)", + "description": "In pin-strap mode, this pin along with CEQ0 selects the receiver EQ for CRX1 and/or CRX2 (Refer to Table 7-2 )." + }, + { + "number": "30", + "name": "CRX1n", + "type": "I", + "description": "Differential negative input for USB port 1. Should be connected to SSRXn pin of USB connector. Connection can be DC-coupled to USB connector. Optionally, connection can be through an external 330 nF AC-coupling capacitor." + }, + { + "number": "31", + "name": "CRX1p", + "type": "I", + "description": "Differential positive input for USB port 1. Should be connected to SSRXp pin of USB connector. Connection can be DC-coupled to USB connector. Optionally, connection can be through an external 330 nF AC-coupling capacitor." + }, + { + "number": "32", + "name": "NC", + "type": "", + "description": "No internal connection." + }, + { + "number": "33", + "name": "CTX1n", + "type": "O", + "description": "Differential negative output for USB port 1. Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor." + }, + { + "number": "34", + "name": "CTX1p", + "type": "O", + "description": "Differential positive output for USB port 1. Should be connected to SSTXp pin of USB connector through an external 220 nF AC-coupling capacitor." + }, + { + "number": "35", + "name": "SSEQ0/A0", + "type": "4-level I, (PU/PD)", + "description": "In IC mode, this pin along with A1 pin selects the 7-bit I2C target address (refer to Table 7-7 ). In pin-strap mode, this pin along with SSEQ1 selects the receiver EQ for SSTX 1 and/or SSTX 2 (refer to Table 7-3 )." + }, + { + "number": "36", + "name": "CRX2n", + "type": "I", + "description": "Differential negative input for USB port 2. Should be connected to SSRXn pin of USB connector. Connection can be DC-coupled to USB connector. Optionally, connection can be through an external 330 nF AC-coupling capacitor." + }, + { + "number": "37", + "name": "CRX2p", + "type": "I", + "description": "Differential positive input for USB port 2. Should be connected to SSRXp pin of USB connector. Connection can be DC-coupled to USB connector. Optionally, connection can be through an external 330 nF AC-coupling capacitor." + }, + { + "number": "38", + "name": "CEQ0", + "type": "4-level I, (PU/PD)", + "description": "In pin-strap mode, this pin along with CEQ1 selects the receiver EQ for CRX1 and/or CRX2 (Refer to Table 7-2 )." + }, + { + "number": "39", + "name": "CTX2n", + "type": "O", + "description": "Differential negative output for USB port 2. Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor." + }, + { + "number": "40", + "name": "CTX2p", + "type": "O", + "description": "Differential positive output for USB port 2. Should be connected to SSTXp pin of USB connector through an external 220 nF AC-coupling capacitor." + }, + { + "number": "Thermal Pad", + "name": "Thermal Pad", + "type": "G", + "description": "Thermal pad. Connect to a solid ground plane." + } + ], + "warnings": ["Official TI pin count 41 does not match catalog pinCount 40."] + }, + "TVS3300": { + "family": "TVS3300", + "catalogSource": "jlcpcb", + "manufacturerPartNumber": "TVS3300YZFR", + "packageDescription": "DSBGA-4", + "packageCode": "YZF", + "expectedPinCount": 4, + "selectionReason": "jlcpcb-physical-coordinate-labels", + "pinLabelSourcePath": "lib/chips/TVS3300YZFR.circuit.tsx", + "pinLabelCount": 4, + "coordinateLabelCount": 4, + "coordinateLabelRatio": 1, + "physicalOnlyPinCount": 4, + "physicalOnly": true, + "numericPhysicalOnly": false, + "inputFingerprint": "{\"family\":\"TVS3300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TVS3300YZFR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZF\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TVS3300YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.614Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TVS3300/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TVS3300/datasheet/pin-configuration-and-functions-slvsed28738", + "packageColumn": "PIN / YZF", + "tableClass": "termfunctions", + "pins": [ + { + "number": "B1", + "name": "IN", + "type": "I", + "description": "ESD and surge protected channel" + }, + { + "number": "B2", + "name": "IN", + "type": "I", + "description": "ESD and surge protected channel" + }, + { + "number": "A1", + "name": "GND", + "type": "GND", + "description": "Ground" + }, + { + "number": "A2", + "name": "GND", + "type": "GND", + "description": "Ground" + } + ], + "warnings": [] + }, + "TXE8124": { + "family": "TXE8124", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TXE8124DGSR", + "packageCode": "DGS", + "expectedPinCount": 32, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TXE8124\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TXE8124DGSR\",\"packageCode\":\"DGS\",\"expectedPinCount\":32,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.684Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TXE8124/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TXE8124/datasheet/GUID-202125AB-F057-431C-9CC1-7F1FB95B4563", + "packageColumn": "PIN / DGS, (VSSOP32)", + "tableClass": "table frame-all", + "pins": [ + { + "number": "12", + "name": "P2.0", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #0 is configured as an input" + }, + { + "number": "13", + "name": "P2.1", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #1 is configured as an input" + }, + { + "number": "14", + "name": "P2.2", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #2 is configured as an input" + }, + { + "number": "15", + "name": "P2.3", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #3 is configured as an input" + }, + { + "number": "16", + "name": "P2.4", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #4 is configured as an input" + }, + { + "number": "17", + "name": "P2.5", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #5 is configured as an input" + }, + { + "number": "18", + "name": "P2.6", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #6 is configured as an input" + }, + { + "number": "19", + "name": "P2.7", + "type": "I/O", + "description": "P-port input/output. At power on, Port 2 - IO #7 is configured as an input" + }, + { + "number": "20", + "name": "P1.7", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #7 is configured as an input" + }, + { + "number": "21", + "name": "P1.6", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #6 is configured as an input" + }, + { + "number": "22", + "name": "P1.5", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #5 is configured as an input" + }, + { + "number": "23", + "name": "P1.4", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #4 is configured as an input" + }, + { + "number": "24", + "name": "P1.3", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #3 is configured as an input" + }, + { + "number": "25", + "name": "P1.2", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #2 is configured as an input" + }, + { + "number": "26", + "name": "P1.1", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #1 is configured as an input" + }, + { + "number": "27", + "name": "P1.0", + "type": "I/O", + "description": "P-port input/output. At power on, Port 1 - IO #0 is configured as an input" + }, + { + "number": "28", + "name": "CS", + "type": "I", + "description": "SPI chip select input. Internal pull-up resistor" + }, + { + "number": "29", + "name": "SCLK", + "type": "I", + "description": "SPI serial clock input. Internal pull-down resistor" + }, + { + "number": "30", + "name": "SDI", + "type": "I", + "description": "SPI serial data input." + }, + { + "number": "31", + "name": "RESET / FAIL-SAFE", + "type": "I", + "description": "Active Low reset or fail-safe input. An external pull-up resistor connects to VCC." + }, + { + "number": "32", + "name": "INT", + "type": "O", + "description": "Open-Drain Interrupt output. An external pull-up resistor connects to VCC." + }, + { + "number": "1", + "name": "SDO", + "type": "O", + "description": "SPI serial data output. Push-pull output" + }, + { + "number": "2", + "name": "VCC", + "type": "P", + "description": "Supply voltage" + }, + { + "number": "3", + "name": "GND", + "type": "G", + "description": "Ground" + }, + { + "number": "4", + "name": "P0.0", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #0 is configured as an input" + }, + { + "number": "5", + "name": "P0.1", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #1 is configured as an input" + }, + { + "number": "6", + "name": "P0.2", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #2 is configured as an input" + }, + { + "number": "7", + "name": "P0.3", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #3 is configured as an input" + }, + { + "number": "8", + "name": "P0.4", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #4 is configured as an input" + }, + { + "number": "9", + "name": "P0.5", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #5 is configured as an input" + }, + { + "number": "10", + "name": "P0.6", + "type": "I/O", + "description": "P-port input/output . At power on, Port 0 - IO #6 is configured as an input" + }, + { + "number": "11", + "name": "P0.7", + "type": "I/O", + "description": "P-port input/output. At power on, Port 0 - IO #7 is configured as an input" + } + ], + "warnings": [] + }, + "TXV0108-Q1": { + "family": "TXV0108-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "TXV0108QWRGYRQ1", + "packageCode": "RGY", + "expectedPinCount": 24, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"TXV0108-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"TXV0108QWRGYRQ1\",\"packageCode\":\"RGY\",\"expectedPinCount\":24,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.732Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/TXV0108-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/TXV0108-Q1/datasheet/GUID-D70C3CB1-1B6D-4505-A006-EE3831A7048D", + "packageColumn": "PIN / NO.", + "tableClass": "table wide-orientation frame-all", + "pins": [ + { + "number": "1", + "name": "VCCA", + "type": "—", + "description": "A-port supply voltage." + }, + { + "number": "2", + "name": "DIR", + "type": "I", + "description": "Direction-control signal for all ports. Referenced to VCCA." + }, + { + "number": "3", + "name": "A1", + "type": "I/O", + "description": "Input/Output A1. Referenced to VCCA." + }, + { + "number": "4", + "name": "A2", + "type": "I/O", + "description": "Input/Output A2. Referenced to VCCA." + }, + { + "number": "5", + "name": "A3", + "type": "I/O", + "description": "Input/Output A3. Referenced to VCCA." + }, + { + "number": "6", + "name": "A4", + "type": "I/O", + "description": "Input/Output A4. Referenced to VCCA." + }, + { + "number": "7", + "name": "A5", + "type": "I/O", + "description": "Input/Output A5. Referenced to VCCA." + }, + { + "number": "8", + "name": "A6", + "type": "I/O", + "description": "Input/Output A6. Referenced to VCCA." + }, + { + "number": "9", + "name": "A7", + "type": "I/O", + "description": "Input/Output A7. Referenced to VCCA." + }, + { + "number": "10", + "name": "A8", + "type": "I/O", + "description": "Input/Output A8. Referenced to VCCA." + }, + { + "number": "11", + "name": "GND", + "type": "—", + "description": "Ground." + }, + { + "number": "12", + "name": "GND", + "type": "—", + "description": "Ground." + }, + { + "number": "13", + "name": "GND", + "type": "—", + "description": "Ground." + }, + { + "number": "14", + "name": "B8", + "type": "I/O", + "description": "Input/Output B8. Referenced to VCCB." + }, + { + "number": "15", + "name": "B7", + "type": "I/O", + "description": "Input/Output B7. Referenced to VCCB." + }, + { + "number": "16", + "name": "B6", + "type": "I/O", + "description": "Input/Output B6. Referenced to VCCB." + }, + { + "number": "17", + "name": "B5", + "type": "I/O", + "description": "Input/Output B5. Referenced to VCCB." + }, + { + "number": "18", + "name": "B4", + "type": "I/O", + "description": "Input/Output B4. Referenced to VCCB." + }, + { + "number": "19", + "name": "B3", + "type": "I/O", + "description": "Input/Output B3. Referenced to VCCB." + }, + { + "number": "20", + "name": "B2", + "type": "I/O", + "description": "Input/Output B2. Referenced to VCCB." + }, + { + "number": "21", + "name": "B1", + "type": "I/O", + "description": "Input/Output B1. Referenced to VCCB." + }, + { + "number": "22", + "name": "OE", + "type": "I", + "description": "Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all outputs in high-impedance mode. Referenced to VCCA." + }, + { + "number": "23", + "name": "VCCB", + "type": "—", + "description": "B-port supply voltage." + }, + { + "number": "24", + "name": "VCCB", + "type": "—", + "description": "B-port supply voltage." + }, + { + "number": "Thermal Pad", + "name": "Thermal Pad", + "type": "—", + "description": "Thermal pad. Can be grounded (recommended) or left floating." + } + ], + "warnings": ["Official TI pin count 25 does not match catalog pinCount 24."] + }, + "UCC27332-Q1": { + "family": "UCC27332-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC27332QDGNRQ1", + "packageCode": "DGN", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC27332-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC27332QDGNRQ1\",\"packageCode\":\"DGN\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.678Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC27332-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC27332-Q1/datasheet/GUID-CA15E93D-E742-4B8A-AB99-818AC080184F", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "3", + "name": "EN", + "type": "I", + "description": "Enable or disable control pin. If not used, connect to VDD." + }, + { + "number": "4", + "name": "GND", + "type": "G", + "description": "Device ground or reference" + }, + { + "number": "5", + "name": "GND", + "type": "G", + "description": "Device ground or reference" + }, + { + "number": "2", + "name": "IN", + "type": "I", + "description": "Non-inverting PWM input" + }, + { + "number": "6", + "name": "OUT", + "type": "O", + "description": "Output of the driver" + }, + { + "number": "7", + "name": "OUT", + "type": "O", + "description": "Output of the driver" + }, + { + "number": "1", + "name": "VDD", + "type": "P", + "description": "Driver bias supply. Connect the positive node of the voltage source to this pin through an impedance for high common mode noise rejection. Bypass this pin with two ceramic capacitors, generally >=1 µF and 0.1 µF, which are referenced to GND pin of this device." + }, + { + "number": "8", + "name": "VDD", + "type": "P", + "description": "Driver bias supply. Connect the positive node of the voltage source to this pin through an impedance for high common mode noise rejection. Bypass this pin with two ceramic capacitors, generally >=1 µF and 0.1 µF, which are referenced to GND pin of this device." + }, + { + "number": "Thermal Pad", + "name": "THERMAL_PAD", + "type": "—", + "description": "Connect to GND through large copper plane. This pad is not a low-impedance path to GND." + } + ], + "warnings": [ + "Official TI pin count 9 does not match catalog pinCount 8.", + "Normalized blank thermal/exposed-pad pin names to THERMAL_PAD while preserving physical pin identity." + ] + }, + "UCC27734": { + "family": "UCC27734", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC27734DR", + "packageCode": "D", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC27734\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC27734DR\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.827Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC27734/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC27734/datasheet/GUID-B2A6DA27-B096-4097-908C-1AD12C827520", + "packageColumn": "PIN / 8D", + "tableClass": "table", + "pins": [ + { + "number": "8", + "name": "HB", + "type": "I", + "description": "High-side floating supply. Bypass this pin to HS with a suitable capacitor to sustain boot-strap circuit operation in the desired application, typically 10× bigger than gate capacitance." + }, + { + "number": "1", + "name": "HI", + "type": "I", + "description": "Logic input for high-side driver. If HI is unbiased or floating, HO is held low." + }, + { + "number": "7", + "name": "HO", + "type": "O", + "description": "High-side driver output." + }, + { + "number": "6", + "name": "HS", + "type": "–", + "description": "Return for high-side floating supply." + }, + { + "number": "2", + "name": "LI", + "type": "I", + "description": "Logic input for low-side driver. If LI is unbiased or floating, LO is held low." + }, + { + "number": "4", + "name": "LO", + "type": "O", + "description": "Low-side driver output." + }, + { + "number": "5", + "name": "VDD", + "type": "I", + "description": "Bias supply input. Power supply for the input logic side of the device and also low-side driver output. Bypass this pin to VSS with typical 1µF SMD capacitor (typically CVDD needs to be 10 × CBOOT). If shunt resistor used between COM and VSS, then also bypass this pin to COM with a 100nF SMD capacitor" + }, + { + "number": "3", + "name": "COM", + "type": "–", + "description": "Return for low-side driver output. Internally tied to VSS in UCC27734." + } + ], + "warnings": [] + }, + "UCC27735": { + "family": "UCC27735", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC27735DR", + "packageCode": "D", + "expectedPinCount": 14, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC27735\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC27735DR\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.907Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC27735/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC27735/datasheet/GUID-B2A6DA27-B096-4097-908C-1AD12C827520", + "packageColumn": "PIN / 14D", + "tableClass": "table", + "pins": [ + { + "number": "13", + "name": "HB", + "type": "I", + "description": "High-side floating supply. Bypass this pin to HS with a suitable capacitor to sustain boot-strap circuit operation in the desired application, typically 10× bigger than gate capacitance." + }, + { + "number": "1", + "name": "HI", + "type": "I", + "description": "Logic input for high-side driver. If HI is unbiased or floating, HO is held low." + }, + { + "number": "4", + "name": "EN/NC", + "type": "I", + "description": "Enable input for high-side and low-side driver. This pin biased low, disables both HO and LO regardless of HI and LI state, This pin biased high or floating enables both HO and LO." + }, + { + "number": "12", + "name": "HO", + "type": "O", + "description": "High-side driver output." + }, + { + "number": "11", + "name": "HS", + "type": "–", + "description": "Return for high-side floating supply." + }, + { + "number": "2", + "name": "LI", + "type": "I", + "description": "Logic input for low-side driver. If LI is unbiased or floating, LO is held low." + }, + { + "number": "6", + "name": "LO", + "type": "O", + "description": "Low-side driver output." + }, + { + "number": "8", + "name": "NC", + "type": "–", + "description": "No connection." + }, + { + "number": "9", + "name": "NC", + "type": "–", + "description": "No connection." + }, + { + "number": "10", + "name": "NC", + "type": "–", + "description": "No connection." + }, + { + "number": "14", + "name": "NC", + "type": "–", + "description": "No connection." + }, + { + "number": "7", + "name": "VDD", + "type": "I", + "description": "Bias supply input. Power supply for the input logic side of the device and also low-side driver output. Bypass this pin to VSS with typical 1µF SMD capacitor (typically CVDD needs to be 10 × CBOOT). If shunt resistor used between COM and VSS, then also bypass this pin to COM with a 100nF SMD capacitor" + }, + { + "number": "5", + "name": "COM", + "type": "–", + "description": "Return for low-side driver output. Internally tied to VSS in UCC27734." + }, + { + "number": "3", + "name": "VSS", + "type": "–", + "description": "Logic ground." + } + ], + "warnings": [] + }, + "UCC28070-Q1": { + "family": "UCC28070-Q1", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC28070QPWRQ1", + "packageCode": "PW", + "expectedPinCount": 20, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC28070-Q1\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC28070QPWRQ1\",\"packageCode\":\"PW\",\"expectedPinCount\":20,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.905Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC28070-Q1/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC28070-Q1/datasheet/GUID-26093E31-F509-4B21-9445-4F187D58167A", + "packageColumn": "PIN / NO.", + "tableClass": "table page-break", + "pins": [ + { + "number": "1", + "name": "CDR", + "type": "I", + "description": "Dither rate capacitor. Frequency-dithering timing pin. An external capacitor to GND programs the rate of oscillator dither. To disable dithering, connect the CDR pin to the VREF pin and connect the RDM pin to GND." + }, + { + "number": "2", + "name": "RDM (SYNC)", + "type": "I", + "description": "Dither magnitude resistor. Frequency-dithering magnitude and external synchronization pin. An external resistor to GND programs the magnitude of oscillator-frequency dither. When frequency dithering is disabled (CDR > 5V), the internal master clock synchronizes to rising edges presented on the RDM pin. Connect RDM to GND with a zero-ohm resistance when dithering is disabled and synchronization is not used." + }, + { + "number": "3", + "name": "VAO", + "type": "O", + "description": "Voltage amplifier output. Output of transconductance voltage error amplifier. Internally connected to the multiplier input and the zero-power comparator. Connect the voltage regulation loop compensation components between this pin and GND." + }, + { + "number": "4", + "name": "VSENSE", + "type": "I", + "description": "Output voltage sense. Internally connected to the inverting input of the transconductance voltage error amplifier in addition to the positive terminal of the current synthesis difference amplifier. Also connected to the OVP, PFC enable, and slew-rate comparators. Connect to PFC output with a resistor-divider network." + }, + { + "number": "5", + "name": "VINAC", + "type": "I", + "description": "Scaled AC line input voltage. Internally connected to the multiplier and negative terminal of the current synthesis difference amplifier. Connect a resistor-divider network between VIN, VINAC, and GND identical to the PFC output divider network connected at VSENSE." + }, + { + "number": "6", + "name": "IMO", + "type": "O", + "description": "Multiplier output current. Connect a resistor between this pin and GND to set the multiplier gain." + }, + { + "number": "7", + "name": "RSYNTH", + "type": "I", + "description": "Current synthesis down-slope programming. Connect a resistor between this pin and GND to set the rate of the current synthesizer down-slope. Connecting RSYNTH to VREF disables current synthesis and internally connects CSA and CSB directly to their respective current amplifiers." + }, + { + "number": "8", + "name": "CSB", + "type": "I", + "description": "Phase-B current sense input. During the ON-time of GDB, CSB is internally connected to the inverting input of phase-B current amplifier through the current synthesis stage, unless RSYNTH is connected to VREF." + }, + { + "number": "9", + "name": "CSA", + "type": "I", + "description": "Phase-A current sense input. During the ON-time of GDA, CSA is internally connected to the inverting input of phase-A current amplifier through the current synthesis stage, unless RSYNTH is connected to VREF." + }, + { + "number": "10", + "name": "PKLMT", + "type": "I", + "description": "Peak current limit programming. Connect a resistor-divider network between VREF and this pin to set the voltage threshold of the cycle-by-cycle peak current limiting comparators. Allows adjustment for desired ΔILB." + }, + { + "number": "11", + "name": "CAOB", + "type": "O", + "description": "Phase-B current amplifier output. Output of phase-B transconductance current amplifier. Internally connected to the inverting input of phase-B PWM comparator for trailing-edge modulation. Connect the current regulation loop compensation components between this pin and GND." + }, + { + "number": "12", + "name": "CAOA", + "type": "O", + "description": "Phase-A current amplifier output. Output of phase-A transconductance current amplifier. Internally connected to the inverting input of phase-A PWM comparator for trailing-edge modulation. Connect the current regulation loop compensation components between this pin and GND." + }, + { + "number": "13", + "name": "VREF", + "type": "O", + "description": "6V reference voltage and internal bias voltage. Connect a 0.1μF ceramic bypass capacitor as close as possible to this pin and GND." + }, + { + "number": "14", + "name": "GDA", + "type": "O", + "description": "Phase-A gate drive. This limited-current output is intended to connect to a separate gate-drive device suitable for driving the phase-A switching components. The output voltage is typically clamped to 13.5V." + }, + { + "number": "15", + "name": "VCC", + "type": "I", + "description": "Bias voltage input. Connect a 0.1μF ceramic bypass capacitor as close as possible to this pin and GND." + }, + { + "number": "16", + "name": "GND", + "type": "I/O", + "description": "Device ground reference. Connect all compensation and programming resistor and capacitor networks to this pin. Connect this pin to the system through a separate trace for high-current noise isolation." + }, + { + "number": "17", + "name": "GDB", + "type": "O", + "description": "Phase-B gate drive. This limited-current output is intended to connect to a separate gate-drive device suitable for driving the phase-B switching component(s). The output voltage is typically clamped to 13.5V." + }, + { + "number": "18", + "name": "SS", + "type": "I", + "description": "Soft-start and external fault interface. Connect a capacitor to GND on this pin to set the soft-start slew rate based on an internally-fixed, 10μA current source. The regulation reference voltage for VSENSE is clamped to VSS until VSS exceeds 3V. Upon recovery from certain fault conditions, a 1mA current source is present at the SS pin until the SS voltage equals the VSENSE voltage. Pulling the SS pin below 0.6V immediately disables both GDA and GDB outputs." + }, + { + "number": "19", + "name": "RT", + "type": "I", + "description": "Timing resistor. Oscillator frequency programming pin. A resistor to GND sets the running frequency of the internal oscillator." + }, + { + "number": "20", + "name": "DMAX", + "type": "I", + "description": "Maximum duty-cycle resistor. Maximum PWM duty-cycle programming pin. A resistor to GND sets the PWM maximum duty-cycle based on the ratio of RDMX / RRT." + } + ], + "warnings": [] + }, + "UCC28C50": { + "family": "UCC28C50", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC28C50DGKR", + "packageCode": "DGK", + "expectedPinCount": 8, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC28C50\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC28C50DGKR\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.865Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC28C50/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC28C50/datasheet/GUID-A03FF50F-24D3-4972-8C1C-332413905D94", + "packageColumn": "PIN / NO.", + "tableClass": "table", + "pins": [ + { + "number": "1", + "name": "COMP", + "type": "O", + "description": "This pin provides the output of the error amplifier for compensation. In addition, the COMP pin is frequently used as a control port, by utilizing a secondary-side error amplifier to send an error signal across the secondary-primary isolation boundary through an opto-isolator. The error amplifier is internally current limited so the user can command zero duty cycle by externally forcing COMP to GND." + }, + { + "number": "3", + "name": "CS", + "type": "I", + "description": "Primary-side current sense pin. The current sense pin is the noninverting input to the PWM comparator. Connect to current sensing resistor. This signal is compared to a signal proportional to the error amplifier output voltage. The PWM uses this to terminate the OUT switch conduction. A voltage ramp can be applied to this pin to run the device with a voltage mode control configuration." + }, + { + "number": "2", + "name": "FB", + "type": "I", + "description": "This pin is the inverting input to the error amplifier. FB is used to control the power converter voltage-feedback loop for stability. The noninverting input to the error amplifier is internally trimmed to 2.5 V ± 1%." + }, + { + "number": "5", + "name": "GND", + "type": "—", + "description": "Ground return pin for the output driver stage and the logic level controller section." + }, + { + "number": "6", + "name": "OUT", + "type": "O", + "description": "The output of the on-chip drive stage. OUT is intended to directly drive a MOSFET. The OUT pin in the UCCx8C50, UCCx8C52, UCCx8C53, UCC28C56H/L and UCC28C58 is the same frequency as the oscillator, and can operate near 100% duty cycle. In the UCCx8C51, UCCx8C54, and UCCx8C55, UCC28C57H/L and UCC28C59, the frequency of OUT is one-half that of the oscillator due to an internal T flipflop. This limits the maximum duty cycle to < 50%. Peak currents of up to 1 A are sourced and sunk by this pin. OUT is actively held low when VDD is below the turn-on threshold." + }, + { + "number": "4", + "name": "RT/CT", + "type": "I/O", + "description": "Fixed frequency oscillator set point. Connect timing resistor (RRT) to VREF and timing capacitor (CCT) to GND from this pin to set the switching frequency. For best performance, keep the timing capacitor lead to the device GND as short and direct as possible. If possible, use separate ground traces for the timing capacitor and all other functions. The switching frequency (fSW) of the UCCx8C50, UCCx8C52, UCCx8C53, UCC28C56H/L and UCC28C58 gate drive is equal to fOSC; the switching frequency of the UCCx8C51, UCCx8C54, and UCCx8C55, UCC28C57H/L and UCC28C59 is equal to half of the fOSC." + }, + { + "number": "7", + "name": "VDD", + "type": "I", + "description": "Analog controller bias input that provides power to the device. Total VDD current is the sum of the quiescent VDD current and the average OUT current. A bypass capacitor, typically 0.1 µF, connected directly to GND with minimal trace length, is required on this pin. Additional capacitance at least 10 times greater than the gate capacitance of the main switching FET used in the design and at least 10 times greater than the capacitance on the VREF pin used in the design are also required on VDD." + }, + { + "number": "8", + "name": "VREF", + "type": "O", + "description": "5-V reference voltage. VREF is used to provide charging current to the oscillator timing capacitor through the timing resistor. It is important for reference stability that VREF is bypassed to GND with a ceramic capacitor connected as close to the pin as possible. A minimum value of 0.1 µF ceramic is required. Additional VREF bypassing is required for external loads on VREF. No external voltage higher than specified VREF is allowed to superimposed to VREF pin since VREF is an ouput." + } + ], + "warnings": [] + }, + "UCC29950": { + "family": "UCC29950", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCC29950DR", + "packageCode": "D", + "expectedPinCount": 16, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCC29950\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCC29950DR\",\"packageCode\":\"D\",\"expectedPinCount\":16,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:18.133Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCC29950/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCC29950/datasheet/pin_configuration_and_functions", + "packageColumn": "PIN / NO.", + "tableClass": "termfunctions", + "pins": [ + { + "number": "1", + "name": "GND", + "type": "-", + "description": "Power ground. Connect all the gate driver pulsating current returns to this pin." + }, + { + "number": "2", + "name": "GD2", + "type": "O", + "description": "Gate drive output for LLC stage MOSFET. The typical peak current is 1-A source, 1.6-A sink (CLOAD = 1 nF)" + }, + { + "number": "3", + "name": "VCC", + "type": "-", + "description": "Bias supply input." + }, + { + "number": "4", + "name": "SUFG", + "type": "O", + "description": "Start-up MOSFET gate drive output. Leave open circuit if not used." + }, + { + "number": "5", + "name": "SUFS", + "type": "I", + "description": "Start-up MOSFET Source. Connect to VCC if not used." + }, + { + "number": "6", + "name": "AGND", + "type": "-", + "description": "Signal ground. Connect all device control signal returns to this ground." + }, + { + "number": "7", + "name": "MD_SEL/PS_ON", + "type": "I", + "description": "Dual function pin: Mode Select Function (MD_SEL): Select self bias or Aux bias mode of operation. Power Supply On Function (PS_ON): Stop/start control of PFC and LLC stages, Aux Bias mode only." + }, + { + "number": "8", + "name": "VBULK", + "type": "I", + "description": "Voltage sense input for PFC stage output." + }, + { + "number": "9", + "name": "AC2", + "type": "I", + "description": "AC line voltage detection. Connect 9.3 MΩ between AC line and this pin." + }, + { + "number": "10", + "name": "AC1", + "type": "I", + "description": "AC line voltage detection. Connect 9.3 MΩ between AC line and this pin." + }, + { + "number": "11", + "name": "LLC_CS", + "type": "I", + "description": "Current sense input for the LLC stage." + }, + { + "number": "12", + "name": "FB", + "type": "I", + "description": "Feedback signal input for LLC stage." + }, + { + "number": "13", + "name": "PFC_CS", + "type": "I", + "description": "Current sense input for the PFC stage." + }, + { + "number": "14", + "name": "GD1", + "type": "O", + "description": "Gate drive output for LLC stage MOSFET. The typical peak current is 1-A source, 1.6-A sink (CLOAD = 1 nF)." + }, + { + "number": "15", + "name": "AC_DET", + "type": "O", + "description": "AC line voltage fail signal output, for system use." + }, + { + "number": "16", + "name": "PFC_GD", + "type": "O", + "description": "The typical peak current is 0.6-A source, 1.3-A sink (CLOAD = 1 nF)." + } + ], + "warnings": [] + }, + "UCG28828": { + "family": "UCG28828", + "catalogSource": "ti-datasheet", + "manufacturerPartNumber": "UCG28828-1REZR", + "packageCode": "REZ", + "expectedPinCount": 12, + "selectionReason": "ti-datasheet", + "inputFingerprint": "{\"family\":\"UCG28828\",\"catalogSource\":\"ti-datasheet\",\"manufacturerPartNumber\":\"UCG28828-1REZR\",\"packageCode\":\"REZ\",\"expectedPinCount\":12,\"selectionReason\":\"ti-datasheet\"}", + "cacheVersion": 2, + "fetchedAt": "2026-08-22T19:09:17.989Z", + "attempts": 1, + "rootUrl": "https://www.ti.com/document-viewer/UCG28828/datasheet", + "status": "ok", + "sectionUrl": "https://www.ti.com/document-viewer/UCG28828/datasheet/GUID-FF1BA9F2-CB73-44F3-9B06-3B130EFB9114", + "packageColumn": "PIN / NO.", + "tableClass": "table frame-all", + "pins": [ + { + "number": "9", + "name": "CDX", + "type": "I", + "description": "Multifunction pin to enable and disable CCM mode, switching slew rate setting and X-cap discharge enable and disable." + }, + { + "number": "5", + "name": "FB", + "type": "I", + "description": "Feedback signal. Connect this pin to the collector of an optocoupler." + }, + { + "number": "8", + "name": "FCL", + "type": "I", + "description": "Switching frequency clamp and fault behavior setting." + }, + { + "number": "4", + "name": "FLT", + "type": "O", + "description": "Fault pin for external overtemperature protection. Connect an NTC from this pin to GND." + }, + { + "number": "3", + "name": "GND", + "type": "G", + "description": "Signal ground. Internally connected to power ground." + }, + { + "number": "10", + "name": "GND", + "type": "G", + "description": "Signal ground. Internally connected to power ground." + }, + { + "number": "12", + "name": "GND", + "type": "G", + "description": "Power ground. Connect to negative terminal of input bulk capacitor. Add a ground plane with sufficient copper area below the thermal pad for efficient heat conduction to the PCB." + }, + { + "number": "1", + "name": "HV", + "type": "P", + "description": "HV start-up, AC line input presence detection and X-cap discharge." + }, + { + "number": "7", + "name": "IPK", + "type": "I", + "description": "Peak current and frequency dither setting pin. A resistor from this pin to GND sets the maximum and minimum primary-side peak current and dithering depth." + }, + { + "number": "2", + "name": "SW", + "type": "P", + "description": "Drain pin of integrated high-voltage GaN HEMT. This is also the sensing pin for valley switching and protections." + }, + { + "number": "6", + "name": "TR", + "type": "I", + "description": "Turns ratio setting. A resistor from this pin to GND sets the transformer turns ratio Np/Ns." + }, + { + "number": "11", + "name": "VCC", + "type": "P", + "description": "IC bias supply. Connect an external capacitor (at least 10V rated) from this pin to GND. Verify that the capacitor value is from 15µF to 47µF. The capacitor value is determined by the hold up time for missing input line cycles." + } + ], + "warnings": [] + } +} diff --git a/package.json b/package.json index 1d853372..9feaa287 100644 --- a/package.json +++ b/package.json @@ -18,6 +18,8 @@ "snapshot:update": "tsci snapshot --update", "start": "tsci dev", "typecheck": "tsc --noEmit", + "generate:ti-sysblocks": "bun scripts/generate-ti-sysblocks-exports.ts", + "validate:ti-sysblocks": "bun scripts/validate-ti-sysblocks-catalog.ts", "format": "biome format --write", "format:check": "biome format ." }, diff --git a/scripts/cache-ti-sysblocks-pinouts.test.ts b/scripts/cache-ti-sysblocks-pinouts.test.ts new file mode 100644 index 00000000..2b57cfa5 --- /dev/null +++ b/scripts/cache-ti-sysblocks-pinouts.test.ts @@ -0,0 +1,183 @@ +import assert from "node:assert/strict"; +import { describe, test } from "node:test"; + +import { + getPinLabelCoordinateStats, + selectTiSysblocksPinoutCandidates, + type TiSysblocksCatalogEntry, +} from "./cache-ti-sysblocks-pinouts.ts"; + +const pinLabelsSource = (labels: string[]) => ` + const pinLabels = { + ${labels.map((label, index) => `pin${index + 1}: [${JSON.stringify(label)}],`).join("\n")} + } as const +`; + +describe("TI sysblocks pinout cache selection", () => { + test("measures physical coordinate aliases from a TSX pinLabels object", () => { + const stats = getPinLabelCoordinateStats( + ` + const pinLabels = { + pin1: ["A1"], + "pin2": ["B1", "GND"], + pin3: ["C2"], + pin4: ["D2"], + pin5: ["VCC"], + } as const + `, + ); + assert.deepEqual(stats, { + pinLabelCount: 5, + coordinateLabelCount: 4, + coordinateLabelRatio: 0.8, + physicalOnlyPinCount: 3, + physicalOnly: false, + numericPhysicalOnly: false, + }); + }); + + test("does not mistake numbered functional labels for BGA coordinates", () => { + const stats = getPinLabelCoordinateStats( + pinLabelsSource(["PIN1", "IN1", "VCC1", "AIN5", "OUT1", "C0"]), + ); + assert.deepEqual(stats, { + pinLabelCount: 6, + coordinateLabelCount: 0, + coordinateLabelRatio: 0, + physicalOnlyPinCount: 1, + physicalOnly: false, + numericPhysicalOnly: false, + }); + }); + + test("recognizes physical aliases after its own functional enrichment", () => { + const stats = getPinLabelCoordinateStats(` + const pinLabels = { + pin1: ["VCC", "1"], + pin2: ["GPIO0", "2"], + } as const + const pinRoles = { pin1: "power" } as const + const pinAttributes = { pin1: { requiresPower: true } } as const + `); + + assert.deepEqual(stats, { + pinLabelCount: 2, + coordinateLabelCount: 0, + coordinateLabelRatio: 0, + physicalOnlyPinCount: 2, + physicalOnly: true, + numericPhysicalOnly: true, + }); + }); + + test("selects TI rows plus coordinate-array and numeric-physical JLC rows", async () => { + const catalog: TiSysblocksCatalogEntry[] = [ + { + family: "NO_LOCAL_SYMBOL", + source: "ti-datasheet", + manufacturerPartNumber: "NO_LOCAL_SYMBOLD", + packageCode: "D", + pinCount: 8, + }, + { + family: "BGA80", + source: "jlcpcb", + manufacturerPartNumber: "BGA80ZCZ", + componentExportName: "BGA80ZCZ", + package: "DSBGA-5", + packageCode: "ZCZ", + pinCount: 5, + }, + { + family: "BGA79", + source: "jlcpcb", + manufacturerPartNumber: "BGA79ZCZ", + componentExportName: "BGA79ZCZ", + package: "DSBGA-5", + packageCode: "ZCZ", + pinCount: 5, + }, + { + family: "NUMERIC", + source: "jlcpcb", + manufacturerPartNumber: "NUMERICD", + componentExportName: "NUMERICD", + package: "SOIC-8", + packageCode: "D", + pinCount: 8, + }, + { + family: "ALREADY_EXISTS", + source: "existing", + manufacturerPartNumber: "ALREADY_EXISTS", + packageCode: "D", + pinCount: 8, + }, + ]; + const sources: Record = { + BGA80: pinLabelsSource(["A1", "B1", "C1", "D1", "VCC"]), + BGA79: pinLabelsSource(["A1", "B1", "C1", "VCC", "GND"]), + NUMERIC: pinLabelsSource(["1", "PIN2", "PIN_3", "4", "5", "6", "7", "8"]), + }; + const { candidates, diagnostics } = await selectTiSysblocksPinoutCandidates( + catalog, + { + repoRoot: "/fixture", + readComponentSource: async (entry) => { + const sourceText = sources[entry.family]; + return sourceText + ? { path: `imports/${entry.family}.tsx`, sourceText } + : undefined; + }, + }, + ); + + assert.deepEqual( + candidates.map(({ family, selectionReason }) => [ + family, + selectionReason, + ]), + [ + ["BGA80", "jlcpcb-physical-coordinate-labels"], + ["NO_LOCAL_SYMBOL", "ti-datasheet"], + ["NUMERIC", "jlcpcb-numeric-physical-labels"], + ], + ); + assert.equal(diagnostics.tiDatasheetCandidates, 1); + assert.equal(diagnostics.jlcpcbEntriesInspected, 3); + assert.equal(diagnostics.jlcpcbCoordinateCandidates, 1); + assert.equal(diagnostics.jlcpcbNumericPhysicalCandidates, 1); + }); + + test("rejects functional A1/B1 aliases on a non-array package", async () => { + const entry: TiSysblocksCatalogEntry = { + family: "BUFFER", + source: "jlcpcb", + manufacturerPartNumber: "BUFFERD", + componentExportName: "BUFFERD", + package: "SOIC-8", + packageCode: "D", + pinCount: 5, + }; + const { candidates, diagnostics } = await selectTiSysblocksPinoutCandidates( + [entry], + { + repoRoot: "/fixture", + readComponentSource: async () => ({ + path: "imports/BUFFERD.tsx", + sourceText: pinLabelsSource(["A1", "A2", "B1", "B2", "VCC"]), + }), + }, + ); + assert.deepEqual(candidates, []); + assert.equal(diagnostics.jlcpcbNonArrayPackage, 1); + }); + + test("reports a missing or non-literal pinLabels object cleanly", () => { + assert.equal(getPinLabelCoordinateStats("export const x = 1"), undefined); + assert.equal( + getPinLabelCoordinateStats("const pinLabels = makePinLabels()"), + undefined, + ); + }); +}); diff --git a/scripts/cache-ti-sysblocks-pinouts.ts b/scripts/cache-ti-sysblocks-pinouts.ts new file mode 100644 index 00000000..92096b9b --- /dev/null +++ b/scripts/cache-ti-sysblocks-pinouts.ts @@ -0,0 +1,744 @@ +import { existsSync } from "node:fs"; +import { mkdir, readFile, rename, writeFile } from "node:fs/promises"; +import { dirname, relative, resolve } from "node:path"; +import { setTimeout as delay } from "node:timers/promises"; +import { fileURLToPath, pathToFileURL } from "node:url"; + +import ts from "typescript"; + +import { + fetchTiDocumentViewerPinout, + type TiDocumentPin, + type TiPinoutFetchResult, +} from "./ti-document-viewer-pinout.ts"; + +const CACHE_VERSION = 2; +const DEFAULT_CONCURRENCY = 4; +const DEFAULT_RETRIES = 2; +const PHYSICAL_COORDINATE_THRESHOLD = 0.8; + +export interface TiSysblocksCatalogEntry { + family: string; + source: "existing" | "jlcpcb" | "ti-datasheet"; + manufacturerPartNumber?: string; + componentExportName?: string; + package?: string; + packageCode?: string; + pinCount?: number; +} + +export interface PinLabelCoordinateStats { + pinLabelCount: number; + coordinateLabelCount: number; + coordinateLabelRatio: number; + physicalOnlyPinCount: number; + physicalOnly: boolean; + numericPhysicalOnly: boolean; +} + +export interface PinoutCandidate { + family: string; + catalogSource: TiSysblocksCatalogEntry["source"]; + manufacturerPartNumber: string; + packageDescription?: string; + packageCode: string; + expectedPinCount: number; + selectionReason: + | "ti-datasheet" + | "jlcpcb-physical-coordinate-labels" + | "jlcpcb-numeric-physical-labels"; + pinLabelSourcePath?: string; + coordinateLabelRatio?: number; + pinLabelCount?: number; + coordinateLabelCount?: number; + physicalOnlyPinCount?: number; + physicalOnly?: boolean; + numericPhysicalOnly?: boolean; + inputFingerprint: string; +} + +export interface CandidateSelectionDiagnostics { + catalogEntries: number; + tiDatasheetCandidates: number; + jlcpcbEntriesInspected: number; + jlcpcbCoordinateCandidates: number; + jlcpcbNumericPhysicalCandidates: number; + jlcpcbNonArrayPackage: number; + jlcpcbMissingComponentFile: number; + jlcpcbMissingPinLabels: number; + invalidCatalogEntries: number; +} + +interface PinoutCacheCommon extends PinoutCandidate { + cacheVersion: typeof CACHE_VERSION; + fetchedAt: string; + attempts: number; + rootUrl: string; + warnings: string[]; +} + +export type PinoutCacheEntry = + | (PinoutCacheCommon & { + status: "ok"; + sectionUrl: string; + packageColumn: string; + tableClass: string; + pins: TiDocumentPin[]; + }) + | (PinoutCacheCommon & { + status: "unavailable"; + sectionUrl?: string; + reason: Exclude["reason"]; + message: string; + packageColumns?: string[]; + }); + +export type PinoutCache = Record; + +export interface PinoutCacheSummary { + selected: number; + resumed: number; + fetched: number; + successes: number; + unavailable: number; + pinCountMatches: number; + pinCountMismatches: number; + unavailableByReason: Record; + selection: CandidateSelectionDiagnostics; +} + +type ComponentSourceReader = ( + entry: TiSysblocksCatalogEntry, +) => Promise<{ path: string; sourceText: string } | undefined>; + +const unwrapExpression = (expression: ts.Expression): ts.Expression => { + if ( + ts.isAsExpression(expression) || + ts.isTypeAssertionExpression(expression) || + ts.isParenthesizedExpression(expression) || + ts.isSatisfiesExpression(expression) + ) { + return unwrapExpression(expression.expression); + } + return expression; +}; + +const getPropertyName = (name: ts.PropertyName, sourceFile: ts.SourceFile) => { + if ( + ts.isIdentifier(name) || + ts.isStringLiteral(name) || + ts.isNumericLiteral(name) + ) { + return name.text; + } + return name.getText(sourceFile).replace(/^['"]|['"]$/g, ""); +}; + +const getStringAliases = (expression: ts.Expression) => { + const unwrapped = unwrapExpression(expression); + if ( + ts.isStringLiteral(unwrapped) || + ts.isNoSubstitutionTemplateLiteral(unwrapped) + ) { + return [unwrapped.text]; + } + if (!ts.isArrayLiteralExpression(unwrapped)) return []; + return unwrapped.elements.flatMap((element) => { + if ( + ts.isStringLiteral(element) || + ts.isNoSubstitutionTemplateLiteral(element) + ) { + return [element.text]; + } + return []; + }); +}; + +const isPhysicalCoordinateLabel = (label: string) => + // JEDEC BGA rows omit visually ambiguous I/O/Q/S/X/Z. Limiting the prefix + // to two row letters also keeps functional aliases such as PIN1, VCC1, + // AIN5, and OUT1 from being misclassified as package coordinates. + /^[A-HJ-NPRT-WY]{1,2}[1-9]\d{0,2}$/i.test(label.trim()); + +const isNumericPhysicalLabel = (label: string) => + /^(?:PIN_?)?\d+$/i.test(label.trim()); + +const isPhysicalOnlyAliases = (aliases: readonly string[]) => + aliases.length > 0 && + aliases.every( + (alias) => + isNumericPhysicalLabel(alias) || isPhysicalCoordinateLabel(alias), + ); + +const isArrayPackage = (packageDescription: string | undefined) => + /(?:BGA|CSP|PICOSTAR)/i.test(packageDescription ?? ""); + +export const getPinLabelCoordinateStats = ( + sourceText: string, + sourcePath = "component.tsx", +): PinLabelCoordinateStats | undefined => { + const sourceFile = ts.createSourceFile( + sourcePath, + sourceText, + ts.ScriptTarget.Latest, + true, + ts.ScriptKind.TSX, + ); + let pinLabels: ts.ObjectLiteralExpression | undefined; + + for (const statement of sourceFile.statements) { + if (!ts.isVariableStatement(statement)) continue; + for (const declaration of statement.declarationList.declarations) { + if ( + !ts.isIdentifier(declaration.name) || + declaration.name.text !== "pinLabels" || + !declaration.initializer + ) { + continue; + } + const initializer = unwrapExpression(declaration.initializer); + if (ts.isObjectLiteralExpression(initializer)) pinLabels = initializer; + } + } + if (!pinLabels) return undefined; + + const entries = pinLabels.properties.flatMap((property) => { + if (!ts.isPropertyAssignment(property)) return []; + const pinKey = getPropertyName(property.name, sourceFile); + if (!/^pin\d+$/i.test(pinKey)) return []; + return [getStringAliases(property.initializer)]; + }); + if (entries.length === 0) return undefined; + + const hasGeneratedFunctionalMetadata = + /\bconst\s+pinRoles\s*=/.test(sourceText) && + /\bconst\s+pinAttributes\s*=/.test(sourceText); + const coordinateLabelCount = entries.filter((aliases) => + aliases.some(isPhysicalCoordinateLabel), + ).length; + const physicalOnlyPinCount = entries.filter((aliases) => + hasGeneratedFunctionalMetadata + ? aliases.some( + (alias) => + isNumericPhysicalLabel(alias) || isPhysicalCoordinateLabel(alias), + ) + : isPhysicalOnlyAliases(aliases), + ).length; + return { + pinLabelCount: entries.length, + coordinateLabelCount, + coordinateLabelRatio: coordinateLabelCount / entries.length, + physicalOnlyPinCount, + physicalOnly: physicalOnlyPinCount === entries.length, + numericPhysicalOnly: entries.every((aliases) => + hasGeneratedFunctionalMetadata + ? aliases.some(isNumericPhysicalLabel) + : aliases.length > 0 && aliases.every(isNumericPhysicalLabel), + ), + }; +}; + +const componentFilenameCandidates = (entry: TiSysblocksCatalogEntry) => [ + entry.componentExportName, + entry.manufacturerPartNumber?.replace(/[^A-Za-z0-9_]/g, "_"), +]; + +const createDefaultComponentSourceReader = ( + repoRoot: string, +): ComponentSourceReader => { + return async (entry) => { + for (const filename of componentFilenameCandidates(entry).filter( + (candidate): candidate is string => Boolean(candidate), + )) { + for (const sourcePath of [ + resolve(repoRoot, "lib/chips", `${filename}.circuit.tsx`), + resolve(repoRoot, "imports", `${filename}.tsx`), + ]) { + if (!existsSync(sourcePath)) continue; + return { + path: relative(repoRoot, sourcePath), + sourceText: await readFile(sourcePath, "utf8"), + }; + } + } + return undefined; + }; +}; + +const makeInputFingerprint = ( + candidate: Omit, +) => + JSON.stringify({ + family: candidate.family, + catalogSource: candidate.catalogSource, + manufacturerPartNumber: candidate.manufacturerPartNumber, + packageDescription: candidate.packageDescription, + packageCode: candidate.packageCode, + expectedPinCount: candidate.expectedPinCount, + selectionReason: candidate.selectionReason, + pinLabelSourcePath: candidate.pinLabelSourcePath, + coordinateLabelRatio: candidate.coordinateLabelRatio, + physicalOnly: candidate.physicalOnly, + numericPhysicalOnly: candidate.numericPhysicalOnly, + }); + +const finalizeCandidate = ( + candidate: Omit, +): PinoutCandidate => ({ + ...candidate, + inputFingerprint: makeInputFingerprint(candidate), +}); + +export const selectTiSysblocksPinoutCandidates = async ( + catalog: readonly TiSysblocksCatalogEntry[], + options: { + repoRoot: string; + readComponentSource?: ComponentSourceReader; + }, +) => { + const readComponentSource = + options.readComponentSource ?? + createDefaultComponentSourceReader(options.repoRoot); + const candidates: PinoutCandidate[] = []; + const diagnostics: CandidateSelectionDiagnostics = { + catalogEntries: catalog.length, + tiDatasheetCandidates: 0, + jlcpcbEntriesInspected: 0, + jlcpcbCoordinateCandidates: 0, + jlcpcbNumericPhysicalCandidates: 0, + jlcpcbNonArrayPackage: 0, + jlcpcbMissingComponentFile: 0, + jlcpcbMissingPinLabels: 0, + invalidCatalogEntries: 0, + }; + + for (const entry of catalog) { + if (entry.source !== "ti-datasheet" && entry.source !== "jlcpcb") continue; + if ( + !entry.family || + !entry.manufacturerPartNumber || + !entry.packageCode || + !Number.isInteger(entry.pinCount) || + (entry.pinCount ?? 0) <= 0 + ) { + diagnostics.invalidCatalogEntries += 1; + continue; + } + + const common = { + family: entry.family, + catalogSource: entry.source, + manufacturerPartNumber: entry.manufacturerPartNumber, + packageDescription: entry.package, + packageCode: entry.packageCode, + expectedPinCount: entry.pinCount as number, + }; + if (entry.source === "ti-datasheet") { + diagnostics.tiDatasheetCandidates += 1; + candidates.push( + finalizeCandidate({ ...common, selectionReason: "ti-datasheet" }), + ); + continue; + } + + diagnostics.jlcpcbEntriesInspected += 1; + const component = await readComponentSource(entry); + if (!component) { + diagnostics.jlcpcbMissingComponentFile += 1; + continue; + } + const stats = getPinLabelCoordinateStats( + component.sourceText, + component.path, + ); + if (!stats) { + diagnostics.jlcpcbMissingPinLabels += 1; + continue; + } + const isCoordinateCandidate = + stats.coordinateLabelRatio >= PHYSICAL_COORDINATE_THRESHOLD && + isArrayPackage(entry.package); + if (isCoordinateCandidate) { + diagnostics.jlcpcbCoordinateCandidates += 1; + candidates.push( + finalizeCandidate({ + ...common, + selectionReason: "jlcpcb-physical-coordinate-labels", + pinLabelSourcePath: component.path, + ...stats, + }), + ); + continue; + } + + if (stats.numericPhysicalOnly) { + diagnostics.jlcpcbNumericPhysicalCandidates += 1; + candidates.push( + finalizeCandidate({ + ...common, + selectionReason: "jlcpcb-numeric-physical-labels", + pinLabelSourcePath: component.path, + ...stats, + }), + ); + continue; + } + + // A1/B1 are also common functional channel names. Requiring an array-style + // package description distinguishes physical ball coordinates from those + // logical aliases without hard-coding TI package codes. + if (stats.coordinateLabelRatio >= PHYSICAL_COORDINATE_THRESHOLD) { + diagnostics.jlcpcbNonArrayPackage += 1; + } + } + + candidates.sort((left, right) => left.family.localeCompare(right.family)); + const uniqueFamilies = new Set( + candidates.map((candidate) => candidate.family), + ); + if (uniqueFamilies.size !== candidates.length) { + throw new Error( + "Selected pinout candidates contain duplicate family keys.", + ); + } + return { candidates, diagnostics }; +}; + +const isReusableCacheEntry = ( + entry: PinoutCacheEntry | undefined, + candidate: PinoutCandidate, +) => + entry?.cacheVersion === CACHE_VERSION && + entry.inputFingerprint === candidate.inputFingerprint; + +const mergeWarnings = (...warningLists: readonly string[][]) => [ + ...new Set(warningLists.flat().filter(Boolean)), +]; + +const toCacheEntry = ( + candidate: PinoutCandidate, + result: TiPinoutFetchResult, + attempts: number, +): PinoutCacheEntry => { + const common = { + ...candidate, + cacheVersion: CACHE_VERSION, + fetchedAt: new Date().toISOString(), + attempts, + rootUrl: result.rootUrl, + } as const; + if (result.status === "unavailable") { + return { + ...common, + status: "unavailable", + sectionUrl: result.sectionUrl, + reason: result.reason, + message: result.message, + packageColumns: result.packageColumns, + warnings: [], + }; + } + + const countWarning = + result.table.pins.length === candidate.expectedPinCount + ? [] + : [ + `Official TI pin count ${result.table.pins.length} does not match catalog pinCount ${candidate.expectedPinCount}.`, + ]; + return { + ...common, + status: "ok", + sectionUrl: result.sectionUrl, + packageColumn: result.table.packageColumn, + tableClass: result.table.tableClass, + pins: result.table.pins, + warnings: mergeWarnings(result.table.warnings, countWarning), + }; +}; + +const isRetryable = (result: TiPinoutFetchResult) => + result.status === "unavailable" && result.reason === "http-error"; + +const fetchWithRetries = async ( + candidate: PinoutCandidate, + retries: number, + fetchPinout: typeof fetchTiDocumentViewerPinout, +) => { + const fetchWithTimeout = async (input: string | URL, init?: RequestInit) => { + const headers = new Headers(init?.headers); + headers.set("user-agent", "tscircuit-ti-pinout-cache/1.0"); + const requestInit = { + ...init, + headers, + signal: AbortSignal.timeout(30_000), + }; + const response = await fetch(input, requestInit); + if (response.status !== 403) return response; + + const fallbackUrl = new URL(input); + if (fallbackUrl.hostname !== "www.ti.com") return response; + fallbackUrl.hostname = "edgeworker.ti.com"; + return fetch(fallbackUrl, { + ...requestInit, + signal: AbortSignal.timeout(30_000), + }); + }; + + let result: TiPinoutFetchResult | undefined; + for (let attempt = 1; attempt <= retries + 1; attempt += 1) { + result = await fetchPinout(candidate.family, candidate.packageCode, { + fetch: fetchWithTimeout, + packageDescription: candidate.packageDescription, + expectedPinCount: candidate.expectedPinCount, + orderablePartNumber: candidate.manufacturerPartNumber, + }); + if (!isRetryable(result) || attempt > retries) { + return { result, attempts: attempt }; + } + await delay(300 * 2 ** (attempt - 1)); + } + throw new Error(`Retry loop ended without a result for ${candidate.family}.`); +}; + +const writeCacheAtomically = async (outputPath: string, cache: PinoutCache) => { + const sorted = Object.fromEntries( + Object.entries(cache).sort(([left], [right]) => left.localeCompare(right)), + ); + await mkdir(dirname(outputPath), { recursive: true }); + const temporaryPath = `${outputPath}.tmp`; + await writeFile( + temporaryPath, + `${JSON.stringify(sorted, null, 2)}\n`, + "utf8", + ); + await rename(temporaryPath, outputPath); +}; + +const readExistingCache = async (outputPath: string): Promise => { + if (!existsSync(outputPath)) return {}; + const parsed = JSON.parse(await readFile(outputPath, "utf8")); + if (!parsed || Array.isArray(parsed) || typeof parsed !== "object") { + throw new Error( + `Existing cache is not a family-keyed object: ${outputPath}`, + ); + } + return parsed as PinoutCache; +}; + +const summarizeCache = ( + candidates: readonly PinoutCandidate[], + cache: PinoutCache, + resumed: number, + fetched: number, + selection: CandidateSelectionDiagnostics, +): PinoutCacheSummary => { + const entries = candidates.map((candidate) => cache[candidate.family]); + const unavailableByReason: Record = {}; + let successes = 0; + let unavailable = 0; + let pinCountMatches = 0; + let pinCountMismatches = 0; + for (const entry of entries) { + if (!entry) continue; + if (entry.status === "ok") { + successes += 1; + if (entry.pins.length === entry.expectedPinCount) pinCountMatches += 1; + else pinCountMismatches += 1; + continue; + } + unavailable += 1; + unavailableByReason[entry.reason] = + (unavailableByReason[entry.reason] ?? 0) + 1; + } + return { + selected: candidates.length, + resumed, + fetched, + successes, + unavailable, + pinCountMatches, + pinCountMismatches, + unavailableByReason, + selection, + }; +}; + +export const runTiSysblocksPinoutCache = async (options: { + repoRoot: string; + catalogPath: string; + outputPath: string; + concurrency?: number; + retries?: number; + refresh?: boolean; + retryUnavailable?: boolean; + fetchPinout?: typeof fetchTiDocumentViewerPinout; + log?: (message: string) => void; +}) => { + const concurrency = Math.max( + 1, + Math.min(8, Math.floor(options.concurrency ?? DEFAULT_CONCURRENCY)), + ); + const retries = Math.max( + 0, + Math.min(5, Math.floor(options.retries ?? DEFAULT_RETRIES)), + ); + const log = options.log ?? console.log; + const catalog = JSON.parse( + await readFile(options.catalogPath, "utf8"), + ) as TiSysblocksCatalogEntry[]; + const { candidates, diagnostics } = await selectTiSysblocksPinoutCandidates( + catalog, + { + repoRoot: options.repoRoot, + }, + ); + const existing = await readExistingCache(options.outputPath); + const cache: PinoutCache = {}; + const pending: PinoutCandidate[] = []; + let resumed = 0; + + for (const candidate of candidates) { + const cached = existing[candidate.family]; + const reuse = + !options.refresh && + isReusableCacheEntry(cached, candidate) && + !(options.retryUnavailable && cached?.status === "unavailable"); + if (reuse && cached) { + cache[candidate.family] = cached; + resumed += 1; + } else { + pending.push(candidate); + } + } + await writeCacheAtomically(options.outputPath, cache); + + log( + `Selected ${candidates.length} families (${diagnostics.tiDatasheetCandidates} TI-datasheet + ${diagnostics.jlcpcbCoordinateCandidates} coordinate-label JLC + ${diagnostics.jlcpcbNumericPhysicalCandidates} numeric-physical JLC); resumed ${resumed}, fetching ${pending.length} with concurrency ${concurrency}.`, + ); + + let nextIndex = 0; + let completed = resumed; + let writeQueue = Promise.resolve(); + const persist = () => { + writeQueue = writeQueue.then(() => + writeCacheAtomically(options.outputPath, cache), + ); + return writeQueue; + }; + + const worker = async () => { + while (nextIndex < pending.length) { + const index = nextIndex; + nextIndex += 1; + const candidate = pending[index]; + const { result, attempts } = await fetchWithRetries( + candidate, + retries, + options.fetchPinout ?? fetchTiDocumentViewerPinout, + ); + const previous = existing[candidate.family]; + const preservePreviousSuccess = + result.status === "unavailable" && + result.reason === "http-error" && + previous?.status === "ok" && + isReusableCacheEntry(previous, candidate); + const entry = preservePreviousSuccess + ? previous + : toCacheEntry(candidate, result, attempts); + cache[candidate.family] = entry; + completed += 1; + const detail = preservePreviousSuccess + ? `preserved previous successful cache after transient HTTP failure: ${result.status === "unavailable" ? result.message : "unknown error"}` + : entry.status === "ok" + ? `${entry.pins.length} pins` + : `${entry.reason}: ${entry.message}`; + log( + `[${completed}/${candidates.length}] ${candidate.family}/${candidate.packageCode}: ${entry.status} (${detail})`, + ); + await persist(); + } + }; + + await Promise.all( + Array.from({ length: Math.min(concurrency, pending.length) }, async () => + worker(), + ), + ); + await writeQueue; + if (Object.keys(cache).length !== candidates.length) { + throw new Error( + `Cache completeness check failed: ${Object.keys(cache).length}/${candidates.length} family entries.`, + ); + } + + const summary = summarizeCache( + candidates, + cache, + resumed, + pending.length, + diagnostics, + ); + log(JSON.stringify(summary, null, 2)); + return summary; +}; + +const parseIntegerOption = (value: string | undefined, option: string) => { + const parsed = Number(value); + if (!Number.isInteger(parsed)) + throw new Error(`${option} requires an integer.`); + return parsed; +}; + +const runCli = async () => { + const scriptDirectory = dirname(fileURLToPath(import.meta.url)); + const repoRoot = resolve(scriptDirectory, ".."); + let catalogPath = resolve( + repoRoot, + "lib/chips/ti-sysblocks-chip-catalog.json", + ); + let outputPath = resolve(repoRoot, "lib/chips/ti-sysblocks-pinouts.json"); + let concurrency = DEFAULT_CONCURRENCY; + let retries = DEFAULT_RETRIES; + let refresh = false; + let retryUnavailable = false; + const args = process.argv.slice(2); + + for (let index = 0; index < args.length; index += 1) { + const argument = args[index]; + if (argument === "--catalog") catalogPath = resolve(args[++index] ?? ""); + else if (argument === "--output") outputPath = resolve(args[++index] ?? ""); + else if (argument === "--concurrency") { + concurrency = parseIntegerOption(args[++index], argument); + } else if (argument === "--retries") { + retries = parseIntegerOption(args[++index], argument); + } else if (argument === "--refresh") refresh = true; + else if (argument === "--retry-unavailable") retryUnavailable = true; + else if (argument === "--help") { + console.log(`Usage: bun scripts/cache-ti-sysblocks-pinouts.ts [options] + +Options: + --catalog Catalog JSON path + --output Cache JSON path + --concurrency <1-8> Concurrent TI requests (default: 4) + --retries <0-5> Retries for transient HTTP failures (default: 2) + --refresh Ignore all reusable cache entries + --retry-unavailable Re-fetch only cached unavailable entries`); + return; + } else throw new Error(`Unknown option: ${argument}`); + } + + await runTiSysblocksPinoutCache({ + repoRoot, + catalogPath, + outputPath, + concurrency, + retries, + refresh, + retryUnavailable, + }); +}; + +const entry = process.argv[1]; +if (entry && import.meta.url === pathToFileURL(resolve(entry)).href) { + await runCli(); +} diff --git a/scripts/enrich-ti-array-pin-labels.test.ts b/scripts/enrich-ti-array-pin-labels.test.ts new file mode 100644 index 00000000..cb48a9a3 --- /dev/null +++ b/scripts/enrich-ti-array-pin-labels.test.ts @@ -0,0 +1,122 @@ +import { describe, expect, test } from "bun:test"; + +import { + enrichArrayComponentSource, + enrichArrayPinMetadata, + parsePinLabels, +} from "./enrich-ti-array-pin-labels.ts"; + +const pins = [ + { number: "A1", name: "VSS", type: "Ground", description: "Ground" }, + { number: "B1", name: "GPIO0", type: "I/O", description: "GPIO" }, + { number: "A2", name: "VSS", type: "Ground", description: "Ground" }, +]; + +describe("TI array-pin enrichment", () => { + test("maps functions through physical aliases rather than array order", () => { + const metadata = enrichArrayPinMetadata( + { + pin1: ["B1"], + pin2: ["A2"], + pin3: ["A1"], + }, + pins, + ); + + expect(metadata.pinLabels.pin1).toEqual(["GPIO0", "B1"]); + expect(metadata.pinLabels.pin2).toEqual(["VSS", "A2", "VSS_A2"]); + expect(metadata.pinLabels.pin3).toEqual(["VSS", "A1", "VSS_A1"]); + expect(metadata.pinRoles).toEqual({ + pin1: "bidirectional", + pin2: "ground", + pin3: "ground", + }); + expect(metadata.pinAttributes).toEqual({ + pin2: { requiresGround: true }, + pin3: { requiresGround: true }, + }); + }); + + test("rejects an official ball that is absent from the footprint", () => { + expect(() => enrichArrayPinMetadata({ pin1: ["A1"] }, [pins[1]])).toThrow( + "official physical pin B1 has no footprint port", + ); + }); + + test("maps numeric PIN aliases directly to their existing pin keys", () => { + const metadata = enrichArrayPinMetadata( + { + pin1: ["PIN1"], + pin2: ["2"], + pin3: ["PIN_03"], + }, + [ + { number: "1", name: "VCC", type: "Power", description: "Supply" }, + { number: "2", name: "OUT", type: "Output", description: "Output" }, + { number: "3", name: "NC", type: "", description: "Do not connect" }, + ], + ); + + expect(metadata.pinLabels).toEqual({ + pin1: ["VCC", "1"], + pin2: ["OUT", "2"], + pin3: ["NC", "3"], + }); + expect(metadata.pinRoles).toEqual({ + pin1: "power", + pin2: "output", + pin3: "no-connect", + }); + expect(metadata.pinAttributes).toEqual({ + pin1: { requiresPower: true }, + pin3: { doNotConnect: true }, + }); + }); + + test("does not mistake a generated functional alias for another physical ball", () => { + const metadata = enrichArrayPinMetadata( + { + pin1: ["A1", "B1"], + pin2: ["VSS", "A1"], + }, + [ + { number: "A1", name: "VSS", type: "Ground", description: "Ground" }, + { number: "B1", name: "A1", type: "I", description: "Input" }, + ], + ); + + expect(metadata.pinLabels).toEqual({ + pin2: ["VSS", "A1"], + pin1: ["A1", "B1"], + }); + }); + + test("rewrites only symbol metadata and schematic props", () => { + const source = `import type { ChipProps } from "@tscircuit/props" +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts" + +const pinLabels = { + pin1: ["A1"], + pin2: ["B1"], + pin3: ["A2"] +} as const + +export const Example = (props: ChipProps) => ( + +) +`; + const output = enrichArrayComponentSource(source, pins); + const parsed = parsePinLabels(output); + + expect(parsed.labels.pin1).toEqual(["VSS", "A1", "VSS_A1"]); + expect(output).toContain("getTiSchematicLayout(pinLabels, { pinRoles })"); + expect(output).toContain("pinAttributes={pinAttributes}"); + expect(output).toContain('footprint="bga3"'); + expect(enrichArrayComponentSource(output, pins)).toBe(output); + }); +}); diff --git a/scripts/enrich-ti-array-pin-labels.ts b/scripts/enrich-ti-array-pin-labels.ts new file mode 100644 index 00000000..e5b7021e --- /dev/null +++ b/scripts/enrich-ti-array-pin-labels.ts @@ -0,0 +1,343 @@ +import { readFile, writeFile } from "node:fs/promises"; +import { dirname, resolve } from "node:path"; +import { fileURLToPath, pathToFileURL } from "node:url"; + +import ts from "typescript"; + +import type { TiSchematicPinRole } from "../lib/chips/get-ti-schematic-layout.ts"; +import { + sanitizeTiPinLabel, + type TiDocumentPin, + toTscircuitPinMetadata, +} from "./ti-document-viewer-pinout.ts"; + +type PhysicalOnlySelectionReason = + | "jlcpcb-physical-coordinate-labels" + | "jlcpcb-numeric-physical-labels" + | "jlcpcb-physical-numeric-labels"; + +interface PhysicalOnlyPinoutCacheEntry { + family: string; + catalogSource: "jlcpcb"; + selectionReason: PhysicalOnlySelectionReason; + pinLabelSourcePath: string; + status: "ok"; + pins: TiDocumentPin[]; +} + +type PinoutCacheEntry = + | PhysicalOnlyPinoutCacheEntry + | { + catalogSource?: string; + selectionReason?: string; + status?: string; + }; + +type PinoutCache = Record; + +interface ParsedPinLabels { + statementStart: number; + statementEnd: number; + labels: Record; +} + +export interface EnrichedArrayPinMetadata { + pinLabels: Record; + pinRoles: Partial>; + pinAttributes: Record< + string, + { requiresPower?: true; requiresGround?: true; doNotConnect?: true } + >; +} + +const normalizePhysicalIdentifier = (value: string) => { + const normalized = value.trim().toUpperCase(); + const numeric = /^(?:PIN_?)?0*(\d+)$/.exec(normalized); + return numeric ? String(Number(numeric[1])) : normalized; +}; + +const unwrapExpression = (expression: ts.Expression): ts.Expression => { + if ( + ts.isAsExpression(expression) || + ts.isTypeAssertionExpression(expression) || + ts.isParenthesizedExpression(expression) || + ts.isSatisfiesExpression(expression) + ) { + return unwrapExpression(expression.expression); + } + return expression; +}; + +const getPropertyName = (name: ts.PropertyName, sourceFile: ts.SourceFile) => { + if ( + ts.isIdentifier(name) || + ts.isStringLiteral(name) || + ts.isNumericLiteral(name) + ) { + return name.text; + } + return name.getText(sourceFile).replace(/^['"]|['"]$/g, ""); +}; + +const getStringAliases = (expression: ts.Expression) => { + const unwrapped = unwrapExpression(expression); + if ( + ts.isStringLiteral(unwrapped) || + ts.isNoSubstitutionTemplateLiteral(unwrapped) + ) { + return [unwrapped.text]; + } + if (!ts.isArrayLiteralExpression(unwrapped)) return []; + return unwrapped.elements.flatMap((element) => { + if ( + ts.isStringLiteral(element) || + ts.isNoSubstitutionTemplateLiteral(element) + ) { + return [element.text]; + } + return []; + }); +}; + +export const parsePinLabels = ( + sourceText: string, + sourcePath = "component.circuit.tsx", +): ParsedPinLabels => { + const sourceFile = ts.createSourceFile( + sourcePath, + sourceText, + ts.ScriptTarget.Latest, + true, + ts.ScriptKind.TSX, + ); + + let pinLabelsStatement: ts.VariableStatement | undefined; + let pinRolesStatement: ts.VariableStatement | undefined; + let pinAttributesStatement: ts.VariableStatement | undefined; + let labels: Record | undefined; + for (const statement of sourceFile.statements) { + if (!ts.isVariableStatement(statement)) continue; + for (const declaration of statement.declarationList.declarations) { + if (!ts.isIdentifier(declaration.name)) continue; + if (declaration.name.text === "pinRoles") pinRolesStatement = statement; + if (declaration.name.text === "pinAttributes") { + pinAttributesStatement = statement; + } + if (declaration.name.text !== "pinLabels" || !declaration.initializer) { + continue; + } + const initializer = unwrapExpression(declaration.initializer); + if (!ts.isObjectLiteralExpression(initializer)) continue; + + pinLabelsStatement = statement; + labels = {}; + for (const property of initializer.properties) { + if (!ts.isPropertyAssignment(property)) continue; + const pinKey = getPropertyName(property.name, sourceFile); + if (!/^pin\d+$/.test(pinKey)) continue; + labels[pinKey] = getStringAliases(property.initializer); + } + } + } + + if (pinLabelsStatement && labels) { + if (Boolean(pinRolesStatement) !== Boolean(pinAttributesStatement)) { + throw new Error( + `${sourcePath}: generated pinRoles and pinAttributes metadata must appear together`, + ); + } + return { + statementStart: pinLabelsStatement.getStart(sourceFile), + statementEnd: + pinRolesStatement && pinAttributesStatement + ? Math.max( + pinRolesStatement.getEnd(), + pinAttributesStatement.getEnd(), + ) + : pinLabelsStatement.getEnd(), + labels, + }; + } + + throw new Error(`${sourcePath}: could not find a pinLabels object`); +}; + +const roleForPin = (pin: TiDocumentPin) => { + const metadata = toTscircuitPinMetadata([pin]); + return Object.values(metadata.pinRoles)[0]; +}; + +export const enrichArrayPinMetadata = ( + existingPinLabels: Readonly>, + officialPins: readonly TiDocumentPin[], +): EnrichedArrayPinMetadata => { + const officialPhysical = new Set( + officialPins.map((pin) => normalizePhysicalIdentifier(pin.number)), + ); + const physicalToKey = new Map(); + for (const [pinKey, aliases] of Object.entries(existingPinLabels)) { + const generatedPhysicalAlias = aliases[1]; + const aliasesToInspect = + generatedPhysicalAlias && + officialPhysical.has(normalizePhysicalIdentifier(generatedPhysicalAlias)) + ? [generatedPhysicalAlias] + : aliases; + for (const alias of aliasesToInspect) { + const normalized = normalizePhysicalIdentifier(alias); + if (!normalized || !officialPhysical.has(normalized)) continue; + const previous = physicalToKey.get(normalized); + if (previous && previous !== pinKey) { + throw new Error( + `physical identifier ${normalized} is assigned to ${previous} and ${pinKey}`, + ); + } + physicalToKey.set(normalized, pinKey); + } + } + + const functionalCounts = new Map(); + for (const pin of officialPins) { + const functional = sanitizeTiPinLabel(pin.name, `PIN_${pin.number}`); + functionalCounts.set( + functional, + (functionalCounts.get(functional) ?? 0) + 1, + ); + } + + const pinLabels: Record = {}; + const pinRoles: Partial> = {}; + const pinAttributes: EnrichedArrayPinMetadata["pinAttributes"] = {}; + const usedKeys = new Set(); + + for (const pin of officialPins) { + const physical = normalizePhysicalIdentifier(pin.number); + const pinKey = physicalToKey.get(physical); + if (!pinKey) { + throw new Error( + `official physical pin ${pin.number} has no footprint port`, + ); + } + if (usedKeys.has(pinKey)) { + throw new Error(`multiple official pins map to footprint port ${pinKey}`); + } + usedKeys.add(pinKey); + + const functional = sanitizeTiPinLabel(pin.name, `PIN_${pin.number}`); + const aliases = [functional, physical]; + if ((functionalCounts.get(functional) ?? 0) > 1) { + aliases.push(`${functional}_${physical}`); + } + pinLabels[pinKey] = [...new Set(aliases)]; + + const role = roleForPin(pin); + if (role) pinRoles[pinKey] = role; + if (role === "power") pinAttributes[pinKey] = { requiresPower: true }; + if (role === "ground") pinAttributes[pinKey] = { requiresGround: true }; + if (role === "no-connect") pinAttributes[pinKey] = { doNotConnect: true }; + } + + const existingKeys = Object.keys(existingPinLabels); + if (usedKeys.size !== existingKeys.length) { + const missing = existingKeys.filter((key) => !usedKeys.has(key)); + throw new Error( + `${missing.length} footprint ports are absent from the official pin map: ${missing.join(", ")}`, + ); + } + + return { pinLabels, pinRoles, pinAttributes }; +}; + +const renderRecord = (record: object) => + JSON.stringify(record, null, 2).replace(/"(pin\d+)":/g, "$1:"); + +const renderMetadata = (metadata: EnrichedArrayPinMetadata) => + [ + `const pinLabels = ${renderRecord(metadata.pinLabels)} as const`, + "", + `const pinRoles = ${renderRecord(metadata.pinRoles)} as const`, + "", + `const pinAttributes = ${renderRecord(metadata.pinAttributes)} as const`, + ].join("\n"); + +export const enrichArrayComponentSource = ( + sourceText: string, + officialPins: readonly TiDocumentPin[], + sourcePath = "component.circuit.tsx", +) => { + const parsed = parsePinLabels(sourceText, sourcePath); + const metadata = enrichArrayPinMetadata(parsed.labels, officialPins); + let output = `${sourceText.slice(0, parsed.statementStart)}${renderMetadata(metadata)}${sourceText.slice(parsed.statementEnd)}`; + output = output.replace( + "{...getTiSchematicLayout(pinLabels)}", + "{...getTiSchematicLayout(pinLabels, { pinRoles })}", + ); + if (!output.includes("getTiSchematicLayout(pinLabels, { pinRoles })")) { + throw new Error(`${sourcePath}: could not update schematic-layout call`); + } + if (!output.includes("pinAttributes={pinAttributes}")) { + output = output.replace( + /^(\s*)pinLabels=\{[A-Za-z_$][\w$]*\}\s*$/m, + "$&\n$1pinAttributes={pinAttributes}", + ); + } + if (!output.includes("pinAttributes={pinAttributes}")) { + throw new Error(`${sourcePath}: could not insert pinAttributes prop`); + } + return output; +}; + +const isPhysicalOnlyPinout = ( + entry: PinoutCacheEntry, +): entry is PhysicalOnlyPinoutCacheEntry => + entry.catalogSource === "jlcpcb" && + (entry.selectionReason === "jlcpcb-physical-coordinate-labels" || + entry.selectionReason === "jlcpcb-numeric-physical-labels" || + entry.selectionReason === "jlcpcb-physical-numeric-labels") && + entry.status === "ok"; + +const runCli = async () => { + const repositoryRoot = resolve(dirname(fileURLToPath(import.meta.url)), ".."); + const cachePath = resolve( + repositoryRoot, + "lib/chips/ti-sysblocks-pinouts.json", + ); + const cache = JSON.parse(await readFile(cachePath, "utf8")) as PinoutCache; + let updated = 0; + + const selected = Object.values(cache).filter(isPhysicalOnlyPinout); + const updatedByReason: Record = {}; + const pendingWrites: Array<{ path: string; output: string }> = []; + for (const entry of selected) { + const componentPath = resolve(repositoryRoot, entry.pinLabelSourcePath); + const source = await readFile(componentPath, "utf8"); + let output: string; + try { + output = enrichArrayComponentSource( + source, + entry.pins, + entry.pinLabelSourcePath, + ); + } catch (error) { + throw new Error( + `${entry.family}: ${error instanceof Error ? error.message : String(error)}`, + ); + } + pendingWrites.push({ path: componentPath, output }); + updated += 1; + updatedByReason[entry.selectionReason] = + (updatedByReason[entry.selectionReason] ?? 0) + 1; + } + + for (const pending of pendingWrites) { + await writeFile(pending.path, pending.output); + } + + console.log({ selected: selected.length, updated, updatedByReason }); +}; + +const isDirectExecution = () => { + const entry = process.argv[1]; + return Boolean(entry && import.meta.url === pathToFileURL(entry).href); +}; + +if (isDirectExecution()) await runCli(); diff --git a/scripts/generate-ti-sysblocks-exports.ts b/scripts/generate-ti-sysblocks-exports.ts new file mode 100644 index 00000000..d6a2cd4e --- /dev/null +++ b/scripts/generate-ti-sysblocks-exports.ts @@ -0,0 +1,62 @@ +import { dirname, join } from "node:path"; +import { fileURLToPath } from "node:url"; + +type CatalogEntry = { + family: string; + exportName: string; + source: "existing" | "jlcpcb" | "ti-datasheet"; + componentExportName?: string; +}; + +const repositoryRoot = join(dirname(fileURLToPath(import.meta.url)), ".."); +const chipDirectory = join(repositoryRoot, "lib/chips"); +const catalogPath = join(chipDirectory, "ti-sysblocks-chip-catalog.json"); +const outputPath = join(chipDirectory, "ti-sysblocks-components.tsx"); + +const catalog = (await Bun.file(catalogPath).json()) as CatalogEntry[]; +const entries = [...catalog].sort((left, right) => + left.exportName.localeCompare(right.exportName), +); + +const imports = entries.map((entry) => { + const componentName = entry.componentExportName ?? entry.exportName; + return `import { ${componentName} } from "./${componentName}.circuit.tsx";`; +}); + +const exactExports = entries + .filter((entry) => entry.source !== "existing") + .map((entry) => entry.componentExportName!) + .sort((left, right) => left.localeCompare(right)); + +const aliases = entries.flatMap((entry) => { + if (entry.source === "existing") return []; + if (entry.exportName === entry.componentExportName) return []; + return [ + `/** ${entry.family}, using the canonical package recorded in ti-sysblocks-chip-catalog.json. */`, + `export const ${entry.exportName} = ${entry.componentExportName};`, + ]; +}); + +const source = `// This file is generated by scripts/generate-ti-sysblocks-exports.ts. +// Do not edit it by hand; update ti-sysblocks-chip-catalog.json and regenerate. + +${imports.join("\n")} + +export { +${exactExports.map((name) => ` ${name},`).join("\n")} +}; + +${aliases.join("\n")} + +/** All TI product-family recommendations found in tscircuit/ti-sysblocks. */ +export const TiSysblocksChipComponents = { +${entries.map((entry) => ` ${entry.exportName},`).join("\n")} +} as const; + +export type TiSysblocksChipName = keyof typeof TiSysblocksChipComponents; +export type TiSysblocksChipComponent = + (typeof TiSysblocksChipComponents)[TiSysblocksChipName]; +`; + +await Bun.write(outputPath, source); +console.log(`Generated ${entries.length} family exports in ${outputPath}`); diff --git a/scripts/materialize-ti-datasheet-components.test.ts b/scripts/materialize-ti-datasheet-components.test.ts new file mode 100644 index 00000000..e2277482 --- /dev/null +++ b/scripts/materialize-ti-datasheet-components.test.ts @@ -0,0 +1,596 @@ +import assert from "node:assert/strict"; +import { resolve } from "node:path"; +import { describe, test } from "node:test"; + +import { + assertFootprintDestinations, + buildCoordinatePhysicalMap, + buildTiGeneratedPins, + type CommittedFootprintCatalog, + deriveTiPinRole, + extractDonorPinLabels, + mergeTiSupplementalPins, + renderCoordinateGridFootprintProp, + renderTiDatasheetComponent, + type TiDatasheetCatalogEntry, + type TiOfficialPin, +} from "./materialize-ti-datasheet-components.ts"; + +const pin = ( + number: string, + name: string, + type = "", + description = "", +): TiOfficialPin => ({ number, name, type, description }); + +const auditedSupplementalDestinations = new Map< + string, + { physical: string; pinKey: string } +>([ + ["CC2340R21N0RGER", { physical: "25", pinKey: "pin25" }], + ["CC2531F128RHAR", { physical: "41", pinKey: "pin41" }], + ["CC2755P105E0WRHAR", { physical: "41", pinKey: "pin41" }], + ["CC2755P207E0WRHAR", { physical: "41", pinKey: "pin41" }], + ["CC3501ENJARSHR", { physical: "57", pinKey: "pin57" }], + ["CC3551ENJARSHR", { physical: "57", pinKey: "pin57" }], + ["CSD18531Q5AT", { physical: "9", pinKey: "pin9" }], + ["DAC43701DSGR", { physical: "9", pinKey: "pin9" }], + ["DP83826AERHBR", { physical: "33", pinKey: "pin33" }], + ["DRV8363QRGZRQ1", { physical: "49", pinKey: "pin49" }], + ["LMG3612REQR", { physical: "39", pinKey: "pin39" }], + ["XMSPM0G1218SRGZR", { physical: "49", pinKey: "pin49" }], + ["TLC69699DRRR", { physical: "13", pinKey: "pin13" }], + ["PTLIN821DRBRQ1", { physical: "9", pinKey: "pin9" }], +]); + +describe("TI datasheet component materialization", () => { + test("committed footprint selections cover every TI-datasheet target", async () => { + const footprintCatalog = (await Bun.file( + resolve( + import.meta.dir, + "../lib/chips/ti-sysblocks-footprint-selections.json", + ), + ).json()) as CommittedFootprintCatalog; + const chipCatalog = (await Bun.file( + resolve(import.meta.dir, "../lib/chips/ti-sysblocks-chip-catalog.json"), + ).json()) as TiDatasheetCatalogEntry[]; + const entries = chipCatalog.filter( + (entry) => entry.source === "ti-datasheet", + ); + const entriesByMpn = new Map( + entries.map((entry) => [entry.manufacturerPartNumber, entry]), + ); + const targets = Object.values(footprintCatalog.targets); + + assert.equal(footprintCatalog.schemaVersion, 1); + assert.equal(footprintCatalog.targetCount, 111); + assert.equal(footprintCatalog.coverage.targetEntries, 111); + assert.equal(footprintCatalog.coverage.sourceReadyEntries, 111); + assert.equal(footprintCatalog.coverage.unavailableEntries, 0); + assert.equal(entries.length, 111); + assert.equal(entriesByMpn.size, 111); + assert.equal(targets.length, 111); + for (const [manufacturerPartNumber, target] of Object.entries( + footprintCatalog.targets, + )) { + const entry = entriesByMpn.get(manufacturerPartNumber); + assert.ok(entry, `Unexpected footprint target ${manufacturerPartNumber}`); + assert.equal(target.status, "source-ready"); + assert.equal(target.manufacturerPartNumber, manufacturerPartNumber); + assert.equal(target.family, entry.family); + assert.equal(target.componentExportName, entry.componentExportName); + assert.equal(target.packageDrawing, entry.packageDrawing); + assert.equal(target.drawingId, target.packageDrawing); + assert.ok(target.provenanceComment?.includes(target.drawingId ?? "")); + } + }); + + test("every committed footprint destination resolves to a generated port", async () => { + const footprintCatalog = (await Bun.file( + resolve( + import.meta.dir, + "../lib/chips/ti-sysblocks-footprint-selections.json", + ), + ).json()) as CommittedFootprintCatalog; + const chipCatalog = (await Bun.file( + resolve(import.meta.dir, "../lib/chips/ti-sysblocks-chip-catalog.json"), + ).json()) as TiDatasheetCatalogEntry[]; + const pinoutCatalog = (await Bun.file( + resolve(import.meta.dir, "../lib/chips/ti-sysblocks-pinouts.json"), + ).json()) as Record< + string, + { status: "ok" | "unavailable"; pins?: TiOfficialPin[] } + >; + + let auditedSupplementalCount = 0; + for (const entry of chipCatalog.filter( + (candidate) => candidate.source === "ti-datasheet", + )) { + const target = footprintCatalog.targets[entry.manufacturerPartNumber]; + const pinout = pinoutCatalog[entry.family]; + assert.equal(target?.status, "source-ready", entry.family); + assert.equal(pinout?.status, "ok", entry.family); + const coordinatePinAssignment = target.coordinateGrid + ? { + mode: "physical-alias" as const, + rowOrder: target.coordinateGrid.rowOrder, + columnOrder: target.coordinateGrid.columnOrder, + } + : target.coordinatePinAssignment; + const generatedPins = buildTiGeneratedPins({ + pins: mergeTiSupplementalPins( + pinout.pins ?? [], + target.supplementalPins, + ), + expectedPinCount: entry.pinCount, + explicitPhysicalMap: target.physicalPadToPortHint, + ignoredPhysicalPins: target.ignoredPhysicalPins, + coordinatePinAssignment, + }); + const footprintPropSource = target.coordinateGrid + ? renderCoordinateGridFootprintProp({ + pins: generatedPins, + grid: target.coordinateGrid, + }) + : target.footprintPropSource; + assert.ok(footprintPropSource, `${entry.family} has footprint source`); + assertFootprintDestinations({ + pins: generatedPins, + footprintPropSource, + physicalPadToPortHint: target.physicalPadToPortHint, + label: `${entry.family}:${target.drawingId}`, + }); + const audited = auditedSupplementalDestinations.get( + entry.manufacturerPartNumber, + ); + if (audited) { + auditedSupplementalCount += 1; + assert.ok( + target.supplementalPins?.some( + (supplemental) => supplemental.number === audited.physical, + ), + `${entry.family} preserves supplemental physical ${audited.physical}`, + ); + assert.ok( + Object.values(target.physicalPadToPortHint ?? {}).includes( + audited.pinKey, + ), + `${entry.family} maps copper to ${audited.pinKey}`, + ); + assert.ok( + generatedPins.some( + (generated) => generated.pinKey === audited.pinKey, + ), + `${entry.family} generates ${audited.pinKey}`, + ); + } + } + assert.equal(auditedSupplementalCount, 14); + }); + + test("maps BGA coordinates through donor aliases rather than row-major order", () => { + const donorPinLabels = extractDonorPinLabels(` + const pinLabels = { + pin1: ["D2"], + pin2: ["D1"], + pin3: ["C1"], + pin7: ["A1"], + } as const + `); + const generated = buildTiGeneratedPins({ + pins: [ + pin("D1", "GND", "GND"), + pin("D2", "ON", "Input"), + pin("C1", "VOUT", "Output"), + pin("A1", "VOUT", "Output"), + ], + expectedPinCount: 4, + donorPinLabels, + }); + + assert.deepEqual( + generated.map(({ pinKey, physical }) => [pinKey, physical]), + [ + ["pin1", "D2"], + ["pin2", "D1"], + ["pin3", "C1"], + ["pin7", "A1"], + ], + ); + assert.deepEqual( + generated.find(({ pinKey }) => pinKey === "pin7")?.labels, + ["VOUT", "A1", "VOUT_A1"], + ); + }); + + test("maps an official coordinate footprint through physical aliases without a donor", () => { + const pins = [ + pin("D2", "ON", "Input"), + pin("A1", "VOUT", "Output"), + pin("D1", "GND", "Ground"), + pin("C1", "VDD", "Power"), + ]; + const assignment = { + mode: "physical-alias" as const, + rowOrder: ["A", "C", "D"], + }; + + assert.deepEqual( + buildCoordinatePhysicalMap({ + pins, + expectedPinCount: 4, + assignment, + }), + { A1: "pin1", C1: "pin2", D1: "pin3", D2: "pin4" }, + ); + assert.deepEqual( + buildTiGeneratedPins({ + pins, + expectedPinCount: 4, + coordinatePinAssignment: assignment, + }).map(({ pinKey, physical, labels }) => ({ + pinKey, + physical, + labels, + })), + [ + { pinKey: "pin1", physical: "A1", labels: ["VOUT", "A1"] }, + { pinKey: "pin2", physical: "C1", labels: ["VDD", "C1"] }, + { pinKey: "pin3", physical: "D1", labels: ["GND", "D1"] }, + { pinKey: "pin4", physical: "D2", labels: ["ON", "D2"] }, + ], + ); + }); + + test("renders compact grid footprints with physical aliases and custom axes", () => { + const pins = buildTiGeneratedPins({ + pins: [pin("A1", "IN", "Input"), pin("K22", "OUT", "Output")], + expectedPinCount: 2, + coordinatePinAssignment: { + mode: "physical-alias", + rowOrder: ["A", "K"], + columnOrder: [1, 22], + }, + }); + const source = renderCoordinateGridFootprintProp({ + pins, + grid: { + rowOrder: ["A", "K"], + columnOrder: [1, 22], + rowAxis: "x", + rowPitchMm: 0.742, + columnPositionsMm: { "1": -6.307, "22": 6.307 }, + padShape: "rect", + padWidthMm: 0.6, + padHeightMm: 0.6, + }, + }); + + assert.match( + source, + /portHints=\{\["A1"\]\} pcbX="-0.371mm" pcbY="-6.307mm"/, + ); + assert.match( + source, + /portHints=\{\["K22"\]\} pcbX="0.371mm" pcbY="6.307mm"/, + ); + assert.match(source, /width="0.6mm" height="0.6mm" shape="rect"/); + + const bgaPins = buildTiGeneratedPins({ + pins: [pin("A1", "IN", "Input"), pin("P14", "OUT", "Output")], + expectedPinCount: 2, + coordinatePinAssignment: { + mode: "physical-alias", + rowOrder: [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P", + ], + columnOrder: Array.from({ length: 14 }, (_, index) => index + 1), + }, + }); + const bgaSource = renderCoordinateGridFootprintProp({ + pins: bgaPins, + grid: { + rowOrder: [ + "A", + "B", + "C", + "D", + "E", + "F", + "G", + "H", + "J", + "K", + "L", + "M", + "N", + "P", + ], + columnOrder: Array.from({ length: 14 }, (_, index) => index + 1), + pitchMm: 0.65, + padShape: "circle", + padDiameterMm: 0.35, + }, + }); + assert.match(bgaSource, /pcbX="-4.225mm" pcbY="4.225mm"/); + assert.match(bgaSource, /pcbX="4.225mm" pcbY="-4.225mm"/); + assert.match(bgaSource, /radius="0.175mm" shape="circle"/); + }); + + test("fills omitted numeric positions as no-connect and keeps numbered pads direct", () => { + const generated = buildTiGeneratedPins({ + pins: [pin("1", "VDD", "Power"), pin("3", "OUT", "Output")], + expectedPinCount: 3, + }); + assert.deepEqual( + generated.map(({ pinKey, labels, role, attributes }) => ({ + pinKey, + labels, + role, + attributes, + })), + [ + { + pinKey: "pin1", + labels: ["VDD", "1"], + role: "power", + attributes: { requiresPower: true }, + }, + { + pinKey: "pin2", + labels: ["NC", "2"], + role: "no-connect", + attributes: { doNotConnect: true }, + }, + { + pinKey: "pin3", + labels: ["OUT", "3"], + role: "output", + attributes: undefined, + }, + ], + ); + }); + + test("uses a compact primary display function for multiplexed pins", () => { + const [generated] = buildTiGeneratedPins({ + pins: [pin("1", "P1.0/TA0.1/DMAE0", "I/O")], + expectedPinCount: 1, + }); + + assert.deepEqual(generated.labels, ["P1_0", "TA0_1", "DMAE0", "1"]); + }); + + test("uses explicit copper mappings for special pads and permits a numbered EP", () => { + const generated = buildTiGeneratedPins({ + pins: [ + pin("1", "IN", "Input"), + pin("2", "GND", "Ground"), + pin("Thermal Pad", "GND", "Ground"), + pin("17", "EP", "Ground"), + ], + expectedPinCount: 16, + explicitPhysicalMap: { "Thermal Pad": "pin18" }, + }); + assert.equal( + generated.find(({ physical }) => physical === "Thermal Pad")?.pinKey, + "pin18", + ); + assert.equal( + generated.find(({ physical }) => physical === "17")?.pinKey, + "pin17", + ); + }); + + test("merges multiple physical contacts that intentionally share one copper port", () => { + const generated = buildTiGeneratedPins({ + pins: [ + pin("1", "GND", "Ground"), + pin("2", "OUT", "Output"), + pin("Tab", "OUT", "Output"), + pin("3", "IN", "Input"), + ], + expectedPinCount: 3, + explicitPhysicalMap: { Tab: "pin2" }, + }); + + assert.equal(generated.length, 3); + assert.deepEqual( + generated.find(({ pinKey }) => pinKey === "pin2"), + { + pinKey: "pin2", + physical: "2, Tab", + name: "OUT", + labels: ["OUT", "2", "OUT_2", "TAB", "OUT_TAB"], + role: "output", + attributes: undefined, + }, + ); + }); + + test("ignores target-specific pin-table artifacts before filling numeric NCs", () => { + const generated = buildTiGeneratedPins({ + pins: [ + pin("1", "IN", "Input"), + pin("2", "GND", "Ground"), + pin("3", "EN", "Input"), + pin("4", "NC", "No connect"), + pin("5", "OUT", "Output"), + pin("Thermal pad", "Thermal pad", "Thermal pad"), + ], + expectedPinCount: 5, + ignoredPhysicalPins: ["Thermal pad"], + }); + + assert.deepEqual( + generated.map(({ pinKey }) => pinKey), + ["pin1", "pin2", "pin3", "pin4", "pin5"], + ); + }); + + test("derives schematic roles from official type, name, and description", () => { + assert.equal(deriveTiPinRole(pin("1", "VDD", "Power")), "power"); + assert.equal( + deriveTiPinRole(pin("2", "SDA", "Input/output")), + "bidirectional", + ); + assert.equal(deriveTiPinRole(pin("3", "RESET", "Input")), "control"); + assert.equal( + deriveTiPinRole(pin("4", "NC", "", "Do not connect")), + "no-connect", + ); + assert.equal(deriveTiPinRole(pin("5", "A0", "I")), "input"); + assert.equal(deriveTiPinRole(pin("6", "Y", "O")), "output"); + assert.equal(deriveTiPinRole(pin("7", "SUP", "P")), "power"); + assert.equal( + deriveTiPinRole(pin("8", "P1.0/TA0.1/VREF-", "I/O")), + "bidirectional", + ); + assert.equal( + deriveTiPinRole( + pin("9", "OUT", "O", "Output capacitor returns to ground"), + ), + "output", + ); + assert.equal( + deriveTiPinRole(pin("10", "VREG", "O", "Regulator output")), + "output", + ); + assert.equal( + deriveTiPinRole(pin("11", "IN", "I", "Input supply pin")), + "power", + ); + assert.equal( + deriveTiPinRole( + pin("Pad", "QFN Pad", "", "TI recommends connection to VSS"), + ), + "ground", + ); + assert.equal(deriveTiPinRole(pin("12", "Y", "", "Output")), "output"); + assert.equal(deriveTiPinRole(pin("13", "A", "", "Input")), "input"); + assert.equal( + deriveTiPinRole( + pin( + "14", + "THERMAL_PAD", + "Thermal", + "Used only for thermal dissipation; not electrical grounding", + ), + ), + "thermal", + ); + assert.equal( + deriveTiPinRole( + pin( + "15", + "THERMAL_PAD", + "", + "Thermal pad. Connect to a solid ground plane.", + ), + ), + "ground", + ); + assert.equal( + deriveTiPinRole( + pin("16", "THERMAL_PAD", "", "Can be grounded or left floating."), + ), + "thermal", + ); + assert.equal( + deriveTiPinRole(pin("17", "PAD", "", "No electrical role specified")), + "thermal", + ); + assert.equal( + deriveTiPinRole(pin("18", "GATE", "", "MOSFET gate")), + "control", + ); + assert.deepEqual( + buildTiGeneratedPins({ + pins: [pin("1", "THERMAL_PAD", "", "No electrical connection")], + expectedPinCount: 1, + })[0], + { + pinKey: "pin1", + physical: "1", + name: "THERMAL_PAD", + labels: ["THERMAL_PAD", "1"], + role: "thermal", + attributes: undefined, + }, + ); + }); + + test("fails loudly when selected or inline footprint hints target absent ports", () => { + const generatedPins = buildTiGeneratedPins({ + pins: [pin("1", "IN", "Input"), pin("2", "OUT", "Output")], + expectedPinCount: 2, + }); + assert.throws( + () => + assertFootprintDestinations({ + pins: generatedPins, + footprintPropSource: + 'footprint={}', + physicalPadToPortHint: { Pad: "pin4" }, + label: "missing-destinations", + }), + /physicalPadToPortHint\["Pad"\] -> pin4.*inline portHints -> pin3/, + ); + }); + + test("accepts footprint hints that target a generated physical alias", () => { + const generatedPins = buildTiGeneratedPins({ + pins: [pin("A1", "IN", "Input")], + expectedPinCount: 1, + coordinatePinAssignment: { + mode: "physical-alias", + rowOrder: ["A"], + }, + }); + assert.doesNotThrow(() => + assertFootprintDestinations({ + pins: generatedPins, + footprintPropSource: + 'footprint={}', + }), + ); + }); + + test("renders named and default exports with standard schematic layout", () => { + const entry: TiDatasheetCatalogEntry = { + family: "TEST", + source: "ti-datasheet", + componentExportName: "TESTD", + manufacturerPartNumber: "TESTD", + pinCount: 2, + packageDrawing: "D0002A", + }; + const source = renderTiDatasheetComponent({ + entry, + pins: buildTiGeneratedPins({ + pins: [pin("1", "IN", "Input"), pin("2", "OUT", "Output")], + expectedPinCount: 2, + }), + footprintPropSource: 'footprint="soic2"', + footprintProvenance: "TI drawing D0002A; donor TEST2 (JLCPCB C1)", + }); + assert.match(source, /export const TESTD/); + assert.match(source, /export default TESTD/); + assert.match(source, /getTiSchematicLayout\(pinLabels, \{ pinRoles \}\)/); + assert.match(source, /Footprint provenance: TI drawing D0002A/); + assert.doesNotMatch(source, /schPinSpacing/); + }); +}); diff --git a/scripts/materialize-ti-datasheet-components.ts b/scripts/materialize-ti-datasheet-components.ts new file mode 100644 index 00000000..c99ac643 --- /dev/null +++ b/scripts/materialize-ti-datasheet-components.ts @@ -0,0 +1,1350 @@ +import { relative, resolve } from "node:path"; +import ts from "typescript"; + +export type TiDatasheetCatalogEntry = { + family: string; + source: "existing" | "jlcpcb" | "ti-datasheet"; + componentExportName: string; + manufacturerPartNumber: string; + packageCode?: string; + pinCount: number; + packageDrawing?: string; +}; + +export type TiOfficialPin = { + number: string; + name: string; + type: string; + description: string; +}; + +type TiPinoutOk = { + family: string; + catalogSource: "ti-datasheet"; + manufacturerPartNumber: string; + expectedPinCount: number; + status: "ok"; + pins: TiOfficialPin[]; +}; + +type TiPinoutUnavailable = { + family: string; + catalogSource: "ti-datasheet"; + manufacturerPartNumber: string; + expectedPinCount: number; + status: "unavailable"; + reason: string; + message: string; +}; + +type TiPinoutRecord = TiPinoutOk | TiPinoutUnavailable; + +export type CommittedFootprintTarget = { + family: string; + componentExportName: string; + manufacturerPartNumber: string; + packageDrawing?: string; + status: "source-ready" | "unavailable"; + drawingId?: string; + footprintPropSource?: string; + physicalPadToPortHint?: Record; + ignoredPhysicalPins?: string[]; + /** Official contacts omitted by the cached function table (usually exposed pads). */ + supplementalPins?: TiOfficialPin[]; + coordinatePinAssignment?: CoordinatePinAssignment; + coordinateGrid?: CoordinateGridFootprint; + footprintSource?: "exact-jlc-drawing" | "official-ti-drawing"; + provenanceComment?: string; + reason?: string; +}; + +export type CommittedFootprintCatalog = { + schemaVersion: 1; + targetCount: 111; + coverage: { + targetEntries: number; + sourceReadyEntries: number; + unavailableEntries: number; + }; + targets: Record; +}; + +export type TiGeneratedPinRole = + | "power" + | "ground" + | "input" + | "control" + | "bidirectional" + | "output" + | "thermal" + | "unknown" + | "no-connect"; + +export type TiGeneratedPin = { + pinKey: string; + physical: string; + name: string; + labels: string[]; + role: TiGeneratedPinRole; + attributes?: { + requiresPower?: true; + requiresGround?: true; + doNotConnect?: true; + }; +}; + +export type CoordinatePinAssignment = { + mode: "physical-alias"; + /** Explicit physical row order; JEDEC coordinate lettering is not alphabetic. */ + rowOrder: string[]; + /** Defaults to ascending numeric columns when omitted. */ + columnOrder?: number[]; +}; + +export type CoordinateGridFootprint = { + /** The letter component of coordinates in JEDEC order. */ + rowOrder: string[]; + /** The numeric component of coordinates in physical order. */ + columnOrder: number[]; + /** Normal BGAs use `y`; optical packages may put letters on x. */ + rowAxis?: "x" | "y"; + /** Shared pitch for axes that do not have a more specific pitch. */ + pitchMm?: number; + rowPitchMm?: number; + columnPitchMm?: number; + /** Optional exact positions along the row axis, keyed by row letter. */ + rowPositionsMm?: Record; + /** Optional exact positions along the column axis, keyed by column number. */ + columnPositionsMm?: Record; + padShape: "circle" | "rect"; + padDiameterMm?: number; + padWidthMm?: number; + padHeightMm?: number; +}; + +type ResolvedFootprint = { + drawingId: string; + footprintPropSource?: string; + physicalPadToPortHint: Record; + ignoredPhysicalPins: string[]; + supplementalPins: TiOfficialPin[]; + coordinatePinAssignment?: CoordinatePinAssignment; + coordinateGrid?: CoordinateGridFootprint; + source: "exact-jlc-drawing" | "official-ti-drawing"; + provenanceComment: string; +}; + +export type MaterializationBlocker = { + family: string; + manufacturerPartNumber: string; + componentExportName: string; + codes: string[]; + details: string[]; +}; + +const normalizeWhitespace = (value: string) => + value.replace(/\s+/g, " ").trim(); + +const normalizeAlias = (value: string) => + normalizeWhitespace(value) + .toUpperCase() + .replace(/[^A-Z0-9]+/g, "_") + .replace(/^_+|_+$/g, ""); + +const normalizePhysical = (value: string) => normalizeAlias(value); + +const getNormalizedPinFunctions = (name: string) => { + const functions = name + .split(/\s*\/\s*/) + .map(normalizeAlias) + .filter(Boolean); + return [...new Set(functions.length > 0 ? functions : ["NC"])]; +}; + +const getTsxSyntaxErrors = (source: string, fileName: string) => + ( + ts.transpileModule(source, { + fileName, + reportDiagnostics: true, + compilerOptions: { + jsx: ts.JsxEmit.ReactJSX, + module: ts.ModuleKind.ESNext, + target: ts.ScriptTarget.ES2020, + }, + }).diagnostics ?? [] + ).filter((diagnostic) => diagnostic.category === ts.DiagnosticCategory.Error); + +const isNumericPhysical = (value: string) => /^\d+$/.test(value.trim()); + +const isCoordinatePhysical = (value: string) => + /^[A-Z]{1,3}\d{1,3}$/i.test(value.trim()); + +const isNoConnect = (value: string) => + /(?:^|_)(?:NC|DNC|DNU|N_C|NO_CONNECT|NOT_CONNECTED|RESERVED|RSVD|DO_NOT_CONNECT)(?:$|_)/.test( + value, + ); + +const isGround = (value: string) => + /(?:^|_)(?:GND|AGND|DGND|PGND|SGND|VSS|VSSA|VSSD|GROUND)(?:\d*|$|_)/.test( + value, + ); + +const isPower = (value: string) => + /(?:^|_)(?:POWER|POWER_SUPPLY|SUPPLY|VCC|VDD|AVCC|AVDD|DVCC|DVDD|PVCC|PVDD|IOVCC|IOVDD|VDDA|VDDD|VDDIO|VBAT|VBUS|VIN|VSUPPLY|VBIAS|VREF|VREG|VLDO|VMOTOR|VM|VPP|VEE)(?:\d*|$|_)/.test( + value, + ); + +const isControl = (value: string) => + /(?:^|_)(?:EN|ENABLE|RESET|RST|SHDN|SHUTDOWN|SLEEP|WAKE|CLK|CLOCK|SCK|SCL|CS|CE|OE|SEL|MODE|ADDR|SYNC|LATCH|TRIG|TRIGGER|PWM|ILIM|ISET|FREQ|SS|BOOT|TEST)(?:\d*|$|_)/.test( + value, + ); + +const isThermalContact = (value: string) => + /^(?:EP|EPAD|PAD|DAP|POWERPAD|PADDLE|EXPOSED|EXPOSED_PAD|THERMAL|THERMALPAD|THERMAL_PAD|QFN_PAD|VQFN_THERMAL_PAD)$/.test( + value, + ); + +export const deriveTiPinRole = (pin: TiOfficialPin): TiGeneratedPinRole => { + const name = normalizeAlias(pin.name); + const type = normalizeAlias(pin.type); + const description = normalizeAlias(pin.description); + const combined = `${name}_${type}_${description}`; + const explicitBidirectional = + /(?:INPUT_OUTPUT|INPUTOUTPUT|I_O|BIDIRECTIONAL|BI_DIRECTIONAL)/.test(type); + const explicitOutput = /(?:^|_)(?:OUTPUT|O)(?:$|_)/.test(type); + const explicitInput = /(?:^|_)(?:INPUT|I)(?:$|_)/.test(type); + const descriptionBidirectional = + /^(?:INPUT_OUTPUT|BIDIRECTIONAL|BI_DIRECTIONAL)(?:_|$)/.test(description); + const descriptionOutput = /^OUTPUT(?:_|$)/.test(description); + const descriptionInput = /^INPUT(?:_|$)/.test(description); + const bidirectionalName = + /(?:^|_)(?:SDA|SDIO|GPIO|DIO|IO|DQ|DATA)(?:\d*|$|_)/.test(name); + const outputName = + /(?:^|_)(?:OUT|OUTPUT|VOUT|IOUT|TX|TXD|SDO|DOUT|MISO|SW|LX|PHASE|GATE|DRV|LED|INT|IRQ|ALERT|FAULT|PGOOD|POWERGOOD|STAT|READY|DONE|LOCK|CLKOUT|REFOUT|Y|Q|Z)(?:\d*|$|_)/.test( + name, + ); + const inputName = /(?:^|_)(?:IN|AIN|RX|RXD|SDI|DIN)(?:\d*|$|_)/.test(name); + const descriptionIndicatesPower = + /^(?:(?:ANALOG|DIGITAL|INPUT|OUTPUT)_)?(?:POWER_)?SUPPLY(?:_|$)|^POWER(?:_|$)/.test( + description, + ); + const descriptionDisclaimsGround = + /(?:NOT|NO)_(?:AN?_)?ELECTRICAL(?:LY)?_GROUND/.test(description) || + /(?:GND|GROUND(?:ED)?|VSS).*?_OR_.*?FLOAT|FLOAT.*?_OR_.*?(?:GND|GROUND|VSS)/.test( + description, + ); + const descriptionIndicatesGround = + !descriptionDisclaimsGround && + (/^(?:(?:ANALOG|DIGITAL|POWER)_)?GROUND(?:_|$)/.test(description) || + /(?:THERMAL|EXPOSED|QFN).*?(?:CONNECT|CONNECTION).*?(?:GND|GROUND|VSS)/.test( + `${name}_${description}`, + )); + const isMosfetGate = + name === "GATE" && /(?:^|_)MOSFET(?:_|$)/.test(description); + + if (isNoConnect(combined)) return "no-connect"; + if (isGround(name) || isGround(type)) return "ground"; + if (isMosfetGate) return "control"; + if (explicitBidirectional || descriptionBidirectional) { + return "bidirectional"; + } + if (explicitOutput || descriptionOutput) return "output"; + if (isControl(name)) return "control"; + if ( + type === "P" || + isPower(type) || + isPower(name) || + descriptionIndicatesPower + ) { + return "power"; + } + if (bidirectionalName) return "bidirectional"; + if (explicitInput || descriptionInput) return "input"; + if (descriptionIndicatesGround) return "ground"; + if (isThermalContact(name)) return "thermal"; + if (outputName) return "output"; + if (inputName) return "input"; + return "unknown"; +}; + +const attributesForRole = ( + role: TiGeneratedPinRole, +): TiGeneratedPin["attributes"] => { + if (role === "power") return { requiresPower: true }; + if (role === "ground") return { requiresGround: true }; + if (role === "no-connect") return { doNotConnect: true }; + return undefined; +}; + +const getStaticStringArray = ( + expression: ts.Expression, +): string[] | undefined => { + if (ts.isStringLiteralLike(expression)) return [expression.text]; + if (!ts.isArrayLiteralExpression(expression)) return undefined; + const values: string[] = []; + for (const element of expression.elements) { + if (!ts.isStringLiteralLike(element)) return undefined; + values.push(element.text); + } + return values; +}; + +const getPropertyName = (name: ts.PropertyName, sourceFile: ts.SourceFile) => { + if (ts.isIdentifier(name) || ts.isStringLiteralLike(name)) return name.text; + return name.getText(sourceFile); +}; + +/** Extract the literal aliases from the donor component's `pinLabels` map. */ +export const extractDonorPinLabels = ( + sourceText: string, + sourcePath = "donor.circuit.tsx", +): Record => { + const sourceFile = ts.createSourceFile( + sourcePath, + sourceText, + ts.ScriptTarget.Latest, + true, + ts.ScriptKind.TSX, + ); + let labels: Record | undefined; + + const visit = (node: ts.Node) => { + if ( + ts.isVariableDeclaration(node) && + ts.isIdentifier(node.name) && + node.name.text === "pinLabels" && + node.initializer + ) { + const initializer = ts.isAsExpression(node.initializer) + ? node.initializer.expression + : node.initializer; + if (!ts.isObjectLiteralExpression(initializer)) return; + const parsed: Record = {}; + for (const property of initializer.properties) { + if (!ts.isPropertyAssignment(property)) continue; + const pinKey = getPropertyName(property.name, sourceFile); + if (!/^pin\d+$/.test(pinKey)) continue; + const values = getStaticStringArray(property.initializer); + if (values) parsed[pinKey] = values; + } + labels = parsed; + return; + } + ts.forEachChild(node, visit); + }; + visit(sourceFile); + if (!labels || Object.keys(labels).length === 0) { + throw new Error(`No literal pinLabels object found in ${sourcePath}`); + } + return labels; +}; + +const specialPhysicalAliases = (physical: string) => { + const normalized = normalizePhysical(physical); + if (/^TAB/.test(normalized)) return new Set([normalized, "TAB"]); + if (/(?:EXPOSED|THERMAL|PAD|EP)/.test(normalized)) { + return new Set([ + normalized, + "EP", + "EPAD", + "EXPOSED_PAD", + "EXPOSEDPAD", + "THERMAL_PAD", + "THERMALPAD", + "POWERPAD", + "PAD", + ]); + } + return new Set([normalized]); +}; + +const normalizeExplicitPhysicalMap = (map: Record) => + Object.fromEntries( + Object.entries(map).map(([physical, pinKey]) => [ + normalizePhysical(physical), + pinKey, + ]), + ); + +const parseCoordinatePhysical = (physical: string) => { + const match = physical + .trim() + .toUpperCase() + .match(/^([A-Z]{1,3})(\d{1,3})$/); + return match ? { row: match[1], column: Number(match[2]) } : undefined; +}; + +export const buildCoordinatePhysicalMap = ({ + pins, + expectedPinCount, + assignment, +}: { + pins: TiOfficialPin[]; + expectedPinCount: number; + assignment: CoordinatePinAssignment; +}) => { + if (assignment.mode !== "physical-alias") { + throw new Error(`Unsupported coordinate assignment mode`); + } + if (pins.length !== expectedPinCount) { + throw new Error( + `Coordinate pin table has ${pins.length} physical balls; expected ${expectedPinCount}`, + ); + } + const normalizedRows = assignment.rowOrder.map((row) => + row.trim().toUpperCase(), + ); + if ( + normalizedRows.some((row) => !/^[A-Z]{1,3}$/.test(row)) || + new Set(normalizedRows).size !== normalizedRows.length + ) { + throw new Error("Coordinate rowOrder must contain unique row names"); + } + const rowIndex = new Map(normalizedRows.map((row, index) => [row, index])); + const parsedPins = pins.map((pin) => { + const coordinate = parseCoordinatePhysical(pin.number); + if (!coordinate) { + throw new Error( + `Coordinate assignment cannot map non-coordinate physical pin ${pin.number}`, + ); + } + const row = rowIndex.get(coordinate.row); + if (row === undefined) { + throw new Error( + `Coordinate row ${coordinate.row} is absent from rowOrder`, + ); + } + return { physical: pin.number, row, column: coordinate.column }; + }); + const normalizedPhysicals = parsedPins.map(({ physical }) => + normalizePhysical(physical), + ); + if (new Set(normalizedPhysicals).size !== normalizedPhysicals.length) { + throw new Error("Coordinate pin table contains duplicate physical balls"); + } + const discoveredColumns = [ + ...new Set(parsedPins.map(({ column }) => column)), + ].sort((left, right) => left - right); + const columns = assignment.columnOrder ?? discoveredColumns; + if ( + columns.some((column) => !Number.isInteger(column) || column < 1) || + new Set(columns).size !== columns.length + ) { + throw new Error( + "Coordinate columnOrder must contain unique positive integers", + ); + } + const columnIndex = new Map(columns.map((column, index) => [column, index])); + for (const { column } of parsedPins) { + if (!columnIndex.has(column)) { + throw new Error(`Coordinate column ${column} is absent from columnOrder`); + } + } + parsedPins.sort( + (left, right) => + left.row - right.row || + (columnIndex.get(left.column) ?? -1) - + (columnIndex.get(right.column) ?? -1), + ); + return Object.fromEntries( + parsedPins.map(({ physical }, index) => [physical, `pin${index + 1}`]), + ); +}; + +const formatMillimeters = (value: number) => { + const rounded = Number(value.toFixed(6)); + return `${Object.is(rounded, -0) ? 0 : rounded}mm`; +}; + +const getExplicitAxisPositions = ( + positions: Record | undefined, +) => + positions + ? new Map( + Object.entries(positions).map(([coordinate, position]) => [ + coordinate.trim().toUpperCase(), + position, + ]), + ) + : undefined; + +/** Render exact pads from a compact official coordinate-grid description. */ +export const renderCoordinateGridFootprintProp = ({ + pins, + grid, +}: { + pins: TiGeneratedPin[]; + grid: CoordinateGridFootprint; +}) => { + const rowOrder = grid.rowOrder.map((row) => row.trim().toUpperCase()); + const columnOrder = [...grid.columnOrder]; + if ( + rowOrder.length === 0 || + rowOrder.some((row) => !/^[A-Z]{1,3}$/.test(row)) || + new Set(rowOrder).size !== rowOrder.length + ) { + throw new Error("Coordinate grid rowOrder must contain unique row names"); + } + if ( + columnOrder.length === 0 || + columnOrder.some((column) => !Number.isInteger(column) || column < 1) || + new Set(columnOrder).size !== columnOrder.length + ) { + throw new Error( + "Coordinate grid columnOrder must contain unique positive integers", + ); + } + const rowIndex = new Map(rowOrder.map((row, index) => [row, index])); + const columnIndex = new Map( + columnOrder.map((column, index) => [column, index]), + ); + const rowPositions = getExplicitAxisPositions(grid.rowPositionsMm); + const columnPositions = getExplicitAxisPositions(grid.columnPositionsMm); + const rowPitch = grid.rowPitchMm ?? grid.pitchMm; + const columnPitch = grid.columnPitchMm ?? grid.pitchMm; + if (!rowPositions && (!rowPitch || rowPitch <= 0)) { + throw new Error("Coordinate grid needs a positive row pitch or positions"); + } + if (!columnPositions && (!columnPitch || columnPitch <= 0)) { + throw new Error( + "Coordinate grid needs a positive column pitch or positions", + ); + } + if (grid.padShape === "circle") { + if (!grid.padDiameterMm || grid.padDiameterMm <= 0) { + throw new Error("Circular coordinate-grid pads need a positive diameter"); + } + } else if ( + !grid.padWidthMm || + grid.padWidthMm <= 0 || + !grid.padHeightMm || + grid.padHeightMm <= 0 + ) { + throw new Error( + "Rectangular coordinate-grid pads need positive width and height", + ); + } + + const getRowPosition = (row: string) => { + const explicit = rowPositions?.get(row); + if (rowPositions) { + if (explicit === undefined || !Number.isFinite(explicit)) { + throw new Error( + `Coordinate grid has no finite position for row ${row}`, + ); + } + return explicit; + } + const index = rowIndex.get(row); + if (index === undefined) { + throw new Error(`Coordinate grid does not contain row ${row}`); + } + const centered = index - (rowOrder.length - 1) / 2; + return (grid.rowAxis ?? "y") === "y" + ? -centered * (rowPitch ?? 0) + : centered * (rowPitch ?? 0); + }; + const getColumnPosition = (column: number) => { + const explicit = columnPositions?.get(String(column)); + if (columnPositions) { + if (explicit === undefined || !Number.isFinite(explicit)) { + throw new Error( + `Coordinate grid has no finite position for column ${column}`, + ); + } + return explicit; + } + const index = columnIndex.get(column); + if (index === undefined) { + throw new Error(`Coordinate grid does not contain column ${column}`); + } + return (index - (columnOrder.length - 1) / 2) * (columnPitch ?? 0); + }; + + const pads = pins.map((pin) => { + const coordinate = parseCoordinatePhysical(pin.physical); + if (!coordinate) { + throw new Error( + `Coordinate grid cannot place non-coordinate physical pin ${pin.physical}`, + ); + } + if (!rowIndex.has(coordinate.row)) { + throw new Error(`Coordinate grid does not contain row ${coordinate.row}`); + } + if (!columnIndex.has(coordinate.column)) { + throw new Error( + `Coordinate grid does not contain column ${coordinate.column}`, + ); + } + if (!pin.labels.includes(normalizePhysical(pin.physical))) { + throw new Error( + `Generated pin ${pin.pinKey} does not expose physical alias ${pin.physical}`, + ); + } + const rowPosition = getRowPosition(coordinate.row); + const columnPosition = getColumnPosition(coordinate.column); + const x = (grid.rowAxis ?? "y") === "y" ? columnPosition : rowPosition; + const y = (grid.rowAxis ?? "y") === "y" ? rowPosition : columnPosition; + const size = + grid.padShape === "circle" + ? `radius=${JSON.stringify(formatMillimeters((grid.padDiameterMm ?? 0) / 2))} shape="circle"` + : `width=${JSON.stringify(formatMillimeters(grid.padWidthMm ?? 0))} height=${JSON.stringify(formatMillimeters(grid.padHeightMm ?? 0))} shape="rect"`; + return ` `; + }); + return `footprint={\n${pads.join("\n")}\n }`; +}; + +export const createPhysicalToPinResolver = ({ + explicitPhysicalMap = {}, + donorPinLabels, +}: { + explicitPhysicalMap?: Record; + donorPinLabels?: Record; +}) => { + const normalizedExplicitMap = + normalizeExplicitPhysicalMap(explicitPhysicalMap); + const donorAliases = Object.entries(donorPinLabels ?? {}).map( + ([pinKey, aliases]) => ({ + pinKey, + aliases: new Set(aliases.map(normalizePhysical)), + }), + ); + + return (physical: string) => { + const trimmed = physical.trim(); + if (isNumericPhysical(trimmed)) { + const pinNumber = Number(trimmed); + if (pinNumber < 1) throw new Error(`Invalid numeric pin ${trimmed}`); + const expectedPinKey = `pin${pinNumber}`; + const explicit = normalizedExplicitMap[normalizePhysical(trimmed)]; + if (explicit && explicit !== expectedPinKey) { + throw new Error( + `Numeric pin ${trimmed} must map to ${expectedPinKey}, not ${explicit}`, + ); + } + return expectedPinKey; + } + + const physicalAliases = specialPhysicalAliases(trimmed); + const explicitMatches = [ + ...new Set( + [...physicalAliases] + .map((alias) => normalizedExplicitMap[alias]) + .filter((pinKey): pinKey is string => Boolean(pinKey)), + ), + ]; + if (explicitMatches.length === 1) { + const [explicit] = explicitMatches; + if (!/^pin\d+$/.test(explicit)) { + throw new Error( + `Physical pin ${trimmed} maps to invalid port hint ${explicit}`, + ); + } + return explicit; + } + if (explicitMatches.length > 1) { + throw new Error( + `Physical pin ${trimmed} has conflicting explicit mappings: ${explicitMatches.join(", ")}`, + ); + } + + const matches = donorAliases.filter(({ aliases }) => + [...physicalAliases].some((alias) => aliases.has(alias)), + ); + if (matches.length === 1) return matches[0].pinKey; + if (matches.length > 1) { + throw new Error( + `Physical pin ${trimmed} is ambiguous in donor pinLabels: ${matches.map(({ pinKey }) => pinKey).join(", ")}`, + ); + } + + if (isCoordinatePhysical(trimmed)) { + throw new Error( + `Physical ball ${trimmed} has no matching alias in donor pinLabels`, + ); + } + throw new Error( + `Special physical pad ${trimmed} needs an explicit or donor pinLabels mapping`, + ); + }; +}; + +const makeNcPin = (number: number): TiOfficialPin => ({ + number: String(number), + name: "NC", + type: "No connect", + description: "No pin function is listed for this package position.", +}); + +/** Add audited package contacts that TI's function table omitted. */ +export const mergeTiSupplementalPins = ( + pins: TiOfficialPin[], + supplementalPins: TiOfficialPin[] = [], +) => { + const merged = [...pins]; + const pinsByPhysical = new Map( + pins.map((pin) => [normalizePhysical(pin.number), pin]), + ); + for (const supplemental of supplementalPins) { + const physical = normalizePhysical(supplemental.number); + if (!physical) { + throw new Error("Supplemental pin has an empty physical identifier"); + } + const existing = pinsByPhysical.get(physical); + if (existing) { + if ( + normalizeAlias(existing.name) !== normalizeAlias(supplemental.name) || + deriveTiPinRole(existing) !== deriveTiPinRole(supplemental) + ) { + throw new Error( + `Supplemental physical pin ${supplemental.number} conflicts with the cached official pin`, + ); + } + continue; + } + pinsByPhysical.set(physical, supplemental); + merged.push(supplemental); + } + return merged; +}; + +export const buildTiGeneratedPins = ({ + pins, + expectedPinCount, + explicitPhysicalMap, + donorPinLabels, + ignoredPhysicalPins = [], + coordinatePinAssignment, +}: { + pins: TiOfficialPin[]; + expectedPinCount: number; + explicitPhysicalMap?: Record; + donorPinLabels?: Record; + ignoredPhysicalPins?: string[]; + coordinatePinAssignment?: CoordinatePinAssignment; +}): TiGeneratedPin[] => { + const ignoredPhysicals = new Set(ignoredPhysicalPins.map(normalizePhysical)); + const includedPins = pins.filter( + (pin) => !ignoredPhysicals.has(normalizePhysical(pin.number)), + ); + const pinByNumericPhysical = new Map( + includedPins + .filter((pin) => isNumericPhysical(pin.number)) + .map((pin) => [Number(pin.number), pin]), + ); + const completedPins = [...includedPins]; + const hasCoordinatePins = includedPins.some((pin) => + isCoordinatePhysical(pin.number), + ); + if (!hasCoordinatePins) { + for (let number = 1; number <= expectedPinCount; number += 1) { + if (!pinByNumericPhysical.has(number)) { + completedPins.push(makeNcPin(number)); + } + } + } + + const repeatedFunctionCounts = new Map(); + for (const pin of completedPins) { + const [primary = "NC"] = getNormalizedPinFunctions(pin.name); + repeatedFunctionCounts.set( + primary, + (repeatedFunctionCounts.get(primary) ?? 0) + 1, + ); + } + + if ( + coordinatePinAssignment && + Object.keys(explicitPhysicalMap ?? {}).length + ) { + throw new Error( + "coordinatePinAssignment cannot be combined with an explicit physical map", + ); + } + const coordinatePhysicalMap = coordinatePinAssignment + ? buildCoordinatePhysicalMap({ + pins: completedPins, + expectedPinCount, + assignment: coordinatePinAssignment, + }) + : undefined; + const resolvePhysical = createPhysicalToPinResolver({ + explicitPhysicalMap: coordinatePhysicalMap ?? explicitPhysicalMap, + donorPinLabels, + }); + const generatedByPinKey = new Map(); + for (const pin of completedPins) { + const pinKey = resolvePhysical(pin.number); + const [primary = "NC", ...alternateFunctions] = getNormalizedPinFunctions( + pin.name, + ); + const physicalAlias = normalizeAlias(pin.number) || pinKey.toUpperCase(); + const labels = [primary, ...alternateFunctions]; + if (physicalAlias !== primary) labels.push(physicalAlias); + if ((repeatedFunctionCounts.get(primary) ?? 0) > 1) { + labels.push(`${primary}_${physicalAlias}`); + } + const role = deriveTiPinRole(pin); + const existing = generatedByPinKey.get(pinKey); + if (!existing) { + generatedByPinKey.set(pinKey, { + pinKey, + physical: pin.number, + name: pin.name, + labels: [...new Set(labels)], + role, + attributes: attributesForRole(role), + }); + continue; + } + if ( + normalizePhysical(existing.physical) === normalizePhysical(pin.number) + ) { + throw new Error( + `Official physical pin ${pin.number} is listed more than once`, + ); + } + let mergedRole = existing.role; + if (mergedRole === "unknown") mergedRole = role; + if (role !== "unknown" && role !== mergedRole) { + throw new Error( + `Physical pins ${existing.physical} and ${pin.number} map to ${pinKey} with conflicting roles ${existing.role} and ${role}`, + ); + } + existing.physical = `${existing.physical}, ${pin.number}`; + if (normalizeAlias(existing.name) !== primary) { + existing.name = `${existing.name} / ${pin.name}`; + } + existing.labels = [...new Set([...existing.labels, ...labels])]; + existing.role = mergedRole; + existing.attributes = attributesForRole(mergedRole); + } + + return [...generatedByPinKey.values()].sort((left, right) => { + const leftNumber = Number(left.pinKey.replace(/^pin/, "")); + const rightNumber = Number(right.pinKey.replace(/^pin/, "")); + return leftNumber - rightNumber; + }); +}; + +const assertFootprintPropSource = (source: string, label: string) => { + const errors = getTsxSyntaxErrors( + `const component = `, + `${label}.tsx`, + ); + if (errors.length > 0 || !/^footprint=/.test(source.trim())) { + throw new Error(`${label} has an invalid footprint prop source`); + } +}; + +/** Extract every statically declared copper destination from inline JSX. */ +export const extractFootprintPortHints = ( + footprintPropSource: string, + label = "footprint", +) => { + assertFootprintPropSource(footprintPropSource, label); + const sourceFile = ts.createSourceFile( + `${label}.tsx`, + `const component = `, + ts.ScriptTarget.Latest, + true, + ts.ScriptKind.TSX, + ); + const portHints: string[] = []; + const visit = (node: ts.Node) => { + if ( + ts.isJsxAttribute(node) && + node.name.getText(sourceFile) === "portHints" + ) { + const initializer = node.initializer; + const values = + initializer && ts.isStringLiteralLike(initializer) + ? [initializer.text] + : initializer && + ts.isJsxExpression(initializer) && + initializer.expression + ? getStaticStringArray(initializer.expression) + : undefined; + if (!values || values.length === 0) { + throw new Error( + `${label} has a non-literal or empty portHints declaration`, + ); + } + portHints.push(...values); + } + ts.forEachChild(node, visit); + }; + visit(sourceFile); + return portHints; +}; + +/** Ensure every selected and inline footprint destination is a generated port. */ +export const assertFootprintDestinations = ({ + pins, + footprintPropSource, + physicalPadToPortHint = {}, + label = "footprint", +}: { + pins: TiGeneratedPin[]; + footprintPropSource: string; + physicalPadToPortHint?: Record; + label?: string; +}) => { + const availableDestinations = new Set( + pins.flatMap((pin) => [pin.pinKey, ...pin.labels]), + ); + const selectedDestinations = Object.entries(physicalPadToPortHint).map( + ([physical, destination]) => ({ + origin: `physicalPadToPortHint[${JSON.stringify(physical)}]`, + destination, + }), + ); + const inlineDestinations = extractFootprintPortHints( + footprintPropSource, + label, + ).map((destination) => ({ origin: "inline portHints", destination })); + const missing = [...selectedDestinations, ...inlineDestinations].filter( + ({ destination }) => !availableDestinations.has(destination), + ); + if (missing.length > 0) { + throw new Error( + `${label} targets absent generated ports: ${missing + .map(({ origin, destination }) => `${origin} -> ${destination}`) + .join(", ")}`, + ); + } +}; + +const resolveFootprint = ({ + entry, + footprintCatalog, +}: { + entry: TiDatasheetCatalogEntry; + footprintCatalog: CommittedFootprintCatalog; +}): ResolvedFootprint => { + const expectedDrawingId = entry.packageDrawing?.trim(); + if (!expectedDrawingId) { + throw new Error("Catalog entry has no exact TI packageDrawing ID"); + } + const selection = footprintCatalog.targets[entry.manufacturerPartNumber]; + if (!selection) throw new Error("Committed footprint target is missing"); + if ( + selection.family !== entry.family || + selection.componentExportName !== entry.componentExportName + ) { + throw new Error( + "Committed footprint target identifies a different component", + ); + } + if (selection.status !== "source-ready") { + throw new Error(selection.reason ?? "No source-ready exact footprint"); + } + if (selection.drawingId !== expectedDrawingId) { + throw new Error( + `Committed footprint drawing ${selection.drawingId} does not exactly match catalog drawing ${expectedDrawingId}`, + ); + } + if ( + (!selection.footprintPropSource && !selection.coordinateGrid) || + !selection.footprintSource || + !selection.provenanceComment + ) { + throw new Error("Source-ready footprint record is incomplete"); + } + if (selection.footprintPropSource) { + assertFootprintPropSource( + selection.footprintPropSource, + `${entry.family}:${expectedDrawingId}`, + ); + } + return { + drawingId: expectedDrawingId, + footprintPropSource: selection.footprintPropSource, + physicalPadToPortHint: selection.physicalPadToPortHint ?? {}, + ignoredPhysicalPins: selection.ignoredPhysicalPins ?? [], + supplementalPins: selection.supplementalPins ?? [], + coordinatePinAssignment: selection.coordinatePinAssignment, + coordinateGrid: selection.coordinateGrid, + source: selection.footprintSource, + provenanceComment: selection.provenanceComment, + }; +}; + +const renderObject = (entries: Array<[string, unknown]>, indent = " ") => + `{ +${entries + .map(([key, value]) => `${indent}${key}: ${JSON.stringify(value)},`) + .join("\n")} +}`; + +export const renderTiDatasheetComponent = ({ + entry, + pins, + footprintPropSource, + footprintProvenance, +}: { + entry: TiDatasheetCatalogEntry; + pins: TiGeneratedPin[]; + footprintPropSource: string; + footprintProvenance: string; +}) => { + const pinLabelsSource = renderObject( + pins.map((pin) => [pin.pinKey, pin.labels]), + ); + const pinRolesSource = renderObject( + pins.map((pin) => [pin.pinKey, pin.role]), + ); + const pinsWithAttributes = pins.filter((pin) => pin.attributes); + const pinAttributesSource = pinsWithAttributes.length + ? `\nconst pinAttributes = ${renderObject( + pinsWithAttributes.map((pin) => [pin.pinKey, pin.attributes]), + )} as const\n` + : ""; + const footprintLines = footprintPropSource.split("\n"); + const indentedFootprint = footprintLines + .map((line, index) => `${index === 0 ? " " : ""}${line}`) + .join("\n"); + + const source = `import type { ChipProps } from "@tscircuit/props" +import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts" + +const pinLabels = ${pinLabelsSource} as const + +const pinRoles = ${pinRolesSource} as const +${pinAttributesSource} +export const ${entry.componentExportName} = ( + props: ChipProps, +) => { + // Footprint provenance: ${normalizeWhitespace(footprintProvenance)} + return ( + + ) +} + +export default ${entry.componentExportName} +`; + const syntaxErrors = getTsxSyntaxErrors( + source, + `${entry.componentExportName}.circuit.tsx`, + ); + if (syntaxErrors.length > 0) { + throw new Error( + `Generated invalid TSX for ${entry.componentExportName}: ${syntaxErrors + .map((diagnostic) => + ts.flattenDiagnosticMessageText(diagnostic.messageText, "\n"), + ) + .join("; ")}`, + ); + } + return source; +}; + +const addBlocker = ( + blockers: MaterializationBlocker[], + entry: TiDatasheetCatalogEntry, + code: string, + detail: string, +) => { + let blocker = blockers.find((candidate) => candidate.family === entry.family); + if (!blocker) { + blocker = { + family: entry.family, + manufacturerPartNumber: entry.manufacturerPartNumber, + componentExportName: entry.componentExportName, + codes: [], + details: [], + }; + blockers.push(blocker); + } + blocker.codes.push(code); + blocker.details.push(detail); +}; + +const formatGeneratedFiles = async ( + repositoryRoot: string, + generatedPaths: string[], +) => { + if (generatedPaths.length === 0) return; + const formatter = Bun.spawn( + ["bunx", "biome", "format", "--write", ...generatedPaths], + { cwd: repositoryRoot, stdout: "inherit", stderr: "inherit" }, + ); + const exitCode = await formatter.exited; + if (exitCode !== 0) throw new Error(`Biome exited with code ${exitCode}`); +}; + +export const materializeTiDatasheetComponents = async ({ + repositoryRoot, + catalogPath, + pinoutsPath, + footprintSelectionsPath, + outputDirectory, + blockerReportPath, + allowPartial = false, +}: { + repositoryRoot: string; + catalogPath: string; + pinoutsPath: string; + footprintSelectionsPath: string; + outputDirectory: string; + blockerReportPath: string; + allowPartial?: boolean; +}) => { + const catalog = (await Bun.file( + catalogPath, + ).json()) as TiDatasheetCatalogEntry[]; + const pinouts = (await Bun.file(pinoutsPath).json()) as Record< + string, + TiPinoutRecord + >; + const footprintCatalog = (await Bun.file( + footprintSelectionsPath, + ).json()) as CommittedFootprintCatalog; + const entries = catalog + .filter((entry) => entry.source === "ti-datasheet") + .sort((left, right) => left.family.localeCompare(right.family)); + if (entries.length !== 111) { + throw new Error( + `Expected 111 ti-datasheet entries; found ${entries.length}`, + ); + } + const entriesByMpn = new Map( + entries.map((entry) => [entry.manufacturerPartNumber, entry]), + ); + if (entriesByMpn.size !== entries.length) { + throw new Error( + "TI-datasheet catalog manufacturer part numbers are not unique", + ); + } + const committedTargets = Object.entries(footprintCatalog.targets); + const actualSourceReadyEntries = committedTargets.filter( + ([, target]) => target.status === "source-ready", + ).length; + const actualUnavailableEntries = committedTargets.filter( + ([, target]) => target.status === "unavailable", + ).length; + if ( + footprintCatalog.schemaVersion !== 1 || + footprintCatalog.targetCount !== 111 || + footprintCatalog.coverage.targetEntries !== 111 || + committedTargets.length !== 111 || + footprintCatalog.coverage.sourceReadyEntries !== actualSourceReadyEntries || + footprintCatalog.coverage.unavailableEntries !== actualUnavailableEntries || + actualSourceReadyEntries + actualUnavailableEntries !== 111 || + committedTargets.some(([manufacturerPartNumber, target]) => { + const entry = entriesByMpn.get(manufacturerPartNumber); + return ( + !entry || + target.manufacturerPartNumber !== manufacturerPartNumber || + target.family !== entry.family || + target.componentExportName !== entry.componentExportName || + target.packageDrawing !== entry.packageDrawing || + (target.status === "source-ready" && + target.drawingId !== entry.packageDrawing) + ); + }) + ) { + throw new Error( + "Committed footprint selection catalog must exactly cover all 111 TI-datasheet targets", + ); + } + + const blockers: MaterializationBlocker[] = []; + const ready: Array<{ + entry: TiDatasheetCatalogEntry; + source: string; + footprintSource: ResolvedFootprint["source"]; + }> = []; + for (const entry of entries) { + const pinout = pinouts[entry.family]; + let usablePinout: TiPinoutOk | undefined; + if (pinout?.status !== "ok") { + addBlocker( + blockers, + entry, + "official-pinout-unavailable", + pinout && pinout.status === "unavailable" + ? `${pinout.reason}: ${pinout.message}` + : "No cached official TI pinout record", + ); + } else if (pinout.manufacturerPartNumber !== entry.manufacturerPartNumber) { + addBlocker( + blockers, + entry, + "official-pinout-mpn-mismatch", + `Pinout is for ${pinout.manufacturerPartNumber}`, + ); + } else if ( + pinout.family !== entry.family || + pinout.expectedPinCount !== entry.pinCount + ) { + addBlocker( + blockers, + entry, + "official-pinout-catalog-mismatch", + `Pinout identifies ${pinout.family} with expectedPinCount ${pinout.expectedPinCount}`, + ); + } else if (pinout.pins.length === 0) { + addBlocker( + blockers, + entry, + "official-pinout-empty", + "Official TI pinout contains no physical pins", + ); + } else { + usablePinout = pinout; + } + + let footprint: ResolvedFootprint | undefined; + try { + footprint = resolveFootprint({ entry, footprintCatalog }); + } catch (error) { + addBlocker( + blockers, + entry, + "exact-footprint-unavailable", + error instanceof Error ? error.message : String(error), + ); + } + if (!usablePinout || !footprint) continue; + + try { + const coordinatePinAssignment = footprint.coordinateGrid + ? { + mode: "physical-alias" as const, + rowOrder: footprint.coordinateGrid.rowOrder, + columnOrder: footprint.coordinateGrid.columnOrder, + } + : footprint.coordinatePinAssignment; + const generatedPins = buildTiGeneratedPins({ + pins: mergeTiSupplementalPins( + usablePinout.pins, + footprint.supplementalPins, + ), + expectedPinCount: entry.pinCount, + explicitPhysicalMap: footprint.physicalPadToPortHint, + ignoredPhysicalPins: footprint.ignoredPhysicalPins, + coordinatePinAssignment, + }); + const footprintPropSource = footprint.coordinateGrid + ? renderCoordinateGridFootprintProp({ + pins: generatedPins, + grid: footprint.coordinateGrid, + }) + : footprint.footprintPropSource; + if (!footprintPropSource) { + throw new Error("Resolved footprint has no renderable source"); + } + assertFootprintDestinations({ + pins: generatedPins, + footprintPropSource, + physicalPadToPortHint: footprint.physicalPadToPortHint, + label: `${entry.family}:${footprint.drawingId}`, + }); + ready.push({ + entry, + source: renderTiDatasheetComponent({ + entry, + pins: generatedPins, + footprintPropSource, + footprintProvenance: footprint.provenanceComment, + }), + footprintSource: footprint.source, + }); + } catch (error) { + addBlocker( + blockers, + entry, + "pin-to-copper-mapping-failed", + error instanceof Error ? error.message : String(error), + ); + } + } + + blockers.sort((left, right) => left.family.localeCompare(right.family)); + const report = { + schemaVersion: 1, + summary: { + targetEntries: entries.length, + readyEntries: ready.length, + blockedEntries: blockers.length, + officialPinoutBlockers: blockers.filter((blocker) => + blocker.codes.some((code) => code.startsWith("official-pinout")), + ).length, + exactFootprintBlockers: blockers.filter((blocker) => + blocker.codes.includes("exact-footprint-unavailable"), + ).length, + pinMappingBlockers: blockers.filter((blocker) => + blocker.codes.includes("pin-to-copper-mapping-failed"), + ).length, + }, + ready: ready.map(({ entry, footprintSource }) => ({ + family: entry.family, + manufacturerPartNumber: entry.manufacturerPartNumber, + componentExportName: entry.componentExportName, + packageDrawing: entry.packageDrawing, + footprintSource, + })), + blockers, + }; + await Bun.write(blockerReportPath, `${JSON.stringify(report, null, 2)}\n`); + + if (blockers.length > 0 && !allowPartial) { + const codes = new Map(); + for (const blocker of blockers) { + for (const code of blocker.codes) { + codes.set(code, (codes.get(code) ?? 0) + 1); + } + } + throw new Error( + `Cannot materialize all 111 TI datasheet components: ${blockers.length} entries are blocked (${[ + ...codes, + ] + .map(([code, count]) => `${code}=${count}`) + .join(", ")}). See ${blockerReportPath}`, + ); + } + + const generatedPaths: string[] = []; + for (const { entry, source } of ready) { + const outputPath = resolve( + outputDirectory, + `${entry.componentExportName}.circuit.tsx`, + ); + await Bun.write(outputPath, source); + generatedPaths.push(relative(repositoryRoot, outputPath)); + } + await formatGeneratedFiles(repositoryRoot, generatedPaths); + + return { ...report.summary, blockerReportPath, generatedPaths }; +}; + +if (import.meta.main) { + const repositoryRoot = resolve(import.meta.dir, ".."); + const allowPartial = Bun.argv.includes("--allow-partial"); + const result = await materializeTiDatasheetComponents({ + repositoryRoot, + catalogPath: resolve( + repositoryRoot, + "lib/chips/ti-sysblocks-chip-catalog.json", + ), + pinoutsPath: resolve(repositoryRoot, "lib/chips/ti-sysblocks-pinouts.json"), + footprintSelectionsPath: resolve( + repositoryRoot, + "lib/chips/ti-sysblocks-footprint-selections.json", + ), + outputDirectory: resolve(repositoryRoot, "lib/chips"), + blockerReportPath: resolve( + repositoryRoot, + "lib/chips/ti-sysblocks-materialization-report.json", + ), + allowPartial, + }); + console.log(JSON.stringify(result, null, 2)); +} diff --git a/scripts/ti-document-viewer-pinout.test.ts b/scripts/ti-document-viewer-pinout.test.ts new file mode 100644 index 00000000..e8580351 --- /dev/null +++ b/scripts/ti-document-viewer-pinout.test.ts @@ -0,0 +1,534 @@ +import assert from "node:assert/strict"; +import { describe, test } from "node:test"; + +import { + fetchTiDocumentViewerPinout, + findTiPackagePinMapSectionUrl, + findTiPinConfigurationSectionUrl, + findTiPinConfigurationSectionUrls, + parseTiPinFunctionsSection, + renderTiPinMetadataSource, + sanitizeTiPinLabel, + toTscircuitPinMetadata, +} from "./ti-document-viewer-pinout.ts"; + +const rootFixture = ` + + Features + 5 Pin Configuration and Functions + +`; + +const legacyRowspanFixture = ` +
+
YZP Package
+
8-Pin DSBGA
+
+ + + + + + + + + + + + + + + +
PINTYPEDESCRIPTION
NAMENO.
GNDD1GNDGround
OND2ISwitch control input
VINA2ISwitch input
B2
C2
VOUTA1OSwitch output
B1
C1
+`; + +const packageColumnsFixture = ` + D and P Package + 8-Pin SOIC and PDIP + Table 4-1 Pin Functions + + + + + + + + + + +
PINI/ODESCRIPTION
NAMESOICPDIP
IN1−23INegative input
OUT11OOutput
NC2, 4–5No internal connection
+`; + +const duplicateNameColumnsFixture = ` + + + + + + + + + +
PINTYPEDESCRIPTION
NAMENO.
VINA2PowerInput supply
GNDB2GroundGround
+`; + +const blankDescriptionHeaderFixture = ` + + + + + + + + + +
PINTYPE
NAMEDGSRHB
VCC12PowerSupply input
GND816GroundGround
+`; + +const deviceColumnsFixture = ` + + + + + + + + + + + + + +
PINTYPEDESCRIPTION
NAMEISO6440-Q1, ISO6440F-Q1ISO6441-Q1, ISO6441F-Q1
OUTA34OChannel output
GND88GroundGround
+`; + +const packageSpecificTablesFixture = ` +

Table 6-1 Connector Pins for FQE

+ + + +
NAMEPIN NO.TYPEDESCRIPTION
FQE_ONLYA1IFQE input
+

Table 6-2 Connector Pins for FQD

+ + + +
NAMEPIN NO.TYPEDESCRIPTION
FQD_ONLYB2OFQD output
+

Table 6-3 Test Pads for FQD Package

+ + + +
NAMEPINDESCRIPTION
FQD_TESTC3FQD test pad
+`; + +const noTypeFixture = ` + + + + + + +
PINDESCRIPTION
NAMEYZP
YA1Logic output
+`; + +const blankThermalPadNameFixture = ` + + + + + + + + + +
PINTYPEDESCRIPTION
NAMENO.
VDD1PSupply
Thermal PadConnect to GND through a large copper plane.
+`; + +const packagePinMapRootFixture = ` + ZCE Package Pin Maps (Top View) + ZCZ Package Pin Maps (Top View) + ZCZ Pin Map [Section Left - Top View] +`; + +const packagePinMapFixture = ` + + + +
VSSGPMC_AD0
+ + +
DDR_D2
+ + +
VSS
+`; + +describe("TI document-viewer pinout parser", () => { + test("locates the official Pin Configuration and Functions section", () => { + assert.equal( + findTiPinConfigurationSectionUrl( + rootFixture, + "https://www.ti.com/document-viewer/TEST123/datasheet", + ), + "https://www.ti.com/document-viewer/TEST123/datasheet/GUID-PINS", + ); + }); + + test("recognizes plural, terminal, and direct Pin Functions TOC titles", () => { + const root = ` + plural + terminal + functions + `; + assert.deepEqual( + findTiPinConfigurationSectionUrls( + root, + "https://www.ti.com/document-viewer/TEST123/datasheet", + ), + [ + "https://www.ti.com/document-viewer/TEST123/plural.html", + "https://www.ti.com/document-viewer/TEST123/terminal.html", + "https://www.ti.com/document-viewer/TEST123/functions.html", + ], + ); + }); + + test("locates the selected package-code pin-map leaf", () => { + assert.equal( + findTiPackagePinMapSectionUrl( + packagePinMapRootFixture, + "https://www.ti.com/document-viewer/AM3352/datasheet", + "zcz", + ), + "https://www.ti.com/document-viewer/AM3352/datasheet/zcz-package-pin-maps", + ); + }); + + test("expands rowspans and keeps alphanumeric BGA balls", () => { + const result = parseTiPinFunctionsSection(legacyRowspanFixture, "YZP"); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.equal(result.table.tableClass, "termfunctions"); + assert.equal(result.table.pins.length, 8); + assert.deepEqual(result.table.pins[2], { + number: "A2", + name: "VIN", + type: "I", + description: "Switch input", + }); + assert.deepEqual(result.table.pins[4], { + number: "C2", + name: "VIN", + type: "I", + description: "Switch input", + }); + }); + + test("selects a package-specific column and expands pin lists/ranges", () => { + const result = parseTiPinFunctionsSection(packageColumnsFixture, "P"); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.match(result.table.packageColumn, /PDIP/); + assert.deepEqual( + result.table.pins.map(({ number, name }) => [number, name]), + [ + ["3", "IN1−"], + ["1", "OUT"], + ["2", "NC"], + ["4", "NC"], + ["5", "NC"], + ], + ); + }); + + test("uses the expected pin count when TI labels columns by package type", () => { + const result = parseTiPinFunctionsSection( + packageColumnsFixture, + "UNKNOWN", + undefined, + { expectedPinCount: 5 }, + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.match(result.table.packageColumn, /PDIP/); + assert.equal(result.table.pins.length, 5); + }); + + test("prefers an explicit package code over a misleading count match", () => { + const result = parseTiPinFunctionsSection( + ` + + + + + +
PINTYPEDESCRIPTION
NAMERGEYQW
IO1A1I/OSignal
PAD2GroundPad
`, + "RGE", + undefined, + { expectedPinCount: 1 }, + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.match(result.table.packageColumn, /RGE/); + assert.deepEqual( + result.table.pins.map((pin) => pin.number), + ["1", "2"], + ); + }); + + test("excludes every duplicated NAME column created by colspan", () => { + const result = parseTiPinFunctionsSection( + duplicateNameColumnsFixture, + "YBG", + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.deepEqual( + result.table.pins.map(({ number, name }) => [number, name]), + [ + ["A2", "VIN"], + ["B2", "GND"], + ], + ); + }); + + test("uses a blank final header as TI's description column", () => { + const result = parseTiPinFunctionsSection( + blankDescriptionHeaderFixture, + "DGS", + "TXE8124", + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.match(result.table.packageColumn, /DGS/); + assert.equal(result.table.pins[0].description, "Supply input"); + }); + + test("selects device-specific columns when TI omits package codes", () => { + const result = parseTiPinFunctionsSection( + deviceColumnsFixture, + "DBQ", + "ISO6440-Q1", + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.match(result.table.packageColumn, /ISO6440-Q1/); + assert.equal(result.table.pins[0].number, "3"); + }); + + test("uses nearby package captions to choose among multiple tables", () => { + const result = parseTiPinFunctionsSection( + packageSpecificTablesFixture, + "FQD", + "DLP4500", + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.deepEqual(result.table.pins[0], { + number: "B2", + name: "FQD_ONLY", + type: "O", + description: "FQD output", + }); + assert.deepEqual(result.table.pins[1], { + number: "C3", + name: "FQD_TEST", + type: "", + description: "FQD test pad", + }); + assert.match(result.table.warnings[0], /Combined 2/); + }); + + test("keeps useful pin tables that omit an electrical type column", () => { + const result = parseTiPinFunctionsSection(noTypeFixture, "YZP"); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.equal(result.table.pins[0].type, ""); + assert.match(result.table.warnings[0], /no electrical pin-type column/); + }); + + test("normalizes a blank exposed-pad name without changing physical identity", () => { + const result = parseTiPinFunctionsSection( + blankThermalPadNameFixture, + "DGN", + ); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.deepEqual(result.table.pins[1], { + number: "Thermal Pad", + name: "THERMAL_PAD", + type: "—", + description: "Connect to GND through a large copper plane.", + }); + }); + + test("combines TI BGA package-pin-map grids using pm_*_ anchors", () => { + const result = parseTiPinFunctionsSection(packagePinMapFixture, "ZCZ"); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.deepEqual( + result.table.pins.map(({ number, name, type }) => [number, name, type]), + [ + ["A18", "VSS", ""], + ["A17", "GPMC_AD0", ""], + ["N1", "DDR_D2", ""], + ["V1", "VSS", ""], + ], + ); + assert.deepEqual(result.table.warnings, [ + "TI's package pin-map grid provides ball/function data but not electrical pin type or description.", + ]); + }); + + test("reports a missing HTML pin table without throwing", () => { + assert.deepEqual( + parseTiPinFunctionsSection( + "

Pin Configuration and Functions

", + "RGE", + ), + { + status: "unavailable", + reason: "pin-table-not-found", + message: + "TI's Pin Configuration and Functions section has no parseable HTML pin-function table.", + }, + ); + }); + + test("fetches only the TI root and located section", async () => { + const requests: string[] = []; + const fakeFetch = async (input: string | URL) => { + const url = String(input); + requests.push(url); + if (url.endsWith("/datasheet")) return new Response(rootFixture); + if (url.endsWith("/GUID-PINS")) return new Response(legacyRowspanFixture); + return new Response("not found", { status: 404 }); + }; + const result = await fetchTiDocumentViewerPinout("test123", "yzp", { + fetch: fakeFetch, + }); + assert.equal(result.status, "ok"); + assert.deepEqual(requests, [ + "https://www.ti.com/document-viewer/TEST123/datasheet", + "https://www.ti.com/document-viewer/TEST123/datasheet/GUID-PINS", + ]); + }); + + test("follows and device-sorts nested Pin Functions leaves", async () => { + const requests: string[] = []; + const nestedRoot = ` + wrapper + `; + const nestedWrapper = ` + wrong + correct + `; + const fakeFetch = async (input: string | URL) => { + const url = String(input); + requests.push(url); + if (url.endsWith("/datasheet")) return new Response(nestedRoot); + if (url.endsWith("/wrapper")) return new Response(nestedWrapper); + if (url.endsWith("/correct")) return new Response(packageColumnsFixture); + return new Response("not found", { status: 404 }); + }; + const result = await fetchTiDocumentViewerPinout("TLV3212", "P", { + fetch: fakeFetch, + }); + assert.equal(result.status, "ok"); + assert.deepEqual(requests, [ + "https://www.ti.com/document-viewer/TLV3212/datasheet", + "https://www.ti.com/document-viewer/TLV3212/datasheet/wrapper", + "https://www.ti.com/document-viewer/TLV3212/datasheet/correct", + ]); + }); + + test("classifies a transient root response as retryable HTTP failure", async () => { + const result = await fetchTiDocumentViewerPinout("test123", "D", { + fetch: async () => new Response("busy", { status: 503 }), + }); + assert.equal(result.status, "unavailable"); + if (result.status !== "unavailable") return; + assert.equal(result.reason, "http-error"); + }); + + test("fetches the package-code leaf when TI uses BGA pin-map grids", async () => { + const requests: string[] = []; + const fakeFetch = async (input: string | URL) => { + const url = String(input); + requests.push(url); + if (url.endsWith("/datasheet")) + return new Response(packagePinMapRootFixture); + if (url.endsWith("/zcz-package-pin-maps")) { + return new Response(packagePinMapFixture); + } + return new Response("not found", { status: 404 }); + }; + const result = await fetchTiDocumentViewerPinout("am3352", "zcz", { + fetch: fakeFetch, + }); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + assert.equal(result.table.pins.length, 4); + assert.deepEqual(requests, [ + "https://www.ti.com/document-viewer/AM3352/datasheet", + "https://www.ti.com/document-viewer/AM3352/datasheet/zcz-package-pin-maps", + ]); + }); + + test("normalizes pins for the shared schematic-layout helper", () => { + const result = parseTiPinFunctionsSection(legacyRowspanFixture, "YZP"); + assert.equal(result.status, "ok"); + if (result.status !== "ok") return; + const metadata = toTscircuitPinMetadata(result.table.pins); + assert.deepEqual(metadata.physicalPinToKey, { + A1: "pin1", + A2: "pin2", + B1: "pin3", + B2: "pin4", + C1: "pin5", + C2: "pin6", + D1: "pin7", + D2: "pin8", + }); + assert.deepEqual(metadata.pinLabels.pin1, ["VOUT", "A1"]); + assert.equal(metadata.pinRoles.pin7, "ground"); + assert.equal(metadata.pinRoles.pin8, "input"); + + const numericMetadata = toTscircuitPinMetadata([ + { number: "1", name: "OUT", type: "O", description: "Output" }, + { number: "2", name: "GND", type: "GND", description: "Ground" }, + ]); + assert.deepEqual(numericMetadata.physicalPinToKey, { + "1": "pin1", + "2": "pin2", + }); + assert.equal( + toTscircuitPinMetadata([ + { + number: "8", + name: "V+", + type: "I", + description: "Positive (high) supply", + }, + ]).pinRoles.pin8, + "power", + ); + assert.match( + renderTiPinMetadataSource(result.table.pins), + /getTiSchematicLayout\(pinLabels, \{ pinRoles \}\)/, + ); + assert.equal(sanitizeTiPinLabel("IN1−", "PIN"), "IN1_N"); + assert.equal(sanitizeTiPinLabel("V+", "PIN"), "V_P"); + }); +}); diff --git a/scripts/ti-document-viewer-pinout.ts b/scripts/ti-document-viewer-pinout.ts new file mode 100644 index 00000000..1f3825ab --- /dev/null +++ b/scripts/ti-document-viewer-pinout.ts @@ -0,0 +1,1285 @@ +import { pathToFileURL } from "node:url"; + +import type { TiSchematicPinRole } from "../lib/chips/get-ti-schematic-layout.ts"; + +const TI_ORIGIN = "https://www.ti.com"; +const PACKAGE_PIN_MAP_WARNING = + "TI's package pin-map grid provides ball/function data but not electrical pin type or description."; +const MISSING_PIN_TYPE_WARNING = + "TI's HTML table provides pin names and descriptions but no electrical pin-type column."; + +type FetchLike = (input: string | URL, init?: RequestInit) => Promise; + +export interface TiDocumentPin { + /** Package pin or ball identifier exactly as shown by TI. */ + number: string; + name: string; + type: string; + description: string; +} + +export interface TiPinTable { + packageCode: string; + packageColumn: string; + pins: TiDocumentPin[]; + tableClass: string; + warnings: string[]; +} + +export type TiPinTableParseResult = + | { status: "ok"; table: TiPinTable } + | { + status: "unavailable"; + reason: + | "pin-table-not-found" + | "package-column-not-found" + | "empty-pin-table" + | "ambiguous-pin-table"; + message: string; + packageColumns?: string[]; + }; + +export type TiPinoutFetchResult = + | { + status: "ok"; + gpn: string; + packageCode: string; + rootUrl: string; + sectionUrl: string; + table: TiPinTable; + } + | { + status: "unavailable"; + gpn: string; + packageCode: string; + rootUrl: string; + sectionUrl?: string; + reason: + | "document-not-found" + | "pin-section-not-found" + | "pin-table-not-found" + | "package-column-not-found" + | "empty-pin-table" + | "ambiguous-pin-table" + | "http-error"; + message: string; + packageColumns?: string[]; + }; + +interface HtmlCell { + text: string; + colspan: number; + rowspan: number; +} + +interface ParsedHtmlTable { + html: string; + className: string; + headers: string[]; + body: string[][]; + contextText: string; +} + +interface PackageHint { + code: string; + descriptions: string[]; +} + +const PACKAGE_CODE_DESCRIPTION_HINTS: Record = { + D: "SOIC", + DB: "SSOP", + DBQ: "SSOP", + DBV: "SOT-23", + DCK: "SC-70", + DGK: "VSSOP", + DGS: "VSSOP", + DRL: "SOT-5X3", + DSE: "WSON", + RGE: "VQFN", + RHB: "VQFN", + RGZ: "VQFN", + RUG: "X2QFN", + YBG: "DSBGA", + YZP: "DSBGA", + YZV: "DSBGA", +}; + +export interface TiPinSelectionHints { + /** Catalog/package wording used when TI labels columns by package type. */ + packageDescription?: string; + /** Expected physical pin count used when one TI package code has variants. */ + expectedPinCount?: number; + /** Full orderable part number used for pinout-option columns such as A/J/K. */ + orderablePartNumber?: string; +} + +export interface TscircuitPinMetadata { + pinLabels: Record; + pinRoles: Partial>; + physicalPinToKey: Record; +} + +const decodeHtmlEntities = (value: string) => + value.replace( + /&(#x[0-9a-f]+|#\d+|[a-z][a-z0-9]+);/gi, + (entity, body: string) => { + if (body.startsWith("#x") || body.startsWith("#X")) { + return String.fromCodePoint(Number.parseInt(body.slice(2), 16)); + } + if (body.startsWith("#")) { + return String.fromCodePoint(Number.parseInt(body.slice(1), 10)); + } + const named: Record = { + amp: "&", + apos: "'", + deg: "°", + gt: ">", + hellip: "…", + laquo: "«", + lt: "<", + mdash: "—", + micro: "µ", + minus: "−", + nbsp: " ", + ndash: "–", + omega: "Ω", + plusmn: "±", + quot: '"', + raquo: "»", + reg: "®", + times: "×", + trade: "™", + }; + return named[body.toLowerCase()] ?? entity; + }, + ); + +const htmlToText = (html: string) => + decodeHtmlEntities( + html + .replace(/]*>[\s\S]*?<\/sup>/gi, "") + .replace(/<\/?sub\b[^>]*>/gi, "") + .replace(//gi, ", ") + .replace(/<[^>]+>/g, " "), + ) + .replace(/\s+/g, " ") + .trim(); + +const parseAttributes = (source: string) => { + const attributes: Record = {}; + const expression = + /([^\s=/>]+)\s*=\s*(?:"([^"]*)"|'([^']*)'|([^\s"'=<>`]+))/g; + for (const match of source.matchAll(expression)) { + attributes[match[1].toLowerCase()] = decodeHtmlEntities( + match[2] ?? match[3] ?? match[4] ?? "", + ); + } + return attributes; +}; + +const getClassTokens = (value: string | undefined) => + new Set((value ?? "").toLowerCase().split(/\s+/).filter(Boolean)); + +const extractElements = (html: string, tag: string) => { + const expression = new RegExp( + `<${tag}\\b([^>]*)>([\\s\\S]*?)<\\/${tag}>`, + "gi", + ); + return [...html.matchAll(expression)].map((match) => ({ + attributes: parseAttributes(match[1]), + innerHtml: match[2], + outerHtml: match[0], + index: match.index, + })); +}; + +const parseCells = (rowHtml: string) => { + const cells: HtmlCell[] = []; + const expression = /<(?:th|td)\b([^>]*)>([\s\S]*?)<\/(?:th|td)>/gi; + for (const match of rowHtml.matchAll(expression)) { + const attributes = parseAttributes(match[1]); + cells.push({ + text: htmlToText(match[2]), + colspan: Math.max(1, Number.parseInt(attributes.colspan ?? "1", 10)), + rowspan: Math.max(1, Number.parseInt(attributes.rowspan ?? "1", 10)), + }); + } + return cells; +}; + +const expandRows = (rowsHtml: string[]) => { + const grid: string[][] = []; + const spans = new Map(); + + rowsHtml.forEach((rowHtml, rowIndex) => { + const row: string[] = []; + for (const [column, span] of spans) { + if (rowIndex < span.endRow) row[column] = span.text; + else spans.delete(column); + } + + let column = 0; + for (const cell of parseCells(rowHtml)) { + while (row[column] !== undefined) column += 1; + for (let offset = 0; offset < cell.colspan; offset += 1) { + const targetColumn = column + offset; + row[targetColumn] = cell.text; + if (cell.rowspan > 1) { + spans.set(targetColumn, { + text: cell.text, + endRow: rowIndex + cell.rowspan, + }); + } + } + column += cell.colspan; + } + grid.push(row.map((cell) => cell ?? "")); + }); + + return grid; +}; + +const parseRowsFromContainer = (html: string) => + expandRows(extractElements(html, "tr").map((row) => row.innerHtml)); + +const getHeaderLabels = (headerRows: string[][]) => { + const columnCount = Math.max(0, ...headerRows.map((row) => row.length)); + return Array.from({ length: columnCount }, (_, column) => + [ + ...new Set(headerRows.map((row) => row[column]?.trim()).filter(Boolean)), + ].join(" / "), + ); +}; + +const parseHtmlTable = ( + tableHtml: string, + contextHtml = "", +): ParsedHtmlTable => { + const openingTag = tableHtml.match(/^]*)>/i)?.[1] ?? ""; + const attributes = parseAttributes(openingTag); + const head = extractElements(tableHtml, "thead")[0]?.innerHtml; + const body = extractElements(tableHtml, "tbody")[0]?.innerHtml; + + if (head && body) { + return { + html: tableHtml, + className: attributes.class ?? "", + headers: getHeaderLabels(parseRowsFromContainer(head)), + body: parseRowsFromContainer(body), + contextText: htmlToText(contextHtml), + }; + } + + const rows = extractElements(tableHtml, "tr"); + const firstBodyRow = rows.findIndex((row) => / row.innerHtml)), + ), + body: expandRows(bodyRows.map((row) => row.innerHtml)), + contextText: htmlToText(contextHtml), + }; +}; + +const normalizeForMatch = (value: string) => + value + .toUpperCase() + .replace(/[‐‑‒–—−]/g, "-") + .replace(/[^A-Z0-9]+/g, " ") + .trim(); + +const splitList = (value: string) => + value + .replace(/\bAND\b/gi, ",") + .split(/[,;/]+/) + .map((item) => item.trim()) + .filter(Boolean); + +const extractTextsByClass = (html: string, className: string) => + ["span", "div"] + .flatMap((tag) => extractElements(html, tag)) + .filter((element) => + getClassTokens(element.attributes.class).has(className), + ) + .sort((left, right) => (left.index ?? 0) - (right.index ?? 0)) + .map((element) => htmlToText(element.innerHtml)); + +const parsePackageHints = (sectionHtml: string): PackageHint[] => { + const descriptions = extractTextsByClass(sectionHtml, "pinoutdesc"); + const pinCounts = extractTextsByClass(sectionHtml, "pincountdesc"); + + return descriptions.flatMap((description, index) => { + const codes = splitList( + description + .replace(/^.*?\bPACKAGE\s*:?\s*/i, "") + .replace(/\bPACKAGES?\b/gi, "") + .trim() || description.replace(/\bPACKAGES?\b/gi, "").trim(), + ).filter((candidate) => /^[A-Z0-9-]{1,12}$/i.test(candidate)); + const packageTypes = splitList( + (pinCounts[index] ?? "").replace(/^\d+\s*-?\s*PIN\s*/i, ""), + ); + + return codes.map((code, codeIndex) => ({ + code, + descriptions: + packageTypes.length === codes.length + ? [packageTypes[codeIndex]] + : packageTypes, + })); + }); +}; + +const isPinFunctionTable = (table: ParsedHtmlTable) => { + const headers = table.headers.map(normalizeForMatch); + const hasType = headers.some((header) => + /(?:^| )(?:TYPE|I O|DIR)(?:$| )/.test(header), + ); + return ( + headers.some((header) => + /(?:^| )(?:NAME|DEFAULT FUNCTION)(?:$| )/.test(header), + ) && + headers.some((header) => + /(?:^| )(?:PINS?|NO|NUMBER|BALLS?|PADS?|TERMINALS?)(?:$| )/.test(header), + ) && + (headers.some((header) => /(?:^| )DESCRIPTION(?:$| )/.test(header)) || + (hasType && headers[headers.length - 1] === "")) + ); +}; + +const findPinFunctionTables = (sectionHtml: string) => { + const tables = extractElements(sectionHtml, "table").map((element) => { + const contextStart = Math.max(0, (element.index ?? 0) - 1200); + const precedingHtml = sectionHtml.slice(contextStart, element.index ?? 0); + const previousTableEnd = precedingHtml + .toLowerCase() + .lastIndexOf(""); + return parseHtmlTable( + element.outerHtml, + previousTableEnd >= 0 + ? precedingHtml.slice(previousTableEnd + "".length) + : precedingHtml, + ); + }); + const legacy = tables.filter( + (table) => + getClassTokens(table.className).has("termfunctions") && + isPinFunctionTable(table), + ); + if (legacy.length > 0) return legacy; + return tables.filter(isPinFunctionTable); +}; + +const findColumn = (headers: string[], pattern: RegExp) => + headers.findIndex((header) => pattern.test(normalizeForMatch(header))); + +const findColumns = (headers: string[], pattern: RegExp) => + headers.flatMap((header, column) => + pattern.test(normalizeForMatch(header)) ? [column] : [], + ); + +const scoreDeviceColumn = (header: string, deviceName: string | undefined) => { + if (!deviceName) return 0; + const normalizedDevice = normalizeForMatch(deviceName).replace(/ /g, ""); + const deviceTokens = normalizeForMatch(header) + .split(" ") + .filter( + (token) => token.length >= 5 && /[A-Z]/.test(token) && /\d/.test(token), + ); + return Math.max( + 0, + ...deviceTokens.map((token) => { + if (token === normalizedDevice) { + return 360 + token.length; + } + if (normalizedDevice.includes(token)) { + return 300 + token.length; + } + if (token.includes(normalizedDevice)) { + return 180 + normalizedDevice.length; + } + if (!token.includes("X")) return 0; + const wildcard = new RegExp( + token.replace(/[.*+?^${}()|[\]\\]/g, "\\$&").replace(/X/g, "."), + ); + return wildcard.test(normalizedDevice) ? 320 + token.length : 0; + }), + ); +}; + +const scorePackageColumn = ( + header: string, + packageCode: string, + packageHints: PackageHint[], + deviceName?: string, + selectionHints: TiPinSelectionHints = {}, +) => { + const normalizedHeader = ` ${normalizeForMatch(header)} `; + const normalizedCode = normalizeForMatch(packageCode); + // An explicit TI package-code header is authoritative. Count/type hints are + // only tie-breakers for tables that omit the package code. + let score = normalizedHeader.includes(` ${normalizedCode} `) ? 500 : 0; + if (/(?:^| )PIN (?:NO|NUMBER)(?:$| )/.test(normalizedHeader.trim())) { + score += 25; + } + score += Math.max( + scoreDeviceColumn(header, deviceName), + scoreDeviceColumn(header, selectionHints.orderablePartNumber), + ); + if ( + selectionHints.expectedPinCount && + new RegExp( + `(?:^|[^0-9])${selectionHints.expectedPinCount}(?:[^0-9]|$)`, + ).test(normalizeForMatch(header)) + ) { + score += 40; + } + const pinoutOption = normalizeForMatch(header).match( + /(?:^| )PINOUT ([A-Z0-9]+)(?:$| )/, + )?.[1]; + if (pinoutOption && deviceName && selectionHints.orderablePartNumber) { + const normalizedDevice = normalizeForMatch(deviceName).replace(/ /g, ""); + const normalizedOrderable = normalizeForMatch( + selectionHints.orderablePartNumber, + ).replace(/ /g, ""); + const optionSuffix = normalizedOrderable.startsWith(normalizedDevice) + ? normalizedOrderable.slice(normalizedDevice.length) + : ""; + if (optionSuffix.startsWith(pinoutOption)) score += 150; + } + const hint = packageHints.find( + (candidate) => normalizeForMatch(candidate.code) === normalizedCode, + ); + for (const description of hint?.descriptions ?? []) { + const normalizedDescription = normalizeForMatch(description); + if ( + normalizedDescription && + normalizedHeader.includes(` ${normalizedDescription} `) + ) { + score += 50; + continue; + } + for (const token of normalizedDescription.split(" ").filter(Boolean)) { + if (token.length > 1 && normalizedHeader.includes(` ${token} `)) { + score += 5; + } + } + } + return score; +}; + +const selectPackageColumn = ( + headers: string[], + candidateColumns: number[], + packageCode: string, + packageHints: PackageHint[], + deviceName?: string, + selectionHints: TiPinSelectionHints = {}, + body: string[][] = [], +) => { + if (candidateColumns.length === 1) return candidateColumns[0]; + const scored = candidateColumns + .map((column) => { + const parsedPinCount = new Set( + body.flatMap((row) => splitPinNumbers(row[column] ?? "")), + ).size; + return { + column, + score: + scorePackageColumn( + headers[column] ?? "", + packageCode, + packageHints, + deviceName, + selectionHints, + ) + (selectionHints.expectedPinCount === parsedPinCount ? 120 : 0), + }; + }) + .sort((left, right) => right.score - left.score); + if ( + scored[0]?.score > 0 && + (scored.length === 1 || scored[0].score > (scored[1]?.score ?? 0)) + ) { + return scored[0].column; + } + return -1; +}; + +const scorePackageInContext = (context: string, packageCode: string) => { + const normalizedContext = ` ${normalizeForMatch(context)} `; + const normalizedCode = normalizeForMatch(packageCode); + if (!normalizedCode) return 0; + if ( + normalizedContext.includes(` ${normalizedCode} PACKAGE `) || + normalizedContext.includes(` PACKAGE ${normalizedCode} `) || + normalizedContext.includes(` PINS FOR ${normalizedCode} `) + ) { + return 200; + } + return normalizedCode.length >= 3 && + normalizedContext.includes(` ${normalizedCode} `) + ? 40 + : 0; +}; + +const getTableCaptionContext = (context: string) => { + const normalizedContext = context.toUpperCase(); + const tableCaptionStart = normalizedContext.lastIndexOf("TABLE "); + const pinFunctionsStart = normalizedContext.lastIndexOf("PIN FUNCTIONS"); + const textAfterPinFunctions = + pinFunctionsStart >= 0 + ? normalizeForMatch( + context.slice(pinFunctionsStart + "PIN FUNCTIONS".length), + ) + : ""; + const captionStart = + pinFunctionsStart >= 0 && textAfterPinFunctions.length >= 4 + ? pinFunctionsStart + : tableCaptionStart; + return captionStart >= 0 ? context.slice(captionStart) : context.slice(-240); +}; + +const scorePinFunctionTable = ( + table: ParsedHtmlTable, + packageCode: string, + packageHints: PackageHint[], + deviceName?: string, + selectionHints: TiPinSelectionHints = {}, +) => { + const captionContext = getTableCaptionContext(table.contextText); + const columnScore = Math.max( + 0, + ...table.headers.map((header) => + scorePackageColumn( + header, + packageCode, + packageHints, + deviceName, + selectionHints, + ), + ), + ); + return ( + scorePackageInContext(table.contextText, packageCode) + + columnScore + + scoreDeviceColumn(captionContext, deviceName) + + (findColumn(table.headers, /(?:^| )(?:TYPE|I O|DIR)(?:$| )/) >= 0 ? 10 : 0) + ); +}; + +const selectPinFunctionTables = ( + tables: ParsedHtmlTable[], + packageCode: string, + packageHints: PackageHint[], + deviceName?: string, + selectionHints: TiPinSelectionHints = {}, +) => { + if (tables.length === 1) return [tables[0]]; + const scored = tables + .map((table) => ({ + table, + score: scorePinFunctionTable( + table, + packageCode, + packageHints, + deviceName, + selectionHints, + ), + })) + .sort((left, right) => right.score - left.score); + const top = scored[0]; + if (!top || top.score <= 0) return undefined; + const topHasExactPackageContext = + scorePackageInContext(top.table.contextText, packageCode) >= 200; + if (topHasExactPackageContext) { + const topDeviceScore = scoreDeviceColumn( + getTableCaptionContext(top.table.contextText), + deviceName, + ); + const packageTables = scored.filter((candidate) => { + const captionContext = getTableCaptionContext( + candidate.table.contextText, + ); + const hasExactPackageContext = + scorePackageInContext(candidate.table.contextText, packageCode) >= 200; + const deviceScore = scoreDeviceColumn(captionContext, deviceName); + return ( + hasExactPackageContext && + (topDeviceScore === 0 + ? deviceScore === 0 + : deviceScore === topDeviceScore) + ); + }); + if (packageTables.length > 0) { + return packageTables.map(({ table }) => table); + } + } + if (top.score > (scored[1]?.score ?? 0)) return [top.table]; + return undefined; +}; + +const deduplicateEquivalentColumns = ( + table: ParsedHtmlTable, + columns: number[], +) => + columns.filter( + (column, index) => + !columns + .slice(0, index) + .some( + (previousColumn) => + normalizeForMatch(table.headers[previousColumn] ?? "") === + normalizeForMatch(table.headers[column] ?? "") && + table.body.every((row) => row[previousColumn] === row[column]), + ), + ); + +const expandPinRange = (value: string) => { + const range = value.match(/^([A-Z]*)(\d+)\s*[-–—]\s*([A-Z]*)(\d+)$/i); + if (!range) return [value]; + const leftPrefix = range[1].toUpperCase(); + const rightPrefix = (range[3] || range[1]).toUpperCase(); + const start = Number(range[2]); + const end = Number(range[4]); + if (leftPrefix !== rightPrefix || end < start || end - start > 1000) { + return [value]; + } + return Array.from( + { length: end - start + 1 }, + (_, offset) => `${leftPrefix}${start + offset}`, + ); +}; + +const splitPinNumbers = (value: string) => + value + .split(/[,;]+/) + .map((pin) => pin.trim()) + .filter((pin) => pin && !/^(?:-|—|–|N\/A|NA)$/i.test(pin)) + .flatMap(expandPinRange) + .filter((pin) => + /^(?:[A-Z]{0,3}\d+[A-Z]?|EP|EPAD|PAD|DAP|TAB|POWERPAD|THERMAL PAD)$/i.test( + pin, + ), + ); + +const deduplicatePins = (pins: TiDocumentPin[]) => { + const result: TiDocumentPin[] = []; + const seen = new Map(); + const warnings: string[] = []; + for (const pin of pins) { + const previous = seen.get(pin.number); + if (!previous) { + seen.set(pin.number, pin); + result.push(pin); + continue; + } + if ( + previous.name !== pin.name || + previous.type !== pin.type || + previous.description !== pin.description + ) { + warnings.push( + `Pin ${pin.number} appears more than once with conflicting data; kept the first row.`, + ); + } + } + return { pins: result, warnings }; +}; + +const parsePackagePinMap = ( + sectionHtml: string, + packageCode: string, +): TiPinTable | undefined => { + const pins = extractElements(sectionHtml, "td").flatMap((cell) => { + const marker = extractElements(cell.innerHtml, "a") + .map((anchor) => anchor.attributes.id ?? "") + .find((id) => /^pm_.+_[A-Z]{1,3}\d{1,3}$/i.test(id)); + const number = marker?.match(/_([A-Z]{1,3}\d{1,3})$/i)?.[1]; + const name = htmlToText(cell.innerHtml); + if (!number || !name) return []; + return [{ number: number.toUpperCase(), name, type: "", description: "" }]; + }); + if (pins.length === 0) return undefined; + + const deduplicated = deduplicatePins(pins); + return { + packageCode, + packageColumn: "ball coordinate from pm_*_ anchor", + pins: deduplicated.pins, + tableClass: "termfunctions package-pin-map", + warnings: [PACKAGE_PIN_MAP_WARNING, ...deduplicated.warnings], + }; +}; + +const parseSelectedPinFunctionTable = ( + table: ParsedHtmlTable, + packageCode: string, + packageHints: PackageHint[], + deviceName: string | undefined, + selectionHints: TiPinSelectionHints, +): TiPinTableParseResult => { + const nameColumns = findColumns( + table.headers, + /(?:^| )(?:NAME|DEFAULT FUNCTION)(?:$| )/, + ); + const nameColumn = nameColumns[0] ?? -1; + const typeColumn = findColumn( + table.headers, + /(?:^| )(?:TYPE|I O|DIR)(?:$| )/, + ); + const explicitDescriptionColumn = findColumn( + table.headers, + /(?:^| )DESCRIPTION(?:$| )/, + ); + const descriptionColumn = + explicitDescriptionColumn >= 0 + ? explicitDescriptionColumn + : normalizeForMatch(table.headers[table.headers.length - 1] ?? "") === "" + ? table.headers.length - 1 + : -1; + const excluded = new Set([...nameColumns, typeColumn, descriptionColumn]); + const remainingColumns = table.headers + .map((_, column) => column) + .filter((column) => !excluded.has(column)); + const likelyPackageColumns = remainingColumns.filter((column) => { + const header = table.headers[column] ?? ""; + return ( + /(?:^| )(?:PINS?|NO|NUMBER|BALLS?|PADS?|TERMINALS?)(?:$| )/.test( + normalizeForMatch(header), + ) || + scorePackageColumn( + header, + packageCode, + packageHints, + deviceName, + selectionHints, + ) > 0 + ); + }); + const packageColumns = deduplicateEquivalentColumns( + table, + likelyPackageColumns.length > 0 ? likelyPackageColumns : remainingColumns, + ); + const packageColumn = selectPackageColumn( + table.headers, + packageColumns, + packageCode, + packageHints, + deviceName, + selectionHints, + table.body, + ); + + if (nameColumn < 0 || descriptionColumn < 0 || packageColumn < 0) { + return { + status: "unavailable", + reason: "package-column-not-found", + message: `Could not select the ${packageCode} package pin column from TI's table.`, + packageColumns: packageColumns.map( + (column) => table.headers[column] ?? `column ${column + 1}`, + ), + }; + } + + const parsedPins = table.body.flatMap((row) => { + const numbers = splitPinNumbers(row[packageColumn] ?? ""); + const rawName = row[nameColumn]?.trim() ?? ""; + const type = typeColumn >= 0 ? (row[typeColumn]?.trim() ?? "") : ""; + const description = row[descriptionColumn]?.trim() ?? ""; + return numbers.map((number) => ({ + number, + name: + !rawName && /^(?:THERMAL PAD|EP|EPAD|PAD|DAP|POWERPAD)$/i.test(number) + ? "THERMAL_PAD" + : rawName, + type, + description, + })); + }); + const deduplicated = deduplicatePins(parsedPins); + if (deduplicated.pins.length === 0) { + return { + status: "unavailable", + reason: "empty-pin-table", + message: `TI's ${packageCode} package column contains no pin identifiers.`, + }; + } + + return { + status: "ok", + table: { + packageCode, + packageColumn: table.headers[packageColumn], + pins: deduplicated.pins, + tableClass: table.className, + warnings: [ + ...(typeColumn < 0 ? [MISSING_PIN_TYPE_WARNING] : []), + ...deduplicated.warnings, + ], + }, + }; +}; + +export const parseTiPinFunctionsSection = ( + sectionHtml: string, + packageCode: string, + deviceName?: string, + selectionHints: TiPinSelectionHints = {}, +): TiPinTableParseResult => { + const packagePinMap = parsePackagePinMap(sectionHtml, packageCode); + if (packagePinMap) return { status: "ok", table: packagePinMap }; + + const tables = findPinFunctionTables(sectionHtml); + if (tables.length === 0) { + return { + status: "unavailable", + reason: "pin-table-not-found", + message: + "TI's Pin Configuration and Functions section has no parseable HTML pin-function table.", + }; + } + const packageHints = parsePackageHints(sectionHtml); + const callerDescriptions = [ + PACKAGE_CODE_DESCRIPTION_HINTS[packageCode.toUpperCase()], + selectionHints.packageDescription, + ].filter((description): description is string => Boolean(description)); + const matchingPackageHint = packageHints.find( + (hint) => normalizeForMatch(hint.code) === normalizeForMatch(packageCode), + ); + if (matchingPackageHint) { + matchingPackageHint.descriptions.push(...callerDescriptions); + } else if (callerDescriptions.length > 0) { + packageHints.push({ code: packageCode, descriptions: callerDescriptions }); + } + const selectedTables = selectPinFunctionTables( + tables, + packageCode, + packageHints, + deviceName, + selectionHints, + ); + if (!selectedTables) { + return { + status: "unavailable", + reason: "ambiguous-pin-table", + message: `TI exposes ${tables.length} pin-function tables; package-to-table selection is ambiguous.`, + }; + } + const parsedTables = selectedTables.map((table) => + parseSelectedPinFunctionTable( + table, + packageCode, + packageHints, + deviceName, + selectionHints, + ), + ); + const successfulTables = parsedTables.flatMap((result) => + result.status === "ok" ? [result.table] : [], + ); + if (successfulTables.length === 0) { + return parsedTables[0] as Exclude; + } + + const deduplicated = deduplicatePins( + successfulTables.flatMap((table) => table.pins), + ); + const skippedTableWarnings = parsedTables.flatMap((result) => + result.status === "unavailable" + ? [`Skipped a related TI table: ${result.message}`] + : [], + ); + return { + status: "ok", + table: { + packageCode, + packageColumn: [ + ...new Set(successfulTables.map((table) => table.packageColumn)), + ].join(" + "), + pins: deduplicated.pins, + tableClass: [ + ...new Set(successfulTables.map((table) => table.tableClass)), + ].join(" "), + warnings: [ + ...(successfulTables.length > 1 + ? [ + `Combined ${successfulTables.length} package-specific TI pin tables.`, + ] + : []), + ...new Set(successfulTables.flatMap((table) => table.warnings)), + ...skippedTableWarnings, + ...deduplicated.warnings, + ], + }, + }; +}; + +const isPinFunctionsTitle = (title: string) => { + const normalized = normalizeForMatch(title).replace(/^(?:\d+ )+/, ""); + return ( + /^(?:PIN|TERMINAL) CONFIGURATIONS?(?: |$)/.test(normalized) || + /^(?:PIN|TERMINAL) FUNCTIONS(?: |$)/.test(normalized) + ); +}; + +export const findTiPinConfigurationSectionUrls = ( + rootHtml: string, + rootUrl: string, + deviceName?: string, +) => { + const candidates: { url: string; score: number; index: number }[] = []; + for (const [index, anchor] of extractElements(rootHtml, "a").entries()) { + const attributes = anchor.attributes; + const title = + attributes["data-navtitle"] ?? + attributes["data-chaptertitle"] ?? + htmlToText(anchor.innerHtml); + const chapterTitle = attributes["data-chaptertitle"] ?? ""; + const isSupplementalPinData = + isPinFunctionsTitle(chapterTitle) && + /^(?:PIN ATTRIBUTES|SIGNAL DESCRIPTIONS)$/.test(normalizeForMatch(title)); + if (!isPinFunctionsTitle(title) && !isSupplementalPinData) continue; + const href = attributes.href; + if (!href) continue; + const url = new URL(href, rootUrl); + url.hash = ""; + if (!candidates.some((candidate) => candidate.url === url.href)) { + candidates.push({ + url: url.href, + score: scoreDeviceColumn(title, deviceName), + index, + }); + } + } + return candidates + .sort((left, right) => right.score - left.score || left.index - right.index) + .map(({ url }) => url); +}; + +export const findTiPinConfigurationSectionUrl = ( + rootHtml: string, + rootUrl: string, + deviceName?: string, +) => findTiPinConfigurationSectionUrls(rootHtml, rootUrl, deviceName)[0]; + +export const findTiPackagePinMapSectionUrl = ( + rootHtml: string, + rootUrl: string, + packageCode: string, +) => { + const normalizedPackageCode = normalizeForMatch(packageCode); + for (const anchor of extractElements(rootHtml, "a")) { + const attributes = anchor.attributes; + const title = + attributes["data-navtitle"] ?? + attributes["data-sectiontitle"] ?? + htmlToText(anchor.innerHtml); + const match = normalizeForMatch(title).match( + /^(.+?) PACKAGE PIN MAPS?(?: |$)/, + ); + if (!match) continue; + const packageCodes = splitList(match[1]).map(normalizeForMatch); + if (!packageCodes.includes(normalizedPackageCode)) continue; + const href = attributes.href; + if (!href) continue; + const url = new URL(href, rootUrl); + url.hash = ""; + return url.href; + } + return undefined; +}; + +const unavailableFromParse = ( + result: Exclude, + context: { + gpn: string; + packageCode: string; + rootUrl: string; + sectionUrl: string; + }, +): TiPinoutFetchResult => ({ ...context, ...result }); + +export const fetchTiDocumentViewerPinout = async ( + gpn: string, + packageCode: string, + options: TiPinSelectionHints & { + fetch?: FetchLike; + tiOrigin?: string; + } = {}, +): Promise => { + const normalizedGpn = gpn.trim().toUpperCase(); + const normalizedPackageCode = packageCode.trim().toUpperCase(); + const tiOrigin = options.tiOrigin ?? TI_ORIGIN; + const fetchPage = options.fetch ?? fetch; + const rootUrl = new URL( + `/document-viewer/${encodeURIComponent(normalizedGpn)}/datasheet`, + tiOrigin, + ).href; + const context = { + gpn: normalizedGpn, + packageCode: normalizedPackageCode, + rootUrl, + }; + + let rootResponse: Response; + try { + rootResponse = await fetchPage(rootUrl, { + headers: { accept: "text/html,application/xhtml+xml" }, + }); + } catch (error) { + return { + status: "unavailable", + ...context, + reason: "http-error", + message: `TI document-viewer request failed: ${error instanceof Error ? error.message : String(error)}`, + }; + } + if (!rootResponse.ok) { + return { + status: "unavailable", + ...context, + reason: rootResponse.status === 404 ? "document-not-found" : "http-error", + message: `TI document-viewer returned HTTP ${rootResponse.status} for ${normalizedGpn}.`, + }; + } + + const rootHtml = await rootResponse.text(); + const sectionUrls = [ + findTiPackagePinMapSectionUrl(rootHtml, rootUrl, normalizedPackageCode), + ...findTiPinConfigurationSectionUrls(rootHtml, rootUrl, normalizedGpn), + ].filter( + (url, index, urls): url is string => + Boolean(url) && urls.indexOf(url) === index, + ); + if (sectionUrls.length === 0) { + const rootParse = parseTiPinFunctionsSection( + rootHtml, + normalizedPackageCode, + normalizedGpn, + options, + ); + if (rootParse.status === "ok") { + return { + status: "ok", + ...context, + sectionUrl: rootUrl, + table: rootParse.table, + }; + } + if (rootParse.reason !== "pin-table-not-found") { + return unavailableFromParse(rootParse, { + ...context, + sectionUrl: rootUrl, + }); + } + return { + status: "unavailable", + ...context, + reason: "pin-section-not-found", + message: `TI's HTML datasheet for ${normalizedGpn} has neither a Pin/Terminal Functions section nor a ${normalizedPackageCode} package pin-map link.`, + }; + } + + let lastUnavailable: TiPinoutFetchResult | undefined; + const knownSectionUrls = new Set(sectionUrls); + for ( + let sectionIndex = 0; + sectionIndex < sectionUrls.length && sectionIndex < 16; + sectionIndex += 1 + ) { + const sectionUrl = sectionUrls[sectionIndex]; + let sectionResponse: Response; + try { + sectionResponse = await fetchPage(sectionUrl, { + headers: { accept: "text/html,application/xhtml+xml" }, + }); + } catch (error) { + lastUnavailable = { + status: "unavailable", + ...context, + sectionUrl, + reason: "http-error", + message: `TI pin-section request failed: ${error instanceof Error ? error.message : String(error)}`, + }; + continue; + } + if (!sectionResponse.ok) { + lastUnavailable = { + status: "unavailable", + ...context, + sectionUrl, + reason: "http-error", + message: `TI pin-section request returned HTTP ${sectionResponse.status}.`, + }; + continue; + } + + const sectionHtml = await sectionResponse.text(); + const parsed = parseTiPinFunctionsSection( + sectionHtml, + normalizedPackageCode, + normalizedGpn, + options, + ); + if (parsed.status === "ok") { + return { status: "ok", ...context, sectionUrl, table: parsed.table }; + } + lastUnavailable = unavailableFromParse(parsed, { + ...context, + sectionUrl, + }); + + const nestedSectionUrls = [ + findTiPackagePinMapSectionUrl( + sectionHtml, + sectionUrl, + normalizedPackageCode, + ), + ...findTiPinConfigurationSectionUrls( + sectionHtml, + sectionUrl, + normalizedGpn, + ), + ].filter((url): url is string => Boolean(url)); + for (const nestedSectionUrl of nestedSectionUrls) { + if (knownSectionUrls.has(nestedSectionUrl)) continue; + knownSectionUrls.add(nestedSectionUrl); + sectionUrls.push(nestedSectionUrl); + } + } + return lastUnavailable as TiPinoutFetchResult; +}; + +const comparePhysicalPins = (left: string, right: string) => + left.localeCompare(right, "en", { numeric: true, sensitivity: "base" }); + +export const sanitizeTiPinLabel = (value: string, fallback: string) => { + let label = value.trim(); + const isActiveLow = + /^[!/~]/.test(label) || + /(?:#|\u0305)$/.test(label) || + /\boverbar\b/i.test(label); + label = label + .replace(/^[!/~]+/, "") + .replace(/(?:#|\u0305)+$/, "") + .replace(/[−–—-]$/g, "_N") + .replace(/\+$/g, "_P") + .replace(/[^A-Za-z0-9]+/g, "_") + .replace(/^_+|_+$/g, "") + .replace(/_+/g, "_"); + if (!label) label = fallback; + if (isActiveLow && !/^N_/i.test(label) && !/_N$/i.test(label)) { + label = `N_${label}`; + } + return label; +}; + +const roleFromOfficialPin = ( + pin: TiDocumentPin, +): TiSchematicPinRole | undefined => { + const type = normalizeForMatch(pin.type); + const name = sanitizeTiPinLabel(pin.name, "").toUpperCase(); + const description = normalizeForMatch(pin.description); + if ( + /^(?:NC|N_C|DNC|DNU|RESERVED)$/.test(name) || + /(?:NO INTERNAL CONNECTION|DO NOT CONNECT|NOT CONNECTED)/.test(description) + ) { + return "no-connect"; + } + if (/(?:^| )(?:GND|GROUND)(?:$| )/.test(type) || /GND|VSS/.test(name)) { + return "ground"; + } + if ( + /(?:SUPPLY|POWER PIN|POWER INPUT|BIAS POWER)/.test(description) || + /^(?:V_P|V_N|VDD|VCC|AVDD|AVCC|DVDD|DVCC|PVDD|VBAT|VBUS|VIO)(?:$|_)/.test( + name, + ) + ) { + return "power"; + } + if (/^(?:P|POWER|PWR|SUPPLY)$/.test(type)) return "power"; + if (/^(?:I O|IO|B|BIDIRECTIONAL)$/.test(type)) return "bidirectional"; + if (/^(?:O|OUTPUT|OD|OPEN DRAIN)$/.test(type)) return "output"; + if (/^(?:I|INPUT)$/.test(type)) return "input"; + return undefined; +}; + +export const toTscircuitPinMetadata = ( + pins: readonly TiDocumentPin[], +): TscircuitPinMetadata => { + const sortedPins = [...pins].sort((left, right) => + comparePhysicalPins(left.number, right.number), + ); + const numericPinNumbers = sortedPins + .map((pin) => (/^\d+$/.test(pin.number) ? Number(pin.number) : undefined)) + .filter((pin): pin is number => pin !== undefined); + let nextPinNumber = Math.max(0, ...numericPinNumbers) + 1; + const usedKeys = new Set(); + const pinLabels: Record = {}; + const pinRoles: Partial> = {}; + const physicalPinToKey: Record = {}; + + for (const pin of sortedPins) { + if (physicalPinToKey[pin.number]) continue; + let key = /^\d+$/.test(pin.number) ? `pin${Number(pin.number)}` : ""; + if (!key || usedKeys.has(key)) { + while (usedKeys.has(`pin${nextPinNumber}`)) nextPinNumber += 1; + key = `pin${nextPinNumber}`; + nextPinNumber += 1; + } + usedKeys.add(key); + physicalPinToKey[pin.number] = key; + + const functionalLabel = sanitizeTiPinLabel(pin.name, `PIN_${pin.number}`); + const aliases = [functionalLabel]; + if (!/^\d+$/.test(pin.number)) { + const physicalAlias = sanitizeTiPinLabel(pin.number, key.toUpperCase()); + if (!aliases.includes(physicalAlias)) aliases.push(physicalAlias); + } + pinLabels[key] = aliases; + const role = roleFromOfficialPin(pin); + if (role) pinRoles[key] = role; + } + + return { pinLabels, pinRoles, physicalPinToKey }; +}; + +export const renderTiPinMetadataSource = (pins: readonly TiDocumentPin[]) => { + const metadata = toTscircuitPinMetadata(pins); + const renderRecord = (record: object) => + JSON.stringify(record, null, 2).replace(/"([^"\\]+)":/g, "$1:"); + return [ + `const pinLabels = ${renderRecord(metadata.pinLabels)} as const;`, + "", + `const pinRoles = ${renderRecord(metadata.pinRoles)} as const;`, + "", + "const schematicLayout = getTiSchematicLayout(pinLabels, { pinRoles });", + ].join("\n"); +}; + +const isDirectExecution = () => { + const entry = process.argv[1]; + return Boolean(entry && import.meta.url === pathToFileURL(entry).href); +}; + +const runCli = async () => { + const [gpn, packageCode] = process.argv.slice(2); + if (!gpn || !packageCode) { + console.error( + "Usage: bun scripts/ti-document-viewer-pinout.ts ", + ); + process.exitCode = 1; + return; + } + const result = await fetchTiDocumentViewerPinout(gpn, packageCode); + console.log(JSON.stringify(result, null, 2)); + if (result.status === "unavailable") process.exitCode = 2; +}; + +if (isDirectExecution()) await runCli(); diff --git a/scripts/validate-ti-sysblocks-catalog.ts b/scripts/validate-ti-sysblocks-catalog.ts new file mode 100644 index 00000000..0f3807e4 --- /dev/null +++ b/scripts/validate-ti-sysblocks-catalog.ts @@ -0,0 +1,307 @@ +import { dirname, join } from "node:path"; +import { fileURLToPath } from "node:url"; + +type CatalogEntry = { + family: string; + exportName: string; + source: "existing" | "jlcpcb" | "ti-datasheet"; + componentExportName?: string; + manufacturerPartNumber?: string; + lcscPartNumber?: string; + packageCode?: string; + pinCount?: number; + datasheetUrl: string; + sourceRepository: string; +}; + +const repositoryRoot = join(dirname(fileURLToPath(import.meta.url)), ".."); +const chipDirectory = join(repositoryRoot, "lib/chips"); +const catalogPath = join(chipDirectory, "ti-sysblocks-chip-catalog.json"); +const generatedExportsPath = join(chipDirectory, "ti-sysblocks-components.tsx"); +const chipIndexPath = join(chipDirectory, "index.tsx"); +const rootIndexPath = join(repositoryRoot, "index.ts"); +const footprintSelectionsPath = join( + chipDirectory, + "ti-sysblocks-footprint-selections.json", +); +const materializationReportPath = join( + chipDirectory, + "ti-sysblocks-materialization-report.json", +); +const pinoutCachePath = join(chipDirectory, "ti-sysblocks-pinouts.json"); + +const catalog = (await Bun.file(catalogPath).json()) as CatalogEntry[]; +const failures: string[] = []; + +const assert = (condition: unknown, message: string) => { + if (!condition) failures.push(message); +}; + +assert( + catalog.length === 810, + `expected 810 families, found ${catalog.length}`, +); +assert( + new Set(catalog.map((entry) => entry.family)).size === catalog.length, + "family names are not unique", +); +assert( + new Set(catalog.map((entry) => entry.exportName)).size === catalog.length, + "TypeScript export names are not unique", +); +const generatedComponentNames = catalog + .filter((entry) => entry.source !== "existing") + .map((entry) => entry.componentExportName!); +assert( + new Set(generatedComponentNames).size === generatedComponentNames.length, + "exact component export names are not unique", +); + +const sourceCounts = catalog.reduce>((counts, entry) => { + counts[entry.source] = (counts[entry.source] ?? 0) + 1; + return counts; +}, {}); +assert( + sourceCounts.existing === 10, + `expected 10 existing families, found ${sourceCounts.existing ?? 0}`, +); +assert( + sourceCounts.jlcpcb === 689, + `expected 689 JLCPCB families, found ${sourceCounts.jlcpcb ?? 0}`, +); +assert( + sourceCounts["ti-datasheet"] === 111, + `expected 111 TI-datasheet families, found ${sourceCounts["ti-datasheet"] ?? 0}`, +); + +const footprintSelections = (await Bun.file( + footprintSelectionsPath, +).json()) as { + targetCount: number; + coverage: { + targetEntries: number; + sourceReadyEntries: number; + unavailableEntries: number; + }; + targets: Record< + string, + { + status: "source-ready" | "unavailable"; + drawingId?: string; + footprintSource?: "exact-jlc-drawing" | "official-ti-drawing"; + provenanceComment?: string; + } + >; +}; +assert( + footprintSelections.targetCount === 111, + "footprint catalog targetCount is not 111", +); +assert( + footprintSelections.coverage.targetEntries === 111 && + Object.keys(footprintSelections.targets).length === 111, + "footprint catalog does not cover all 111 TI-datasheet targets", +); +assert( + footprintSelections.coverage.sourceReadyEntries === 111 && + footprintSelections.coverage.unavailableEntries === 0 && + Object.values(footprintSelections.targets).every( + (target) => target.status === "source-ready", + ), + "one or more TI-datasheet footprints are unavailable", +); +const footprintSourceCounts = Object.values(footprintSelections.targets).reduce< + Record +>((counts, target) => { + const source = target.footprintSource ?? "missing"; + counts[source] = (counts[source] ?? 0) + 1; + return counts; +}, {}); +assert( + footprintSourceCounts["exact-jlc-drawing"] === 67 && + footprintSourceCounts["official-ti-drawing"] === 44, + `unexpected TI-datasheet footprint sources: ${JSON.stringify(footprintSourceCounts)}`, +); +for (const target of Object.values(footprintSelections.targets)) { + assert( + Boolean( + target.drawingId && target.provenanceComment?.includes(target.drawingId), + ), + `footprint ${target.drawingId ?? "unknown"}: missing exact-drawing provenance`, + ); + if (target.footprintSource === "exact-jlc-drawing") { + assert( + /JLCPCB C\d+/.test(target.provenanceComment ?? ""), + `footprint ${target.drawingId}: missing JLCPCB donor number`, + ); + } +} + +const materializationReport = (await Bun.file( + materializationReportPath, +).json()) as { + summary: { + targetEntries: number; + readyEntries: number; + blockedEntries: number; + }; +}; +assert( + materializationReport.summary.targetEntries === 111 && + materializationReport.summary.readyEntries === 111 && + materializationReport.summary.blockedEntries === 0, + "TI-datasheet materialization report contains blockers", +); + +const pinoutCache = (await Bun.file(pinoutCachePath).json()) as Record< + string, + { + catalogSource: "jlcpcb" | "ti-datasheet"; + status: "ok" | "unavailable"; + } +>; +const pinoutEntries = Object.values(pinoutCache); +assert( + pinoutEntries.length === 179, + `expected 179 official pinout records, found ${pinoutEntries.length}`, +); +assert( + pinoutEntries.filter((entry) => entry.catalogSource === "ti-datasheet") + .length === 111, + "official pinout cache does not cover all 111 TI-datasheet components", +); +assert( + pinoutEntries.filter((entry) => entry.catalogSource === "jlcpcb").length === + 68, + "official pinout cache does not cover all 68 physical-label JLCPCB components", +); +assert( + pinoutEntries.every((entry) => entry.status === "ok"), + "one or more official pinout records are unavailable", +); + +const generatedExports = await Bun.file(generatedExportsPath).text(); +const chipIndex = await Bun.file(chipIndexPath).text(); +const rootIndex = await Bun.file(rootIndexPath).text(); + +assert( + chipIndex.includes('export * from "./ti-sysblocks-components.tsx";'), + "lib/chips/index.tsx does not re-export the sysblocks catalog", +); +assert( + rootIndex.includes("TiSysblocksChipComponents") && + rootIndex.includes("...TiSysblocksChipComponents"), + "TiChipComponents does not include the sysblocks catalog", +); + +for (const entry of catalog) { + assert( + entry.sourceRepository === "https://github.com/tscircuit/ti-sysblocks", + `${entry.family}: missing source-repository provenance`, + ); + assert( + entry.datasheetUrl.startsWith("https://www.ti.com/"), + `${entry.family}: missing official TI datasheet URL`, + ); + assert( + generatedExports.includes(` ${entry.exportName},`), + `${entry.family}: missing from TiSysblocksChipComponents`, + ); + + const componentName = entry.componentExportName ?? entry.exportName; + const componentPath = join(chipDirectory, `${componentName}.circuit.tsx`); + assert( + await Bun.file(componentPath).exists(), + `${entry.family}: missing ${componentPath}`, + ); + + if (entry.source === "existing") continue; + + assert( + Boolean(entry.manufacturerPartNumber), + `${entry.family}: missing canonical MPN`, + ); + assert( + Boolean(entry.packageCode), + `${entry.family}: missing TI package code`, + ); + assert( + Number.isInteger(entry.pinCount), + `${entry.family}: missing TI pin count`, + ); + + const component = await Bun.file(componentPath).text(); + assert(component.includes(" JSON.parse(`"${match[1]}"`) as string, + ); + const invalidAliases = aliases.filter( + (alias) => !/^[A-Za-z0-9_]+$/.test(alias), + ); + assert( + invalidAliases.length === 0, + `${entry.family}: invalid tscircuit pin aliases ${invalidAliases.join(", ")}`, + ); + } + + if (entry.source === "jlcpcb") { + assert( + Boolean(entry.lcscPartNumber), + `${entry.family}: missing JLCPCB part number`, + ); + assert( + component.includes(entry.lcscPartNumber!), + `${entry.family}: JLCPCB part number does not match the catalog`, + ); + } else { + assert( + component.includes("// Footprint provenance:"), + `${entry.family}: official footprint provenance is missing`, + ); + } +} + +if (failures.length > 0) { + console.error(failures.join("\n")); + process.exit(1); +} + +console.log({ families: catalog.length, sourceCounts }); From 658a5d3311597cf63909ec8fb2f9c8a1757aaacd Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 14:53:36 -0700 Subject: [PATCH 2/8] Keep cloud package builds within timeout --- tscircuit.config.json | 1 + 1 file changed, 1 insertion(+) diff --git a/tscircuit.config.json b/tscircuit.config.json index 74cb6286..75474b23 100644 --- a/tscircuit.config.json +++ b/tscircuit.config.json @@ -1,6 +1,7 @@ { "$schema": "https://cdn.jsdelivr.net/npm/@tscircuit/cli/types/tscircuit.config.schema.json", "mainEntrypoint": "index.ts", + "buildCommand": "bunx tscircuit build --concurrency 4 --transpile --ignore-errors", "build": { "workerTimeoutMs": 10000000 } From b67a746db655f3874b3ff84014e6c2363f415cd6 Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 15:23:16 -0700 Subject: [PATCH 3/8] Avoid monolithic declaration builds in cloud --- tscircuit.config.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tscircuit.config.json b/tscircuit.config.json index 75474b23..082a3cc3 100644 --- a/tscircuit.config.json +++ b/tscircuit.config.json @@ -1,7 +1,7 @@ { "$schema": "https://cdn.jsdelivr.net/npm/@tscircuit/cli/types/tscircuit.config.schema.json", "mainEntrypoint": "index.ts", - "buildCommand": "bunx tscircuit build --concurrency 4 --transpile --ignore-errors", + "buildCommand": "bunx tscircuit build --concurrency 4 --ignore-errors && bun run typecheck", "build": { "workerTimeoutMs": 10000000 } From 76c305ed96946d59fed0d6da606d976655a86708 Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 15:47:34 -0700 Subject: [PATCH 4/8] Keep default package build configuration --- tscircuit.config.json | 1 - 1 file changed, 1 deletion(-) diff --git a/tscircuit.config.json b/tscircuit.config.json index 082a3cc3..74cb6286 100644 --- a/tscircuit.config.json +++ b/tscircuit.config.json @@ -1,7 +1,6 @@ { "$schema": "https://cdn.jsdelivr.net/npm/@tscircuit/cli/types/tscircuit.config.schema.json", "mainEntrypoint": "index.ts", - "buildCommand": "bunx tscircuit build --concurrency 4 --ignore-errors && bun run typecheck", "build": { "workerTimeoutMs": 10000000 } From 304cf46f5e9721a13d7a76d6a267dd5f4a50ffbe Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 16:45:38 -0700 Subject: [PATCH 5/8] Align chip modules and add TI reference examples --- .gitattributes | 1 + README.md | 30 +- .../LM358B_InvertingAmplifier.circuit.tsx | 259 + .../OPA371D_LowSideCurrentSense.circuit.tsx | 186 + .../TPS7A20_TypicalApplication.circuit.tsx | 231 + ...CC2564C_TAS2505.circuit-schematic.snap.svg | 870 ++- ...ertingAmplifier.circuit-schematic.snap.svg | 12 + ...ideCurrentSense.circuit-schematic.snap.svg | 12 + ...icalApplication.circuit-schematic.snap.svg | 12 + examples/ti-reference-examples.json | 287 + ...PB.circuit.tsx => ADC101C021CIMM_NOPB.tsx} | 0 ...B.circuit.tsx => ADC128S022CIMTX_NOPB.tsx} | 0 ...15LIDGSR.circuit.tsx => ADS1015LIDGSR.tsx} | 0 ...1114IDGST.circuit.tsx => ADS1114IDGST.tsx} | 0 ...1118IDGSR.circuit.tsx => ADS1118IDGSR.tsx} | 0 ...08IRHBT.circuit.tsx => ADS114S08IRHBT.tsx} | 0 ...14IRTER.circuit.tsx => ADS122S14IRTER.tsx} | 0 ...08IRHBT.circuit.tsx => ADS124S08IRHBT.tsx} | 0 ...03IRUKR.circuit.tsx => ADS131M03IRUKR.tsx} | 0 ...7042IDCUT.circuit.tsx => ADS7042IDCUT.tsx} | 0 ...7142IRUGR.circuit.tsx => ADS7142IRUGR.tsx} | 0 ...7885SDBVT.circuit.tsx => ADS7885SDBVT.tsx} | 0 ...8885IDGSR.circuit.tsx => ADS8885IDGSR.tsx} | 0 ...{AM26C31IDR.circuit.tsx => AM26C31IDR.tsx} | 0 ...{AM26C32CDR.circuit.tsx => AM26C32CDR.tsx} | 0 ...2BZCZ100.circuit.tsx => AM3352BZCZ100.tsx} | 0 ...7BZCZA80.circuit.tsx => AM3357BZCZA80.tsx} | 0 ...6BZDND80.circuit.tsx => AM4376BZDND80.tsx} | 0 ...ZDND100.circuit.tsx => AM4378BZDND100.tsx} | 0 ...ZDNA100.circuit.tsx => AM4379BZDNA100.tsx} | 0 ...726BABCXA.circuit.tsx => AM5726BABCXA.tsx} | 0 ...IAMBR.circuit.tsx => AM62A32AOMHIAMBR.tsx} | 0 ...AAMBR.circuit.tsx => AM62A74AUMHAAMBR.tsx} | 0 .../{AM62L32.circuit.tsx => AM62L32.tsx} | 2 +- ...AANBR.circuit.tsx => AM62L32BEGHAANBR.tsx} | 0 ...AANBR.circuit.tsx => AM62L32BOGHAANBR.tsx} | 0 ...FHAALV.circuit.tsx => AM6442BSEFHAALV.tsx} | 0 ...IAMWR.circuit.tsx => AM67A74AKGHIAMWR.tsx} | 0 ...0300DDWVR.circuit.tsx => AMC0300DDWVR.tsx} | 0 ...DWVRQ1.circuit.tsx => AMC0311DQDWVRQ1.tsx} | 0 ...AQDWVQ1.circuit.tsx => AMC1211AQDWVQ1.tsx} | 0 ...QDWVRQ1.circuit.tsx => AMC1351QDWVRQ1.tsx} | 0 ...IBQDBZR.circuit.tsx => ATL431LIBQDBZR.tsx} | 0 ...4DGGR.circuit.tsx => A_74ACT16244DGGR.tsx} | 0 ...RG4.circuit.tsx => A_74LVC1G332DBVRG4.tsx} | 0 .../{BQ24072.circuit.tsx => BQ24072.tsx} | 2 +- ...Q24072RGTR.circuit.tsx => BQ24072RGTR.tsx} | 0 .../{BQ24073.circuit.tsx => BQ24073.tsx} | 2 +- ...Q24073RGTR.circuit.tsx => BQ24073RGTR.tsx} | 2 +- .../{BQ24074.circuit.tsx => BQ24074.tsx} | 2 +- ...Q24074RGTR.circuit.tsx => BQ24074RGTR.tsx} | 0 ...Q24600RVAR.circuit.tsx => BQ24600RVAR.tsx} | 0 ...4725ARGRR.circuit.tsx => BQ24725ARGRR.tsx} | 0 ...4780SRUYR.circuit.tsx => BQ24780SRUYR.tsx} | 0 ...Q25185DLHR.circuit.tsx => BQ25185DLHR.tsx} | 0 ...Q25188YBGR.circuit.tsx => BQ25188YBGR.tsx} | 0 ...Q25622RYKR.circuit.tsx => BQ25622RYKR.tsx} | 0 ...Q25630YBGR.circuit.tsx => BQ25630YBGR.tsx} | 0 ...Q25638YBGR.circuit.tsx => BQ25638YBGR.tsx} | 0 ...Q25731RSNR.circuit.tsx => BQ25731RSNR.tsx} | 0 ...Q25756RRVR.circuit.tsx => BQ25756RRVR.tsx} | 0 ...Q25887RGER.circuit.tsx => BQ25887RGER.tsx} | 0 .../{BQ25895.circuit.tsx => BQ25895.tsx} | 2 +- ...Q25895RTWR.circuit.tsx => BQ25895RTWR.tsx} | 0 ...Q27426YZFR.circuit.tsx => BQ27426YZFR.tsx} | 0 ...ZR_G1B.circuit.tsx => BQ27441DRZR_G1B.tsx} | 0 .../{BQ27441G1.circuit.tsx => BQ27441G1.tsx} | 2 +- .../{BQ32000DR.circuit.tsx => BQ32000DR.tsx} | 0 .../{BQ32002.circuit.tsx => BQ32002.tsx} | 0 ...Q51003YFPR.circuit.tsx => BQ51003YFPR.tsx} | 0 ...1013CRHLR.circuit.tsx => BQ51013CRHLR.tsx} | 0 ...{CC1101RGPR.circuit.tsx => CC1101RGPR.tsx} | 0 ...{CC1120RHBR.circuit.tsx => CC1120RHBR.tsx} | 0 ...{CC1125RHBR.circuit.tsx => CC1125RHBR.tsx} | 0 ...{CC113LRGPR.circuit.tsx => CC113LRGPR.tsx} | 0 ...128RHBR.circuit.tsx => CC1310F128RHBR.tsx} | 0 ...T0RKPR.circuit.tsx => CC1311R31T0RKPR.tsx} | 0 ...SIPMOTR.circuit.tsx => CC1312PSIPMOTR.tsx} | 0 ...0RGZR.circuit.tsx => CC1314R106T0RGZR.tsx} | 0 ...0RSKR.circuit.tsx => CC1354P106T0RSKR.tsx} | 0 ...N0RGER.circuit.tsx => CC2340R21N0RGER.tsx} | 0 .../{CC2340R5.circuit.tsx => CC2340R5.tsx} | 0 ...HAR.circuit.tsx => CC2340R5MODAN0MHAR.tsx} | 0 ...{CC2500RGPR.circuit.tsx => CC2500RGPR.tsx} | 0 ...128RHAR.circuit.tsx => CC2530F128RHAR.tsx} | 0 ...128RHAR.circuit.tsx => CC2531F128RHAR.tsx} | 0 ...256RHAR.circuit.tsx => CC2540F256RHAR.tsx} | 0 .../{CC2564C.circuit.tsx => CC2564C.tsx} | 0 ...{CC2592RGVR.circuit.tsx => CC2592RGVR.tsx} | 0 ...128RGZR.circuit.tsx => CC2620F128RGZR.tsx} | 0 ...B1FRGZR.circuit.tsx => CC2652RB1FRGZR.tsx} | 0 .../{CC2745R10.circuit.tsx => CC2745R10.tsx} | 2 +- ...RQ1.circuit.tsx => CC2745R10E0WRHARQ1.tsx} | 0 ...RHAR.circuit.tsx => CC2755P105E0WRHAR.tsx} | 0 ...RHAR.circuit.tsx => CC2755P207E0WRHAR.tsx} | 0 ...OBT.circuit.tsx => CC3100MODR11MAMOBT.tsx} | 0 ...11MRGCR.circuit.tsx => CC3100R11MRGCR.tsx} | 0 ...OBR.circuit.tsx => CC3200MODR1M2AMOBR.tsx} | 0 ...0R1M2RGC.circuit.tsx => CC3200R1M2RGC.tsx} | 0 ...MONR.circuit.tsx => CC3220MODASM2MONR.tsx} | 0 .../{CC3235SF.circuit.tsx => CC3235SF.tsx} | 2 +- ...F12RGKR.circuit.tsx => CC3235SF12RGKR.tsx} | 0 ...MOZR.circuit.tsx => CC3300MODENIAMOZR.tsx} | 0 ...MOZR.circuit.tsx => CC3301MODENIAMOZR.tsx} | 0 ...MOZR.circuit.tsx => CC3350MODENIAMOZR.tsx} | 0 ...MOZR.circuit.tsx => CC3351MODENIAMOZR.tsx} | 0 ...NJARSHR.circuit.tsx => CC3501ENJARSHR.tsx} | 0 ...NJARSHR.circuit.tsx => CC3551ENJARSHR.tsx} | 0 ...D4069UBM96.circuit.tsx => CD4069UBM96.tsx} | 0 ...067SM96.circuit.tsx => CD74HC4067SM96.tsx} | 0 ...4HCT21M96.circuit.tsx => CD74HCT21M96.tsx} | 0 ...4HCT4067M.circuit.tsx => CD74HCT4067M.tsx} | 0 ...2002RHBT.circuit.tsx => CDCE62002RHBT.tsx} | 0 ...{CDCE913PWR.circuit.tsx => CDCE913PWR.tsx} | 0 ...C1106PWR.circuit.tsx => CDCLVC1106PWR.tsx} | 0 ...M9102RHBR.circuit.tsx => CDCM9102RHBR.tsx} | 0 ...SD13381F4T.circuit.tsx => CSD13381F4T.tsx} | 0 ...SD17382F4T.circuit.tsx => CSD17382F4T.tsx} | 0 ...SD17483F4T.circuit.tsx => CSD17483F4T.tsx} | 0 ...{CSD17484F4.circuit.tsx => CSD17484F4.tsx} | 0 ...{CSD17571Q2.circuit.tsx => CSD17571Q2.tsx} | 0 ...SD17573Q5B.circuit.tsx => CSD17573Q5B.tsx} | 0 ...17577Q3AT.circuit.tsx => CSD17577Q3AT.tsx} | 0 ...SD17578Q5A.circuit.tsx => CSD17578Q5A.tsx} | 0 ...SD17579Q3A.circuit.tsx => CSD17579Q3A.tsx} | 0 ...17581Q3AT.circuit.tsx => CSD17581Q3AT.tsx} | 0 ...SD18510Q5B.circuit.tsx => CSD18510Q5B.tsx} | 0 ...SD18513Q5A.circuit.tsx => CSD18513Q5A.tsx} | 0 ...SD18514Q5A.circuit.tsx => CSD18514Q5A.tsx} | 0 ...18531Q5AT.circuit.tsx => CSD18531Q5AT.tsx} | 0 ...SD18532Q5B.circuit.tsx => CSD18532Q5B.tsx} | 0 ...SD18534Q5A.circuit.tsx => CSD18534Q5A.tsx} | 0 ...18540Q5BT.circuit.tsx => CSD18540Q5BT.tsx} | 0 ...SD18541F5T.circuit.tsx => CSD18541F5T.tsx} | 0 ...18543Q3AT.circuit.tsx => CSD18543Q3AT.tsx} | 0 ...SD19501KCS.circuit.tsx => CSD19501KCS.tsx} | 0 ...SD19502Q5B.circuit.tsx => CSD19502Q5B.tsx} | 0 ...19531Q5AT.circuit.tsx => CSD19531Q5AT.tsx} | 0 ...SD19534Q5A.circuit.tsx => CSD19534Q5A.tsx} | 0 ...SD19535KTT.circuit.tsx => CSD19535KTT.tsx} | 0 ...SD19537Q3T.circuit.tsx => CSD19537Q3T.tsx} | 0 ...SD19538Q2T.circuit.tsx => CSD19538Q2T.tsx} | 0 ...{CSD25481F4.circuit.tsx => CSD25481F4.tsx} | 0 ...SD87502Q2T.circuit.tsx => CSD87502Q2T.tsx} | 0 ...SD88539NDT.circuit.tsx => CSD88539NDT.tsx} | 0 ...stPort.circuit.tsx => CoaxialTestPort.tsx} | 0 ...PB.circuit.tsx => DAC121S101CIMK_NOPB.tsx} | 0 ...43701DSGR.circuit.tsx => DAC43701DSGR.tsx} | 0 ...53202RTER.circuit.tsx => DAC53202RTER.tsx} | 0 ...53204YBHR.circuit.tsx => DAC53204YBHR.tsx} | 0 ...63001RTER.circuit.tsx => DAC63001RTER.tsx} | 0 ...80502DRXR.circuit.tsx => DAC80502DRXR.tsx} | 0 ...8411IDCKT.circuit.tsx => DAC8411IDCKT.tsx} | 0 ...8564IAPWR.circuit.tsx => DAC8564IAPWR.tsx} | 0 ...010505SN7.circuit.tsx => DCH010505SN7.tsx} | 0 ...LP4500AFQD.circuit.tsx => DLP4500AFQD.tsx} | 0 ...0CUSD100.circuit.tsx => DM3730CUSD100.tsx} | 0 ...3822HRHBT.circuit.tsx => DP83822HRHBT.tsx} | 0 ...3822IRHBR.circuit.tsx => DP83822IRHBR.tsx} | 0 ...3825IRMQT.circuit.tsx => DP83825IRMQT.tsx} | 0 ...26AERHBR.circuit.tsx => DP83826AERHBR.tsx} | 0 ...26AIRHBR.circuit.tsx => DP83826AIRHBR.tsx} | 0 ...3826IRHBR.circuit.tsx => DP83826IRHBR.tsx} | 0 ...67CRRGZR.circuit.tsx => DP83867CRRGZR.tsx} | 0 ...3867ERGZR.circuit.tsx => DP83867ERGZR.tsx} | 0 ...67IRRGZT.circuit.tsx => DP83867IRRGZT.tsx} | 0 ...67ISRGZT.circuit.tsx => DP83867ISRGZT.tsx} | 0 ...{DRV110APWR.circuit.tsx => DRV110APWR.tsx} | 0 ...RV2605YZFR.circuit.tsx => DRV2605YZFR.tsx} | 0 ...RV2667RGPR.circuit.tsx => DRV2667RGPR.tsx} | 0 ...EPAPRQ1.circuit.tsx => DRV3256EPAPRQ1.tsx} | 0 ...PGMQ1.circuit.tsx => DRV5013ADELPGMQ1.tsx} | 0 ...13AGQLPG.circuit.tsx => DRV5013AGQLPG.tsx} | 0 ...VAKRQ1.circuit.tsx => DRV8263HQVAKRQ1.tsx} | 0 ...PHPRQ1.circuit.tsx => DRV83053QPHPRQ1.tsx} | 0 ...QRGZRQ1.circuit.tsx => DRV8363QRGZRQ1.tsx} | 0 .../{DRV8833.circuit.tsx => DRV8833.tsx} | 0 .../{DRV8876.circuit.tsx => DRV8876.tsx} | 0 ...OPB.circuit.tsx => DS90LT012ATMF_NOPB.tsx} | 0 ...OPB.circuit.tsx => DS90LV011ATMF_NOPB.tsx} | 0 ...OPB.circuit.tsx => DS90LV047ATMX_NOPB.tsx} | 0 ...OPB.circuit.tsx => DS90LV048ATMX_NOPB.tsx} | 0 ...{ESD122DMXR.circuit.tsx => ESD122DMXR.tsx} | 0 ...{ESD204DQAR.circuit.tsx => ESD204DQAR.tsx} | 0 ...{ESD321DPYR.circuit.tsx => ESD321DPYR.tsx} | 0 ...{ESD351DPYR.circuit.tsx => ESD351DPYR.tsx} | 0 ...{ESD401DPYR.circuit.tsx => ESD401DPYR.tsx} | 0 ...{ESD751DYAR.circuit.tsx => ESD751DYAR.tsx} | 0 ...SDS311DYFR.circuit.tsx => ESDS311DYFR.tsx} | 0 ...2800132PTR.circuit.tsx => F2800132PTR.tsx} | 0 ...2800133PMR.circuit.tsx => F2800133PMR.tsx} | 0 ...280025PNSR.circuit.tsx => F280025PNSR.tsx} | 0 ...0039CSPMR.circuit.tsx => F280039CSPMR.tsx} | 0 ...0040CPMQR.circuit.tsx => F280040CPMQR.tsx} | 0 ...280040PMQR.circuit.tsx => F280040PMQR.tsx} | 0 ...0041CPZQR.circuit.tsx => F280041CPZQR.tsx} | 0 ...280041PZQR.circuit.tsx => F280041PZQR.tsx} | 0 ...0049CPZQR.circuit.tsx => F280049CPZQR.tsx} | 0 ...49CRSHSR.circuit.tsx => F280049CRSHSR.tsx} | 0 ...{F280049PZQ.circuit.tsx => F280049PZQ.tsx} | 0 ...20SCTPTR.circuit.tsx => F28E120SCTPTR.tsx} | 0 ...C1RFPQ.circuit.tsx => F28M35H52C1RFPQ.tsx} | 0 ...50SJ9PZR.circuit.tsx => F28P550SJ9PZR.tsx} | 0 ...DK6PZPR.circuit.tsx => F28P650DK6PZPR.tsx} | 0 ...DC2212DNTR.circuit.tsx => FDC2212DNTR.tsx} | 0 ...3220RNHT.circuit.tsx => HD3SS3220RNHT.tsx} | 0 .../{HDC2080.circuit.tsx => HDC2080.tsx} | 2 +- ...DC2080DMBR.circuit.tsx => HDC2080DMBR.tsx} | 0 .../{HDC3020.circuit.tsx => HDC3020.tsx} | 2 +- ...DC3020DEFR.circuit.tsx => HDC3020DEFR.tsx} | 0 ...QDEHRQ1.circuit.tsx => HDC3021QDEHRQ1.tsx} | 0 .../{HDC3022.circuit.tsx => HDC3022.tsx} | 2 +- ...DC3022DEJR.circuit.tsx => HDC3022DEJR.tsx} | 0 ...{Header2x10.circuit.tsx => Header2x10.tsx} | 0 ...NA138NA_3K.circuit.tsx => INA138NA_3K.tsx} | 0 ...138QPWRQ1.circuit.tsx => INA138QPWRQ1.tsx} | 0 ...NA139NA_3K.circuit.tsx => INA139NA_3K.tsx} | 0 ...NA169NA_3K.circuit.tsx => INA169NA_3K.tsx} | 0 ...1A2IDBVR.circuit.tsx => INA181A2IDBVR.tsx} | 0 ...6A2IDDFR.circuit.tsx => INA186A2IDDFR.tsx} | 0 .../{INA188IDR.circuit.tsx => INA188IDR.tsx} | 0 ...199A3DCKR.circuit.tsx => INA199A3DCKR.tsx} | 0 ...213BIDCKT.circuit.tsx => INA213BIDCKT.tsx} | 0 ...A2IDGSR.circuit.tsx => INA2181A2IDGSR.tsx} | 0 ...228AIDGSR.circuit.tsx => INA228AIDGSR.tsx} | 0 ...230AIRGTR.circuit.tsx => INA230AIRGTR.tsx} | 0 ...236AIYBJR.circuit.tsx => INA236AIYBJR.tsx} | 0 lib/chips/{INA237.circuit.tsx => INA237.tsx} | 2 +- ...QDGSRQ1.circuit.tsx => INA237AQDGSRQ1.tsx} | 0 ...{INA240A1DR.circuit.tsx => INA240A1DR.tsx} | 0 ...0A3QDRQ1.circuit.tsx => INA240A3QDRQ1.tsx} | 0 ...1A5IDDFR.circuit.tsx => INA241A5IDDFR.tsx} | 0 ...0A3IDCKT.circuit.tsx => INA280A3IDCKT.tsx} | 0 ...1A3IDBVR.circuit.tsx => INA281A3IDBVR.tsx} | 0 ...6A4IDDFR.circuit.tsx => INA296A4IDDFR.tsx} | 0 ...6B4IDDFR.circuit.tsx => INA296B4IDDFR.tsx} | 0 ...0A4IDGKR.circuit.tsx => INA310A4IDGKR.tsx} | 0 ...21AIRGVR.circuit.tsx => INA3221AIRGVR.tsx} | 0 .../{INA818IDR.circuit.tsx => INA818IDR.tsx} | 0 ...{INA826AIDR.circuit.tsx => INA826AIDR.tsx} | 0 ...{ISO1042DWR.circuit.tsx => ISO1042DWR.tsx} | 0 .../{ISO1044BD.circuit.tsx => ISO1044BD.tsx} | 0 ...{ISO1050DWR.circuit.tsx => ISO1050DWR.tsx} | 0 ...{ISO1176DWR.circuit.tsx => ISO1176DWR.tsx} | 0 ...SO1410BDWR.circuit.tsx => ISO1410BDWR.tsx} | 0 .../{ISO1541DR.circuit.tsx => ISO1541DR.tsx} | 0 ...{ISO3082DWR.circuit.tsx => ISO3082DWR.tsx} | 0 ...{ISO3088DWR.circuit.tsx => ISO3088DWR.tsx} | 0 ...{ISO5452DWR.circuit.tsx => ISO5452DWR.tsx} | 0 ...{ISO5851DWR.circuit.tsx => ISO5851DWR.tsx} | 0 .../{ISO6420DR.circuit.tsx => ISO6420DR.tsx} | 0 .../{ISO6421DR.circuit.tsx => ISO6421DR.tsx} | 0 ...SO6421DRQ1.circuit.tsx => ISO6421DRQ1.tsx} | 0 ...SO6431DBQR.circuit.tsx => ISO6431DBQR.tsx} | 0 ...SO6440DBQR.circuit.tsx => ISO6440DBQR.tsx} | 0 ...40DBQRQ1.circuit.tsx => ISO6440DBQRQ1.tsx} | 0 ...{ISO6441DWR.circuit.tsx => ISO6441DWR.tsx} | 0 ...SO6442DBQR.circuit.tsx => ISO6442DBQR.tsx} | 0 ...SO6521REUR.circuit.tsx => ISO6521REUR.tsx} | 0 ...SO7760DBQR.circuit.tsx => ISO7760DBQR.tsx} | 0 ...SO7841FDWW.circuit.tsx => ISO7841FDWW.tsx} | 0 ...{ISO7842DWR.circuit.tsx => ISO7842DWR.tsx} | 0 ...AAMFR.circuit.tsx => IWRL6432BDBAAMFR.tsx} | 0 ...AAMYR.circuit.tsx => IWRL6432BRQAAMYR.tsx} | 0 ...DC1312DNTR.circuit.tsx => LDC1312DNTR.tsx} | 0 ...DC1314RGHR.circuit.tsx => LDC1314RGHR.tsx} | 0 ...DC1612DNTR.circuit.tsx => LDC1612DNTR.tsx} | 0 ...DC1614RGHR.circuit.tsx => LDC1614RGHR.tsx} | 0 ...KVURQ1.circuit.tsx => LM111733QKVURQ1.tsx} | 0 ...X_NOPB.circuit.tsx => LM20242MHX_NOPB.tsx} | 0 ...IM7_NOPB.circuit.tsx => LM20CIM7_NOPB.tsx} | 0 lib/chips/{LM239N.circuit.tsx => LM239N.tsx} | 0 ...DRG4Q1.circuit.tsx => LM2901AVQDRG4Q1.tsx} | 0 ...{LM2902BIDR.circuit.tsx => LM2902BIDR.tsx} | 0 ...{LM2903BIDR.circuit.tsx => LM2903BIDR.tsx} | 0 .../{LM2903DR.circuit.tsx => LM2903DR.tsx} | 0 ...904BIDGKR.circuit.tsx => LM2904BIDGKR.tsx} | 0 ...21LVIDBVR.circuit.tsx => LM321LVIDBVR.tsx} | 0 ...{LM324BIPWR.circuit.tsx => LM324BIPWR.tsx} | 0 .../{LM339BIDR.circuit.tsx => LM339BIDR.tsx} | 0 ...{LM339LVPWR.circuit.tsx => LM339LVPWR.tsx} | 0 ...{LM358BIPWR.circuit.tsx => LM358BIPWR.tsx} | 0 ...M358LVIPWR.circuit.tsx => LM358LVIPWR.tsx} | 0 ...{LM3644YFFR.circuit.tsx => LM3644YFFR.tsx} | 0 ...NOPB.circuit.tsx => LM3880MF_1AC_NOPB.tsx} | 0 ...MX_NOPB.circuit.tsx => LM3881MMX_NOPB.tsx} | 0 .../{LM393ADR.circuit.tsx => LM393ADR.tsx} | 0 .../{LM393BIDR.circuit.tsx => LM393BIDR.tsx} | 0 .../{LM393PWR.circuit.tsx => LM393PWR.tsx} | 0 ...12IDBZR.circuit.tsx => LM4041A12IDBZR.tsx} | 0 ...041CIDCKR.circuit.tsx => LM4041CIDCKR.tsx} | 0 ...12EDBZR.circuit.tsx => LM4060A12EDBZR.tsx} | 0 ...2_NOPB.circuit.tsx => LM5020MM_2_NOPB.tsx} | 0 ...DX_NOPB.circuit.tsx => LM5033SDX_NOPB.tsx} | 0 ...1_NOPB.circuit.tsx => LM5050MK_1_NOPB.tsx} | 0 ...NOPB.circuit.tsx => LM5050Q1MK_1_NOPB.tsx} | 0 ...M_NOPB.circuit.tsx => LM5060Q1MM_NOPB.tsx} | 0 ...1_NOPB.circuit.tsx => LM5069MM_1_NOPB.tsx} | 0 ...MX_NOPB.circuit.tsx => LM5106MMX_NOPB.tsx} | 0 ...3QRGRRQ1.circuit.tsx => LM5123QRGRRQ1.tsx} | 0 ...M51551DSSR.circuit.tsx => LM51551DSSR.tsx} | 0 ...{LM5156DSSR.circuit.tsx => LM5156DSSR.tsx} | 0 ...{LM5163DDAR.circuit.tsx => LM5163DDAR.tsx} | 0 ...{LM5164DDAR.circuit.tsx => LM5164DDAR.tsx} | 0 ...DSXRQ1.circuit.tsx => LM536005QDSXRQ1.tsx} | 0 ...M62460RPHR.circuit.tsx => LM62460RPHR.tsx} | 0 ...IM3_NOPB.circuit.tsx => LM62CIM3_NOPB.tsx} | 0 ...QDGKRQ1.circuit.tsx => LM74610QDGKRQ1.tsx} | 0 ...4700QDRQ1.circuit.tsx => LM74700QDRQ1.tsx} | 0 ...QRGERQ1.circuit.tsx => LM74900QRGERQ1.tsx} | 0 ...NOPB.circuit.tsx => LM95235DIMMX_NOPB.tsx} | 0 ...MX_NOPB.circuit.tsx => LMC555CMX_NOPB.tsx} | 0 ...MG1210RVRR.circuit.tsx => LMG1210RVRR.tsx} | 0 ...50RWHR.circuit.tsx => LMG3410R150RWHR.tsx} | 0 ...70RWHR.circuit.tsx => LMG3411R070RWHR.tsx} | 0 ...MG3612REQR.circuit.tsx => LMG3612REQR.tsx} | 0 ...OPB.circuit.tsx => LMK04828BISQE_NOPB.tsx} | 0 ...1C1102PWR.circuit.tsx => LMK1C1102PWR.tsx} | 0 ...1C1103PWR.circuit.tsx => LMK1C1103PWR.tsx} | 0 ...1104DQFR.circuit.tsx => LMK1C1104DQFR.tsx} | 0 ...1C1108PWR.circuit.tsx => LMK1C1108PWR.tsx} | 0 ...ADLFR.circuit.tsx => LMK6DA10000ADLFR.tsx} | 0 ...NOPB.circuit.tsx => LMP8480MMX_T_NOPB.tsx} | 0 ...MA_NOPB.circuit.tsx => LMP8601MA_NOPB.tsx} | 0 ..._NOPB.circuit.tsx => LMP8601QMAX_NOPB.tsx} | 0 ...BRQ1.circuit.tsx => LMQ66430MA3RXBRQ1.tsx} | 0 ...0R5RXBR.circuit.tsx => LMQ66430R5RXBR.tsx} | 0 ...630CRNXR.circuit.tsx => LMR33630CRNXR.tsx} | 0 ...2F3RPER.circuit.tsx => LMR36502F3RPER.tsx} | 0 ...0FADDAR.circuit.tsx => LMR36520FADDAR.tsx} | 0 ...0R3RPER.circuit.tsx => LMR43610R3RPER.tsx} | 0 ...RQ1.circuit.tsx => LMR50410Y3FQDBVRQ1.tsx} | 0 ...610XDBVR.circuit.tsx => LMR51610XDBVR.tsx} | 0 ...5YFDDCR.circuit.tsx => LMR51635YFDDCR.tsx} | 0 .../{LMT01LPG.circuit.tsx => LMT01LPG.tsx} | 0 .../{LMT70YFQR.circuit.tsx => LMT70YFQR.tsx} | 0 .../{LMT84DCKR.circuit.tsx => LMT84DCKR.tsx} | 0 ...86QDCKRQ1.circuit.tsx => LMT86QDCKRQ1.tsx} | 0 .../{LMT88DCKR.circuit.tsx => LMT88DCKR.tsx} | 0 ...MV324AIPWR.circuit.tsx => LMV324AIPWR.tsx} | 0 ...5X_NOPB.circuit.tsx => LMV331M5X_NOPB.tsx} | 0 ...IZ_NOPB.circuit.tsx => LMV431AIZ_NOPB.tsx} | 0 ..._NOPB.circuit.tsx => LMV431BIMFX_NOPB.tsx} | 0 ...X_NOPB.circuit.tsx => LMV431CM5X_NOPB.tsx} | 0 ...B.circuit.tsx => LP2980AIM5X_3_3_NOPB.tsx} | 0 ...PB.circuit.tsx => LP2985AIM5_3_3_NOPB.tsx} | 0 ...AX_NOPB.circuit.tsx => LP2998MAX_NOPB.tsx} | 0 .../{LP5009PWR.circuit.tsx => LP5009PWR.tsx} | 0 ...{LP5036RJVR.circuit.tsx => LP5036RJVR.tsx} | 0 ...P5813AYBHR.circuit.tsx => LP5813AYBHR.tsx} | 0 ...{LPV821DBVR.circuit.tsx => LPV821DBVR.tsx} | 0 ...SF0108DGSR.circuit.tsx => LSF0108DGSR.tsx} | 0 ...AX3221CPWR.circuit.tsx => MAX3221CPWR.tsx} | 0 ...3221ECDBR.circuit.tsx => MAX3221ECDBR.tsx} | 0 ...SP430F5229.circuit.tsx => MSP430F5229.tsx} | 2 +- ...IRGCR.circuit.tsx => MSP430F5229IRGCR.tsx} | 0 ...AIPNR.circuit.tsx => MSP430F5437AIPNR.tsx} | 0 ...IZXHR.circuit.tsx => MSP430F5528IZXHR.tsx} | 0 ...5529IPN.circuit.tsx => MSP430F5529IPN.tsx} | 0 ...16R.circuit.tsx => MSP430FR2512IPW16R.tsx} | 0 ...RGER.circuit.tsx => MSP430FR2532IRGER.tsx} | 0 ...RHBR.circuit.tsx => MSP430FR2533IRHBR.tsx} | 0 ...YQWR.circuit.tsx => MSP430FR2632IYQWR.tsx} | 0 ...3IDAR.circuit.tsx => MSP430FR2633IDAR.tsx} | 0 ...RHBR.circuit.tsx => MSP430FR2672TRHBR.tsx} | 0 ...5TPTR.circuit.tsx => MSP430FR2675TPTR.tsx} | 0 ...3IPMR.circuit.tsx => MSP430FR4133IPMR.tsx} | 0 ...RGZR.circuit.tsx => MSP430FR5869IRGZR.tsx} | 0 ...RGZR.circuit.tsx => MSP430FR5969IRGZR.tsx} | 0 ...0G2230ID.circuit.tsx => MSP430G2230ID.tsx} | 0 ...3SDSGR.circuit.tsx => MSPM0C1103SDSGR.tsx} | 0 ...4SDDFR.circuit.tsx => MSPM0C1104SDDFR.tsx} | 0 ...7TRHBR.circuit.tsx => MSPM0G1107TRHBR.tsx} | 0 ...506SPMR.circuit.tsx => MSPM0G1506SPMR.tsx} | 0 ...518SPMR.circuit.tsx => MSPM0G1518SPMR.tsx} | 0 ...{MSPM0G3507.circuit.tsx => MSPM0G3507.tsx} | 2 +- ...507SPMR.circuit.tsx => MSPM0G3507SPMR.tsx} | 0 ...117SPMR.circuit.tsx => MSPM0G5117SPMR.tsx} | 0 ...5TDYYR.circuit.tsx => MSPM0L1105TDYYR.tsx} | 0 ...6SRHBR.circuit.tsx => MSPM0L1116SRHBR.tsx} | 0 ...5SDYYR.circuit.tsx => MSPM0L1305SDYYR.tsx} | 0 ...6SRGER.circuit.tsx => MSPM0L1306SRGER.tsx} | 0 ...S20R.circuit.tsx => MSPM0L1343TDGS20R.tsx} | 0 ...228SPTR.circuit.tsx => MSPM0L2228SPTR.tsx} | 0 .../{MSPM33C3x.circuit.tsx => MSPM33C3x.tsx} | 0 .../{NA555DR.circuit.tsx => NA555DR.tsx} | 0 ...53QDCARQ1.circuit.tsx => O3853QDCARQ1.tsx} | 0 ...PA197IDBVT.circuit.tsx => OPA197IDBVT.tsx} | 0 ...88AIDGKR.circuit.tsx => OPA2188AIDGKR.tsx} | 0 .../{OPA2197ID.circuit.tsx => OPA2197ID.tsx} | 0 ...37UA_2K5.circuit.tsx => OPA2237UA_2K5.tsx} | 0 ...{OPA2310IDR.circuit.tsx => OPA2310IDR.tsx} | 0 ...40UA_2K5.circuit.tsx => OPA2340UA_2K5.tsx} | 0 ...65AQDRQ1.circuit.tsx => OPA2365AQDRQ1.tsx} | 0 ...QDGKRQ1.circuit.tsx => OPA2607QDGKRQ1.tsx} | 0 ...QDGKRQ1.circuit.tsx => OPA2836QDGKRQ1.tsx} | 0 ...PA310IDCKR.circuit.tsx => OPA310IDCKR.tsx} | 0 ...0SAIDBVR.circuit.tsx => OPA320SAIDBVR.tsx} | 0 ...{OPA333AIDR.circuit.tsx => OPA333AIDR.tsx} | 0 ...350UA_2K5.circuit.tsx => OPA350UA_2K5.tsx} | 0 ...{OPA365AIDR.circuit.tsx => OPA365AIDR.tsx} | 0 ...QDBVRQ1.circuit.tsx => OPA365AQDBVRQ1.tsx} | 0 ...PA371DDBVR.circuit.tsx => OPA371DDBVR.tsx} | 0 ...376AIDBVR.circuit.tsx => OPA376AIDBVR.tsx} | 0 ...{OPA4192IDR.circuit.tsx => OPA4192IDR.tsx} | 0 ...PA4206APWR.circuit.tsx => OPA4206APWR.tsx} | 0 ...50EA_250.circuit.tsx => OPA4350EA_250.tsx} | 0 ...QDYYRQ1.circuit.tsx => OPA4991QDYYRQ1.tsx} | 0 ...7QDBVRQ1.circuit.tsx => OPA607QDBVRQ1.tsx} | 0 ...PA990IDBVR.circuit.tsx => OPA990IDBVR.tsx} | 0 ...PT3002DNPR.circuit.tsx => OPT3002DNPR.tsx} | 0 ...PT3004DNPR.circuit.tsx => OPT3004DNPR.tsx} | 0 ...PT4001YMNR.circuit.tsx => OPT4001YMNR.tsx} | 0 ...al4.circuit.tsx => OscillatorCrystal4.tsx} | 0 ...{P82B96DGKR.circuit.tsx => P82B96DGKR.tsx} | 0 ...CA9306DCUT.circuit.tsx => PCA9306DCUT.tsx} | 0 ...TH08080WAH.circuit.tsx => PTH08080WAH.tsx} | 0 ...1DRBRQ1.circuit.tsx => PTLIN821DRBRQ1.tsx} | 0 ...30AIDDCT.circuit.tsx => REF1930AIDDCT.tsx} | 0 ...2125IDBVR.circuit.tsx => REF2125IDBVR.tsx} | 0 ...EAIDBZR.circuit.tsx => REF3016EAIDBZR.tsx} | 0 ...25AIDBZR.circuit.tsx => REF3325AIDBZR.tsx} | 0 ...0HCPWR.circuit.tsx => RF430CL330HCPWR.tsx} | 0 ...{SN6501DBVR.circuit.tsx => SN6501DBVR.tsx} | 0 ...N6505BDBVT.circuit.tsx => SN6505BDBVT.tsx} | 0 ...N65HVD24DR.circuit.tsx => SN65HVD24DR.tsx} | 0 ...3082EDR.circuit.tsx => SN65HVD3082EDR.tsx} | 0 ...3088EDR.circuit.tsx => SN65HVD3088EDR.tsx} | 0 ...N65HVD32DR.circuit.tsx => SN65HVD32DR.tsx} | 0 ...N65HVD96DR.circuit.tsx => SN65HVD96DR.tsx} | 0 ...V1023ADB.circuit.tsx => SN65LV1023ADB.tsx} | 0 ...V1224BDB.circuit.tsx => SN65LV1224BDB.tsx} | 0 ...N74AC86PWR.circuit.tsx => SN74AC86PWR.tsx} | 0 ...N74AHC08DR.circuit.tsx => SN74AHC08DR.tsx} | 0 ...09DBVR.circuit.tsx => SN74AHC1G09DBVR.tsx} | 0 ...14DBVR.circuit.tsx => SN74AHC1G14DBVR.tsx} | 0 ...8DBVR.circuit.tsx => SN74AHCT1G08DBVR.tsx} | 0 ...T541DWR.circuit.tsx => SN74AHCT541DWR.tsx} | 0 ...4ALVC08DR.circuit.tsx => SN74ALVC08DR.tsx} | 0 ...14DBVR.circuit.tsx => SN74AUP1G14DBVR.tsx} | 0 ...17DBVR.circuit.tsx => SN74AUP1G17DBVR.tsx} | 0 ...74DQER.circuit.tsx => SN74AUP1G74DQER.tsx} | 0 ...79DCKR.circuit.tsx => SN74AUP1G79DCKR.tsx} | 0 ...08DQER.circuit.tsx => SN74AUP2G08DQER.tsx} | 0 ...14DSFR.circuit.tsx => SN74AUP2G14DSFR.tsx} | 0 ...17DCKR.circuit.tsx => SN74AUP2G17DCKR.tsx} | 0 ...0DCUR.circuit.tsx => SN74AUP2G240DCUR.tsx} | 0 ...14DCUR.circuit.tsx => SN74AUP3G14DCUR.tsx} | 0 ...245PWR.circuit.tsx => SN74AXC4T245PWR.tsx} | 0 ...5DGVR.circuit.tsx => SN74CB3Q3245DGVR.tsx} | 0 ...DGVR.circuit.tsx => SN74CBTLV3257DGVR.tsx} | 0 ...N74HC112DR.circuit.tsx => SN74HC112DR.tsx} | 0 ...{SN74HC14DR.circuit.tsx => SN74HC14DR.tsx} | 0 ...{SN74HC21DR.circuit.tsx => SN74HC21DR.tsx} | 0 ...N74HCS03DR.circuit.tsx => SN74HCS03DR.tsx} | 0 ...595BQBR.circuit.tsx => SN74HCS595BQBR.tsx} | 0 ...25DBVR.circuit.tsx => SN74LV1T125DBVR.tsx} | 0 ...T34DCKR.circuit.tsx => SN74LV1T34DCKR.tsx} | 0 ...2ADYYR.circuit.tsx => SN74LV4052ADYYR.tsx} | 0 ...V541ADBR.circuit.tsx => SN74LV541ADBR.tsx} | 0 ...VC08ANSR.circuit.tsx => SN74LVC08ANSR.tsx} | 0 ...125APWR.circuit.tsx => SN74LVC125APWR.tsx} | 0 ...14ADGVR.circuit.tsx => SN74LVC14ADGVR.tsx} | 0 ...04YZPR.circuit.tsx => SN74LVC1G04YZPR.tsx} | 0 ...07DCK3.circuit.tsx => SN74LVC1G07DCK3.tsx} | 0 ...08DCKR.circuit.tsx => SN74LVC1G08DCKR.tsx} | 0 ...11DBVR.circuit.tsx => SN74LVC1G11DBVR.tsx} | 0 ...5YZPR.circuit.tsx => SN74LVC1G125YZPR.tsx} | 0 ...6DBVT.circuit.tsx => SN74LVC1G126DBVT.tsx} | 0 ...14DRLR.circuit.tsx => SN74LVC1G14DRLR.tsx} | 0 ...17DBVT.circuit.tsx => SN74LVC1G17DBVT.tsx} | 0 ...YZPR.circuit.tsx => SN74LVC1G3157YZPR.tsx} | 0 ...32DRY2.circuit.tsx => SN74LVC1G32DRY2.tsx} | 0 ...74DCUR.circuit.tsx => SN74LVC1G74DCUR.tsx} | 0 ...86DCKR.circuit.tsx => SN74LVC1G86DCKR.tsx} | 0 ...4DBVR.circuit.tsx => SN74LVC1GU04DBVR.tsx} | 0 ...07YZPR.circuit.tsx => SN74LVC2G07YZPR.tsx} | 0 ...08DCUR.circuit.tsx => SN74LVC2G08DCUR.tsx} | 0 ...5DCU3.circuit.tsx => SN74LVC2G125DCU3.tsx} | 0 ...2DCTR.circuit.tsx => SN74LVC2G132DCTR.tsx} | 0 ...0DCTR.circuit.tsx => SN74LVC2G240DCTR.tsx} | 0 ...34YZPR.circuit.tsx => SN74LVC2G34YZPR.tsx} | 0 ...07DCUR.circuit.tsx => SN74LVC3G07DCUR.tsx} | 0 ...5112IRGER.circuit.tsx => TAC5112IRGER.tsx} | 0 .../{TAS2505.circuit.tsx => TAS2505.tsx} | 0 ...CA6408APWR.circuit.tsx => TCA6408APWR.tsx} | 0 ...{TCA9535DBR.circuit.tsx => TCA9535DBR.tsx} | 0 ...CA9803DGKR.circuit.tsx => TCA9803DGKR.tsx} | 0 ...RBRQ1.circuit.tsx => TCAN1044AVDRBRQ1.tsx} | 0 ...7AVDRQ1.circuit.tsx => TCAN1057AVDRQ1.tsx} | 0 .../{TFP401PZP.circuit.tsx => TFP401PZP.tsx} | 0 ...{THVD1410DR.circuit.tsx => THVD1410DR.tsx} | 0 ...D1424RGTR.circuit.tsx => THVD1424RGTR.tsx} | 0 ...D1450DGKR.circuit.tsx => THVD1450DGKR.tsx} | 0 ...D1451DRBR.circuit.tsx => THVD1451DRBR.tsx} | 0 ...HVD1452DGS.circuit.tsx => THVD1452DGS.tsx} | 0 ...{THVD1500DR.circuit.tsx => THVD1500DR.tsx} | 0 ...D2410DGKR.circuit.tsx => THVD2410DGKR.tsx} | 0 ...D2450DGKR.circuit.tsx => THVD2450DGKR.tsx} | 0 ...D8000DDFR.circuit.tsx => THVD8000DDFR.tsx} | 0 ...D8010DDFR.circuit.tsx => THVD8010DDFR.tsx} | 0 ...IOL221RGER.circuit.tsx => TIOL221RGER.tsx} | 0 ...S1015DMWT.circuit.tsx => TIOS1015DMWT.tsx} | 0 ...{TL072HIPWR.circuit.tsx => TL072HIPWR.tsx} | 0 ...L074HIDYYR.circuit.tsx => TL074HIDYYR.tsx} | 0 .../{TL082HIDR.circuit.tsx => TL082HIDR.tsx} | 0 ...L084HIDYYR.circuit.tsx => TL084HIDYYR.tsx} | 0 ...{TL331IDBVR.circuit.tsx => TL331IDBVR.tsx} | 0 ...L331LVDBVR.circuit.tsx => TL331LVDBVR.tsx} | 0 ...L391LVDBVR.circuit.tsx => TL391LVDBVR.tsx} | 0 ...{TL431QDBZR.circuit.tsx => TL431QDBZR.tsx} | 0 ...{TL7712ACDR.circuit.tsx => TL7712ACDR.tsx} | 0 ...2024IRUGR.circuit.tsx => TLA2024IRUGR.tsx} | 0 ...2528IRTER.circuit.tsx => TLA2528IRTER.tsx} | 0 ...431AIDBZR.circuit.tsx => TLA431AIDBZR.tsx} | 0 ...432AQDBZR.circuit.tsx => TLA432AQDBZR.tsx} | 0 .../{TLC555IDR.circuit.tsx => TLC555IDR.tsx} | 0 .../{TLC59116.circuit.tsx => TLC59116.tsx} | 2 +- ...59116IPWR.circuit.tsx => TLC59116IPWR.tsx} | 0 ...LC5916IPWR.circuit.tsx => TLC5916IPWR.tsx} | 0 ...59283RGER.circuit.tsx => TLC59283RGER.tsx} | 0 ...LC5971PWPR.circuit.tsx => TLC5971PWPR.tsx} | 0 ...LC6946RGER.circuit.tsx => TLC6946RGER.tsx} | 0 ...RSNRQ1.circuit.tsx => TLC69624QRSNRQ1.tsx} | 0 ...RSNRQ1.circuit.tsx => TLC69634QRSNRQ1.tsx} | 0 ...69699DRRR.circuit.tsx => TLC69699DRRR.tsx} | 0 ...{TLE2022CDR.circuit.tsx => TLE2022CDR.tsx} | 0 ...QDBVRQ1.circuit.tsx => TLV1811QDBVRQ1.tsx} | 0 .../{TLV1824DR.circuit.tsx => TLV1824DR.tsx} | 0 ...{TLV1842PWR.circuit.tsx => TLV1842PWR.tsx} | 0 ...LV3211DCKR.circuit.tsx => TLV3211DCKR.tsx} | 0 ...LV3212DGKR.circuit.tsx => TLV3212DGKR.tsx} | 0 ...LV333IDBVR.circuit.tsx => TLV333IDBVR.tsx} | 0 ...LV3512DGKR.circuit.tsx => TLV3512DGKR.tsx} | 0 ...3691IDCKT.circuit.tsx => TLV3691IDCKT.tsx} | 0 ...LV369IDCKR.circuit.tsx => TLV369IDCKR.tsx} | 0 ...LV376IDBVR.circuit.tsx => TLV376IDBVR.tsx} | 0 ...431AIDBVR.circuit.tsx => TLV431AIDBVR.tsx} | 0 ...431BQDBZR.circuit.tsx => TLV431BQDBZR.tsx} | 0 ...61047DDCR.circuit.tsx => TLV61047DDCR.tsx} | 0 ...LV7031DBVR.circuit.tsx => TLV7031DBVR.tsx} | 0 ...LV7042DGKR.circuit.tsx => TLV7042DGKR.tsx} | 0 ...70450DBVR.circuit.tsx => TLV70450DBVR.tsx} | 0 ...9A33DBVR.circuit.tsx => TLV709A33DBVR.tsx} | 0 ...218PDQNR.circuit.tsx => TLV74218PDQNR.tsx} | 0 ...533PDBVR.circuit.tsx => TLV75533PDBVR.tsx} | 0 .../{TLV755P.circuit.tsx => TLV755P.tsx} | 2 +- ...801PDBVR.circuit.tsx => TLV75801PDBVR.tsx} | 0 ...76133KVUR.circuit.tsx => TLV76133KVUR.tsx} | 0 ...133PDBVR.circuit.tsx => TLV77133PDBVR.tsx} | 0 ...330PDBVR.circuit.tsx => TLV77330PDBVR.tsx} | 0 ...A30DBZR.circuit.tsx => TLV803EA30DBZR.tsx} | 0 ...LV803SDBZR.circuit.tsx => TLV803SDBZR.tsx} | 0 ...LV8802DGKR.circuit.tsx => TLV8802DGKR.tsx} | 0 ...9001IDBVR.circuit.tsx => TLV9001IDBVR.tsx} | 0 ...9002IDSGR.circuit.tsx => TLV9002IDSGR.tsx} | 0 ...22L1RUGR.circuit.tsx => TLV9022L1RUGR.tsx} | 0 ...9061IDPWR.circuit.tsx => TLV9061IDPWR.tsx} | 0 ...{TLV9062IDR.circuit.tsx => TLV9062IDR.tsx} | 0 ...{TLV9064IDR.circuit.tsx => TLV9064IDR.tsx} | 0 ...{TLV9102IDR.circuit.tsx => TLV9102IDR.tsx} | 0 ...{TLV9152IDR.circuit.tsx => TLV9152IDR.tsx} | 0 ...9301IDCKR.circuit.tsx => TLV9301IDCKR.tsx} | 0 ...31AQDBVT.circuit.tsx => TLVH431AQDBVT.tsx} | 0 ...H432QDBZR.circuit.tsx => TLVH432QDBZR.tsx} | 0 ...3625RDNR.circuit.tsx => TLVM23625RDNR.tsx} | 0 ...FH6PMT7.circuit.tsx => TM4C123FH6PMT7.tsx} | 0 ...6PGEIR.circuit.tsx => TM4C123GH6PGEIR.tsx} | 0 ...GH6PMI7.circuit.tsx => TM4C123GH6PMI7.tsx} | 0 ...GH6PZT7.circuit.tsx => TM4C123GH6PZT7.tsx} | 0 ...6ZXRI7.circuit.tsx => TM4C123GH6ZXRI7.tsx} | 0 ...102AIDRLR.circuit.tsx => TMP102AIDRLR.tsx} | 0 .../{TMP1075.circuit.tsx => TMP1075.tsx} | 2 +- ...MP1075DSGR.circuit.tsx => TMP1075DSGR.tsx} | 0 ...{TMP107BIDR.circuit.tsx => TMP107BIDR.tsx} | 0 ...6NAIDRVR.circuit.tsx => TMP116NAIDRVR.tsx} | 0 ...8MAIYMSR.circuit.tsx => TMP118MAIYMSR.tsx} | 0 ...119AIYBGR.circuit.tsx => TMP119AIYBGR.tsx} | 0 .../{TMP1827.circuit.tsx => TMP1827.tsx} | 0 ...MP20AIDCKR.circuit.tsx => TMP20AIDCKR.tsx} | 0 ...235A2DBZR.circuit.tsx => TMP235A2DBZR.tsx} | 0 ...275AIDGKR.circuit.tsx => TMP275AIDGKR.tsx} | 0 ...MP302ADRLR.circuit.tsx => TMP302ADRLR.tsx} | 0 ...7PTQR.circuit.tsx => TMS320F28027PTQR.tsx} | 0 ...035PNQ.circuit.tsx => TMS320F28035PNQ.tsx} | 0 ...5PTPQ.circuit.tsx => TMS320F28075PTPQ.tsx} | 0 ...PTPT.circuit.tsx => TMS320F28374SPTPT.tsx} | 0 ...PZPQ.circuit.tsx => TMS320F28375SPZPQ.tsx} | 0 ...ZWTQ.circuit.tsx => TMS320F28377DZWTQ.tsx} | 0 ...PTPQ.circuit.tsx => TMS320F28377SPTPQ.tsx} | 0 ...PTPS.circuit.tsx => TMS320F28377SPTPS.tsx} | 0 ...ZWTT.circuit.tsx => TMS320F28379DZWTT.tsx} | 0 ...QQ1R.circuit.tsx => TMS5700432BPZQQ1R.tsx} | 0 ...X1104DGSR.circuit.tsx => TMUX1104DGSR.tsx} | 0 ...X1308APWR.circuit.tsx => TMUX1308APWR.tsx} | 0 ...X1574DYYR.circuit.tsx => TMUX1574DYYR.tsx} | 0 ...X4051BQBR.circuit.tsx => TMUX4051BQBR.tsx} | 0 ...MUX5411PWR.circuit.tsx => TMUX5411PWR.tsx} | 0 ...212RKSR.circuit.tsx => TMUXHS4212RKSR.tsx} | 0 ...B04DPYR.circuit.tsx => TPD1E01B04DPYR.tsx} | 0 ...U04DPYT.circuit.tsx => TPD1E04U04DPYT.tsx} | 0 ...0B04DPLT.circuit.tsx => TPD1E0B04DPLT.tsx} | 0 ...B06DYAR.circuit.tsx => TPD1E10B06DYAR.tsx} | 0 ...1B04DPYR.circuit.tsx => TPD1E1B04DPYR.tsx} | 0 ...2E001DRSR.circuit.tsx => TPD2E001DRSR.tsx} | 0 ...2E007DCKR.circuit.tsx => TPD2E007DCKR.tsx} | 0 ...1B06DRLR.circuit.tsx => TPD2E1B06DRLR.tsx} | 0 ...2U06DRLR.circuit.tsx => TPD2E2U06DRLR.tsx} | 0 ...B30DRTR.circuit.tsx => TPD2EUSB30DRTR.tsx} | 0 ...2S017DBVR.circuit.tsx => TPD2S017DBVR.tsx} | 0 ...2S300YFFR.circuit.tsx => TPD2S300YFFR.tsx} | 0 ...4E001DCKR.circuit.tsx => TPD4E001DCKR.tsx} | 0 ...DBVRQ1.circuit.tsx => TPD4E001QDBVRQ1.tsx} | 0 ...U06DQAR.circuit.tsx => TPD4E05U06DQAR.tsx} | 0 ...1U06DCKR.circuit.tsx => TPD4E1U06DCKR.tsx} | 0 ...4F003DQDR.circuit.tsx => TPD4F003DQDR.tsx} | 0 ...4S012DRYR.circuit.tsx => TPD4S012DRYR.tsx} | 0 ...4S480RUKR.circuit.tsx => TPD4S480RUKR.tsx} | 0 ...6E001RSFR.circuit.tsx => TPD6E001RSFR.tsx} | 0 ...300ARUKR.circuit.tsx => TPD6S300ARUKR.tsx} | 0 ...PL5100DGSR.circuit.tsx => TPL5100DGSR.tsx} | 0 ...PL5110DDCT.circuit.tsx => TPL5110DDCT.tsx} | 0 ...PL5111DDCR.circuit.tsx => TPL5111DDCR.tsx} | 0 ...PL7407LADR.circuit.tsx => TPL7407LADR.tsx} | 0 ...16630PWPR.circuit.tsx => TPS16630PWPR.tsx} | 0 ...AHRQ1.circuit.tsx => TPS1HC03PQVAHRQ1.tsx} | 0 ...PRQ1.circuit.tsx => TPS1HC100BQPWPRQ1.tsx} | 0 ...PS2121RUXR.circuit.tsx => TPS2121RUXR.tsx} | 0 ...22860DBVR.circuit.tsx => TPS22860DBVR.tsx} | 0 ...910AYZVR.circuit.tsx => TPS22910AYZVR.tsx} | 0 ...912CYZVR.circuit.tsx => TPS22912CYZVR.tsx} | 0 ...916BYFPR.circuit.tsx => TPS22916BYFPR.tsx} | 0 ...22918DBVT.circuit.tsx => TPS22918DBVT.tsx} | 0 .../{TPS22919.circuit.tsx => TPS22919.tsx} | 0 ...22945DCKR.circuit.tsx => TPS22945DCKR.tsx} | 0 ...22946YZPR.circuit.tsx => TPS22946YZPR.tsx} | 0 ...22948DCKR.circuit.tsx => TPS22948DCKR.tsx} | 0 ...22970YZPR.circuit.tsx => TPS22970YZPR.tsx} | 0 ...975NDSGR.circuit.tsx => TPS22975NDSGR.tsx} | 0 ...22990DMLR.circuit.tsx => TPS22990DMLR.tsx} | 0 ...1CNRAAR.circuit.tsx => TPS22991CNRAAR.tsx} | 0 ...992SRXNR.circuit.tsx => TPS22992SRXNR.tsx} | 0 ...22995RZFR.circuit.tsx => TPS22995RZFR.tsx} | 0 ...PS2400DBVR.circuit.tsx => TPS2400DBVR.tsx} | 0 ...24750RUVR.circuit.tsx => TPS24750RUVR.tsx} | 0 ...{TPS2491DGS.circuit.tsx => TPS2491DGS.tsx} | 0 ...25221DBVR.circuit.tsx => TPS25221DBVR.tsx} | 0 ...2553DDBVR.circuit.tsx => TPS2553DDBVR.tsx} | 0 ...PS2590RSAR.circuit.tsx => TPS2590RSAR.tsx} | 0 ...9241DRCR.circuit.tsx => TPS259241DRCR.tsx} | 0 ...61ARPWR.circuit.tsx => TPS259461ARPWR.tsx} | 0 ...72ARPWR.circuit.tsx => TPS259472ARPWR.tsx} | 0 ...81AYWPR.circuit.tsx => TPS259481AYWPR.tsx} | 0 ...9541DSGR.circuit.tsx => TPS259541DSGR.tsx} | 0 ...972ARPWR.circuit.tsx => TPS25972ARPWR.tsx} | 0 ...14LRPWR.circuit.tsx => TPS259814LRPWR.tsx} | 0 ...ONRGER.circuit.tsx => TPS259830ONRGER.tsx} | 0 ...26400PWPR.circuit.tsx => TPS26400PWPR.tsx} | 0 ...26600PWPR.circuit.tsx => TPS26600PWPR.tsx} | 0 ...26625DRCR.circuit.tsx => TPS26625DRCR.tsx} | 0 ...26632RGET.circuit.tsx => TPS26632RGET.tsx} | 0 ...081ADDCR.circuit.tsx => TPS27081ADDCR.tsx} | 0 ...AHRQ1.circuit.tsx => TPS2HC08PQVAHRQ1.tsx} | 0 ...AHRQ1.circuit.tsx => TPS2HC16PQVAHRQ1.tsx} | 0 ...K33DBVR.circuit.tsx => TPS3106K33DBVR.tsx} | 0 ..._18DGNR.circuit.tsx => TPS3305_18DGNR.tsx} | 0 ...RLR.circuit.tsx => TPS3424A11C13ADRLR.tsx} | 0 ...FDSER.circuit.tsx => TPS3435JFMAFDSER.tsx} | 0 ...RQ1.circuit.tsx => TPS35AA38AGADDFRQ1.tsx} | 0 ...PS3700DDCT.circuit.tsx => TPS3700DDCT.tsx} | 0 ...QDDCRQ1.circuit.tsx => TPS3700QDDCRQ1.tsx} | 0 ...33DDCR.circuit.tsx => TPS3702CX33DDCR.tsx} | 0 ...PS3710DDCR.circuit.tsx => TPS3710DDCR.tsx} | 0 ...33DBVR.circuit.tsx => TPS3808EG33DBVR.tsx} | 0 ..._33DBVR.circuit.tsx => TPS3823_33DBVR.tsx} | 0 ..._50DBVR.circuit.tsx => TPS3828_50DBVR.tsx} | 0 ...G18DQNR.circuit.tsx => TPS3831G18DQNR.tsx} | 0 ...28DBVR.circuit.tsx => TPS3840DL28DBVR.tsx} | 0 ...6000RGPR.circuit.tsx => TPS386000RGPR.tsx} | 0 ...7RTER.circuit.tsx => TPS389006007RTER.tsx} | 0 ...9030DSER.circuit.tsx => TPS389030DSER.tsx} | 0 ...DGQRQ1.circuit.tsx => TPS40210QDGQRQ1.tsx} | 0 ...43061RTET.circuit.tsx => TPS43061RTET.tsx} | 0 ...51200DRCR.circuit.tsx => TPS51200DRCR.tsx} | 0 ...51206DSQR.circuit.tsx => TPS51206DSQR.tsx} | 0 ...54201DDCT.circuit.tsx => TPS54201DDCT.tsx} | 0 ...54338RQFR.circuit.tsx => TPS54338RQFR.tsx} | 0 ...54386PWPR.circuit.tsx => TPS54386PWPR.tsx} | 0 ...54538RQFR.circuit.tsx => TPS54538RQFR.tsx} | 0 ...55285VALR.circuit.tsx => TPS55285VALR.tsx} | 0 ...30XDBVR.circuit.tsx => TPS560430XDBVR.tsx} | 0 ...1243DRLR.circuit.tsx => TPS561243DRLR.tsx} | 0 ...3252DRLR.circuit.tsx => TPS563252DRLR.tsx} | 0 ...4252DRLR.circuit.tsx => TPS564252DRLR.tsx} | 0 ...5242DRLR.circuit.tsx => TPS565242DRLR.tsx} | 0 ...31PRQFR.circuit.tsx => TPS566231PRQFR.tsx} | 0 ...021ADSGR.circuit.tsx => TPS61021ADSGR.tsx} | 0 ...61094DSSR.circuit.tsx => TPS61094DSSR.tsx} | 0 ...096ADSSR.circuit.tsx => TPS61096ADSSR.tsx} | 0 ...61158DRVR.circuit.tsx => TPS61158DRVR.tsx} | 0 ...61161DRVR.circuit.tsx => TPS61161DRVR.tsx} | 0 ...61165DRVR.circuit.tsx => TPS61165DRVR.tsx} | 0 ...61169DCKR.circuit.tsx => TPS61169DCKR.tsx} | 0 .../{TPS61222.circuit.tsx => TPS61222.tsx} | 2 +- ...61222DCKR.circuit.tsx => TPS61222DCKR.tsx} | 0 ...61299DRLR.circuit.tsx => TPS61299DRLR.tsx} | 0 .../{TPS61299X.circuit.tsx => TPS61299X.tsx} | 2 +- ...3771RYHR.circuit.tsx => TPS613771RYHR.tsx} | 0 ...62177DQCT.circuit.tsx => TPS62177DQCT.tsx} | 0 ...824ADMQR.circuit.tsx => TPS62824ADMQR.tsx} | 0 ...62842DGRR.circuit.tsx => TPS62842DGRR.tsx} | 0 ...RLRQ1.circuit.tsx => TPS628502QDRLRQ1.tsx} | 0 .../{TPS6293.circuit.tsx => TPS6293.tsx} | 0 ...933PDRLR.circuit.tsx => TPS62933PDRLR.tsx} | 0 ...A01PDDCR.circuit.tsx => TPS62A01PDDCR.tsx} | 0 ...A03ADRLR.circuit.tsx => TPS62A03ADRLR.tsx} | 0 ...1000DRLR.circuit.tsx => TPS631000DRLR.tsx} | 0 .../{TPS63802.circuit.tsx => TPS63802.tsx} | 2 +- ...63802DLAR.circuit.tsx => TPS63802DLAR.tsx} | 0 ...63900DSKR.circuit.tsx => TPS63900DSKR.tsx} | 0 ...023BRSBR.circuit.tsx => TPS65023BRSBR.tsx} | 0 ...0250RHBT.circuit.tsx => TPS650250RHBT.tsx} | 0 ...65105PWPR.circuit.tsx => TPS65105PWPR.tsx} | 0 ...65130RGER.circuit.tsx => TPS65130RGER.tsx} | 0 ...65145RGER.circuit.tsx => TPS65145RGER.tsx} | 0 ...401VAFR.circuit.tsx => TPS6521401VAFR.tsx} | 0 ...217CRSLR.circuit.tsx => TPS65217CRSLR.tsx} | 0 ...815RSLR.circuit.tsx => TPS6521815RSLR.tsx} | 0 ...{TPS6521835.circuit.tsx => TPS6521835.tsx} | 0 ...902RSMR.circuit.tsx => TPS6521902RSMR.tsx} | 0 ...AHRQ1.circuit.tsx => TPS6522430RAHRQ1.tsx} | 0 ...65296RJER.circuit.tsx => TPS65296RJER.tsx} | 0 ...APRQ1.circuit.tsx => TPS65381AQDAPRQ1.tsx} | 0 ...RSLR.circuit.tsx => TPS65910A31A1RSLR.tsx} | 0 ...0A2ZCHR.circuit.tsx => TPS65930A2ZCHR.tsx} | 0 ...ERQ1.circuit.tsx => TPS65931211RWERQ1.tsx} | 0 ...DBVRQ1.circuit.tsx => TPS70950QDBVRQ1.tsx} | 0 ...DBVRQ1.circuit.tsx => TPS76350QDBVRQ1.tsx} | 0 ...78233DDCR.circuit.tsx => TPS78233DDCR.tsx} | 0 .../{TPS7A02.circuit.tsx => TPS7A02.tsx} | 2 +- ...30PDBVR.circuit.tsx => TPS7A0230PDBVR.tsx} | 0 ...1633DGNR.circuit.tsx => TPS7A1633DGNR.tsx} | 0 .../{TPS7A20.circuit.tsx => TPS7A20.tsx} | 2 +- ...18PDBVR.circuit.tsx => TPS7A2018PDBVR.tsx} | 0 ...28PDBVR.circuit.tsx => TPS7A2028PDBVR.tsx} | 0 ...33PDBVR.circuit.tsx => TPS7A2033PDBVR.tsx} | 0 ...2525DRVR.circuit.tsx => TPS7A2525DRVR.tsx} | 0 ...4901DGNR.circuit.tsx => TPS7A4901DGNR.tsx} | 0 ...01BRPSR.circuit.tsx => TPS7A5301BRPSR.tsx} | 0 ...9401DSCR.circuit.tsx => TPS7A9401DSCR.tsx} | 0 ...9601DSCR.circuit.tsx => TPS7A9601DSCR.tsx} | 0 ...BVRQ1.circuit.tsx => TPS7B4255QDBVRQ1.tsx} | 0 ...DARQ1.circuit.tsx => TPS7B4260QDDARQ1.tsx} | 0 ...7101DBVR.circuit.tsx => TPS7E7101DBVR.tsx} | 0 ...8150DBVR.circuit.tsx => TPS7E8150DBVR.tsx} | 0 ...0D2RXLR.circuit.tsx => TPS92200D2RXLR.tsx} | 0 ...D1DGNR.circuit.tsx => TPS922051D1DGNR.tsx} | 0 ...92612DBVR.circuit.tsx => TPS92612DBVR.tsx} | 0 ...NOPB.circuit.tsx => TPS92640PWPR_NOPB.tsx} | 0 ...PHPRQ1.circuit.tsx => TPS92761QPHPRQ1.tsx} | 0 ...4406RCHR.circuit.tsx => TPSM64406RCHR.tsx} | 0 ...214SILR.circuit.tsx => TPSM828214SILR.tsx} | 0 ...223SILR.circuit.tsx => TPSM828223SILR.tsx} | 0 .../{TPSM82823.circuit.tsx => TPSM82823.tsx} | 0 ...1ARDSR.circuit.tsx => TPSM828301ARDSR.tsx} | 0 ...3ARDSR.circuit.tsx => TPSM828303ARDSR.tsx} | 0 ...2901SISR.circuit.tsx => TPSM82901SISR.tsx} | 0 ...2903SISR.circuit.tsx => TPSM82903SISR.tsx} | 0 ...620SITR.circuit.tsx => TPSM843620SITR.tsx} | 0 ...252RDXR.circuit.tsx => TPSM863252RDXR.tsx} | 0 ...M8A29RDGR.circuit.tsx => TPSM8A29RDGR.tsx} | 0 ...{TRF7960RHB.circuit.tsx => TRF7960RHB.tsx} | 0 ...7964ARHBR.circuit.tsx => TRF7964ARHBR.tsx} | 0 ...7970ARHBR.circuit.tsx => TRF7970ARHBR.tsx} | 0 ...3122ERGER.circuit.tsx => TRS3122ERGER.tsx} | 0 ...32EIRGTR.circuit.tsx => TRS3232EIRGTR.tsx} | 0 ...3243ECDBR.circuit.tsx => TRS3243ECDBR.tsx} | 0 ...3318EIPWR.circuit.tsx => TRS3318EIPWR.tsx} | 0 ...3386ECPWR.circuit.tsx => TRS3386ECPWR.tsx} | 0 ...3EIRGWR.circuit.tsx => TRSF3223EIRGWR.tsx} | 0 ...2RUATQ1.circuit.tsx => TS3DV642RUATQ1.tsx} | 0 ...B221RSER.circuit.tsx => TS3USB221RSER.tsx} | 0 ...A3157DCKR.circuit.tsx => TS5A3157DCKR.tsx} | 0 ...159ADBVR.circuit.tsx => TS5A3159ADBVR.tsx} | 0 ...A3160DBVR.circuit.tsx => TS5A3160DBVR.tsx} | 0 ...A3166DBVR.circuit.tsx => TS5A3166DBVR.tsx} | 0 ...DCKRQ1.circuit.tsx => TS5A3166QDCKRQ1.tsx} | 0 ...A9411DCKR.circuit.tsx => TS5A9411DCKR.tsx} | 0 .../{TSD05DYFR.circuit.tsx => TSD05DYFR.tsx} | 0 ...SM24CADBZR.circuit.tsx => TSM24CADBZR.tsx} | 0 ...B1004RNQR.circuit.tsx => TUSB1004RNQR.tsx} | 0 ...IRNQR.circuit.tsx => TUSB1046_DCIRNQR.tsx} | 0 ...B8041RGCR.circuit.tsx => TUSB8041RGCR.tsx} | 0 ...042ARGCR.circuit.tsx => TUSB8042ARGCR.tsx} | 0 ...VS0500DRVR.circuit.tsx => TVS0500DRVR.tsx} | 0 ...VS1400DRVR.circuit.tsx => TVS1400DRVR.tsx} | 0 ...VS1401DRBR.circuit.tsx => TVS1401DRBR.tsx} | 0 ...VS2700DRVR.circuit.tsx => TVS2700DRVR.tsx} | 0 ...VS3300YZFR.circuit.tsx => TVS3300YZFR.tsx} | 0 .../{TXB0104.circuit.tsx => TXB0104.tsx} | 2 +- ...XB0104RGYR.circuit.tsx => TXB0104RGYR.tsx} | 0 ...XE8124DGSR.circuit.tsx => TXE8124DGSR.tsx} | 0 .../{TXS0102.circuit.tsx => TXS0102.tsx} | 2 +- ...XS0102DCUR.circuit.tsx => TXS0102DCUR.tsx} | 0 ...0104ERGYR.circuit.tsx => TXS0104ERGYR.tsx} | 0 ...XS0108EPWR.circuit.tsx => TXS0108EPWR.tsx} | 0 ...RGYRQ1.circuit.tsx => TXV0108QWRGYRQ1.tsx} | 0 ...8M05CDCYR.circuit.tsx => UA78M05CDCYR.tsx} | 0 ...{UC2845D8TR.circuit.tsx => UC2845D8TR.tsx} | 0 ...CC21330ADR.circuit.tsx => UCC21330ADR.tsx} | 0 ...21550ADWR.circuit.tsx => UCC21550ADWR.tsx} | 0 ...CC21750DWR.circuit.tsx => UCC21750DWR.tsx} | 0 ...525CDWYR.circuit.tsx => UCC23525CDWYR.tsx} | 0 ...24610DRBR.circuit.tsx => UCC24610DRBR.tsx} | 0 ...2_2DBVR.circuit.tsx => UCC24612_2DBVR.tsx} | 0 ...{UCC24624DT.circuit.tsx => UCC24624DT.tsx} | 0 ...24630DBVT.circuit.tsx => UCC24630DBVT.tsx} | 0 ...24636DBVR.circuit.tsx => UCC24636DBVR.tsx} | 0 ...{UCC25600DR.circuit.tsx => UCC25600DR.tsx} | 0 ...6610DDBR.circuit.tsx => UCC256610DDBR.tsx} | 0 ...GNRQ1.circuit.tsx => UCC25800AQDGNRQ1.tsx} | 0 ...201ADDAR.circuit.tsx => UCC27201ADDAR.tsx} | 0 ...{UCC27211DR.circuit.tsx => UCC27211DR.tsx} | 0 ...CC27301ADR.circuit.tsx => UCC27301ADR.tsx} | 0 ...302ADRCR.circuit.tsx => UCC27302ADRCR.tsx} | 0 ...DGNRQ1.circuit.tsx => UCC27332QDGNRQ1.tsx} | 0 ...{UCC27444DR.circuit.tsx => UCC27444DR.tsx} | 0 ...511ADBVT.circuit.tsx => UCC27511ADBVT.tsx} | 0 ...517ADBVR.circuit.tsx => UCC27517ADBVR.tsx} | 0 .../{UCC27523D.circuit.tsx => UCC27523D.tsx} | 0 ...{UCC27614DR.circuit.tsx => UCC27614DR.tsx} | 0 ...27624DSDR.circuit.tsx => UCC27624DSDR.tsx} | 0 ...{UCC27734DR.circuit.tsx => UCC27734DR.tsx} | 0 ...{UCC27735DR.circuit.tsx => UCC27735DR.tsx} | 0 ...CC28019ADR.circuit.tsx => UCC28019ADR.tsx} | 0 ...{UCC2803DTR.circuit.tsx => UCC2803DTR.tsx} | 0 ...{UCC28051DR.circuit.tsx => UCC28051DR.tsx} | 0 ...056BDBVR.circuit.tsx => UCC28056BDBVR.tsx} | 0 ...{UCC2805DTR.circuit.tsx => UCC2805DTR.tsx} | 0 ...CC28070PWR.circuit.tsx => UCC28070PWR.tsx} | 0 ...0QPWRQ1.circuit.tsx => UCC28070QPWRQ1.tsx} | 0 ...{UCC28180DR.circuit.tsx => UCC28180DR.tsx} | 0 ...{UCC28600DR.circuit.tsx => UCC28600DR.tsx} | 0 ...28700DBVT.circuit.tsx => UCC28700DBVT.tsx} | 0 ...{UCC28711DR.circuit.tsx => UCC28711DR.tsx} | 0 ...{UCC28740DR.circuit.tsx => UCC28740DR.tsx} | 0 ...7501DBVR.circuit.tsx => UCC287501DBVR.tsx} | 0 .../{UCC28881D.circuit.tsx => UCC28881D.tsx} | 0 ...{UCC28910DR.circuit.tsx => UCC28910DR.tsx} | 0 ...{UCC28911DR.circuit.tsx => UCC28911DR.tsx} | 0 ...CC28950PWR.circuit.tsx => UCC28950PWR.tsx} | 0 ...28C50DGKR.circuit.tsx => UCC28C50DGKR.tsx} | 0 ...{UCC28C52DR.circuit.tsx => UCC28C52DR.tsx} | 0 ...{UCC28C53DR.circuit.tsx => UCC28C53DR.tsx} | 0 ...{UCC28C54DR.circuit.tsx => UCC28C54DR.tsx} | 0 ...{UCC28C55DR.circuit.tsx => UCC28C55DR.tsx} | 0 ...{UCC29950DR.circuit.tsx => UCC29950DR.tsx} | 0 ...RAQRQ1.circuit.tsx => UCC33420QRAQRQ1.tsx} | 0 ...33420RAQR.circuit.tsx => UCC33420RAQR.tsx} | 0 ...{UCC38C42DR.circuit.tsx => UCC38C42DR.tsx} | 0 ...{UCC38C43DR.circuit.tsx => UCC38C43DR.tsx} | 0 ...{UCC38C45DR.circuit.tsx => UCC38C45DR.tsx} | 0 ...CC5320ECDR.circuit.tsx => UCC5320ECDR.tsx} | 0 ...CC5350SBDR.circuit.tsx => UCC5350SBDR.tsx} | 0 ...90ECDWVR.circuit.tsx => UCC5390ECDWVR.tsx} | 0 ...CC57108CDR.circuit.tsx => UCC57108CDR.tsx} | 0 ...3138ARGCR.circuit.tsx => UCD3138ARGCR.tsx} | 0 ...CD7138DRSR.circuit.tsx => UCD7138DRSR.tsx} | 0 ...90160RGCT.circuit.tsx => UCD90160RGCT.tsx} | 0 ...8_1REZR.circuit.tsx => UCG28828_1REZR.tsx} | 0 ...LN2003AIDR.circuit.tsx => ULN2003AIDR.tsx} | 0 ...LN2803CDWR.circuit.tsx => ULN2803CDWR.tsx} | 0 ...Q128JVSIQ.circuit.tsx => W25Q128JVSIQ.tsx} | 0 ...IMBBR.circuit.tsx => XI6432BAFCLIMBBR.tsx} | 0 ...321ASPZR.circuit.tsx => XM33C321ASPZR.tsx} | 0 ...SRGZR.circuit.tsx => XMSPM0G1218SRGZR.tsx} | 0 ...{XTR200DQCR.circuit.tsx => XTR200DQCR.tsx} | 0 lib/chips/index.tsx | 128 +- lib/chips/ti-official-footprint-catalog.json | 2122 ------- lib/chips/ti-sysblocks-components.tsx | 1620 ++--- .../ti-sysblocks-footprint-selections.json | 5363 ----------------- .../ti-sysblocks-materialization-report.json | 791 --- lib/chips/ti-sysblocks-pinouts.json | 272 +- lib/simulations/BQ24074-ovp-fault.circuit.tsx | 2 +- ...876-driver-pwm-operation-ph-en.circuit.tsx | 2 +- ...peration-with-current-feedback.circuit.tsx | 2 +- ...urn-off-small-load-capacitance.circuit.tsx | 2 +- ...g-waveforms-pfm-buck-operation.circuit.tsx | 2 +- .../AudioAmplifier_TAS2505.circuit.tsx | 2 +- .../BatteryManagement_BQ24072.circuit.tsx | 2 +- .../BatteryManagement_BQ24073.circuit.tsx | 2 +- .../BatteryManagement_BQ24074.circuit.tsx | 2 +- .../BatteryManagement_BQ25895.circuit.tsx | 2 +- .../BatteryManagement_BQ27441G1.circuit.tsx | 2 +- ...BluetoothAudioHost_MSP430F5229.circuit.tsx | 2 +- .../BluetoothController_CC2564C.circuit.tsx | 2 +- .../BoostConverter_TPS61299X.circuit.tsx | 2 +- .../BuckBoostConverter_TPS63802.circuit.tsx | 2 +- .../BuckConverter_TPS62933.circuit.tsx | 2 +- .../EnvironmentalSensor_HDC2080.circuit.tsx | 2 +- .../EnvironmentalSensor_HDC3020.circuit.tsx | 2 +- .../EnvironmentalSensor_HDC3022.circuit.tsx | 2 +- .../FlashMemory_W25Q128JVSIQ.circuit.tsx | 2 +- .../LEDDriver_TLC59116.circuit.tsx | 2 +- .../LevelShifter_TXB0104.circuit.tsx | 2 +- .../LevelShifter_TXS0102.circuit.tsx | 2 +- .../LoadSwitch_TPS22919.circuit.tsx | 2 +- .../Microcontroller_MSPM0G3507.circuit.tsx | 2 +- .../Microcontroller_MSPM33C3x.circuit.tsx | 2 +- .../MotorDriver_DRV8833.circuit.tsx | 2 +- .../MotorDriver_DRV8876.circuit.tsx | 2 +- .../PowerManagement_TLV755P.circuit.tsx | 2 +- .../PowerManagement_TPS6521835.circuit.tsx | 2 +- .../PowerManagement_TPS7A02.circuit.tsx | 2 +- .../PowerManagement_TPS7A20.circuit.tsx | 2 +- .../PowerManagement_TPS7A2018.circuit.tsx | 2 +- .../PowerManagement_TPS7A2028.circuit.tsx | 2 +- .../PowerModule_TPSM82823.circuit.tsx | 2 +- .../PowerMonitor_INA237.circuit.tsx | 2 +- .../RFIDReader_TRF7960.circuit.tsx | 10 +- .../RealTimeClock_BQ32002.circuit.tsx | 2 +- .../TargetSocket_MSPTS430D8.circuit.tsx | 2 +- .../TemperatureSensor_TMP1075.circuit.tsx | 2 +- .../TemperatureSensor_TMP1827.circuit.tsx | 2 +- .../WirelessMCU_CC2340R5.circuit.tsx | 2 +- .../WirelessMCU_CC2745R10.circuit.tsx | 2 +- .../WirelessMCU_CC3235SF.circuit.tsx | 2 +- package.json | 3 + scripts/cache-ti-sysblocks-pinouts.ts | 2 +- scripts/enrich-ti-array-pin-labels.ts | 4 +- scripts/generate-ti-reference-examples.ts | 274 + scripts/generate-ti-sysblocks-exports.ts | 2 +- ...aterialize-ti-datasheet-components.test.ts | 596 -- .../materialize-ti-datasheet-components.ts | 1350 ----- scripts/ti-reference-example-schema.test.ts | 388 ++ scripts/ti-reference-example-schema.ts | 1133 ++++ scripts/validate-ti-reference-examples.ts | 175 + scripts/validate-ti-sysblocks-catalog.ts | 89 +- tscircuit.config.ts | 31 +- 939 files changed, 4538 insertions(+), 11851 deletions(-) create mode 100644 .gitattributes create mode 100644 examples/LM358B_InvertingAmplifier.circuit.tsx create mode 100644 examples/OPA371D_LowSideCurrentSense.circuit.tsx create mode 100644 examples/TPS7A20_TypicalApplication.circuit.tsx create mode 100644 examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg create mode 100644 examples/ti-reference-examples.json rename lib/chips/{ADC101C021CIMM_NOPB.circuit.tsx => ADC101C021CIMM_NOPB.tsx} (100%) rename lib/chips/{ADC128S022CIMTX_NOPB.circuit.tsx => ADC128S022CIMTX_NOPB.tsx} (100%) rename lib/chips/{ADS1015LIDGSR.circuit.tsx => ADS1015LIDGSR.tsx} (100%) rename lib/chips/{ADS1114IDGST.circuit.tsx => ADS1114IDGST.tsx} (100%) rename lib/chips/{ADS1118IDGSR.circuit.tsx => ADS1118IDGSR.tsx} (100%) rename lib/chips/{ADS114S08IRHBT.circuit.tsx => ADS114S08IRHBT.tsx} (100%) rename lib/chips/{ADS122S14IRTER.circuit.tsx => ADS122S14IRTER.tsx} (100%) rename lib/chips/{ADS124S08IRHBT.circuit.tsx => ADS124S08IRHBT.tsx} (100%) rename lib/chips/{ADS131M03IRUKR.circuit.tsx => ADS131M03IRUKR.tsx} (100%) rename lib/chips/{ADS7042IDCUT.circuit.tsx => ADS7042IDCUT.tsx} (100%) rename lib/chips/{ADS7142IRUGR.circuit.tsx => ADS7142IRUGR.tsx} (100%) rename lib/chips/{ADS7885SDBVT.circuit.tsx => ADS7885SDBVT.tsx} (100%) rename lib/chips/{ADS8885IDGSR.circuit.tsx => ADS8885IDGSR.tsx} (100%) rename lib/chips/{AM26C31IDR.circuit.tsx => AM26C31IDR.tsx} (100%) rename lib/chips/{AM26C32CDR.circuit.tsx => AM26C32CDR.tsx} (100%) rename lib/chips/{AM3352BZCZ100.circuit.tsx => AM3352BZCZ100.tsx} (100%) rename lib/chips/{AM3357BZCZA80.circuit.tsx => AM3357BZCZA80.tsx} (100%) rename lib/chips/{AM4376BZDND80.circuit.tsx => AM4376BZDND80.tsx} (100%) rename lib/chips/{AM4378BZDND100.circuit.tsx => AM4378BZDND100.tsx} (100%) rename lib/chips/{AM4379BZDNA100.circuit.tsx => AM4379BZDNA100.tsx} (100%) rename lib/chips/{AM5726BABCXA.circuit.tsx => AM5726BABCXA.tsx} (100%) rename lib/chips/{AM62A32AOMHIAMBR.circuit.tsx => AM62A32AOMHIAMBR.tsx} (100%) rename lib/chips/{AM62A74AUMHAAMBR.circuit.tsx => AM62A74AUMHAAMBR.tsx} (100%) rename lib/chips/{AM62L32.circuit.tsx => AM62L32.tsx} (87%) rename lib/chips/{AM62L32BEGHAANBR.circuit.tsx => AM62L32BEGHAANBR.tsx} (100%) rename lib/chips/{AM62L32BOGHAANBR.circuit.tsx => AM62L32BOGHAANBR.tsx} (100%) rename lib/chips/{AM6442BSEFHAALV.circuit.tsx => AM6442BSEFHAALV.tsx} (100%) rename lib/chips/{AM67A74AKGHIAMWR.circuit.tsx => AM67A74AKGHIAMWR.tsx} (100%) rename lib/chips/{AMC0300DDWVR.circuit.tsx => AMC0300DDWVR.tsx} (100%) rename lib/chips/{AMC0311DQDWVRQ1.circuit.tsx => AMC0311DQDWVRQ1.tsx} (100%) rename lib/chips/{AMC1211AQDWVQ1.circuit.tsx => AMC1211AQDWVQ1.tsx} (100%) rename lib/chips/{AMC1351QDWVRQ1.circuit.tsx => AMC1351QDWVRQ1.tsx} (100%) rename lib/chips/{ATL431LIBQDBZR.circuit.tsx => ATL431LIBQDBZR.tsx} (100%) rename lib/chips/{A_74ACT16244DGGR.circuit.tsx => A_74ACT16244DGGR.tsx} (100%) rename lib/chips/{A_74LVC1G332DBVRG4.circuit.tsx => A_74LVC1G332DBVRG4.tsx} (100%) rename lib/chips/{BQ24072.circuit.tsx => BQ24072.tsx} (78%) rename lib/chips/{BQ24072RGTR.circuit.tsx => BQ24072RGTR.tsx} (100%) rename lib/chips/{BQ24073.circuit.tsx => BQ24073.tsx} (78%) rename lib/chips/{BQ24073RGTR.circuit.tsx => BQ24073RGTR.tsx} (92%) rename lib/chips/{BQ24074.circuit.tsx => BQ24074.tsx} (88%) rename lib/chips/{BQ24074RGTR.circuit.tsx => BQ24074RGTR.tsx} (100%) rename lib/chips/{BQ24600RVAR.circuit.tsx => BQ24600RVAR.tsx} (100%) rename lib/chips/{BQ24725ARGRR.circuit.tsx => BQ24725ARGRR.tsx} (100%) rename lib/chips/{BQ24780SRUYR.circuit.tsx => BQ24780SRUYR.tsx} (100%) rename lib/chips/{BQ25185DLHR.circuit.tsx => BQ25185DLHR.tsx} (100%) rename lib/chips/{BQ25188YBGR.circuit.tsx => BQ25188YBGR.tsx} (100%) rename lib/chips/{BQ25622RYKR.circuit.tsx => BQ25622RYKR.tsx} (100%) rename lib/chips/{BQ25630YBGR.circuit.tsx => BQ25630YBGR.tsx} (100%) rename lib/chips/{BQ25638YBGR.circuit.tsx => BQ25638YBGR.tsx} (100%) rename lib/chips/{BQ25731RSNR.circuit.tsx => BQ25731RSNR.tsx} (100%) rename lib/chips/{BQ25756RRVR.circuit.tsx => BQ25756RRVR.tsx} (100%) rename lib/chips/{BQ25887RGER.circuit.tsx => BQ25887RGER.tsx} (100%) rename lib/chips/{BQ25895.circuit.tsx => BQ25895.tsx} (89%) rename lib/chips/{BQ25895RTWR.circuit.tsx => BQ25895RTWR.tsx} (100%) rename lib/chips/{BQ27426YZFR.circuit.tsx => BQ27426YZFR.tsx} (100%) rename lib/chips/{BQ27441DRZR_G1B.circuit.tsx => BQ27441DRZR_G1B.tsx} (100%) rename lib/chips/{BQ27441G1.circuit.tsx => BQ27441G1.tsx} (88%) rename lib/chips/{BQ32000DR.circuit.tsx => BQ32000DR.tsx} (100%) rename lib/chips/{BQ32002.circuit.tsx => BQ32002.tsx} (100%) rename lib/chips/{BQ51003YFPR.circuit.tsx => BQ51003YFPR.tsx} (100%) rename lib/chips/{BQ51013CRHLR.circuit.tsx => BQ51013CRHLR.tsx} (100%) rename lib/chips/{CC1101RGPR.circuit.tsx => CC1101RGPR.tsx} (100%) rename lib/chips/{CC1120RHBR.circuit.tsx => CC1120RHBR.tsx} (100%) rename lib/chips/{CC1125RHBR.circuit.tsx => CC1125RHBR.tsx} (100%) rename lib/chips/{CC113LRGPR.circuit.tsx => CC113LRGPR.tsx} (100%) rename lib/chips/{CC1310F128RHBR.circuit.tsx => CC1310F128RHBR.tsx} (100%) rename lib/chips/{CC1311R31T0RKPR.circuit.tsx => CC1311R31T0RKPR.tsx} (100%) rename lib/chips/{CC1312PSIPMOTR.circuit.tsx => CC1312PSIPMOTR.tsx} (100%) rename lib/chips/{CC1314R106T0RGZR.circuit.tsx => CC1314R106T0RGZR.tsx} (100%) rename lib/chips/{CC1354P106T0RSKR.circuit.tsx => CC1354P106T0RSKR.tsx} (100%) rename lib/chips/{CC2340R21N0RGER.circuit.tsx => CC2340R21N0RGER.tsx} (100%) rename lib/chips/{CC2340R5.circuit.tsx => CC2340R5.tsx} (100%) rename lib/chips/{CC2340R5MODAN0MHAR.circuit.tsx => CC2340R5MODAN0MHAR.tsx} (100%) rename lib/chips/{CC2500RGPR.circuit.tsx => CC2500RGPR.tsx} (100%) rename lib/chips/{CC2530F128RHAR.circuit.tsx => CC2530F128RHAR.tsx} (100%) rename lib/chips/{CC2531F128RHAR.circuit.tsx => CC2531F128RHAR.tsx} (100%) rename lib/chips/{CC2540F256RHAR.circuit.tsx => CC2540F256RHAR.tsx} (100%) rename lib/chips/{CC2564C.circuit.tsx => CC2564C.tsx} (100%) rename lib/chips/{CC2592RGVR.circuit.tsx => CC2592RGVR.tsx} (100%) rename lib/chips/{CC2620F128RGZR.circuit.tsx => CC2620F128RGZR.tsx} (100%) rename lib/chips/{CC2652RB1FRGZR.circuit.tsx => CC2652RB1FRGZR.tsx} (100%) rename lib/chips/{CC2745R10.circuit.tsx => CC2745R10.tsx} (74%) rename lib/chips/{CC2745R10E0WRHARQ1.circuit.tsx => CC2745R10E0WRHARQ1.tsx} (100%) rename lib/chips/{CC2755P105E0WRHAR.circuit.tsx => CC2755P105E0WRHAR.tsx} (100%) rename lib/chips/{CC2755P207E0WRHAR.circuit.tsx => CC2755P207E0WRHAR.tsx} (100%) rename lib/chips/{CC3100MODR11MAMOBT.circuit.tsx => CC3100MODR11MAMOBT.tsx} (100%) rename lib/chips/{CC3100R11MRGCR.circuit.tsx => CC3100R11MRGCR.tsx} (100%) rename lib/chips/{CC3200MODR1M2AMOBR.circuit.tsx => CC3200MODR1M2AMOBR.tsx} (100%) rename lib/chips/{CC3200R1M2RGC.circuit.tsx => CC3200R1M2RGC.tsx} (100%) rename lib/chips/{CC3220MODASM2MONR.circuit.tsx => CC3220MODASM2MONR.tsx} (100%) rename lib/chips/{CC3235SF.circuit.tsx => CC3235SF.tsx} (87%) rename lib/chips/{CC3235SF12RGKR.circuit.tsx => CC3235SF12RGKR.tsx} (100%) rename lib/chips/{CC3300MODENIAMOZR.circuit.tsx => CC3300MODENIAMOZR.tsx} (100%) rename lib/chips/{CC3301MODENIAMOZR.circuit.tsx => CC3301MODENIAMOZR.tsx} (100%) rename lib/chips/{CC3350MODENIAMOZR.circuit.tsx => CC3350MODENIAMOZR.tsx} (100%) rename lib/chips/{CC3351MODENIAMOZR.circuit.tsx => CC3351MODENIAMOZR.tsx} (100%) rename lib/chips/{CC3501ENJARSHR.circuit.tsx => CC3501ENJARSHR.tsx} (100%) rename lib/chips/{CC3551ENJARSHR.circuit.tsx => CC3551ENJARSHR.tsx} (100%) rename lib/chips/{CD4069UBM96.circuit.tsx => CD4069UBM96.tsx} (100%) rename lib/chips/{CD74HC4067SM96.circuit.tsx => CD74HC4067SM96.tsx} (100%) rename lib/chips/{CD74HCT21M96.circuit.tsx => CD74HCT21M96.tsx} (100%) rename lib/chips/{CD74HCT4067M.circuit.tsx => CD74HCT4067M.tsx} (100%) rename lib/chips/{CDCE62002RHBT.circuit.tsx => CDCE62002RHBT.tsx} (100%) rename lib/chips/{CDCE913PWR.circuit.tsx => CDCE913PWR.tsx} (100%) rename lib/chips/{CDCLVC1106PWR.circuit.tsx => CDCLVC1106PWR.tsx} (100%) rename lib/chips/{CDCM9102RHBR.circuit.tsx => CDCM9102RHBR.tsx} (100%) rename lib/chips/{CSD13381F4T.circuit.tsx => CSD13381F4T.tsx} (100%) rename lib/chips/{CSD17382F4T.circuit.tsx => CSD17382F4T.tsx} (100%) rename lib/chips/{CSD17483F4T.circuit.tsx => CSD17483F4T.tsx} (100%) rename lib/chips/{CSD17484F4.circuit.tsx => CSD17484F4.tsx} (100%) rename lib/chips/{CSD17571Q2.circuit.tsx => CSD17571Q2.tsx} (100%) rename lib/chips/{CSD17573Q5B.circuit.tsx => CSD17573Q5B.tsx} (100%) rename lib/chips/{CSD17577Q3AT.circuit.tsx => CSD17577Q3AT.tsx} (100%) rename lib/chips/{CSD17578Q5A.circuit.tsx => CSD17578Q5A.tsx} (100%) rename lib/chips/{CSD17579Q3A.circuit.tsx => CSD17579Q3A.tsx} (100%) rename lib/chips/{CSD17581Q3AT.circuit.tsx => CSD17581Q3AT.tsx} (100%) rename lib/chips/{CSD18510Q5B.circuit.tsx => CSD18510Q5B.tsx} (100%) rename lib/chips/{CSD18513Q5A.circuit.tsx => CSD18513Q5A.tsx} (100%) rename lib/chips/{CSD18514Q5A.circuit.tsx => CSD18514Q5A.tsx} (100%) rename lib/chips/{CSD18531Q5AT.circuit.tsx => CSD18531Q5AT.tsx} (100%) rename lib/chips/{CSD18532Q5B.circuit.tsx => CSD18532Q5B.tsx} (100%) rename lib/chips/{CSD18534Q5A.circuit.tsx => CSD18534Q5A.tsx} (100%) rename lib/chips/{CSD18540Q5BT.circuit.tsx => CSD18540Q5BT.tsx} (100%) rename lib/chips/{CSD18541F5T.circuit.tsx => CSD18541F5T.tsx} (100%) rename lib/chips/{CSD18543Q3AT.circuit.tsx => CSD18543Q3AT.tsx} (100%) rename lib/chips/{CSD19501KCS.circuit.tsx => CSD19501KCS.tsx} (100%) rename lib/chips/{CSD19502Q5B.circuit.tsx => CSD19502Q5B.tsx} (100%) rename lib/chips/{CSD19531Q5AT.circuit.tsx => CSD19531Q5AT.tsx} (100%) rename lib/chips/{CSD19534Q5A.circuit.tsx => CSD19534Q5A.tsx} (100%) rename lib/chips/{CSD19535KTT.circuit.tsx => CSD19535KTT.tsx} (100%) rename lib/chips/{CSD19537Q3T.circuit.tsx => CSD19537Q3T.tsx} (100%) rename lib/chips/{CSD19538Q2T.circuit.tsx => CSD19538Q2T.tsx} (100%) rename lib/chips/{CSD25481F4.circuit.tsx => CSD25481F4.tsx} (100%) rename lib/chips/{CSD87502Q2T.circuit.tsx => CSD87502Q2T.tsx} (100%) rename lib/chips/{CSD88539NDT.circuit.tsx => CSD88539NDT.tsx} (100%) rename lib/chips/{CoaxialTestPort.circuit.tsx => CoaxialTestPort.tsx} (100%) rename lib/chips/{DAC121S101CIMK_NOPB.circuit.tsx => DAC121S101CIMK_NOPB.tsx} (100%) rename lib/chips/{DAC43701DSGR.circuit.tsx => DAC43701DSGR.tsx} (100%) rename lib/chips/{DAC53202RTER.circuit.tsx => DAC53202RTER.tsx} (100%) rename lib/chips/{DAC53204YBHR.circuit.tsx => DAC53204YBHR.tsx} (100%) rename lib/chips/{DAC63001RTER.circuit.tsx => DAC63001RTER.tsx} (100%) rename lib/chips/{DAC80502DRXR.circuit.tsx => DAC80502DRXR.tsx} (100%) rename lib/chips/{DAC8411IDCKT.circuit.tsx => DAC8411IDCKT.tsx} (100%) rename lib/chips/{DAC8564IAPWR.circuit.tsx => DAC8564IAPWR.tsx} (100%) rename lib/chips/{DCH010505SN7.circuit.tsx => DCH010505SN7.tsx} (100%) rename lib/chips/{DLP4500AFQD.circuit.tsx => DLP4500AFQD.tsx} (100%) rename lib/chips/{DM3730CUSD100.circuit.tsx => DM3730CUSD100.tsx} (100%) rename lib/chips/{DP83822HRHBT.circuit.tsx => DP83822HRHBT.tsx} (100%) rename lib/chips/{DP83822IRHBR.circuit.tsx => DP83822IRHBR.tsx} (100%) rename lib/chips/{DP83825IRMQT.circuit.tsx => DP83825IRMQT.tsx} (100%) rename lib/chips/{DP83826AERHBR.circuit.tsx => DP83826AERHBR.tsx} (100%) rename lib/chips/{DP83826AIRHBR.circuit.tsx => DP83826AIRHBR.tsx} (100%) rename lib/chips/{DP83826IRHBR.circuit.tsx => DP83826IRHBR.tsx} (100%) rename lib/chips/{DP83867CRRGZR.circuit.tsx => DP83867CRRGZR.tsx} (100%) rename lib/chips/{DP83867ERGZR.circuit.tsx => DP83867ERGZR.tsx} (100%) rename lib/chips/{DP83867IRRGZT.circuit.tsx => DP83867IRRGZT.tsx} (100%) rename lib/chips/{DP83867ISRGZT.circuit.tsx => DP83867ISRGZT.tsx} (100%) rename lib/chips/{DRV110APWR.circuit.tsx => DRV110APWR.tsx} (100%) rename lib/chips/{DRV2605YZFR.circuit.tsx => DRV2605YZFR.tsx} (100%) rename lib/chips/{DRV2667RGPR.circuit.tsx => DRV2667RGPR.tsx} (100%) rename lib/chips/{DRV3256EPAPRQ1.circuit.tsx => DRV3256EPAPRQ1.tsx} (100%) rename lib/chips/{DRV5013ADELPGMQ1.circuit.tsx => DRV5013ADELPGMQ1.tsx} (100%) rename lib/chips/{DRV5013AGQLPG.circuit.tsx => DRV5013AGQLPG.tsx} (100%) rename lib/chips/{DRV8263HQVAKRQ1.circuit.tsx => DRV8263HQVAKRQ1.tsx} (100%) rename lib/chips/{DRV83053QPHPRQ1.circuit.tsx => DRV83053QPHPRQ1.tsx} (100%) rename lib/chips/{DRV8363QRGZRQ1.circuit.tsx => DRV8363QRGZRQ1.tsx} (100%) rename lib/chips/{DRV8833.circuit.tsx => DRV8833.tsx} (100%) rename lib/chips/{DRV8876.circuit.tsx => DRV8876.tsx} (100%) rename lib/chips/{DS90LT012ATMF_NOPB.circuit.tsx => DS90LT012ATMF_NOPB.tsx} (100%) rename lib/chips/{DS90LV011ATMF_NOPB.circuit.tsx => DS90LV011ATMF_NOPB.tsx} (100%) rename lib/chips/{DS90LV047ATMX_NOPB.circuit.tsx => DS90LV047ATMX_NOPB.tsx} (100%) rename lib/chips/{DS90LV048ATMX_NOPB.circuit.tsx => DS90LV048ATMX_NOPB.tsx} (100%) rename lib/chips/{ESD122DMXR.circuit.tsx => ESD122DMXR.tsx} (100%) rename lib/chips/{ESD204DQAR.circuit.tsx => ESD204DQAR.tsx} (100%) rename lib/chips/{ESD321DPYR.circuit.tsx => ESD321DPYR.tsx} (100%) rename lib/chips/{ESD351DPYR.circuit.tsx => ESD351DPYR.tsx} (100%) rename lib/chips/{ESD401DPYR.circuit.tsx => ESD401DPYR.tsx} (100%) rename lib/chips/{ESD751DYAR.circuit.tsx => ESD751DYAR.tsx} (100%) rename lib/chips/{ESDS311DYFR.circuit.tsx => ESDS311DYFR.tsx} (100%) rename lib/chips/{F2800132PTR.circuit.tsx => F2800132PTR.tsx} (100%) rename lib/chips/{F2800133PMR.circuit.tsx => F2800133PMR.tsx} (100%) rename lib/chips/{F280025PNSR.circuit.tsx => F280025PNSR.tsx} (100%) rename lib/chips/{F280039CSPMR.circuit.tsx => F280039CSPMR.tsx} (100%) rename lib/chips/{F280040CPMQR.circuit.tsx => F280040CPMQR.tsx} (100%) rename lib/chips/{F280040PMQR.circuit.tsx => F280040PMQR.tsx} (100%) rename lib/chips/{F280041CPZQR.circuit.tsx => F280041CPZQR.tsx} (100%) rename lib/chips/{F280041PZQR.circuit.tsx => F280041PZQR.tsx} (100%) rename lib/chips/{F280049CPZQR.circuit.tsx => F280049CPZQR.tsx} (100%) rename lib/chips/{F280049CRSHSR.circuit.tsx => F280049CRSHSR.tsx} (100%) rename lib/chips/{F280049PZQ.circuit.tsx => F280049PZQ.tsx} (100%) rename lib/chips/{F28E120SCTPTR.circuit.tsx => F28E120SCTPTR.tsx} (100%) rename lib/chips/{F28M35H52C1RFPQ.circuit.tsx => F28M35H52C1RFPQ.tsx} (100%) rename lib/chips/{F28P550SJ9PZR.circuit.tsx => F28P550SJ9PZR.tsx} (100%) rename lib/chips/{F28P650DK6PZPR.circuit.tsx => F28P650DK6PZPR.tsx} (100%) rename lib/chips/{FDC2212DNTR.circuit.tsx => FDC2212DNTR.tsx} (100%) rename lib/chips/{HD3SS3220RNHT.circuit.tsx => HD3SS3220RNHT.tsx} (100%) rename lib/chips/{HDC2080.circuit.tsx => HDC2080.tsx} (88%) rename lib/chips/{HDC2080DMBR.circuit.tsx => HDC2080DMBR.tsx} (100%) rename lib/chips/{HDC3020.circuit.tsx => HDC3020.tsx} (89%) rename lib/chips/{HDC3020DEFR.circuit.tsx => HDC3020DEFR.tsx} (100%) rename lib/chips/{HDC3021QDEHRQ1.circuit.tsx => HDC3021QDEHRQ1.tsx} (100%) rename lib/chips/{HDC3022.circuit.tsx => HDC3022.tsx} (89%) rename lib/chips/{HDC3022DEJR.circuit.tsx => HDC3022DEJR.tsx} (100%) rename lib/chips/{Header2x10.circuit.tsx => Header2x10.tsx} (100%) rename lib/chips/{INA138NA_3K.circuit.tsx => INA138NA_3K.tsx} (100%) rename lib/chips/{INA138QPWRQ1.circuit.tsx => INA138QPWRQ1.tsx} (100%) rename lib/chips/{INA139NA_3K.circuit.tsx => INA139NA_3K.tsx} (100%) rename lib/chips/{INA169NA_3K.circuit.tsx => INA169NA_3K.tsx} (100%) rename lib/chips/{INA181A2IDBVR.circuit.tsx => INA181A2IDBVR.tsx} (100%) rename lib/chips/{INA186A2IDDFR.circuit.tsx => INA186A2IDDFR.tsx} (100%) rename lib/chips/{INA188IDR.circuit.tsx => INA188IDR.tsx} (100%) rename lib/chips/{INA199A3DCKR.circuit.tsx => INA199A3DCKR.tsx} (100%) rename lib/chips/{INA213BIDCKT.circuit.tsx => INA213BIDCKT.tsx} (100%) rename lib/chips/{INA2181A2IDGSR.circuit.tsx => INA2181A2IDGSR.tsx} (100%) rename lib/chips/{INA228AIDGSR.circuit.tsx => INA228AIDGSR.tsx} (100%) rename lib/chips/{INA230AIRGTR.circuit.tsx => INA230AIRGTR.tsx} (100%) rename lib/chips/{INA236AIYBJR.circuit.tsx => INA236AIYBJR.tsx} (100%) rename lib/chips/{INA237.circuit.tsx => INA237.tsx} (87%) rename lib/chips/{INA237AQDGSRQ1.circuit.tsx => INA237AQDGSRQ1.tsx} (100%) rename lib/chips/{INA240A1DR.circuit.tsx => INA240A1DR.tsx} (100%) rename lib/chips/{INA240A3QDRQ1.circuit.tsx => INA240A3QDRQ1.tsx} (100%) rename lib/chips/{INA241A5IDDFR.circuit.tsx => INA241A5IDDFR.tsx} (100%) rename lib/chips/{INA280A3IDCKT.circuit.tsx => INA280A3IDCKT.tsx} (100%) rename lib/chips/{INA281A3IDBVR.circuit.tsx => INA281A3IDBVR.tsx} (100%) rename lib/chips/{INA296A4IDDFR.circuit.tsx => INA296A4IDDFR.tsx} (100%) rename lib/chips/{INA296B4IDDFR.circuit.tsx => INA296B4IDDFR.tsx} (100%) rename lib/chips/{INA310A4IDGKR.circuit.tsx => INA310A4IDGKR.tsx} (100%) rename lib/chips/{INA3221AIRGVR.circuit.tsx => INA3221AIRGVR.tsx} (100%) rename lib/chips/{INA818IDR.circuit.tsx => INA818IDR.tsx} (100%) rename lib/chips/{INA826AIDR.circuit.tsx => INA826AIDR.tsx} (100%) rename lib/chips/{ISO1042DWR.circuit.tsx => ISO1042DWR.tsx} (100%) rename lib/chips/{ISO1044BD.circuit.tsx => ISO1044BD.tsx} (100%) rename lib/chips/{ISO1050DWR.circuit.tsx => ISO1050DWR.tsx} (100%) rename lib/chips/{ISO1176DWR.circuit.tsx => ISO1176DWR.tsx} (100%) rename lib/chips/{ISO1410BDWR.circuit.tsx => ISO1410BDWR.tsx} (100%) rename lib/chips/{ISO1541DR.circuit.tsx => ISO1541DR.tsx} (100%) rename lib/chips/{ISO3082DWR.circuit.tsx => ISO3082DWR.tsx} (100%) rename lib/chips/{ISO3088DWR.circuit.tsx => ISO3088DWR.tsx} (100%) rename lib/chips/{ISO5452DWR.circuit.tsx => ISO5452DWR.tsx} (100%) rename lib/chips/{ISO5851DWR.circuit.tsx => ISO5851DWR.tsx} (100%) rename lib/chips/{ISO6420DR.circuit.tsx => ISO6420DR.tsx} (100%) rename lib/chips/{ISO6421DR.circuit.tsx => ISO6421DR.tsx} (100%) rename lib/chips/{ISO6421DRQ1.circuit.tsx => ISO6421DRQ1.tsx} (100%) rename lib/chips/{ISO6431DBQR.circuit.tsx => ISO6431DBQR.tsx} (100%) rename lib/chips/{ISO6440DBQR.circuit.tsx => ISO6440DBQR.tsx} (100%) rename lib/chips/{ISO6440DBQRQ1.circuit.tsx => ISO6440DBQRQ1.tsx} (100%) rename lib/chips/{ISO6441DWR.circuit.tsx => ISO6441DWR.tsx} (100%) rename lib/chips/{ISO6442DBQR.circuit.tsx => ISO6442DBQR.tsx} (100%) rename lib/chips/{ISO6521REUR.circuit.tsx => ISO6521REUR.tsx} (100%) rename lib/chips/{ISO7760DBQR.circuit.tsx => ISO7760DBQR.tsx} (100%) rename lib/chips/{ISO7841FDWW.circuit.tsx => ISO7841FDWW.tsx} (100%) rename lib/chips/{ISO7842DWR.circuit.tsx => ISO7842DWR.tsx} (100%) rename lib/chips/{IWRL6432BDBAAMFR.circuit.tsx => IWRL6432BDBAAMFR.tsx} (100%) rename lib/chips/{IWRL6432BRQAAMYR.circuit.tsx => IWRL6432BRQAAMYR.tsx} (100%) rename lib/chips/{LDC1312DNTR.circuit.tsx => LDC1312DNTR.tsx} (100%) rename lib/chips/{LDC1314RGHR.circuit.tsx => LDC1314RGHR.tsx} (100%) rename lib/chips/{LDC1612DNTR.circuit.tsx => LDC1612DNTR.tsx} (100%) rename lib/chips/{LDC1614RGHR.circuit.tsx => LDC1614RGHR.tsx} (100%) rename lib/chips/{LM111733QKVURQ1.circuit.tsx => LM111733QKVURQ1.tsx} (100%) rename lib/chips/{LM20242MHX_NOPB.circuit.tsx => LM20242MHX_NOPB.tsx} (100%) rename lib/chips/{LM20CIM7_NOPB.circuit.tsx => LM20CIM7_NOPB.tsx} (100%) rename lib/chips/{LM239N.circuit.tsx => LM239N.tsx} (100%) rename lib/chips/{LM2901AVQDRG4Q1.circuit.tsx => LM2901AVQDRG4Q1.tsx} (100%) rename lib/chips/{LM2902BIDR.circuit.tsx => LM2902BIDR.tsx} (100%) rename lib/chips/{LM2903BIDR.circuit.tsx => LM2903BIDR.tsx} (100%) rename lib/chips/{LM2903DR.circuit.tsx => LM2903DR.tsx} (100%) rename lib/chips/{LM2904BIDGKR.circuit.tsx => LM2904BIDGKR.tsx} (100%) rename lib/chips/{LM321LVIDBVR.circuit.tsx => LM321LVIDBVR.tsx} (100%) rename lib/chips/{LM324BIPWR.circuit.tsx => LM324BIPWR.tsx} (100%) rename lib/chips/{LM339BIDR.circuit.tsx => LM339BIDR.tsx} (100%) rename lib/chips/{LM339LVPWR.circuit.tsx => LM339LVPWR.tsx} (100%) rename lib/chips/{LM358BIPWR.circuit.tsx => LM358BIPWR.tsx} (100%) rename lib/chips/{LM358LVIPWR.circuit.tsx => LM358LVIPWR.tsx} (100%) rename lib/chips/{LM3644YFFR.circuit.tsx => LM3644YFFR.tsx} (100%) rename lib/chips/{LM3880MF_1AC_NOPB.circuit.tsx => LM3880MF_1AC_NOPB.tsx} (100%) rename lib/chips/{LM3881MMX_NOPB.circuit.tsx => LM3881MMX_NOPB.tsx} (100%) rename lib/chips/{LM393ADR.circuit.tsx => LM393ADR.tsx} (100%) rename lib/chips/{LM393BIDR.circuit.tsx => LM393BIDR.tsx} (100%) rename lib/chips/{LM393PWR.circuit.tsx => LM393PWR.tsx} (100%) rename lib/chips/{LM4041A12IDBZR.circuit.tsx => LM4041A12IDBZR.tsx} (100%) rename lib/chips/{LM4041CIDCKR.circuit.tsx => LM4041CIDCKR.tsx} (100%) rename lib/chips/{LM4060A12EDBZR.circuit.tsx => LM4060A12EDBZR.tsx} (100%) rename lib/chips/{LM5020MM_2_NOPB.circuit.tsx => LM5020MM_2_NOPB.tsx} (100%) rename lib/chips/{LM5033SDX_NOPB.circuit.tsx => LM5033SDX_NOPB.tsx} (100%) rename lib/chips/{LM5050MK_1_NOPB.circuit.tsx => LM5050MK_1_NOPB.tsx} (100%) rename lib/chips/{LM5050Q1MK_1_NOPB.circuit.tsx => LM5050Q1MK_1_NOPB.tsx} (100%) rename lib/chips/{LM5060Q1MM_NOPB.circuit.tsx => LM5060Q1MM_NOPB.tsx} (100%) rename lib/chips/{LM5069MM_1_NOPB.circuit.tsx => LM5069MM_1_NOPB.tsx} (100%) rename lib/chips/{LM5106MMX_NOPB.circuit.tsx => LM5106MMX_NOPB.tsx} (100%) rename lib/chips/{LM5123QRGRRQ1.circuit.tsx => LM5123QRGRRQ1.tsx} (100%) rename lib/chips/{LM51551DSSR.circuit.tsx => LM51551DSSR.tsx} (100%) rename lib/chips/{LM5156DSSR.circuit.tsx => LM5156DSSR.tsx} (100%) rename lib/chips/{LM5163DDAR.circuit.tsx => LM5163DDAR.tsx} (100%) rename lib/chips/{LM5164DDAR.circuit.tsx => LM5164DDAR.tsx} (100%) rename lib/chips/{LM536005QDSXRQ1.circuit.tsx => LM536005QDSXRQ1.tsx} (100%) rename lib/chips/{LM62460RPHR.circuit.tsx => LM62460RPHR.tsx} (100%) rename lib/chips/{LM62CIM3_NOPB.circuit.tsx => LM62CIM3_NOPB.tsx} (100%) rename lib/chips/{LM74610QDGKRQ1.circuit.tsx => LM74610QDGKRQ1.tsx} (100%) rename lib/chips/{LM74700QDRQ1.circuit.tsx => LM74700QDRQ1.tsx} (100%) rename lib/chips/{LM74900QRGERQ1.circuit.tsx => LM74900QRGERQ1.tsx} (100%) rename lib/chips/{LM95235DIMMX_NOPB.circuit.tsx => LM95235DIMMX_NOPB.tsx} (100%) rename lib/chips/{LMC555CMX_NOPB.circuit.tsx => LMC555CMX_NOPB.tsx} (100%) rename lib/chips/{LMG1210RVRR.circuit.tsx => LMG1210RVRR.tsx} (100%) rename lib/chips/{LMG3410R150RWHR.circuit.tsx => LMG3410R150RWHR.tsx} (100%) rename lib/chips/{LMG3411R070RWHR.circuit.tsx => LMG3411R070RWHR.tsx} (100%) rename lib/chips/{LMG3612REQR.circuit.tsx => LMG3612REQR.tsx} (100%) rename lib/chips/{LMK04828BISQE_NOPB.circuit.tsx => LMK04828BISQE_NOPB.tsx} (100%) rename lib/chips/{LMK1C1102PWR.circuit.tsx => LMK1C1102PWR.tsx} (100%) rename lib/chips/{LMK1C1103PWR.circuit.tsx => LMK1C1103PWR.tsx} (100%) rename lib/chips/{LMK1C1104DQFR.circuit.tsx => LMK1C1104DQFR.tsx} (100%) rename lib/chips/{LMK1C1108PWR.circuit.tsx => LMK1C1108PWR.tsx} (100%) rename lib/chips/{LMK6DA10000ADLFR.circuit.tsx => LMK6DA10000ADLFR.tsx} (100%) rename lib/chips/{LMP8480MMX_T_NOPB.circuit.tsx => LMP8480MMX_T_NOPB.tsx} (100%) rename lib/chips/{LMP8601MA_NOPB.circuit.tsx => LMP8601MA_NOPB.tsx} (100%) rename lib/chips/{LMP8601QMAX_NOPB.circuit.tsx => LMP8601QMAX_NOPB.tsx} (100%) rename lib/chips/{LMQ66430MA3RXBRQ1.circuit.tsx => LMQ66430MA3RXBRQ1.tsx} (100%) rename lib/chips/{LMQ66430R5RXBR.circuit.tsx => LMQ66430R5RXBR.tsx} (100%) rename lib/chips/{LMR33630CRNXR.circuit.tsx => LMR33630CRNXR.tsx} (100%) rename lib/chips/{LMR36502F3RPER.circuit.tsx => LMR36502F3RPER.tsx} (100%) rename lib/chips/{LMR36520FADDAR.circuit.tsx => LMR36520FADDAR.tsx} (100%) rename lib/chips/{LMR43610R3RPER.circuit.tsx => LMR43610R3RPER.tsx} (100%) rename lib/chips/{LMR50410Y3FQDBVRQ1.circuit.tsx => LMR50410Y3FQDBVRQ1.tsx} (100%) rename lib/chips/{LMR51610XDBVR.circuit.tsx => LMR51610XDBVR.tsx} (100%) rename lib/chips/{LMR51635YFDDCR.circuit.tsx => LMR51635YFDDCR.tsx} (100%) rename lib/chips/{LMT01LPG.circuit.tsx => LMT01LPG.tsx} (100%) rename lib/chips/{LMT70YFQR.circuit.tsx => LMT70YFQR.tsx} (100%) rename lib/chips/{LMT84DCKR.circuit.tsx => LMT84DCKR.tsx} (100%) rename lib/chips/{LMT86QDCKRQ1.circuit.tsx => LMT86QDCKRQ1.tsx} (100%) rename lib/chips/{LMT88DCKR.circuit.tsx => LMT88DCKR.tsx} (100%) rename lib/chips/{LMV324AIPWR.circuit.tsx => LMV324AIPWR.tsx} (100%) rename lib/chips/{LMV331M5X_NOPB.circuit.tsx => LMV331M5X_NOPB.tsx} (100%) rename lib/chips/{LMV431AIZ_NOPB.circuit.tsx => LMV431AIZ_NOPB.tsx} (100%) rename lib/chips/{LMV431BIMFX_NOPB.circuit.tsx => LMV431BIMFX_NOPB.tsx} (100%) rename lib/chips/{LMV431CM5X_NOPB.circuit.tsx => LMV431CM5X_NOPB.tsx} (100%) rename lib/chips/{LP2980AIM5X_3_3_NOPB.circuit.tsx => LP2980AIM5X_3_3_NOPB.tsx} (100%) rename lib/chips/{LP2985AIM5_3_3_NOPB.circuit.tsx => LP2985AIM5_3_3_NOPB.tsx} (100%) rename lib/chips/{LP2998MAX_NOPB.circuit.tsx => LP2998MAX_NOPB.tsx} (100%) rename lib/chips/{LP5009PWR.circuit.tsx => LP5009PWR.tsx} (100%) rename lib/chips/{LP5036RJVR.circuit.tsx => LP5036RJVR.tsx} (100%) rename lib/chips/{LP5813AYBHR.circuit.tsx => LP5813AYBHR.tsx} (100%) rename lib/chips/{LPV821DBVR.circuit.tsx => LPV821DBVR.tsx} (100%) rename lib/chips/{LSF0108DGSR.circuit.tsx => LSF0108DGSR.tsx} (100%) rename lib/chips/{MAX3221CPWR.circuit.tsx => MAX3221CPWR.tsx} (100%) rename lib/chips/{MAX3221ECDBR.circuit.tsx => MAX3221ECDBR.tsx} (100%) rename lib/chips/{MSP430F5229.circuit.tsx => MSP430F5229.tsx} (78%) rename lib/chips/{MSP430F5229IRGCR.circuit.tsx => MSP430F5229IRGCR.tsx} (100%) rename lib/chips/{MSP430F5437AIPNR.circuit.tsx => MSP430F5437AIPNR.tsx} (100%) rename lib/chips/{MSP430F5528IZXHR.circuit.tsx => MSP430F5528IZXHR.tsx} (100%) rename lib/chips/{MSP430F5529IPN.circuit.tsx => MSP430F5529IPN.tsx} (100%) rename lib/chips/{MSP430FR2512IPW16R.circuit.tsx => MSP430FR2512IPW16R.tsx} (100%) rename lib/chips/{MSP430FR2532IRGER.circuit.tsx => MSP430FR2532IRGER.tsx} (100%) rename lib/chips/{MSP430FR2533IRHBR.circuit.tsx => MSP430FR2533IRHBR.tsx} (100%) rename lib/chips/{MSP430FR2632IYQWR.circuit.tsx => MSP430FR2632IYQWR.tsx} (100%) rename lib/chips/{MSP430FR2633IDAR.circuit.tsx => MSP430FR2633IDAR.tsx} (100%) rename lib/chips/{MSP430FR2672TRHBR.circuit.tsx => MSP430FR2672TRHBR.tsx} (100%) rename lib/chips/{MSP430FR2675TPTR.circuit.tsx => MSP430FR2675TPTR.tsx} (100%) rename lib/chips/{MSP430FR4133IPMR.circuit.tsx => MSP430FR4133IPMR.tsx} (100%) rename lib/chips/{MSP430FR5869IRGZR.circuit.tsx => MSP430FR5869IRGZR.tsx} (100%) rename lib/chips/{MSP430FR5969IRGZR.circuit.tsx => MSP430FR5969IRGZR.tsx} (100%) rename lib/chips/{MSP430G2230ID.circuit.tsx => MSP430G2230ID.tsx} (100%) rename lib/chips/{MSPM0C1103SDSGR.circuit.tsx => MSPM0C1103SDSGR.tsx} (100%) rename lib/chips/{MSPM0C1104SDDFR.circuit.tsx => MSPM0C1104SDDFR.tsx} (100%) rename lib/chips/{MSPM0G1107TRHBR.circuit.tsx => MSPM0G1107TRHBR.tsx} (100%) rename lib/chips/{MSPM0G1506SPMR.circuit.tsx => MSPM0G1506SPMR.tsx} (100%) rename lib/chips/{MSPM0G1518SPMR.circuit.tsx => MSPM0G1518SPMR.tsx} (100%) rename lib/chips/{MSPM0G3507.circuit.tsx => MSPM0G3507.tsx} (87%) rename lib/chips/{MSPM0G3507SPMR.circuit.tsx => MSPM0G3507SPMR.tsx} (100%) rename lib/chips/{MSPM0G5117SPMR.circuit.tsx => MSPM0G5117SPMR.tsx} (100%) rename lib/chips/{MSPM0L1105TDYYR.circuit.tsx => MSPM0L1105TDYYR.tsx} (100%) rename lib/chips/{MSPM0L1116SRHBR.circuit.tsx => MSPM0L1116SRHBR.tsx} (100%) rename lib/chips/{MSPM0L1305SDYYR.circuit.tsx => MSPM0L1305SDYYR.tsx} (100%) rename lib/chips/{MSPM0L1306SRGER.circuit.tsx => MSPM0L1306SRGER.tsx} (100%) rename lib/chips/{MSPM0L1343TDGS20R.circuit.tsx => MSPM0L1343TDGS20R.tsx} (100%) rename lib/chips/{MSPM0L2228SPTR.circuit.tsx => MSPM0L2228SPTR.tsx} (100%) rename lib/chips/{MSPM33C3x.circuit.tsx => MSPM33C3x.tsx} (100%) rename lib/chips/{NA555DR.circuit.tsx => NA555DR.tsx} (100%) rename lib/chips/{O3853QDCARQ1.circuit.tsx => O3853QDCARQ1.tsx} (100%) rename lib/chips/{OPA197IDBVT.circuit.tsx => OPA197IDBVT.tsx} (100%) rename lib/chips/{OPA2188AIDGKR.circuit.tsx => OPA2188AIDGKR.tsx} (100%) rename lib/chips/{OPA2197ID.circuit.tsx => OPA2197ID.tsx} (100%) rename lib/chips/{OPA2237UA_2K5.circuit.tsx => OPA2237UA_2K5.tsx} (100%) rename lib/chips/{OPA2310IDR.circuit.tsx => OPA2310IDR.tsx} (100%) rename lib/chips/{OPA2340UA_2K5.circuit.tsx => OPA2340UA_2K5.tsx} (100%) rename lib/chips/{OPA2365AQDRQ1.circuit.tsx => OPA2365AQDRQ1.tsx} (100%) rename lib/chips/{OPA2607QDGKRQ1.circuit.tsx => OPA2607QDGKRQ1.tsx} (100%) rename lib/chips/{OPA2836QDGKRQ1.circuit.tsx => OPA2836QDGKRQ1.tsx} (100%) rename lib/chips/{OPA310IDCKR.circuit.tsx => OPA310IDCKR.tsx} (100%) rename lib/chips/{OPA320SAIDBVR.circuit.tsx => OPA320SAIDBVR.tsx} (100%) rename lib/chips/{OPA333AIDR.circuit.tsx => OPA333AIDR.tsx} (100%) rename lib/chips/{OPA350UA_2K5.circuit.tsx => OPA350UA_2K5.tsx} (100%) rename lib/chips/{OPA365AIDR.circuit.tsx => OPA365AIDR.tsx} (100%) rename lib/chips/{OPA365AQDBVRQ1.circuit.tsx => OPA365AQDBVRQ1.tsx} (100%) rename lib/chips/{OPA371DDBVR.circuit.tsx => OPA371DDBVR.tsx} (100%) rename lib/chips/{OPA376AIDBVR.circuit.tsx => OPA376AIDBVR.tsx} (100%) rename lib/chips/{OPA4192IDR.circuit.tsx => OPA4192IDR.tsx} (100%) rename lib/chips/{OPA4206APWR.circuit.tsx => OPA4206APWR.tsx} (100%) rename lib/chips/{OPA4350EA_250.circuit.tsx => OPA4350EA_250.tsx} (100%) rename lib/chips/{OPA4991QDYYRQ1.circuit.tsx => OPA4991QDYYRQ1.tsx} (100%) rename lib/chips/{OPA607QDBVRQ1.circuit.tsx => OPA607QDBVRQ1.tsx} (100%) rename lib/chips/{OPA990IDBVR.circuit.tsx => OPA990IDBVR.tsx} (100%) rename lib/chips/{OPT3002DNPR.circuit.tsx => OPT3002DNPR.tsx} (100%) rename lib/chips/{OPT3004DNPR.circuit.tsx => OPT3004DNPR.tsx} (100%) rename lib/chips/{OPT4001YMNR.circuit.tsx => OPT4001YMNR.tsx} (100%) rename lib/chips/{OscillatorCrystal4.circuit.tsx => OscillatorCrystal4.tsx} (100%) rename lib/chips/{P82B96DGKR.circuit.tsx => P82B96DGKR.tsx} (100%) rename lib/chips/{PCA9306DCUT.circuit.tsx => PCA9306DCUT.tsx} (100%) rename lib/chips/{PTH08080WAH.circuit.tsx => PTH08080WAH.tsx} (100%) rename lib/chips/{PTLIN821DRBRQ1.circuit.tsx => PTLIN821DRBRQ1.tsx} (100%) rename lib/chips/{REF1930AIDDCT.circuit.tsx => REF1930AIDDCT.tsx} (100%) rename lib/chips/{REF2125IDBVR.circuit.tsx => REF2125IDBVR.tsx} (100%) rename lib/chips/{REF3016EAIDBZR.circuit.tsx => REF3016EAIDBZR.tsx} (100%) rename lib/chips/{REF3325AIDBZR.circuit.tsx => REF3325AIDBZR.tsx} (100%) rename lib/chips/{RF430CL330HCPWR.circuit.tsx => RF430CL330HCPWR.tsx} (100%) rename lib/chips/{SN6501DBVR.circuit.tsx => SN6501DBVR.tsx} (100%) rename lib/chips/{SN6505BDBVT.circuit.tsx => SN6505BDBVT.tsx} (100%) rename lib/chips/{SN65HVD24DR.circuit.tsx => SN65HVD24DR.tsx} (100%) rename lib/chips/{SN65HVD3082EDR.circuit.tsx => SN65HVD3082EDR.tsx} (100%) rename lib/chips/{SN65HVD3088EDR.circuit.tsx => SN65HVD3088EDR.tsx} (100%) rename lib/chips/{SN65HVD32DR.circuit.tsx => SN65HVD32DR.tsx} (100%) rename lib/chips/{SN65HVD96DR.circuit.tsx => SN65HVD96DR.tsx} (100%) rename lib/chips/{SN65LV1023ADB.circuit.tsx => SN65LV1023ADB.tsx} (100%) rename lib/chips/{SN65LV1224BDB.circuit.tsx => SN65LV1224BDB.tsx} (100%) rename lib/chips/{SN74AC86PWR.circuit.tsx => SN74AC86PWR.tsx} (100%) rename lib/chips/{SN74AHC08DR.circuit.tsx => SN74AHC08DR.tsx} (100%) rename lib/chips/{SN74AHC1G09DBVR.circuit.tsx => SN74AHC1G09DBVR.tsx} (100%) rename lib/chips/{SN74AHC1G14DBVR.circuit.tsx => SN74AHC1G14DBVR.tsx} (100%) rename lib/chips/{SN74AHCT1G08DBVR.circuit.tsx => SN74AHCT1G08DBVR.tsx} (100%) rename lib/chips/{SN74AHCT541DWR.circuit.tsx => SN74AHCT541DWR.tsx} (100%) rename lib/chips/{SN74ALVC08DR.circuit.tsx => SN74ALVC08DR.tsx} (100%) rename lib/chips/{SN74AUP1G14DBVR.circuit.tsx => SN74AUP1G14DBVR.tsx} (100%) rename lib/chips/{SN74AUP1G17DBVR.circuit.tsx => SN74AUP1G17DBVR.tsx} (100%) rename lib/chips/{SN74AUP1G74DQER.circuit.tsx => SN74AUP1G74DQER.tsx} (100%) rename lib/chips/{SN74AUP1G79DCKR.circuit.tsx => SN74AUP1G79DCKR.tsx} (100%) rename lib/chips/{SN74AUP2G08DQER.circuit.tsx => SN74AUP2G08DQER.tsx} (100%) rename lib/chips/{SN74AUP2G14DSFR.circuit.tsx => SN74AUP2G14DSFR.tsx} (100%) rename lib/chips/{SN74AUP2G17DCKR.circuit.tsx => SN74AUP2G17DCKR.tsx} (100%) rename lib/chips/{SN74AUP2G240DCUR.circuit.tsx => SN74AUP2G240DCUR.tsx} (100%) rename lib/chips/{SN74AUP3G14DCUR.circuit.tsx => SN74AUP3G14DCUR.tsx} (100%) rename lib/chips/{SN74AXC4T245PWR.circuit.tsx => SN74AXC4T245PWR.tsx} (100%) rename lib/chips/{SN74CB3Q3245DGVR.circuit.tsx => SN74CB3Q3245DGVR.tsx} (100%) rename lib/chips/{SN74CBTLV3257DGVR.circuit.tsx => SN74CBTLV3257DGVR.tsx} (100%) rename lib/chips/{SN74HC112DR.circuit.tsx => SN74HC112DR.tsx} (100%) rename lib/chips/{SN74HC14DR.circuit.tsx => SN74HC14DR.tsx} (100%) rename lib/chips/{SN74HC21DR.circuit.tsx => SN74HC21DR.tsx} (100%) rename lib/chips/{SN74HCS03DR.circuit.tsx => SN74HCS03DR.tsx} (100%) rename lib/chips/{SN74HCS595BQBR.circuit.tsx => SN74HCS595BQBR.tsx} (100%) rename lib/chips/{SN74LV1T125DBVR.circuit.tsx => SN74LV1T125DBVR.tsx} (100%) rename lib/chips/{SN74LV1T34DCKR.circuit.tsx => SN74LV1T34DCKR.tsx} (100%) rename lib/chips/{SN74LV4052ADYYR.circuit.tsx => SN74LV4052ADYYR.tsx} (100%) rename lib/chips/{SN74LV541ADBR.circuit.tsx => SN74LV541ADBR.tsx} (100%) rename lib/chips/{SN74LVC08ANSR.circuit.tsx => SN74LVC08ANSR.tsx} (100%) rename lib/chips/{SN74LVC125APWR.circuit.tsx => SN74LVC125APWR.tsx} (100%) rename lib/chips/{SN74LVC14ADGVR.circuit.tsx => SN74LVC14ADGVR.tsx} (100%) rename lib/chips/{SN74LVC1G04YZPR.circuit.tsx => SN74LVC1G04YZPR.tsx} (100%) rename lib/chips/{SN74LVC1G07DCK3.circuit.tsx => SN74LVC1G07DCK3.tsx} (100%) rename lib/chips/{SN74LVC1G08DCKR.circuit.tsx => SN74LVC1G08DCKR.tsx} (100%) rename lib/chips/{SN74LVC1G11DBVR.circuit.tsx => SN74LVC1G11DBVR.tsx} (100%) rename lib/chips/{SN74LVC1G125YZPR.circuit.tsx => SN74LVC1G125YZPR.tsx} (100%) rename lib/chips/{SN74LVC1G126DBVT.circuit.tsx => SN74LVC1G126DBVT.tsx} (100%) rename lib/chips/{SN74LVC1G14DRLR.circuit.tsx => SN74LVC1G14DRLR.tsx} (100%) rename lib/chips/{SN74LVC1G17DBVT.circuit.tsx => SN74LVC1G17DBVT.tsx} (100%) rename lib/chips/{SN74LVC1G3157YZPR.circuit.tsx => SN74LVC1G3157YZPR.tsx} (100%) rename lib/chips/{SN74LVC1G32DRY2.circuit.tsx => SN74LVC1G32DRY2.tsx} (100%) rename lib/chips/{SN74LVC1G74DCUR.circuit.tsx => SN74LVC1G74DCUR.tsx} (100%) rename lib/chips/{SN74LVC1G86DCKR.circuit.tsx => SN74LVC1G86DCKR.tsx} (100%) rename lib/chips/{SN74LVC1GU04DBVR.circuit.tsx => SN74LVC1GU04DBVR.tsx} (100%) rename lib/chips/{SN74LVC2G07YZPR.circuit.tsx => SN74LVC2G07YZPR.tsx} (100%) rename lib/chips/{SN74LVC2G08DCUR.circuit.tsx => SN74LVC2G08DCUR.tsx} (100%) rename lib/chips/{SN74LVC2G125DCU3.circuit.tsx => SN74LVC2G125DCU3.tsx} (100%) rename lib/chips/{SN74LVC2G132DCTR.circuit.tsx => SN74LVC2G132DCTR.tsx} (100%) rename lib/chips/{SN74LVC2G240DCTR.circuit.tsx => SN74LVC2G240DCTR.tsx} (100%) rename lib/chips/{SN74LVC2G34YZPR.circuit.tsx => SN74LVC2G34YZPR.tsx} (100%) rename lib/chips/{SN74LVC3G07DCUR.circuit.tsx => SN74LVC3G07DCUR.tsx} (100%) rename lib/chips/{TAC5112IRGER.circuit.tsx => TAC5112IRGER.tsx} (100%) rename lib/chips/{TAS2505.circuit.tsx => TAS2505.tsx} (100%) rename lib/chips/{TCA6408APWR.circuit.tsx => TCA6408APWR.tsx} (100%) rename lib/chips/{TCA9535DBR.circuit.tsx => TCA9535DBR.tsx} (100%) rename lib/chips/{TCA9803DGKR.circuit.tsx => TCA9803DGKR.tsx} (100%) rename lib/chips/{TCAN1044AVDRBRQ1.circuit.tsx => TCAN1044AVDRBRQ1.tsx} (100%) rename lib/chips/{TCAN1057AVDRQ1.circuit.tsx => TCAN1057AVDRQ1.tsx} (100%) rename lib/chips/{TFP401PZP.circuit.tsx => TFP401PZP.tsx} (100%) rename lib/chips/{THVD1410DR.circuit.tsx => THVD1410DR.tsx} (100%) rename lib/chips/{THVD1424RGTR.circuit.tsx => THVD1424RGTR.tsx} (100%) rename lib/chips/{THVD1450DGKR.circuit.tsx => THVD1450DGKR.tsx} (100%) rename lib/chips/{THVD1451DRBR.circuit.tsx => THVD1451DRBR.tsx} (100%) rename lib/chips/{THVD1452DGS.circuit.tsx => THVD1452DGS.tsx} (100%) rename lib/chips/{THVD1500DR.circuit.tsx => THVD1500DR.tsx} (100%) rename lib/chips/{THVD2410DGKR.circuit.tsx => THVD2410DGKR.tsx} (100%) rename lib/chips/{THVD2450DGKR.circuit.tsx => THVD2450DGKR.tsx} (100%) rename lib/chips/{THVD8000DDFR.circuit.tsx => THVD8000DDFR.tsx} (100%) rename lib/chips/{THVD8010DDFR.circuit.tsx => THVD8010DDFR.tsx} (100%) rename lib/chips/{TIOL221RGER.circuit.tsx => TIOL221RGER.tsx} (100%) rename lib/chips/{TIOS1015DMWT.circuit.tsx => TIOS1015DMWT.tsx} (100%) rename lib/chips/{TL072HIPWR.circuit.tsx => TL072HIPWR.tsx} (100%) rename lib/chips/{TL074HIDYYR.circuit.tsx => TL074HIDYYR.tsx} (100%) rename lib/chips/{TL082HIDR.circuit.tsx => TL082HIDR.tsx} (100%) rename lib/chips/{TL084HIDYYR.circuit.tsx => TL084HIDYYR.tsx} (100%) rename lib/chips/{TL331IDBVR.circuit.tsx => TL331IDBVR.tsx} (100%) rename lib/chips/{TL331LVDBVR.circuit.tsx => TL331LVDBVR.tsx} (100%) rename lib/chips/{TL391LVDBVR.circuit.tsx => TL391LVDBVR.tsx} (100%) rename lib/chips/{TL431QDBZR.circuit.tsx => TL431QDBZR.tsx} (100%) rename lib/chips/{TL7712ACDR.circuit.tsx => TL7712ACDR.tsx} (100%) rename lib/chips/{TLA2024IRUGR.circuit.tsx => TLA2024IRUGR.tsx} (100%) rename lib/chips/{TLA2528IRTER.circuit.tsx => TLA2528IRTER.tsx} (100%) rename lib/chips/{TLA431AIDBZR.circuit.tsx => TLA431AIDBZR.tsx} (100%) rename lib/chips/{TLA432AQDBZR.circuit.tsx => TLA432AQDBZR.tsx} (100%) rename lib/chips/{TLC555IDR.circuit.tsx => TLC555IDR.tsx} (100%) rename lib/chips/{TLC59116.circuit.tsx => TLC59116.tsx} (86%) rename lib/chips/{TLC59116IPWR.circuit.tsx => TLC59116IPWR.tsx} (100%) rename lib/chips/{TLC5916IPWR.circuit.tsx => TLC5916IPWR.tsx} (100%) rename lib/chips/{TLC59283RGER.circuit.tsx => TLC59283RGER.tsx} (100%) rename lib/chips/{TLC5971PWPR.circuit.tsx => TLC5971PWPR.tsx} (100%) rename lib/chips/{TLC6946RGER.circuit.tsx => TLC6946RGER.tsx} (100%) rename lib/chips/{TLC69624QRSNRQ1.circuit.tsx => TLC69624QRSNRQ1.tsx} (100%) rename lib/chips/{TLC69634QRSNRQ1.circuit.tsx => TLC69634QRSNRQ1.tsx} (100%) rename lib/chips/{TLC69699DRRR.circuit.tsx => TLC69699DRRR.tsx} (100%) rename lib/chips/{TLE2022CDR.circuit.tsx => TLE2022CDR.tsx} (100%) rename lib/chips/{TLV1811QDBVRQ1.circuit.tsx => TLV1811QDBVRQ1.tsx} (100%) rename lib/chips/{TLV1824DR.circuit.tsx => TLV1824DR.tsx} (100%) rename lib/chips/{TLV1842PWR.circuit.tsx => TLV1842PWR.tsx} (100%) rename lib/chips/{TLV3211DCKR.circuit.tsx => TLV3211DCKR.tsx} (100%) rename lib/chips/{TLV3212DGKR.circuit.tsx => TLV3212DGKR.tsx} (100%) rename lib/chips/{TLV333IDBVR.circuit.tsx => TLV333IDBVR.tsx} (100%) rename lib/chips/{TLV3512DGKR.circuit.tsx => TLV3512DGKR.tsx} (100%) rename lib/chips/{TLV3691IDCKT.circuit.tsx => TLV3691IDCKT.tsx} (100%) rename lib/chips/{TLV369IDCKR.circuit.tsx => TLV369IDCKR.tsx} (100%) rename lib/chips/{TLV376IDBVR.circuit.tsx => TLV376IDBVR.tsx} (100%) rename lib/chips/{TLV431AIDBVR.circuit.tsx => TLV431AIDBVR.tsx} (100%) rename lib/chips/{TLV431BQDBZR.circuit.tsx => TLV431BQDBZR.tsx} (100%) rename lib/chips/{TLV61047DDCR.circuit.tsx => TLV61047DDCR.tsx} (100%) rename lib/chips/{TLV7031DBVR.circuit.tsx => TLV7031DBVR.tsx} (100%) rename lib/chips/{TLV7042DGKR.circuit.tsx => TLV7042DGKR.tsx} (100%) rename lib/chips/{TLV70450DBVR.circuit.tsx => TLV70450DBVR.tsx} (100%) rename lib/chips/{TLV709A33DBVR.circuit.tsx => TLV709A33DBVR.tsx} (100%) rename lib/chips/{TLV74218PDQNR.circuit.tsx => TLV74218PDQNR.tsx} (100%) rename lib/chips/{TLV75533PDBVR.circuit.tsx => TLV75533PDBVR.tsx} (100%) rename lib/chips/{TLV755P.circuit.tsx => TLV755P.tsx} (88%) rename lib/chips/{TLV75801PDBVR.circuit.tsx => TLV75801PDBVR.tsx} (100%) rename lib/chips/{TLV76133KVUR.circuit.tsx => TLV76133KVUR.tsx} (100%) rename lib/chips/{TLV77133PDBVR.circuit.tsx => TLV77133PDBVR.tsx} (100%) rename lib/chips/{TLV77330PDBVR.circuit.tsx => TLV77330PDBVR.tsx} (100%) rename lib/chips/{TLV803EA30DBZR.circuit.tsx => TLV803EA30DBZR.tsx} (100%) rename lib/chips/{TLV803SDBZR.circuit.tsx => TLV803SDBZR.tsx} (100%) rename lib/chips/{TLV8802DGKR.circuit.tsx => TLV8802DGKR.tsx} (100%) rename lib/chips/{TLV9001IDBVR.circuit.tsx => TLV9001IDBVR.tsx} (100%) rename lib/chips/{TLV9002IDSGR.circuit.tsx => TLV9002IDSGR.tsx} (100%) rename lib/chips/{TLV9022L1RUGR.circuit.tsx => TLV9022L1RUGR.tsx} (100%) rename lib/chips/{TLV9061IDPWR.circuit.tsx => TLV9061IDPWR.tsx} (100%) rename lib/chips/{TLV9062IDR.circuit.tsx => TLV9062IDR.tsx} (100%) rename lib/chips/{TLV9064IDR.circuit.tsx => TLV9064IDR.tsx} (100%) rename lib/chips/{TLV9102IDR.circuit.tsx => TLV9102IDR.tsx} (100%) rename lib/chips/{TLV9152IDR.circuit.tsx => TLV9152IDR.tsx} (100%) rename lib/chips/{TLV9301IDCKR.circuit.tsx => TLV9301IDCKR.tsx} (100%) rename lib/chips/{TLVH431AQDBVT.circuit.tsx => TLVH431AQDBVT.tsx} (100%) rename lib/chips/{TLVH432QDBZR.circuit.tsx => TLVH432QDBZR.tsx} (100%) rename lib/chips/{TLVM23625RDNR.circuit.tsx => TLVM23625RDNR.tsx} (100%) rename lib/chips/{TM4C123FH6PMT7.circuit.tsx => TM4C123FH6PMT7.tsx} (100%) rename lib/chips/{TM4C123GH6PGEIR.circuit.tsx => TM4C123GH6PGEIR.tsx} (100%) rename lib/chips/{TM4C123GH6PMI7.circuit.tsx => TM4C123GH6PMI7.tsx} (100%) rename lib/chips/{TM4C123GH6PZT7.circuit.tsx => TM4C123GH6PZT7.tsx} (100%) rename lib/chips/{TM4C123GH6ZXRI7.circuit.tsx => TM4C123GH6ZXRI7.tsx} (100%) rename lib/chips/{TMP102AIDRLR.circuit.tsx => TMP102AIDRLR.tsx} (100%) rename lib/chips/{TMP1075.circuit.tsx => TMP1075.tsx} (89%) rename lib/chips/{TMP1075DSGR.circuit.tsx => TMP1075DSGR.tsx} (100%) rename lib/chips/{TMP107BIDR.circuit.tsx => TMP107BIDR.tsx} (100%) rename lib/chips/{TMP116NAIDRVR.circuit.tsx => TMP116NAIDRVR.tsx} (100%) rename lib/chips/{TMP118MAIYMSR.circuit.tsx => TMP118MAIYMSR.tsx} (100%) rename lib/chips/{TMP119AIYBGR.circuit.tsx => TMP119AIYBGR.tsx} (100%) rename lib/chips/{TMP1827.circuit.tsx => TMP1827.tsx} (100%) rename lib/chips/{TMP20AIDCKR.circuit.tsx => TMP20AIDCKR.tsx} (100%) rename lib/chips/{TMP235A2DBZR.circuit.tsx => TMP235A2DBZR.tsx} (100%) rename lib/chips/{TMP275AIDGKR.circuit.tsx => TMP275AIDGKR.tsx} (100%) rename lib/chips/{TMP302ADRLR.circuit.tsx => TMP302ADRLR.tsx} (100%) rename lib/chips/{TMS320F28027PTQR.circuit.tsx => TMS320F28027PTQR.tsx} (100%) rename lib/chips/{TMS320F28035PNQ.circuit.tsx => TMS320F28035PNQ.tsx} (100%) rename lib/chips/{TMS320F28075PTPQ.circuit.tsx => TMS320F28075PTPQ.tsx} (100%) rename lib/chips/{TMS320F28374SPTPT.circuit.tsx => TMS320F28374SPTPT.tsx} (100%) rename lib/chips/{TMS320F28375SPZPQ.circuit.tsx => TMS320F28375SPZPQ.tsx} (100%) rename lib/chips/{TMS320F28377DZWTQ.circuit.tsx => TMS320F28377DZWTQ.tsx} (100%) rename lib/chips/{TMS320F28377SPTPQ.circuit.tsx => TMS320F28377SPTPQ.tsx} (100%) rename lib/chips/{TMS320F28377SPTPS.circuit.tsx => TMS320F28377SPTPS.tsx} (100%) rename lib/chips/{TMS320F28379DZWTT.circuit.tsx => TMS320F28379DZWTT.tsx} (100%) rename lib/chips/{TMS5700432BPZQQ1R.circuit.tsx => TMS5700432BPZQQ1R.tsx} (100%) rename lib/chips/{TMUX1104DGSR.circuit.tsx => TMUX1104DGSR.tsx} (100%) rename lib/chips/{TMUX1308APWR.circuit.tsx => TMUX1308APWR.tsx} (100%) rename lib/chips/{TMUX1574DYYR.circuit.tsx => TMUX1574DYYR.tsx} (100%) rename lib/chips/{TMUX4051BQBR.circuit.tsx => TMUX4051BQBR.tsx} (100%) rename lib/chips/{TMUX5411PWR.circuit.tsx => TMUX5411PWR.tsx} (100%) rename lib/chips/{TMUXHS4212RKSR.circuit.tsx => TMUXHS4212RKSR.tsx} (100%) rename lib/chips/{TPD1E01B04DPYR.circuit.tsx => TPD1E01B04DPYR.tsx} (100%) rename lib/chips/{TPD1E04U04DPYT.circuit.tsx => TPD1E04U04DPYT.tsx} (100%) rename lib/chips/{TPD1E0B04DPLT.circuit.tsx => TPD1E0B04DPLT.tsx} (100%) rename lib/chips/{TPD1E10B06DYAR.circuit.tsx => TPD1E10B06DYAR.tsx} (100%) rename lib/chips/{TPD1E1B04DPYR.circuit.tsx => TPD1E1B04DPYR.tsx} (100%) rename lib/chips/{TPD2E001DRSR.circuit.tsx => TPD2E001DRSR.tsx} (100%) rename lib/chips/{TPD2E007DCKR.circuit.tsx => TPD2E007DCKR.tsx} (100%) rename lib/chips/{TPD2E1B06DRLR.circuit.tsx => TPD2E1B06DRLR.tsx} (100%) rename lib/chips/{TPD2E2U06DRLR.circuit.tsx => TPD2E2U06DRLR.tsx} (100%) rename lib/chips/{TPD2EUSB30DRTR.circuit.tsx => TPD2EUSB30DRTR.tsx} (100%) rename lib/chips/{TPD2S017DBVR.circuit.tsx => TPD2S017DBVR.tsx} (100%) rename lib/chips/{TPD2S300YFFR.circuit.tsx => TPD2S300YFFR.tsx} (100%) rename lib/chips/{TPD4E001DCKR.circuit.tsx => TPD4E001DCKR.tsx} (100%) rename lib/chips/{TPD4E001QDBVRQ1.circuit.tsx => TPD4E001QDBVRQ1.tsx} (100%) rename lib/chips/{TPD4E05U06DQAR.circuit.tsx => TPD4E05U06DQAR.tsx} (100%) rename lib/chips/{TPD4E1U06DCKR.circuit.tsx => TPD4E1U06DCKR.tsx} (100%) rename lib/chips/{TPD4F003DQDR.circuit.tsx => TPD4F003DQDR.tsx} (100%) rename lib/chips/{TPD4S012DRYR.circuit.tsx => TPD4S012DRYR.tsx} (100%) rename lib/chips/{TPD4S480RUKR.circuit.tsx => TPD4S480RUKR.tsx} (100%) rename lib/chips/{TPD6E001RSFR.circuit.tsx => TPD6E001RSFR.tsx} (100%) rename lib/chips/{TPD6S300ARUKR.circuit.tsx => TPD6S300ARUKR.tsx} (100%) rename lib/chips/{TPL5100DGSR.circuit.tsx => TPL5100DGSR.tsx} (100%) rename lib/chips/{TPL5110DDCT.circuit.tsx => TPL5110DDCT.tsx} (100%) rename lib/chips/{TPL5111DDCR.circuit.tsx => TPL5111DDCR.tsx} (100%) rename lib/chips/{TPL7407LADR.circuit.tsx => TPL7407LADR.tsx} (100%) rename lib/chips/{TPS16630PWPR.circuit.tsx => TPS16630PWPR.tsx} (100%) rename lib/chips/{TPS1HC03PQVAHRQ1.circuit.tsx => TPS1HC03PQVAHRQ1.tsx} (100%) rename lib/chips/{TPS1HC100BQPWPRQ1.circuit.tsx => TPS1HC100BQPWPRQ1.tsx} (100%) rename lib/chips/{TPS2121RUXR.circuit.tsx => TPS2121RUXR.tsx} (100%) rename lib/chips/{TPS22860DBVR.circuit.tsx => TPS22860DBVR.tsx} (100%) rename lib/chips/{TPS22910AYZVR.circuit.tsx => TPS22910AYZVR.tsx} (100%) rename lib/chips/{TPS22912CYZVR.circuit.tsx => TPS22912CYZVR.tsx} (100%) rename lib/chips/{TPS22916BYFPR.circuit.tsx => TPS22916BYFPR.tsx} (100%) rename lib/chips/{TPS22918DBVT.circuit.tsx => TPS22918DBVT.tsx} (100%) rename lib/chips/{TPS22919.circuit.tsx => TPS22919.tsx} (100%) rename lib/chips/{TPS22945DCKR.circuit.tsx => TPS22945DCKR.tsx} (100%) rename lib/chips/{TPS22946YZPR.circuit.tsx => TPS22946YZPR.tsx} (100%) rename lib/chips/{TPS22948DCKR.circuit.tsx => TPS22948DCKR.tsx} (100%) rename lib/chips/{TPS22970YZPR.circuit.tsx => TPS22970YZPR.tsx} (100%) rename lib/chips/{TPS22975NDSGR.circuit.tsx => TPS22975NDSGR.tsx} (100%) rename lib/chips/{TPS22990DMLR.circuit.tsx => TPS22990DMLR.tsx} (100%) rename lib/chips/{TPS22991CNRAAR.circuit.tsx => TPS22991CNRAAR.tsx} (100%) rename lib/chips/{TPS22992SRXNR.circuit.tsx => TPS22992SRXNR.tsx} (100%) rename lib/chips/{TPS22995RZFR.circuit.tsx => TPS22995RZFR.tsx} (100%) rename lib/chips/{TPS2400DBVR.circuit.tsx => TPS2400DBVR.tsx} (100%) rename lib/chips/{TPS24750RUVR.circuit.tsx => TPS24750RUVR.tsx} (100%) rename lib/chips/{TPS2491DGS.circuit.tsx => TPS2491DGS.tsx} (100%) rename lib/chips/{TPS25221DBVR.circuit.tsx => TPS25221DBVR.tsx} (100%) rename lib/chips/{TPS2553DDBVR.circuit.tsx => TPS2553DDBVR.tsx} (100%) rename lib/chips/{TPS2590RSAR.circuit.tsx => TPS2590RSAR.tsx} (100%) rename lib/chips/{TPS259241DRCR.circuit.tsx => TPS259241DRCR.tsx} (100%) rename lib/chips/{TPS259461ARPWR.circuit.tsx => TPS259461ARPWR.tsx} (100%) rename lib/chips/{TPS259472ARPWR.circuit.tsx => TPS259472ARPWR.tsx} (100%) rename lib/chips/{TPS259481AYWPR.circuit.tsx => TPS259481AYWPR.tsx} (100%) rename lib/chips/{TPS259541DSGR.circuit.tsx => TPS259541DSGR.tsx} (100%) rename lib/chips/{TPS25972ARPWR.circuit.tsx => TPS25972ARPWR.tsx} (100%) rename lib/chips/{TPS259814LRPWR.circuit.tsx => TPS259814LRPWR.tsx} (100%) rename lib/chips/{TPS259830ONRGER.circuit.tsx => TPS259830ONRGER.tsx} (100%) rename lib/chips/{TPS26400PWPR.circuit.tsx => TPS26400PWPR.tsx} (100%) rename lib/chips/{TPS26600PWPR.circuit.tsx => TPS26600PWPR.tsx} (100%) rename lib/chips/{TPS26625DRCR.circuit.tsx => TPS26625DRCR.tsx} (100%) rename lib/chips/{TPS26632RGET.circuit.tsx => TPS26632RGET.tsx} (100%) rename lib/chips/{TPS27081ADDCR.circuit.tsx => TPS27081ADDCR.tsx} (100%) rename lib/chips/{TPS2HC08PQVAHRQ1.circuit.tsx => TPS2HC08PQVAHRQ1.tsx} (100%) rename lib/chips/{TPS2HC16PQVAHRQ1.circuit.tsx => TPS2HC16PQVAHRQ1.tsx} (100%) rename lib/chips/{TPS3106K33DBVR.circuit.tsx => TPS3106K33DBVR.tsx} (100%) rename lib/chips/{TPS3305_18DGNR.circuit.tsx => TPS3305_18DGNR.tsx} (100%) rename lib/chips/{TPS3424A11C13ADRLR.circuit.tsx => TPS3424A11C13ADRLR.tsx} (100%) rename lib/chips/{TPS3435JFMAFDSER.circuit.tsx => TPS3435JFMAFDSER.tsx} (100%) rename lib/chips/{TPS35AA38AGADDFRQ1.circuit.tsx => TPS35AA38AGADDFRQ1.tsx} (100%) rename lib/chips/{TPS3700DDCT.circuit.tsx => TPS3700DDCT.tsx} (100%) rename lib/chips/{TPS3700QDDCRQ1.circuit.tsx => TPS3700QDDCRQ1.tsx} (100%) rename lib/chips/{TPS3702CX33DDCR.circuit.tsx => TPS3702CX33DDCR.tsx} (100%) rename lib/chips/{TPS3710DDCR.circuit.tsx => TPS3710DDCR.tsx} (100%) rename lib/chips/{TPS3808EG33DBVR.circuit.tsx => TPS3808EG33DBVR.tsx} (100%) rename lib/chips/{TPS3823_33DBVR.circuit.tsx => TPS3823_33DBVR.tsx} (100%) rename lib/chips/{TPS3828_50DBVR.circuit.tsx => TPS3828_50DBVR.tsx} (100%) rename lib/chips/{TPS3831G18DQNR.circuit.tsx => TPS3831G18DQNR.tsx} (100%) rename lib/chips/{TPS3840DL28DBVR.circuit.tsx => TPS3840DL28DBVR.tsx} (100%) rename lib/chips/{TPS386000RGPR.circuit.tsx => TPS386000RGPR.tsx} (100%) rename lib/chips/{TPS389006007RTER.circuit.tsx => TPS389006007RTER.tsx} (100%) rename lib/chips/{TPS389030DSER.circuit.tsx => TPS389030DSER.tsx} (100%) rename lib/chips/{TPS40210QDGQRQ1.circuit.tsx => TPS40210QDGQRQ1.tsx} (100%) rename lib/chips/{TPS43061RTET.circuit.tsx => TPS43061RTET.tsx} (100%) rename lib/chips/{TPS51200DRCR.circuit.tsx => TPS51200DRCR.tsx} (100%) rename lib/chips/{TPS51206DSQR.circuit.tsx => TPS51206DSQR.tsx} (100%) rename lib/chips/{TPS54201DDCT.circuit.tsx => TPS54201DDCT.tsx} (100%) rename lib/chips/{TPS54338RQFR.circuit.tsx => TPS54338RQFR.tsx} (100%) rename lib/chips/{TPS54386PWPR.circuit.tsx => TPS54386PWPR.tsx} (100%) rename lib/chips/{TPS54538RQFR.circuit.tsx => TPS54538RQFR.tsx} (100%) rename lib/chips/{TPS55285VALR.circuit.tsx => TPS55285VALR.tsx} (100%) rename lib/chips/{TPS560430XDBVR.circuit.tsx => TPS560430XDBVR.tsx} (100%) rename lib/chips/{TPS561243DRLR.circuit.tsx => TPS561243DRLR.tsx} (100%) rename lib/chips/{TPS563252DRLR.circuit.tsx => TPS563252DRLR.tsx} (100%) rename lib/chips/{TPS564252DRLR.circuit.tsx => TPS564252DRLR.tsx} (100%) rename lib/chips/{TPS565242DRLR.circuit.tsx => TPS565242DRLR.tsx} (100%) rename lib/chips/{TPS566231PRQFR.circuit.tsx => TPS566231PRQFR.tsx} (100%) rename lib/chips/{TPS61021ADSGR.circuit.tsx => TPS61021ADSGR.tsx} (100%) rename lib/chips/{TPS61094DSSR.circuit.tsx => TPS61094DSSR.tsx} (100%) rename lib/chips/{TPS61096ADSSR.circuit.tsx => TPS61096ADSSR.tsx} (100%) rename lib/chips/{TPS61158DRVR.circuit.tsx => TPS61158DRVR.tsx} (100%) rename lib/chips/{TPS61161DRVR.circuit.tsx => TPS61161DRVR.tsx} (100%) rename lib/chips/{TPS61165DRVR.circuit.tsx => TPS61165DRVR.tsx} (100%) rename lib/chips/{TPS61169DCKR.circuit.tsx => TPS61169DCKR.tsx} (100%) rename lib/chips/{TPS61222.circuit.tsx => TPS61222.tsx} (86%) rename lib/chips/{TPS61222DCKR.circuit.tsx => TPS61222DCKR.tsx} (100%) rename lib/chips/{TPS61299DRLR.circuit.tsx => TPS61299DRLR.tsx} (100%) rename lib/chips/{TPS61299X.circuit.tsx => TPS61299X.tsx} (88%) rename lib/chips/{TPS613771RYHR.circuit.tsx => TPS613771RYHR.tsx} (100%) rename lib/chips/{TPS62177DQCT.circuit.tsx => TPS62177DQCT.tsx} (100%) rename lib/chips/{TPS62824ADMQR.circuit.tsx => TPS62824ADMQR.tsx} (100%) rename lib/chips/{TPS62842DGRR.circuit.tsx => TPS62842DGRR.tsx} (100%) rename lib/chips/{TPS628502QDRLRQ1.circuit.tsx => TPS628502QDRLRQ1.tsx} (100%) rename lib/chips/{TPS6293.circuit.tsx => TPS6293.tsx} (100%) rename lib/chips/{TPS62933PDRLR.circuit.tsx => TPS62933PDRLR.tsx} (100%) rename lib/chips/{TPS62A01PDDCR.circuit.tsx => TPS62A01PDDCR.tsx} (100%) rename lib/chips/{TPS62A03ADRLR.circuit.tsx => TPS62A03ADRLR.tsx} (100%) rename lib/chips/{TPS631000DRLR.circuit.tsx => TPS631000DRLR.tsx} (100%) rename lib/chips/{TPS63802.circuit.tsx => TPS63802.tsx} (88%) rename lib/chips/{TPS63802DLAR.circuit.tsx => TPS63802DLAR.tsx} (100%) rename lib/chips/{TPS63900DSKR.circuit.tsx => TPS63900DSKR.tsx} (100%) rename lib/chips/{TPS65023BRSBR.circuit.tsx => TPS65023BRSBR.tsx} (100%) rename lib/chips/{TPS650250RHBT.circuit.tsx => TPS650250RHBT.tsx} (100%) rename lib/chips/{TPS65105PWPR.circuit.tsx => TPS65105PWPR.tsx} (100%) rename lib/chips/{TPS65130RGER.circuit.tsx => TPS65130RGER.tsx} (100%) rename lib/chips/{TPS65145RGER.circuit.tsx => TPS65145RGER.tsx} (100%) rename lib/chips/{TPS6521401VAFR.circuit.tsx => TPS6521401VAFR.tsx} (100%) rename lib/chips/{TPS65217CRSLR.circuit.tsx => TPS65217CRSLR.tsx} (100%) rename lib/chips/{TPS6521815RSLR.circuit.tsx => TPS6521815RSLR.tsx} (100%) rename lib/chips/{TPS6521835.circuit.tsx => TPS6521835.tsx} (100%) rename lib/chips/{TPS6521902RSMR.circuit.tsx => TPS6521902RSMR.tsx} (100%) rename lib/chips/{TPS6522430RAHRQ1.circuit.tsx => TPS6522430RAHRQ1.tsx} (100%) rename lib/chips/{TPS65296RJER.circuit.tsx => TPS65296RJER.tsx} (100%) rename lib/chips/{TPS65381AQDAPRQ1.circuit.tsx => TPS65381AQDAPRQ1.tsx} (100%) rename lib/chips/{TPS65910A31A1RSLR.circuit.tsx => TPS65910A31A1RSLR.tsx} (100%) rename lib/chips/{TPS65930A2ZCHR.circuit.tsx => TPS65930A2ZCHR.tsx} (100%) rename lib/chips/{TPS65931211RWERQ1.circuit.tsx => TPS65931211RWERQ1.tsx} (100%) rename lib/chips/{TPS70950QDBVRQ1.circuit.tsx => TPS70950QDBVRQ1.tsx} (100%) rename lib/chips/{TPS76350QDBVRQ1.circuit.tsx => TPS76350QDBVRQ1.tsx} (100%) rename lib/chips/{TPS78233DDCR.circuit.tsx => TPS78233DDCR.tsx} (100%) rename lib/chips/{TPS7A02.circuit.tsx => TPS7A02.tsx} (87%) rename lib/chips/{TPS7A0230PDBVR.circuit.tsx => TPS7A0230PDBVR.tsx} (100%) rename lib/chips/{TPS7A1633DGNR.circuit.tsx => TPS7A1633DGNR.tsx} (100%) rename lib/chips/{TPS7A20.circuit.tsx => TPS7A20.tsx} (88%) rename lib/chips/{TPS7A2018PDBVR.circuit.tsx => TPS7A2018PDBVR.tsx} (100%) rename lib/chips/{TPS7A2028PDBVR.circuit.tsx => TPS7A2028PDBVR.tsx} (100%) rename lib/chips/{TPS7A2033PDBVR.circuit.tsx => TPS7A2033PDBVR.tsx} (100%) rename lib/chips/{TPS7A2525DRVR.circuit.tsx => TPS7A2525DRVR.tsx} (100%) rename lib/chips/{TPS7A4901DGNR.circuit.tsx => TPS7A4901DGNR.tsx} (100%) rename lib/chips/{TPS7A5301BRPSR.circuit.tsx => TPS7A5301BRPSR.tsx} (100%) rename lib/chips/{TPS7A9401DSCR.circuit.tsx => TPS7A9401DSCR.tsx} (100%) rename lib/chips/{TPS7A9601DSCR.circuit.tsx => TPS7A9601DSCR.tsx} (100%) rename lib/chips/{TPS7B4255QDBVRQ1.circuit.tsx => TPS7B4255QDBVRQ1.tsx} (100%) rename lib/chips/{TPS7B4260QDDARQ1.circuit.tsx => TPS7B4260QDDARQ1.tsx} (100%) rename lib/chips/{TPS7E7101DBVR.circuit.tsx => TPS7E7101DBVR.tsx} (100%) rename lib/chips/{TPS7E8150DBVR.circuit.tsx => TPS7E8150DBVR.tsx} (100%) rename lib/chips/{TPS92200D2RXLR.circuit.tsx => TPS92200D2RXLR.tsx} (100%) rename lib/chips/{TPS922051D1DGNR.circuit.tsx => TPS922051D1DGNR.tsx} (100%) rename lib/chips/{TPS92612DBVR.circuit.tsx => TPS92612DBVR.tsx} (100%) rename lib/chips/{TPS92640PWPR_NOPB.circuit.tsx => TPS92640PWPR_NOPB.tsx} (100%) rename lib/chips/{TPS92761QPHPRQ1.circuit.tsx => TPS92761QPHPRQ1.tsx} (100%) rename lib/chips/{TPSM64406RCHR.circuit.tsx => TPSM64406RCHR.tsx} (100%) rename lib/chips/{TPSM828214SILR.circuit.tsx => TPSM828214SILR.tsx} (100%) rename lib/chips/{TPSM828223SILR.circuit.tsx => TPSM828223SILR.tsx} (100%) rename lib/chips/{TPSM82823.circuit.tsx => TPSM82823.tsx} (100%) rename lib/chips/{TPSM828301ARDSR.circuit.tsx => TPSM828301ARDSR.tsx} (100%) rename lib/chips/{TPSM828303ARDSR.circuit.tsx => TPSM828303ARDSR.tsx} (100%) rename lib/chips/{TPSM82901SISR.circuit.tsx => TPSM82901SISR.tsx} (100%) rename lib/chips/{TPSM82903SISR.circuit.tsx => TPSM82903SISR.tsx} (100%) rename lib/chips/{TPSM843620SITR.circuit.tsx => TPSM843620SITR.tsx} (100%) rename lib/chips/{TPSM863252RDXR.circuit.tsx => TPSM863252RDXR.tsx} (100%) rename lib/chips/{TPSM8A29RDGR.circuit.tsx => TPSM8A29RDGR.tsx} (100%) rename lib/chips/{TRF7960RHB.circuit.tsx => TRF7960RHB.tsx} (100%) rename lib/chips/{TRF7964ARHBR.circuit.tsx => TRF7964ARHBR.tsx} (100%) rename lib/chips/{TRF7970ARHBR.circuit.tsx => TRF7970ARHBR.tsx} (100%) rename lib/chips/{TRS3122ERGER.circuit.tsx => TRS3122ERGER.tsx} (100%) rename lib/chips/{TRS3232EIRGTR.circuit.tsx => TRS3232EIRGTR.tsx} (100%) rename lib/chips/{TRS3243ECDBR.circuit.tsx => TRS3243ECDBR.tsx} (100%) rename lib/chips/{TRS3318EIPWR.circuit.tsx => TRS3318EIPWR.tsx} (100%) rename lib/chips/{TRS3386ECPWR.circuit.tsx => TRS3386ECPWR.tsx} (100%) rename lib/chips/{TRSF3223EIRGWR.circuit.tsx => TRSF3223EIRGWR.tsx} (100%) rename lib/chips/{TS3DV642RUATQ1.circuit.tsx => TS3DV642RUATQ1.tsx} (100%) rename lib/chips/{TS3USB221RSER.circuit.tsx => TS3USB221RSER.tsx} (100%) rename lib/chips/{TS5A3157DCKR.circuit.tsx => TS5A3157DCKR.tsx} (100%) rename lib/chips/{TS5A3159ADBVR.circuit.tsx => TS5A3159ADBVR.tsx} (100%) rename lib/chips/{TS5A3160DBVR.circuit.tsx => TS5A3160DBVR.tsx} (100%) rename lib/chips/{TS5A3166DBVR.circuit.tsx => TS5A3166DBVR.tsx} (100%) rename lib/chips/{TS5A3166QDCKRQ1.circuit.tsx => TS5A3166QDCKRQ1.tsx} (100%) rename lib/chips/{TS5A9411DCKR.circuit.tsx => TS5A9411DCKR.tsx} (100%) rename lib/chips/{TSD05DYFR.circuit.tsx => TSD05DYFR.tsx} (100%) rename lib/chips/{TSM24CADBZR.circuit.tsx => TSM24CADBZR.tsx} (100%) rename lib/chips/{TUSB1004RNQR.circuit.tsx => TUSB1004RNQR.tsx} (100%) rename lib/chips/{TUSB1046_DCIRNQR.circuit.tsx => TUSB1046_DCIRNQR.tsx} (100%) rename lib/chips/{TUSB8041RGCR.circuit.tsx => TUSB8041RGCR.tsx} (100%) rename lib/chips/{TUSB8042ARGCR.circuit.tsx => TUSB8042ARGCR.tsx} (100%) rename lib/chips/{TVS0500DRVR.circuit.tsx => TVS0500DRVR.tsx} (100%) rename lib/chips/{TVS1400DRVR.circuit.tsx => TVS1400DRVR.tsx} (100%) rename lib/chips/{TVS1401DRBR.circuit.tsx => TVS1401DRBR.tsx} (100%) rename lib/chips/{TVS2700DRVR.circuit.tsx => TVS2700DRVR.tsx} (100%) rename lib/chips/{TVS3300YZFR.circuit.tsx => TVS3300YZFR.tsx} (100%) rename lib/chips/{TXB0104.circuit.tsx => TXB0104.tsx} (89%) rename lib/chips/{TXB0104RGYR.circuit.tsx => TXB0104RGYR.tsx} (100%) rename lib/chips/{TXE8124DGSR.circuit.tsx => TXE8124DGSR.tsx} (100%) rename lib/chips/{TXS0102.circuit.tsx => TXS0102.tsx} (88%) rename lib/chips/{TXS0102DCUR.circuit.tsx => TXS0102DCUR.tsx} (100%) rename lib/chips/{TXS0104ERGYR.circuit.tsx => TXS0104ERGYR.tsx} (100%) rename lib/chips/{TXS0108EPWR.circuit.tsx => TXS0108EPWR.tsx} (100%) rename lib/chips/{TXV0108QWRGYRQ1.circuit.tsx => TXV0108QWRGYRQ1.tsx} (100%) rename lib/chips/{UA78M05CDCYR.circuit.tsx => UA78M05CDCYR.tsx} (100%) rename lib/chips/{UC2845D8TR.circuit.tsx => UC2845D8TR.tsx} (100%) rename lib/chips/{UCC21330ADR.circuit.tsx => UCC21330ADR.tsx} (100%) rename lib/chips/{UCC21550ADWR.circuit.tsx => UCC21550ADWR.tsx} (100%) rename lib/chips/{UCC21750DWR.circuit.tsx => UCC21750DWR.tsx} (100%) rename lib/chips/{UCC23525CDWYR.circuit.tsx => UCC23525CDWYR.tsx} (100%) rename lib/chips/{UCC24610DRBR.circuit.tsx => UCC24610DRBR.tsx} (100%) rename lib/chips/{UCC24612_2DBVR.circuit.tsx => UCC24612_2DBVR.tsx} (100%) rename lib/chips/{UCC24624DT.circuit.tsx => UCC24624DT.tsx} (100%) rename lib/chips/{UCC24630DBVT.circuit.tsx => UCC24630DBVT.tsx} (100%) rename lib/chips/{UCC24636DBVR.circuit.tsx => UCC24636DBVR.tsx} (100%) rename lib/chips/{UCC25600DR.circuit.tsx => UCC25600DR.tsx} (100%) rename lib/chips/{UCC256610DDBR.circuit.tsx => UCC256610DDBR.tsx} (100%) rename lib/chips/{UCC25800AQDGNRQ1.circuit.tsx => UCC25800AQDGNRQ1.tsx} (100%) rename lib/chips/{UCC27201ADDAR.circuit.tsx => UCC27201ADDAR.tsx} (100%) rename lib/chips/{UCC27211DR.circuit.tsx => UCC27211DR.tsx} (100%) rename lib/chips/{UCC27301ADR.circuit.tsx => UCC27301ADR.tsx} (100%) rename lib/chips/{UCC27302ADRCR.circuit.tsx => UCC27302ADRCR.tsx} (100%) rename lib/chips/{UCC27332QDGNRQ1.circuit.tsx => UCC27332QDGNRQ1.tsx} (100%) rename lib/chips/{UCC27444DR.circuit.tsx => UCC27444DR.tsx} (100%) rename lib/chips/{UCC27511ADBVT.circuit.tsx => UCC27511ADBVT.tsx} (100%) rename lib/chips/{UCC27517ADBVR.circuit.tsx => UCC27517ADBVR.tsx} (100%) rename lib/chips/{UCC27523D.circuit.tsx => UCC27523D.tsx} (100%) rename lib/chips/{UCC27614DR.circuit.tsx => UCC27614DR.tsx} (100%) rename lib/chips/{UCC27624DSDR.circuit.tsx => UCC27624DSDR.tsx} (100%) rename lib/chips/{UCC27734DR.circuit.tsx => UCC27734DR.tsx} (100%) rename lib/chips/{UCC27735DR.circuit.tsx => UCC27735DR.tsx} (100%) rename lib/chips/{UCC28019ADR.circuit.tsx => UCC28019ADR.tsx} (100%) rename lib/chips/{UCC2803DTR.circuit.tsx => UCC2803DTR.tsx} (100%) rename lib/chips/{UCC28051DR.circuit.tsx => UCC28051DR.tsx} (100%) rename lib/chips/{UCC28056BDBVR.circuit.tsx => UCC28056BDBVR.tsx} (100%) rename lib/chips/{UCC2805DTR.circuit.tsx => UCC2805DTR.tsx} (100%) rename lib/chips/{UCC28070PWR.circuit.tsx => UCC28070PWR.tsx} (100%) rename lib/chips/{UCC28070QPWRQ1.circuit.tsx => UCC28070QPWRQ1.tsx} (100%) rename lib/chips/{UCC28180DR.circuit.tsx => UCC28180DR.tsx} (100%) rename lib/chips/{UCC28600DR.circuit.tsx => UCC28600DR.tsx} (100%) rename lib/chips/{UCC28700DBVT.circuit.tsx => UCC28700DBVT.tsx} (100%) rename lib/chips/{UCC28711DR.circuit.tsx => UCC28711DR.tsx} (100%) rename lib/chips/{UCC28740DR.circuit.tsx => UCC28740DR.tsx} (100%) rename lib/chips/{UCC287501DBVR.circuit.tsx => UCC287501DBVR.tsx} (100%) rename lib/chips/{UCC28881D.circuit.tsx => UCC28881D.tsx} (100%) rename lib/chips/{UCC28910DR.circuit.tsx => UCC28910DR.tsx} (100%) rename lib/chips/{UCC28911DR.circuit.tsx => UCC28911DR.tsx} (100%) rename lib/chips/{UCC28950PWR.circuit.tsx => UCC28950PWR.tsx} (100%) rename lib/chips/{UCC28C50DGKR.circuit.tsx => UCC28C50DGKR.tsx} (100%) rename lib/chips/{UCC28C52DR.circuit.tsx => UCC28C52DR.tsx} (100%) rename lib/chips/{UCC28C53DR.circuit.tsx => UCC28C53DR.tsx} (100%) rename lib/chips/{UCC28C54DR.circuit.tsx => UCC28C54DR.tsx} (100%) rename lib/chips/{UCC28C55DR.circuit.tsx => UCC28C55DR.tsx} (100%) rename lib/chips/{UCC29950DR.circuit.tsx => UCC29950DR.tsx} (100%) rename lib/chips/{UCC33420QRAQRQ1.circuit.tsx => UCC33420QRAQRQ1.tsx} (100%) rename lib/chips/{UCC33420RAQR.circuit.tsx => UCC33420RAQR.tsx} (100%) rename lib/chips/{UCC38C42DR.circuit.tsx => UCC38C42DR.tsx} (100%) rename lib/chips/{UCC38C43DR.circuit.tsx => UCC38C43DR.tsx} (100%) rename lib/chips/{UCC38C45DR.circuit.tsx => UCC38C45DR.tsx} (100%) rename lib/chips/{UCC5320ECDR.circuit.tsx => UCC5320ECDR.tsx} (100%) rename lib/chips/{UCC5350SBDR.circuit.tsx => UCC5350SBDR.tsx} (100%) rename lib/chips/{UCC5390ECDWVR.circuit.tsx => UCC5390ECDWVR.tsx} (100%) rename lib/chips/{UCC57108CDR.circuit.tsx => UCC57108CDR.tsx} (100%) rename lib/chips/{UCD3138ARGCR.circuit.tsx => UCD3138ARGCR.tsx} (100%) rename lib/chips/{UCD7138DRSR.circuit.tsx => UCD7138DRSR.tsx} (100%) rename lib/chips/{UCD90160RGCT.circuit.tsx => UCD90160RGCT.tsx} (100%) rename lib/chips/{UCG28828_1REZR.circuit.tsx => UCG28828_1REZR.tsx} (100%) rename lib/chips/{ULN2003AIDR.circuit.tsx => ULN2003AIDR.tsx} (100%) rename lib/chips/{ULN2803CDWR.circuit.tsx => ULN2803CDWR.tsx} (100%) rename lib/chips/{W25Q128JVSIQ.circuit.tsx => W25Q128JVSIQ.tsx} (100%) rename lib/chips/{XI6432BAFCLIMBBR.circuit.tsx => XI6432BAFCLIMBBR.tsx} (100%) rename lib/chips/{XM33C321ASPZR.circuit.tsx => XM33C321ASPZR.tsx} (100%) rename lib/chips/{XMSPM0G1218SRGZR.circuit.tsx => XMSPM0G1218SRGZR.tsx} (100%) rename lib/chips/{XTR200DQCR.circuit.tsx => XTR200DQCR.tsx} (100%) delete mode 100644 lib/chips/ti-official-footprint-catalog.json delete mode 100644 lib/chips/ti-sysblocks-footprint-selections.json delete mode 100644 lib/chips/ti-sysblocks-materialization-report.json create mode 100644 scripts/generate-ti-reference-examples.ts delete mode 100644 scripts/materialize-ti-datasheet-components.test.ts delete mode 100644 scripts/materialize-ti-datasheet-components.ts create mode 100644 scripts/ti-reference-example-schema.test.ts create mode 100644 scripts/ti-reference-example-schema.ts create mode 100644 scripts/validate-ti-reference-examples.ts diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 00000000..46af309a --- /dev/null +++ b/.gitattributes @@ -0,0 +1 @@ +*.snap.svg -whitespace diff --git a/README.md b/README.md index 3bc359d3..79857331 100644 --- a/README.md +++ b/README.md @@ -242,7 +242,9 @@ The package also exports: The `lib/chips` directory contains the low-level TI chip components. Most files represent an individual manufacturer part number and define details such as pin labels, aliases, supplier part numbers, and the physical footprint used by -tscircuit. +tscircuit. Chip definitions are ordinary `*.tsx` component modules; the +`*.circuit.tsx` suffix is reserved for runnable circuit entrypoints such as +reference examples, subcircuits, and simulations. Import chips from the package entrypoint by their short names, such as `BQ24074`, `INA237`, or `TPS7A02`. The underlying MPN-named definitions remain @@ -265,6 +267,13 @@ For example, `PowerMonitor_INA237` comes from The `lib/subcircuits/__snapshots__` directory contains generated schematic and PCB SVG snapshots used to check visual output. +### `examples` + +The `examples` directory contains runnable `*.circuit.tsx` TI reference +schematics. Their checked-in snapshots are schematic-only so the reference +component placement and wiring can be reviewed without running analog +simulations or generating PCB output. + ### `lib/simulations` The `lib/simulations` directory contains example circuits for simulation-focused @@ -310,9 +319,28 @@ bun run generate:ti-sysblocks bun run validate:ti-sysblocks ``` +Reference examples are registered in `examples/ti-reference-examples.json` +with the exact TI figure used for connectivity and schematic placement. The +strict validator requires every catalog family to have one example and one +schematic snapshot; use `--allow-partial` only while adding the remaining +references: + +```bash +bun run validate:ti-reference-examples +bun scripts/validate-ti-reference-examples.ts --allow-partial --verify-evidence +``` + Update visual snapshots when intentional schematic, PCB, or simulation output changes: ```bash bun run snapshot:update ``` + +Check or update only the schematic snapshots for TI reference examples. These +commands skip simulation and PCB output: + +```bash +bun run snapshot:schematics +bun run snapshot:schematics:update +``` diff --git a/examples/LM358B_InvertingAmplifier.circuit.tsx b/examples/LM358B_InvertingAmplifier.circuit.tsx new file mode 100644 index 00000000..a4684343 --- /dev/null +++ b/examples/LM358B_InvertingAmplifier.circuit.tsx @@ -0,0 +1,259 @@ +import "tscircuit"; +import { LM358BIPWR } from "../lib/chips/LM358BIPWR.tsx"; + +const PRIMARY = "#8b0000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI LM358B datasheet (SLOS068AB), Figure 8-1, "Application Schematic": + * https://www.ti.com/lit/ds/symlink/lm358b.pdf#page=27 + * + * The values are TI's worked example from section 8.2.2: RI = 10 kOhm and + * RF = 36 kOhm for a gain of -3.6. Placement follows Figure 8-1, including + * the feedback resistor above the op amp and the grounded lower input. + */ +export default () => ( + + + + + + + + + + {/* TI Figure 8-1 uses the conventional minus-above-plus ordering. */} + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + +); diff --git a/examples/OPA371D_LowSideCurrentSense.circuit.tsx b/examples/OPA371D_LowSideCurrentSense.circuit.tsx new file mode 100644 index 00000000..c4144e53 --- /dev/null +++ b/examples/OPA371D_LowSideCurrentSense.circuit.tsx @@ -0,0 +1,186 @@ +// Generated by scripts/generate-ti-reference-examples.ts. +// Do not edit by hand; update examples/ti-reference-examples.json. +import { OPA371DDBVR } from "../lib/chips/OPA371DDBVR.tsx"; +import "tscircuit"; + +/** + * OPA371D Low-Side Current-Sense Reference + * + * TI source: https://www.ti.com/lit/gpn/OPA371D + * Document viewer: https://www.ti.com/document-viewer/OPA371D/datasheet/GUID-03C60932-F0E0-4CDB-9FB0-C73F5C680C80 + * Figure 7-1: Low-Side, Current-Sensing Application + * Figure asset: https://www.ti.com/ods/images/SLVSM48A/GUID-B2DF1A69-DA22-4522-9874-1574F18368E7-low.gif + * Scope: Complete Figure 7-1 signal path and feedback network; ZLOAD remains symbolic because TI does not specify its impedance. + */ +export default () => ( + + + + .pin3", + inp2: ".U1 > .pin4", + out: ".U1 > .pin1", + "V+": ".U1 > .pin5", + "V-": ".U1 > .pin2", + }} + /> + + + + {/* ZLOAD; TI does not specify an impedance value. */} + + + + + + + + + {/* VBUS rail */} + + + {/* 5 V device supply */} + + + {/* RSHUNT ground return */} + + + {/* device negative supply ground */} + + + {/* RG ground return */} + + + {/* VOUT terminal */} + + + {/* VBUS feeds ZLOAD */} + + + {/* ZLOAD/RSHUNT junction drives the noninverting input */} + .2", ".R_SHUNT > .pin1", ".U1_OPAMP > .inp1"]} /> + + {/* RSHUNT returns to ground */} + + + {/* amplifier output is VOUT and feeds RF */} + .out", ".R_F > .pin1", ".VOUT_TERMINAL > .1"]} /> + + {/* RF/RG gain divider feeds the inverting input */} + .pin2", ".R_G > .pin1", ".U1_OPAMP > .inp2"]} + schematicRouteHints={[ + { x: -0.8, y: -0.14 }, + { x: -0.8, y: -0.95 }, + { x: 1.5, y: -0.95 }, + ]} + /> + + {/* RG returns to ground */} + + + {/* device positive supply is 5 V */} + + + {/* device negative supply returns to ground */} + + + + + + + + +); diff --git a/examples/TPS7A20_TypicalApplication.circuit.tsx b/examples/TPS7A20_TypicalApplication.circuit.tsx new file mode 100644 index 00000000..ed1382ff --- /dev/null +++ b/examples/TPS7A20_TypicalApplication.circuit.tsx @@ -0,0 +1,231 @@ +import "tscircuit"; +import { TPS7A2028PDBVR } from "../lib/chips/TPS7A2028PDBVR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS7A20 datasheet (SBVS338H), Figure 7-4, "TPS7A20 Typical Application": + * https://www.ti.com/lit/ds/symlink/tps7a20.pdf#page=30 + * + * Figure 7-4 and Table 7-1 use the fixed 2.8 V device, with 1 uF input and + * output capacitors. Placement intentionally follows the TI figure: input and + * enable on the left, output on the right, and the three ground returns below. + */ +export default () => ( + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + + + + + + + + + +); diff --git a/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-schematic.snap.svg b/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-schematic.snap.svg index b69725ed..d2f5a567 100644 --- a/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-schematic.snap.svg +++ b/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-schematic.snap.svg @@ -9,7 +9,7 @@ .port-label { fill: rgb(0, 100, 100); } .component-name { fill: rgb(0, 100, 100); } - 112233445566AABBCCDDAdapterJ11DC_PLUS2GNDBQ24074RGTRU11TS2BAT4CE5EN26EN17PGOOD8VSS9CHG10OUT12ILIM13IN14TMR15ITERM16ISETC11uFC24.7uFBattery PackBT11TEMP2PACK_PLUS3PACK_MINUSC34.7uFR14.12kΩR21.18kΩR31.13kΩR41.5kΩgreenD1R51.5kΩredD2112233445566AABBCCDDAdapterJ11DC_PLUS2GNDBQ24074RGTRU11TS2BAT4CE5EN26EN17PGOOD8VSS9CHG10OUT12ILIM13IN14TMR15ITERM16ISETC11uFC24.7uFBattery PackBT11TEMP2PACK_PLUS3PACK_MINUSC34.7uFR14.12kΩR21.18kΩR31.13kΩR41.5kΩgreenD1R51.5kΩredD2INGNDGNDGNDTSTSTSBATBATBATBATOUTOUTOUTOUTN_PGOOD_LEDN_PGOOD_LEDU1_GNDN_CHG_LEDN_CHG_LEDU1_VINILIMILIMITERMITERMISETISETN_PGOOD_LED_AN_PGOOD_LED_AN_CHG_LED_AU1_GNDU1_VIN1.8 V Power1.8 V Power112233445566AABBCCDDTPS7A2018PDBVRU11VIN2GND3VEN5VOUTC11uFC21uFVINGNDVOUT_1V8U1_OUTU1_VSSU1_OUT112233445566AABBCCDDTPS7A2018PDBVRU11VIN2GND3VEN5VOUTC11uFC21uFU1_VSSU1A_VDD_IOCC2564C Bluetooth ControllerCC2564C Bluetooth Controller112233445566AABBCCDDCC2564CRVMRU1A2DIG_LDO_OUT3DIG_LDO_OUT4XTALM_FREFM5MLDO_OUT6SHUTD7CL1_5_LDO_OUT8ADC_PPA_LDO_OUT9MLDO_OUT12DCO_LDO_OUT14NC17VDD_IO25SLOW_CLK26HCI_RX29HCI_CTS32HCI_RTS33HCI_TX34VDD_IO35AUD_FSYNC38VDD_IO41SRAM_LDO_OUT42MLDO_OUT44XTALP_FREFP45MLDO_IN46CL1_5_LDO_IN47MLDO_OUT48BT_RF55DIG_LDO_OUT58VDD_IO59VDD_IO61VDD_IO62VDD_IO64TX_DBG65VDD_IO66DIG_LDO_OUT67DIG_LDO_OUT72AUD_CLK73AUD_OUT74AUD_IN75DIG_LDO_OUT76DIG_LDO_OUTASH7K-32.768KHZ-TY11E_D2GND3OUT4VCCR110kΩC180.1uFY226MHz / 8pFC1910pFC2010pFTP1C122pFLFB212G45SG8C341FL11GND2OUT3GND4INL133nHC20.5pFC30.1uFC40.1uFC50.1uFC60.1uFC71uFC81uFC91uFC100.1uFC110.1uFC120.1uFC130.1uFC140.1uFC150.47uFC160.47uFC170.1uF112233445566AABBCCDDCC2564CRVMRU1A2DIG_LDO_OUT3DIG_LDO_OUT4XTALM_FREFM5MLDO_OUT6SHUTD7CL1_5_LDO_OUT8ADC_PPA_LDO_OUT9MLDO_OUT12DCO_LDO_OUT14NC17VDD_IO25SLOW_CLK26HCI_RX29HCI_CTS32HCI_RTS33HCI_TX34VDD_IO35AUD_FSYNC38VDD_IO41SRAM_LDO_OUT42MLDO_OUT44XTALP_FREFP45MLDO_IN46CL1_5_LDO_IN47MLDO_OUT48BT_RF55DIG_LDO_OUT58VDD_IO59VDD_IO61VDD_IO62VDD_IO64TX_DBG65VDD_IO66DIG_LDO_OUT67DIG_LDO_OUT72AUD_CLK73AUD_OUT74AUD_IN75DIG_LDO_OUT76DIG_LDO_OUTASH7K-32.768KHZ-TY11E_D2GND3OUT4VCCR110kΩC180.1uFY226MHz / 8pFC1910pFC2010pFTP1C122pFLFB212G45SG8C341FL11GND2OUT3GND4INL133nHC20.5pFC30.1uFC40.1uFC50.1uFC60.1uFC71uFC81uFC91uFC100.1uFC110.1uFC120.1uFC130.1uFC140.1uFC150.47uFC160.47uFC170.1uFMLDO_OUTU10_P1_7_TA1_0ADC_PPA_LDO_OUTDCO_LDO_OUTDCO_LDO_OUTU1_VOUTU1_VOUTY1_OUTY1_OUTY1_OUTVDD_IOR10_pin2U10_P3_3_UCA0TXD_UCA0SIMOU10_P1_5_TA0_4U10_P1_4_TA0_3U10_P3_4_UCA0RXD_UCA0SOMIVDD_IOSRAM_LDO_OUTU1_WCLKSRAM_LDO_OUTSRAM_LDO_OUTXTALPXTALPXTALPVBATXTALPU1_OUTVBATBT_RFBT_RFTX_DBGTX_DBGU1_BCLKU1_DINCC_AUD_IN_1V8CC_AUD_IN_1V8XO_ENABLEGNDGNDGNDGNDGNDGNDVCC_1V8_32KXO_ENABLEGNDGNDGNDGNDGNDGNDVCC_1V8_32KRF_FILTER_INRF_FILTER_INANT_FEEDU10_P1_7_TA1_0U1_VOUTANT_FEEDR10_pin2U10_P3_3_UCA0TXD_UCA0SIMOU10_P1_5_TA0_4U10_P1_4_TA0_3U10_P3_4_UCA0RXD_UCA0SOMIU1_WCLKU1_OUTU1_BCLKU1_DINU1_VOUTANT1MSP430 Bluetooth Audio HostMSP430 Bluetooth Audio Host112233445566AABBCCDDMSP430F5229IRGCR1P6_0_CB02P6_1_CB13P6_2_CB24P6_3_CB35P6_4_CB46P6_5_CB57P6_6_CB68P6_7_CB79P5_010P5_111AVCC12P5_4_XIN13P5_5_XOUT14AVSS15DVCC16DVSS17VCORE18P1_0_TA0CLK_ACLK19P1_1_TA0_020P1_2_TA0_121P1_3_TA0_222P1_4_TA0_323P1_5_TA0_424P1_6_TA1CLK_CBOUT25P1_7_TA1_026P2_0_TA1_127P2_1_TA1_228P2_2_TA2CLK_SMCLK29P2_3_TA2_030P2_4_TA2_131P2_5_TA2_232P2_6_RTCCLK_DMAE033P2_7_UCB0STE_UCA0CLK34P3_0_UCB0SIMO_UCB0SDA35P3_1_UCB0SOMI_UCB0SCL36P3_2_UCB0CLK_UCA0STE37P3_3_UCA0TXD_UCA0SIMO38P3_4_UCA0RXD_UCA0SOMI39DVSS40DVIO41P4_042P4_143P4_244P4_345P4_4_PM_UCA1TXD46P4_5_PM_UCA1RXD47P4_648P4_749P7_050P7_151P7_252P7_353P7_454P7_555BSLEN56nRST_NMI57P5_258P5_359TEST_SBWTCK60PJ_0_TDO61PJ_1_TDI_TCLK62PJ_2_TMS63PJ_3_TCK64nRSTDVCC_SBWTDIO65EP_GNDY232.8kHzC4712pFC4612pFR1247kΩC442.2nFMSP430 RESETR2847kΩC432.2nFMSP430 JTAGJ21TDO2VCC3TDI4SENSE5TMS6NC67TCK8TEST_SBWTCK9GND10NC1011nRST_SBWTDIO12NC121314JTAG SENSE1VCC_52292JTAG_SENSEVDD_1V8J512POS 2 SWS3245613DEBUGJ1512SMCLK1SCAN-SWITCHScanSW DNI1S12S23S34S0R1010kΩR1118kΩR6470ΩyellowYLWR7470ΩredREDR15470ΩgreenGRNPREVIOUS / VOL_UPNEXT / VOL_DOWNPAUSE_PLAY - DNIR3175kΩR3275kΩR3375kΩC3710uFC391uFC41470nF112233445566AABBCCDDMSP430F5229IRGCR1P6_0_CB02P6_1_CB13P6_2_CB24P6_3_CB35P6_4_CB46P6_5_CB57P6_6_CB68P6_7_CB79P5_010P5_111AVCC12P5_4_XIN13P5_5_XOUT14AVSS15DVCC16DVSS17VCORE18P1_0_TA0CLK_ACLK19P1_1_TA0_020P1_2_TA0_121P1_3_TA0_222P1_4_TA0_323P1_5_TA0_424P1_6_TA1CLK_CBOUT25P1_7_TA1_026P2_0_TA1_127P2_1_TA1_228P2_2_TA2CLK_SMCLK29P2_3_TA2_030P2_4_TA2_131P2_5_TA2_232P2_6_RTCCLK_DMAE033P2_7_UCB0STE_UCA0CLK34P3_0_UCB0SIMO_UCB0SDA35P3_1_UCB0SOMI_UCB0SCL36P3_2_UCB0CLK_UCA0STE37P3_3_UCA0TXD_UCA0SIMO38P3_4_UCA0RXD_UCA0SOMI39DVSS40DVIO41P4_042P4_143P4_244P4_345P4_4_PM_UCA1TXD46P4_5_PM_UCA1RXD47P4_648P4_749P7_050P7_151P7_252P7_353P7_454P7_555BSLEN56nRST_NMI57P5_258P5_359TEST_SBWTCK60PJ_0_TDO61PJ_1_TDI_TCLK62PJ_2_TMS63PJ_3_TCK64nRSTDVCC_SBWTDIO65EP_GNDY232.8kHzC4712pFC4612pFR1247kΩC442.2nFMSP430 RESETR2847kΩC432.2nFMSP430 JTAGJ21TDO2VCC3TDI4SENSE5TMS6NC67TCK8TEST_SBWTCK9GND10NC1011nRST_SBWTDIO12NC121314JTAG SENSE1VCC_52292JTAG_SENSEVDD_1V8J512POS 2 SWS3245613DEBUGJ1512SMCLK1SCAN-SWITCHScanSW DNI1S12S23S34S0R1010kΩR1118kΩR6470ΩyellowYLWR7470ΩredREDR15470ΩgreenGRNPREVIOUS / VOL_UPNEXT / VOL_DOWNPAUSE_PLAY - DNIR3175kΩR3275kΩR3375kΩC3710uFC391uFC41470nFCB0CB0CB0CB0CB1CB1CB1CB1CB1CB1CB2CB2CB2VCC_5229VCC_5229VCC_5229CB2VCC_5229VCC_5229VCC_5229XIN_32KXIN_32KXIN_32KXIN_32KXOUT_32KXOUT_32KXOUT_32KGNDGNDGNDGNDGNDGNDGNDGNDVCOREMSP_MCLK_3V3LED1XOUT_32KGNDGNDGNDGNDGNDGNDGNDGNDU1_VOUTU1_VOUTU1_VSSVCOREVCOREMSP_MCLK_3V3MSP_MCLK_3V3LED1LED1LED1LED2LED2LED2LED2LED3LED3LED3CBOUTLED3U1A_HCI_RTSU1A_HCI_CTSCBOUTCBOUTCBOUTU1A_N_SHUTDU1_N_RSTU10_P2_2_TA2CLK_SMCLKU10_P2_2_TA2CLK_SMCLKU10_P2_2_TA2CLK_SMCLKU10_P2_2_TA2CLK_SMCLKU10_P2_4_TA2_1U10_P2_4_TA2_1U10_P2_4_TA2_1U10_P2_4_TA2_1U1_SDA_MOSIU1_SCL_SSZU1A_HCI_RXU1A_HCI_TXMSP430_RESETMSP430_RESETMSP430_RESETMSP430_RESETTEST_SBWTCK_5229TEST_SBWTCK_5229TEST_SBWTCK_5229TDO_5229TEST_SBWTCK_5229TDO_5229TDO_5229TDI_5229TDI_5229TDI_5229TDI_5229TMS_5229TMS_5229TMS_5229TMS_5229TCK_5229TCK_5229TCK_5229TCK_5229nRST_SBWTDIO_5229nRST_SBWTDIO_5229nRST_SBWTDIO_5229nRST_SBWTDIO_5229nRST_SBWTDIO_5229DVIO_1V8_5229DVIO_1V8_5229DVIO_1V8_5229DVIO_1V8_5229DVIO_1V8_5229DVIO_1V8_5229JTAG_PWR_3V3JTAG_PWR_3V3JTAG_PWR_3V3JTAG_SENSEVDD_1V8_LDOVDD_2V8_LDOSLOW_CLK_1V8_CCJTAG_PWR_3V3JTAG_SENSEJTAG_SENSEVDD_1V8_LDOVDD_2V8_LDOU1A_SLOW_CLKSLOW_CLK_1V8_CCLED1_ALED1_ALED2_ALED2_ALED3_AU1_VOUTU1_VSSU1A_HCI_RTSU1A_HCI_CTSU1A_N_SHUTDU1_N_RSTU1_SDA_MOSIU1_SCL_SSZU1A_HCI_RXU1A_HCI_TXU1_VOUTU1A_SLOW_CLKTAS2505 Audio Amplifier and SpeakerTAS2505 Audio Amplifier and Speaker112233445566AABBCCDDTAS2505IRGERU11SPI_SEL2RST3AINL4AINR5HPOUT6AVSS7AVDD8LDO_SEL9SPKM10SPKVDD11SPKVSS12SPKP13DIN14WCLK15BCLK16MCLK17MISO18GPIO_DOUT19SCL_SSZ20SDA_MOSI21SCLK22IOVDD23DVDD24DVSS25IOVSSR12.7kΩR22.7kΩC122uFC20.1uFC30.1uFC422uFANALOG INPUT1AINL2AINRC50.1uFC60.1uFC70.1uFC810uFC90.1uFC1010uFSpeaker1SPKP2SPKMC1147uFheadphone Jack1HPOUT2GNDGNDGNDGNDGNDGNDGNDGNDU1_AINRU1_AINRGPIO_DOUTSDA_MOSIIOVDDV1_8DSCL_SSZV1_8ASVDD112233445566AABBCCDDTAS2505IRGERU11SPI_SEL2RST3AINL4AINR5HPOUT6AVSS7AVDD8LDO_SEL9SPKM10SPKVDD11SPKVSS12SPKP13DIN14WCLK15BCLK16MCLK17MISO18GPIO_DOUT19SCL_SSZ20SDA_MOSI21SCLK22IOVDD23DVDD24DVSS25IOVSSR12.7kΩR22.7kΩC122uFC20.1uFC30.1uFC422uFANALOG INPUT1AINL2AINRC50.1uFC60.1uFC70.1uFC810uFC90.1uFC1010uFSpeaker1SPKP2SPKMC1147uFheadphone Jack1HPOUT2GNDGNDU10_P2_0_TA1_1U1_VSSU1_VOUTU1_OUTU10_P2_0_TA1_1U1_VSSU1_OUTU1A_AUD_OUTU1A_AUD_OUTU1A_AUD_FSYNCU1A_AUD_CLKU1A_AUD_CLKU1A_AUD_FSYNCGPIO_DOUTU10_P3_1_UCB0SOMI_UCB0SCLTAS2505 \ No newline at end of file + " fill="rgba(255, 255, 255, 0.6)" stroke="rgb(132, 0, 0)" stroke-width="0.595714048764px"/>U10_P3_1_UCB0SOMI_UCB0SCLSDA_MOSISCL_SSZV1_8ASVDDTAS2505U1_AVDD \ No newline at end of file diff --git a/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg b/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg new file mode 100644 index 00000000..81cbf38c --- /dev/null +++ b/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +VINRI10kΩRF36kΩ-+Vsup+Vsup-VOUT \ No newline at end of file diff --git a/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg new file mode 100644 index 00000000..c41968bd --- /dev/null +++ b/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +U1ZLOADR_SHUNT100mΩR_F57.6kΩR_G1.2kΩVBUS5 VVOUTILOADVSHUNTTI OPA371D Figure 7-1 \ No newline at end of file diff --git a/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg new file mode 100644 index 00000000..ca35ec06 --- /dev/null +++ b/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +1uF1uFTPS7A20INPUTENABLEOUTPUTGND \ No newline at end of file diff --git a/examples/ti-reference-examples.json b/examples/ti-reference-examples.json new file mode 100644 index 00000000..c5f34e0f --- /dev/null +++ b/examples/ti-reference-examples.json @@ -0,0 +1,287 @@ +{ + "schemaVersion": 1, + "examples": [ + { + "id": "OPA371D_LowSideCurrentSense", + "family": "OPA371D", + "implementation": "generated", + "title": "OPA371D Low-Side Current-Sense Reference", + "description": "A faithful schematic rendering of the OPAx371D low-side current-sensing application, preserving TI's stated values, topology, and left-to-right placement.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/OPA371D", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/OPA371D/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/OPA371D/datasheet/GUID-03C60932-F0E0-4CDB-9FB0-C73F5C680C80", + "figureUrl": "https://www.ti.com/ods/images/SLVSM48A/GUID-B2DF1A69-DA22-4522-9874-1574F18368E7-low.gif", + "figure": "Figure 7-1", + "figureCaption": "Low-Side, Current-Sensing Application", + "pdfPage": 23, + "documentRevision": "SLVSM48A, revised August 2026", + "scope": "Complete Figure 7-1 signal path and feedback network; ZLOAD remains symbolic because TI does not specify its impedance." + }, + "mainDevice": { + "componentExportName": "OPA371DDBVR", + "modulePath": "../lib/chips/OPA371DDBVR.tsx", + "name": "U1", + "position": { + "x": 0, + "y": 0 + }, + "schematicProjection": { + "name": "U1_OPAMP", + "symbolName": "opamp_with_power_right", + "portMap": { + "inp1": "pin3", + "inp2": "pin4", + "out": "pin1", + "V+": "pin5", + "V-": "pin2" + } + } + }, + "components": [ + { + "kind": "symbolic-load", + "name": "Z_LOAD", + "displayLabel": "ZLOAD", + "position": { + "x": -2, + "y": 1.35 + }, + "evidenceLabel": "ZLOAD", + "valueStatus": "unspecified-by-ti" + }, + { + "kind": "resistor", + "name": "R_SHUNT", + "value": "0.1ohm", + "footprint": "2512", + "position": { + "x": -2, + "y": -0.35 + }, + "rotation": -90, + "evidenceLabel": "RSHUNT 0.1 ohm", + "valueStatus": "specified-by-ti" + }, + { + "kind": "resistor", + "name": "R_F", + "value": "57.6k", + "footprint": "0402", + "position": { + "x": 1.5, + "y": -0.4 + }, + "rotation": -90, + "evidenceLabel": "RF 57.6 kohm", + "valueStatus": "specified-by-ti" + }, + { + "kind": "resistor", + "name": "R_G", + "value": "1.2k", + "footprint": "0402", + "position": { + "x": 1.5, + "y": -1.5 + }, + "rotation": -90, + "evidenceLabel": "RG 1.2 kohm", + "valueStatus": "specified-by-ti" + }, + { + "kind": "net-symbol", + "name": "VBUS_RAIL", + "symbolName": "rail_up", + "port": "1", + "net": "net.VBUS", + "displayLabel": "VBUS", + "position": { + "x": -2, + "y": 2.2 + }, + "evidenceLabel": "VBUS rail" + }, + { + "kind": "net-symbol", + "name": "V5_RAIL", + "symbolName": "rail_up", + "port": "1", + "net": "net.V5", + "displayLabel": "5 V", + "position": { + "x": -0.1, + "y": 1 + }, + "evidenceLabel": "5 V device supply" + }, + { + "kind": "net-symbol", + "name": "GND_SHUNT", + "symbolName": "digital_ground_up", + "port": "1", + "net": "net.GND", + "displayLabel": "", + "position": { + "x": -2, + "y": -1.1 + }, + "evidenceLabel": "RSHUNT ground return" + }, + { + "kind": "net-symbol", + "name": "GND_DEVICE", + "symbolName": "digital_ground_up", + "port": "1", + "net": "net.GND", + "displayLabel": "", + "position": { + "x": -0.09, + "y": -1 + }, + "evidenceLabel": "device negative supply ground" + }, + { + "kind": "net-symbol", + "name": "GND_GAIN", + "symbolName": "digital_ground_up", + "port": "1", + "net": "net.GND", + "displayLabel": "", + "position": { + "x": 1.5, + "y": -2.3 + }, + "evidenceLabel": "RG ground return" + }, + { + "kind": "net-symbol", + "name": "VOUT_TERMINAL", + "symbolName": "testpoint_right", + "port": "1", + "net": "net.VOUT", + "displayLabel": "VOUT", + "position": { + "x": 2.8, + "y": -0.01 + }, + "evidenceLabel": "VOUT terminal" + } + ], + "traces": [ + { + "from": ".VBUS_RAIL > .1", + "to": ".Z_LOAD > .1", + "evidenceLabel": "VBUS feeds ZLOAD" + }, + { + "path": [".Z_LOAD > .2", ".R_SHUNT > .pin1", ".U1_OPAMP > .inp1"], + "evidenceLabel": "ZLOAD/RSHUNT junction drives the noninverting input" + }, + { + "from": ".R_SHUNT > .pin2", + "to": ".GND_SHUNT > .1", + "evidenceLabel": "RSHUNT returns to ground" + }, + { + "path": [".U1_OPAMP > .out", ".R_F > .pin1", ".VOUT_TERMINAL > .1"], + "evidenceLabel": "amplifier output is VOUT and feeds RF" + }, + { + "path": [".R_F > .pin2", ".R_G > .pin1", ".U1_OPAMP > .inp2"], + "evidenceLabel": "RF/RG gain divider feeds the inverting input", + "schematicRouteHints": [ + { + "x": -0.8, + "y": -0.14 + }, + { + "x": -0.8, + "y": -0.95 + }, + { + "x": 1.5, + "y": -0.95 + } + ] + }, + { + "from": ".R_G > .pin2", + "to": ".GND_GAIN > .1", + "evidenceLabel": "RG returns to ground" + }, + { + "from": ".U1_OPAMP > .pin5", + "to": ".V5_RAIL > .1", + "evidenceLabel": "device positive supply is 5 V" + }, + { + "from": ".U1_OPAMP > .V-", + "to": ".GND_DEVICE > .1", + "evidenceLabel": "device negative supply returns to ground" + } + ], + "annotations": [ + { + "text": "ILOAD", + "x": -2.8, + "y": 1.35 + }, + { + "text": "VSHUNT", + "x": -2.8, + "y": 0.1 + }, + { + "text": "TI OPA371D Figure 7-1", + "x": 0, + "y": -3, + "fontSize": 0.14 + } + ] + }, + { + "id": "TPS7A20_TypicalApplication", + "family": "TPS7A20", + "implementation": "handwritten", + "title": "TPS7A20 Typical Application", + "description": "A hand-authored schematic rendering of TI's fixed 2.8 V TPS7A20 typical application with the specified 1 uF input and output capacitors.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/TPS7A20", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS7A20/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS7A20/datasheet/GUID-3D45E9EE-715E-4F03-9FE7-45704BDF2D59", + "figureUrl": "https://www.ti.com/ods/images/SBVS338H/GUID-A681E4F8-E96A-4BF3-93C9-A5E2D824AE3E-low.gif", + "figure": "Figure 7-4", + "figureCaption": "TPS7A20 Typical Application", + "pdfPage": 30, + "documentRevision": "SBVS338H", + "scope": "Complete Figure 7-4 topology and placement using the fixed 2.8 V device and Table 7-1 capacitor values." + }, + "sourceFile": "TPS7A20_TypicalApplication.circuit.tsx", + "sourceSha256": "ac09f173026d924911caa707a7f4e36aa16c29c897ce361eea3115ef8833fe5e" + }, + { + "id": "LM358B_InvertingAmplifier", + "family": "LM358B", + "implementation": "handwritten", + "title": "LM358B Inverting-Amplifier Application", + "description": "A hand-authored schematic rendering of TI's inverting-amplifier application using the worked-example RI and RF values.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/LM358B", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/LM358B/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/LM358B/datasheet/GUID-9C4C5A40-20A9-49A2-B940-96F8AF83307C", + "figureUrl": "https://www.ti.com/ods/images/SLOS068AB/GUID-222A75A4-1DA7-47D5-BEE4-7956753D9B15-low.gif", + "figure": "Figure 8-1", + "figureCaption": "Application Schematic", + "pdfPage": 27, + "documentRevision": "SLOS068AB", + "scope": "Figure 8-1 inverting-amplifier topology and placement with section 8.2.2 worked values RI=10 kohm and RF=36 kohm." + }, + "sourceFile": "LM358B_InvertingAmplifier.circuit.tsx", + "sourceSha256": "7efdea6837019397b5737f09fbb05f321f91b94f435c3aaa34db26eaf8a5f30d" + } + ] +} diff --git a/lib/chips/ADC101C021CIMM_NOPB.circuit.tsx b/lib/chips/ADC101C021CIMM_NOPB.tsx similarity index 100% rename from lib/chips/ADC101C021CIMM_NOPB.circuit.tsx rename to lib/chips/ADC101C021CIMM_NOPB.tsx diff --git a/lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx b/lib/chips/ADC128S022CIMTX_NOPB.tsx similarity index 100% rename from lib/chips/ADC128S022CIMTX_NOPB.circuit.tsx rename to lib/chips/ADC128S022CIMTX_NOPB.tsx diff --git a/lib/chips/ADS1015LIDGSR.circuit.tsx b/lib/chips/ADS1015LIDGSR.tsx similarity index 100% rename from lib/chips/ADS1015LIDGSR.circuit.tsx rename to lib/chips/ADS1015LIDGSR.tsx diff --git a/lib/chips/ADS1114IDGST.circuit.tsx b/lib/chips/ADS1114IDGST.tsx similarity index 100% rename from lib/chips/ADS1114IDGST.circuit.tsx rename to lib/chips/ADS1114IDGST.tsx diff --git a/lib/chips/ADS1118IDGSR.circuit.tsx b/lib/chips/ADS1118IDGSR.tsx similarity index 100% rename from lib/chips/ADS1118IDGSR.circuit.tsx rename to lib/chips/ADS1118IDGSR.tsx diff --git a/lib/chips/ADS114S08IRHBT.circuit.tsx b/lib/chips/ADS114S08IRHBT.tsx similarity index 100% rename from lib/chips/ADS114S08IRHBT.circuit.tsx rename to lib/chips/ADS114S08IRHBT.tsx diff --git a/lib/chips/ADS122S14IRTER.circuit.tsx b/lib/chips/ADS122S14IRTER.tsx similarity index 100% rename from lib/chips/ADS122S14IRTER.circuit.tsx rename to lib/chips/ADS122S14IRTER.tsx diff --git a/lib/chips/ADS124S08IRHBT.circuit.tsx b/lib/chips/ADS124S08IRHBT.tsx similarity index 100% rename from lib/chips/ADS124S08IRHBT.circuit.tsx rename to lib/chips/ADS124S08IRHBT.tsx diff --git a/lib/chips/ADS131M03IRUKR.circuit.tsx b/lib/chips/ADS131M03IRUKR.tsx similarity index 100% rename from lib/chips/ADS131M03IRUKR.circuit.tsx rename to lib/chips/ADS131M03IRUKR.tsx diff --git a/lib/chips/ADS7042IDCUT.circuit.tsx b/lib/chips/ADS7042IDCUT.tsx similarity index 100% rename from lib/chips/ADS7042IDCUT.circuit.tsx rename to lib/chips/ADS7042IDCUT.tsx diff --git a/lib/chips/ADS7142IRUGR.circuit.tsx b/lib/chips/ADS7142IRUGR.tsx similarity index 100% rename from lib/chips/ADS7142IRUGR.circuit.tsx rename to lib/chips/ADS7142IRUGR.tsx diff --git a/lib/chips/ADS7885SDBVT.circuit.tsx b/lib/chips/ADS7885SDBVT.tsx similarity index 100% rename from lib/chips/ADS7885SDBVT.circuit.tsx rename to lib/chips/ADS7885SDBVT.tsx diff --git a/lib/chips/ADS8885IDGSR.circuit.tsx b/lib/chips/ADS8885IDGSR.tsx similarity index 100% rename from lib/chips/ADS8885IDGSR.circuit.tsx rename to lib/chips/ADS8885IDGSR.tsx diff --git a/lib/chips/AM26C31IDR.circuit.tsx b/lib/chips/AM26C31IDR.tsx similarity index 100% rename from lib/chips/AM26C31IDR.circuit.tsx rename to lib/chips/AM26C31IDR.tsx diff --git a/lib/chips/AM26C32CDR.circuit.tsx b/lib/chips/AM26C32CDR.tsx similarity index 100% rename from lib/chips/AM26C32CDR.circuit.tsx rename to lib/chips/AM26C32CDR.tsx diff --git a/lib/chips/AM3352BZCZ100.circuit.tsx b/lib/chips/AM3352BZCZ100.tsx similarity index 100% rename from lib/chips/AM3352BZCZ100.circuit.tsx rename to lib/chips/AM3352BZCZ100.tsx diff --git a/lib/chips/AM3357BZCZA80.circuit.tsx b/lib/chips/AM3357BZCZA80.tsx similarity index 100% rename from lib/chips/AM3357BZCZA80.circuit.tsx rename to lib/chips/AM3357BZCZA80.tsx diff --git a/lib/chips/AM4376BZDND80.circuit.tsx b/lib/chips/AM4376BZDND80.tsx similarity index 100% rename from lib/chips/AM4376BZDND80.circuit.tsx rename to lib/chips/AM4376BZDND80.tsx diff --git a/lib/chips/AM4378BZDND100.circuit.tsx b/lib/chips/AM4378BZDND100.tsx similarity index 100% rename from lib/chips/AM4378BZDND100.circuit.tsx rename to lib/chips/AM4378BZDND100.tsx diff --git a/lib/chips/AM4379BZDNA100.circuit.tsx b/lib/chips/AM4379BZDNA100.tsx similarity index 100% rename from lib/chips/AM4379BZDNA100.circuit.tsx rename to lib/chips/AM4379BZDNA100.tsx diff --git a/lib/chips/AM5726BABCXA.circuit.tsx b/lib/chips/AM5726BABCXA.tsx similarity index 100% rename from lib/chips/AM5726BABCXA.circuit.tsx rename to lib/chips/AM5726BABCXA.tsx diff --git a/lib/chips/AM62A32AOMHIAMBR.circuit.tsx b/lib/chips/AM62A32AOMHIAMBR.tsx similarity index 100% rename from lib/chips/AM62A32AOMHIAMBR.circuit.tsx rename to lib/chips/AM62A32AOMHIAMBR.tsx diff --git a/lib/chips/AM62A74AUMHAAMBR.circuit.tsx b/lib/chips/AM62A74AUMHAAMBR.tsx similarity index 100% rename from lib/chips/AM62A74AUMHAAMBR.circuit.tsx rename to lib/chips/AM62A74AUMHAAMBR.tsx diff --git a/lib/chips/AM62L32.circuit.tsx b/lib/chips/AM62L32.tsx similarity index 87% rename from lib/chips/AM62L32.circuit.tsx rename to lib/chips/AM62L32.tsx index ad03176b..025821b2 100644 --- a/lib/chips/AM62L32.circuit.tsx +++ b/lib/chips/AM62L32.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { AM62L32BOGHAANBR } from "./AM62L32BOGHAANBR.circuit.tsx"; +import { AM62L32BOGHAANBR } from "./AM62L32BOGHAANBR.tsx"; type AM62L32FootprintVariant = "fccsp_373_anb" | (string & {}); diff --git a/lib/chips/AM62L32BEGHAANBR.circuit.tsx b/lib/chips/AM62L32BEGHAANBR.tsx similarity index 100% rename from lib/chips/AM62L32BEGHAANBR.circuit.tsx rename to lib/chips/AM62L32BEGHAANBR.tsx diff --git a/lib/chips/AM62L32BOGHAANBR.circuit.tsx b/lib/chips/AM62L32BOGHAANBR.tsx similarity index 100% rename from lib/chips/AM62L32BOGHAANBR.circuit.tsx rename to lib/chips/AM62L32BOGHAANBR.tsx diff --git a/lib/chips/AM6442BSEFHAALV.circuit.tsx b/lib/chips/AM6442BSEFHAALV.tsx similarity index 100% rename from lib/chips/AM6442BSEFHAALV.circuit.tsx rename to lib/chips/AM6442BSEFHAALV.tsx diff --git a/lib/chips/AM67A74AKGHIAMWR.circuit.tsx b/lib/chips/AM67A74AKGHIAMWR.tsx similarity index 100% rename from lib/chips/AM67A74AKGHIAMWR.circuit.tsx rename to lib/chips/AM67A74AKGHIAMWR.tsx diff --git a/lib/chips/AMC0300DDWVR.circuit.tsx b/lib/chips/AMC0300DDWVR.tsx similarity index 100% rename from lib/chips/AMC0300DDWVR.circuit.tsx rename to lib/chips/AMC0300DDWVR.tsx diff --git a/lib/chips/AMC0311DQDWVRQ1.circuit.tsx b/lib/chips/AMC0311DQDWVRQ1.tsx similarity index 100% rename from lib/chips/AMC0311DQDWVRQ1.circuit.tsx rename to lib/chips/AMC0311DQDWVRQ1.tsx diff --git a/lib/chips/AMC1211AQDWVQ1.circuit.tsx b/lib/chips/AMC1211AQDWVQ1.tsx similarity index 100% rename from lib/chips/AMC1211AQDWVQ1.circuit.tsx rename to lib/chips/AMC1211AQDWVQ1.tsx diff --git a/lib/chips/AMC1351QDWVRQ1.circuit.tsx b/lib/chips/AMC1351QDWVRQ1.tsx similarity index 100% rename from lib/chips/AMC1351QDWVRQ1.circuit.tsx rename to lib/chips/AMC1351QDWVRQ1.tsx diff --git a/lib/chips/ATL431LIBQDBZR.circuit.tsx b/lib/chips/ATL431LIBQDBZR.tsx similarity index 100% rename from lib/chips/ATL431LIBQDBZR.circuit.tsx rename to lib/chips/ATL431LIBQDBZR.tsx diff --git a/lib/chips/A_74ACT16244DGGR.circuit.tsx b/lib/chips/A_74ACT16244DGGR.tsx similarity index 100% rename from lib/chips/A_74ACT16244DGGR.circuit.tsx rename to lib/chips/A_74ACT16244DGGR.tsx diff --git a/lib/chips/A_74LVC1G332DBVRG4.circuit.tsx b/lib/chips/A_74LVC1G332DBVRG4.tsx similarity index 100% rename from lib/chips/A_74LVC1G332DBVRG4.circuit.tsx rename to lib/chips/A_74LVC1G332DBVRG4.tsx diff --git a/lib/chips/BQ24072.circuit.tsx b/lib/chips/BQ24072.tsx similarity index 78% rename from lib/chips/BQ24072.circuit.tsx rename to lib/chips/BQ24072.tsx index 0cae2f03..7b264155 100644 --- a/lib/chips/BQ24072.circuit.tsx +++ b/lib/chips/BQ24072.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { BQ24072RGTR } from "./BQ24072RGTR.circuit.tsx"; +import { BQ24072RGTR } from "./BQ24072RGTR.tsx"; export type BQ24072Props = ComponentProps; diff --git a/lib/chips/BQ24072RGTR.circuit.tsx b/lib/chips/BQ24072RGTR.tsx similarity index 100% rename from lib/chips/BQ24072RGTR.circuit.tsx rename to lib/chips/BQ24072RGTR.tsx diff --git a/lib/chips/BQ24073.circuit.tsx b/lib/chips/BQ24073.tsx similarity index 78% rename from lib/chips/BQ24073.circuit.tsx rename to lib/chips/BQ24073.tsx index 04da009f..b94ce661 100644 --- a/lib/chips/BQ24073.circuit.tsx +++ b/lib/chips/BQ24073.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { BQ24073RGTR } from "./BQ24073RGTR.circuit.tsx"; +import { BQ24073RGTR } from "./BQ24073RGTR.tsx"; export type BQ24073Props = ComponentProps; diff --git a/lib/chips/BQ24073RGTR.circuit.tsx b/lib/chips/BQ24073RGTR.tsx similarity index 92% rename from lib/chips/BQ24073RGTR.circuit.tsx rename to lib/chips/BQ24073RGTR.tsx index ef73ac81..35bbdf12 100644 --- a/lib/chips/BQ24073RGTR.circuit.tsx +++ b/lib/chips/BQ24073RGTR.tsx @@ -1,6 +1,6 @@ import type { ChipProps } from "@tscircuit/props"; import "tscircuit"; -import { BQ24072RGTR_PIN_LABELS } from "./BQ24072RGTR.circuit.tsx"; +import { BQ24072RGTR_PIN_LABELS } from "./BQ24072RGTR.tsx"; export const BQ24073RGTR = ( props: ChipProps, diff --git a/lib/chips/BQ24074.circuit.tsx b/lib/chips/BQ24074.tsx similarity index 88% rename from lib/chips/BQ24074.circuit.tsx rename to lib/chips/BQ24074.tsx index 6d3582a9..c58fe2cc 100644 --- a/lib/chips/BQ24074.circuit.tsx +++ b/lib/chips/BQ24074.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { BQ24074RGTR } from "./BQ24074RGTR.circuit.tsx"; +import { BQ24074RGTR } from "./BQ24074RGTR.tsx"; type BQ24074FootprintVariant = "vqfn_16_ep_3x3" | (string & {}); diff --git a/lib/chips/BQ24074RGTR.circuit.tsx b/lib/chips/BQ24074RGTR.tsx similarity index 100% rename from lib/chips/BQ24074RGTR.circuit.tsx rename to lib/chips/BQ24074RGTR.tsx diff --git a/lib/chips/BQ24600RVAR.circuit.tsx b/lib/chips/BQ24600RVAR.tsx similarity index 100% rename from lib/chips/BQ24600RVAR.circuit.tsx rename to lib/chips/BQ24600RVAR.tsx diff --git a/lib/chips/BQ24725ARGRR.circuit.tsx b/lib/chips/BQ24725ARGRR.tsx similarity index 100% rename from lib/chips/BQ24725ARGRR.circuit.tsx rename to lib/chips/BQ24725ARGRR.tsx diff --git a/lib/chips/BQ24780SRUYR.circuit.tsx b/lib/chips/BQ24780SRUYR.tsx similarity index 100% rename from lib/chips/BQ24780SRUYR.circuit.tsx rename to lib/chips/BQ24780SRUYR.tsx diff --git a/lib/chips/BQ25185DLHR.circuit.tsx b/lib/chips/BQ25185DLHR.tsx similarity index 100% rename from lib/chips/BQ25185DLHR.circuit.tsx rename to lib/chips/BQ25185DLHR.tsx diff --git a/lib/chips/BQ25188YBGR.circuit.tsx b/lib/chips/BQ25188YBGR.tsx similarity index 100% rename from lib/chips/BQ25188YBGR.circuit.tsx rename to lib/chips/BQ25188YBGR.tsx diff --git a/lib/chips/BQ25622RYKR.circuit.tsx b/lib/chips/BQ25622RYKR.tsx similarity index 100% rename from lib/chips/BQ25622RYKR.circuit.tsx rename to lib/chips/BQ25622RYKR.tsx diff --git a/lib/chips/BQ25630YBGR.circuit.tsx b/lib/chips/BQ25630YBGR.tsx similarity index 100% rename from lib/chips/BQ25630YBGR.circuit.tsx rename to lib/chips/BQ25630YBGR.tsx diff --git a/lib/chips/BQ25638YBGR.circuit.tsx b/lib/chips/BQ25638YBGR.tsx similarity index 100% rename from lib/chips/BQ25638YBGR.circuit.tsx rename to lib/chips/BQ25638YBGR.tsx diff --git a/lib/chips/BQ25731RSNR.circuit.tsx b/lib/chips/BQ25731RSNR.tsx similarity index 100% rename from lib/chips/BQ25731RSNR.circuit.tsx rename to lib/chips/BQ25731RSNR.tsx diff --git a/lib/chips/BQ25756RRVR.circuit.tsx b/lib/chips/BQ25756RRVR.tsx similarity index 100% rename from lib/chips/BQ25756RRVR.circuit.tsx rename to lib/chips/BQ25756RRVR.tsx diff --git a/lib/chips/BQ25887RGER.circuit.tsx b/lib/chips/BQ25887RGER.tsx similarity index 100% rename from lib/chips/BQ25887RGER.circuit.tsx rename to lib/chips/BQ25887RGER.tsx diff --git a/lib/chips/BQ25895.circuit.tsx b/lib/chips/BQ25895.tsx similarity index 89% rename from lib/chips/BQ25895.circuit.tsx rename to lib/chips/BQ25895.tsx index 638e6320..5265ffb9 100644 --- a/lib/chips/BQ25895.circuit.tsx +++ b/lib/chips/BQ25895.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { BQ25895RTWR } from "./BQ25895RTWR.circuit.tsx"; +import { BQ25895RTWR } from "./BQ25895RTWR.tsx"; type BQ25895FootprintVariant = "wqfn_24_ep_4x4" | (string & {}); diff --git a/lib/chips/BQ25895RTWR.circuit.tsx b/lib/chips/BQ25895RTWR.tsx similarity index 100% rename from lib/chips/BQ25895RTWR.circuit.tsx rename to lib/chips/BQ25895RTWR.tsx diff --git a/lib/chips/BQ27426YZFR.circuit.tsx b/lib/chips/BQ27426YZFR.tsx similarity index 100% rename from lib/chips/BQ27426YZFR.circuit.tsx rename to lib/chips/BQ27426YZFR.tsx diff --git a/lib/chips/BQ27441DRZR_G1B.circuit.tsx b/lib/chips/BQ27441DRZR_G1B.tsx similarity index 100% rename from lib/chips/BQ27441DRZR_G1B.circuit.tsx rename to lib/chips/BQ27441DRZR_G1B.tsx diff --git a/lib/chips/BQ27441G1.circuit.tsx b/lib/chips/BQ27441G1.tsx similarity index 88% rename from lib/chips/BQ27441G1.circuit.tsx rename to lib/chips/BQ27441G1.tsx index 5e4a9de3..1645dfde 100644 --- a/lib/chips/BQ27441G1.circuit.tsx +++ b/lib/chips/BQ27441G1.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { BQ27441DRZR_G1B } from "./BQ27441DRZR_G1B.circuit.tsx"; +import { BQ27441DRZR_G1B } from "./BQ27441DRZR_G1B.tsx"; type BQ27441G1FootprintVariant = "vson_12_ep_2p5x4" | (string & {}); diff --git a/lib/chips/BQ32000DR.circuit.tsx b/lib/chips/BQ32000DR.tsx similarity index 100% rename from lib/chips/BQ32000DR.circuit.tsx rename to lib/chips/BQ32000DR.tsx diff --git a/lib/chips/BQ32002.circuit.tsx b/lib/chips/BQ32002.tsx similarity index 100% rename from lib/chips/BQ32002.circuit.tsx rename to lib/chips/BQ32002.tsx diff --git a/lib/chips/BQ51003YFPR.circuit.tsx b/lib/chips/BQ51003YFPR.tsx similarity index 100% rename from lib/chips/BQ51003YFPR.circuit.tsx rename to lib/chips/BQ51003YFPR.tsx diff --git a/lib/chips/BQ51013CRHLR.circuit.tsx b/lib/chips/BQ51013CRHLR.tsx similarity index 100% rename from lib/chips/BQ51013CRHLR.circuit.tsx rename to lib/chips/BQ51013CRHLR.tsx diff --git a/lib/chips/CC1101RGPR.circuit.tsx b/lib/chips/CC1101RGPR.tsx similarity index 100% rename from lib/chips/CC1101RGPR.circuit.tsx rename to lib/chips/CC1101RGPR.tsx diff --git a/lib/chips/CC1120RHBR.circuit.tsx b/lib/chips/CC1120RHBR.tsx similarity index 100% rename from lib/chips/CC1120RHBR.circuit.tsx rename to lib/chips/CC1120RHBR.tsx diff --git a/lib/chips/CC1125RHBR.circuit.tsx b/lib/chips/CC1125RHBR.tsx similarity index 100% rename from lib/chips/CC1125RHBR.circuit.tsx rename to lib/chips/CC1125RHBR.tsx diff --git a/lib/chips/CC113LRGPR.circuit.tsx b/lib/chips/CC113LRGPR.tsx similarity index 100% rename from lib/chips/CC113LRGPR.circuit.tsx rename to lib/chips/CC113LRGPR.tsx diff --git a/lib/chips/CC1310F128RHBR.circuit.tsx b/lib/chips/CC1310F128RHBR.tsx similarity index 100% rename from lib/chips/CC1310F128RHBR.circuit.tsx rename to lib/chips/CC1310F128RHBR.tsx diff --git a/lib/chips/CC1311R31T0RKPR.circuit.tsx b/lib/chips/CC1311R31T0RKPR.tsx similarity index 100% rename from lib/chips/CC1311R31T0RKPR.circuit.tsx rename to lib/chips/CC1311R31T0RKPR.tsx diff --git a/lib/chips/CC1312PSIPMOTR.circuit.tsx b/lib/chips/CC1312PSIPMOTR.tsx similarity index 100% rename from lib/chips/CC1312PSIPMOTR.circuit.tsx rename to lib/chips/CC1312PSIPMOTR.tsx diff --git a/lib/chips/CC1314R106T0RGZR.circuit.tsx b/lib/chips/CC1314R106T0RGZR.tsx similarity index 100% rename from lib/chips/CC1314R106T0RGZR.circuit.tsx rename to lib/chips/CC1314R106T0RGZR.tsx diff --git a/lib/chips/CC1354P106T0RSKR.circuit.tsx b/lib/chips/CC1354P106T0RSKR.tsx similarity index 100% rename from lib/chips/CC1354P106T0RSKR.circuit.tsx rename to lib/chips/CC1354P106T0RSKR.tsx diff --git a/lib/chips/CC2340R21N0RGER.circuit.tsx b/lib/chips/CC2340R21N0RGER.tsx similarity index 100% rename from lib/chips/CC2340R21N0RGER.circuit.tsx rename to lib/chips/CC2340R21N0RGER.tsx diff --git a/lib/chips/CC2340R5.circuit.tsx b/lib/chips/CC2340R5.tsx similarity index 100% rename from lib/chips/CC2340R5.circuit.tsx rename to lib/chips/CC2340R5.tsx diff --git a/lib/chips/CC2340R5MODAN0MHAR.circuit.tsx b/lib/chips/CC2340R5MODAN0MHAR.tsx similarity index 100% rename from lib/chips/CC2340R5MODAN0MHAR.circuit.tsx rename to lib/chips/CC2340R5MODAN0MHAR.tsx diff --git a/lib/chips/CC2500RGPR.circuit.tsx b/lib/chips/CC2500RGPR.tsx similarity index 100% rename from lib/chips/CC2500RGPR.circuit.tsx rename to lib/chips/CC2500RGPR.tsx diff --git a/lib/chips/CC2530F128RHAR.circuit.tsx b/lib/chips/CC2530F128RHAR.tsx similarity index 100% rename from lib/chips/CC2530F128RHAR.circuit.tsx rename to lib/chips/CC2530F128RHAR.tsx diff --git a/lib/chips/CC2531F128RHAR.circuit.tsx b/lib/chips/CC2531F128RHAR.tsx similarity index 100% rename from lib/chips/CC2531F128RHAR.circuit.tsx rename to lib/chips/CC2531F128RHAR.tsx diff --git a/lib/chips/CC2540F256RHAR.circuit.tsx b/lib/chips/CC2540F256RHAR.tsx similarity index 100% rename from lib/chips/CC2540F256RHAR.circuit.tsx rename to lib/chips/CC2540F256RHAR.tsx diff --git a/lib/chips/CC2564C.circuit.tsx b/lib/chips/CC2564C.tsx similarity index 100% rename from lib/chips/CC2564C.circuit.tsx rename to lib/chips/CC2564C.tsx diff --git a/lib/chips/CC2592RGVR.circuit.tsx b/lib/chips/CC2592RGVR.tsx similarity index 100% rename from lib/chips/CC2592RGVR.circuit.tsx rename to lib/chips/CC2592RGVR.tsx diff --git a/lib/chips/CC2620F128RGZR.circuit.tsx b/lib/chips/CC2620F128RGZR.tsx similarity index 100% rename from lib/chips/CC2620F128RGZR.circuit.tsx rename to lib/chips/CC2620F128RGZR.tsx diff --git a/lib/chips/CC2652RB1FRGZR.circuit.tsx b/lib/chips/CC2652RB1FRGZR.tsx similarity index 100% rename from lib/chips/CC2652RB1FRGZR.circuit.tsx rename to lib/chips/CC2652RB1FRGZR.tsx diff --git a/lib/chips/CC2745R10.circuit.tsx b/lib/chips/CC2745R10.tsx similarity index 74% rename from lib/chips/CC2745R10.circuit.tsx rename to lib/chips/CC2745R10.tsx index 8704785b..971cd8c2 100644 --- a/lib/chips/CC2745R10.circuit.tsx +++ b/lib/chips/CC2745R10.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { CC2745R10E0WRHARQ1 } from "./CC2745R10E0WRHARQ1.circuit.tsx"; +import { CC2745R10E0WRHARQ1 } from "./CC2745R10E0WRHARQ1.tsx"; type CC2745R10Props = ComponentProps; diff --git a/lib/chips/CC2745R10E0WRHARQ1.circuit.tsx b/lib/chips/CC2745R10E0WRHARQ1.tsx similarity index 100% rename from lib/chips/CC2745R10E0WRHARQ1.circuit.tsx rename to lib/chips/CC2745R10E0WRHARQ1.tsx diff --git a/lib/chips/CC2755P105E0WRHAR.circuit.tsx b/lib/chips/CC2755P105E0WRHAR.tsx similarity index 100% rename from lib/chips/CC2755P105E0WRHAR.circuit.tsx rename to lib/chips/CC2755P105E0WRHAR.tsx diff --git a/lib/chips/CC2755P207E0WRHAR.circuit.tsx b/lib/chips/CC2755P207E0WRHAR.tsx similarity index 100% rename from lib/chips/CC2755P207E0WRHAR.circuit.tsx rename to lib/chips/CC2755P207E0WRHAR.tsx diff --git a/lib/chips/CC3100MODR11MAMOBT.circuit.tsx b/lib/chips/CC3100MODR11MAMOBT.tsx similarity index 100% rename from lib/chips/CC3100MODR11MAMOBT.circuit.tsx rename to lib/chips/CC3100MODR11MAMOBT.tsx diff --git a/lib/chips/CC3100R11MRGCR.circuit.tsx b/lib/chips/CC3100R11MRGCR.tsx similarity index 100% rename from lib/chips/CC3100R11MRGCR.circuit.tsx rename to lib/chips/CC3100R11MRGCR.tsx diff --git a/lib/chips/CC3200MODR1M2AMOBR.circuit.tsx b/lib/chips/CC3200MODR1M2AMOBR.tsx similarity index 100% rename from lib/chips/CC3200MODR1M2AMOBR.circuit.tsx rename to lib/chips/CC3200MODR1M2AMOBR.tsx diff --git a/lib/chips/CC3200R1M2RGC.circuit.tsx b/lib/chips/CC3200R1M2RGC.tsx similarity index 100% rename from lib/chips/CC3200R1M2RGC.circuit.tsx rename to lib/chips/CC3200R1M2RGC.tsx diff --git a/lib/chips/CC3220MODASM2MONR.circuit.tsx b/lib/chips/CC3220MODASM2MONR.tsx similarity index 100% rename from lib/chips/CC3220MODASM2MONR.circuit.tsx rename to lib/chips/CC3220MODASM2MONR.tsx diff --git a/lib/chips/CC3235SF.circuit.tsx b/lib/chips/CC3235SF.tsx similarity index 87% rename from lib/chips/CC3235SF.circuit.tsx rename to lib/chips/CC3235SF.tsx index 8a0b31ab..2059cefe 100644 --- a/lib/chips/CC3235SF.circuit.tsx +++ b/lib/chips/CC3235SF.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { CC3235SF12RGKR } from "./CC3235SF12RGKR.circuit.tsx"; +import { CC3235SF12RGKR } from "./CC3235SF12RGKR.tsx"; type CC3235SFFootprintVariant = "vqfn_64_ep" | (string & {}); diff --git a/lib/chips/CC3235SF12RGKR.circuit.tsx b/lib/chips/CC3235SF12RGKR.tsx similarity index 100% rename from lib/chips/CC3235SF12RGKR.circuit.tsx rename to lib/chips/CC3235SF12RGKR.tsx diff --git a/lib/chips/CC3300MODENIAMOZR.circuit.tsx b/lib/chips/CC3300MODENIAMOZR.tsx similarity index 100% rename from lib/chips/CC3300MODENIAMOZR.circuit.tsx rename to lib/chips/CC3300MODENIAMOZR.tsx diff --git a/lib/chips/CC3301MODENIAMOZR.circuit.tsx b/lib/chips/CC3301MODENIAMOZR.tsx similarity index 100% rename from lib/chips/CC3301MODENIAMOZR.circuit.tsx rename to lib/chips/CC3301MODENIAMOZR.tsx diff --git a/lib/chips/CC3350MODENIAMOZR.circuit.tsx b/lib/chips/CC3350MODENIAMOZR.tsx similarity index 100% rename from lib/chips/CC3350MODENIAMOZR.circuit.tsx rename to lib/chips/CC3350MODENIAMOZR.tsx diff --git a/lib/chips/CC3351MODENIAMOZR.circuit.tsx b/lib/chips/CC3351MODENIAMOZR.tsx similarity index 100% rename from lib/chips/CC3351MODENIAMOZR.circuit.tsx rename to lib/chips/CC3351MODENIAMOZR.tsx diff --git a/lib/chips/CC3501ENJARSHR.circuit.tsx b/lib/chips/CC3501ENJARSHR.tsx similarity index 100% rename from lib/chips/CC3501ENJARSHR.circuit.tsx rename to lib/chips/CC3501ENJARSHR.tsx diff --git a/lib/chips/CC3551ENJARSHR.circuit.tsx b/lib/chips/CC3551ENJARSHR.tsx similarity index 100% rename from lib/chips/CC3551ENJARSHR.circuit.tsx rename to lib/chips/CC3551ENJARSHR.tsx diff --git a/lib/chips/CD4069UBM96.circuit.tsx b/lib/chips/CD4069UBM96.tsx similarity index 100% rename from lib/chips/CD4069UBM96.circuit.tsx rename to lib/chips/CD4069UBM96.tsx diff --git a/lib/chips/CD74HC4067SM96.circuit.tsx b/lib/chips/CD74HC4067SM96.tsx similarity index 100% rename from lib/chips/CD74HC4067SM96.circuit.tsx rename to lib/chips/CD74HC4067SM96.tsx diff --git a/lib/chips/CD74HCT21M96.circuit.tsx b/lib/chips/CD74HCT21M96.tsx similarity index 100% rename from lib/chips/CD74HCT21M96.circuit.tsx rename to lib/chips/CD74HCT21M96.tsx diff --git a/lib/chips/CD74HCT4067M.circuit.tsx b/lib/chips/CD74HCT4067M.tsx similarity index 100% rename from lib/chips/CD74HCT4067M.circuit.tsx rename to lib/chips/CD74HCT4067M.tsx diff --git a/lib/chips/CDCE62002RHBT.circuit.tsx b/lib/chips/CDCE62002RHBT.tsx similarity index 100% rename from lib/chips/CDCE62002RHBT.circuit.tsx rename to lib/chips/CDCE62002RHBT.tsx diff --git a/lib/chips/CDCE913PWR.circuit.tsx b/lib/chips/CDCE913PWR.tsx similarity index 100% rename from lib/chips/CDCE913PWR.circuit.tsx rename to lib/chips/CDCE913PWR.tsx diff --git a/lib/chips/CDCLVC1106PWR.circuit.tsx b/lib/chips/CDCLVC1106PWR.tsx similarity index 100% rename from lib/chips/CDCLVC1106PWR.circuit.tsx rename to lib/chips/CDCLVC1106PWR.tsx diff --git a/lib/chips/CDCM9102RHBR.circuit.tsx b/lib/chips/CDCM9102RHBR.tsx similarity index 100% rename from lib/chips/CDCM9102RHBR.circuit.tsx rename to lib/chips/CDCM9102RHBR.tsx diff --git a/lib/chips/CSD13381F4T.circuit.tsx b/lib/chips/CSD13381F4T.tsx similarity index 100% rename from lib/chips/CSD13381F4T.circuit.tsx rename to lib/chips/CSD13381F4T.tsx diff --git a/lib/chips/CSD17382F4T.circuit.tsx b/lib/chips/CSD17382F4T.tsx similarity index 100% rename from lib/chips/CSD17382F4T.circuit.tsx rename to lib/chips/CSD17382F4T.tsx diff --git a/lib/chips/CSD17483F4T.circuit.tsx b/lib/chips/CSD17483F4T.tsx similarity index 100% rename from lib/chips/CSD17483F4T.circuit.tsx rename to lib/chips/CSD17483F4T.tsx diff --git a/lib/chips/CSD17484F4.circuit.tsx b/lib/chips/CSD17484F4.tsx similarity index 100% rename from lib/chips/CSD17484F4.circuit.tsx rename to lib/chips/CSD17484F4.tsx diff --git a/lib/chips/CSD17571Q2.circuit.tsx b/lib/chips/CSD17571Q2.tsx similarity index 100% rename from lib/chips/CSD17571Q2.circuit.tsx rename to lib/chips/CSD17571Q2.tsx diff --git a/lib/chips/CSD17573Q5B.circuit.tsx b/lib/chips/CSD17573Q5B.tsx similarity index 100% rename from lib/chips/CSD17573Q5B.circuit.tsx rename to lib/chips/CSD17573Q5B.tsx diff --git a/lib/chips/CSD17577Q3AT.circuit.tsx b/lib/chips/CSD17577Q3AT.tsx similarity index 100% rename from lib/chips/CSD17577Q3AT.circuit.tsx rename to lib/chips/CSD17577Q3AT.tsx diff --git a/lib/chips/CSD17578Q5A.circuit.tsx b/lib/chips/CSD17578Q5A.tsx similarity index 100% rename from lib/chips/CSD17578Q5A.circuit.tsx rename to lib/chips/CSD17578Q5A.tsx diff --git a/lib/chips/CSD17579Q3A.circuit.tsx b/lib/chips/CSD17579Q3A.tsx similarity index 100% rename from lib/chips/CSD17579Q3A.circuit.tsx rename to lib/chips/CSD17579Q3A.tsx diff --git a/lib/chips/CSD17581Q3AT.circuit.tsx b/lib/chips/CSD17581Q3AT.tsx similarity index 100% rename from lib/chips/CSD17581Q3AT.circuit.tsx rename to lib/chips/CSD17581Q3AT.tsx diff --git a/lib/chips/CSD18510Q5B.circuit.tsx b/lib/chips/CSD18510Q5B.tsx similarity index 100% rename from lib/chips/CSD18510Q5B.circuit.tsx rename to lib/chips/CSD18510Q5B.tsx diff --git a/lib/chips/CSD18513Q5A.circuit.tsx b/lib/chips/CSD18513Q5A.tsx similarity index 100% rename from lib/chips/CSD18513Q5A.circuit.tsx rename to lib/chips/CSD18513Q5A.tsx diff --git a/lib/chips/CSD18514Q5A.circuit.tsx b/lib/chips/CSD18514Q5A.tsx similarity index 100% rename from lib/chips/CSD18514Q5A.circuit.tsx rename to lib/chips/CSD18514Q5A.tsx diff --git a/lib/chips/CSD18531Q5AT.circuit.tsx b/lib/chips/CSD18531Q5AT.tsx similarity index 100% rename from lib/chips/CSD18531Q5AT.circuit.tsx rename to lib/chips/CSD18531Q5AT.tsx diff --git a/lib/chips/CSD18532Q5B.circuit.tsx b/lib/chips/CSD18532Q5B.tsx similarity index 100% rename from lib/chips/CSD18532Q5B.circuit.tsx rename to lib/chips/CSD18532Q5B.tsx diff --git a/lib/chips/CSD18534Q5A.circuit.tsx b/lib/chips/CSD18534Q5A.tsx similarity index 100% rename from lib/chips/CSD18534Q5A.circuit.tsx rename to lib/chips/CSD18534Q5A.tsx diff --git a/lib/chips/CSD18540Q5BT.circuit.tsx b/lib/chips/CSD18540Q5BT.tsx similarity index 100% rename from lib/chips/CSD18540Q5BT.circuit.tsx rename to lib/chips/CSD18540Q5BT.tsx diff --git a/lib/chips/CSD18541F5T.circuit.tsx b/lib/chips/CSD18541F5T.tsx similarity index 100% rename from lib/chips/CSD18541F5T.circuit.tsx rename to lib/chips/CSD18541F5T.tsx diff --git a/lib/chips/CSD18543Q3AT.circuit.tsx b/lib/chips/CSD18543Q3AT.tsx similarity index 100% rename from lib/chips/CSD18543Q3AT.circuit.tsx rename to lib/chips/CSD18543Q3AT.tsx diff --git a/lib/chips/CSD19501KCS.circuit.tsx b/lib/chips/CSD19501KCS.tsx similarity index 100% rename from lib/chips/CSD19501KCS.circuit.tsx rename to lib/chips/CSD19501KCS.tsx diff --git a/lib/chips/CSD19502Q5B.circuit.tsx b/lib/chips/CSD19502Q5B.tsx similarity index 100% rename from lib/chips/CSD19502Q5B.circuit.tsx rename to lib/chips/CSD19502Q5B.tsx diff --git a/lib/chips/CSD19531Q5AT.circuit.tsx b/lib/chips/CSD19531Q5AT.tsx similarity index 100% rename from lib/chips/CSD19531Q5AT.circuit.tsx rename to lib/chips/CSD19531Q5AT.tsx diff --git a/lib/chips/CSD19534Q5A.circuit.tsx b/lib/chips/CSD19534Q5A.tsx similarity index 100% rename from lib/chips/CSD19534Q5A.circuit.tsx rename to lib/chips/CSD19534Q5A.tsx diff --git a/lib/chips/CSD19535KTT.circuit.tsx b/lib/chips/CSD19535KTT.tsx similarity index 100% rename from lib/chips/CSD19535KTT.circuit.tsx rename to lib/chips/CSD19535KTT.tsx diff --git a/lib/chips/CSD19537Q3T.circuit.tsx b/lib/chips/CSD19537Q3T.tsx similarity index 100% rename from lib/chips/CSD19537Q3T.circuit.tsx rename to lib/chips/CSD19537Q3T.tsx diff --git a/lib/chips/CSD19538Q2T.circuit.tsx b/lib/chips/CSD19538Q2T.tsx similarity index 100% rename from lib/chips/CSD19538Q2T.circuit.tsx rename to lib/chips/CSD19538Q2T.tsx diff --git a/lib/chips/CSD25481F4.circuit.tsx b/lib/chips/CSD25481F4.tsx similarity index 100% rename from lib/chips/CSD25481F4.circuit.tsx rename to lib/chips/CSD25481F4.tsx diff --git a/lib/chips/CSD87502Q2T.circuit.tsx b/lib/chips/CSD87502Q2T.tsx similarity index 100% rename from lib/chips/CSD87502Q2T.circuit.tsx rename to lib/chips/CSD87502Q2T.tsx diff --git a/lib/chips/CSD88539NDT.circuit.tsx b/lib/chips/CSD88539NDT.tsx similarity index 100% rename from lib/chips/CSD88539NDT.circuit.tsx rename to lib/chips/CSD88539NDT.tsx diff --git a/lib/chips/CoaxialTestPort.circuit.tsx b/lib/chips/CoaxialTestPort.tsx similarity index 100% rename from lib/chips/CoaxialTestPort.circuit.tsx rename to lib/chips/CoaxialTestPort.tsx diff --git a/lib/chips/DAC121S101CIMK_NOPB.circuit.tsx b/lib/chips/DAC121S101CIMK_NOPB.tsx similarity index 100% rename from lib/chips/DAC121S101CIMK_NOPB.circuit.tsx rename to lib/chips/DAC121S101CIMK_NOPB.tsx diff --git a/lib/chips/DAC43701DSGR.circuit.tsx b/lib/chips/DAC43701DSGR.tsx similarity index 100% rename from lib/chips/DAC43701DSGR.circuit.tsx rename to lib/chips/DAC43701DSGR.tsx diff --git a/lib/chips/DAC53202RTER.circuit.tsx b/lib/chips/DAC53202RTER.tsx similarity index 100% rename from lib/chips/DAC53202RTER.circuit.tsx rename to lib/chips/DAC53202RTER.tsx diff --git a/lib/chips/DAC53204YBHR.circuit.tsx b/lib/chips/DAC53204YBHR.tsx similarity index 100% rename from lib/chips/DAC53204YBHR.circuit.tsx rename to lib/chips/DAC53204YBHR.tsx diff --git a/lib/chips/DAC63001RTER.circuit.tsx b/lib/chips/DAC63001RTER.tsx similarity index 100% rename from lib/chips/DAC63001RTER.circuit.tsx rename to lib/chips/DAC63001RTER.tsx diff --git a/lib/chips/DAC80502DRXR.circuit.tsx b/lib/chips/DAC80502DRXR.tsx similarity index 100% rename from lib/chips/DAC80502DRXR.circuit.tsx rename to lib/chips/DAC80502DRXR.tsx diff --git a/lib/chips/DAC8411IDCKT.circuit.tsx b/lib/chips/DAC8411IDCKT.tsx similarity index 100% rename from lib/chips/DAC8411IDCKT.circuit.tsx rename to lib/chips/DAC8411IDCKT.tsx diff --git a/lib/chips/DAC8564IAPWR.circuit.tsx b/lib/chips/DAC8564IAPWR.tsx similarity index 100% rename from lib/chips/DAC8564IAPWR.circuit.tsx rename to lib/chips/DAC8564IAPWR.tsx diff --git a/lib/chips/DCH010505SN7.circuit.tsx b/lib/chips/DCH010505SN7.tsx similarity index 100% rename from lib/chips/DCH010505SN7.circuit.tsx rename to lib/chips/DCH010505SN7.tsx diff --git a/lib/chips/DLP4500AFQD.circuit.tsx b/lib/chips/DLP4500AFQD.tsx similarity index 100% rename from lib/chips/DLP4500AFQD.circuit.tsx rename to lib/chips/DLP4500AFQD.tsx diff --git a/lib/chips/DM3730CUSD100.circuit.tsx b/lib/chips/DM3730CUSD100.tsx similarity index 100% rename from lib/chips/DM3730CUSD100.circuit.tsx rename to lib/chips/DM3730CUSD100.tsx diff --git a/lib/chips/DP83822HRHBT.circuit.tsx b/lib/chips/DP83822HRHBT.tsx similarity index 100% rename from lib/chips/DP83822HRHBT.circuit.tsx rename to lib/chips/DP83822HRHBT.tsx diff --git a/lib/chips/DP83822IRHBR.circuit.tsx b/lib/chips/DP83822IRHBR.tsx similarity index 100% rename from lib/chips/DP83822IRHBR.circuit.tsx rename to lib/chips/DP83822IRHBR.tsx diff --git a/lib/chips/DP83825IRMQT.circuit.tsx b/lib/chips/DP83825IRMQT.tsx similarity index 100% rename from lib/chips/DP83825IRMQT.circuit.tsx rename to lib/chips/DP83825IRMQT.tsx diff --git a/lib/chips/DP83826AERHBR.circuit.tsx b/lib/chips/DP83826AERHBR.tsx similarity index 100% rename from lib/chips/DP83826AERHBR.circuit.tsx rename to lib/chips/DP83826AERHBR.tsx diff --git a/lib/chips/DP83826AIRHBR.circuit.tsx b/lib/chips/DP83826AIRHBR.tsx similarity index 100% rename from lib/chips/DP83826AIRHBR.circuit.tsx rename to lib/chips/DP83826AIRHBR.tsx diff --git a/lib/chips/DP83826IRHBR.circuit.tsx b/lib/chips/DP83826IRHBR.tsx similarity index 100% rename from lib/chips/DP83826IRHBR.circuit.tsx rename to lib/chips/DP83826IRHBR.tsx diff --git a/lib/chips/DP83867CRRGZR.circuit.tsx b/lib/chips/DP83867CRRGZR.tsx similarity index 100% rename from lib/chips/DP83867CRRGZR.circuit.tsx rename to lib/chips/DP83867CRRGZR.tsx diff --git a/lib/chips/DP83867ERGZR.circuit.tsx b/lib/chips/DP83867ERGZR.tsx similarity index 100% rename from lib/chips/DP83867ERGZR.circuit.tsx rename to lib/chips/DP83867ERGZR.tsx diff --git a/lib/chips/DP83867IRRGZT.circuit.tsx b/lib/chips/DP83867IRRGZT.tsx similarity index 100% rename from lib/chips/DP83867IRRGZT.circuit.tsx rename to lib/chips/DP83867IRRGZT.tsx diff --git a/lib/chips/DP83867ISRGZT.circuit.tsx b/lib/chips/DP83867ISRGZT.tsx similarity index 100% rename from lib/chips/DP83867ISRGZT.circuit.tsx rename to lib/chips/DP83867ISRGZT.tsx diff --git a/lib/chips/DRV110APWR.circuit.tsx b/lib/chips/DRV110APWR.tsx similarity index 100% rename from lib/chips/DRV110APWR.circuit.tsx rename to lib/chips/DRV110APWR.tsx diff --git a/lib/chips/DRV2605YZFR.circuit.tsx b/lib/chips/DRV2605YZFR.tsx similarity index 100% rename from lib/chips/DRV2605YZFR.circuit.tsx rename to lib/chips/DRV2605YZFR.tsx diff --git a/lib/chips/DRV2667RGPR.circuit.tsx b/lib/chips/DRV2667RGPR.tsx similarity index 100% rename from lib/chips/DRV2667RGPR.circuit.tsx rename to lib/chips/DRV2667RGPR.tsx diff --git a/lib/chips/DRV3256EPAPRQ1.circuit.tsx b/lib/chips/DRV3256EPAPRQ1.tsx similarity index 100% rename from lib/chips/DRV3256EPAPRQ1.circuit.tsx rename to lib/chips/DRV3256EPAPRQ1.tsx diff --git a/lib/chips/DRV5013ADELPGMQ1.circuit.tsx b/lib/chips/DRV5013ADELPGMQ1.tsx similarity index 100% rename from lib/chips/DRV5013ADELPGMQ1.circuit.tsx rename to lib/chips/DRV5013ADELPGMQ1.tsx diff --git a/lib/chips/DRV5013AGQLPG.circuit.tsx b/lib/chips/DRV5013AGQLPG.tsx similarity index 100% rename from lib/chips/DRV5013AGQLPG.circuit.tsx rename to lib/chips/DRV5013AGQLPG.tsx diff --git a/lib/chips/DRV8263HQVAKRQ1.circuit.tsx b/lib/chips/DRV8263HQVAKRQ1.tsx similarity index 100% rename from lib/chips/DRV8263HQVAKRQ1.circuit.tsx rename to lib/chips/DRV8263HQVAKRQ1.tsx diff --git a/lib/chips/DRV83053QPHPRQ1.circuit.tsx b/lib/chips/DRV83053QPHPRQ1.tsx similarity index 100% rename from lib/chips/DRV83053QPHPRQ1.circuit.tsx rename to lib/chips/DRV83053QPHPRQ1.tsx diff --git a/lib/chips/DRV8363QRGZRQ1.circuit.tsx b/lib/chips/DRV8363QRGZRQ1.tsx similarity index 100% rename from lib/chips/DRV8363QRGZRQ1.circuit.tsx rename to lib/chips/DRV8363QRGZRQ1.tsx diff --git a/lib/chips/DRV8833.circuit.tsx b/lib/chips/DRV8833.tsx similarity index 100% rename from lib/chips/DRV8833.circuit.tsx rename to lib/chips/DRV8833.tsx diff --git a/lib/chips/DRV8876.circuit.tsx b/lib/chips/DRV8876.tsx similarity index 100% rename from lib/chips/DRV8876.circuit.tsx rename to lib/chips/DRV8876.tsx diff --git a/lib/chips/DS90LT012ATMF_NOPB.circuit.tsx b/lib/chips/DS90LT012ATMF_NOPB.tsx similarity index 100% rename from lib/chips/DS90LT012ATMF_NOPB.circuit.tsx rename to lib/chips/DS90LT012ATMF_NOPB.tsx diff --git a/lib/chips/DS90LV011ATMF_NOPB.circuit.tsx b/lib/chips/DS90LV011ATMF_NOPB.tsx similarity index 100% rename from lib/chips/DS90LV011ATMF_NOPB.circuit.tsx rename to lib/chips/DS90LV011ATMF_NOPB.tsx diff --git a/lib/chips/DS90LV047ATMX_NOPB.circuit.tsx b/lib/chips/DS90LV047ATMX_NOPB.tsx similarity index 100% rename from lib/chips/DS90LV047ATMX_NOPB.circuit.tsx rename to lib/chips/DS90LV047ATMX_NOPB.tsx diff --git a/lib/chips/DS90LV048ATMX_NOPB.circuit.tsx b/lib/chips/DS90LV048ATMX_NOPB.tsx similarity index 100% rename from lib/chips/DS90LV048ATMX_NOPB.circuit.tsx rename to lib/chips/DS90LV048ATMX_NOPB.tsx diff --git a/lib/chips/ESD122DMXR.circuit.tsx b/lib/chips/ESD122DMXR.tsx similarity index 100% rename from lib/chips/ESD122DMXR.circuit.tsx rename to lib/chips/ESD122DMXR.tsx diff --git a/lib/chips/ESD204DQAR.circuit.tsx b/lib/chips/ESD204DQAR.tsx similarity index 100% rename from lib/chips/ESD204DQAR.circuit.tsx rename to lib/chips/ESD204DQAR.tsx diff --git a/lib/chips/ESD321DPYR.circuit.tsx b/lib/chips/ESD321DPYR.tsx similarity index 100% rename from lib/chips/ESD321DPYR.circuit.tsx rename to lib/chips/ESD321DPYR.tsx diff --git a/lib/chips/ESD351DPYR.circuit.tsx b/lib/chips/ESD351DPYR.tsx similarity index 100% rename from lib/chips/ESD351DPYR.circuit.tsx rename to lib/chips/ESD351DPYR.tsx diff --git a/lib/chips/ESD401DPYR.circuit.tsx b/lib/chips/ESD401DPYR.tsx similarity index 100% rename from lib/chips/ESD401DPYR.circuit.tsx rename to lib/chips/ESD401DPYR.tsx diff --git a/lib/chips/ESD751DYAR.circuit.tsx b/lib/chips/ESD751DYAR.tsx similarity index 100% rename from lib/chips/ESD751DYAR.circuit.tsx rename to lib/chips/ESD751DYAR.tsx diff --git a/lib/chips/ESDS311DYFR.circuit.tsx b/lib/chips/ESDS311DYFR.tsx similarity index 100% rename from lib/chips/ESDS311DYFR.circuit.tsx rename to lib/chips/ESDS311DYFR.tsx diff --git a/lib/chips/F2800132PTR.circuit.tsx b/lib/chips/F2800132PTR.tsx similarity index 100% rename from lib/chips/F2800132PTR.circuit.tsx rename to lib/chips/F2800132PTR.tsx diff --git a/lib/chips/F2800133PMR.circuit.tsx b/lib/chips/F2800133PMR.tsx similarity index 100% rename from lib/chips/F2800133PMR.circuit.tsx rename to lib/chips/F2800133PMR.tsx diff --git a/lib/chips/F280025PNSR.circuit.tsx b/lib/chips/F280025PNSR.tsx similarity index 100% rename from lib/chips/F280025PNSR.circuit.tsx rename to lib/chips/F280025PNSR.tsx diff --git a/lib/chips/F280039CSPMR.circuit.tsx b/lib/chips/F280039CSPMR.tsx similarity index 100% rename from lib/chips/F280039CSPMR.circuit.tsx rename to lib/chips/F280039CSPMR.tsx diff --git a/lib/chips/F280040CPMQR.circuit.tsx b/lib/chips/F280040CPMQR.tsx similarity index 100% rename from lib/chips/F280040CPMQR.circuit.tsx rename to lib/chips/F280040CPMQR.tsx diff --git a/lib/chips/F280040PMQR.circuit.tsx b/lib/chips/F280040PMQR.tsx similarity index 100% rename from lib/chips/F280040PMQR.circuit.tsx rename to lib/chips/F280040PMQR.tsx diff --git a/lib/chips/F280041CPZQR.circuit.tsx b/lib/chips/F280041CPZQR.tsx similarity index 100% rename from lib/chips/F280041CPZQR.circuit.tsx rename to lib/chips/F280041CPZQR.tsx diff --git a/lib/chips/F280041PZQR.circuit.tsx b/lib/chips/F280041PZQR.tsx similarity index 100% rename from lib/chips/F280041PZQR.circuit.tsx rename to lib/chips/F280041PZQR.tsx diff --git a/lib/chips/F280049CPZQR.circuit.tsx b/lib/chips/F280049CPZQR.tsx similarity index 100% rename from lib/chips/F280049CPZQR.circuit.tsx rename to lib/chips/F280049CPZQR.tsx diff --git a/lib/chips/F280049CRSHSR.circuit.tsx b/lib/chips/F280049CRSHSR.tsx similarity index 100% rename from lib/chips/F280049CRSHSR.circuit.tsx rename to lib/chips/F280049CRSHSR.tsx diff --git a/lib/chips/F280049PZQ.circuit.tsx b/lib/chips/F280049PZQ.tsx similarity index 100% rename from lib/chips/F280049PZQ.circuit.tsx rename to lib/chips/F280049PZQ.tsx diff --git a/lib/chips/F28E120SCTPTR.circuit.tsx b/lib/chips/F28E120SCTPTR.tsx similarity index 100% rename from lib/chips/F28E120SCTPTR.circuit.tsx rename to lib/chips/F28E120SCTPTR.tsx diff --git a/lib/chips/F28M35H52C1RFPQ.circuit.tsx b/lib/chips/F28M35H52C1RFPQ.tsx similarity index 100% rename from lib/chips/F28M35H52C1RFPQ.circuit.tsx rename to lib/chips/F28M35H52C1RFPQ.tsx diff --git a/lib/chips/F28P550SJ9PZR.circuit.tsx b/lib/chips/F28P550SJ9PZR.tsx similarity index 100% rename from lib/chips/F28P550SJ9PZR.circuit.tsx rename to lib/chips/F28P550SJ9PZR.tsx diff --git a/lib/chips/F28P650DK6PZPR.circuit.tsx b/lib/chips/F28P650DK6PZPR.tsx similarity index 100% rename from lib/chips/F28P650DK6PZPR.circuit.tsx rename to lib/chips/F28P650DK6PZPR.tsx diff --git a/lib/chips/FDC2212DNTR.circuit.tsx b/lib/chips/FDC2212DNTR.tsx similarity index 100% rename from lib/chips/FDC2212DNTR.circuit.tsx rename to lib/chips/FDC2212DNTR.tsx diff --git a/lib/chips/HD3SS3220RNHT.circuit.tsx b/lib/chips/HD3SS3220RNHT.tsx similarity index 100% rename from lib/chips/HD3SS3220RNHT.circuit.tsx rename to lib/chips/HD3SS3220RNHT.tsx diff --git a/lib/chips/HDC2080.circuit.tsx b/lib/chips/HDC2080.tsx similarity index 88% rename from lib/chips/HDC2080.circuit.tsx rename to lib/chips/HDC2080.tsx index b9a20250..672a4a31 100644 --- a/lib/chips/HDC2080.circuit.tsx +++ b/lib/chips/HDC2080.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { HDC2080DMBR } from "./HDC2080DMBR.circuit.tsx"; +import { HDC2080DMBR } from "./HDC2080DMBR.tsx"; type HDC2080FootprintVariant = "wson_6_ep_3x3" | (string & {}); diff --git a/lib/chips/HDC2080DMBR.circuit.tsx b/lib/chips/HDC2080DMBR.tsx similarity index 100% rename from lib/chips/HDC2080DMBR.circuit.tsx rename to lib/chips/HDC2080DMBR.tsx diff --git a/lib/chips/HDC3020.circuit.tsx b/lib/chips/HDC3020.tsx similarity index 89% rename from lib/chips/HDC3020.circuit.tsx rename to lib/chips/HDC3020.tsx index 7fa8d715..f70063df 100644 --- a/lib/chips/HDC3020.circuit.tsx +++ b/lib/chips/HDC3020.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { HDC3020DEFR } from "./HDC3020DEFR.circuit.tsx"; +import { HDC3020DEFR } from "./HDC3020DEFR.tsx"; type HDC3020FootprintVariant = "wson_8_ep_2p5x2p5" | (string & {}); diff --git a/lib/chips/HDC3020DEFR.circuit.tsx b/lib/chips/HDC3020DEFR.tsx similarity index 100% rename from lib/chips/HDC3020DEFR.circuit.tsx rename to lib/chips/HDC3020DEFR.tsx diff --git a/lib/chips/HDC3021QDEHRQ1.circuit.tsx b/lib/chips/HDC3021QDEHRQ1.tsx similarity index 100% rename from lib/chips/HDC3021QDEHRQ1.circuit.tsx rename to lib/chips/HDC3021QDEHRQ1.tsx diff --git a/lib/chips/HDC3022.circuit.tsx b/lib/chips/HDC3022.tsx similarity index 89% rename from lib/chips/HDC3022.circuit.tsx rename to lib/chips/HDC3022.tsx index 4341cb25..c78e6454 100644 --- a/lib/chips/HDC3022.circuit.tsx +++ b/lib/chips/HDC3022.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { HDC3022DEJR } from "./HDC3022DEJR.circuit.tsx"; +import { HDC3022DEJR } from "./HDC3022DEJR.tsx"; type HDC3022FootprintVariant = "wson_8_ep_2p5x2p5" | (string & {}); diff --git a/lib/chips/HDC3022DEJR.circuit.tsx b/lib/chips/HDC3022DEJR.tsx similarity index 100% rename from lib/chips/HDC3022DEJR.circuit.tsx rename to lib/chips/HDC3022DEJR.tsx diff --git a/lib/chips/Header2x10.circuit.tsx b/lib/chips/Header2x10.tsx similarity index 100% rename from lib/chips/Header2x10.circuit.tsx rename to lib/chips/Header2x10.tsx diff --git a/lib/chips/INA138NA_3K.circuit.tsx b/lib/chips/INA138NA_3K.tsx similarity index 100% rename from lib/chips/INA138NA_3K.circuit.tsx rename to lib/chips/INA138NA_3K.tsx diff --git a/lib/chips/INA138QPWRQ1.circuit.tsx b/lib/chips/INA138QPWRQ1.tsx similarity index 100% rename from lib/chips/INA138QPWRQ1.circuit.tsx rename to lib/chips/INA138QPWRQ1.tsx diff --git a/lib/chips/INA139NA_3K.circuit.tsx b/lib/chips/INA139NA_3K.tsx similarity index 100% rename from lib/chips/INA139NA_3K.circuit.tsx rename to lib/chips/INA139NA_3K.tsx diff --git a/lib/chips/INA169NA_3K.circuit.tsx b/lib/chips/INA169NA_3K.tsx similarity index 100% rename from lib/chips/INA169NA_3K.circuit.tsx rename to lib/chips/INA169NA_3K.tsx diff --git a/lib/chips/INA181A2IDBVR.circuit.tsx b/lib/chips/INA181A2IDBVR.tsx similarity index 100% rename from lib/chips/INA181A2IDBVR.circuit.tsx rename to lib/chips/INA181A2IDBVR.tsx diff --git a/lib/chips/INA186A2IDDFR.circuit.tsx b/lib/chips/INA186A2IDDFR.tsx similarity index 100% rename from lib/chips/INA186A2IDDFR.circuit.tsx rename to lib/chips/INA186A2IDDFR.tsx diff --git a/lib/chips/INA188IDR.circuit.tsx b/lib/chips/INA188IDR.tsx similarity index 100% rename from lib/chips/INA188IDR.circuit.tsx rename to lib/chips/INA188IDR.tsx diff --git a/lib/chips/INA199A3DCKR.circuit.tsx b/lib/chips/INA199A3DCKR.tsx similarity index 100% rename from lib/chips/INA199A3DCKR.circuit.tsx rename to lib/chips/INA199A3DCKR.tsx diff --git a/lib/chips/INA213BIDCKT.circuit.tsx b/lib/chips/INA213BIDCKT.tsx similarity index 100% rename from lib/chips/INA213BIDCKT.circuit.tsx rename to lib/chips/INA213BIDCKT.tsx diff --git a/lib/chips/INA2181A2IDGSR.circuit.tsx b/lib/chips/INA2181A2IDGSR.tsx similarity index 100% rename from lib/chips/INA2181A2IDGSR.circuit.tsx rename to lib/chips/INA2181A2IDGSR.tsx diff --git a/lib/chips/INA228AIDGSR.circuit.tsx b/lib/chips/INA228AIDGSR.tsx similarity index 100% rename from lib/chips/INA228AIDGSR.circuit.tsx rename to lib/chips/INA228AIDGSR.tsx diff --git a/lib/chips/INA230AIRGTR.circuit.tsx b/lib/chips/INA230AIRGTR.tsx similarity index 100% rename from lib/chips/INA230AIRGTR.circuit.tsx rename to lib/chips/INA230AIRGTR.tsx diff --git a/lib/chips/INA236AIYBJR.circuit.tsx b/lib/chips/INA236AIYBJR.tsx similarity index 100% rename from lib/chips/INA236AIYBJR.circuit.tsx rename to lib/chips/INA236AIYBJR.tsx diff --git a/lib/chips/INA237.circuit.tsx b/lib/chips/INA237.tsx similarity index 87% rename from lib/chips/INA237.circuit.tsx rename to lib/chips/INA237.tsx index b8127299..759e7197 100644 --- a/lib/chips/INA237.circuit.tsx +++ b/lib/chips/INA237.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { INA237AQDGSRQ1 } from "./INA237AQDGSRQ1.circuit.tsx"; +import { INA237AQDGSRQ1 } from "./INA237AQDGSRQ1.tsx"; type INA237FootprintVariant = "vssop_10" | (string & {}); diff --git a/lib/chips/INA237AQDGSRQ1.circuit.tsx b/lib/chips/INA237AQDGSRQ1.tsx similarity index 100% rename from lib/chips/INA237AQDGSRQ1.circuit.tsx rename to lib/chips/INA237AQDGSRQ1.tsx diff --git a/lib/chips/INA240A1DR.circuit.tsx b/lib/chips/INA240A1DR.tsx similarity index 100% rename from lib/chips/INA240A1DR.circuit.tsx rename to lib/chips/INA240A1DR.tsx diff --git a/lib/chips/INA240A3QDRQ1.circuit.tsx b/lib/chips/INA240A3QDRQ1.tsx similarity index 100% rename from lib/chips/INA240A3QDRQ1.circuit.tsx rename to lib/chips/INA240A3QDRQ1.tsx diff --git a/lib/chips/INA241A5IDDFR.circuit.tsx b/lib/chips/INA241A5IDDFR.tsx similarity index 100% rename from lib/chips/INA241A5IDDFR.circuit.tsx rename to lib/chips/INA241A5IDDFR.tsx diff --git a/lib/chips/INA280A3IDCKT.circuit.tsx b/lib/chips/INA280A3IDCKT.tsx similarity index 100% rename from lib/chips/INA280A3IDCKT.circuit.tsx rename to lib/chips/INA280A3IDCKT.tsx diff --git a/lib/chips/INA281A3IDBVR.circuit.tsx b/lib/chips/INA281A3IDBVR.tsx similarity index 100% rename from lib/chips/INA281A3IDBVR.circuit.tsx rename to lib/chips/INA281A3IDBVR.tsx diff --git a/lib/chips/INA296A4IDDFR.circuit.tsx b/lib/chips/INA296A4IDDFR.tsx similarity index 100% rename from lib/chips/INA296A4IDDFR.circuit.tsx rename to lib/chips/INA296A4IDDFR.tsx diff --git a/lib/chips/INA296B4IDDFR.circuit.tsx b/lib/chips/INA296B4IDDFR.tsx similarity index 100% rename from lib/chips/INA296B4IDDFR.circuit.tsx rename to lib/chips/INA296B4IDDFR.tsx diff --git a/lib/chips/INA310A4IDGKR.circuit.tsx b/lib/chips/INA310A4IDGKR.tsx similarity index 100% rename from lib/chips/INA310A4IDGKR.circuit.tsx rename to lib/chips/INA310A4IDGKR.tsx diff --git a/lib/chips/INA3221AIRGVR.circuit.tsx b/lib/chips/INA3221AIRGVR.tsx similarity index 100% rename from lib/chips/INA3221AIRGVR.circuit.tsx rename to lib/chips/INA3221AIRGVR.tsx diff --git a/lib/chips/INA818IDR.circuit.tsx b/lib/chips/INA818IDR.tsx similarity index 100% rename from lib/chips/INA818IDR.circuit.tsx rename to lib/chips/INA818IDR.tsx diff --git a/lib/chips/INA826AIDR.circuit.tsx b/lib/chips/INA826AIDR.tsx similarity index 100% rename from lib/chips/INA826AIDR.circuit.tsx rename to lib/chips/INA826AIDR.tsx diff --git a/lib/chips/ISO1042DWR.circuit.tsx b/lib/chips/ISO1042DWR.tsx similarity index 100% rename from lib/chips/ISO1042DWR.circuit.tsx rename to lib/chips/ISO1042DWR.tsx diff --git a/lib/chips/ISO1044BD.circuit.tsx b/lib/chips/ISO1044BD.tsx similarity index 100% rename from lib/chips/ISO1044BD.circuit.tsx rename to lib/chips/ISO1044BD.tsx diff --git a/lib/chips/ISO1050DWR.circuit.tsx b/lib/chips/ISO1050DWR.tsx similarity index 100% rename from lib/chips/ISO1050DWR.circuit.tsx rename to lib/chips/ISO1050DWR.tsx diff --git a/lib/chips/ISO1176DWR.circuit.tsx b/lib/chips/ISO1176DWR.tsx similarity index 100% rename from lib/chips/ISO1176DWR.circuit.tsx rename to lib/chips/ISO1176DWR.tsx diff --git a/lib/chips/ISO1410BDWR.circuit.tsx b/lib/chips/ISO1410BDWR.tsx similarity index 100% rename from lib/chips/ISO1410BDWR.circuit.tsx rename to lib/chips/ISO1410BDWR.tsx diff --git a/lib/chips/ISO1541DR.circuit.tsx b/lib/chips/ISO1541DR.tsx similarity index 100% rename from lib/chips/ISO1541DR.circuit.tsx rename to lib/chips/ISO1541DR.tsx diff --git a/lib/chips/ISO3082DWR.circuit.tsx b/lib/chips/ISO3082DWR.tsx similarity index 100% rename from lib/chips/ISO3082DWR.circuit.tsx rename to lib/chips/ISO3082DWR.tsx diff --git a/lib/chips/ISO3088DWR.circuit.tsx b/lib/chips/ISO3088DWR.tsx similarity index 100% rename from lib/chips/ISO3088DWR.circuit.tsx rename to lib/chips/ISO3088DWR.tsx diff --git a/lib/chips/ISO5452DWR.circuit.tsx b/lib/chips/ISO5452DWR.tsx similarity index 100% rename from lib/chips/ISO5452DWR.circuit.tsx rename to lib/chips/ISO5452DWR.tsx diff --git a/lib/chips/ISO5851DWR.circuit.tsx b/lib/chips/ISO5851DWR.tsx similarity index 100% rename from lib/chips/ISO5851DWR.circuit.tsx rename to lib/chips/ISO5851DWR.tsx diff --git a/lib/chips/ISO6420DR.circuit.tsx b/lib/chips/ISO6420DR.tsx similarity index 100% rename from lib/chips/ISO6420DR.circuit.tsx rename to lib/chips/ISO6420DR.tsx diff --git a/lib/chips/ISO6421DR.circuit.tsx b/lib/chips/ISO6421DR.tsx similarity index 100% rename from lib/chips/ISO6421DR.circuit.tsx rename to lib/chips/ISO6421DR.tsx diff --git a/lib/chips/ISO6421DRQ1.circuit.tsx b/lib/chips/ISO6421DRQ1.tsx similarity index 100% rename from lib/chips/ISO6421DRQ1.circuit.tsx rename to lib/chips/ISO6421DRQ1.tsx diff --git a/lib/chips/ISO6431DBQR.circuit.tsx b/lib/chips/ISO6431DBQR.tsx similarity index 100% rename from lib/chips/ISO6431DBQR.circuit.tsx rename to lib/chips/ISO6431DBQR.tsx diff --git a/lib/chips/ISO6440DBQR.circuit.tsx b/lib/chips/ISO6440DBQR.tsx similarity index 100% rename from lib/chips/ISO6440DBQR.circuit.tsx rename to lib/chips/ISO6440DBQR.tsx diff --git a/lib/chips/ISO6440DBQRQ1.circuit.tsx b/lib/chips/ISO6440DBQRQ1.tsx similarity index 100% rename from lib/chips/ISO6440DBQRQ1.circuit.tsx rename to lib/chips/ISO6440DBQRQ1.tsx diff --git a/lib/chips/ISO6441DWR.circuit.tsx b/lib/chips/ISO6441DWR.tsx similarity index 100% rename from lib/chips/ISO6441DWR.circuit.tsx rename to lib/chips/ISO6441DWR.tsx diff --git a/lib/chips/ISO6442DBQR.circuit.tsx b/lib/chips/ISO6442DBQR.tsx similarity index 100% rename from lib/chips/ISO6442DBQR.circuit.tsx rename to lib/chips/ISO6442DBQR.tsx diff --git a/lib/chips/ISO6521REUR.circuit.tsx b/lib/chips/ISO6521REUR.tsx similarity index 100% rename from lib/chips/ISO6521REUR.circuit.tsx rename to lib/chips/ISO6521REUR.tsx diff --git a/lib/chips/ISO7760DBQR.circuit.tsx b/lib/chips/ISO7760DBQR.tsx similarity index 100% rename from lib/chips/ISO7760DBQR.circuit.tsx rename to lib/chips/ISO7760DBQR.tsx diff --git a/lib/chips/ISO7841FDWW.circuit.tsx b/lib/chips/ISO7841FDWW.tsx similarity index 100% rename from lib/chips/ISO7841FDWW.circuit.tsx rename to lib/chips/ISO7841FDWW.tsx diff --git a/lib/chips/ISO7842DWR.circuit.tsx b/lib/chips/ISO7842DWR.tsx similarity index 100% rename from lib/chips/ISO7842DWR.circuit.tsx rename to lib/chips/ISO7842DWR.tsx diff --git a/lib/chips/IWRL6432BDBAAMFR.circuit.tsx b/lib/chips/IWRL6432BDBAAMFR.tsx similarity index 100% rename from lib/chips/IWRL6432BDBAAMFR.circuit.tsx rename to lib/chips/IWRL6432BDBAAMFR.tsx diff --git a/lib/chips/IWRL6432BRQAAMYR.circuit.tsx b/lib/chips/IWRL6432BRQAAMYR.tsx similarity index 100% rename from lib/chips/IWRL6432BRQAAMYR.circuit.tsx rename to lib/chips/IWRL6432BRQAAMYR.tsx diff --git a/lib/chips/LDC1312DNTR.circuit.tsx b/lib/chips/LDC1312DNTR.tsx similarity index 100% rename from lib/chips/LDC1312DNTR.circuit.tsx rename to lib/chips/LDC1312DNTR.tsx diff --git a/lib/chips/LDC1314RGHR.circuit.tsx b/lib/chips/LDC1314RGHR.tsx similarity index 100% rename from lib/chips/LDC1314RGHR.circuit.tsx rename to lib/chips/LDC1314RGHR.tsx diff --git a/lib/chips/LDC1612DNTR.circuit.tsx b/lib/chips/LDC1612DNTR.tsx similarity index 100% rename from lib/chips/LDC1612DNTR.circuit.tsx rename to lib/chips/LDC1612DNTR.tsx diff --git a/lib/chips/LDC1614RGHR.circuit.tsx b/lib/chips/LDC1614RGHR.tsx similarity index 100% rename from lib/chips/LDC1614RGHR.circuit.tsx rename to lib/chips/LDC1614RGHR.tsx diff --git a/lib/chips/LM111733QKVURQ1.circuit.tsx b/lib/chips/LM111733QKVURQ1.tsx similarity index 100% rename from lib/chips/LM111733QKVURQ1.circuit.tsx rename to lib/chips/LM111733QKVURQ1.tsx diff --git a/lib/chips/LM20242MHX_NOPB.circuit.tsx b/lib/chips/LM20242MHX_NOPB.tsx similarity index 100% rename from lib/chips/LM20242MHX_NOPB.circuit.tsx rename to lib/chips/LM20242MHX_NOPB.tsx diff --git a/lib/chips/LM20CIM7_NOPB.circuit.tsx b/lib/chips/LM20CIM7_NOPB.tsx similarity index 100% rename from lib/chips/LM20CIM7_NOPB.circuit.tsx rename to lib/chips/LM20CIM7_NOPB.tsx diff --git a/lib/chips/LM239N.circuit.tsx b/lib/chips/LM239N.tsx similarity index 100% rename from lib/chips/LM239N.circuit.tsx rename to lib/chips/LM239N.tsx diff --git a/lib/chips/LM2901AVQDRG4Q1.circuit.tsx b/lib/chips/LM2901AVQDRG4Q1.tsx similarity index 100% rename from lib/chips/LM2901AVQDRG4Q1.circuit.tsx rename to lib/chips/LM2901AVQDRG4Q1.tsx diff --git a/lib/chips/LM2902BIDR.circuit.tsx b/lib/chips/LM2902BIDR.tsx similarity index 100% rename from lib/chips/LM2902BIDR.circuit.tsx rename to lib/chips/LM2902BIDR.tsx diff --git a/lib/chips/LM2903BIDR.circuit.tsx b/lib/chips/LM2903BIDR.tsx similarity index 100% rename from lib/chips/LM2903BIDR.circuit.tsx rename to lib/chips/LM2903BIDR.tsx diff --git a/lib/chips/LM2903DR.circuit.tsx b/lib/chips/LM2903DR.tsx similarity index 100% rename from lib/chips/LM2903DR.circuit.tsx rename to lib/chips/LM2903DR.tsx diff --git a/lib/chips/LM2904BIDGKR.circuit.tsx b/lib/chips/LM2904BIDGKR.tsx similarity index 100% rename from lib/chips/LM2904BIDGKR.circuit.tsx rename to lib/chips/LM2904BIDGKR.tsx diff --git a/lib/chips/LM321LVIDBVR.circuit.tsx b/lib/chips/LM321LVIDBVR.tsx similarity index 100% rename from lib/chips/LM321LVIDBVR.circuit.tsx rename to lib/chips/LM321LVIDBVR.tsx diff --git a/lib/chips/LM324BIPWR.circuit.tsx b/lib/chips/LM324BIPWR.tsx similarity index 100% rename from lib/chips/LM324BIPWR.circuit.tsx rename to lib/chips/LM324BIPWR.tsx diff --git a/lib/chips/LM339BIDR.circuit.tsx b/lib/chips/LM339BIDR.tsx similarity index 100% rename from lib/chips/LM339BIDR.circuit.tsx rename to lib/chips/LM339BIDR.tsx diff --git a/lib/chips/LM339LVPWR.circuit.tsx b/lib/chips/LM339LVPWR.tsx similarity index 100% rename from lib/chips/LM339LVPWR.circuit.tsx rename to lib/chips/LM339LVPWR.tsx diff --git a/lib/chips/LM358BIPWR.circuit.tsx b/lib/chips/LM358BIPWR.tsx similarity index 100% rename from lib/chips/LM358BIPWR.circuit.tsx rename to lib/chips/LM358BIPWR.tsx diff --git a/lib/chips/LM358LVIPWR.circuit.tsx b/lib/chips/LM358LVIPWR.tsx similarity index 100% rename from lib/chips/LM358LVIPWR.circuit.tsx rename to lib/chips/LM358LVIPWR.tsx diff --git a/lib/chips/LM3644YFFR.circuit.tsx b/lib/chips/LM3644YFFR.tsx similarity index 100% rename from lib/chips/LM3644YFFR.circuit.tsx rename to lib/chips/LM3644YFFR.tsx diff --git a/lib/chips/LM3880MF_1AC_NOPB.circuit.tsx b/lib/chips/LM3880MF_1AC_NOPB.tsx similarity index 100% rename from lib/chips/LM3880MF_1AC_NOPB.circuit.tsx rename to lib/chips/LM3880MF_1AC_NOPB.tsx diff --git a/lib/chips/LM3881MMX_NOPB.circuit.tsx b/lib/chips/LM3881MMX_NOPB.tsx similarity index 100% rename from lib/chips/LM3881MMX_NOPB.circuit.tsx rename to lib/chips/LM3881MMX_NOPB.tsx diff --git a/lib/chips/LM393ADR.circuit.tsx b/lib/chips/LM393ADR.tsx similarity index 100% rename from lib/chips/LM393ADR.circuit.tsx rename to lib/chips/LM393ADR.tsx diff --git a/lib/chips/LM393BIDR.circuit.tsx b/lib/chips/LM393BIDR.tsx similarity index 100% rename from lib/chips/LM393BIDR.circuit.tsx rename to lib/chips/LM393BIDR.tsx diff --git a/lib/chips/LM393PWR.circuit.tsx b/lib/chips/LM393PWR.tsx similarity index 100% rename from lib/chips/LM393PWR.circuit.tsx rename to lib/chips/LM393PWR.tsx diff --git a/lib/chips/LM4041A12IDBZR.circuit.tsx b/lib/chips/LM4041A12IDBZR.tsx similarity index 100% rename from lib/chips/LM4041A12IDBZR.circuit.tsx rename to lib/chips/LM4041A12IDBZR.tsx diff --git a/lib/chips/LM4041CIDCKR.circuit.tsx b/lib/chips/LM4041CIDCKR.tsx similarity index 100% rename from lib/chips/LM4041CIDCKR.circuit.tsx rename to lib/chips/LM4041CIDCKR.tsx diff --git a/lib/chips/LM4060A12EDBZR.circuit.tsx b/lib/chips/LM4060A12EDBZR.tsx similarity index 100% rename from lib/chips/LM4060A12EDBZR.circuit.tsx rename to lib/chips/LM4060A12EDBZR.tsx diff --git a/lib/chips/LM5020MM_2_NOPB.circuit.tsx b/lib/chips/LM5020MM_2_NOPB.tsx similarity index 100% rename from lib/chips/LM5020MM_2_NOPB.circuit.tsx rename to lib/chips/LM5020MM_2_NOPB.tsx diff --git a/lib/chips/LM5033SDX_NOPB.circuit.tsx b/lib/chips/LM5033SDX_NOPB.tsx similarity index 100% rename from lib/chips/LM5033SDX_NOPB.circuit.tsx rename to lib/chips/LM5033SDX_NOPB.tsx diff --git a/lib/chips/LM5050MK_1_NOPB.circuit.tsx b/lib/chips/LM5050MK_1_NOPB.tsx similarity index 100% rename from lib/chips/LM5050MK_1_NOPB.circuit.tsx rename to lib/chips/LM5050MK_1_NOPB.tsx diff --git a/lib/chips/LM5050Q1MK_1_NOPB.circuit.tsx b/lib/chips/LM5050Q1MK_1_NOPB.tsx similarity index 100% rename from lib/chips/LM5050Q1MK_1_NOPB.circuit.tsx rename to lib/chips/LM5050Q1MK_1_NOPB.tsx diff --git a/lib/chips/LM5060Q1MM_NOPB.circuit.tsx b/lib/chips/LM5060Q1MM_NOPB.tsx similarity index 100% rename from lib/chips/LM5060Q1MM_NOPB.circuit.tsx rename to lib/chips/LM5060Q1MM_NOPB.tsx diff --git a/lib/chips/LM5069MM_1_NOPB.circuit.tsx b/lib/chips/LM5069MM_1_NOPB.tsx similarity index 100% rename from lib/chips/LM5069MM_1_NOPB.circuit.tsx rename to lib/chips/LM5069MM_1_NOPB.tsx diff --git a/lib/chips/LM5106MMX_NOPB.circuit.tsx b/lib/chips/LM5106MMX_NOPB.tsx similarity index 100% rename from lib/chips/LM5106MMX_NOPB.circuit.tsx rename to lib/chips/LM5106MMX_NOPB.tsx diff --git a/lib/chips/LM5123QRGRRQ1.circuit.tsx b/lib/chips/LM5123QRGRRQ1.tsx similarity index 100% rename from lib/chips/LM5123QRGRRQ1.circuit.tsx rename to lib/chips/LM5123QRGRRQ1.tsx diff --git a/lib/chips/LM51551DSSR.circuit.tsx b/lib/chips/LM51551DSSR.tsx similarity index 100% rename from lib/chips/LM51551DSSR.circuit.tsx rename to lib/chips/LM51551DSSR.tsx diff --git a/lib/chips/LM5156DSSR.circuit.tsx b/lib/chips/LM5156DSSR.tsx similarity index 100% rename from lib/chips/LM5156DSSR.circuit.tsx rename to lib/chips/LM5156DSSR.tsx diff --git a/lib/chips/LM5163DDAR.circuit.tsx b/lib/chips/LM5163DDAR.tsx similarity index 100% rename from lib/chips/LM5163DDAR.circuit.tsx rename to lib/chips/LM5163DDAR.tsx diff --git a/lib/chips/LM5164DDAR.circuit.tsx b/lib/chips/LM5164DDAR.tsx similarity index 100% rename from lib/chips/LM5164DDAR.circuit.tsx rename to lib/chips/LM5164DDAR.tsx diff --git a/lib/chips/LM536005QDSXRQ1.circuit.tsx b/lib/chips/LM536005QDSXRQ1.tsx similarity index 100% rename from lib/chips/LM536005QDSXRQ1.circuit.tsx rename to lib/chips/LM536005QDSXRQ1.tsx diff --git a/lib/chips/LM62460RPHR.circuit.tsx b/lib/chips/LM62460RPHR.tsx similarity index 100% rename from lib/chips/LM62460RPHR.circuit.tsx rename to lib/chips/LM62460RPHR.tsx diff --git a/lib/chips/LM62CIM3_NOPB.circuit.tsx b/lib/chips/LM62CIM3_NOPB.tsx similarity index 100% rename from lib/chips/LM62CIM3_NOPB.circuit.tsx rename to lib/chips/LM62CIM3_NOPB.tsx diff --git a/lib/chips/LM74610QDGKRQ1.circuit.tsx b/lib/chips/LM74610QDGKRQ1.tsx similarity index 100% rename from lib/chips/LM74610QDGKRQ1.circuit.tsx rename to lib/chips/LM74610QDGKRQ1.tsx diff --git a/lib/chips/LM74700QDRQ1.circuit.tsx b/lib/chips/LM74700QDRQ1.tsx similarity index 100% rename from lib/chips/LM74700QDRQ1.circuit.tsx rename to lib/chips/LM74700QDRQ1.tsx diff --git a/lib/chips/LM74900QRGERQ1.circuit.tsx b/lib/chips/LM74900QRGERQ1.tsx similarity index 100% rename from lib/chips/LM74900QRGERQ1.circuit.tsx rename to lib/chips/LM74900QRGERQ1.tsx diff --git a/lib/chips/LM95235DIMMX_NOPB.circuit.tsx b/lib/chips/LM95235DIMMX_NOPB.tsx similarity index 100% rename from lib/chips/LM95235DIMMX_NOPB.circuit.tsx rename to lib/chips/LM95235DIMMX_NOPB.tsx diff --git a/lib/chips/LMC555CMX_NOPB.circuit.tsx b/lib/chips/LMC555CMX_NOPB.tsx similarity index 100% rename from lib/chips/LMC555CMX_NOPB.circuit.tsx rename to lib/chips/LMC555CMX_NOPB.tsx diff --git a/lib/chips/LMG1210RVRR.circuit.tsx b/lib/chips/LMG1210RVRR.tsx similarity index 100% rename from lib/chips/LMG1210RVRR.circuit.tsx rename to lib/chips/LMG1210RVRR.tsx diff --git a/lib/chips/LMG3410R150RWHR.circuit.tsx b/lib/chips/LMG3410R150RWHR.tsx similarity index 100% rename from lib/chips/LMG3410R150RWHR.circuit.tsx rename to lib/chips/LMG3410R150RWHR.tsx diff --git a/lib/chips/LMG3411R070RWHR.circuit.tsx b/lib/chips/LMG3411R070RWHR.tsx similarity index 100% rename from lib/chips/LMG3411R070RWHR.circuit.tsx rename to lib/chips/LMG3411R070RWHR.tsx diff --git a/lib/chips/LMG3612REQR.circuit.tsx b/lib/chips/LMG3612REQR.tsx similarity index 100% rename from lib/chips/LMG3612REQR.circuit.tsx rename to lib/chips/LMG3612REQR.tsx diff --git a/lib/chips/LMK04828BISQE_NOPB.circuit.tsx b/lib/chips/LMK04828BISQE_NOPB.tsx similarity index 100% rename from lib/chips/LMK04828BISQE_NOPB.circuit.tsx rename to lib/chips/LMK04828BISQE_NOPB.tsx diff --git a/lib/chips/LMK1C1102PWR.circuit.tsx b/lib/chips/LMK1C1102PWR.tsx similarity index 100% rename from lib/chips/LMK1C1102PWR.circuit.tsx rename to lib/chips/LMK1C1102PWR.tsx diff --git a/lib/chips/LMK1C1103PWR.circuit.tsx b/lib/chips/LMK1C1103PWR.tsx similarity index 100% rename from lib/chips/LMK1C1103PWR.circuit.tsx rename to lib/chips/LMK1C1103PWR.tsx diff --git a/lib/chips/LMK1C1104DQFR.circuit.tsx b/lib/chips/LMK1C1104DQFR.tsx similarity index 100% rename from lib/chips/LMK1C1104DQFR.circuit.tsx rename to lib/chips/LMK1C1104DQFR.tsx diff --git a/lib/chips/LMK1C1108PWR.circuit.tsx b/lib/chips/LMK1C1108PWR.tsx similarity index 100% rename from lib/chips/LMK1C1108PWR.circuit.tsx rename to lib/chips/LMK1C1108PWR.tsx diff --git a/lib/chips/LMK6DA10000ADLFR.circuit.tsx b/lib/chips/LMK6DA10000ADLFR.tsx similarity index 100% rename from lib/chips/LMK6DA10000ADLFR.circuit.tsx rename to lib/chips/LMK6DA10000ADLFR.tsx diff --git a/lib/chips/LMP8480MMX_T_NOPB.circuit.tsx b/lib/chips/LMP8480MMX_T_NOPB.tsx similarity index 100% rename from lib/chips/LMP8480MMX_T_NOPB.circuit.tsx rename to lib/chips/LMP8480MMX_T_NOPB.tsx diff --git a/lib/chips/LMP8601MA_NOPB.circuit.tsx b/lib/chips/LMP8601MA_NOPB.tsx similarity index 100% rename from lib/chips/LMP8601MA_NOPB.circuit.tsx rename to lib/chips/LMP8601MA_NOPB.tsx diff --git a/lib/chips/LMP8601QMAX_NOPB.circuit.tsx b/lib/chips/LMP8601QMAX_NOPB.tsx similarity index 100% rename from lib/chips/LMP8601QMAX_NOPB.circuit.tsx rename to lib/chips/LMP8601QMAX_NOPB.tsx diff --git a/lib/chips/LMQ66430MA3RXBRQ1.circuit.tsx b/lib/chips/LMQ66430MA3RXBRQ1.tsx similarity index 100% rename from lib/chips/LMQ66430MA3RXBRQ1.circuit.tsx rename to lib/chips/LMQ66430MA3RXBRQ1.tsx diff --git a/lib/chips/LMQ66430R5RXBR.circuit.tsx b/lib/chips/LMQ66430R5RXBR.tsx similarity index 100% rename from lib/chips/LMQ66430R5RXBR.circuit.tsx rename to lib/chips/LMQ66430R5RXBR.tsx diff --git a/lib/chips/LMR33630CRNXR.circuit.tsx b/lib/chips/LMR33630CRNXR.tsx similarity index 100% rename from lib/chips/LMR33630CRNXR.circuit.tsx rename to lib/chips/LMR33630CRNXR.tsx diff --git a/lib/chips/LMR36502F3RPER.circuit.tsx b/lib/chips/LMR36502F3RPER.tsx similarity index 100% rename from lib/chips/LMR36502F3RPER.circuit.tsx rename to lib/chips/LMR36502F3RPER.tsx diff --git a/lib/chips/LMR36520FADDAR.circuit.tsx b/lib/chips/LMR36520FADDAR.tsx similarity index 100% rename from lib/chips/LMR36520FADDAR.circuit.tsx rename to lib/chips/LMR36520FADDAR.tsx diff --git a/lib/chips/LMR43610R3RPER.circuit.tsx b/lib/chips/LMR43610R3RPER.tsx similarity index 100% rename from lib/chips/LMR43610R3RPER.circuit.tsx rename to lib/chips/LMR43610R3RPER.tsx diff --git a/lib/chips/LMR50410Y3FQDBVRQ1.circuit.tsx b/lib/chips/LMR50410Y3FQDBVRQ1.tsx similarity index 100% rename from lib/chips/LMR50410Y3FQDBVRQ1.circuit.tsx rename to lib/chips/LMR50410Y3FQDBVRQ1.tsx diff --git a/lib/chips/LMR51610XDBVR.circuit.tsx b/lib/chips/LMR51610XDBVR.tsx similarity index 100% rename from lib/chips/LMR51610XDBVR.circuit.tsx rename to lib/chips/LMR51610XDBVR.tsx diff --git a/lib/chips/LMR51635YFDDCR.circuit.tsx b/lib/chips/LMR51635YFDDCR.tsx similarity index 100% rename from lib/chips/LMR51635YFDDCR.circuit.tsx rename to lib/chips/LMR51635YFDDCR.tsx diff --git a/lib/chips/LMT01LPG.circuit.tsx b/lib/chips/LMT01LPG.tsx similarity index 100% rename from lib/chips/LMT01LPG.circuit.tsx rename to lib/chips/LMT01LPG.tsx diff --git a/lib/chips/LMT70YFQR.circuit.tsx b/lib/chips/LMT70YFQR.tsx similarity index 100% rename from lib/chips/LMT70YFQR.circuit.tsx rename to lib/chips/LMT70YFQR.tsx diff --git a/lib/chips/LMT84DCKR.circuit.tsx b/lib/chips/LMT84DCKR.tsx similarity index 100% rename from lib/chips/LMT84DCKR.circuit.tsx rename to lib/chips/LMT84DCKR.tsx diff --git a/lib/chips/LMT86QDCKRQ1.circuit.tsx b/lib/chips/LMT86QDCKRQ1.tsx similarity index 100% rename from lib/chips/LMT86QDCKRQ1.circuit.tsx rename to lib/chips/LMT86QDCKRQ1.tsx diff --git a/lib/chips/LMT88DCKR.circuit.tsx b/lib/chips/LMT88DCKR.tsx similarity index 100% rename from lib/chips/LMT88DCKR.circuit.tsx rename to lib/chips/LMT88DCKR.tsx diff --git a/lib/chips/LMV324AIPWR.circuit.tsx b/lib/chips/LMV324AIPWR.tsx similarity index 100% rename from lib/chips/LMV324AIPWR.circuit.tsx rename to lib/chips/LMV324AIPWR.tsx diff --git a/lib/chips/LMV331M5X_NOPB.circuit.tsx b/lib/chips/LMV331M5X_NOPB.tsx similarity index 100% rename from lib/chips/LMV331M5X_NOPB.circuit.tsx rename to lib/chips/LMV331M5X_NOPB.tsx diff --git a/lib/chips/LMV431AIZ_NOPB.circuit.tsx b/lib/chips/LMV431AIZ_NOPB.tsx similarity index 100% rename from lib/chips/LMV431AIZ_NOPB.circuit.tsx rename to lib/chips/LMV431AIZ_NOPB.tsx diff --git a/lib/chips/LMV431BIMFX_NOPB.circuit.tsx b/lib/chips/LMV431BIMFX_NOPB.tsx similarity index 100% rename from lib/chips/LMV431BIMFX_NOPB.circuit.tsx rename to lib/chips/LMV431BIMFX_NOPB.tsx diff --git a/lib/chips/LMV431CM5X_NOPB.circuit.tsx b/lib/chips/LMV431CM5X_NOPB.tsx similarity index 100% rename from lib/chips/LMV431CM5X_NOPB.circuit.tsx rename to lib/chips/LMV431CM5X_NOPB.tsx diff --git a/lib/chips/LP2980AIM5X_3_3_NOPB.circuit.tsx b/lib/chips/LP2980AIM5X_3_3_NOPB.tsx similarity index 100% rename from lib/chips/LP2980AIM5X_3_3_NOPB.circuit.tsx rename to lib/chips/LP2980AIM5X_3_3_NOPB.tsx diff --git a/lib/chips/LP2985AIM5_3_3_NOPB.circuit.tsx b/lib/chips/LP2985AIM5_3_3_NOPB.tsx similarity index 100% rename from lib/chips/LP2985AIM5_3_3_NOPB.circuit.tsx rename to lib/chips/LP2985AIM5_3_3_NOPB.tsx diff --git a/lib/chips/LP2998MAX_NOPB.circuit.tsx b/lib/chips/LP2998MAX_NOPB.tsx similarity index 100% rename from lib/chips/LP2998MAX_NOPB.circuit.tsx rename to lib/chips/LP2998MAX_NOPB.tsx diff --git a/lib/chips/LP5009PWR.circuit.tsx b/lib/chips/LP5009PWR.tsx similarity index 100% rename from lib/chips/LP5009PWR.circuit.tsx rename to lib/chips/LP5009PWR.tsx diff --git a/lib/chips/LP5036RJVR.circuit.tsx b/lib/chips/LP5036RJVR.tsx similarity index 100% rename from lib/chips/LP5036RJVR.circuit.tsx rename to lib/chips/LP5036RJVR.tsx diff --git a/lib/chips/LP5813AYBHR.circuit.tsx b/lib/chips/LP5813AYBHR.tsx similarity index 100% rename from lib/chips/LP5813AYBHR.circuit.tsx rename to lib/chips/LP5813AYBHR.tsx diff --git a/lib/chips/LPV821DBVR.circuit.tsx b/lib/chips/LPV821DBVR.tsx similarity index 100% rename from lib/chips/LPV821DBVR.circuit.tsx rename to lib/chips/LPV821DBVR.tsx diff --git a/lib/chips/LSF0108DGSR.circuit.tsx b/lib/chips/LSF0108DGSR.tsx similarity index 100% rename from lib/chips/LSF0108DGSR.circuit.tsx rename to lib/chips/LSF0108DGSR.tsx diff --git a/lib/chips/MAX3221CPWR.circuit.tsx b/lib/chips/MAX3221CPWR.tsx similarity index 100% rename from lib/chips/MAX3221CPWR.circuit.tsx rename to lib/chips/MAX3221CPWR.tsx diff --git a/lib/chips/MAX3221ECDBR.circuit.tsx b/lib/chips/MAX3221ECDBR.tsx similarity index 100% rename from lib/chips/MAX3221ECDBR.circuit.tsx rename to lib/chips/MAX3221ECDBR.tsx diff --git a/lib/chips/MSP430F5229.circuit.tsx b/lib/chips/MSP430F5229.tsx similarity index 78% rename from lib/chips/MSP430F5229.circuit.tsx rename to lib/chips/MSP430F5229.tsx index fffaee4a..0d5af0f5 100644 --- a/lib/chips/MSP430F5229.circuit.tsx +++ b/lib/chips/MSP430F5229.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { MSP430F5229IRGCR } from "./MSP430F5229IRGCR.circuit.tsx"; +import { MSP430F5229IRGCR } from "./MSP430F5229IRGCR.tsx"; export type MSP430F5229Props = ComponentProps; diff --git a/lib/chips/MSP430F5229IRGCR.circuit.tsx b/lib/chips/MSP430F5229IRGCR.tsx similarity index 100% rename from lib/chips/MSP430F5229IRGCR.circuit.tsx rename to lib/chips/MSP430F5229IRGCR.tsx diff --git a/lib/chips/MSP430F5437AIPNR.circuit.tsx b/lib/chips/MSP430F5437AIPNR.tsx similarity index 100% rename from lib/chips/MSP430F5437AIPNR.circuit.tsx rename to lib/chips/MSP430F5437AIPNR.tsx diff --git a/lib/chips/MSP430F5528IZXHR.circuit.tsx b/lib/chips/MSP430F5528IZXHR.tsx similarity index 100% rename from lib/chips/MSP430F5528IZXHR.circuit.tsx rename to lib/chips/MSP430F5528IZXHR.tsx diff --git a/lib/chips/MSP430F5529IPN.circuit.tsx b/lib/chips/MSP430F5529IPN.tsx similarity index 100% rename from lib/chips/MSP430F5529IPN.circuit.tsx rename to lib/chips/MSP430F5529IPN.tsx diff --git a/lib/chips/MSP430FR2512IPW16R.circuit.tsx b/lib/chips/MSP430FR2512IPW16R.tsx similarity index 100% rename from lib/chips/MSP430FR2512IPW16R.circuit.tsx rename to lib/chips/MSP430FR2512IPW16R.tsx diff --git a/lib/chips/MSP430FR2532IRGER.circuit.tsx b/lib/chips/MSP430FR2532IRGER.tsx similarity index 100% rename from lib/chips/MSP430FR2532IRGER.circuit.tsx rename to lib/chips/MSP430FR2532IRGER.tsx diff --git a/lib/chips/MSP430FR2533IRHBR.circuit.tsx b/lib/chips/MSP430FR2533IRHBR.tsx similarity index 100% rename from lib/chips/MSP430FR2533IRHBR.circuit.tsx rename to lib/chips/MSP430FR2533IRHBR.tsx diff --git a/lib/chips/MSP430FR2632IYQWR.circuit.tsx b/lib/chips/MSP430FR2632IYQWR.tsx similarity index 100% rename from lib/chips/MSP430FR2632IYQWR.circuit.tsx rename to lib/chips/MSP430FR2632IYQWR.tsx diff --git a/lib/chips/MSP430FR2633IDAR.circuit.tsx b/lib/chips/MSP430FR2633IDAR.tsx similarity index 100% rename from lib/chips/MSP430FR2633IDAR.circuit.tsx rename to lib/chips/MSP430FR2633IDAR.tsx diff --git a/lib/chips/MSP430FR2672TRHBR.circuit.tsx b/lib/chips/MSP430FR2672TRHBR.tsx similarity index 100% rename from lib/chips/MSP430FR2672TRHBR.circuit.tsx rename to lib/chips/MSP430FR2672TRHBR.tsx diff --git a/lib/chips/MSP430FR2675TPTR.circuit.tsx b/lib/chips/MSP430FR2675TPTR.tsx similarity index 100% rename from lib/chips/MSP430FR2675TPTR.circuit.tsx rename to lib/chips/MSP430FR2675TPTR.tsx diff --git a/lib/chips/MSP430FR4133IPMR.circuit.tsx b/lib/chips/MSP430FR4133IPMR.tsx similarity index 100% rename from lib/chips/MSP430FR4133IPMR.circuit.tsx rename to lib/chips/MSP430FR4133IPMR.tsx diff --git a/lib/chips/MSP430FR5869IRGZR.circuit.tsx b/lib/chips/MSP430FR5869IRGZR.tsx similarity index 100% rename from lib/chips/MSP430FR5869IRGZR.circuit.tsx rename to lib/chips/MSP430FR5869IRGZR.tsx diff --git a/lib/chips/MSP430FR5969IRGZR.circuit.tsx b/lib/chips/MSP430FR5969IRGZR.tsx similarity index 100% rename from lib/chips/MSP430FR5969IRGZR.circuit.tsx rename to lib/chips/MSP430FR5969IRGZR.tsx diff --git a/lib/chips/MSP430G2230ID.circuit.tsx b/lib/chips/MSP430G2230ID.tsx similarity index 100% rename from lib/chips/MSP430G2230ID.circuit.tsx rename to lib/chips/MSP430G2230ID.tsx diff --git a/lib/chips/MSPM0C1103SDSGR.circuit.tsx b/lib/chips/MSPM0C1103SDSGR.tsx similarity index 100% rename from lib/chips/MSPM0C1103SDSGR.circuit.tsx rename to lib/chips/MSPM0C1103SDSGR.tsx diff --git a/lib/chips/MSPM0C1104SDDFR.circuit.tsx b/lib/chips/MSPM0C1104SDDFR.tsx similarity index 100% rename from lib/chips/MSPM0C1104SDDFR.circuit.tsx rename to lib/chips/MSPM0C1104SDDFR.tsx diff --git a/lib/chips/MSPM0G1107TRHBR.circuit.tsx b/lib/chips/MSPM0G1107TRHBR.tsx similarity index 100% rename from lib/chips/MSPM0G1107TRHBR.circuit.tsx rename to lib/chips/MSPM0G1107TRHBR.tsx diff --git a/lib/chips/MSPM0G1506SPMR.circuit.tsx b/lib/chips/MSPM0G1506SPMR.tsx similarity index 100% rename from lib/chips/MSPM0G1506SPMR.circuit.tsx rename to lib/chips/MSPM0G1506SPMR.tsx diff --git a/lib/chips/MSPM0G1518SPMR.circuit.tsx b/lib/chips/MSPM0G1518SPMR.tsx similarity index 100% rename from lib/chips/MSPM0G1518SPMR.circuit.tsx rename to lib/chips/MSPM0G1518SPMR.tsx diff --git a/lib/chips/MSPM0G3507.circuit.tsx b/lib/chips/MSPM0G3507.tsx similarity index 87% rename from lib/chips/MSPM0G3507.circuit.tsx rename to lib/chips/MSPM0G3507.tsx index 990448ad..bceeb4f7 100644 --- a/lib/chips/MSPM0G3507.circuit.tsx +++ b/lib/chips/MSPM0G3507.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { MSPM0G3507SPMR } from "./MSPM0G3507SPMR.circuit.tsx"; +import { MSPM0G3507SPMR } from "./MSPM0G3507SPMR.tsx"; type MSPM0G3507FootprintVariant = "lqfp_64" | (string & {}); diff --git a/lib/chips/MSPM0G3507SPMR.circuit.tsx b/lib/chips/MSPM0G3507SPMR.tsx similarity index 100% rename from lib/chips/MSPM0G3507SPMR.circuit.tsx rename to lib/chips/MSPM0G3507SPMR.tsx diff --git a/lib/chips/MSPM0G5117SPMR.circuit.tsx b/lib/chips/MSPM0G5117SPMR.tsx similarity index 100% rename from lib/chips/MSPM0G5117SPMR.circuit.tsx rename to lib/chips/MSPM0G5117SPMR.tsx diff --git a/lib/chips/MSPM0L1105TDYYR.circuit.tsx b/lib/chips/MSPM0L1105TDYYR.tsx similarity index 100% rename from lib/chips/MSPM0L1105TDYYR.circuit.tsx rename to lib/chips/MSPM0L1105TDYYR.tsx diff --git a/lib/chips/MSPM0L1116SRHBR.circuit.tsx b/lib/chips/MSPM0L1116SRHBR.tsx similarity index 100% rename from lib/chips/MSPM0L1116SRHBR.circuit.tsx rename to lib/chips/MSPM0L1116SRHBR.tsx diff --git a/lib/chips/MSPM0L1305SDYYR.circuit.tsx b/lib/chips/MSPM0L1305SDYYR.tsx similarity index 100% rename from lib/chips/MSPM0L1305SDYYR.circuit.tsx rename to lib/chips/MSPM0L1305SDYYR.tsx diff --git a/lib/chips/MSPM0L1306SRGER.circuit.tsx b/lib/chips/MSPM0L1306SRGER.tsx similarity index 100% rename from lib/chips/MSPM0L1306SRGER.circuit.tsx rename to lib/chips/MSPM0L1306SRGER.tsx diff --git a/lib/chips/MSPM0L1343TDGS20R.circuit.tsx b/lib/chips/MSPM0L1343TDGS20R.tsx similarity index 100% rename from lib/chips/MSPM0L1343TDGS20R.circuit.tsx rename to lib/chips/MSPM0L1343TDGS20R.tsx diff --git a/lib/chips/MSPM0L2228SPTR.circuit.tsx b/lib/chips/MSPM0L2228SPTR.tsx similarity index 100% rename from lib/chips/MSPM0L2228SPTR.circuit.tsx rename to lib/chips/MSPM0L2228SPTR.tsx diff --git a/lib/chips/MSPM33C3x.circuit.tsx b/lib/chips/MSPM33C3x.tsx similarity index 100% rename from lib/chips/MSPM33C3x.circuit.tsx rename to lib/chips/MSPM33C3x.tsx diff --git a/lib/chips/NA555DR.circuit.tsx b/lib/chips/NA555DR.tsx similarity index 100% rename from lib/chips/NA555DR.circuit.tsx rename to lib/chips/NA555DR.tsx diff --git a/lib/chips/O3853QDCARQ1.circuit.tsx b/lib/chips/O3853QDCARQ1.tsx similarity index 100% rename from lib/chips/O3853QDCARQ1.circuit.tsx rename to lib/chips/O3853QDCARQ1.tsx diff --git a/lib/chips/OPA197IDBVT.circuit.tsx b/lib/chips/OPA197IDBVT.tsx similarity index 100% rename from lib/chips/OPA197IDBVT.circuit.tsx rename to lib/chips/OPA197IDBVT.tsx diff --git a/lib/chips/OPA2188AIDGKR.circuit.tsx b/lib/chips/OPA2188AIDGKR.tsx similarity index 100% rename from lib/chips/OPA2188AIDGKR.circuit.tsx rename to lib/chips/OPA2188AIDGKR.tsx diff --git a/lib/chips/OPA2197ID.circuit.tsx b/lib/chips/OPA2197ID.tsx similarity index 100% rename from lib/chips/OPA2197ID.circuit.tsx rename to lib/chips/OPA2197ID.tsx diff --git a/lib/chips/OPA2237UA_2K5.circuit.tsx b/lib/chips/OPA2237UA_2K5.tsx similarity index 100% rename from lib/chips/OPA2237UA_2K5.circuit.tsx rename to lib/chips/OPA2237UA_2K5.tsx diff --git a/lib/chips/OPA2310IDR.circuit.tsx b/lib/chips/OPA2310IDR.tsx similarity index 100% rename from lib/chips/OPA2310IDR.circuit.tsx rename to lib/chips/OPA2310IDR.tsx diff --git a/lib/chips/OPA2340UA_2K5.circuit.tsx b/lib/chips/OPA2340UA_2K5.tsx similarity index 100% rename from lib/chips/OPA2340UA_2K5.circuit.tsx rename to lib/chips/OPA2340UA_2K5.tsx diff --git a/lib/chips/OPA2365AQDRQ1.circuit.tsx b/lib/chips/OPA2365AQDRQ1.tsx similarity index 100% rename from lib/chips/OPA2365AQDRQ1.circuit.tsx rename to lib/chips/OPA2365AQDRQ1.tsx diff --git a/lib/chips/OPA2607QDGKRQ1.circuit.tsx b/lib/chips/OPA2607QDGKRQ1.tsx similarity index 100% rename from lib/chips/OPA2607QDGKRQ1.circuit.tsx rename to lib/chips/OPA2607QDGKRQ1.tsx diff --git a/lib/chips/OPA2836QDGKRQ1.circuit.tsx b/lib/chips/OPA2836QDGKRQ1.tsx similarity index 100% rename from lib/chips/OPA2836QDGKRQ1.circuit.tsx rename to lib/chips/OPA2836QDGKRQ1.tsx diff --git a/lib/chips/OPA310IDCKR.circuit.tsx b/lib/chips/OPA310IDCKR.tsx similarity index 100% rename from lib/chips/OPA310IDCKR.circuit.tsx rename to lib/chips/OPA310IDCKR.tsx diff --git a/lib/chips/OPA320SAIDBVR.circuit.tsx b/lib/chips/OPA320SAIDBVR.tsx similarity index 100% rename from lib/chips/OPA320SAIDBVR.circuit.tsx rename to lib/chips/OPA320SAIDBVR.tsx diff --git a/lib/chips/OPA333AIDR.circuit.tsx b/lib/chips/OPA333AIDR.tsx similarity index 100% rename from lib/chips/OPA333AIDR.circuit.tsx rename to lib/chips/OPA333AIDR.tsx diff --git a/lib/chips/OPA350UA_2K5.circuit.tsx b/lib/chips/OPA350UA_2K5.tsx similarity index 100% rename from lib/chips/OPA350UA_2K5.circuit.tsx rename to lib/chips/OPA350UA_2K5.tsx diff --git a/lib/chips/OPA365AIDR.circuit.tsx b/lib/chips/OPA365AIDR.tsx similarity index 100% rename from lib/chips/OPA365AIDR.circuit.tsx rename to lib/chips/OPA365AIDR.tsx diff --git a/lib/chips/OPA365AQDBVRQ1.circuit.tsx b/lib/chips/OPA365AQDBVRQ1.tsx similarity index 100% rename from lib/chips/OPA365AQDBVRQ1.circuit.tsx rename to lib/chips/OPA365AQDBVRQ1.tsx diff --git a/lib/chips/OPA371DDBVR.circuit.tsx b/lib/chips/OPA371DDBVR.tsx similarity index 100% rename from lib/chips/OPA371DDBVR.circuit.tsx rename to lib/chips/OPA371DDBVR.tsx diff --git a/lib/chips/OPA376AIDBVR.circuit.tsx b/lib/chips/OPA376AIDBVR.tsx similarity index 100% rename from lib/chips/OPA376AIDBVR.circuit.tsx rename to lib/chips/OPA376AIDBVR.tsx diff --git a/lib/chips/OPA4192IDR.circuit.tsx b/lib/chips/OPA4192IDR.tsx similarity index 100% rename from lib/chips/OPA4192IDR.circuit.tsx rename to lib/chips/OPA4192IDR.tsx diff --git a/lib/chips/OPA4206APWR.circuit.tsx b/lib/chips/OPA4206APWR.tsx similarity index 100% rename from lib/chips/OPA4206APWR.circuit.tsx rename to lib/chips/OPA4206APWR.tsx diff --git a/lib/chips/OPA4350EA_250.circuit.tsx b/lib/chips/OPA4350EA_250.tsx similarity index 100% rename from lib/chips/OPA4350EA_250.circuit.tsx rename to lib/chips/OPA4350EA_250.tsx diff --git a/lib/chips/OPA4991QDYYRQ1.circuit.tsx b/lib/chips/OPA4991QDYYRQ1.tsx similarity index 100% rename from lib/chips/OPA4991QDYYRQ1.circuit.tsx rename to lib/chips/OPA4991QDYYRQ1.tsx diff --git a/lib/chips/OPA607QDBVRQ1.circuit.tsx b/lib/chips/OPA607QDBVRQ1.tsx similarity index 100% rename from lib/chips/OPA607QDBVRQ1.circuit.tsx rename to lib/chips/OPA607QDBVRQ1.tsx diff --git a/lib/chips/OPA990IDBVR.circuit.tsx b/lib/chips/OPA990IDBVR.tsx similarity index 100% rename from lib/chips/OPA990IDBVR.circuit.tsx rename to lib/chips/OPA990IDBVR.tsx diff --git a/lib/chips/OPT3002DNPR.circuit.tsx b/lib/chips/OPT3002DNPR.tsx similarity index 100% rename from lib/chips/OPT3002DNPR.circuit.tsx rename to lib/chips/OPT3002DNPR.tsx diff --git a/lib/chips/OPT3004DNPR.circuit.tsx b/lib/chips/OPT3004DNPR.tsx similarity index 100% rename from lib/chips/OPT3004DNPR.circuit.tsx rename to lib/chips/OPT3004DNPR.tsx diff --git a/lib/chips/OPT4001YMNR.circuit.tsx b/lib/chips/OPT4001YMNR.tsx similarity index 100% rename from lib/chips/OPT4001YMNR.circuit.tsx rename to lib/chips/OPT4001YMNR.tsx diff --git a/lib/chips/OscillatorCrystal4.circuit.tsx b/lib/chips/OscillatorCrystal4.tsx similarity index 100% rename from lib/chips/OscillatorCrystal4.circuit.tsx rename to lib/chips/OscillatorCrystal4.tsx diff --git a/lib/chips/P82B96DGKR.circuit.tsx b/lib/chips/P82B96DGKR.tsx similarity index 100% rename from lib/chips/P82B96DGKR.circuit.tsx rename to lib/chips/P82B96DGKR.tsx diff --git a/lib/chips/PCA9306DCUT.circuit.tsx b/lib/chips/PCA9306DCUT.tsx similarity index 100% rename from lib/chips/PCA9306DCUT.circuit.tsx rename to lib/chips/PCA9306DCUT.tsx diff --git a/lib/chips/PTH08080WAH.circuit.tsx b/lib/chips/PTH08080WAH.tsx similarity index 100% rename from lib/chips/PTH08080WAH.circuit.tsx rename to lib/chips/PTH08080WAH.tsx diff --git a/lib/chips/PTLIN821DRBRQ1.circuit.tsx b/lib/chips/PTLIN821DRBRQ1.tsx similarity index 100% rename from lib/chips/PTLIN821DRBRQ1.circuit.tsx rename to lib/chips/PTLIN821DRBRQ1.tsx diff --git a/lib/chips/REF1930AIDDCT.circuit.tsx b/lib/chips/REF1930AIDDCT.tsx similarity index 100% rename from lib/chips/REF1930AIDDCT.circuit.tsx rename to lib/chips/REF1930AIDDCT.tsx diff --git a/lib/chips/REF2125IDBVR.circuit.tsx b/lib/chips/REF2125IDBVR.tsx similarity index 100% rename from lib/chips/REF2125IDBVR.circuit.tsx rename to lib/chips/REF2125IDBVR.tsx diff --git a/lib/chips/REF3016EAIDBZR.circuit.tsx b/lib/chips/REF3016EAIDBZR.tsx similarity index 100% rename from lib/chips/REF3016EAIDBZR.circuit.tsx rename to lib/chips/REF3016EAIDBZR.tsx diff --git a/lib/chips/REF3325AIDBZR.circuit.tsx b/lib/chips/REF3325AIDBZR.tsx similarity index 100% rename from lib/chips/REF3325AIDBZR.circuit.tsx rename to lib/chips/REF3325AIDBZR.tsx diff --git a/lib/chips/RF430CL330HCPWR.circuit.tsx b/lib/chips/RF430CL330HCPWR.tsx similarity index 100% rename from lib/chips/RF430CL330HCPWR.circuit.tsx rename to lib/chips/RF430CL330HCPWR.tsx diff --git a/lib/chips/SN6501DBVR.circuit.tsx b/lib/chips/SN6501DBVR.tsx similarity index 100% rename from lib/chips/SN6501DBVR.circuit.tsx rename to lib/chips/SN6501DBVR.tsx diff --git a/lib/chips/SN6505BDBVT.circuit.tsx b/lib/chips/SN6505BDBVT.tsx similarity index 100% rename from lib/chips/SN6505BDBVT.circuit.tsx rename to lib/chips/SN6505BDBVT.tsx diff --git a/lib/chips/SN65HVD24DR.circuit.tsx b/lib/chips/SN65HVD24DR.tsx similarity index 100% rename from lib/chips/SN65HVD24DR.circuit.tsx rename to lib/chips/SN65HVD24DR.tsx diff --git a/lib/chips/SN65HVD3082EDR.circuit.tsx b/lib/chips/SN65HVD3082EDR.tsx similarity index 100% rename from lib/chips/SN65HVD3082EDR.circuit.tsx rename to lib/chips/SN65HVD3082EDR.tsx diff --git a/lib/chips/SN65HVD3088EDR.circuit.tsx b/lib/chips/SN65HVD3088EDR.tsx similarity index 100% rename from lib/chips/SN65HVD3088EDR.circuit.tsx rename to lib/chips/SN65HVD3088EDR.tsx diff --git a/lib/chips/SN65HVD32DR.circuit.tsx b/lib/chips/SN65HVD32DR.tsx similarity index 100% rename from lib/chips/SN65HVD32DR.circuit.tsx rename to lib/chips/SN65HVD32DR.tsx diff --git a/lib/chips/SN65HVD96DR.circuit.tsx b/lib/chips/SN65HVD96DR.tsx similarity index 100% rename from lib/chips/SN65HVD96DR.circuit.tsx rename to lib/chips/SN65HVD96DR.tsx diff --git a/lib/chips/SN65LV1023ADB.circuit.tsx b/lib/chips/SN65LV1023ADB.tsx similarity index 100% rename from lib/chips/SN65LV1023ADB.circuit.tsx rename to lib/chips/SN65LV1023ADB.tsx diff --git a/lib/chips/SN65LV1224BDB.circuit.tsx b/lib/chips/SN65LV1224BDB.tsx similarity index 100% rename from lib/chips/SN65LV1224BDB.circuit.tsx rename to lib/chips/SN65LV1224BDB.tsx diff --git a/lib/chips/SN74AC86PWR.circuit.tsx b/lib/chips/SN74AC86PWR.tsx similarity index 100% rename from lib/chips/SN74AC86PWR.circuit.tsx rename to lib/chips/SN74AC86PWR.tsx diff --git a/lib/chips/SN74AHC08DR.circuit.tsx b/lib/chips/SN74AHC08DR.tsx similarity index 100% rename from lib/chips/SN74AHC08DR.circuit.tsx rename to lib/chips/SN74AHC08DR.tsx diff --git a/lib/chips/SN74AHC1G09DBVR.circuit.tsx b/lib/chips/SN74AHC1G09DBVR.tsx similarity index 100% rename from lib/chips/SN74AHC1G09DBVR.circuit.tsx rename to lib/chips/SN74AHC1G09DBVR.tsx diff --git a/lib/chips/SN74AHC1G14DBVR.circuit.tsx b/lib/chips/SN74AHC1G14DBVR.tsx similarity index 100% rename from lib/chips/SN74AHC1G14DBVR.circuit.tsx rename to lib/chips/SN74AHC1G14DBVR.tsx diff --git a/lib/chips/SN74AHCT1G08DBVR.circuit.tsx b/lib/chips/SN74AHCT1G08DBVR.tsx similarity index 100% rename from lib/chips/SN74AHCT1G08DBVR.circuit.tsx rename to lib/chips/SN74AHCT1G08DBVR.tsx diff --git a/lib/chips/SN74AHCT541DWR.circuit.tsx b/lib/chips/SN74AHCT541DWR.tsx similarity index 100% rename from lib/chips/SN74AHCT541DWR.circuit.tsx rename to lib/chips/SN74AHCT541DWR.tsx diff --git a/lib/chips/SN74ALVC08DR.circuit.tsx b/lib/chips/SN74ALVC08DR.tsx similarity index 100% rename from lib/chips/SN74ALVC08DR.circuit.tsx rename to lib/chips/SN74ALVC08DR.tsx diff --git a/lib/chips/SN74AUP1G14DBVR.circuit.tsx b/lib/chips/SN74AUP1G14DBVR.tsx similarity index 100% rename from lib/chips/SN74AUP1G14DBVR.circuit.tsx rename to lib/chips/SN74AUP1G14DBVR.tsx diff --git a/lib/chips/SN74AUP1G17DBVR.circuit.tsx b/lib/chips/SN74AUP1G17DBVR.tsx similarity index 100% rename from lib/chips/SN74AUP1G17DBVR.circuit.tsx rename to lib/chips/SN74AUP1G17DBVR.tsx diff --git a/lib/chips/SN74AUP1G74DQER.circuit.tsx b/lib/chips/SN74AUP1G74DQER.tsx similarity index 100% rename from lib/chips/SN74AUP1G74DQER.circuit.tsx rename to lib/chips/SN74AUP1G74DQER.tsx diff --git a/lib/chips/SN74AUP1G79DCKR.circuit.tsx b/lib/chips/SN74AUP1G79DCKR.tsx similarity index 100% rename from lib/chips/SN74AUP1G79DCKR.circuit.tsx rename to lib/chips/SN74AUP1G79DCKR.tsx diff --git a/lib/chips/SN74AUP2G08DQER.circuit.tsx b/lib/chips/SN74AUP2G08DQER.tsx similarity index 100% rename from lib/chips/SN74AUP2G08DQER.circuit.tsx rename to lib/chips/SN74AUP2G08DQER.tsx diff --git a/lib/chips/SN74AUP2G14DSFR.circuit.tsx b/lib/chips/SN74AUP2G14DSFR.tsx similarity index 100% rename from lib/chips/SN74AUP2G14DSFR.circuit.tsx rename to lib/chips/SN74AUP2G14DSFR.tsx diff --git a/lib/chips/SN74AUP2G17DCKR.circuit.tsx b/lib/chips/SN74AUP2G17DCKR.tsx similarity index 100% rename from lib/chips/SN74AUP2G17DCKR.circuit.tsx rename to lib/chips/SN74AUP2G17DCKR.tsx diff --git a/lib/chips/SN74AUP2G240DCUR.circuit.tsx b/lib/chips/SN74AUP2G240DCUR.tsx similarity index 100% rename from lib/chips/SN74AUP2G240DCUR.circuit.tsx rename to lib/chips/SN74AUP2G240DCUR.tsx diff --git a/lib/chips/SN74AUP3G14DCUR.circuit.tsx b/lib/chips/SN74AUP3G14DCUR.tsx similarity index 100% rename from lib/chips/SN74AUP3G14DCUR.circuit.tsx rename to lib/chips/SN74AUP3G14DCUR.tsx diff --git a/lib/chips/SN74AXC4T245PWR.circuit.tsx b/lib/chips/SN74AXC4T245PWR.tsx similarity index 100% rename from lib/chips/SN74AXC4T245PWR.circuit.tsx rename to lib/chips/SN74AXC4T245PWR.tsx diff --git a/lib/chips/SN74CB3Q3245DGVR.circuit.tsx b/lib/chips/SN74CB3Q3245DGVR.tsx similarity index 100% rename from lib/chips/SN74CB3Q3245DGVR.circuit.tsx rename to lib/chips/SN74CB3Q3245DGVR.tsx diff --git a/lib/chips/SN74CBTLV3257DGVR.circuit.tsx b/lib/chips/SN74CBTLV3257DGVR.tsx similarity index 100% rename from lib/chips/SN74CBTLV3257DGVR.circuit.tsx rename to lib/chips/SN74CBTLV3257DGVR.tsx diff --git a/lib/chips/SN74HC112DR.circuit.tsx b/lib/chips/SN74HC112DR.tsx similarity index 100% rename from lib/chips/SN74HC112DR.circuit.tsx rename to lib/chips/SN74HC112DR.tsx diff --git a/lib/chips/SN74HC14DR.circuit.tsx b/lib/chips/SN74HC14DR.tsx similarity index 100% rename from lib/chips/SN74HC14DR.circuit.tsx rename to lib/chips/SN74HC14DR.tsx diff --git a/lib/chips/SN74HC21DR.circuit.tsx b/lib/chips/SN74HC21DR.tsx similarity index 100% rename from lib/chips/SN74HC21DR.circuit.tsx rename to lib/chips/SN74HC21DR.tsx diff --git a/lib/chips/SN74HCS03DR.circuit.tsx b/lib/chips/SN74HCS03DR.tsx similarity index 100% rename from lib/chips/SN74HCS03DR.circuit.tsx rename to lib/chips/SN74HCS03DR.tsx diff --git a/lib/chips/SN74HCS595BQBR.circuit.tsx b/lib/chips/SN74HCS595BQBR.tsx similarity index 100% rename from lib/chips/SN74HCS595BQBR.circuit.tsx rename to lib/chips/SN74HCS595BQBR.tsx diff --git a/lib/chips/SN74LV1T125DBVR.circuit.tsx b/lib/chips/SN74LV1T125DBVR.tsx similarity index 100% rename from lib/chips/SN74LV1T125DBVR.circuit.tsx rename to lib/chips/SN74LV1T125DBVR.tsx diff --git a/lib/chips/SN74LV1T34DCKR.circuit.tsx b/lib/chips/SN74LV1T34DCKR.tsx similarity index 100% rename from lib/chips/SN74LV1T34DCKR.circuit.tsx rename to lib/chips/SN74LV1T34DCKR.tsx diff --git a/lib/chips/SN74LV4052ADYYR.circuit.tsx b/lib/chips/SN74LV4052ADYYR.tsx similarity index 100% rename from lib/chips/SN74LV4052ADYYR.circuit.tsx rename to lib/chips/SN74LV4052ADYYR.tsx diff --git a/lib/chips/SN74LV541ADBR.circuit.tsx b/lib/chips/SN74LV541ADBR.tsx similarity index 100% rename from lib/chips/SN74LV541ADBR.circuit.tsx rename to lib/chips/SN74LV541ADBR.tsx diff --git a/lib/chips/SN74LVC08ANSR.circuit.tsx b/lib/chips/SN74LVC08ANSR.tsx similarity index 100% rename from lib/chips/SN74LVC08ANSR.circuit.tsx rename to lib/chips/SN74LVC08ANSR.tsx diff --git a/lib/chips/SN74LVC125APWR.circuit.tsx b/lib/chips/SN74LVC125APWR.tsx similarity index 100% rename from lib/chips/SN74LVC125APWR.circuit.tsx rename to lib/chips/SN74LVC125APWR.tsx diff --git a/lib/chips/SN74LVC14ADGVR.circuit.tsx b/lib/chips/SN74LVC14ADGVR.tsx similarity index 100% rename from lib/chips/SN74LVC14ADGVR.circuit.tsx rename to lib/chips/SN74LVC14ADGVR.tsx diff --git a/lib/chips/SN74LVC1G04YZPR.circuit.tsx b/lib/chips/SN74LVC1G04YZPR.tsx similarity index 100% rename from lib/chips/SN74LVC1G04YZPR.circuit.tsx rename to lib/chips/SN74LVC1G04YZPR.tsx diff --git a/lib/chips/SN74LVC1G07DCK3.circuit.tsx b/lib/chips/SN74LVC1G07DCK3.tsx similarity index 100% rename from lib/chips/SN74LVC1G07DCK3.circuit.tsx rename to lib/chips/SN74LVC1G07DCK3.tsx diff --git a/lib/chips/SN74LVC1G08DCKR.circuit.tsx b/lib/chips/SN74LVC1G08DCKR.tsx similarity index 100% rename from lib/chips/SN74LVC1G08DCKR.circuit.tsx rename to lib/chips/SN74LVC1G08DCKR.tsx diff --git a/lib/chips/SN74LVC1G11DBVR.circuit.tsx b/lib/chips/SN74LVC1G11DBVR.tsx similarity index 100% rename from lib/chips/SN74LVC1G11DBVR.circuit.tsx rename to lib/chips/SN74LVC1G11DBVR.tsx diff --git a/lib/chips/SN74LVC1G125YZPR.circuit.tsx b/lib/chips/SN74LVC1G125YZPR.tsx similarity index 100% rename from lib/chips/SN74LVC1G125YZPR.circuit.tsx rename to lib/chips/SN74LVC1G125YZPR.tsx diff --git a/lib/chips/SN74LVC1G126DBVT.circuit.tsx b/lib/chips/SN74LVC1G126DBVT.tsx similarity index 100% rename from lib/chips/SN74LVC1G126DBVT.circuit.tsx rename to lib/chips/SN74LVC1G126DBVT.tsx diff --git a/lib/chips/SN74LVC1G14DRLR.circuit.tsx b/lib/chips/SN74LVC1G14DRLR.tsx similarity index 100% rename from lib/chips/SN74LVC1G14DRLR.circuit.tsx rename to lib/chips/SN74LVC1G14DRLR.tsx diff --git a/lib/chips/SN74LVC1G17DBVT.circuit.tsx b/lib/chips/SN74LVC1G17DBVT.tsx similarity index 100% rename from lib/chips/SN74LVC1G17DBVT.circuit.tsx rename to lib/chips/SN74LVC1G17DBVT.tsx diff --git a/lib/chips/SN74LVC1G3157YZPR.circuit.tsx b/lib/chips/SN74LVC1G3157YZPR.tsx similarity index 100% rename from lib/chips/SN74LVC1G3157YZPR.circuit.tsx rename to lib/chips/SN74LVC1G3157YZPR.tsx diff --git a/lib/chips/SN74LVC1G32DRY2.circuit.tsx b/lib/chips/SN74LVC1G32DRY2.tsx similarity index 100% rename from lib/chips/SN74LVC1G32DRY2.circuit.tsx rename to lib/chips/SN74LVC1G32DRY2.tsx diff --git a/lib/chips/SN74LVC1G74DCUR.circuit.tsx b/lib/chips/SN74LVC1G74DCUR.tsx similarity index 100% rename from lib/chips/SN74LVC1G74DCUR.circuit.tsx rename to lib/chips/SN74LVC1G74DCUR.tsx diff --git a/lib/chips/SN74LVC1G86DCKR.circuit.tsx b/lib/chips/SN74LVC1G86DCKR.tsx similarity index 100% rename from lib/chips/SN74LVC1G86DCKR.circuit.tsx rename to lib/chips/SN74LVC1G86DCKR.tsx diff --git a/lib/chips/SN74LVC1GU04DBVR.circuit.tsx b/lib/chips/SN74LVC1GU04DBVR.tsx similarity index 100% rename from lib/chips/SN74LVC1GU04DBVR.circuit.tsx rename to lib/chips/SN74LVC1GU04DBVR.tsx diff --git a/lib/chips/SN74LVC2G07YZPR.circuit.tsx b/lib/chips/SN74LVC2G07YZPR.tsx similarity index 100% rename from lib/chips/SN74LVC2G07YZPR.circuit.tsx rename to lib/chips/SN74LVC2G07YZPR.tsx diff --git a/lib/chips/SN74LVC2G08DCUR.circuit.tsx b/lib/chips/SN74LVC2G08DCUR.tsx similarity index 100% rename from lib/chips/SN74LVC2G08DCUR.circuit.tsx rename to lib/chips/SN74LVC2G08DCUR.tsx diff --git a/lib/chips/SN74LVC2G125DCU3.circuit.tsx b/lib/chips/SN74LVC2G125DCU3.tsx similarity index 100% rename from lib/chips/SN74LVC2G125DCU3.circuit.tsx rename to lib/chips/SN74LVC2G125DCU3.tsx diff --git a/lib/chips/SN74LVC2G132DCTR.circuit.tsx b/lib/chips/SN74LVC2G132DCTR.tsx similarity index 100% rename from lib/chips/SN74LVC2G132DCTR.circuit.tsx rename to lib/chips/SN74LVC2G132DCTR.tsx diff --git a/lib/chips/SN74LVC2G240DCTR.circuit.tsx b/lib/chips/SN74LVC2G240DCTR.tsx similarity index 100% rename from lib/chips/SN74LVC2G240DCTR.circuit.tsx rename to lib/chips/SN74LVC2G240DCTR.tsx diff --git a/lib/chips/SN74LVC2G34YZPR.circuit.tsx b/lib/chips/SN74LVC2G34YZPR.tsx similarity index 100% rename from lib/chips/SN74LVC2G34YZPR.circuit.tsx rename to lib/chips/SN74LVC2G34YZPR.tsx diff --git a/lib/chips/SN74LVC3G07DCUR.circuit.tsx b/lib/chips/SN74LVC3G07DCUR.tsx similarity index 100% rename from lib/chips/SN74LVC3G07DCUR.circuit.tsx rename to lib/chips/SN74LVC3G07DCUR.tsx diff --git a/lib/chips/TAC5112IRGER.circuit.tsx b/lib/chips/TAC5112IRGER.tsx similarity index 100% rename from lib/chips/TAC5112IRGER.circuit.tsx rename to lib/chips/TAC5112IRGER.tsx diff --git a/lib/chips/TAS2505.circuit.tsx b/lib/chips/TAS2505.tsx similarity index 100% rename from lib/chips/TAS2505.circuit.tsx rename to lib/chips/TAS2505.tsx diff --git a/lib/chips/TCA6408APWR.circuit.tsx b/lib/chips/TCA6408APWR.tsx similarity index 100% rename from lib/chips/TCA6408APWR.circuit.tsx rename to lib/chips/TCA6408APWR.tsx diff --git a/lib/chips/TCA9535DBR.circuit.tsx b/lib/chips/TCA9535DBR.tsx similarity index 100% rename from lib/chips/TCA9535DBR.circuit.tsx rename to lib/chips/TCA9535DBR.tsx diff --git a/lib/chips/TCA9803DGKR.circuit.tsx b/lib/chips/TCA9803DGKR.tsx similarity index 100% rename from lib/chips/TCA9803DGKR.circuit.tsx rename to lib/chips/TCA9803DGKR.tsx diff --git a/lib/chips/TCAN1044AVDRBRQ1.circuit.tsx b/lib/chips/TCAN1044AVDRBRQ1.tsx similarity index 100% rename from lib/chips/TCAN1044AVDRBRQ1.circuit.tsx rename to lib/chips/TCAN1044AVDRBRQ1.tsx diff --git a/lib/chips/TCAN1057AVDRQ1.circuit.tsx b/lib/chips/TCAN1057AVDRQ1.tsx similarity index 100% rename from lib/chips/TCAN1057AVDRQ1.circuit.tsx rename to lib/chips/TCAN1057AVDRQ1.tsx diff --git a/lib/chips/TFP401PZP.circuit.tsx b/lib/chips/TFP401PZP.tsx similarity index 100% rename from lib/chips/TFP401PZP.circuit.tsx rename to lib/chips/TFP401PZP.tsx diff --git a/lib/chips/THVD1410DR.circuit.tsx b/lib/chips/THVD1410DR.tsx similarity index 100% rename from lib/chips/THVD1410DR.circuit.tsx rename to lib/chips/THVD1410DR.tsx diff --git a/lib/chips/THVD1424RGTR.circuit.tsx b/lib/chips/THVD1424RGTR.tsx similarity index 100% rename from lib/chips/THVD1424RGTR.circuit.tsx rename to lib/chips/THVD1424RGTR.tsx diff --git a/lib/chips/THVD1450DGKR.circuit.tsx b/lib/chips/THVD1450DGKR.tsx similarity index 100% rename from lib/chips/THVD1450DGKR.circuit.tsx rename to lib/chips/THVD1450DGKR.tsx diff --git a/lib/chips/THVD1451DRBR.circuit.tsx b/lib/chips/THVD1451DRBR.tsx similarity index 100% rename from lib/chips/THVD1451DRBR.circuit.tsx rename to lib/chips/THVD1451DRBR.tsx diff --git a/lib/chips/THVD1452DGS.circuit.tsx b/lib/chips/THVD1452DGS.tsx similarity index 100% rename from lib/chips/THVD1452DGS.circuit.tsx rename to lib/chips/THVD1452DGS.tsx diff --git a/lib/chips/THVD1500DR.circuit.tsx b/lib/chips/THVD1500DR.tsx similarity index 100% rename from lib/chips/THVD1500DR.circuit.tsx rename to lib/chips/THVD1500DR.tsx diff --git a/lib/chips/THVD2410DGKR.circuit.tsx b/lib/chips/THVD2410DGKR.tsx similarity index 100% rename from lib/chips/THVD2410DGKR.circuit.tsx rename to lib/chips/THVD2410DGKR.tsx diff --git a/lib/chips/THVD2450DGKR.circuit.tsx b/lib/chips/THVD2450DGKR.tsx similarity index 100% rename from lib/chips/THVD2450DGKR.circuit.tsx rename to lib/chips/THVD2450DGKR.tsx diff --git a/lib/chips/THVD8000DDFR.circuit.tsx b/lib/chips/THVD8000DDFR.tsx similarity index 100% rename from lib/chips/THVD8000DDFR.circuit.tsx rename to lib/chips/THVD8000DDFR.tsx diff --git a/lib/chips/THVD8010DDFR.circuit.tsx b/lib/chips/THVD8010DDFR.tsx similarity index 100% rename from lib/chips/THVD8010DDFR.circuit.tsx rename to lib/chips/THVD8010DDFR.tsx diff --git a/lib/chips/TIOL221RGER.circuit.tsx b/lib/chips/TIOL221RGER.tsx similarity index 100% rename from lib/chips/TIOL221RGER.circuit.tsx rename to lib/chips/TIOL221RGER.tsx diff --git a/lib/chips/TIOS1015DMWT.circuit.tsx b/lib/chips/TIOS1015DMWT.tsx similarity index 100% rename from lib/chips/TIOS1015DMWT.circuit.tsx rename to lib/chips/TIOS1015DMWT.tsx diff --git a/lib/chips/TL072HIPWR.circuit.tsx b/lib/chips/TL072HIPWR.tsx similarity index 100% rename from lib/chips/TL072HIPWR.circuit.tsx rename to lib/chips/TL072HIPWR.tsx diff --git a/lib/chips/TL074HIDYYR.circuit.tsx b/lib/chips/TL074HIDYYR.tsx similarity index 100% rename from lib/chips/TL074HIDYYR.circuit.tsx rename to lib/chips/TL074HIDYYR.tsx diff --git a/lib/chips/TL082HIDR.circuit.tsx b/lib/chips/TL082HIDR.tsx similarity index 100% rename from lib/chips/TL082HIDR.circuit.tsx rename to lib/chips/TL082HIDR.tsx diff --git a/lib/chips/TL084HIDYYR.circuit.tsx b/lib/chips/TL084HIDYYR.tsx similarity index 100% rename from lib/chips/TL084HIDYYR.circuit.tsx rename to lib/chips/TL084HIDYYR.tsx diff --git a/lib/chips/TL331IDBVR.circuit.tsx b/lib/chips/TL331IDBVR.tsx similarity index 100% rename from lib/chips/TL331IDBVR.circuit.tsx rename to lib/chips/TL331IDBVR.tsx diff --git a/lib/chips/TL331LVDBVR.circuit.tsx b/lib/chips/TL331LVDBVR.tsx similarity index 100% rename from lib/chips/TL331LVDBVR.circuit.tsx rename to lib/chips/TL331LVDBVR.tsx diff --git a/lib/chips/TL391LVDBVR.circuit.tsx b/lib/chips/TL391LVDBVR.tsx similarity index 100% rename from lib/chips/TL391LVDBVR.circuit.tsx rename to lib/chips/TL391LVDBVR.tsx diff --git a/lib/chips/TL431QDBZR.circuit.tsx b/lib/chips/TL431QDBZR.tsx similarity index 100% rename from lib/chips/TL431QDBZR.circuit.tsx rename to lib/chips/TL431QDBZR.tsx diff --git a/lib/chips/TL7712ACDR.circuit.tsx b/lib/chips/TL7712ACDR.tsx similarity index 100% rename from lib/chips/TL7712ACDR.circuit.tsx rename to lib/chips/TL7712ACDR.tsx diff --git a/lib/chips/TLA2024IRUGR.circuit.tsx b/lib/chips/TLA2024IRUGR.tsx similarity index 100% rename from lib/chips/TLA2024IRUGR.circuit.tsx rename to lib/chips/TLA2024IRUGR.tsx diff --git a/lib/chips/TLA2528IRTER.circuit.tsx b/lib/chips/TLA2528IRTER.tsx similarity index 100% rename from lib/chips/TLA2528IRTER.circuit.tsx rename to lib/chips/TLA2528IRTER.tsx diff --git a/lib/chips/TLA431AIDBZR.circuit.tsx b/lib/chips/TLA431AIDBZR.tsx similarity index 100% rename from lib/chips/TLA431AIDBZR.circuit.tsx rename to lib/chips/TLA431AIDBZR.tsx diff --git a/lib/chips/TLA432AQDBZR.circuit.tsx b/lib/chips/TLA432AQDBZR.tsx similarity index 100% rename from lib/chips/TLA432AQDBZR.circuit.tsx rename to lib/chips/TLA432AQDBZR.tsx diff --git a/lib/chips/TLC555IDR.circuit.tsx b/lib/chips/TLC555IDR.tsx similarity index 100% rename from lib/chips/TLC555IDR.circuit.tsx rename to lib/chips/TLC555IDR.tsx diff --git a/lib/chips/TLC59116.circuit.tsx b/lib/chips/TLC59116.tsx similarity index 86% rename from lib/chips/TLC59116.circuit.tsx rename to lib/chips/TLC59116.tsx index f5e0959c..65f34605 100644 --- a/lib/chips/TLC59116.circuit.tsx +++ b/lib/chips/TLC59116.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { TLC59116IPWR } from "./TLC59116IPWR.circuit.tsx"; +import { TLC59116IPWR } from "./TLC59116IPWR.tsx"; export type TLC59116Props = ComponentProps & { footprintVariant?: "tssop_28"; diff --git a/lib/chips/TLC59116IPWR.circuit.tsx b/lib/chips/TLC59116IPWR.tsx similarity index 100% rename from lib/chips/TLC59116IPWR.circuit.tsx rename to lib/chips/TLC59116IPWR.tsx diff --git a/lib/chips/TLC5916IPWR.circuit.tsx b/lib/chips/TLC5916IPWR.tsx similarity index 100% rename from lib/chips/TLC5916IPWR.circuit.tsx rename to lib/chips/TLC5916IPWR.tsx diff --git a/lib/chips/TLC59283RGER.circuit.tsx b/lib/chips/TLC59283RGER.tsx similarity index 100% rename from lib/chips/TLC59283RGER.circuit.tsx rename to lib/chips/TLC59283RGER.tsx diff --git a/lib/chips/TLC5971PWPR.circuit.tsx b/lib/chips/TLC5971PWPR.tsx similarity index 100% rename from lib/chips/TLC5971PWPR.circuit.tsx rename to lib/chips/TLC5971PWPR.tsx diff --git a/lib/chips/TLC6946RGER.circuit.tsx b/lib/chips/TLC6946RGER.tsx similarity index 100% rename from lib/chips/TLC6946RGER.circuit.tsx rename to lib/chips/TLC6946RGER.tsx diff --git a/lib/chips/TLC69624QRSNRQ1.circuit.tsx b/lib/chips/TLC69624QRSNRQ1.tsx similarity index 100% rename from lib/chips/TLC69624QRSNRQ1.circuit.tsx rename to lib/chips/TLC69624QRSNRQ1.tsx diff --git a/lib/chips/TLC69634QRSNRQ1.circuit.tsx b/lib/chips/TLC69634QRSNRQ1.tsx similarity index 100% rename from lib/chips/TLC69634QRSNRQ1.circuit.tsx rename to lib/chips/TLC69634QRSNRQ1.tsx diff --git a/lib/chips/TLC69699DRRR.circuit.tsx b/lib/chips/TLC69699DRRR.tsx similarity index 100% rename from lib/chips/TLC69699DRRR.circuit.tsx rename to lib/chips/TLC69699DRRR.tsx diff --git a/lib/chips/TLE2022CDR.circuit.tsx b/lib/chips/TLE2022CDR.tsx similarity index 100% rename from lib/chips/TLE2022CDR.circuit.tsx rename to lib/chips/TLE2022CDR.tsx diff --git a/lib/chips/TLV1811QDBVRQ1.circuit.tsx b/lib/chips/TLV1811QDBVRQ1.tsx similarity index 100% rename from lib/chips/TLV1811QDBVRQ1.circuit.tsx rename to lib/chips/TLV1811QDBVRQ1.tsx diff --git a/lib/chips/TLV1824DR.circuit.tsx b/lib/chips/TLV1824DR.tsx similarity index 100% rename from lib/chips/TLV1824DR.circuit.tsx rename to lib/chips/TLV1824DR.tsx diff --git a/lib/chips/TLV1842PWR.circuit.tsx b/lib/chips/TLV1842PWR.tsx similarity index 100% rename from lib/chips/TLV1842PWR.circuit.tsx rename to lib/chips/TLV1842PWR.tsx diff --git a/lib/chips/TLV3211DCKR.circuit.tsx b/lib/chips/TLV3211DCKR.tsx similarity index 100% rename from lib/chips/TLV3211DCKR.circuit.tsx rename to lib/chips/TLV3211DCKR.tsx diff --git a/lib/chips/TLV3212DGKR.circuit.tsx b/lib/chips/TLV3212DGKR.tsx similarity index 100% rename from lib/chips/TLV3212DGKR.circuit.tsx rename to lib/chips/TLV3212DGKR.tsx diff --git a/lib/chips/TLV333IDBVR.circuit.tsx b/lib/chips/TLV333IDBVR.tsx similarity index 100% rename from lib/chips/TLV333IDBVR.circuit.tsx rename to lib/chips/TLV333IDBVR.tsx diff --git a/lib/chips/TLV3512DGKR.circuit.tsx b/lib/chips/TLV3512DGKR.tsx similarity index 100% rename from lib/chips/TLV3512DGKR.circuit.tsx rename to lib/chips/TLV3512DGKR.tsx diff --git a/lib/chips/TLV3691IDCKT.circuit.tsx b/lib/chips/TLV3691IDCKT.tsx similarity index 100% rename from lib/chips/TLV3691IDCKT.circuit.tsx rename to lib/chips/TLV3691IDCKT.tsx diff --git a/lib/chips/TLV369IDCKR.circuit.tsx b/lib/chips/TLV369IDCKR.tsx similarity index 100% rename from lib/chips/TLV369IDCKR.circuit.tsx rename to lib/chips/TLV369IDCKR.tsx diff --git a/lib/chips/TLV376IDBVR.circuit.tsx b/lib/chips/TLV376IDBVR.tsx similarity index 100% rename from lib/chips/TLV376IDBVR.circuit.tsx rename to lib/chips/TLV376IDBVR.tsx diff --git a/lib/chips/TLV431AIDBVR.circuit.tsx b/lib/chips/TLV431AIDBVR.tsx similarity index 100% rename from lib/chips/TLV431AIDBVR.circuit.tsx rename to lib/chips/TLV431AIDBVR.tsx diff --git a/lib/chips/TLV431BQDBZR.circuit.tsx b/lib/chips/TLV431BQDBZR.tsx similarity index 100% rename from lib/chips/TLV431BQDBZR.circuit.tsx rename to lib/chips/TLV431BQDBZR.tsx diff --git a/lib/chips/TLV61047DDCR.circuit.tsx b/lib/chips/TLV61047DDCR.tsx similarity index 100% rename from lib/chips/TLV61047DDCR.circuit.tsx rename to lib/chips/TLV61047DDCR.tsx diff --git a/lib/chips/TLV7031DBVR.circuit.tsx b/lib/chips/TLV7031DBVR.tsx similarity index 100% rename from lib/chips/TLV7031DBVR.circuit.tsx rename to lib/chips/TLV7031DBVR.tsx diff --git a/lib/chips/TLV7042DGKR.circuit.tsx b/lib/chips/TLV7042DGKR.tsx similarity index 100% rename from lib/chips/TLV7042DGKR.circuit.tsx rename to lib/chips/TLV7042DGKR.tsx diff --git a/lib/chips/TLV70450DBVR.circuit.tsx b/lib/chips/TLV70450DBVR.tsx similarity index 100% rename from lib/chips/TLV70450DBVR.circuit.tsx rename to lib/chips/TLV70450DBVR.tsx diff --git a/lib/chips/TLV709A33DBVR.circuit.tsx b/lib/chips/TLV709A33DBVR.tsx similarity index 100% rename from lib/chips/TLV709A33DBVR.circuit.tsx rename to lib/chips/TLV709A33DBVR.tsx diff --git a/lib/chips/TLV74218PDQNR.circuit.tsx b/lib/chips/TLV74218PDQNR.tsx similarity index 100% rename from lib/chips/TLV74218PDQNR.circuit.tsx rename to lib/chips/TLV74218PDQNR.tsx diff --git a/lib/chips/TLV75533PDBVR.circuit.tsx b/lib/chips/TLV75533PDBVR.tsx similarity index 100% rename from lib/chips/TLV75533PDBVR.circuit.tsx rename to lib/chips/TLV75533PDBVR.tsx diff --git a/lib/chips/TLV755P.circuit.tsx b/lib/chips/TLV755P.tsx similarity index 88% rename from lib/chips/TLV755P.circuit.tsx rename to lib/chips/TLV755P.tsx index cac482f4..9adf6629 100644 --- a/lib/chips/TLV755P.circuit.tsx +++ b/lib/chips/TLV755P.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { TLV75533PDBVR } from "./TLV75533PDBVR.circuit.tsx"; +import { TLV75533PDBVR } from "./TLV75533PDBVR.tsx"; type TLV755PFootprintVariant = "sot_23_5" | (string & {}); diff --git a/lib/chips/TLV75801PDBVR.circuit.tsx b/lib/chips/TLV75801PDBVR.tsx similarity index 100% rename from lib/chips/TLV75801PDBVR.circuit.tsx rename to lib/chips/TLV75801PDBVR.tsx diff --git a/lib/chips/TLV76133KVUR.circuit.tsx b/lib/chips/TLV76133KVUR.tsx similarity index 100% rename from lib/chips/TLV76133KVUR.circuit.tsx rename to lib/chips/TLV76133KVUR.tsx diff --git a/lib/chips/TLV77133PDBVR.circuit.tsx b/lib/chips/TLV77133PDBVR.tsx similarity index 100% rename from lib/chips/TLV77133PDBVR.circuit.tsx rename to lib/chips/TLV77133PDBVR.tsx diff --git a/lib/chips/TLV77330PDBVR.circuit.tsx b/lib/chips/TLV77330PDBVR.tsx similarity index 100% rename from lib/chips/TLV77330PDBVR.circuit.tsx rename to lib/chips/TLV77330PDBVR.tsx diff --git a/lib/chips/TLV803EA30DBZR.circuit.tsx b/lib/chips/TLV803EA30DBZR.tsx similarity index 100% rename from lib/chips/TLV803EA30DBZR.circuit.tsx rename to lib/chips/TLV803EA30DBZR.tsx diff --git a/lib/chips/TLV803SDBZR.circuit.tsx b/lib/chips/TLV803SDBZR.tsx similarity index 100% rename from lib/chips/TLV803SDBZR.circuit.tsx rename to lib/chips/TLV803SDBZR.tsx diff --git a/lib/chips/TLV8802DGKR.circuit.tsx b/lib/chips/TLV8802DGKR.tsx similarity index 100% rename from lib/chips/TLV8802DGKR.circuit.tsx rename to lib/chips/TLV8802DGKR.tsx diff --git a/lib/chips/TLV9001IDBVR.circuit.tsx b/lib/chips/TLV9001IDBVR.tsx similarity index 100% rename from lib/chips/TLV9001IDBVR.circuit.tsx rename to lib/chips/TLV9001IDBVR.tsx diff --git a/lib/chips/TLV9002IDSGR.circuit.tsx b/lib/chips/TLV9002IDSGR.tsx similarity index 100% rename from lib/chips/TLV9002IDSGR.circuit.tsx rename to lib/chips/TLV9002IDSGR.tsx diff --git a/lib/chips/TLV9022L1RUGR.circuit.tsx b/lib/chips/TLV9022L1RUGR.tsx similarity index 100% rename from lib/chips/TLV9022L1RUGR.circuit.tsx rename to lib/chips/TLV9022L1RUGR.tsx diff --git a/lib/chips/TLV9061IDPWR.circuit.tsx b/lib/chips/TLV9061IDPWR.tsx similarity index 100% rename from lib/chips/TLV9061IDPWR.circuit.tsx rename to lib/chips/TLV9061IDPWR.tsx diff --git a/lib/chips/TLV9062IDR.circuit.tsx b/lib/chips/TLV9062IDR.tsx similarity index 100% rename from lib/chips/TLV9062IDR.circuit.tsx rename to lib/chips/TLV9062IDR.tsx diff --git a/lib/chips/TLV9064IDR.circuit.tsx b/lib/chips/TLV9064IDR.tsx similarity index 100% rename from lib/chips/TLV9064IDR.circuit.tsx rename to lib/chips/TLV9064IDR.tsx diff --git a/lib/chips/TLV9102IDR.circuit.tsx b/lib/chips/TLV9102IDR.tsx similarity index 100% rename from lib/chips/TLV9102IDR.circuit.tsx rename to lib/chips/TLV9102IDR.tsx diff --git a/lib/chips/TLV9152IDR.circuit.tsx b/lib/chips/TLV9152IDR.tsx similarity index 100% rename from lib/chips/TLV9152IDR.circuit.tsx rename to lib/chips/TLV9152IDR.tsx diff --git a/lib/chips/TLV9301IDCKR.circuit.tsx b/lib/chips/TLV9301IDCKR.tsx similarity index 100% rename from lib/chips/TLV9301IDCKR.circuit.tsx rename to lib/chips/TLV9301IDCKR.tsx diff --git a/lib/chips/TLVH431AQDBVT.circuit.tsx b/lib/chips/TLVH431AQDBVT.tsx similarity index 100% rename from lib/chips/TLVH431AQDBVT.circuit.tsx rename to lib/chips/TLVH431AQDBVT.tsx diff --git a/lib/chips/TLVH432QDBZR.circuit.tsx b/lib/chips/TLVH432QDBZR.tsx similarity index 100% rename from lib/chips/TLVH432QDBZR.circuit.tsx rename to lib/chips/TLVH432QDBZR.tsx diff --git a/lib/chips/TLVM23625RDNR.circuit.tsx b/lib/chips/TLVM23625RDNR.tsx similarity index 100% rename from lib/chips/TLVM23625RDNR.circuit.tsx rename to lib/chips/TLVM23625RDNR.tsx diff --git a/lib/chips/TM4C123FH6PMT7.circuit.tsx b/lib/chips/TM4C123FH6PMT7.tsx similarity index 100% rename from lib/chips/TM4C123FH6PMT7.circuit.tsx rename to lib/chips/TM4C123FH6PMT7.tsx diff --git a/lib/chips/TM4C123GH6PGEIR.circuit.tsx b/lib/chips/TM4C123GH6PGEIR.tsx similarity index 100% rename from lib/chips/TM4C123GH6PGEIR.circuit.tsx rename to lib/chips/TM4C123GH6PGEIR.tsx diff --git a/lib/chips/TM4C123GH6PMI7.circuit.tsx b/lib/chips/TM4C123GH6PMI7.tsx similarity index 100% rename from lib/chips/TM4C123GH6PMI7.circuit.tsx rename to lib/chips/TM4C123GH6PMI7.tsx diff --git a/lib/chips/TM4C123GH6PZT7.circuit.tsx b/lib/chips/TM4C123GH6PZT7.tsx similarity index 100% rename from lib/chips/TM4C123GH6PZT7.circuit.tsx rename to lib/chips/TM4C123GH6PZT7.tsx diff --git a/lib/chips/TM4C123GH6ZXRI7.circuit.tsx b/lib/chips/TM4C123GH6ZXRI7.tsx similarity index 100% rename from lib/chips/TM4C123GH6ZXRI7.circuit.tsx rename to lib/chips/TM4C123GH6ZXRI7.tsx diff --git a/lib/chips/TMP102AIDRLR.circuit.tsx b/lib/chips/TMP102AIDRLR.tsx similarity index 100% rename from lib/chips/TMP102AIDRLR.circuit.tsx rename to lib/chips/TMP102AIDRLR.tsx diff --git a/lib/chips/TMP1075.circuit.tsx b/lib/chips/TMP1075.tsx similarity index 89% rename from lib/chips/TMP1075.circuit.tsx rename to lib/chips/TMP1075.tsx index e57fb0eb..56981641 100644 --- a/lib/chips/TMP1075.circuit.tsx +++ b/lib/chips/TMP1075.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TMP1075DSGR } from "./TMP1075DSGR.circuit.tsx"; +import { TMP1075DSGR } from "./TMP1075DSGR.tsx"; type TMP1075FootprintVariant = "wson_8_ep_2x2" | (string & {}); diff --git a/lib/chips/TMP1075DSGR.circuit.tsx b/lib/chips/TMP1075DSGR.tsx similarity index 100% rename from lib/chips/TMP1075DSGR.circuit.tsx rename to lib/chips/TMP1075DSGR.tsx diff --git a/lib/chips/TMP107BIDR.circuit.tsx b/lib/chips/TMP107BIDR.tsx similarity index 100% rename from lib/chips/TMP107BIDR.circuit.tsx rename to lib/chips/TMP107BIDR.tsx diff --git a/lib/chips/TMP116NAIDRVR.circuit.tsx b/lib/chips/TMP116NAIDRVR.tsx similarity index 100% rename from lib/chips/TMP116NAIDRVR.circuit.tsx rename to lib/chips/TMP116NAIDRVR.tsx diff --git a/lib/chips/TMP118MAIYMSR.circuit.tsx b/lib/chips/TMP118MAIYMSR.tsx similarity index 100% rename from lib/chips/TMP118MAIYMSR.circuit.tsx rename to lib/chips/TMP118MAIYMSR.tsx diff --git a/lib/chips/TMP119AIYBGR.circuit.tsx b/lib/chips/TMP119AIYBGR.tsx similarity index 100% rename from lib/chips/TMP119AIYBGR.circuit.tsx rename to lib/chips/TMP119AIYBGR.tsx diff --git a/lib/chips/TMP1827.circuit.tsx b/lib/chips/TMP1827.tsx similarity index 100% rename from lib/chips/TMP1827.circuit.tsx rename to lib/chips/TMP1827.tsx diff --git a/lib/chips/TMP20AIDCKR.circuit.tsx b/lib/chips/TMP20AIDCKR.tsx similarity index 100% rename from lib/chips/TMP20AIDCKR.circuit.tsx rename to lib/chips/TMP20AIDCKR.tsx diff --git a/lib/chips/TMP235A2DBZR.circuit.tsx b/lib/chips/TMP235A2DBZR.tsx similarity index 100% rename from lib/chips/TMP235A2DBZR.circuit.tsx rename to lib/chips/TMP235A2DBZR.tsx diff --git a/lib/chips/TMP275AIDGKR.circuit.tsx b/lib/chips/TMP275AIDGKR.tsx similarity index 100% rename from lib/chips/TMP275AIDGKR.circuit.tsx rename to lib/chips/TMP275AIDGKR.tsx diff --git a/lib/chips/TMP302ADRLR.circuit.tsx b/lib/chips/TMP302ADRLR.tsx similarity index 100% rename from lib/chips/TMP302ADRLR.circuit.tsx rename to lib/chips/TMP302ADRLR.tsx diff --git a/lib/chips/TMS320F28027PTQR.circuit.tsx b/lib/chips/TMS320F28027PTQR.tsx similarity index 100% rename from lib/chips/TMS320F28027PTQR.circuit.tsx rename to lib/chips/TMS320F28027PTQR.tsx diff --git a/lib/chips/TMS320F28035PNQ.circuit.tsx b/lib/chips/TMS320F28035PNQ.tsx similarity index 100% rename from lib/chips/TMS320F28035PNQ.circuit.tsx rename to lib/chips/TMS320F28035PNQ.tsx diff --git a/lib/chips/TMS320F28075PTPQ.circuit.tsx b/lib/chips/TMS320F28075PTPQ.tsx similarity index 100% rename from lib/chips/TMS320F28075PTPQ.circuit.tsx rename to lib/chips/TMS320F28075PTPQ.tsx diff --git a/lib/chips/TMS320F28374SPTPT.circuit.tsx b/lib/chips/TMS320F28374SPTPT.tsx similarity index 100% rename from lib/chips/TMS320F28374SPTPT.circuit.tsx rename to lib/chips/TMS320F28374SPTPT.tsx diff --git a/lib/chips/TMS320F28375SPZPQ.circuit.tsx b/lib/chips/TMS320F28375SPZPQ.tsx similarity index 100% rename from lib/chips/TMS320F28375SPZPQ.circuit.tsx rename to lib/chips/TMS320F28375SPZPQ.tsx diff --git a/lib/chips/TMS320F28377DZWTQ.circuit.tsx b/lib/chips/TMS320F28377DZWTQ.tsx similarity index 100% rename from lib/chips/TMS320F28377DZWTQ.circuit.tsx rename to lib/chips/TMS320F28377DZWTQ.tsx diff --git a/lib/chips/TMS320F28377SPTPQ.circuit.tsx b/lib/chips/TMS320F28377SPTPQ.tsx similarity index 100% rename from lib/chips/TMS320F28377SPTPQ.circuit.tsx rename to lib/chips/TMS320F28377SPTPQ.tsx diff --git a/lib/chips/TMS320F28377SPTPS.circuit.tsx b/lib/chips/TMS320F28377SPTPS.tsx similarity index 100% rename from lib/chips/TMS320F28377SPTPS.circuit.tsx rename to lib/chips/TMS320F28377SPTPS.tsx diff --git a/lib/chips/TMS320F28379DZWTT.circuit.tsx b/lib/chips/TMS320F28379DZWTT.tsx similarity index 100% rename from lib/chips/TMS320F28379DZWTT.circuit.tsx rename to lib/chips/TMS320F28379DZWTT.tsx diff --git a/lib/chips/TMS5700432BPZQQ1R.circuit.tsx b/lib/chips/TMS5700432BPZQQ1R.tsx similarity index 100% rename from lib/chips/TMS5700432BPZQQ1R.circuit.tsx rename to lib/chips/TMS5700432BPZQQ1R.tsx diff --git a/lib/chips/TMUX1104DGSR.circuit.tsx b/lib/chips/TMUX1104DGSR.tsx similarity index 100% rename from lib/chips/TMUX1104DGSR.circuit.tsx rename to lib/chips/TMUX1104DGSR.tsx diff --git a/lib/chips/TMUX1308APWR.circuit.tsx b/lib/chips/TMUX1308APWR.tsx similarity index 100% rename from lib/chips/TMUX1308APWR.circuit.tsx rename to lib/chips/TMUX1308APWR.tsx diff --git a/lib/chips/TMUX1574DYYR.circuit.tsx b/lib/chips/TMUX1574DYYR.tsx similarity index 100% rename from lib/chips/TMUX1574DYYR.circuit.tsx rename to lib/chips/TMUX1574DYYR.tsx diff --git a/lib/chips/TMUX4051BQBR.circuit.tsx b/lib/chips/TMUX4051BQBR.tsx similarity index 100% rename from lib/chips/TMUX4051BQBR.circuit.tsx rename to lib/chips/TMUX4051BQBR.tsx diff --git a/lib/chips/TMUX5411PWR.circuit.tsx b/lib/chips/TMUX5411PWR.tsx similarity index 100% rename from lib/chips/TMUX5411PWR.circuit.tsx rename to lib/chips/TMUX5411PWR.tsx diff --git a/lib/chips/TMUXHS4212RKSR.circuit.tsx b/lib/chips/TMUXHS4212RKSR.tsx similarity index 100% rename from lib/chips/TMUXHS4212RKSR.circuit.tsx rename to lib/chips/TMUXHS4212RKSR.tsx diff --git a/lib/chips/TPD1E01B04DPYR.circuit.tsx b/lib/chips/TPD1E01B04DPYR.tsx similarity index 100% rename from lib/chips/TPD1E01B04DPYR.circuit.tsx rename to lib/chips/TPD1E01B04DPYR.tsx diff --git a/lib/chips/TPD1E04U04DPYT.circuit.tsx b/lib/chips/TPD1E04U04DPYT.tsx similarity index 100% rename from lib/chips/TPD1E04U04DPYT.circuit.tsx rename to lib/chips/TPD1E04U04DPYT.tsx diff --git a/lib/chips/TPD1E0B04DPLT.circuit.tsx b/lib/chips/TPD1E0B04DPLT.tsx similarity index 100% rename from lib/chips/TPD1E0B04DPLT.circuit.tsx rename to lib/chips/TPD1E0B04DPLT.tsx diff --git a/lib/chips/TPD1E10B06DYAR.circuit.tsx b/lib/chips/TPD1E10B06DYAR.tsx similarity index 100% rename from lib/chips/TPD1E10B06DYAR.circuit.tsx rename to lib/chips/TPD1E10B06DYAR.tsx diff --git a/lib/chips/TPD1E1B04DPYR.circuit.tsx b/lib/chips/TPD1E1B04DPYR.tsx similarity index 100% rename from lib/chips/TPD1E1B04DPYR.circuit.tsx rename to lib/chips/TPD1E1B04DPYR.tsx diff --git a/lib/chips/TPD2E001DRSR.circuit.tsx b/lib/chips/TPD2E001DRSR.tsx similarity index 100% rename from lib/chips/TPD2E001DRSR.circuit.tsx rename to lib/chips/TPD2E001DRSR.tsx diff --git a/lib/chips/TPD2E007DCKR.circuit.tsx b/lib/chips/TPD2E007DCKR.tsx similarity index 100% rename from lib/chips/TPD2E007DCKR.circuit.tsx rename to lib/chips/TPD2E007DCKR.tsx diff --git a/lib/chips/TPD2E1B06DRLR.circuit.tsx b/lib/chips/TPD2E1B06DRLR.tsx similarity index 100% rename from lib/chips/TPD2E1B06DRLR.circuit.tsx rename to lib/chips/TPD2E1B06DRLR.tsx diff --git a/lib/chips/TPD2E2U06DRLR.circuit.tsx b/lib/chips/TPD2E2U06DRLR.tsx similarity index 100% rename from lib/chips/TPD2E2U06DRLR.circuit.tsx rename to lib/chips/TPD2E2U06DRLR.tsx diff --git a/lib/chips/TPD2EUSB30DRTR.circuit.tsx b/lib/chips/TPD2EUSB30DRTR.tsx similarity index 100% rename from lib/chips/TPD2EUSB30DRTR.circuit.tsx rename to lib/chips/TPD2EUSB30DRTR.tsx diff --git a/lib/chips/TPD2S017DBVR.circuit.tsx b/lib/chips/TPD2S017DBVR.tsx similarity index 100% rename from lib/chips/TPD2S017DBVR.circuit.tsx rename to lib/chips/TPD2S017DBVR.tsx diff --git a/lib/chips/TPD2S300YFFR.circuit.tsx b/lib/chips/TPD2S300YFFR.tsx similarity index 100% rename from lib/chips/TPD2S300YFFR.circuit.tsx rename to lib/chips/TPD2S300YFFR.tsx diff --git a/lib/chips/TPD4E001DCKR.circuit.tsx b/lib/chips/TPD4E001DCKR.tsx similarity index 100% rename from lib/chips/TPD4E001DCKR.circuit.tsx rename to lib/chips/TPD4E001DCKR.tsx diff --git a/lib/chips/TPD4E001QDBVRQ1.circuit.tsx b/lib/chips/TPD4E001QDBVRQ1.tsx similarity index 100% rename from lib/chips/TPD4E001QDBVRQ1.circuit.tsx rename to lib/chips/TPD4E001QDBVRQ1.tsx diff --git a/lib/chips/TPD4E05U06DQAR.circuit.tsx b/lib/chips/TPD4E05U06DQAR.tsx similarity index 100% rename from lib/chips/TPD4E05U06DQAR.circuit.tsx rename to lib/chips/TPD4E05U06DQAR.tsx diff --git a/lib/chips/TPD4E1U06DCKR.circuit.tsx b/lib/chips/TPD4E1U06DCKR.tsx similarity index 100% rename from lib/chips/TPD4E1U06DCKR.circuit.tsx rename to lib/chips/TPD4E1U06DCKR.tsx diff --git a/lib/chips/TPD4F003DQDR.circuit.tsx b/lib/chips/TPD4F003DQDR.tsx similarity index 100% rename from lib/chips/TPD4F003DQDR.circuit.tsx rename to lib/chips/TPD4F003DQDR.tsx diff --git a/lib/chips/TPD4S012DRYR.circuit.tsx b/lib/chips/TPD4S012DRYR.tsx similarity index 100% rename from lib/chips/TPD4S012DRYR.circuit.tsx rename to lib/chips/TPD4S012DRYR.tsx diff --git a/lib/chips/TPD4S480RUKR.circuit.tsx b/lib/chips/TPD4S480RUKR.tsx similarity index 100% rename from lib/chips/TPD4S480RUKR.circuit.tsx rename to lib/chips/TPD4S480RUKR.tsx diff --git a/lib/chips/TPD6E001RSFR.circuit.tsx b/lib/chips/TPD6E001RSFR.tsx similarity index 100% rename from lib/chips/TPD6E001RSFR.circuit.tsx rename to lib/chips/TPD6E001RSFR.tsx diff --git a/lib/chips/TPD6S300ARUKR.circuit.tsx b/lib/chips/TPD6S300ARUKR.tsx similarity index 100% rename from lib/chips/TPD6S300ARUKR.circuit.tsx rename to lib/chips/TPD6S300ARUKR.tsx diff --git a/lib/chips/TPL5100DGSR.circuit.tsx b/lib/chips/TPL5100DGSR.tsx similarity index 100% rename from lib/chips/TPL5100DGSR.circuit.tsx rename to lib/chips/TPL5100DGSR.tsx diff --git a/lib/chips/TPL5110DDCT.circuit.tsx b/lib/chips/TPL5110DDCT.tsx similarity index 100% rename from lib/chips/TPL5110DDCT.circuit.tsx rename to lib/chips/TPL5110DDCT.tsx diff --git a/lib/chips/TPL5111DDCR.circuit.tsx b/lib/chips/TPL5111DDCR.tsx similarity index 100% rename from lib/chips/TPL5111DDCR.circuit.tsx rename to lib/chips/TPL5111DDCR.tsx diff --git a/lib/chips/TPL7407LADR.circuit.tsx b/lib/chips/TPL7407LADR.tsx similarity index 100% rename from lib/chips/TPL7407LADR.circuit.tsx rename to lib/chips/TPL7407LADR.tsx diff --git a/lib/chips/TPS16630PWPR.circuit.tsx b/lib/chips/TPS16630PWPR.tsx similarity index 100% rename from lib/chips/TPS16630PWPR.circuit.tsx rename to lib/chips/TPS16630PWPR.tsx diff --git a/lib/chips/TPS1HC03PQVAHRQ1.circuit.tsx b/lib/chips/TPS1HC03PQVAHRQ1.tsx similarity index 100% rename from lib/chips/TPS1HC03PQVAHRQ1.circuit.tsx rename to lib/chips/TPS1HC03PQVAHRQ1.tsx diff --git a/lib/chips/TPS1HC100BQPWPRQ1.circuit.tsx b/lib/chips/TPS1HC100BQPWPRQ1.tsx similarity index 100% rename from lib/chips/TPS1HC100BQPWPRQ1.circuit.tsx rename to lib/chips/TPS1HC100BQPWPRQ1.tsx diff --git a/lib/chips/TPS2121RUXR.circuit.tsx b/lib/chips/TPS2121RUXR.tsx similarity index 100% rename from lib/chips/TPS2121RUXR.circuit.tsx rename to lib/chips/TPS2121RUXR.tsx diff --git a/lib/chips/TPS22860DBVR.circuit.tsx b/lib/chips/TPS22860DBVR.tsx similarity index 100% rename from lib/chips/TPS22860DBVR.circuit.tsx rename to lib/chips/TPS22860DBVR.tsx diff --git a/lib/chips/TPS22910AYZVR.circuit.tsx b/lib/chips/TPS22910AYZVR.tsx similarity index 100% rename from lib/chips/TPS22910AYZVR.circuit.tsx rename to lib/chips/TPS22910AYZVR.tsx diff --git a/lib/chips/TPS22912CYZVR.circuit.tsx b/lib/chips/TPS22912CYZVR.tsx similarity index 100% rename from lib/chips/TPS22912CYZVR.circuit.tsx rename to lib/chips/TPS22912CYZVR.tsx diff --git a/lib/chips/TPS22916BYFPR.circuit.tsx b/lib/chips/TPS22916BYFPR.tsx similarity index 100% rename from lib/chips/TPS22916BYFPR.circuit.tsx rename to lib/chips/TPS22916BYFPR.tsx diff --git a/lib/chips/TPS22918DBVT.circuit.tsx b/lib/chips/TPS22918DBVT.tsx similarity index 100% rename from lib/chips/TPS22918DBVT.circuit.tsx rename to lib/chips/TPS22918DBVT.tsx diff --git a/lib/chips/TPS22919.circuit.tsx b/lib/chips/TPS22919.tsx similarity index 100% rename from lib/chips/TPS22919.circuit.tsx rename to lib/chips/TPS22919.tsx diff --git a/lib/chips/TPS22945DCKR.circuit.tsx b/lib/chips/TPS22945DCKR.tsx similarity index 100% rename from lib/chips/TPS22945DCKR.circuit.tsx rename to lib/chips/TPS22945DCKR.tsx diff --git a/lib/chips/TPS22946YZPR.circuit.tsx b/lib/chips/TPS22946YZPR.tsx similarity index 100% rename from lib/chips/TPS22946YZPR.circuit.tsx rename to lib/chips/TPS22946YZPR.tsx diff --git a/lib/chips/TPS22948DCKR.circuit.tsx b/lib/chips/TPS22948DCKR.tsx similarity index 100% rename from lib/chips/TPS22948DCKR.circuit.tsx rename to lib/chips/TPS22948DCKR.tsx diff --git a/lib/chips/TPS22970YZPR.circuit.tsx b/lib/chips/TPS22970YZPR.tsx similarity index 100% rename from lib/chips/TPS22970YZPR.circuit.tsx rename to lib/chips/TPS22970YZPR.tsx diff --git a/lib/chips/TPS22975NDSGR.circuit.tsx b/lib/chips/TPS22975NDSGR.tsx similarity index 100% rename from lib/chips/TPS22975NDSGR.circuit.tsx rename to lib/chips/TPS22975NDSGR.tsx diff --git a/lib/chips/TPS22990DMLR.circuit.tsx b/lib/chips/TPS22990DMLR.tsx similarity index 100% rename from lib/chips/TPS22990DMLR.circuit.tsx rename to lib/chips/TPS22990DMLR.tsx diff --git a/lib/chips/TPS22991CNRAAR.circuit.tsx b/lib/chips/TPS22991CNRAAR.tsx similarity index 100% rename from lib/chips/TPS22991CNRAAR.circuit.tsx rename to lib/chips/TPS22991CNRAAR.tsx diff --git a/lib/chips/TPS22992SRXNR.circuit.tsx b/lib/chips/TPS22992SRXNR.tsx similarity index 100% rename from lib/chips/TPS22992SRXNR.circuit.tsx rename to lib/chips/TPS22992SRXNR.tsx diff --git a/lib/chips/TPS22995RZFR.circuit.tsx b/lib/chips/TPS22995RZFR.tsx similarity index 100% rename from lib/chips/TPS22995RZFR.circuit.tsx rename to lib/chips/TPS22995RZFR.tsx diff --git a/lib/chips/TPS2400DBVR.circuit.tsx b/lib/chips/TPS2400DBVR.tsx similarity index 100% rename from lib/chips/TPS2400DBVR.circuit.tsx rename to lib/chips/TPS2400DBVR.tsx diff --git a/lib/chips/TPS24750RUVR.circuit.tsx b/lib/chips/TPS24750RUVR.tsx similarity index 100% rename from lib/chips/TPS24750RUVR.circuit.tsx rename to lib/chips/TPS24750RUVR.tsx diff --git a/lib/chips/TPS2491DGS.circuit.tsx b/lib/chips/TPS2491DGS.tsx similarity index 100% rename from lib/chips/TPS2491DGS.circuit.tsx rename to lib/chips/TPS2491DGS.tsx diff --git a/lib/chips/TPS25221DBVR.circuit.tsx b/lib/chips/TPS25221DBVR.tsx similarity index 100% rename from lib/chips/TPS25221DBVR.circuit.tsx rename to lib/chips/TPS25221DBVR.tsx diff --git a/lib/chips/TPS2553DDBVR.circuit.tsx b/lib/chips/TPS2553DDBVR.tsx similarity index 100% rename from lib/chips/TPS2553DDBVR.circuit.tsx rename to lib/chips/TPS2553DDBVR.tsx diff --git a/lib/chips/TPS2590RSAR.circuit.tsx b/lib/chips/TPS2590RSAR.tsx similarity index 100% rename from lib/chips/TPS2590RSAR.circuit.tsx rename to lib/chips/TPS2590RSAR.tsx diff --git a/lib/chips/TPS259241DRCR.circuit.tsx b/lib/chips/TPS259241DRCR.tsx similarity index 100% rename from lib/chips/TPS259241DRCR.circuit.tsx rename to lib/chips/TPS259241DRCR.tsx diff --git a/lib/chips/TPS259461ARPWR.circuit.tsx b/lib/chips/TPS259461ARPWR.tsx similarity index 100% rename from lib/chips/TPS259461ARPWR.circuit.tsx rename to lib/chips/TPS259461ARPWR.tsx diff --git a/lib/chips/TPS259472ARPWR.circuit.tsx b/lib/chips/TPS259472ARPWR.tsx similarity index 100% rename from lib/chips/TPS259472ARPWR.circuit.tsx rename to lib/chips/TPS259472ARPWR.tsx diff --git a/lib/chips/TPS259481AYWPR.circuit.tsx b/lib/chips/TPS259481AYWPR.tsx similarity index 100% rename from lib/chips/TPS259481AYWPR.circuit.tsx rename to lib/chips/TPS259481AYWPR.tsx diff --git a/lib/chips/TPS259541DSGR.circuit.tsx b/lib/chips/TPS259541DSGR.tsx similarity index 100% rename from lib/chips/TPS259541DSGR.circuit.tsx rename to lib/chips/TPS259541DSGR.tsx diff --git a/lib/chips/TPS25972ARPWR.circuit.tsx b/lib/chips/TPS25972ARPWR.tsx similarity index 100% rename from lib/chips/TPS25972ARPWR.circuit.tsx rename to lib/chips/TPS25972ARPWR.tsx diff --git a/lib/chips/TPS259814LRPWR.circuit.tsx b/lib/chips/TPS259814LRPWR.tsx similarity index 100% rename from lib/chips/TPS259814LRPWR.circuit.tsx rename to lib/chips/TPS259814LRPWR.tsx diff --git a/lib/chips/TPS259830ONRGER.circuit.tsx b/lib/chips/TPS259830ONRGER.tsx similarity index 100% rename from lib/chips/TPS259830ONRGER.circuit.tsx rename to lib/chips/TPS259830ONRGER.tsx diff --git a/lib/chips/TPS26400PWPR.circuit.tsx b/lib/chips/TPS26400PWPR.tsx similarity index 100% rename from lib/chips/TPS26400PWPR.circuit.tsx rename to lib/chips/TPS26400PWPR.tsx diff --git a/lib/chips/TPS26600PWPR.circuit.tsx b/lib/chips/TPS26600PWPR.tsx similarity index 100% rename from lib/chips/TPS26600PWPR.circuit.tsx rename to lib/chips/TPS26600PWPR.tsx diff --git a/lib/chips/TPS26625DRCR.circuit.tsx b/lib/chips/TPS26625DRCR.tsx similarity index 100% rename from lib/chips/TPS26625DRCR.circuit.tsx rename to lib/chips/TPS26625DRCR.tsx diff --git a/lib/chips/TPS26632RGET.circuit.tsx b/lib/chips/TPS26632RGET.tsx similarity index 100% rename from lib/chips/TPS26632RGET.circuit.tsx rename to lib/chips/TPS26632RGET.tsx diff --git a/lib/chips/TPS27081ADDCR.circuit.tsx b/lib/chips/TPS27081ADDCR.tsx similarity index 100% rename from lib/chips/TPS27081ADDCR.circuit.tsx rename to lib/chips/TPS27081ADDCR.tsx diff --git a/lib/chips/TPS2HC08PQVAHRQ1.circuit.tsx b/lib/chips/TPS2HC08PQVAHRQ1.tsx similarity index 100% rename from lib/chips/TPS2HC08PQVAHRQ1.circuit.tsx rename to lib/chips/TPS2HC08PQVAHRQ1.tsx diff --git a/lib/chips/TPS2HC16PQVAHRQ1.circuit.tsx b/lib/chips/TPS2HC16PQVAHRQ1.tsx similarity index 100% rename from lib/chips/TPS2HC16PQVAHRQ1.circuit.tsx rename to lib/chips/TPS2HC16PQVAHRQ1.tsx diff --git a/lib/chips/TPS3106K33DBVR.circuit.tsx b/lib/chips/TPS3106K33DBVR.tsx similarity index 100% rename from lib/chips/TPS3106K33DBVR.circuit.tsx rename to lib/chips/TPS3106K33DBVR.tsx diff --git a/lib/chips/TPS3305_18DGNR.circuit.tsx b/lib/chips/TPS3305_18DGNR.tsx similarity index 100% rename from lib/chips/TPS3305_18DGNR.circuit.tsx rename to lib/chips/TPS3305_18DGNR.tsx diff --git a/lib/chips/TPS3424A11C13ADRLR.circuit.tsx b/lib/chips/TPS3424A11C13ADRLR.tsx similarity index 100% rename from lib/chips/TPS3424A11C13ADRLR.circuit.tsx rename to lib/chips/TPS3424A11C13ADRLR.tsx diff --git a/lib/chips/TPS3435JFMAFDSER.circuit.tsx b/lib/chips/TPS3435JFMAFDSER.tsx similarity index 100% rename from lib/chips/TPS3435JFMAFDSER.circuit.tsx rename to lib/chips/TPS3435JFMAFDSER.tsx diff --git a/lib/chips/TPS35AA38AGADDFRQ1.circuit.tsx b/lib/chips/TPS35AA38AGADDFRQ1.tsx similarity index 100% rename from lib/chips/TPS35AA38AGADDFRQ1.circuit.tsx rename to lib/chips/TPS35AA38AGADDFRQ1.tsx diff --git a/lib/chips/TPS3700DDCT.circuit.tsx b/lib/chips/TPS3700DDCT.tsx similarity index 100% rename from lib/chips/TPS3700DDCT.circuit.tsx rename to lib/chips/TPS3700DDCT.tsx diff --git a/lib/chips/TPS3700QDDCRQ1.circuit.tsx b/lib/chips/TPS3700QDDCRQ1.tsx similarity index 100% rename from lib/chips/TPS3700QDDCRQ1.circuit.tsx rename to lib/chips/TPS3700QDDCRQ1.tsx diff --git a/lib/chips/TPS3702CX33DDCR.circuit.tsx b/lib/chips/TPS3702CX33DDCR.tsx similarity index 100% rename from lib/chips/TPS3702CX33DDCR.circuit.tsx rename to lib/chips/TPS3702CX33DDCR.tsx diff --git a/lib/chips/TPS3710DDCR.circuit.tsx b/lib/chips/TPS3710DDCR.tsx similarity index 100% rename from lib/chips/TPS3710DDCR.circuit.tsx rename to lib/chips/TPS3710DDCR.tsx diff --git a/lib/chips/TPS3808EG33DBVR.circuit.tsx b/lib/chips/TPS3808EG33DBVR.tsx similarity index 100% rename from lib/chips/TPS3808EG33DBVR.circuit.tsx rename to lib/chips/TPS3808EG33DBVR.tsx diff --git a/lib/chips/TPS3823_33DBVR.circuit.tsx b/lib/chips/TPS3823_33DBVR.tsx similarity index 100% rename from lib/chips/TPS3823_33DBVR.circuit.tsx rename to lib/chips/TPS3823_33DBVR.tsx diff --git a/lib/chips/TPS3828_50DBVR.circuit.tsx b/lib/chips/TPS3828_50DBVR.tsx similarity index 100% rename from lib/chips/TPS3828_50DBVR.circuit.tsx rename to lib/chips/TPS3828_50DBVR.tsx diff --git a/lib/chips/TPS3831G18DQNR.circuit.tsx b/lib/chips/TPS3831G18DQNR.tsx similarity index 100% rename from lib/chips/TPS3831G18DQNR.circuit.tsx rename to lib/chips/TPS3831G18DQNR.tsx diff --git a/lib/chips/TPS3840DL28DBVR.circuit.tsx b/lib/chips/TPS3840DL28DBVR.tsx similarity index 100% rename from lib/chips/TPS3840DL28DBVR.circuit.tsx rename to lib/chips/TPS3840DL28DBVR.tsx diff --git a/lib/chips/TPS386000RGPR.circuit.tsx b/lib/chips/TPS386000RGPR.tsx similarity index 100% rename from lib/chips/TPS386000RGPR.circuit.tsx rename to lib/chips/TPS386000RGPR.tsx diff --git a/lib/chips/TPS389006007RTER.circuit.tsx b/lib/chips/TPS389006007RTER.tsx similarity index 100% rename from lib/chips/TPS389006007RTER.circuit.tsx rename to lib/chips/TPS389006007RTER.tsx diff --git a/lib/chips/TPS389030DSER.circuit.tsx b/lib/chips/TPS389030DSER.tsx similarity index 100% rename from lib/chips/TPS389030DSER.circuit.tsx rename to lib/chips/TPS389030DSER.tsx diff --git a/lib/chips/TPS40210QDGQRQ1.circuit.tsx b/lib/chips/TPS40210QDGQRQ1.tsx similarity index 100% rename from lib/chips/TPS40210QDGQRQ1.circuit.tsx rename to lib/chips/TPS40210QDGQRQ1.tsx diff --git a/lib/chips/TPS43061RTET.circuit.tsx b/lib/chips/TPS43061RTET.tsx similarity index 100% rename from lib/chips/TPS43061RTET.circuit.tsx rename to lib/chips/TPS43061RTET.tsx diff --git a/lib/chips/TPS51200DRCR.circuit.tsx b/lib/chips/TPS51200DRCR.tsx similarity index 100% rename from lib/chips/TPS51200DRCR.circuit.tsx rename to lib/chips/TPS51200DRCR.tsx diff --git a/lib/chips/TPS51206DSQR.circuit.tsx b/lib/chips/TPS51206DSQR.tsx similarity index 100% rename from lib/chips/TPS51206DSQR.circuit.tsx rename to lib/chips/TPS51206DSQR.tsx diff --git a/lib/chips/TPS54201DDCT.circuit.tsx b/lib/chips/TPS54201DDCT.tsx similarity index 100% rename from lib/chips/TPS54201DDCT.circuit.tsx rename to lib/chips/TPS54201DDCT.tsx diff --git a/lib/chips/TPS54338RQFR.circuit.tsx b/lib/chips/TPS54338RQFR.tsx similarity index 100% rename from lib/chips/TPS54338RQFR.circuit.tsx rename to lib/chips/TPS54338RQFR.tsx diff --git a/lib/chips/TPS54386PWPR.circuit.tsx b/lib/chips/TPS54386PWPR.tsx similarity index 100% rename from lib/chips/TPS54386PWPR.circuit.tsx rename to lib/chips/TPS54386PWPR.tsx diff --git a/lib/chips/TPS54538RQFR.circuit.tsx b/lib/chips/TPS54538RQFR.tsx similarity index 100% rename from lib/chips/TPS54538RQFR.circuit.tsx rename to lib/chips/TPS54538RQFR.tsx diff --git a/lib/chips/TPS55285VALR.circuit.tsx b/lib/chips/TPS55285VALR.tsx similarity index 100% rename from lib/chips/TPS55285VALR.circuit.tsx rename to lib/chips/TPS55285VALR.tsx diff --git a/lib/chips/TPS560430XDBVR.circuit.tsx b/lib/chips/TPS560430XDBVR.tsx similarity index 100% rename from lib/chips/TPS560430XDBVR.circuit.tsx rename to lib/chips/TPS560430XDBVR.tsx diff --git a/lib/chips/TPS561243DRLR.circuit.tsx b/lib/chips/TPS561243DRLR.tsx similarity index 100% rename from lib/chips/TPS561243DRLR.circuit.tsx rename to lib/chips/TPS561243DRLR.tsx diff --git a/lib/chips/TPS563252DRLR.circuit.tsx b/lib/chips/TPS563252DRLR.tsx similarity index 100% rename from lib/chips/TPS563252DRLR.circuit.tsx rename to lib/chips/TPS563252DRLR.tsx diff --git a/lib/chips/TPS564252DRLR.circuit.tsx b/lib/chips/TPS564252DRLR.tsx similarity index 100% rename from lib/chips/TPS564252DRLR.circuit.tsx rename to lib/chips/TPS564252DRLR.tsx diff --git a/lib/chips/TPS565242DRLR.circuit.tsx b/lib/chips/TPS565242DRLR.tsx similarity index 100% rename from lib/chips/TPS565242DRLR.circuit.tsx rename to lib/chips/TPS565242DRLR.tsx diff --git a/lib/chips/TPS566231PRQFR.circuit.tsx b/lib/chips/TPS566231PRQFR.tsx similarity index 100% rename from lib/chips/TPS566231PRQFR.circuit.tsx rename to lib/chips/TPS566231PRQFR.tsx diff --git a/lib/chips/TPS61021ADSGR.circuit.tsx b/lib/chips/TPS61021ADSGR.tsx similarity index 100% rename from lib/chips/TPS61021ADSGR.circuit.tsx rename to lib/chips/TPS61021ADSGR.tsx diff --git a/lib/chips/TPS61094DSSR.circuit.tsx b/lib/chips/TPS61094DSSR.tsx similarity index 100% rename from lib/chips/TPS61094DSSR.circuit.tsx rename to lib/chips/TPS61094DSSR.tsx diff --git a/lib/chips/TPS61096ADSSR.circuit.tsx b/lib/chips/TPS61096ADSSR.tsx similarity index 100% rename from lib/chips/TPS61096ADSSR.circuit.tsx rename to lib/chips/TPS61096ADSSR.tsx diff --git a/lib/chips/TPS61158DRVR.circuit.tsx b/lib/chips/TPS61158DRVR.tsx similarity index 100% rename from lib/chips/TPS61158DRVR.circuit.tsx rename to lib/chips/TPS61158DRVR.tsx diff --git a/lib/chips/TPS61161DRVR.circuit.tsx b/lib/chips/TPS61161DRVR.tsx similarity index 100% rename from lib/chips/TPS61161DRVR.circuit.tsx rename to lib/chips/TPS61161DRVR.tsx diff --git a/lib/chips/TPS61165DRVR.circuit.tsx b/lib/chips/TPS61165DRVR.tsx similarity index 100% rename from lib/chips/TPS61165DRVR.circuit.tsx rename to lib/chips/TPS61165DRVR.tsx diff --git a/lib/chips/TPS61169DCKR.circuit.tsx b/lib/chips/TPS61169DCKR.tsx similarity index 100% rename from lib/chips/TPS61169DCKR.circuit.tsx rename to lib/chips/TPS61169DCKR.tsx diff --git a/lib/chips/TPS61222.circuit.tsx b/lib/chips/TPS61222.tsx similarity index 86% rename from lib/chips/TPS61222.circuit.tsx rename to lib/chips/TPS61222.tsx index c12e6396..136a4b82 100644 --- a/lib/chips/TPS61222.circuit.tsx +++ b/lib/chips/TPS61222.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { TPS61222DCKR } from "./TPS61222DCKR.circuit.tsx"; +import { TPS61222DCKR } from "./TPS61222DCKR.tsx"; export type TPS61222Props = ComponentProps & { footprintVariant?: "sot_23_6"; diff --git a/lib/chips/TPS61222DCKR.circuit.tsx b/lib/chips/TPS61222DCKR.tsx similarity index 100% rename from lib/chips/TPS61222DCKR.circuit.tsx rename to lib/chips/TPS61222DCKR.tsx diff --git a/lib/chips/TPS61299DRLR.circuit.tsx b/lib/chips/TPS61299DRLR.tsx similarity index 100% rename from lib/chips/TPS61299DRLR.circuit.tsx rename to lib/chips/TPS61299DRLR.tsx diff --git a/lib/chips/TPS61299X.circuit.tsx b/lib/chips/TPS61299X.tsx similarity index 88% rename from lib/chips/TPS61299X.circuit.tsx rename to lib/chips/TPS61299X.tsx index 5a1cc72b..092c72a4 100644 --- a/lib/chips/TPS61299X.circuit.tsx +++ b/lib/chips/TPS61299X.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TPS61299DRLR } from "./TPS61299DRLR.circuit.tsx"; +import { TPS61299DRLR } from "./TPS61299DRLR.tsx"; type TPS61299XFootprintVariant = "sot_563_6" | (string & {}); diff --git a/lib/chips/TPS613771RYHR.circuit.tsx b/lib/chips/TPS613771RYHR.tsx similarity index 100% rename from lib/chips/TPS613771RYHR.circuit.tsx rename to lib/chips/TPS613771RYHR.tsx diff --git a/lib/chips/TPS62177DQCT.circuit.tsx b/lib/chips/TPS62177DQCT.tsx similarity index 100% rename from lib/chips/TPS62177DQCT.circuit.tsx rename to lib/chips/TPS62177DQCT.tsx diff --git a/lib/chips/TPS62824ADMQR.circuit.tsx b/lib/chips/TPS62824ADMQR.tsx similarity index 100% rename from lib/chips/TPS62824ADMQR.circuit.tsx rename to lib/chips/TPS62824ADMQR.tsx diff --git a/lib/chips/TPS62842DGRR.circuit.tsx b/lib/chips/TPS62842DGRR.tsx similarity index 100% rename from lib/chips/TPS62842DGRR.circuit.tsx rename to lib/chips/TPS62842DGRR.tsx diff --git a/lib/chips/TPS628502QDRLRQ1.circuit.tsx b/lib/chips/TPS628502QDRLRQ1.tsx similarity index 100% rename from lib/chips/TPS628502QDRLRQ1.circuit.tsx rename to lib/chips/TPS628502QDRLRQ1.tsx diff --git a/lib/chips/TPS6293.circuit.tsx b/lib/chips/TPS6293.tsx similarity index 100% rename from lib/chips/TPS6293.circuit.tsx rename to lib/chips/TPS6293.tsx diff --git a/lib/chips/TPS62933PDRLR.circuit.tsx b/lib/chips/TPS62933PDRLR.tsx similarity index 100% rename from lib/chips/TPS62933PDRLR.circuit.tsx rename to lib/chips/TPS62933PDRLR.tsx diff --git a/lib/chips/TPS62A01PDDCR.circuit.tsx b/lib/chips/TPS62A01PDDCR.tsx similarity index 100% rename from lib/chips/TPS62A01PDDCR.circuit.tsx rename to lib/chips/TPS62A01PDDCR.tsx diff --git a/lib/chips/TPS62A03ADRLR.circuit.tsx b/lib/chips/TPS62A03ADRLR.tsx similarity index 100% rename from lib/chips/TPS62A03ADRLR.circuit.tsx rename to lib/chips/TPS62A03ADRLR.tsx diff --git a/lib/chips/TPS631000DRLR.circuit.tsx b/lib/chips/TPS631000DRLR.tsx similarity index 100% rename from lib/chips/TPS631000DRLR.circuit.tsx rename to lib/chips/TPS631000DRLR.tsx diff --git a/lib/chips/TPS63802.circuit.tsx b/lib/chips/TPS63802.tsx similarity index 88% rename from lib/chips/TPS63802.circuit.tsx rename to lib/chips/TPS63802.tsx index f1ca6808..04f9e828 100644 --- a/lib/chips/TPS63802.circuit.tsx +++ b/lib/chips/TPS63802.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TPS63802DLAR } from "./TPS63802DLAR.circuit.tsx"; +import { TPS63802DLAR } from "./TPS63802DLAR.tsx"; type TPS63802FootprintVariant = "vson_hr_10" | (string & {}); diff --git a/lib/chips/TPS63802DLAR.circuit.tsx b/lib/chips/TPS63802DLAR.tsx similarity index 100% rename from lib/chips/TPS63802DLAR.circuit.tsx rename to lib/chips/TPS63802DLAR.tsx diff --git a/lib/chips/TPS63900DSKR.circuit.tsx b/lib/chips/TPS63900DSKR.tsx similarity index 100% rename from lib/chips/TPS63900DSKR.circuit.tsx rename to lib/chips/TPS63900DSKR.tsx diff --git a/lib/chips/TPS65023BRSBR.circuit.tsx b/lib/chips/TPS65023BRSBR.tsx similarity index 100% rename from lib/chips/TPS65023BRSBR.circuit.tsx rename to lib/chips/TPS65023BRSBR.tsx diff --git a/lib/chips/TPS650250RHBT.circuit.tsx b/lib/chips/TPS650250RHBT.tsx similarity index 100% rename from lib/chips/TPS650250RHBT.circuit.tsx rename to lib/chips/TPS650250RHBT.tsx diff --git a/lib/chips/TPS65105PWPR.circuit.tsx b/lib/chips/TPS65105PWPR.tsx similarity index 100% rename from lib/chips/TPS65105PWPR.circuit.tsx rename to lib/chips/TPS65105PWPR.tsx diff --git a/lib/chips/TPS65130RGER.circuit.tsx b/lib/chips/TPS65130RGER.tsx similarity index 100% rename from lib/chips/TPS65130RGER.circuit.tsx rename to lib/chips/TPS65130RGER.tsx diff --git a/lib/chips/TPS65145RGER.circuit.tsx b/lib/chips/TPS65145RGER.tsx similarity index 100% rename from lib/chips/TPS65145RGER.circuit.tsx rename to lib/chips/TPS65145RGER.tsx diff --git a/lib/chips/TPS6521401VAFR.circuit.tsx b/lib/chips/TPS6521401VAFR.tsx similarity index 100% rename from lib/chips/TPS6521401VAFR.circuit.tsx rename to lib/chips/TPS6521401VAFR.tsx diff --git a/lib/chips/TPS65217CRSLR.circuit.tsx b/lib/chips/TPS65217CRSLR.tsx similarity index 100% rename from lib/chips/TPS65217CRSLR.circuit.tsx rename to lib/chips/TPS65217CRSLR.tsx diff --git a/lib/chips/TPS6521815RSLR.circuit.tsx b/lib/chips/TPS6521815RSLR.tsx similarity index 100% rename from lib/chips/TPS6521815RSLR.circuit.tsx rename to lib/chips/TPS6521815RSLR.tsx diff --git a/lib/chips/TPS6521835.circuit.tsx b/lib/chips/TPS6521835.tsx similarity index 100% rename from lib/chips/TPS6521835.circuit.tsx rename to lib/chips/TPS6521835.tsx diff --git a/lib/chips/TPS6521902RSMR.circuit.tsx b/lib/chips/TPS6521902RSMR.tsx similarity index 100% rename from lib/chips/TPS6521902RSMR.circuit.tsx rename to lib/chips/TPS6521902RSMR.tsx diff --git a/lib/chips/TPS6522430RAHRQ1.circuit.tsx b/lib/chips/TPS6522430RAHRQ1.tsx similarity index 100% rename from lib/chips/TPS6522430RAHRQ1.circuit.tsx rename to lib/chips/TPS6522430RAHRQ1.tsx diff --git a/lib/chips/TPS65296RJER.circuit.tsx b/lib/chips/TPS65296RJER.tsx similarity index 100% rename from lib/chips/TPS65296RJER.circuit.tsx rename to lib/chips/TPS65296RJER.tsx diff --git a/lib/chips/TPS65381AQDAPRQ1.circuit.tsx b/lib/chips/TPS65381AQDAPRQ1.tsx similarity index 100% rename from lib/chips/TPS65381AQDAPRQ1.circuit.tsx rename to lib/chips/TPS65381AQDAPRQ1.tsx diff --git a/lib/chips/TPS65910A31A1RSLR.circuit.tsx b/lib/chips/TPS65910A31A1RSLR.tsx similarity index 100% rename from lib/chips/TPS65910A31A1RSLR.circuit.tsx rename to lib/chips/TPS65910A31A1RSLR.tsx diff --git a/lib/chips/TPS65930A2ZCHR.circuit.tsx b/lib/chips/TPS65930A2ZCHR.tsx similarity index 100% rename from lib/chips/TPS65930A2ZCHR.circuit.tsx rename to lib/chips/TPS65930A2ZCHR.tsx diff --git a/lib/chips/TPS65931211RWERQ1.circuit.tsx b/lib/chips/TPS65931211RWERQ1.tsx similarity index 100% rename from lib/chips/TPS65931211RWERQ1.circuit.tsx rename to lib/chips/TPS65931211RWERQ1.tsx diff --git a/lib/chips/TPS70950QDBVRQ1.circuit.tsx b/lib/chips/TPS70950QDBVRQ1.tsx similarity index 100% rename from lib/chips/TPS70950QDBVRQ1.circuit.tsx rename to lib/chips/TPS70950QDBVRQ1.tsx diff --git a/lib/chips/TPS76350QDBVRQ1.circuit.tsx b/lib/chips/TPS76350QDBVRQ1.tsx similarity index 100% rename from lib/chips/TPS76350QDBVRQ1.circuit.tsx rename to lib/chips/TPS76350QDBVRQ1.tsx diff --git a/lib/chips/TPS78233DDCR.circuit.tsx b/lib/chips/TPS78233DDCR.tsx similarity index 100% rename from lib/chips/TPS78233DDCR.circuit.tsx rename to lib/chips/TPS78233DDCR.tsx diff --git a/lib/chips/TPS7A02.circuit.tsx b/lib/chips/TPS7A02.tsx similarity index 87% rename from lib/chips/TPS7A02.circuit.tsx rename to lib/chips/TPS7A02.tsx index 4895a571..3f7ce509 100644 --- a/lib/chips/TPS7A02.circuit.tsx +++ b/lib/chips/TPS7A02.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TPS7A0230PDBVR } from "./TPS7A0230PDBVR.circuit.tsx"; +import { TPS7A0230PDBVR } from "./TPS7A0230PDBVR.tsx"; type TPS7A02FootprintVariant = "sot_23_5" | (string & {}); diff --git a/lib/chips/TPS7A0230PDBVR.circuit.tsx b/lib/chips/TPS7A0230PDBVR.tsx similarity index 100% rename from lib/chips/TPS7A0230PDBVR.circuit.tsx rename to lib/chips/TPS7A0230PDBVR.tsx diff --git a/lib/chips/TPS7A1633DGNR.circuit.tsx b/lib/chips/TPS7A1633DGNR.tsx similarity index 100% rename from lib/chips/TPS7A1633DGNR.circuit.tsx rename to lib/chips/TPS7A1633DGNR.tsx diff --git a/lib/chips/TPS7A20.circuit.tsx b/lib/chips/TPS7A20.tsx similarity index 88% rename from lib/chips/TPS7A20.circuit.tsx rename to lib/chips/TPS7A20.tsx index 6b228c91..05ac4c23 100644 --- a/lib/chips/TPS7A20.circuit.tsx +++ b/lib/chips/TPS7A20.tsx @@ -1,5 +1,5 @@ import type { ComponentProps } from "react"; -import { TPS7A2033PDBVR } from "./TPS7A2033PDBVR.circuit.tsx"; +import { TPS7A2033PDBVR } from "./TPS7A2033PDBVR.tsx"; type TPS7A20FootprintVariant = "sot_23_5" | (string & {}); diff --git a/lib/chips/TPS7A2018PDBVR.circuit.tsx b/lib/chips/TPS7A2018PDBVR.tsx similarity index 100% rename from lib/chips/TPS7A2018PDBVR.circuit.tsx rename to lib/chips/TPS7A2018PDBVR.tsx diff --git a/lib/chips/TPS7A2028PDBVR.circuit.tsx b/lib/chips/TPS7A2028PDBVR.tsx similarity index 100% rename from lib/chips/TPS7A2028PDBVR.circuit.tsx rename to lib/chips/TPS7A2028PDBVR.tsx diff --git a/lib/chips/TPS7A2033PDBVR.circuit.tsx b/lib/chips/TPS7A2033PDBVR.tsx similarity index 100% rename from lib/chips/TPS7A2033PDBVR.circuit.tsx rename to lib/chips/TPS7A2033PDBVR.tsx diff --git a/lib/chips/TPS7A2525DRVR.circuit.tsx b/lib/chips/TPS7A2525DRVR.tsx similarity index 100% rename from lib/chips/TPS7A2525DRVR.circuit.tsx rename to lib/chips/TPS7A2525DRVR.tsx diff --git a/lib/chips/TPS7A4901DGNR.circuit.tsx b/lib/chips/TPS7A4901DGNR.tsx similarity index 100% rename from lib/chips/TPS7A4901DGNR.circuit.tsx rename to lib/chips/TPS7A4901DGNR.tsx diff --git a/lib/chips/TPS7A5301BRPSR.circuit.tsx b/lib/chips/TPS7A5301BRPSR.tsx similarity index 100% rename from lib/chips/TPS7A5301BRPSR.circuit.tsx rename to lib/chips/TPS7A5301BRPSR.tsx diff --git a/lib/chips/TPS7A9401DSCR.circuit.tsx b/lib/chips/TPS7A9401DSCR.tsx similarity index 100% rename from lib/chips/TPS7A9401DSCR.circuit.tsx rename to lib/chips/TPS7A9401DSCR.tsx diff --git a/lib/chips/TPS7A9601DSCR.circuit.tsx b/lib/chips/TPS7A9601DSCR.tsx similarity index 100% rename from lib/chips/TPS7A9601DSCR.circuit.tsx rename to lib/chips/TPS7A9601DSCR.tsx diff --git a/lib/chips/TPS7B4255QDBVRQ1.circuit.tsx b/lib/chips/TPS7B4255QDBVRQ1.tsx similarity index 100% rename from lib/chips/TPS7B4255QDBVRQ1.circuit.tsx rename to lib/chips/TPS7B4255QDBVRQ1.tsx diff --git a/lib/chips/TPS7B4260QDDARQ1.circuit.tsx b/lib/chips/TPS7B4260QDDARQ1.tsx similarity index 100% rename from lib/chips/TPS7B4260QDDARQ1.circuit.tsx rename to lib/chips/TPS7B4260QDDARQ1.tsx diff --git a/lib/chips/TPS7E7101DBVR.circuit.tsx b/lib/chips/TPS7E7101DBVR.tsx similarity index 100% rename from lib/chips/TPS7E7101DBVR.circuit.tsx rename to lib/chips/TPS7E7101DBVR.tsx diff --git a/lib/chips/TPS7E8150DBVR.circuit.tsx b/lib/chips/TPS7E8150DBVR.tsx similarity index 100% rename from lib/chips/TPS7E8150DBVR.circuit.tsx rename to lib/chips/TPS7E8150DBVR.tsx diff --git a/lib/chips/TPS92200D2RXLR.circuit.tsx b/lib/chips/TPS92200D2RXLR.tsx similarity index 100% rename from lib/chips/TPS92200D2RXLR.circuit.tsx rename to lib/chips/TPS92200D2RXLR.tsx diff --git a/lib/chips/TPS922051D1DGNR.circuit.tsx b/lib/chips/TPS922051D1DGNR.tsx similarity index 100% rename from lib/chips/TPS922051D1DGNR.circuit.tsx rename to lib/chips/TPS922051D1DGNR.tsx diff --git a/lib/chips/TPS92612DBVR.circuit.tsx b/lib/chips/TPS92612DBVR.tsx similarity index 100% rename from lib/chips/TPS92612DBVR.circuit.tsx rename to lib/chips/TPS92612DBVR.tsx diff --git a/lib/chips/TPS92640PWPR_NOPB.circuit.tsx b/lib/chips/TPS92640PWPR_NOPB.tsx similarity index 100% rename from lib/chips/TPS92640PWPR_NOPB.circuit.tsx rename to lib/chips/TPS92640PWPR_NOPB.tsx diff --git a/lib/chips/TPS92761QPHPRQ1.circuit.tsx b/lib/chips/TPS92761QPHPRQ1.tsx similarity index 100% rename from lib/chips/TPS92761QPHPRQ1.circuit.tsx rename to lib/chips/TPS92761QPHPRQ1.tsx diff --git a/lib/chips/TPSM64406RCHR.circuit.tsx b/lib/chips/TPSM64406RCHR.tsx similarity index 100% rename from lib/chips/TPSM64406RCHR.circuit.tsx rename to lib/chips/TPSM64406RCHR.tsx diff --git a/lib/chips/TPSM828214SILR.circuit.tsx b/lib/chips/TPSM828214SILR.tsx similarity index 100% rename from lib/chips/TPSM828214SILR.circuit.tsx rename to lib/chips/TPSM828214SILR.tsx diff --git a/lib/chips/TPSM828223SILR.circuit.tsx b/lib/chips/TPSM828223SILR.tsx similarity index 100% rename from lib/chips/TPSM828223SILR.circuit.tsx rename to lib/chips/TPSM828223SILR.tsx diff --git a/lib/chips/TPSM82823.circuit.tsx b/lib/chips/TPSM82823.tsx similarity index 100% rename from lib/chips/TPSM82823.circuit.tsx rename to lib/chips/TPSM82823.tsx diff --git a/lib/chips/TPSM828301ARDSR.circuit.tsx b/lib/chips/TPSM828301ARDSR.tsx similarity index 100% rename from lib/chips/TPSM828301ARDSR.circuit.tsx rename to lib/chips/TPSM828301ARDSR.tsx diff --git a/lib/chips/TPSM828303ARDSR.circuit.tsx b/lib/chips/TPSM828303ARDSR.tsx similarity index 100% rename from lib/chips/TPSM828303ARDSR.circuit.tsx rename to lib/chips/TPSM828303ARDSR.tsx diff --git a/lib/chips/TPSM82901SISR.circuit.tsx b/lib/chips/TPSM82901SISR.tsx similarity index 100% rename from lib/chips/TPSM82901SISR.circuit.tsx rename to lib/chips/TPSM82901SISR.tsx diff --git a/lib/chips/TPSM82903SISR.circuit.tsx b/lib/chips/TPSM82903SISR.tsx similarity index 100% rename from lib/chips/TPSM82903SISR.circuit.tsx rename to lib/chips/TPSM82903SISR.tsx diff --git a/lib/chips/TPSM843620SITR.circuit.tsx b/lib/chips/TPSM843620SITR.tsx similarity index 100% rename from lib/chips/TPSM843620SITR.circuit.tsx rename to lib/chips/TPSM843620SITR.tsx diff --git a/lib/chips/TPSM863252RDXR.circuit.tsx b/lib/chips/TPSM863252RDXR.tsx similarity index 100% rename from lib/chips/TPSM863252RDXR.circuit.tsx rename to lib/chips/TPSM863252RDXR.tsx diff --git a/lib/chips/TPSM8A29RDGR.circuit.tsx b/lib/chips/TPSM8A29RDGR.tsx similarity index 100% rename from lib/chips/TPSM8A29RDGR.circuit.tsx rename to lib/chips/TPSM8A29RDGR.tsx diff --git a/lib/chips/TRF7960RHB.circuit.tsx b/lib/chips/TRF7960RHB.tsx similarity index 100% rename from lib/chips/TRF7960RHB.circuit.tsx rename to lib/chips/TRF7960RHB.tsx diff --git a/lib/chips/TRF7964ARHBR.circuit.tsx b/lib/chips/TRF7964ARHBR.tsx similarity index 100% rename from lib/chips/TRF7964ARHBR.circuit.tsx rename to lib/chips/TRF7964ARHBR.tsx diff --git a/lib/chips/TRF7970ARHBR.circuit.tsx b/lib/chips/TRF7970ARHBR.tsx similarity index 100% rename from lib/chips/TRF7970ARHBR.circuit.tsx rename to lib/chips/TRF7970ARHBR.tsx diff --git a/lib/chips/TRS3122ERGER.circuit.tsx b/lib/chips/TRS3122ERGER.tsx similarity index 100% rename from lib/chips/TRS3122ERGER.circuit.tsx rename to lib/chips/TRS3122ERGER.tsx diff --git a/lib/chips/TRS3232EIRGTR.circuit.tsx b/lib/chips/TRS3232EIRGTR.tsx similarity index 100% rename from lib/chips/TRS3232EIRGTR.circuit.tsx rename to lib/chips/TRS3232EIRGTR.tsx diff --git a/lib/chips/TRS3243ECDBR.circuit.tsx b/lib/chips/TRS3243ECDBR.tsx similarity index 100% rename from lib/chips/TRS3243ECDBR.circuit.tsx rename to lib/chips/TRS3243ECDBR.tsx diff --git a/lib/chips/TRS3318EIPWR.circuit.tsx b/lib/chips/TRS3318EIPWR.tsx similarity index 100% rename from lib/chips/TRS3318EIPWR.circuit.tsx rename to lib/chips/TRS3318EIPWR.tsx diff --git a/lib/chips/TRS3386ECPWR.circuit.tsx b/lib/chips/TRS3386ECPWR.tsx similarity index 100% rename from lib/chips/TRS3386ECPWR.circuit.tsx rename to lib/chips/TRS3386ECPWR.tsx diff --git a/lib/chips/TRSF3223EIRGWR.circuit.tsx b/lib/chips/TRSF3223EIRGWR.tsx similarity index 100% rename from lib/chips/TRSF3223EIRGWR.circuit.tsx rename to lib/chips/TRSF3223EIRGWR.tsx diff --git a/lib/chips/TS3DV642RUATQ1.circuit.tsx b/lib/chips/TS3DV642RUATQ1.tsx similarity index 100% rename from lib/chips/TS3DV642RUATQ1.circuit.tsx rename to lib/chips/TS3DV642RUATQ1.tsx diff --git a/lib/chips/TS3USB221RSER.circuit.tsx b/lib/chips/TS3USB221RSER.tsx similarity index 100% rename from lib/chips/TS3USB221RSER.circuit.tsx rename to lib/chips/TS3USB221RSER.tsx diff --git a/lib/chips/TS5A3157DCKR.circuit.tsx b/lib/chips/TS5A3157DCKR.tsx similarity index 100% rename from lib/chips/TS5A3157DCKR.circuit.tsx rename to lib/chips/TS5A3157DCKR.tsx diff --git a/lib/chips/TS5A3159ADBVR.circuit.tsx b/lib/chips/TS5A3159ADBVR.tsx similarity index 100% rename from lib/chips/TS5A3159ADBVR.circuit.tsx rename to lib/chips/TS5A3159ADBVR.tsx diff --git a/lib/chips/TS5A3160DBVR.circuit.tsx b/lib/chips/TS5A3160DBVR.tsx similarity index 100% rename from lib/chips/TS5A3160DBVR.circuit.tsx rename to lib/chips/TS5A3160DBVR.tsx diff --git a/lib/chips/TS5A3166DBVR.circuit.tsx b/lib/chips/TS5A3166DBVR.tsx similarity index 100% rename from lib/chips/TS5A3166DBVR.circuit.tsx rename to lib/chips/TS5A3166DBVR.tsx diff --git a/lib/chips/TS5A3166QDCKRQ1.circuit.tsx b/lib/chips/TS5A3166QDCKRQ1.tsx similarity index 100% rename from lib/chips/TS5A3166QDCKRQ1.circuit.tsx rename to lib/chips/TS5A3166QDCKRQ1.tsx diff --git a/lib/chips/TS5A9411DCKR.circuit.tsx b/lib/chips/TS5A9411DCKR.tsx similarity index 100% rename from lib/chips/TS5A9411DCKR.circuit.tsx rename to lib/chips/TS5A9411DCKR.tsx diff --git a/lib/chips/TSD05DYFR.circuit.tsx b/lib/chips/TSD05DYFR.tsx similarity index 100% rename from lib/chips/TSD05DYFR.circuit.tsx rename to lib/chips/TSD05DYFR.tsx diff --git a/lib/chips/TSM24CADBZR.circuit.tsx b/lib/chips/TSM24CADBZR.tsx similarity index 100% rename from lib/chips/TSM24CADBZR.circuit.tsx rename to lib/chips/TSM24CADBZR.tsx diff --git a/lib/chips/TUSB1004RNQR.circuit.tsx b/lib/chips/TUSB1004RNQR.tsx similarity index 100% rename from lib/chips/TUSB1004RNQR.circuit.tsx rename to lib/chips/TUSB1004RNQR.tsx diff --git a/lib/chips/TUSB1046_DCIRNQR.circuit.tsx b/lib/chips/TUSB1046_DCIRNQR.tsx similarity index 100% rename from lib/chips/TUSB1046_DCIRNQR.circuit.tsx rename to lib/chips/TUSB1046_DCIRNQR.tsx diff --git a/lib/chips/TUSB8041RGCR.circuit.tsx b/lib/chips/TUSB8041RGCR.tsx similarity index 100% rename from lib/chips/TUSB8041RGCR.circuit.tsx rename to lib/chips/TUSB8041RGCR.tsx diff --git a/lib/chips/TUSB8042ARGCR.circuit.tsx b/lib/chips/TUSB8042ARGCR.tsx similarity index 100% rename from lib/chips/TUSB8042ARGCR.circuit.tsx rename to lib/chips/TUSB8042ARGCR.tsx diff --git a/lib/chips/TVS0500DRVR.circuit.tsx b/lib/chips/TVS0500DRVR.tsx similarity index 100% rename from lib/chips/TVS0500DRVR.circuit.tsx rename to lib/chips/TVS0500DRVR.tsx diff --git a/lib/chips/TVS1400DRVR.circuit.tsx b/lib/chips/TVS1400DRVR.tsx similarity index 100% rename from lib/chips/TVS1400DRVR.circuit.tsx rename to lib/chips/TVS1400DRVR.tsx diff --git a/lib/chips/TVS1401DRBR.circuit.tsx b/lib/chips/TVS1401DRBR.tsx similarity index 100% rename from lib/chips/TVS1401DRBR.circuit.tsx rename to lib/chips/TVS1401DRBR.tsx diff --git a/lib/chips/TVS2700DRVR.circuit.tsx b/lib/chips/TVS2700DRVR.tsx similarity index 100% rename from lib/chips/TVS2700DRVR.circuit.tsx rename to lib/chips/TVS2700DRVR.tsx diff --git a/lib/chips/TVS3300YZFR.circuit.tsx b/lib/chips/TVS3300YZFR.tsx similarity index 100% rename from lib/chips/TVS3300YZFR.circuit.tsx rename to lib/chips/TVS3300YZFR.tsx diff --git a/lib/chips/TXB0104.circuit.tsx b/lib/chips/TXB0104.tsx similarity index 89% rename from lib/chips/TXB0104.circuit.tsx rename to lib/chips/TXB0104.tsx index 61aa745d..e8eeef6d 100644 --- a/lib/chips/TXB0104.circuit.tsx +++ b/lib/chips/TXB0104.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TXB0104RGYR } from "./TXB0104RGYR.circuit.tsx"; +import { TXB0104RGYR } from "./TXB0104RGYR.tsx"; type TXB0104FootprintVariant = "vqfn_14_ep_3p5x3p5" | (string & {}); diff --git a/lib/chips/TXB0104RGYR.circuit.tsx b/lib/chips/TXB0104RGYR.tsx similarity index 100% rename from lib/chips/TXB0104RGYR.circuit.tsx rename to lib/chips/TXB0104RGYR.tsx diff --git a/lib/chips/TXE8124DGSR.circuit.tsx b/lib/chips/TXE8124DGSR.tsx similarity index 100% rename from lib/chips/TXE8124DGSR.circuit.tsx rename to lib/chips/TXE8124DGSR.tsx diff --git a/lib/chips/TXS0102.circuit.tsx b/lib/chips/TXS0102.tsx similarity index 88% rename from lib/chips/TXS0102.circuit.tsx rename to lib/chips/TXS0102.tsx index 9cc28d80..c7a0036d 100644 --- a/lib/chips/TXS0102.circuit.tsx +++ b/lib/chips/TXS0102.tsx @@ -1,6 +1,6 @@ import type { ComponentProps } from "react"; -import { TXS0102DCUR } from "./TXS0102DCUR.circuit.tsx"; +import { TXS0102DCUR } from "./TXS0102DCUR.tsx"; type TXS0102FootprintVariant = "vssop_8" | (string & {}); diff --git a/lib/chips/TXS0102DCUR.circuit.tsx b/lib/chips/TXS0102DCUR.tsx similarity index 100% rename from lib/chips/TXS0102DCUR.circuit.tsx rename to lib/chips/TXS0102DCUR.tsx diff --git a/lib/chips/TXS0104ERGYR.circuit.tsx b/lib/chips/TXS0104ERGYR.tsx similarity index 100% rename from lib/chips/TXS0104ERGYR.circuit.tsx rename to lib/chips/TXS0104ERGYR.tsx diff --git a/lib/chips/TXS0108EPWR.circuit.tsx b/lib/chips/TXS0108EPWR.tsx similarity index 100% rename from lib/chips/TXS0108EPWR.circuit.tsx rename to lib/chips/TXS0108EPWR.tsx diff --git a/lib/chips/TXV0108QWRGYRQ1.circuit.tsx b/lib/chips/TXV0108QWRGYRQ1.tsx similarity index 100% rename from lib/chips/TXV0108QWRGYRQ1.circuit.tsx rename to lib/chips/TXV0108QWRGYRQ1.tsx diff --git a/lib/chips/UA78M05CDCYR.circuit.tsx b/lib/chips/UA78M05CDCYR.tsx similarity index 100% rename from lib/chips/UA78M05CDCYR.circuit.tsx rename to lib/chips/UA78M05CDCYR.tsx diff --git a/lib/chips/UC2845D8TR.circuit.tsx b/lib/chips/UC2845D8TR.tsx similarity index 100% rename from lib/chips/UC2845D8TR.circuit.tsx rename to lib/chips/UC2845D8TR.tsx diff --git a/lib/chips/UCC21330ADR.circuit.tsx b/lib/chips/UCC21330ADR.tsx similarity index 100% rename from lib/chips/UCC21330ADR.circuit.tsx rename to lib/chips/UCC21330ADR.tsx diff --git a/lib/chips/UCC21550ADWR.circuit.tsx b/lib/chips/UCC21550ADWR.tsx similarity index 100% rename from lib/chips/UCC21550ADWR.circuit.tsx rename to lib/chips/UCC21550ADWR.tsx diff --git a/lib/chips/UCC21750DWR.circuit.tsx b/lib/chips/UCC21750DWR.tsx similarity index 100% rename from lib/chips/UCC21750DWR.circuit.tsx rename to lib/chips/UCC21750DWR.tsx diff --git a/lib/chips/UCC23525CDWYR.circuit.tsx b/lib/chips/UCC23525CDWYR.tsx similarity index 100% rename from lib/chips/UCC23525CDWYR.circuit.tsx rename to lib/chips/UCC23525CDWYR.tsx diff --git a/lib/chips/UCC24610DRBR.circuit.tsx b/lib/chips/UCC24610DRBR.tsx similarity index 100% rename from lib/chips/UCC24610DRBR.circuit.tsx rename to lib/chips/UCC24610DRBR.tsx diff --git a/lib/chips/UCC24612_2DBVR.circuit.tsx b/lib/chips/UCC24612_2DBVR.tsx similarity index 100% rename from lib/chips/UCC24612_2DBVR.circuit.tsx rename to lib/chips/UCC24612_2DBVR.tsx diff --git a/lib/chips/UCC24624DT.circuit.tsx b/lib/chips/UCC24624DT.tsx similarity index 100% rename from lib/chips/UCC24624DT.circuit.tsx rename to lib/chips/UCC24624DT.tsx diff --git a/lib/chips/UCC24630DBVT.circuit.tsx b/lib/chips/UCC24630DBVT.tsx similarity index 100% rename from lib/chips/UCC24630DBVT.circuit.tsx rename to lib/chips/UCC24630DBVT.tsx diff --git a/lib/chips/UCC24636DBVR.circuit.tsx b/lib/chips/UCC24636DBVR.tsx similarity index 100% rename from lib/chips/UCC24636DBVR.circuit.tsx rename to lib/chips/UCC24636DBVR.tsx diff --git a/lib/chips/UCC25600DR.circuit.tsx b/lib/chips/UCC25600DR.tsx similarity index 100% rename from lib/chips/UCC25600DR.circuit.tsx rename to lib/chips/UCC25600DR.tsx diff --git a/lib/chips/UCC256610DDBR.circuit.tsx b/lib/chips/UCC256610DDBR.tsx similarity index 100% rename from lib/chips/UCC256610DDBR.circuit.tsx rename to lib/chips/UCC256610DDBR.tsx diff --git a/lib/chips/UCC25800AQDGNRQ1.circuit.tsx b/lib/chips/UCC25800AQDGNRQ1.tsx similarity index 100% rename from lib/chips/UCC25800AQDGNRQ1.circuit.tsx rename to lib/chips/UCC25800AQDGNRQ1.tsx diff --git a/lib/chips/UCC27201ADDAR.circuit.tsx b/lib/chips/UCC27201ADDAR.tsx similarity index 100% rename from lib/chips/UCC27201ADDAR.circuit.tsx rename to lib/chips/UCC27201ADDAR.tsx diff --git a/lib/chips/UCC27211DR.circuit.tsx b/lib/chips/UCC27211DR.tsx similarity index 100% rename from lib/chips/UCC27211DR.circuit.tsx rename to lib/chips/UCC27211DR.tsx diff --git a/lib/chips/UCC27301ADR.circuit.tsx b/lib/chips/UCC27301ADR.tsx similarity index 100% rename from lib/chips/UCC27301ADR.circuit.tsx rename to lib/chips/UCC27301ADR.tsx diff --git a/lib/chips/UCC27302ADRCR.circuit.tsx b/lib/chips/UCC27302ADRCR.tsx similarity index 100% rename from lib/chips/UCC27302ADRCR.circuit.tsx rename to lib/chips/UCC27302ADRCR.tsx diff --git a/lib/chips/UCC27332QDGNRQ1.circuit.tsx b/lib/chips/UCC27332QDGNRQ1.tsx similarity index 100% rename from lib/chips/UCC27332QDGNRQ1.circuit.tsx rename to lib/chips/UCC27332QDGNRQ1.tsx diff --git a/lib/chips/UCC27444DR.circuit.tsx b/lib/chips/UCC27444DR.tsx similarity index 100% rename from lib/chips/UCC27444DR.circuit.tsx rename to lib/chips/UCC27444DR.tsx diff --git a/lib/chips/UCC27511ADBVT.circuit.tsx b/lib/chips/UCC27511ADBVT.tsx similarity index 100% rename from lib/chips/UCC27511ADBVT.circuit.tsx rename to lib/chips/UCC27511ADBVT.tsx diff --git a/lib/chips/UCC27517ADBVR.circuit.tsx b/lib/chips/UCC27517ADBVR.tsx similarity index 100% rename from lib/chips/UCC27517ADBVR.circuit.tsx rename to lib/chips/UCC27517ADBVR.tsx diff --git a/lib/chips/UCC27523D.circuit.tsx b/lib/chips/UCC27523D.tsx similarity index 100% rename from lib/chips/UCC27523D.circuit.tsx rename to lib/chips/UCC27523D.tsx diff --git a/lib/chips/UCC27614DR.circuit.tsx b/lib/chips/UCC27614DR.tsx similarity index 100% rename from lib/chips/UCC27614DR.circuit.tsx rename to lib/chips/UCC27614DR.tsx diff --git a/lib/chips/UCC27624DSDR.circuit.tsx b/lib/chips/UCC27624DSDR.tsx similarity index 100% rename from lib/chips/UCC27624DSDR.circuit.tsx rename to lib/chips/UCC27624DSDR.tsx diff --git a/lib/chips/UCC27734DR.circuit.tsx b/lib/chips/UCC27734DR.tsx similarity index 100% rename from lib/chips/UCC27734DR.circuit.tsx rename to lib/chips/UCC27734DR.tsx diff --git a/lib/chips/UCC27735DR.circuit.tsx b/lib/chips/UCC27735DR.tsx similarity index 100% rename from lib/chips/UCC27735DR.circuit.tsx rename to lib/chips/UCC27735DR.tsx diff --git a/lib/chips/UCC28019ADR.circuit.tsx b/lib/chips/UCC28019ADR.tsx similarity index 100% rename from lib/chips/UCC28019ADR.circuit.tsx rename to lib/chips/UCC28019ADR.tsx diff --git a/lib/chips/UCC2803DTR.circuit.tsx b/lib/chips/UCC2803DTR.tsx similarity index 100% rename from lib/chips/UCC2803DTR.circuit.tsx rename to lib/chips/UCC2803DTR.tsx diff --git a/lib/chips/UCC28051DR.circuit.tsx b/lib/chips/UCC28051DR.tsx similarity index 100% rename from lib/chips/UCC28051DR.circuit.tsx rename to lib/chips/UCC28051DR.tsx diff --git a/lib/chips/UCC28056BDBVR.circuit.tsx b/lib/chips/UCC28056BDBVR.tsx similarity index 100% rename from lib/chips/UCC28056BDBVR.circuit.tsx rename to lib/chips/UCC28056BDBVR.tsx diff --git a/lib/chips/UCC2805DTR.circuit.tsx b/lib/chips/UCC2805DTR.tsx similarity index 100% rename from lib/chips/UCC2805DTR.circuit.tsx rename to lib/chips/UCC2805DTR.tsx diff --git a/lib/chips/UCC28070PWR.circuit.tsx b/lib/chips/UCC28070PWR.tsx similarity index 100% rename from lib/chips/UCC28070PWR.circuit.tsx rename to lib/chips/UCC28070PWR.tsx diff --git a/lib/chips/UCC28070QPWRQ1.circuit.tsx b/lib/chips/UCC28070QPWRQ1.tsx similarity index 100% rename from lib/chips/UCC28070QPWRQ1.circuit.tsx rename to lib/chips/UCC28070QPWRQ1.tsx diff --git a/lib/chips/UCC28180DR.circuit.tsx b/lib/chips/UCC28180DR.tsx similarity index 100% rename from lib/chips/UCC28180DR.circuit.tsx rename to lib/chips/UCC28180DR.tsx diff --git a/lib/chips/UCC28600DR.circuit.tsx b/lib/chips/UCC28600DR.tsx similarity index 100% rename from lib/chips/UCC28600DR.circuit.tsx rename to lib/chips/UCC28600DR.tsx diff --git a/lib/chips/UCC28700DBVT.circuit.tsx b/lib/chips/UCC28700DBVT.tsx similarity index 100% rename from lib/chips/UCC28700DBVT.circuit.tsx rename to lib/chips/UCC28700DBVT.tsx diff --git a/lib/chips/UCC28711DR.circuit.tsx b/lib/chips/UCC28711DR.tsx similarity index 100% rename from lib/chips/UCC28711DR.circuit.tsx rename to lib/chips/UCC28711DR.tsx diff --git a/lib/chips/UCC28740DR.circuit.tsx b/lib/chips/UCC28740DR.tsx similarity index 100% rename from lib/chips/UCC28740DR.circuit.tsx rename to lib/chips/UCC28740DR.tsx diff --git a/lib/chips/UCC287501DBVR.circuit.tsx b/lib/chips/UCC287501DBVR.tsx similarity index 100% rename from lib/chips/UCC287501DBVR.circuit.tsx rename to lib/chips/UCC287501DBVR.tsx diff --git a/lib/chips/UCC28881D.circuit.tsx b/lib/chips/UCC28881D.tsx similarity index 100% rename from lib/chips/UCC28881D.circuit.tsx rename to lib/chips/UCC28881D.tsx diff --git a/lib/chips/UCC28910DR.circuit.tsx b/lib/chips/UCC28910DR.tsx similarity index 100% rename from lib/chips/UCC28910DR.circuit.tsx rename to lib/chips/UCC28910DR.tsx diff --git a/lib/chips/UCC28911DR.circuit.tsx b/lib/chips/UCC28911DR.tsx similarity index 100% rename from lib/chips/UCC28911DR.circuit.tsx rename to lib/chips/UCC28911DR.tsx diff --git a/lib/chips/UCC28950PWR.circuit.tsx b/lib/chips/UCC28950PWR.tsx similarity index 100% rename from lib/chips/UCC28950PWR.circuit.tsx rename to lib/chips/UCC28950PWR.tsx diff --git a/lib/chips/UCC28C50DGKR.circuit.tsx b/lib/chips/UCC28C50DGKR.tsx similarity index 100% rename from lib/chips/UCC28C50DGKR.circuit.tsx rename to lib/chips/UCC28C50DGKR.tsx diff --git a/lib/chips/UCC28C52DR.circuit.tsx b/lib/chips/UCC28C52DR.tsx similarity index 100% rename from lib/chips/UCC28C52DR.circuit.tsx rename to lib/chips/UCC28C52DR.tsx diff --git a/lib/chips/UCC28C53DR.circuit.tsx b/lib/chips/UCC28C53DR.tsx similarity index 100% rename from lib/chips/UCC28C53DR.circuit.tsx rename to lib/chips/UCC28C53DR.tsx diff --git a/lib/chips/UCC28C54DR.circuit.tsx b/lib/chips/UCC28C54DR.tsx similarity index 100% rename from lib/chips/UCC28C54DR.circuit.tsx rename to lib/chips/UCC28C54DR.tsx diff --git a/lib/chips/UCC28C55DR.circuit.tsx b/lib/chips/UCC28C55DR.tsx similarity index 100% rename from lib/chips/UCC28C55DR.circuit.tsx rename to lib/chips/UCC28C55DR.tsx diff --git a/lib/chips/UCC29950DR.circuit.tsx b/lib/chips/UCC29950DR.tsx similarity index 100% rename from lib/chips/UCC29950DR.circuit.tsx rename to lib/chips/UCC29950DR.tsx diff --git a/lib/chips/UCC33420QRAQRQ1.circuit.tsx b/lib/chips/UCC33420QRAQRQ1.tsx similarity index 100% rename from lib/chips/UCC33420QRAQRQ1.circuit.tsx rename to lib/chips/UCC33420QRAQRQ1.tsx diff --git a/lib/chips/UCC33420RAQR.circuit.tsx b/lib/chips/UCC33420RAQR.tsx similarity index 100% rename from lib/chips/UCC33420RAQR.circuit.tsx rename to lib/chips/UCC33420RAQR.tsx diff --git a/lib/chips/UCC38C42DR.circuit.tsx b/lib/chips/UCC38C42DR.tsx similarity index 100% rename from lib/chips/UCC38C42DR.circuit.tsx rename to lib/chips/UCC38C42DR.tsx diff --git a/lib/chips/UCC38C43DR.circuit.tsx b/lib/chips/UCC38C43DR.tsx similarity index 100% rename from lib/chips/UCC38C43DR.circuit.tsx rename to lib/chips/UCC38C43DR.tsx diff --git a/lib/chips/UCC38C45DR.circuit.tsx b/lib/chips/UCC38C45DR.tsx similarity index 100% rename from lib/chips/UCC38C45DR.circuit.tsx rename to lib/chips/UCC38C45DR.tsx diff --git a/lib/chips/UCC5320ECDR.circuit.tsx b/lib/chips/UCC5320ECDR.tsx similarity index 100% rename from lib/chips/UCC5320ECDR.circuit.tsx rename to lib/chips/UCC5320ECDR.tsx diff --git a/lib/chips/UCC5350SBDR.circuit.tsx b/lib/chips/UCC5350SBDR.tsx similarity index 100% rename from lib/chips/UCC5350SBDR.circuit.tsx rename to lib/chips/UCC5350SBDR.tsx diff --git a/lib/chips/UCC5390ECDWVR.circuit.tsx b/lib/chips/UCC5390ECDWVR.tsx similarity index 100% rename from lib/chips/UCC5390ECDWVR.circuit.tsx rename to lib/chips/UCC5390ECDWVR.tsx diff --git a/lib/chips/UCC57108CDR.circuit.tsx b/lib/chips/UCC57108CDR.tsx similarity index 100% rename from lib/chips/UCC57108CDR.circuit.tsx rename to lib/chips/UCC57108CDR.tsx diff --git a/lib/chips/UCD3138ARGCR.circuit.tsx b/lib/chips/UCD3138ARGCR.tsx similarity index 100% rename from lib/chips/UCD3138ARGCR.circuit.tsx rename to lib/chips/UCD3138ARGCR.tsx diff --git a/lib/chips/UCD7138DRSR.circuit.tsx b/lib/chips/UCD7138DRSR.tsx similarity index 100% rename from lib/chips/UCD7138DRSR.circuit.tsx rename to lib/chips/UCD7138DRSR.tsx diff --git a/lib/chips/UCD90160RGCT.circuit.tsx b/lib/chips/UCD90160RGCT.tsx similarity index 100% rename from lib/chips/UCD90160RGCT.circuit.tsx rename to lib/chips/UCD90160RGCT.tsx diff --git a/lib/chips/UCG28828_1REZR.circuit.tsx b/lib/chips/UCG28828_1REZR.tsx similarity index 100% rename from lib/chips/UCG28828_1REZR.circuit.tsx rename to lib/chips/UCG28828_1REZR.tsx diff --git a/lib/chips/ULN2003AIDR.circuit.tsx b/lib/chips/ULN2003AIDR.tsx similarity index 100% rename from lib/chips/ULN2003AIDR.circuit.tsx rename to lib/chips/ULN2003AIDR.tsx diff --git a/lib/chips/ULN2803CDWR.circuit.tsx b/lib/chips/ULN2803CDWR.tsx similarity index 100% rename from lib/chips/ULN2803CDWR.circuit.tsx rename to lib/chips/ULN2803CDWR.tsx diff --git a/lib/chips/W25Q128JVSIQ.circuit.tsx b/lib/chips/W25Q128JVSIQ.tsx similarity index 100% rename from lib/chips/W25Q128JVSIQ.circuit.tsx rename to lib/chips/W25Q128JVSIQ.tsx diff --git a/lib/chips/XI6432BAFCLIMBBR.circuit.tsx b/lib/chips/XI6432BAFCLIMBBR.tsx similarity index 100% rename from lib/chips/XI6432BAFCLIMBBR.circuit.tsx rename to lib/chips/XI6432BAFCLIMBBR.tsx diff --git a/lib/chips/XM33C321ASPZR.circuit.tsx b/lib/chips/XM33C321ASPZR.tsx similarity index 100% rename from lib/chips/XM33C321ASPZR.circuit.tsx rename to lib/chips/XM33C321ASPZR.tsx diff --git a/lib/chips/XMSPM0G1218SRGZR.circuit.tsx b/lib/chips/XMSPM0G1218SRGZR.tsx similarity index 100% rename from lib/chips/XMSPM0G1218SRGZR.circuit.tsx rename to lib/chips/XMSPM0G1218SRGZR.tsx diff --git a/lib/chips/XTR200DQCR.circuit.tsx b/lib/chips/XTR200DQCR.tsx similarity index 100% rename from lib/chips/XTR200DQCR.circuit.tsx rename to lib/chips/XTR200DQCR.tsx diff --git a/lib/chips/index.tsx b/lib/chips/index.tsx index 3cada2f4..bd1d4f6c 100644 --- a/lib/chips/index.tsx +++ b/lib/chips/index.tsx @@ -1,67 +1,67 @@ -export { AM62L32 } from "./AM62L32.circuit.tsx"; -export { BQ24072 } from "./BQ24072.circuit.tsx"; -export { BQ24073 } from "./BQ24073.circuit.tsx"; -export { BQ24074 } from "./BQ24074.circuit.tsx"; -export { BQ25895 } from "./BQ25895.circuit.tsx"; -export { BQ27441G1 } from "./BQ27441G1.circuit.tsx"; -export { BQ32002 } from "./BQ32002.circuit.tsx"; -export { CC2340R5 } from "./CC2340R5.circuit.tsx"; -export { CC2564C } from "./CC2564C.circuit.tsx"; -export { CC2745R10 } from "./CC2745R10.circuit.tsx"; -export { CC3235SF } from "./CC3235SF.circuit.tsx"; -export { DRV8833 } from "./DRV8833.circuit.tsx"; -export { DRV8876 } from "./DRV8876.circuit.tsx"; -export { HDC2080 } from "./HDC2080.circuit.tsx"; -export { HDC3020 } from "./HDC3020.circuit.tsx"; -export { HDC3022 } from "./HDC3022.circuit.tsx"; -export { INA237 } from "./INA237.circuit.tsx"; -export { MSP430G2230ID } from "./MSP430G2230ID.circuit.tsx"; -export { MSP430F5229 } from "./MSP430F5229.circuit.tsx"; -export { MSPM33C3x } from "./MSPM33C3x.circuit.tsx"; -export { MSPM0G3507 } from "./MSPM0G3507.circuit.tsx"; -export { TAS2505 } from "./TAS2505.circuit.tsx"; -export { TLC59116 } from "./TLC59116.circuit.tsx"; -export { TLV755P } from "./TLV755P.circuit.tsx"; -export { TMP1827 } from "./TMP1827.circuit.tsx"; -export { TMP1075 } from "./TMP1075.circuit.tsx"; -export { TPS22919 } from "./TPS22919.circuit.tsx"; -export { TPS6293 } from "./TPS6293.circuit.tsx"; -export { TPS61299X } from "./TPS61299X.circuit.tsx"; -export { TPS61222 } from "./TPS61222.circuit.tsx"; -export { TPS6521835 } from "./TPS6521835.circuit.tsx"; -export { TPS63802 } from "./TPS63802.circuit.tsx"; -export { TRF7960RHB } from "./TRF7960RHB.circuit.tsx"; -export { TPS7A02 } from "./TPS7A02.circuit.tsx"; -export { TPS7A20 } from "./TPS7A20.circuit.tsx"; -export { TPSM82823 } from "./TPSM82823.circuit.tsx"; -export { TXB0104 } from "./TXB0104.circuit.tsx"; -export { TXS0102 } from "./TXS0102.circuit.tsx"; +export { AM62L32 } from "./AM62L32.tsx"; +export { BQ24072 } from "./BQ24072.tsx"; +export { BQ24073 } from "./BQ24073.tsx"; +export { BQ24074 } from "./BQ24074.tsx"; +export { BQ25895 } from "./BQ25895.tsx"; +export { BQ27441G1 } from "./BQ27441G1.tsx"; +export { BQ32002 } from "./BQ32002.tsx"; +export { CC2340R5 } from "./CC2340R5.tsx"; +export { CC2564C } from "./CC2564C.tsx"; +export { CC2745R10 } from "./CC2745R10.tsx"; +export { CC3235SF } from "./CC3235SF.tsx"; +export { DRV8833 } from "./DRV8833.tsx"; +export { DRV8876 } from "./DRV8876.tsx"; +export { HDC2080 } from "./HDC2080.tsx"; +export { HDC3020 } from "./HDC3020.tsx"; +export { HDC3022 } from "./HDC3022.tsx"; +export { INA237 } from "./INA237.tsx"; +export { MSP430G2230ID } from "./MSP430G2230ID.tsx"; +export { MSP430F5229 } from "./MSP430F5229.tsx"; +export { MSPM33C3x } from "./MSPM33C3x.tsx"; +export { MSPM0G3507 } from "./MSPM0G3507.tsx"; +export { TAS2505 } from "./TAS2505.tsx"; +export { TLC59116 } from "./TLC59116.tsx"; +export { TLV755P } from "./TLV755P.tsx"; +export { TMP1827 } from "./TMP1827.tsx"; +export { TMP1075 } from "./TMP1075.tsx"; +export { TPS22919 } from "./TPS22919.tsx"; +export { TPS6293 } from "./TPS6293.tsx"; +export { TPS61299X } from "./TPS61299X.tsx"; +export { TPS61222 } from "./TPS61222.tsx"; +export { TPS6521835 } from "./TPS6521835.tsx"; +export { TPS63802 } from "./TPS63802.tsx"; +export { TRF7960RHB } from "./TRF7960RHB.tsx"; +export { TPS7A02 } from "./TPS7A02.tsx"; +export { TPS7A20 } from "./TPS7A20.tsx"; +export { TPSM82823 } from "./TPSM82823.tsx"; +export { TXB0104 } from "./TXB0104.tsx"; +export { TXS0102 } from "./TXS0102.tsx"; -export { AM62L32BOGHAANBR } from "./AM62L32BOGHAANBR.circuit.tsx"; -export { BQ24072RGTR } from "./BQ24072RGTR.circuit.tsx"; -export { BQ24073RGTR } from "./BQ24073RGTR.circuit.tsx"; -export { BQ24074RGTR } from "./BQ24074RGTR.circuit.tsx"; -export { BQ25895RTWR } from "./BQ25895RTWR.circuit.tsx"; -export { BQ27441DRZR_G1B } from "./BQ27441DRZR_G1B.circuit.tsx"; -export { CC2745R10E0WRHARQ1 } from "./CC2745R10E0WRHARQ1.circuit.tsx"; -export { CC3235SF12RGKR } from "./CC3235SF12RGKR.circuit.tsx"; -export { HDC2080DMBR } from "./HDC2080DMBR.circuit.tsx"; -export { HDC3020DEFR } from "./HDC3020DEFR.circuit.tsx"; -export { HDC3022DEJR } from "./HDC3022DEJR.circuit.tsx"; -export { INA237AQDGSRQ1 } from "./INA237AQDGSRQ1.circuit.tsx"; -export { MSP430F5229IRGCR } from "./MSP430F5229IRGCR.circuit.tsx"; -export { MSPM0G3507SPMR } from "./MSPM0G3507SPMR.circuit.tsx"; -export { TLC59116IPWR } from "./TLC59116IPWR.circuit.tsx"; -export { TMP1075DSGR } from "./TMP1075DSGR.circuit.tsx"; -export { TPS61222DCKR } from "./TPS61222DCKR.circuit.tsx"; -export { W25Q128JVSIQ } from "./W25Q128JVSIQ.circuit.tsx"; -export { TPS63802DLAR } from "./TPS63802DLAR.circuit.tsx"; -export { TPS7A0230PDBVR } from "./TPS7A0230PDBVR.circuit.tsx"; -export { TPS7A2018PDBVR } from "./TPS7A2018PDBVR.circuit.tsx"; -export { TPS7A2028PDBVR } from "./TPS7A2028PDBVR.circuit.tsx"; -export { TPS7A2033PDBVR } from "./TPS7A2033PDBVR.circuit.tsx"; -export { TLV75533PDBVR } from "./TLV75533PDBVR.circuit.tsx"; -export { TXB0104RGYR } from "./TXB0104RGYR.circuit.tsx"; -export { TXS0102DCUR } from "./TXS0102DCUR.circuit.tsx"; +export { AM62L32BOGHAANBR } from "./AM62L32BOGHAANBR.tsx"; +export { BQ24072RGTR } from "./BQ24072RGTR.tsx"; +export { BQ24073RGTR } from "./BQ24073RGTR.tsx"; +export { BQ24074RGTR } from "./BQ24074RGTR.tsx"; +export { BQ25895RTWR } from "./BQ25895RTWR.tsx"; +export { BQ27441DRZR_G1B } from "./BQ27441DRZR_G1B.tsx"; +export { CC2745R10E0WRHARQ1 } from "./CC2745R10E0WRHARQ1.tsx"; +export { CC3235SF12RGKR } from "./CC3235SF12RGKR.tsx"; +export { HDC2080DMBR } from "./HDC2080DMBR.tsx"; +export { HDC3020DEFR } from "./HDC3020DEFR.tsx"; +export { HDC3022DEJR } from "./HDC3022DEJR.tsx"; +export { INA237AQDGSRQ1 } from "./INA237AQDGSRQ1.tsx"; +export { MSP430F5229IRGCR } from "./MSP430F5229IRGCR.tsx"; +export { MSPM0G3507SPMR } from "./MSPM0G3507SPMR.tsx"; +export { TLC59116IPWR } from "./TLC59116IPWR.tsx"; +export { TMP1075DSGR } from "./TMP1075DSGR.tsx"; +export { TPS61222DCKR } from "./TPS61222DCKR.tsx"; +export { W25Q128JVSIQ } from "./W25Q128JVSIQ.tsx"; +export { TPS63802DLAR } from "./TPS63802DLAR.tsx"; +export { TPS7A0230PDBVR } from "./TPS7A0230PDBVR.tsx"; +export { TPS7A2018PDBVR } from "./TPS7A2018PDBVR.tsx"; +export { TPS7A2028PDBVR } from "./TPS7A2028PDBVR.tsx"; +export { TPS7A2033PDBVR } from "./TPS7A2033PDBVR.tsx"; +export { TLV75533PDBVR } from "./TLV75533PDBVR.tsx"; +export { TXB0104RGYR } from "./TXB0104RGYR.tsx"; +export { TXS0102DCUR } from "./TXS0102DCUR.tsx"; export * from "./ti-sysblocks-components.tsx"; diff --git a/lib/chips/ti-official-footprint-catalog.json b/lib/chips/ti-official-footprint-catalog.json deleted file mode 100644 index d2228af0..00000000 --- a/lib/chips/ti-official-footprint-catalog.json +++ /dev/null @@ -1,2122 +0,0 @@ -{ - "schemaVersion": 1, - "matchingRule": "Consume a footprint only when the target's audited exact TI drawing ID equals the drawing key. Never fall back to packageCode or pinCount.", - "coverage": { - "unmatchedTargets": 44, - "sourceReadyTargets": 44, - "unsupportedTargets": 0, - "supplementalTargetPinMaps": 18, - "uniqueDrawings": 38, - "sourceReadyDrawings": 38, - "unsupportedDrawings": 0 - }, - "drawings": { - "ABC0760A": { - "drawingId": "ABC0760A", - "status": "source-ready", - "manufacturerPartNumbers": ["AM5726BABCXA"], - "families": ["AM5726"], - "footprintPropSource": null, - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - "R", - "T", - "U", - "V", - "W", - "Y", - "AA", - "AB", - "AC", - "AD", - "AE", - "AF", - "AG", - "AH" - ], - "columnOrder": [ - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 25, 26, 27, 28 - ], - "pitchMm": 0.8, - "padShape": "circle", - "padDiameterMm": 0.4 - }, - "officialSourceUrl": "https://www.ti.com/lit/gpn/AM5726", - "officialSourcePages": [414, 415, 416], - "physicalPadToPortHint": {}, - "validationNotes": [ - "TI ABC0760A Example Board Layout: populated balls only on the official 28-row by 28-column coordinate system, 0.8 mm pitch, with 0.4 mm circular copper lands.", - "JEDEC row lettering intentionally skips I, O, Q, S, and X. Coordinate aliases are sorted in the declared physical order to produce deterministic pinN assignments." - ] - }, - "AMW0594A": { - "drawingId": "AMW0594A", - "status": "source-ready", - "manufacturerPartNumbers": ["AM67A74AKGHIAMWR"], - "families": ["AM67A"], - "footprintPropSource": null, - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - "R", - "T", - "U", - "V", - "W", - "Y", - "AA", - "AB", - "AC", - "AD", - "AE", - "AF", - "AG" - ], - "columnOrder": [ - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 25, 26, 27 - ], - "pitchMm": 0.65, - "padShape": "circle", - "padDiameterMm": 0.35 - }, - "officialSourceUrl": "https://www.ti.com/lit/gpn/AM67A", - "officialSourcePages": [244, 245, 246], - "physicalPadToPortHint": {}, - "validationNotes": [ - "TI AMW0594A Example Board Layout: populated balls only on the official 27-row by 27-column coordinate system, 0.65 mm pitch, with 0.35 mm circular copper lands." - ] - }, - "AMY0101A": { - "drawingId": "AMY0101A", - "status": "source-ready", - "manufacturerPartNumbers": ["IWRL6432BRQAAMYR"], - "families": ["IWRL6432AOP"], - "footprintPropSource": null, - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N" - ], - "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], - "rowPitchMm": 0.5, - "columnPositionsMm": { - "1": -5.125, - "2": -4.625, - "3": -4.125, - "4": -3.625, - "5": -3.125, - "6": 3.125, - "7": 3.625, - "8": 4.125, - "9": 4.625, - "10": 5.125 - }, - "padShape": "circle", - "padDiameterMm": 0.25 - }, - "officialSourceUrl": "https://www.ti.com/lit/gpn/IWRL6432AOP", - "officialSourcePages": [72, 73, 74], - "physicalPadToPortHint": {}, - "validationNotes": [ - "TI AMY0101A Example Board Layout is on pages 72-74 of the current IWRL6432AOP datasheet: 101 populated 0.25 mm lands, 0.5 mm pitch within each left/right block, and the official antenna-array center gap.", - "The earlier enriched page metadata pointed to pages 67-68 and truncated the A revision; both are corrected here." - ] - }, - "DCA0048B": { - "drawingId": "DCA0048B", - "status": "source-ready", - "manufacturerPartNumbers": ["O3853QDCARQ1"], - "families": ["TPS653853-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS653853-Q1", - "officialSourcePages": [10], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "validationNotes": [ - "TI DCA0048B-C01 Example Board Layout: 48 x 1.5 mm by 0.3 mm, 0.5 mm pitch, 7.5 mm row span; exposed pad opening is 2.73 mm by 4.69 mm.", - "Optional thermal vias and solder-mask-covered copper outside the exposed pad are intentionally omitted from the component footprint." - ] - }, - "DEH0008A": { - "drawingId": "DEH0008A", - "status": "source-ready", - "manufacturerPartNumbers": ["HDC3021QDEHRQ1"], - "families": ["HDC3021-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/HDC3021-Q1", - "officialSourcePages": [44], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9" - }, - "validationNotes": [ - "TI DEH0008A-C01 Example Board Layout: eight 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 2.3 mm row span, and 1.2 mm by 1.9 mm exposed pad 9." - ] - }, - "DGS0032A": { - "drawingId": "DGS0032A", - "status": "source-ready", - "manufacturerPartNumbers": ["TXE8124DGSR"], - "families": ["TXE8124"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TXE8124", - "officialSourcePages": [63], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32" - }, - "validationNotes": [ - "TI DGS0032A Example Board Layout: 32 x 1.45 mm by 0.3 mm pads, 0.5 mm pitch, 4.4 mm row span." - ] - }, - "DLF0006B": { - "drawingId": "DLF0006B", - "status": "source-ready", - "manufacturerPartNumbers": ["LMK6DA10000ADLFR"], - "families": ["LMK6D"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/LMK6D", - "officialSourcePages": [64], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6" - }, - "validationNotes": [ - "Current LMK6D datasheet shows DLF0006B (not enriched-image DLF0006A): six 0.9 mm by 0.4 mm pads on the dedicated land pattern.", - "The dedicated DLF0006B pattern is used instead of the wider universal land-pattern alternative on the same page." - ] - }, - "DPL0002A": { - "drawingId": "DPL0002A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPD1E0B04DPLT"], - "families": ["TPD1E0B04"], - "footprintPropSource": "footprint=\"0201\"", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPD1E0B04", - "officialSourcePages": [], - "physicalPadToPortHint": {}, - "validationNotes": [ - "The current TPD1E0B04 datasheet omits the DPL land-pattern page, but TI identifies DPL as the 0.6 mm by 0.3 mm 0201/X2SON package. The user-authorized visual/package-family fallback is tscircuit's 0201 footprint.", - "This entry is explicitly a package-family fallback, not a claim that an exact TI DPL0002A Example Board Layout was available." - ] - }, - "DRR0012G": { - "drawingId": "DRR0012G", - "status": "source-ready", - "manufacturerPartNumbers": ["TLC69699DRRR"], - "families": ["TLC69699"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TLC69699", - "officialSourcePages": [22], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "Exposed Pad": "pin13" - }, - "validationNotes": [ - "TI DRR0012G Example Board Layout: twelve 0.62 mm by 0.25 mm pads, 0.5 mm pitch, 2.78 mm row span, and 1.3 mm by 2.5 mm exposed pad 13." - ] - }, - "FQD-2510852": { - "drawingId": "FQD-2510852", - "status": "source-ready", - "manufacturerPartNumbers": ["DLP4500AFQD"], - "families": ["DLP4500"], - "footprintPropSource": null, - "coordinateGrid": { - "rowOrder": ["A", "B", "C", "D", "E", "F", "G", "H", "J", "K"], - "columnOrder": [1, 2, 3, 4, 5, 18, 19, 20, 21, 22], - "rowAxis": "x", - "rowPitchMm": 0.742, - "columnPositionsMm": { - "1": -6.307, - "2": -5.565, - "3": -4.823, - "4": -4.081, - "5": -3.339, - "18": 3.339, - "19": 4.081, - "20": 4.823, - "21": 5.565, - "22": 6.307 - }, - "padShape": "rect", - "padWidthMm": 0.6, - "padHeightMm": 0.6 - }, - "officialSourceUrl": "https://www.ti.com/lit/gpn/DLP4500", - "officialSourcePages": [50, 51, 52], - "physicalPadToPortHint": {}, - "validationNotes": [ - "TI DLP4500 mechanical ICD 2510852 defines 80 LGA terminals plus 18 test pads: 98 populated 0.6 mm square lands on a 0.742 mm coordinate pitch.", - "Only aliases present in TI's official 98-position pin table are emitted; unpopulated K5 and K18 are intentionally absent.", - "This is the exact custom optical-package copper map; optical alignment, window, keepout, and assembly constraints remain governed by ICD 2510852." - ] - }, - "MBB0030A": { - "drawingId": "MBB0030A", - "status": "source-ready", - "manufacturerPartNumbers": ["XI6432BAFCLIMBBR"], - "families": ["IWRL6432WMOD"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/IWRL6432WMOD", - "officialSourcePages": [30, 31, 32], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30" - }, - "validationNotes": [ - "TI MBB0030A Example Board Layout transcribed pad-by-pad: 30 square 0.7 mm lands across four asymmetric columns at x = -5.7, -1.9, 1.9, and 5.7 mm.", - "The official 3.4 mm row pitch and all omitted inner-column positions are preserved; no generic module grid is substituted." - ] - }, - "MHA0024A": { - "drawingId": "MHA0024A", - "status": "source-ready", - "manufacturerPartNumbers": ["CC2340R5MODAN0MHAR"], - "families": ["CC2340R5MODA"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/CC2340R5MODA", - "officialSourcePages": [64], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24" - }, - "validationNotes": [ - "TI MHA0024A Example Board Layout was transcribed explicitly: left pins 1-9 at 1 mm pitch, bottom pins 10-15 at 1 mm pitch, and right pins 16-24 at 1 mm pitch.", - "All 24 copper lands are 1.1 mm by 0.6 mm. The asymmetric y coordinates preserve TI's antenna-side clearance." - ] - }, - "MOZ0065A": { - "drawingId": "MOZ0065A", - "status": "source-ready", - "manufacturerPartNumbers": [ - "CC3300MODENIAMOZR", - "CC3301MODENIAMOZR", - "CC3350MODENIAMOZR", - "CC3351MODENIAMOZR" - ], - "families": ["CC3300MOD", "CC3301MOD", "CC3350MOD", "CC3351MOD"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/CC3300MOD", - "officialSourcePages": [32], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65" - }, - "validationNotes": [ - "TI MOZ0065A Example Board Layout transcribed explicitly: 56 perimeter lands with 0.65 mm regular pitch and 1.1 mm corner gaps, plus the offset 3 by 3 matrix of 1 mm square lands 57-65.", - "The four corner lands are 0.5 mm square; the remaining perimeter lands are 0.5 mm by 0.3 mm. The central matrix offsets are retained from the official package centerlines." - ] - }, - "PAP0064N": { - "drawingId": "PAP0064N", - "status": "source-ready", - "manufacturerPartNumbers": ["DRV3256EPAPRQ1"], - "families": ["DRV3256-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/DRV3256-Q1", - "officialSourcePages": [16], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "Exposed Pad": "pin65" - }, - "validationNotes": [ - "Current DRV3256-Q1 mechanical pages identify PAP0064N, not enriched-image PAP0064A.", - "TI PAP0064N Example Board Layout: 64 x 1.5 mm by 0.3 mm pads, 0.5 mm pitch, 11.4 mm spans, and a 5.3 mm square exposed opening." - ] - }, - "PHP0048L": { - "drawingId": "PHP0048L", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS92761QPHPRQ1"], - "families": ["TPS92761-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS92761-Q1", - "officialSourcePages": [9], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "validationNotes": [ - "TI PHP0048L Example Board Layout: 48 x 1.6 mm by 0.3 mm pads, 0.5 mm pitch, 8.5 mm spans, and 5 mm square exposed pad 49." - ] - }, - "PZ0100A": { - "drawingId": "PZ0100A", - "status": "source-ready", - "manufacturerPartNumbers": ["XM33C321ASPZR"], - "families": ["MSPM33C321A"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/MSPM33C321A", - "officialSourcePages": [111], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65", - "66": "pin66", - "67": "pin67", - "68": "pin68", - "69": "pin69", - "70": "pin70", - "71": "pin71", - "72": "pin72", - "73": "pin73", - "74": "pin74", - "75": "pin75", - "76": "pin76", - "77": "pin77", - "78": "pin78", - "79": "pin79", - "80": "pin80", - "81": "pin81", - "82": "pin82", - "83": "pin83", - "84": "pin84", - "85": "pin85", - "86": "pin86", - "87": "pin87", - "88": "pin88", - "89": "pin89", - "90": "pin90", - "91": "pin91", - "92": "pin92", - "93": "pin93", - "94": "pin94", - "95": "pin95", - "96": "pin96", - "97": "pin97", - "98": "pin98", - "99": "pin99", - "100": "pin100" - }, - "validationNotes": [ - "TI PZ0100A Example Board Layout: 100 x 1.5 mm by 0.3 mm pads, 0.5 mm pitch, 15.4 mm spans." - ] - }, - "RAA0004A": { - "drawingId": "RAA0004A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS22991CNRAAR"], - "families": ["TPS22991"], - "footprintPropSource": "footprint={\n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS22991", - "officialSourcePages": [26], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4" - }, - "validationNotes": [ - "TI RAA0004A Example Board Layout transcribed explicitly: four 0.475 mm by 0.2 mm pads, 0.675 mm x center span, and 0.4 mm y center span." - ] - }, - "RAH0036A": { - "drawingId": "RAH0036A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS6522430RAHRQ1"], - "families": ["TPS65224-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS65224-Q1", - "officialSourcePages": [11], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36" - }, - "validationNotes": [ - "TI RAH0036A Example Board Layout transcribed pad-by-pad: 32 nonuniform perimeter lands, four compound corner lands, and the shared central horizontal copper represented as two touching polygon regions for physical pins 5 and 23.", - "Optional thermal vias are omitted. Copper dimensions and polygon vertices were cross-checked against the TI-supplied package CAD preview; no uniform VQFN substitution is used." - ] - }, - "RDG0025A": { - "drawingId": "RDG0025A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPSM8A29RDGR"], - "families": ["TPSM8A29"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPSM8A29", - "officialSourcePages": [43], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25" - }, - "validationNotes": [ - "TI RDG0025A Example Board Layout transcribed as 20 nonuniform perimeter lands and five separately dimensioned central power lands.", - "Optional thermal vias are omitted. The exact centers and copper sizes were cross-checked against the TI-supplied package CAD preview." - ] - }, - "RDX0007A": { - "drawingId": "RDX0007A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPSM863252RDXR"], - "families": ["TPSM863252"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPSM863252", - "officialSourcePages": [29], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7" - }, - "validationNotes": [ - "TI RDX0007A QFN-FCMOD Example Board Layout transcribed with the two asymmetric upper polygon lands, two 1.5 mm by 2.3 mm power lands, and three 0.22 mm by 0.6 mm signal lands.", - "The central red region in the TI drawing is a copper keepout, not a terminal, and optional vias are intentionally omitted. Polygon vertices were cross-checked against the TI-supplied package CAD preview." - ] - }, - "REQ0038A": { - "drawingId": "REQ0038A", - "status": "source-ready", - "manufacturerPartNumbers": ["LMG3612REQR"], - "families": ["LMG3612"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/LMG3612", - "officialSourcePages": [26], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39" - }, - "validationNotes": [ - "TI REQ0038A Example Board Layout transcribed pad-by-pad: nonuniform 38-pad perimeter, asymmetric top/bottom groups, and 2.1 mm by 6.6 mm package pad 39 centered at x = 0.9 mm.", - "Optional 0.2 mm thermal vias shown inside pad 39 are intentionally omitted from the component footprint." - ] - }, - "REZ0012A": { - "drawingId": "REZ0012A", - "status": "source-ready", - "manufacturerPartNumbers": ["UCG28828-1REZR"], - "families": ["UCG28828"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/UCG28828", - "officialSourcePages": [41, 42], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12" - }, - "validationNotes": [ - "TI REZ0012A drawing 4230527/B was transcribed terminal-by-terminal: compound lower-left pin 1, five-finger upper-left pin 2, five conventional bottom lands 3-7, rounded corner land 8, right-side lands 9-11, and the exact top/right/central thermal polygon for pin 12.", - "Pin-12 polygon vertices were extracted from TI's vector Example Board Layout and normalized to the package centerline; pin-1/pin-2 detail shapes were mirrored into their physical package-outline positions. The special pin-8 land follows the official 0.55 mm by 0.575 mm envelope with R0.1 approximated by an eight-vertex chamfer.", - "Optional 0.2 mm thermal vias and solder-mask/paste geometry are intentionally omitted from the component copper footprint." - ] - }, - "RGY0024E": { - "drawingId": "RGY0024E", - "status": "source-ready", - "manufacturerPartNumbers": ["TXV0108QWRGYRQ1"], - "families": ["TXV0108-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TXV0108-Q1", - "officialSourcePages": [30], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "Thermal Pad": "pin25" - }, - "validationNotes": [ - "TI RGY0024E Example Board Layout transcribed explicitly: ten pads on each vertical side, two top pads, two bottom pads, and 2.1 mm by 4.1 mm thermal pad 25.", - "This corrects package-drawing PDF metadata that truncates the exact revision to RGY0024." - ] - }, - "RGZ0048M": { - "drawingId": "RGZ0048M", - "status": "source-ready", - "manufacturerPartNumbers": ["DRV8363QRGZRQ1"], - "families": ["DRV8363-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/DRV8363-Q1", - "officialSourcePages": [101], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "validationNotes": [ - "The selected automotive OPN DRV8363QRGZRQ1 is followed by RGZ0048M in the production package section; RGZ0048N belongs the catalog/preproduction section. The enriched image's RGZ0048P is not present in the current datasheet.", - "TI RGZ0048M Example Board Layout: 48 x 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 6.8 mm spans, and 5.6 mm square exposed pad 49." - ] - }, - "RHA0040T": { - "drawingId": "RHA0040T", - "status": "source-ready", - "manufacturerPartNumbers": ["CC2755P105E0WRHAR", "CC2755P207E0WRHAR"], - "families": ["CC2755P10", "CC2755P20"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/CC2755P10", - "officialSourcePages": [91], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41" - }, - "validationNotes": [ - "TI RHA0040T Example Board Layout: 40 x 0.6 mm by 0.25 mm pads, 0.5 mm pitch, 5.8 mm spans, and 4.7 mm square exposed pad 41." - ] - }, - "RPS0012A": { - "drawingId": "RPS0012A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS7A5301BRPSR"], - "families": ["TPS7A53B"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS7A53B", - "officialSourcePages": [41], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12" - }, - "validationNotes": [ - "TI RPS0012A Example Board Layout transcribed with the four exact L-shaped high-current corner lands and the eight individually dimensioned rectangular lands.", - "The L-pad polygon extents, 0.5 mm vertical pitch, and asymmetric pin-6/pin-12 lengths follow TI drawing 4224847/A; no uniform VQFN substitution is used." - ] - }, - "RSH0056G": { - "drawingId": "RSH0056G", - "status": "source-ready", - "manufacturerPartNumbers": ["CC3501ENJARSHR", "CC3551ENJARSHR"], - "families": ["CC3501E", "CC3551E"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/CC3501E", - "officialSourcePages": [60], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57" - }, - "validationNotes": [ - "TI RSH0056G Example Board Layout: 56 x 0.75 mm by 0.2 mm pads, 0.4 mm pitch, 6.65 mm spans, and 5.3 mm square exposed pad 57." - ] - }, - "RSN0032D": { - "drawingId": "RSN0032D", - "status": "source-ready", - "manufacturerPartNumbers": ["TLC69624QRSNRQ1", "TLC69634QRSNRQ1"], - "families": ["TLC69624-Q1", "TLC69634-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TLC69624-Q1", - "officialSourcePages": [18], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33" - }, - "validationNotes": [ - "TI RSN0032D Example Board Layout: 32 x 0.55 mm by 0.2 mm pads, 0.4 mm pitch, 3.85 mm spans, and 2.8 mm square exposed pad 33." - ] - }, - "RUG0010B": { - "drawingId": "RUG0010B", - "status": "source-ready", - "manufacturerPartNumbers": ["TLV9022L1RUGR"], - "families": ["TLV9022L"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TLV9022L", - "officialSourcePages": [35], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10" - }, - "validationNotes": [ - "TI RUG0010B X2QFN Example Board Layout transcribed explicitly. Side pads use 0.5 mm pitch and the two end pads are rotated 0.3 mm by 0.6 mm lands." - ] - }, - "RUV0036A": { - "drawingId": "RUV0036A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS24750RUVR"], - "families": ["TPS24750"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS24750", - "officialSourcePages": [44, 45, 46], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "Pad-1": "pin4", - "Pad-2": "pin5" - }, - "validationNotes": [ - "TI RUV0036A land-pattern data: 36 perimeter lands at 0.5 mm pitch, 6.8 mm by 3.3 mm outer spans, 0.24 mm tangential copper width, and two nonuniform 2.25 mm-high thermal lands.", - "Physical Pad-1 (drawing pad 37) is tied to GND and intentionally port-hinted to pin4; physical Pad-2 (drawing pad 38) is tied to DRAIN and intentionally port-hinted to pin5, matching the TPS24750 package notes.", - "Optional thermal vias and stencil segmentation are omitted from the component copper footprint." - ] - }, - "RVR0019A": { - "drawingId": "RVR0019A", - "status": "source-ready", - "manufacturerPartNumbers": ["LMG1210RVRR"], - "families": ["LMG1210"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/LMG1210", - "officialSourcePages": [24], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21" - }, - "validationNotes": [ - "TI RVR0019A Example Board Layout transcribed exactly: 19 perimeter lands, the intentional gaps in the top/bottom sequences, 1.2 mm by 1.7 mm thermal pad 20, and 0.75 mm by 1.7 mm thermal pad 21.", - "Although the package name counts 19 perimeter pins, the official LMG1210 pin table exposes thermal pads 20 and 21 as physical terminals; both are mapped to pin20 and pin21." - ] - }, - "VAF0024A": { - "drawingId": "VAF0024A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS6521401VAFR"], - "families": ["TPS65214"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS65214", - "officialSourcePages": [139], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24" - }, - "validationNotes": [ - "TI VAF0024A Example Board Layout transcribed with all four L-shaped corner lands, 18 conventional perimeter lands, and the central continuous PGND cross.", - "The continuous PGND copper is partitioned at its symmetry line into touching pin10 and pin22 polygon regions so both official physical terminals remain addressable by the schematic while preserving the TI copper envelope." - ] - }, - "VAH0011A": { - "drawingId": "VAH0011A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS1HC03PQVAHRQ1"], - "families": ["TPS1HC03-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS1HC03-Q1", - "officialSourcePages": [71], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "validationNotes": [ - "TI VAH0011A Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", - "VAH0011A's wider 0.8 mm side lands and 0.7 mm bottom lands are retained; it is not substituted with the B or C revision." - ] - }, - "VAH0011B": { - "drawingId": "VAH0011B", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS2HC16PQVAHRQ1"], - "families": ["TPS2HC16-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS2HC16-Q1", - "officialSourcePages": [72], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "validationNotes": [ - "TI VAH0011B Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", - "Copper vertices and centers were cross-checked against the TI-supplied VAH0011B CAD preview; optional vias are omitted." - ] - }, - "VAH0011C": { - "drawingId": "VAH0011C", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS2HC08PQVAHRQ1"], - "families": ["TPS2HC08-Q1"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/TPS2HC08-Q1", - "officialSourcePages": [74], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "validationNotes": [ - "TI VAH0011C Example Board Layout transcribed with compound high-current lands 1, 2, 5, 8, and 11 plus the six individually dimensioned signal lands.", - "The C revision's 0.7 mm outer side and bottom lands are retained and were cross-checked against the TI-supplied VAH0011C CAD preview; optional vias are omitted." - ] - }, - "YFF0012": { - "drawingId": "YFF0012", - "status": "source-ready", - "manufacturerPartNumbers": ["LM3644YFFR"], - "families": ["LM3644"], - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/LM3644", - "officialSourcePages": [40], - "physicalPadToPortHint": { - "A1": "pin1", - "A2": "pin2", - "A3": "pin3", - "B1": "pin4", - "B2": "pin5", - "B3": "pin6", - "C1": "pin7", - "C2": "pin8", - "C3": "pin9", - "D1": "pin10", - "D2": "pin11", - "D3": "pin12" - }, - "validationNotes": [ - "TI YFF0012 Example Board Layout: complete A-D by 1-3 DSBGA grid, 0.4 mm pitch, 0.23 mm circular copper lands.", - "Physical ball identifiers map row-major to the materializer's pin1-pin12 convention: A1-A3, B1-B3, C1-C3, D1-D3." - ] - }, - "YJK0003A": { - "drawingId": "YJK0003A", - "status": "source-ready", - "manufacturerPartNumbers": ["CSD18541F5T"], - "families": ["CSD18541F5"], - "footprintPropSource": "footprint={\n \n \n \n }", - "officialSourceUrl": "https://www.ti.com/lit/gpn/CSD18541F5", - "officialSourcePages": [14], - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3" - }, - "validationNotes": [ - "TI YJK0003A Example Board Layout: three 0.39 mm by 0.15 mm lands on 0.25 mm center spacing (0.5 mm pin-1 to pin-3 span)." - ] - }, - "ZCH0139A": { - "drawingId": "ZCH0139A", - "status": "source-ready", - "manufacturerPartNumbers": ["TPS65930A2ZCHR"], - "families": ["TPS65930"], - "footprintPropSource": null, - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P" - ], - "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14], - "pitchMm": 0.65, - "padShape": "circle", - "padDiameterMm": 0.35 - }, - "officialSourceUrl": "https://www.ti.com/packaging/tw/docs/searchproductbypackage.tsp?orderablePartNumber=&packageDesignator=ZCH&pinCount=139&results=results", - "officialSourcePages": [], - "physicalPadToPortHint": {}, - "validationNotes": [ - "TI's package database identifies ZCH as a 139-position, 10 mm by 10 mm NFBGA on 0.65 mm pitch. The official TPS65930 pin table supplies the exact 139 populated A-P/1-14 aliases.", - "Only populated aliases from the official pin table are rendered; the 14 by 14 bounding grid is not filled generically. The 0.35 mm circular land is cross-checked against the TI-supplied ZCH139 CAD preview." - ] - } - }, - "targets": { - "AM5726BABCXA": { - "drawingId": "ABC0760A", - "status": "source-ready" - }, - "AM67A74AKGHIAMWR": { - "drawingId": "AMW0594A", - "status": "source-ready" - }, - "CC2340R21N0RGER": { - "drawingId": "RGE0024B", - "status": "source-ready", - "physicalPadToPortHint": { - "25": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "25", - "name": "THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal and RF ground pad; connect to the PCB ground plane." - } - ], - "validationNotes": [ - "CC2340R2 RGE0024B mechanical pages 71 and 73 number the exposed thermal pad 25; TI E2E support confirms the thermal pad also acts as IC/RF ground." - ] - }, - "CC2340R5MODAN0MHAR": { - "drawingId": "MHA0024A", - "status": "source-ready" - }, - "CC2531F128RHAR": { - "drawingId": "RHA0040H", - "status": "source-ready", - "physicalPadToPortHint": { - "41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "GND", - "type": "Ground", - "description": "Exposed ground pad; the chip ground connection. Connect to a solid ground plane." - } - ], - "validationNotes": [ - "CC2531-RF4CE page 16 defines the exposed pad as the chip GND connection; RHA0040H mechanical pages 34-36 number it 41." - ] - }, - "CC2755P105E0WRHAR": { - "drawingId": "RHA0040T", - "status": "source-ready", - "physicalPadToPortHint": { - "41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "EGP", - "type": "GND", - "description": "Ground exposed pad; this is the device's only ground connection." - } - ], - "validationNotes": [ - "CC2755P10 page 11 names EGP as the only device ground; the RHA0040T drawing on page 92 numbers the exposed pad 41." - ] - }, - "CC2755P207E0WRHAR": { - "drawingId": "RHA0040T", - "status": "source-ready", - "physicalPadToPortHint": { - "41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "EGP", - "type": "GND", - "description": "Ground exposed pad; this is the device's only ground connection." - } - ], - "validationNotes": [ - "CC2755P20 page 9 names EGP as the only device ground; the RHA0040T drawing on page 70 numbers the exposed pad 41." - ] - }, - "CC3300MODENIAMOZR": { - "drawingId": "MOZ0065A", - "status": "source-ready" - }, - "CC3301MODENIAMOZR": { - "drawingId": "MOZ0065A", - "status": "source-ready" - }, - "CC3350MODENIAMOZR": { - "drawingId": "MOZ0065A", - "status": "source-ready" - }, - "CC3351MODENIAMOZR": { - "drawingId": "MOZ0065A", - "status": "source-ready" - }, - "CC3501ENJARSHR": { - "drawingId": "RSH0056G", - "status": "source-ready", - "physicalPadToPortHint": { - "57": "pin57" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "57", - "name": "EP/THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." - } - ], - "validationNotes": [ - "CC3501E reference schematic page 50 ties EP/Thermal_Pad 57 to GND; RSH0056G page 61 numbers the exposed pad 57." - ] - }, - "CC3551ENJARSHR": { - "drawingId": "RSH0056G", - "status": "source-ready", - "physicalPadToPortHint": { - "57": "pin57" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "57", - "name": "EP/THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." - } - ], - "validationNotes": [ - "CC3551E reference schematic page 49 ties EP/Thermal_Pad 57 to GND; RSH0056G page 62 numbers the exposed pad 57." - ] - }, - "CSD18531Q5AT": { - "drawingId": "DQJ0008A", - "status": "source-ready", - "physicalPadToPortHint": { - "9": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "D", - "type": "Power", - "description": "Exposed power pad electrically connected to the MOSFET drain." - } - ], - "validationNotes": [ - "CSD18531Q5A page 1 marks the center exposed metal as drain D; DQJ0008A page 9 numbers that contact 9." - ] - }, - "CSD18541F5T": { - "drawingId": "YJK0003A", - "status": "source-ready" - }, - "DAC43701DSGR": { - "drawingId": "DSG0008A", - "status": "source-ready", - "physicalPadToPortHint": { - "9": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "EP", - "type": "Ground", - "description": "Exposed pad tied to the AGND/VSS ground node." - } - ], - "validationNotes": [ - "DAC43701 DSG0008A pages 56-58 number exposed pad 9; TI DACx3701 EVM guide SLAU841A page 14 ties EP 9 directly to ground." - ] - }, - "DLP4500AFQD": { - "drawingId": "FQD-2510852", - "status": "source-ready" - }, - "DP83826AERHBR": { - "drawingId": "RHB0032M", - "status": "source-ready", - "physicalPadToPortHint": { - "33": "pin33" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "33", - "name": "THERMAL_PAD", - "type": "Ground", - "description": "Thermal pad; connect to GND." - } - ], - "validationNotes": [ - "DP83826AE pages 4 and 7 name the Thermal Pad and require GND; RHB0032M pages 109-111 number the center pad 33." - ] - }, - "DRV3256EPAPRQ1": { - "drawingId": "PAP0064N", - "status": "source-ready" - }, - "DRV8363QRGZRQ1": { - "drawingId": "RGZ0048M", - "status": "source-ready", - "physicalPadToPortHint": { - "49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "49", - "name": "THERMAL_PAD", - "type": "Thermal", - "description": "Used for thermal dissipation, not electrical grounding; has a high-impedance connection to GND and AGND." - } - ], - "validationNotes": [ - "DRV8363-Q1 page 3 names the Thermal Pad and RGZ0048M page 92 numbers it 49; page 86 explicitly says it is not electrical ground." - ] - }, - "HDC3021QDEHRQ1": { - "drawingId": "DEH0008A", - "status": "source-ready" - }, - "IWRL6432BRQAAMYR": { - "drawingId": "AMY0101A", - "status": "source-ready" - }, - "LM111733QKVURQ1": { - "drawingId": "KVU0003A", - "status": "source-ready", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "Tab": "pin2" - }, - "ignoredPhysicalPins": [], - "validationNotes": [ - "Official LM1117-Q1 pin table identifies both physical lead 2 and the package Tab as OUT; both intentionally map to pin2." - ] - }, - "LM3644YFFR": { - "drawingId": "YFF0012", - "status": "source-ready" - }, - "LMG1210RVRR": { - "drawingId": "RVR0019A", - "status": "source-ready" - }, - "LMG3612REQR": { - "drawingId": "REQ0038A", - "status": "source-ready", - "physicalPadToPortHint": { - "39": "pin39" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "39", - "name": "PAD/S", - "type": "Power", - "description": "Thermal power pad internally connected to S, AGND, and NC2; PAD equals S and may conduct all source current." - } - ], - "validationNotes": [ - "LMG3612 page 4 defines PAD=S and permits all source current through it; REQ0038A page 27 numbers the exposed pad 39." - ] - }, - "LMK6DA10000ADLFR": { - "drawingId": "DLF0006B", - "status": "source-ready" - }, - "MSP430FR5969IRGZR": { - "drawingId": "RGZ0048B", - "status": "source-ready", - "physicalPadToPortHint": { - "Pad": "pin49" - }, - "ignoredPhysicalPins": [], - "validationNotes": [ - "The official pin table names the exposed QFN terminal Pad; the exact RGZ0048B footprint donor identifies that same copper as pin49." - ] - }, - "O3853QDCARQ1": { - "drawingId": "DCA0048B", - "status": "source-ready" - }, - "PTLIN821DRBRQ1": { - "drawingId": "DRB0008J", - "status": "source-ready", - "physicalPadToPortHint": { - "9": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "THERMAL_PAD", - "type": "GND", - "description": "Thermal pad electrically connected to GND; connect to PCB ground." - } - ], - "validationNotes": [ - "TLIN821-Q1 page 3 defines the Thermal Pad as electrically connected to GND; DRB0008J pages 30-31 number it 9." - ] - }, - "SN74LVC1G04YZPR": { - "drawingId": "YZP0005", - "status": "source-ready", - "physicalPadToPortHint": { - "C2": "pin1", - "B1": "pin2", - "C1": "pin3", - "A1": "pin4", - "A2": "pin5" - }, - "ignoredPhysicalPins": ["B2"], - "validationNotes": [ - "Exact YZP0005 copper has five populated balls: C2, B1, C1, A1, and A2. TI's function table also lists coordinate B2 as NC, but that coordinate is unpopulated in the five-ball package and is intentionally ignored." - ] - }, - "TLC69624QRSNRQ1": { - "drawingId": "RSN0032D", - "status": "source-ready" - }, - "TLC69634QRSNRQ1": { - "drawingId": "RSN0032D", - "status": "source-ready" - }, - "TLC69699DRRR": { - "drawingId": "DRR0012G", - "status": "source-ready", - "physicalPadToPortHint": { - "13": "pin13" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "13", - "name": "NC3", - "type": "NC", - "description": "Exposed pad with no connection; electrically isolate from every signal except Ground." - } - ], - "validationNotes": [ - "TLC69699 page 3 defines NC3 as the exposed no-connect pad; DRR0012G page 12 numbers it 13." - ] - }, - "TLV9022L1RUGR": { - "drawingId": "RUG0010B", - "status": "source-ready" - }, - "TPD1E0B04DPLT": { - "drawingId": "DPL0002A", - "status": "source-ready" - }, - "TPS1HC03PQVAHRQ1": { - "drawingId": "VAH0011A", - "status": "source-ready" - }, - "TPS22991CNRAAR": { - "drawingId": "RAA0004A", - "status": "source-ready" - }, - "TPS24750RUVR": { - "drawingId": "RUV0036A", - "status": "source-ready" - }, - "TPS2HC08PQVAHRQ1": { - "drawingId": "VAH0011C", - "status": "source-ready" - }, - "TPS2HC16PQVAHRQ1": { - "drawingId": "VAH0011B", - "status": "source-ready" - }, - "TPS6521401VAFR": { - "drawingId": "VAF0024A", - "status": "source-ready" - }, - "TPS6522430RAHRQ1": { - "drawingId": "RAH0036A", - "status": "source-ready" - }, - "TPS65930A2ZCHR": { - "drawingId": "ZCH0139A", - "status": "source-ready" - }, - "TPS7A5301BRPSR": { - "drawingId": "RPS0012A", - "status": "source-ready" - }, - "TPS7E7101DBVR": { - "drawingId": "DBV0005A", - "status": "source-ready", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5" - }, - "ignoredPhysicalPins": ["Thermal pad"], - "validationNotes": [ - "The TI HTML table's Thermal pad row belongs to the alternate DRV package. DBV0005A and TPS7E71 Figure 7-11 contain only SOT-23 pads 1-5; ignore that row for TPS7E7101DBVR." - ] - }, - "TPS92761QPHPRQ1": { - "drawingId": "PHP0048L", - "status": "source-ready" - }, - "TPSM863252RDXR": { - "drawingId": "RDX0007A", - "status": "source-ready" - }, - "TPSM8A29RDGR": { - "drawingId": "RDG0025A", - "status": "source-ready" - }, - "TXE8124DGSR": { - "drawingId": "DGS0032A", - "status": "source-ready" - }, - "TXV0108QWRGYRQ1": { - "drawingId": "RGY0024E", - "status": "source-ready" - }, - "UCG28828-1REZR": { - "drawingId": "REZ0012A", - "status": "source-ready" - }, - "XI6432BAFCLIMBBR": { - "drawingId": "MBB0030A", - "status": "source-ready" - }, - "XM33C321ASPZR": { - "drawingId": "PZ0100A", - "status": "source-ready" - }, - "XMSPM0G1218SRGZR": { - "drawingId": "RGZ0048B", - "status": "source-ready", - "physicalPadToPortHint": { - "49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "49", - "name": "QFN_PAD/THERMAL_PAD", - "type": "GND", - "description": "QFN exposed thermal pad; TI recommends connection to VSS and a continuous ground plane." - } - ], - "validationNotes": [ - "MSPM0G1218 page 13 and RGZ0048B page 102 identify Thermal Pad 49; MSPM0G1107's same-platform RGZ48 table recommends VSS and TI application note SLAAE76E routes it to ground." - ] - } - } -} diff --git a/lib/chips/ti-sysblocks-components.tsx b/lib/chips/ti-sysblocks-components.tsx index 360504c2..1ad67496 100644 --- a/lib/chips/ti-sysblocks-components.tsx +++ b/lib/chips/ti-sysblocks-components.tsx @@ -1,816 +1,816 @@ // This file is generated by scripts/generate-ti-sysblocks-exports.ts. // Do not edit it by hand; update ti-sysblocks-chip-catalog.json and regenerate. -import { ADC101C021CIMM_NOPB } from "./ADC101C021CIMM_NOPB.circuit.tsx"; -import { ADC128S022CIMTX_NOPB } from "./ADC128S022CIMTX_NOPB.circuit.tsx"; -import { ADS1015LIDGSR } from "./ADS1015LIDGSR.circuit.tsx"; -import { ADS1114IDGST } from "./ADS1114IDGST.circuit.tsx"; -import { ADS1118IDGSR } from "./ADS1118IDGSR.circuit.tsx"; -import { ADS114S08IRHBT } from "./ADS114S08IRHBT.circuit.tsx"; -import { ADS122S14IRTER } from "./ADS122S14IRTER.circuit.tsx"; -import { ADS124S08IRHBT } from "./ADS124S08IRHBT.circuit.tsx"; -import { ADS131M03IRUKR } from "./ADS131M03IRUKR.circuit.tsx"; -import { ADS7042IDCUT } from "./ADS7042IDCUT.circuit.tsx"; -import { ADS7142IRUGR } from "./ADS7142IRUGR.circuit.tsx"; -import { ADS7885SDBVT } from "./ADS7885SDBVT.circuit.tsx"; -import { ADS8885IDGSR } from "./ADS8885IDGSR.circuit.tsx"; -import { AM26C31IDR } from "./AM26C31IDR.circuit.tsx"; -import { AM26C32CDR } from "./AM26C32CDR.circuit.tsx"; -import { AM3352BZCZ100 } from "./AM3352BZCZ100.circuit.tsx"; -import { AM3357BZCZA80 } from "./AM3357BZCZA80.circuit.tsx"; -import { AM4376BZDND80 } from "./AM4376BZDND80.circuit.tsx"; -import { AM4378BZDND100 } from "./AM4378BZDND100.circuit.tsx"; -import { AM4379BZDNA100 } from "./AM4379BZDNA100.circuit.tsx"; -import { AM5726BABCXA } from "./AM5726BABCXA.circuit.tsx"; -import { AM62A32AOMHIAMBR } from "./AM62A32AOMHIAMBR.circuit.tsx"; -import { AM62A74AUMHAAMBR } from "./AM62A74AUMHAAMBR.circuit.tsx"; -import { AM62L32BEGHAANBR } from "./AM62L32BEGHAANBR.circuit.tsx"; -import { AM6442BSEFHAALV } from "./AM6442BSEFHAALV.circuit.tsx"; -import { AM67A74AKGHIAMWR } from "./AM67A74AKGHIAMWR.circuit.tsx"; -import { AMC0300DDWVR } from "./AMC0300DDWVR.circuit.tsx"; -import { AMC0311DQDWVRQ1 } from "./AMC0311DQDWVRQ1.circuit.tsx"; -import { AMC1211AQDWVQ1 } from "./AMC1211AQDWVQ1.circuit.tsx"; -import { AMC1351QDWVRQ1 } from "./AMC1351QDWVRQ1.circuit.tsx"; -import { ATL431LIBQDBZR } from "./ATL431LIBQDBZR.circuit.tsx"; -import { BQ24600RVAR } from "./BQ24600RVAR.circuit.tsx"; -import { BQ24725ARGRR } from "./BQ24725ARGRR.circuit.tsx"; -import { BQ24780SRUYR } from "./BQ24780SRUYR.circuit.tsx"; -import { BQ25185DLHR } from "./BQ25185DLHR.circuit.tsx"; -import { BQ25188YBGR } from "./BQ25188YBGR.circuit.tsx"; -import { BQ25622RYKR } from "./BQ25622RYKR.circuit.tsx"; -import { BQ25630YBGR } from "./BQ25630YBGR.circuit.tsx"; -import { BQ25638YBGR } from "./BQ25638YBGR.circuit.tsx"; -import { BQ25731RSNR } from "./BQ25731RSNR.circuit.tsx"; -import { BQ25756RRVR } from "./BQ25756RRVR.circuit.tsx"; -import { BQ25887RGER } from "./BQ25887RGER.circuit.tsx"; -import { BQ25895 } from "./BQ25895.circuit.tsx"; -import { BQ27426YZFR } from "./BQ27426YZFR.circuit.tsx"; -import { BQ32000DR } from "./BQ32000DR.circuit.tsx"; -import { BQ51003YFPR } from "./BQ51003YFPR.circuit.tsx"; -import { BQ51013CRHLR } from "./BQ51013CRHLR.circuit.tsx"; -import { CC1101RGPR } from "./CC1101RGPR.circuit.tsx"; -import { CC1120RHBR } from "./CC1120RHBR.circuit.tsx"; -import { CC1125RHBR } from "./CC1125RHBR.circuit.tsx"; -import { CC113LRGPR } from "./CC113LRGPR.circuit.tsx"; -import { CC1310F128RHBR } from "./CC1310F128RHBR.circuit.tsx"; -import { CC1311R31T0RKPR } from "./CC1311R31T0RKPR.circuit.tsx"; -import { CC1312PSIPMOTR } from "./CC1312PSIPMOTR.circuit.tsx"; -import { CC1314R106T0RGZR } from "./CC1314R106T0RGZR.circuit.tsx"; -import { CC1354P106T0RSKR } from "./CC1354P106T0RSKR.circuit.tsx"; -import { CC2340R21N0RGER } from "./CC2340R21N0RGER.circuit.tsx"; -import { CC2340R5 } from "./CC2340R5.circuit.tsx"; -import { CC2340R5MODAN0MHAR } from "./CC2340R5MODAN0MHAR.circuit.tsx"; -import { CC2500RGPR } from "./CC2500RGPR.circuit.tsx"; -import { CC2530F128RHAR } from "./CC2530F128RHAR.circuit.tsx"; -import { CC2531F128RHAR } from "./CC2531F128RHAR.circuit.tsx"; -import { CC2540F256RHAR } from "./CC2540F256RHAR.circuit.tsx"; -import { CC2592RGVR } from "./CC2592RGVR.circuit.tsx"; -import { CC2620F128RGZR } from "./CC2620F128RGZR.circuit.tsx"; -import { CC2652RB1FRGZR } from "./CC2652RB1FRGZR.circuit.tsx"; -import { CC2755P105E0WRHAR } from "./CC2755P105E0WRHAR.circuit.tsx"; -import { CC2755P207E0WRHAR } from "./CC2755P207E0WRHAR.circuit.tsx"; -import { CC3100R11MRGCR } from "./CC3100R11MRGCR.circuit.tsx"; -import { CC3100MODR11MAMOBT } from "./CC3100MODR11MAMOBT.circuit.tsx"; -import { CC3200R1M2RGC } from "./CC3200R1M2RGC.circuit.tsx"; -import { CC3200MODR1M2AMOBR } from "./CC3200MODR1M2AMOBR.circuit.tsx"; -import { CC3220MODASM2MONR } from "./CC3220MODASM2MONR.circuit.tsx"; -import { CC3300MODENIAMOZR } from "./CC3300MODENIAMOZR.circuit.tsx"; -import { CC3301MODENIAMOZR } from "./CC3301MODENIAMOZR.circuit.tsx"; -import { CC3350MODENIAMOZR } from "./CC3350MODENIAMOZR.circuit.tsx"; -import { CC3351MODENIAMOZR } from "./CC3351MODENIAMOZR.circuit.tsx"; -import { CC3501ENJARSHR } from "./CC3501ENJARSHR.circuit.tsx"; -import { CC3551ENJARSHR } from "./CC3551ENJARSHR.circuit.tsx"; -import { CD4069UBM96 } from "./CD4069UBM96.circuit.tsx"; -import { CD74HC4067SM96 } from "./CD74HC4067SM96.circuit.tsx"; -import { CD74HCT21M96 } from "./CD74HCT21M96.circuit.tsx"; -import { CD74HCT4067M } from "./CD74HCT4067M.circuit.tsx"; -import { CDCE62002RHBT } from "./CDCE62002RHBT.circuit.tsx"; -import { CDCE913PWR } from "./CDCE913PWR.circuit.tsx"; -import { CDCLVC1106PWR } from "./CDCLVC1106PWR.circuit.tsx"; -import { CDCM9102RHBR } from "./CDCM9102RHBR.circuit.tsx"; -import { CSD13381F4T } from "./CSD13381F4T.circuit.tsx"; -import { CSD17382F4T } from "./CSD17382F4T.circuit.tsx"; -import { CSD17483F4T } from "./CSD17483F4T.circuit.tsx"; -import { CSD17484F4 } from "./CSD17484F4.circuit.tsx"; -import { CSD17571Q2 } from "./CSD17571Q2.circuit.tsx"; -import { CSD17573Q5B } from "./CSD17573Q5B.circuit.tsx"; -import { CSD17577Q3AT } from "./CSD17577Q3AT.circuit.tsx"; -import { CSD17578Q5A } from "./CSD17578Q5A.circuit.tsx"; -import { CSD17579Q3A } from "./CSD17579Q3A.circuit.tsx"; -import { CSD17581Q3AT } from "./CSD17581Q3AT.circuit.tsx"; -import { CSD18510Q5B } from "./CSD18510Q5B.circuit.tsx"; -import { CSD18513Q5A } from "./CSD18513Q5A.circuit.tsx"; -import { CSD18514Q5A } from "./CSD18514Q5A.circuit.tsx"; -import { CSD18531Q5AT } from "./CSD18531Q5AT.circuit.tsx"; -import { CSD18532Q5B } from "./CSD18532Q5B.circuit.tsx"; -import { CSD18534Q5A } from "./CSD18534Q5A.circuit.tsx"; -import { CSD18540Q5BT } from "./CSD18540Q5BT.circuit.tsx"; -import { CSD18541F5T } from "./CSD18541F5T.circuit.tsx"; -import { CSD18543Q3AT } from "./CSD18543Q3AT.circuit.tsx"; -import { CSD19501KCS } from "./CSD19501KCS.circuit.tsx"; -import { CSD19502Q5B } from "./CSD19502Q5B.circuit.tsx"; -import { CSD19531Q5AT } from "./CSD19531Q5AT.circuit.tsx"; -import { CSD19534Q5A } from "./CSD19534Q5A.circuit.tsx"; -import { CSD19535KTT } from "./CSD19535KTT.circuit.tsx"; -import { CSD19537Q3T } from "./CSD19537Q3T.circuit.tsx"; -import { CSD19538Q2T } from "./CSD19538Q2T.circuit.tsx"; -import { CSD25481F4 } from "./CSD25481F4.circuit.tsx"; -import { CSD87502Q2T } from "./CSD87502Q2T.circuit.tsx"; -import { CSD88539NDT } from "./CSD88539NDT.circuit.tsx"; -import { DAC121S101CIMK_NOPB } from "./DAC121S101CIMK_NOPB.circuit.tsx"; -import { DAC43701DSGR } from "./DAC43701DSGR.circuit.tsx"; -import { DAC53202RTER } from "./DAC53202RTER.circuit.tsx"; -import { DAC53204YBHR } from "./DAC53204YBHR.circuit.tsx"; -import { DAC63001RTER } from "./DAC63001RTER.circuit.tsx"; -import { DAC80502DRXR } from "./DAC80502DRXR.circuit.tsx"; -import { DAC8411IDCKT } from "./DAC8411IDCKT.circuit.tsx"; -import { DAC8564IAPWR } from "./DAC8564IAPWR.circuit.tsx"; -import { DCH010505SN7 } from "./DCH010505SN7.circuit.tsx"; -import { DLP4500AFQD } from "./DLP4500AFQD.circuit.tsx"; -import { DM3730CUSD100 } from "./DM3730CUSD100.circuit.tsx"; -import { DP83822HRHBT } from "./DP83822HRHBT.circuit.tsx"; -import { DP83822IRHBR } from "./DP83822IRHBR.circuit.tsx"; -import { DP83825IRMQT } from "./DP83825IRMQT.circuit.tsx"; -import { DP83826AERHBR } from "./DP83826AERHBR.circuit.tsx"; -import { DP83826AIRHBR } from "./DP83826AIRHBR.circuit.tsx"; -import { DP83826IRHBR } from "./DP83826IRHBR.circuit.tsx"; -import { DP83867CRRGZR } from "./DP83867CRRGZR.circuit.tsx"; -import { DP83867ERGZR } from "./DP83867ERGZR.circuit.tsx"; -import { DP83867IRRGZT } from "./DP83867IRRGZT.circuit.tsx"; -import { DP83867ISRGZT } from "./DP83867ISRGZT.circuit.tsx"; -import { DRV110APWR } from "./DRV110APWR.circuit.tsx"; -import { DRV2605YZFR } from "./DRV2605YZFR.circuit.tsx"; -import { DRV2667RGPR } from "./DRV2667RGPR.circuit.tsx"; -import { DRV3256EPAPRQ1 } from "./DRV3256EPAPRQ1.circuit.tsx"; -import { DRV5013AGQLPG } from "./DRV5013AGQLPG.circuit.tsx"; -import { DRV5013ADELPGMQ1 } from "./DRV5013ADELPGMQ1.circuit.tsx"; -import { DRV8263HQVAKRQ1 } from "./DRV8263HQVAKRQ1.circuit.tsx"; -import { DRV83053QPHPRQ1 } from "./DRV83053QPHPRQ1.circuit.tsx"; -import { DRV8363QRGZRQ1 } from "./DRV8363QRGZRQ1.circuit.tsx"; -import { DS90LT012ATMF_NOPB } from "./DS90LT012ATMF_NOPB.circuit.tsx"; -import { DS90LV011ATMF_NOPB } from "./DS90LV011ATMF_NOPB.circuit.tsx"; -import { DS90LV047ATMX_NOPB } from "./DS90LV047ATMX_NOPB.circuit.tsx"; -import { DS90LV048ATMX_NOPB } from "./DS90LV048ATMX_NOPB.circuit.tsx"; -import { ESD122DMXR } from "./ESD122DMXR.circuit.tsx"; -import { ESD204DQAR } from "./ESD204DQAR.circuit.tsx"; -import { ESD321DPYR } from "./ESD321DPYR.circuit.tsx"; -import { ESD351DPYR } from "./ESD351DPYR.circuit.tsx"; -import { ESD401DPYR } from "./ESD401DPYR.circuit.tsx"; -import { ESD751DYAR } from "./ESD751DYAR.circuit.tsx"; -import { ESDS311DYFR } from "./ESDS311DYFR.circuit.tsx"; -import { F28E120SCTPTR } from "./F28E120SCTPTR.circuit.tsx"; -import { F28M35H52C1RFPQ } from "./F28M35H52C1RFPQ.circuit.tsx"; -import { FDC2212DNTR } from "./FDC2212DNTR.circuit.tsx"; -import { HD3SS3220RNHT } from "./HD3SS3220RNHT.circuit.tsx"; -import { HDC3020 } from "./HDC3020.circuit.tsx"; -import { HDC3021QDEHRQ1 } from "./HDC3021QDEHRQ1.circuit.tsx"; -import { HDC3022 } from "./HDC3022.circuit.tsx"; -import { INA138NA_3K } from "./INA138NA_3K.circuit.tsx"; -import { INA138QPWRQ1 } from "./INA138QPWRQ1.circuit.tsx"; -import { INA139NA_3K } from "./INA139NA_3K.circuit.tsx"; -import { INA169NA_3K } from "./INA169NA_3K.circuit.tsx"; -import { INA181A2IDBVR } from "./INA181A2IDBVR.circuit.tsx"; -import { INA186A2IDDFR } from "./INA186A2IDDFR.circuit.tsx"; -import { INA188IDR } from "./INA188IDR.circuit.tsx"; -import { INA199A3DCKR } from "./INA199A3DCKR.circuit.tsx"; -import { INA213BIDCKT } from "./INA213BIDCKT.circuit.tsx"; -import { INA2181A2IDGSR } from "./INA2181A2IDGSR.circuit.tsx"; -import { INA228AIDGSR } from "./INA228AIDGSR.circuit.tsx"; -import { INA230AIRGTR } from "./INA230AIRGTR.circuit.tsx"; -import { INA236AIYBJR } from "./INA236AIYBJR.circuit.tsx"; -import { INA240A1DR } from "./INA240A1DR.circuit.tsx"; -import { INA240A3QDRQ1 } from "./INA240A3QDRQ1.circuit.tsx"; -import { INA241A5IDDFR } from "./INA241A5IDDFR.circuit.tsx"; -import { INA280A3IDCKT } from "./INA280A3IDCKT.circuit.tsx"; -import { INA281A3IDBVR } from "./INA281A3IDBVR.circuit.tsx"; -import { INA296A4IDDFR } from "./INA296A4IDDFR.circuit.tsx"; -import { INA296B4IDDFR } from "./INA296B4IDDFR.circuit.tsx"; -import { INA310A4IDGKR } from "./INA310A4IDGKR.circuit.tsx"; -import { INA3221AIRGVR } from "./INA3221AIRGVR.circuit.tsx"; -import { INA818IDR } from "./INA818IDR.circuit.tsx"; -import { INA826AIDR } from "./INA826AIDR.circuit.tsx"; -import { ISO1042DWR } from "./ISO1042DWR.circuit.tsx"; -import { ISO1044BD } from "./ISO1044BD.circuit.tsx"; -import { ISO1050DWR } from "./ISO1050DWR.circuit.tsx"; -import { ISO1176DWR } from "./ISO1176DWR.circuit.tsx"; -import { ISO1410BDWR } from "./ISO1410BDWR.circuit.tsx"; -import { ISO1541DR } from "./ISO1541DR.circuit.tsx"; -import { ISO3082DWR } from "./ISO3082DWR.circuit.tsx"; -import { ISO3088DWR } from "./ISO3088DWR.circuit.tsx"; -import { ISO5452DWR } from "./ISO5452DWR.circuit.tsx"; -import { ISO5851DWR } from "./ISO5851DWR.circuit.tsx"; -import { ISO6420DR } from "./ISO6420DR.circuit.tsx"; -import { ISO6421DR } from "./ISO6421DR.circuit.tsx"; -import { ISO6421DRQ1 } from "./ISO6421DRQ1.circuit.tsx"; -import { ISO6431DBQR } from "./ISO6431DBQR.circuit.tsx"; -import { ISO6440DBQR } from "./ISO6440DBQR.circuit.tsx"; -import { ISO6440DBQRQ1 } from "./ISO6440DBQRQ1.circuit.tsx"; -import { ISO6441DWR } from "./ISO6441DWR.circuit.tsx"; -import { ISO6442DBQR } from "./ISO6442DBQR.circuit.tsx"; -import { ISO6521REUR } from "./ISO6521REUR.circuit.tsx"; -import { ISO7760DBQR } from "./ISO7760DBQR.circuit.tsx"; -import { ISO7841FDWW } from "./ISO7841FDWW.circuit.tsx"; -import { ISO7842DWR } from "./ISO7842DWR.circuit.tsx"; -import { IWRL6432BDBAAMFR } from "./IWRL6432BDBAAMFR.circuit.tsx"; -import { IWRL6432BRQAAMYR } from "./IWRL6432BRQAAMYR.circuit.tsx"; -import { XI6432BAFCLIMBBR } from "./XI6432BAFCLIMBBR.circuit.tsx"; -import { LDC1312DNTR } from "./LDC1312DNTR.circuit.tsx"; -import { LDC1314RGHR } from "./LDC1314RGHR.circuit.tsx"; -import { LDC1612DNTR } from "./LDC1612DNTR.circuit.tsx"; -import { LDC1614RGHR } from "./LDC1614RGHR.circuit.tsx"; -import { LM111733QKVURQ1 } from "./LM111733QKVURQ1.circuit.tsx"; -import { LM20CIM7_NOPB } from "./LM20CIM7_NOPB.circuit.tsx"; -import { LM20242MHX_NOPB } from "./LM20242MHX_NOPB.circuit.tsx"; -import { LM239N } from "./LM239N.circuit.tsx"; -import { LM2901AVQDRG4Q1 } from "./LM2901AVQDRG4Q1.circuit.tsx"; -import { LM2902BIDR } from "./LM2902BIDR.circuit.tsx"; -import { LM2903DR } from "./LM2903DR.circuit.tsx"; -import { LM2903BIDR } from "./LM2903BIDR.circuit.tsx"; -import { LM2904BIDGKR } from "./LM2904BIDGKR.circuit.tsx"; -import { LM321LVIDBVR } from "./LM321LVIDBVR.circuit.tsx"; -import { LM324BIPWR } from "./LM324BIPWR.circuit.tsx"; -import { LM339BIDR } from "./LM339BIDR.circuit.tsx"; -import { LM339LVPWR } from "./LM339LVPWR.circuit.tsx"; -import { LM358BIPWR } from "./LM358BIPWR.circuit.tsx"; -import { LM358LVIPWR } from "./LM358LVIPWR.circuit.tsx"; -import { LM3644YFFR } from "./LM3644YFFR.circuit.tsx"; -import { LM3880MF_1AC_NOPB } from "./LM3880MF_1AC_NOPB.circuit.tsx"; -import { LM3881MMX_NOPB } from "./LM3881MMX_NOPB.circuit.tsx"; -import { LM393PWR } from "./LM393PWR.circuit.tsx"; -import { LM393ADR } from "./LM393ADR.circuit.tsx"; -import { LM393BIDR } from "./LM393BIDR.circuit.tsx"; -import { LM4041A12IDBZR } from "./LM4041A12IDBZR.circuit.tsx"; -import { LM4041CIDCKR } from "./LM4041CIDCKR.circuit.tsx"; -import { LM4060A12EDBZR } from "./LM4060A12EDBZR.circuit.tsx"; -import { LM5020MM_2_NOPB } from "./LM5020MM_2_NOPB.circuit.tsx"; -import { LM5033SDX_NOPB } from "./LM5033SDX_NOPB.circuit.tsx"; -import { LM5050MK_1_NOPB } from "./LM5050MK_1_NOPB.circuit.tsx"; -import { LM5050Q1MK_1_NOPB } from "./LM5050Q1MK_1_NOPB.circuit.tsx"; -import { LM5060Q1MM_NOPB } from "./LM5060Q1MM_NOPB.circuit.tsx"; -import { LM5069MM_1_NOPB } from "./LM5069MM_1_NOPB.circuit.tsx"; -import { LM5106MMX_NOPB } from "./LM5106MMX_NOPB.circuit.tsx"; -import { LM5123QRGRRQ1 } from "./LM5123QRGRRQ1.circuit.tsx"; -import { LM51551DSSR } from "./LM51551DSSR.circuit.tsx"; -import { LM5156DSSR } from "./LM5156DSSR.circuit.tsx"; -import { LM5163DDAR } from "./LM5163DDAR.circuit.tsx"; -import { LM5164DDAR } from "./LM5164DDAR.circuit.tsx"; -import { LM536005QDSXRQ1 } from "./LM536005QDSXRQ1.circuit.tsx"; -import { LM62CIM3_NOPB } from "./LM62CIM3_NOPB.circuit.tsx"; -import { LM62460RPHR } from "./LM62460RPHR.circuit.tsx"; -import { LM74610QDGKRQ1 } from "./LM74610QDGKRQ1.circuit.tsx"; -import { LM74700QDRQ1 } from "./LM74700QDRQ1.circuit.tsx"; -import { LM74900QRGERQ1 } from "./LM74900QRGERQ1.circuit.tsx"; -import { LM95235DIMMX_NOPB } from "./LM95235DIMMX_NOPB.circuit.tsx"; -import { LMC555CMX_NOPB } from "./LMC555CMX_NOPB.circuit.tsx"; -import { LMG1210RVRR } from "./LMG1210RVRR.circuit.tsx"; -import { LMG3410R150RWHR } from "./LMG3410R150RWHR.circuit.tsx"; -import { LMG3411R070RWHR } from "./LMG3411R070RWHR.circuit.tsx"; -import { LMG3612REQR } from "./LMG3612REQR.circuit.tsx"; -import { LMK04828BISQE_NOPB } from "./LMK04828BISQE_NOPB.circuit.tsx"; -import { LMK1C1102PWR } from "./LMK1C1102PWR.circuit.tsx"; -import { LMK1C1103PWR } from "./LMK1C1103PWR.circuit.tsx"; -import { LMK1C1104DQFR } from "./LMK1C1104DQFR.circuit.tsx"; -import { LMK1C1108PWR } from "./LMK1C1108PWR.circuit.tsx"; -import { LMK6DA10000ADLFR } from "./LMK6DA10000ADLFR.circuit.tsx"; -import { LMP8480MMX_T_NOPB } from "./LMP8480MMX_T_NOPB.circuit.tsx"; -import { LMP8601MA_NOPB } from "./LMP8601MA_NOPB.circuit.tsx"; -import { LMP8601QMAX_NOPB } from "./LMP8601QMAX_NOPB.circuit.tsx"; -import { LMQ66430R5RXBR } from "./LMQ66430R5RXBR.circuit.tsx"; -import { LMQ66430MA3RXBRQ1 } from "./LMQ66430MA3RXBRQ1.circuit.tsx"; -import { LMR33630CRNXR } from "./LMR33630CRNXR.circuit.tsx"; -import { LMR36502F3RPER } from "./LMR36502F3RPER.circuit.tsx"; -import { LMR36520FADDAR } from "./LMR36520FADDAR.circuit.tsx"; -import { LMR43610R3RPER } from "./LMR43610R3RPER.circuit.tsx"; -import { LMR50410Y3FQDBVRQ1 } from "./LMR50410Y3FQDBVRQ1.circuit.tsx"; -import { LMR51610XDBVR } from "./LMR51610XDBVR.circuit.tsx"; -import { LMR51635YFDDCR } from "./LMR51635YFDDCR.circuit.tsx"; -import { LMT01LPG } from "./LMT01LPG.circuit.tsx"; -import { LMT70YFQR } from "./LMT70YFQR.circuit.tsx"; -import { LMT84DCKR } from "./LMT84DCKR.circuit.tsx"; -import { LMT86QDCKRQ1 } from "./LMT86QDCKRQ1.circuit.tsx"; -import { LMT88DCKR } from "./LMT88DCKR.circuit.tsx"; -import { LMV324AIPWR } from "./LMV324AIPWR.circuit.tsx"; -import { LMV331M5X_NOPB } from "./LMV331M5X_NOPB.circuit.tsx"; -import { LMV431CM5X_NOPB } from "./LMV431CM5X_NOPB.circuit.tsx"; -import { LMV431AIZ_NOPB } from "./LMV431AIZ_NOPB.circuit.tsx"; -import { LMV431BIMFX_NOPB } from "./LMV431BIMFX_NOPB.circuit.tsx"; -import { LP2980AIM5X_3_3_NOPB } from "./LP2980AIM5X_3_3_NOPB.circuit.tsx"; -import { LP2985AIM5_3_3_NOPB } from "./LP2985AIM5_3_3_NOPB.circuit.tsx"; -import { LP2998MAX_NOPB } from "./LP2998MAX_NOPB.circuit.tsx"; -import { LP5009PWR } from "./LP5009PWR.circuit.tsx"; -import { LP5036RJVR } from "./LP5036RJVR.circuit.tsx"; -import { LP5813AYBHR } from "./LP5813AYBHR.circuit.tsx"; -import { LPV821DBVR } from "./LPV821DBVR.circuit.tsx"; -import { LSF0108DGSR } from "./LSF0108DGSR.circuit.tsx"; -import { MAX3221CPWR } from "./MAX3221CPWR.circuit.tsx"; -import { MAX3221ECDBR } from "./MAX3221ECDBR.circuit.tsx"; -import { MSP430F5437AIPNR } from "./MSP430F5437AIPNR.circuit.tsx"; -import { MSP430F5528IZXHR } from "./MSP430F5528IZXHR.circuit.tsx"; -import { MSP430F5529IPN } from "./MSP430F5529IPN.circuit.tsx"; -import { MSP430FR2512IPW16R } from "./MSP430FR2512IPW16R.circuit.tsx"; -import { MSP430FR2532IRGER } from "./MSP430FR2532IRGER.circuit.tsx"; -import { MSP430FR2533IRHBR } from "./MSP430FR2533IRHBR.circuit.tsx"; -import { MSP430FR2632IYQWR } from "./MSP430FR2632IYQWR.circuit.tsx"; -import { MSP430FR2633IDAR } from "./MSP430FR2633IDAR.circuit.tsx"; -import { MSP430FR2672TRHBR } from "./MSP430FR2672TRHBR.circuit.tsx"; -import { MSP430FR2675TPTR } from "./MSP430FR2675TPTR.circuit.tsx"; -import { MSP430FR4133IPMR } from "./MSP430FR4133IPMR.circuit.tsx"; -import { MSP430FR5869IRGZR } from "./MSP430FR5869IRGZR.circuit.tsx"; -import { MSP430FR5969IRGZR } from "./MSP430FR5969IRGZR.circuit.tsx"; -import { MSPM0C1103SDSGR } from "./MSPM0C1103SDSGR.circuit.tsx"; -import { MSPM0C1104SDDFR } from "./MSPM0C1104SDDFR.circuit.tsx"; -import { MSPM0G1107TRHBR } from "./MSPM0G1107TRHBR.circuit.tsx"; -import { XMSPM0G1218SRGZR } from "./XMSPM0G1218SRGZR.circuit.tsx"; -import { MSPM0G1506SPMR } from "./MSPM0G1506SPMR.circuit.tsx"; -import { MSPM0G1518SPMR } from "./MSPM0G1518SPMR.circuit.tsx"; -import { MSPM0G5117SPMR } from "./MSPM0G5117SPMR.circuit.tsx"; -import { MSPM0L1105TDYYR } from "./MSPM0L1105TDYYR.circuit.tsx"; -import { MSPM0L1116SRHBR } from "./MSPM0L1116SRHBR.circuit.tsx"; -import { MSPM0L1305SDYYR } from "./MSPM0L1305SDYYR.circuit.tsx"; -import { MSPM0L1306SRGER } from "./MSPM0L1306SRGER.circuit.tsx"; -import { MSPM0L1343TDGS20R } from "./MSPM0L1343TDGS20R.circuit.tsx"; -import { MSPM0L2228SPTR } from "./MSPM0L2228SPTR.circuit.tsx"; -import { XM33C321ASPZR } from "./XM33C321ASPZR.circuit.tsx"; -import { NA555DR } from "./NA555DR.circuit.tsx"; -import { OPA197IDBVT } from "./OPA197IDBVT.circuit.tsx"; -import { OPA2188AIDGKR } from "./OPA2188AIDGKR.circuit.tsx"; -import { OPA2197ID } from "./OPA2197ID.circuit.tsx"; -import { OPA2237UA_2K5 } from "./OPA2237UA_2K5.circuit.tsx"; -import { OPA2310IDR } from "./OPA2310IDR.circuit.tsx"; -import { OPA2340UA_2K5 } from "./OPA2340UA_2K5.circuit.tsx"; -import { OPA2365AQDRQ1 } from "./OPA2365AQDRQ1.circuit.tsx"; -import { OPA2607QDGKRQ1 } from "./OPA2607QDGKRQ1.circuit.tsx"; -import { OPA2836QDGKRQ1 } from "./OPA2836QDGKRQ1.circuit.tsx"; -import { OPA310IDCKR } from "./OPA310IDCKR.circuit.tsx"; -import { OPA320SAIDBVR } from "./OPA320SAIDBVR.circuit.tsx"; -import { OPA333AIDR } from "./OPA333AIDR.circuit.tsx"; -import { OPA350UA_2K5 } from "./OPA350UA_2K5.circuit.tsx"; -import { OPA365AIDR } from "./OPA365AIDR.circuit.tsx"; -import { OPA365AQDBVRQ1 } from "./OPA365AQDBVRQ1.circuit.tsx"; -import { OPA371DDBVR } from "./OPA371DDBVR.circuit.tsx"; -import { OPA376AIDBVR } from "./OPA376AIDBVR.circuit.tsx"; -import { OPA4192IDR } from "./OPA4192IDR.circuit.tsx"; -import { OPA4206APWR } from "./OPA4206APWR.circuit.tsx"; -import { OPA4350EA_250 } from "./OPA4350EA_250.circuit.tsx"; -import { OPA4991QDYYRQ1 } from "./OPA4991QDYYRQ1.circuit.tsx"; -import { OPA607QDBVRQ1 } from "./OPA607QDBVRQ1.circuit.tsx"; -import { OPA990IDBVR } from "./OPA990IDBVR.circuit.tsx"; -import { OPT3002DNPR } from "./OPT3002DNPR.circuit.tsx"; -import { OPT3004DNPR } from "./OPT3004DNPR.circuit.tsx"; -import { OPT4001YMNR } from "./OPT4001YMNR.circuit.tsx"; -import { P82B96DGKR } from "./P82B96DGKR.circuit.tsx"; -import { PCA9306DCUT } from "./PCA9306DCUT.circuit.tsx"; -import { PTH08080WAH } from "./PTH08080WAH.circuit.tsx"; -import { REF1930AIDDCT } from "./REF1930AIDDCT.circuit.tsx"; -import { REF2125IDBVR } from "./REF2125IDBVR.circuit.tsx"; -import { REF3016EAIDBZR } from "./REF3016EAIDBZR.circuit.tsx"; -import { REF3325AIDBZR } from "./REF3325AIDBZR.circuit.tsx"; -import { RF430CL330HCPWR } from "./RF430CL330HCPWR.circuit.tsx"; -import { SN6501DBVR } from "./SN6501DBVR.circuit.tsx"; -import { SN6505BDBVT } from "./SN6505BDBVT.circuit.tsx"; -import { SN65HVD24DR } from "./SN65HVD24DR.circuit.tsx"; -import { SN65HVD3082EDR } from "./SN65HVD3082EDR.circuit.tsx"; -import { SN65HVD3088EDR } from "./SN65HVD3088EDR.circuit.tsx"; -import { SN65HVD32DR } from "./SN65HVD32DR.circuit.tsx"; -import { SN65HVD96DR } from "./SN65HVD96DR.circuit.tsx"; -import { SN65LV1023ADB } from "./SN65LV1023ADB.circuit.tsx"; -import { SN65LV1224BDB } from "./SN65LV1224BDB.circuit.tsx"; -import { SN74AC86PWR } from "./SN74AC86PWR.circuit.tsx"; -import { SN74AHC08DR } from "./SN74AHC08DR.circuit.tsx"; -import { SN74AHC1G09DBVR } from "./SN74AHC1G09DBVR.circuit.tsx"; -import { SN74AHC1G14DBVR } from "./SN74AHC1G14DBVR.circuit.tsx"; -import { SN74AHCT1G08DBVR } from "./SN74AHCT1G08DBVR.circuit.tsx"; -import { SN74AHCT541DWR } from "./SN74AHCT541DWR.circuit.tsx"; -import { SN74ALVC08DR } from "./SN74ALVC08DR.circuit.tsx"; -import { SN74AUP1G14DBVR } from "./SN74AUP1G14DBVR.circuit.tsx"; -import { SN74AUP1G17DBVR } from "./SN74AUP1G17DBVR.circuit.tsx"; -import { SN74AUP1G74DQER } from "./SN74AUP1G74DQER.circuit.tsx"; -import { SN74AUP1G79DCKR } from "./SN74AUP1G79DCKR.circuit.tsx"; -import { SN74AUP2G08DQER } from "./SN74AUP2G08DQER.circuit.tsx"; -import { SN74AUP2G14DSFR } from "./SN74AUP2G14DSFR.circuit.tsx"; -import { SN74AUP2G17DCKR } from "./SN74AUP2G17DCKR.circuit.tsx"; -import { SN74AUP2G240DCUR } from "./SN74AUP2G240DCUR.circuit.tsx"; -import { SN74AUP3G14DCUR } from "./SN74AUP3G14DCUR.circuit.tsx"; -import { SN74AXC4T245PWR } from "./SN74AXC4T245PWR.circuit.tsx"; -import { SN74CB3Q3245DGVR } from "./SN74CB3Q3245DGVR.circuit.tsx"; -import { SN74CBTLV3257DGVR } from "./SN74CBTLV3257DGVR.circuit.tsx"; -import { SN74HC112DR } from "./SN74HC112DR.circuit.tsx"; -import { SN74HC14DR } from "./SN74HC14DR.circuit.tsx"; -import { SN74HC21DR } from "./SN74HC21DR.circuit.tsx"; -import { SN74HCS03DR } from "./SN74HCS03DR.circuit.tsx"; -import { SN74HCS595BQBR } from "./SN74HCS595BQBR.circuit.tsx"; -import { SN74LV1T125DBVR } from "./SN74LV1T125DBVR.circuit.tsx"; -import { SN74LV1T34DCKR } from "./SN74LV1T34DCKR.circuit.tsx"; -import { SN74LV4052ADYYR } from "./SN74LV4052ADYYR.circuit.tsx"; -import { SN74LV541ADBR } from "./SN74LV541ADBR.circuit.tsx"; -import { SN74LVC08ANSR } from "./SN74LVC08ANSR.circuit.tsx"; -import { SN74LVC125APWR } from "./SN74LVC125APWR.circuit.tsx"; -import { SN74LVC14ADGVR } from "./SN74LVC14ADGVR.circuit.tsx"; -import { SN74LVC1G04YZPR } from "./SN74LVC1G04YZPR.circuit.tsx"; -import { SN74LVC1G07DCK3 } from "./SN74LVC1G07DCK3.circuit.tsx"; -import { SN74LVC1G08DCKR } from "./SN74LVC1G08DCKR.circuit.tsx"; -import { SN74LVC1G11DBVR } from "./SN74LVC1G11DBVR.circuit.tsx"; -import { SN74LVC1G125YZPR } from "./SN74LVC1G125YZPR.circuit.tsx"; -import { SN74LVC1G126DBVT } from "./SN74LVC1G126DBVT.circuit.tsx"; -import { SN74LVC1G14DRLR } from "./SN74LVC1G14DRLR.circuit.tsx"; -import { SN74LVC1G17DBVT } from "./SN74LVC1G17DBVT.circuit.tsx"; -import { SN74LVC1G3157YZPR } from "./SN74LVC1G3157YZPR.circuit.tsx"; -import { SN74LVC1G32DRY2 } from "./SN74LVC1G32DRY2.circuit.tsx"; -import { A_74LVC1G332DBVRG4 } from "./A_74LVC1G332DBVRG4.circuit.tsx"; -import { SN74LVC1G74DCUR } from "./SN74LVC1G74DCUR.circuit.tsx"; -import { SN74LVC1G86DCKR } from "./SN74LVC1G86DCKR.circuit.tsx"; -import { SN74LVC1GU04DBVR } from "./SN74LVC1GU04DBVR.circuit.tsx"; -import { SN74LVC2G07YZPR } from "./SN74LVC2G07YZPR.circuit.tsx"; -import { SN74LVC2G08DCUR } from "./SN74LVC2G08DCUR.circuit.tsx"; -import { SN74LVC2G125DCU3 } from "./SN74LVC2G125DCU3.circuit.tsx"; -import { SN74LVC2G132DCTR } from "./SN74LVC2G132DCTR.circuit.tsx"; -import { SN74LVC2G240DCTR } from "./SN74LVC2G240DCTR.circuit.tsx"; -import { SN74LVC2G34YZPR } from "./SN74LVC2G34YZPR.circuit.tsx"; -import { SN74LVC3G07DCUR } from "./SN74LVC3G07DCUR.circuit.tsx"; -import { TAC5112IRGER } from "./TAC5112IRGER.circuit.tsx"; -import { TCA6408APWR } from "./TCA6408APWR.circuit.tsx"; -import { TCA9535DBR } from "./TCA9535DBR.circuit.tsx"; -import { TCA9803DGKR } from "./TCA9803DGKR.circuit.tsx"; -import { TCAN1044AVDRBRQ1 } from "./TCAN1044AVDRBRQ1.circuit.tsx"; -import { TCAN1057AVDRQ1 } from "./TCAN1057AVDRQ1.circuit.tsx"; -import { TFP401PZP } from "./TFP401PZP.circuit.tsx"; -import { THVD1410DR } from "./THVD1410DR.circuit.tsx"; -import { THVD1424RGTR } from "./THVD1424RGTR.circuit.tsx"; -import { THVD1450DGKR } from "./THVD1450DGKR.circuit.tsx"; -import { THVD1451DRBR } from "./THVD1451DRBR.circuit.tsx"; -import { THVD1452DGS } from "./THVD1452DGS.circuit.tsx"; -import { THVD1500DR } from "./THVD1500DR.circuit.tsx"; -import { THVD2410DGKR } from "./THVD2410DGKR.circuit.tsx"; -import { THVD2450DGKR } from "./THVD2450DGKR.circuit.tsx"; -import { THVD8000DDFR } from "./THVD8000DDFR.circuit.tsx"; -import { THVD8010DDFR } from "./THVD8010DDFR.circuit.tsx"; -import { A_74ACT16244DGGR } from "./A_74ACT16244DGGR.circuit.tsx"; -import { TIOL221RGER } from "./TIOL221RGER.circuit.tsx"; -import { TIOS1015DMWT } from "./TIOS1015DMWT.circuit.tsx"; -import { TL072HIPWR } from "./TL072HIPWR.circuit.tsx"; -import { TL074HIDYYR } from "./TL074HIDYYR.circuit.tsx"; -import { TL082HIDR } from "./TL082HIDR.circuit.tsx"; -import { TL084HIDYYR } from "./TL084HIDYYR.circuit.tsx"; -import { TL331IDBVR } from "./TL331IDBVR.circuit.tsx"; -import { TL331LVDBVR } from "./TL331LVDBVR.circuit.tsx"; -import { TL391LVDBVR } from "./TL391LVDBVR.circuit.tsx"; -import { TL431QDBZR } from "./TL431QDBZR.circuit.tsx"; -import { TL7712ACDR } from "./TL7712ACDR.circuit.tsx"; -import { TLA2024IRUGR } from "./TLA2024IRUGR.circuit.tsx"; -import { TLA2528IRTER } from "./TLA2528IRTER.circuit.tsx"; -import { TLA431AIDBZR } from "./TLA431AIDBZR.circuit.tsx"; -import { TLA432AQDBZR } from "./TLA432AQDBZR.circuit.tsx"; -import { TLC555IDR } from "./TLC555IDR.circuit.tsx"; -import { TLC59116 } from "./TLC59116.circuit.tsx"; -import { TLC5916IPWR } from "./TLC5916IPWR.circuit.tsx"; -import { TLC59283RGER } from "./TLC59283RGER.circuit.tsx"; -import { TLC5971PWPR } from "./TLC5971PWPR.circuit.tsx"; -import { TLC6946RGER } from "./TLC6946RGER.circuit.tsx"; -import { TLC69624QRSNRQ1 } from "./TLC69624QRSNRQ1.circuit.tsx"; -import { TLC69634QRSNRQ1 } from "./TLC69634QRSNRQ1.circuit.tsx"; -import { TLC69699DRRR } from "./TLC69699DRRR.circuit.tsx"; -import { TLE2022CDR } from "./TLE2022CDR.circuit.tsx"; -import { PTLIN821DRBRQ1 } from "./PTLIN821DRBRQ1.circuit.tsx"; -import { TLV1811QDBVRQ1 } from "./TLV1811QDBVRQ1.circuit.tsx"; -import { TLV1824DR } from "./TLV1824DR.circuit.tsx"; -import { TLV1842PWR } from "./TLV1842PWR.circuit.tsx"; -import { TLV3211DCKR } from "./TLV3211DCKR.circuit.tsx"; -import { TLV3212DGKR } from "./TLV3212DGKR.circuit.tsx"; -import { TLV333IDBVR } from "./TLV333IDBVR.circuit.tsx"; -import { TLV3512DGKR } from "./TLV3512DGKR.circuit.tsx"; -import { TLV369IDCKR } from "./TLV369IDCKR.circuit.tsx"; -import { TLV3691IDCKT } from "./TLV3691IDCKT.circuit.tsx"; -import { TLV376IDBVR } from "./TLV376IDBVR.circuit.tsx"; -import { TLV431AIDBVR } from "./TLV431AIDBVR.circuit.tsx"; -import { TLV431BQDBZR } from "./TLV431BQDBZR.circuit.tsx"; -import { TLV61047DDCR } from "./TLV61047DDCR.circuit.tsx"; -import { TLV7031DBVR } from "./TLV7031DBVR.circuit.tsx"; -import { TLV70450DBVR } from "./TLV70450DBVR.circuit.tsx"; -import { TLV7042DGKR } from "./TLV7042DGKR.circuit.tsx"; -import { TLV709A33DBVR } from "./TLV709A33DBVR.circuit.tsx"; -import { TLV74218PDQNR } from "./TLV74218PDQNR.circuit.tsx"; -import { TLV755P } from "./TLV755P.circuit.tsx"; -import { TLV75801PDBVR } from "./TLV75801PDBVR.circuit.tsx"; -import { TLV76133KVUR } from "./TLV76133KVUR.circuit.tsx"; -import { TLV77133PDBVR } from "./TLV77133PDBVR.circuit.tsx"; -import { TLV77330PDBVR } from "./TLV77330PDBVR.circuit.tsx"; -import { TLV803SDBZR } from "./TLV803SDBZR.circuit.tsx"; -import { TLV803EA30DBZR } from "./TLV803EA30DBZR.circuit.tsx"; -import { TLV8802DGKR } from "./TLV8802DGKR.circuit.tsx"; -import { TLV9001IDBVR } from "./TLV9001IDBVR.circuit.tsx"; -import { TLV9002IDSGR } from "./TLV9002IDSGR.circuit.tsx"; -import { TLV9022L1RUGR } from "./TLV9022L1RUGR.circuit.tsx"; -import { TLV9061IDPWR } from "./TLV9061IDPWR.circuit.tsx"; -import { TLV9062IDR } from "./TLV9062IDR.circuit.tsx"; -import { TLV9064IDR } from "./TLV9064IDR.circuit.tsx"; -import { TLV9102IDR } from "./TLV9102IDR.circuit.tsx"; -import { TLV9152IDR } from "./TLV9152IDR.circuit.tsx"; -import { TLV9301IDCKR } from "./TLV9301IDCKR.circuit.tsx"; -import { TLVH431AQDBVT } from "./TLVH431AQDBVT.circuit.tsx"; -import { TLVH432QDBZR } from "./TLVH432QDBZR.circuit.tsx"; -import { TLVM23625RDNR } from "./TLVM23625RDNR.circuit.tsx"; -import { TM4C123FH6PMT7 } from "./TM4C123FH6PMT7.circuit.tsx"; -import { TM4C123GH6PGEIR } from "./TM4C123GH6PGEIR.circuit.tsx"; -import { TM4C123GH6PMI7 } from "./TM4C123GH6PMI7.circuit.tsx"; -import { TM4C123GH6PZT7 } from "./TM4C123GH6PZT7.circuit.tsx"; -import { TM4C123GH6ZXRI7 } from "./TM4C123GH6ZXRI7.circuit.tsx"; -import { TMP102AIDRLR } from "./TMP102AIDRLR.circuit.tsx"; -import { TMP107BIDR } from "./TMP107BIDR.circuit.tsx"; -import { TMP1075 } from "./TMP1075.circuit.tsx"; -import { TMP116NAIDRVR } from "./TMP116NAIDRVR.circuit.tsx"; -import { TMP118MAIYMSR } from "./TMP118MAIYMSR.circuit.tsx"; -import { TMP119AIYBGR } from "./TMP119AIYBGR.circuit.tsx"; -import { TMP20AIDCKR } from "./TMP20AIDCKR.circuit.tsx"; -import { TMP235A2DBZR } from "./TMP235A2DBZR.circuit.tsx"; -import { TMP275AIDGKR } from "./TMP275AIDGKR.circuit.tsx"; -import { TMP302ADRLR } from "./TMP302ADRLR.circuit.tsx"; -import { F2800132PTR } from "./F2800132PTR.circuit.tsx"; -import { F2800133PMR } from "./F2800133PMR.circuit.tsx"; -import { F280025PNSR } from "./F280025PNSR.circuit.tsx"; -import { F280039CSPMR } from "./F280039CSPMR.circuit.tsx"; -import { F280040PMQR } from "./F280040PMQR.circuit.tsx"; -import { F280040CPMQR } from "./F280040CPMQR.circuit.tsx"; -import { F280041PZQR } from "./F280041PZQR.circuit.tsx"; -import { F280041CPZQR } from "./F280041CPZQR.circuit.tsx"; -import { F280049PZQ } from "./F280049PZQ.circuit.tsx"; -import { F280049CRSHSR } from "./F280049CRSHSR.circuit.tsx"; -import { F280049CPZQR } from "./F280049CPZQR.circuit.tsx"; -import { TMS320F28027PTQR } from "./TMS320F28027PTQR.circuit.tsx"; -import { TMS320F28035PNQ } from "./TMS320F28035PNQ.circuit.tsx"; -import { TMS320F28075PTPQ } from "./TMS320F28075PTPQ.circuit.tsx"; -import { TMS320F28374SPTPT } from "./TMS320F28374SPTPT.circuit.tsx"; -import { TMS320F28375SPZPQ } from "./TMS320F28375SPZPQ.circuit.tsx"; -import { TMS320F28377DZWTQ } from "./TMS320F28377DZWTQ.circuit.tsx"; -import { TMS320F28377SPTPS } from "./TMS320F28377SPTPS.circuit.tsx"; -import { TMS320F28377SPTPQ } from "./TMS320F28377SPTPQ.circuit.tsx"; -import { TMS320F28379DZWTT } from "./TMS320F28379DZWTT.circuit.tsx"; -import { F28P550SJ9PZR } from "./F28P550SJ9PZR.circuit.tsx"; -import { F28P650DK6PZPR } from "./F28P650DK6PZPR.circuit.tsx"; -import { TMS5700432BPZQQ1R } from "./TMS5700432BPZQQ1R.circuit.tsx"; -import { TMUX1104DGSR } from "./TMUX1104DGSR.circuit.tsx"; -import { TMUX1308APWR } from "./TMUX1308APWR.circuit.tsx"; -import { TMUX1574DYYR } from "./TMUX1574DYYR.circuit.tsx"; -import { TMUX4051BQBR } from "./TMUX4051BQBR.circuit.tsx"; -import { TMUX5411PWR } from "./TMUX5411PWR.circuit.tsx"; -import { TMUXHS4212RKSR } from "./TMUXHS4212RKSR.circuit.tsx"; -import { TPD1E01B04DPYR } from "./TPD1E01B04DPYR.circuit.tsx"; -import { TPD1E04U04DPYT } from "./TPD1E04U04DPYT.circuit.tsx"; -import { TPD1E0B04DPLT } from "./TPD1E0B04DPLT.circuit.tsx"; -import { TPD1E10B06DYAR } from "./TPD1E10B06DYAR.circuit.tsx"; -import { TPD1E1B04DPYR } from "./TPD1E1B04DPYR.circuit.tsx"; -import { TPD2E001DRSR } from "./TPD2E001DRSR.circuit.tsx"; -import { TPD2E007DCKR } from "./TPD2E007DCKR.circuit.tsx"; -import { TPD2E1B06DRLR } from "./TPD2E1B06DRLR.circuit.tsx"; -import { TPD2E2U06DRLR } from "./TPD2E2U06DRLR.circuit.tsx"; -import { TPD2EUSB30DRTR } from "./TPD2EUSB30DRTR.circuit.tsx"; -import { TPD2S017DBVR } from "./TPD2S017DBVR.circuit.tsx"; -import { TPD2S300YFFR } from "./TPD2S300YFFR.circuit.tsx"; -import { TPD4E001DCKR } from "./TPD4E001DCKR.circuit.tsx"; -import { TPD4E001QDBVRQ1 } from "./TPD4E001QDBVRQ1.circuit.tsx"; -import { TPD4E05U06DQAR } from "./TPD4E05U06DQAR.circuit.tsx"; -import { TPD4E1U06DCKR } from "./TPD4E1U06DCKR.circuit.tsx"; -import { TPD4F003DQDR } from "./TPD4F003DQDR.circuit.tsx"; -import { TPD4S012DRYR } from "./TPD4S012DRYR.circuit.tsx"; -import { TPD4S480RUKR } from "./TPD4S480RUKR.circuit.tsx"; -import { TPD6E001RSFR } from "./TPD6E001RSFR.circuit.tsx"; -import { TPD6S300ARUKR } from "./TPD6S300ARUKR.circuit.tsx"; -import { TPL5100DGSR } from "./TPL5100DGSR.circuit.tsx"; -import { TPL5110DDCT } from "./TPL5110DDCT.circuit.tsx"; -import { TPL5111DDCR } from "./TPL5111DDCR.circuit.tsx"; -import { TPL7407LADR } from "./TPL7407LADR.circuit.tsx"; -import { TPS16630PWPR } from "./TPS16630PWPR.circuit.tsx"; -import { TPS1HC03PQVAHRQ1 } from "./TPS1HC03PQVAHRQ1.circuit.tsx"; -import { TPS1HC100BQPWPRQ1 } from "./TPS1HC100BQPWPRQ1.circuit.tsx"; -import { TPS2121RUXR } from "./TPS2121RUXR.circuit.tsx"; -import { TPS22860DBVR } from "./TPS22860DBVR.circuit.tsx"; -import { TPS22910AYZVR } from "./TPS22910AYZVR.circuit.tsx"; -import { TPS22912CYZVR } from "./TPS22912CYZVR.circuit.tsx"; -import { TPS22916BYFPR } from "./TPS22916BYFPR.circuit.tsx"; -import { TPS22918DBVT } from "./TPS22918DBVT.circuit.tsx"; -import { TPS22919 } from "./TPS22919.circuit.tsx"; -import { TPS22945DCKR } from "./TPS22945DCKR.circuit.tsx"; -import { TPS22946YZPR } from "./TPS22946YZPR.circuit.tsx"; -import { TPS22948DCKR } from "./TPS22948DCKR.circuit.tsx"; -import { TPS22970YZPR } from "./TPS22970YZPR.circuit.tsx"; -import { TPS22975NDSGR } from "./TPS22975NDSGR.circuit.tsx"; -import { TPS22990DMLR } from "./TPS22990DMLR.circuit.tsx"; -import { TPS22991CNRAAR } from "./TPS22991CNRAAR.circuit.tsx"; -import { TPS22992SRXNR } from "./TPS22992SRXNR.circuit.tsx"; -import { TPS22995RZFR } from "./TPS22995RZFR.circuit.tsx"; -import { TPS2400DBVR } from "./TPS2400DBVR.circuit.tsx"; -import { TPS24750RUVR } from "./TPS24750RUVR.circuit.tsx"; -import { TPS2491DGS } from "./TPS2491DGS.circuit.tsx"; -import { TPS25221DBVR } from "./TPS25221DBVR.circuit.tsx"; -import { TPS2553DDBVR } from "./TPS2553DDBVR.circuit.tsx"; -import { TPS2590RSAR } from "./TPS2590RSAR.circuit.tsx"; -import { TPS259241DRCR } from "./TPS259241DRCR.circuit.tsx"; -import { TPS259461ARPWR } from "./TPS259461ARPWR.circuit.tsx"; -import { TPS259472ARPWR } from "./TPS259472ARPWR.circuit.tsx"; -import { TPS259481AYWPR } from "./TPS259481AYWPR.circuit.tsx"; -import { TPS259541DSGR } from "./TPS259541DSGR.circuit.tsx"; -import { TPS25972ARPWR } from "./TPS25972ARPWR.circuit.tsx"; -import { TPS259814LRPWR } from "./TPS259814LRPWR.circuit.tsx"; -import { TPS259830ONRGER } from "./TPS259830ONRGER.circuit.tsx"; -import { TPS26400PWPR } from "./TPS26400PWPR.circuit.tsx"; -import { TPS26600PWPR } from "./TPS26600PWPR.circuit.tsx"; -import { TPS26625DRCR } from "./TPS26625DRCR.circuit.tsx"; -import { TPS26632RGET } from "./TPS26632RGET.circuit.tsx"; -import { TPS27081ADDCR } from "./TPS27081ADDCR.circuit.tsx"; -import { TPS2HC08PQVAHRQ1 } from "./TPS2HC08PQVAHRQ1.circuit.tsx"; -import { TPS2HC16PQVAHRQ1 } from "./TPS2HC16PQVAHRQ1.circuit.tsx"; -import { TPS3106K33DBVR } from "./TPS3106K33DBVR.circuit.tsx"; -import { TPS3305_18DGNR } from "./TPS3305_18DGNR.circuit.tsx"; -import { TPS3424A11C13ADRLR } from "./TPS3424A11C13ADRLR.circuit.tsx"; -import { TPS3435JFMAFDSER } from "./TPS3435JFMAFDSER.circuit.tsx"; -import { TPS35AA38AGADDFRQ1 } from "./TPS35AA38AGADDFRQ1.circuit.tsx"; -import { TPS3700DDCT } from "./TPS3700DDCT.circuit.tsx"; -import { TPS3700QDDCRQ1 } from "./TPS3700QDDCRQ1.circuit.tsx"; -import { TPS3702CX33DDCR } from "./TPS3702CX33DDCR.circuit.tsx"; -import { TPS3710DDCR } from "./TPS3710DDCR.circuit.tsx"; -import { TPS3808EG33DBVR } from "./TPS3808EG33DBVR.circuit.tsx"; -import { TPS3823_33DBVR } from "./TPS3823_33DBVR.circuit.tsx"; -import { TPS3828_50DBVR } from "./TPS3828_50DBVR.circuit.tsx"; -import { TPS3831G18DQNR } from "./TPS3831G18DQNR.circuit.tsx"; -import { TPS3840DL28DBVR } from "./TPS3840DL28DBVR.circuit.tsx"; -import { TPS386000RGPR } from "./TPS386000RGPR.circuit.tsx"; -import { TPS389030DSER } from "./TPS389030DSER.circuit.tsx"; -import { TPS389006007RTER } from "./TPS389006007RTER.circuit.tsx"; -import { TPS40210QDGQRQ1 } from "./TPS40210QDGQRQ1.circuit.tsx"; -import { TPS43061RTET } from "./TPS43061RTET.circuit.tsx"; -import { TPS51200DRCR } from "./TPS51200DRCR.circuit.tsx"; -import { TPS51206DSQR } from "./TPS51206DSQR.circuit.tsx"; -import { TPS54201DDCT } from "./TPS54201DDCT.circuit.tsx"; -import { TPS54338RQFR } from "./TPS54338RQFR.circuit.tsx"; -import { TPS54386PWPR } from "./TPS54386PWPR.circuit.tsx"; -import { TPS54538RQFR } from "./TPS54538RQFR.circuit.tsx"; -import { TPS55285VALR } from "./TPS55285VALR.circuit.tsx"; -import { TPS560430XDBVR } from "./TPS560430XDBVR.circuit.tsx"; -import { TPS561243DRLR } from "./TPS561243DRLR.circuit.tsx"; -import { TPS563252DRLR } from "./TPS563252DRLR.circuit.tsx"; -import { TPS564252DRLR } from "./TPS564252DRLR.circuit.tsx"; -import { TPS565242DRLR } from "./TPS565242DRLR.circuit.tsx"; -import { TPS566231PRQFR } from "./TPS566231PRQFR.circuit.tsx"; -import { TPS61021ADSGR } from "./TPS61021ADSGR.circuit.tsx"; -import { TPS61094DSSR } from "./TPS61094DSSR.circuit.tsx"; -import { TPS61096ADSSR } from "./TPS61096ADSSR.circuit.tsx"; -import { TPS61158DRVR } from "./TPS61158DRVR.circuit.tsx"; -import { TPS61161DRVR } from "./TPS61161DRVR.circuit.tsx"; -import { TPS61165DRVR } from "./TPS61165DRVR.circuit.tsx"; -import { TPS61169DCKR } from "./TPS61169DCKR.circuit.tsx"; -import { TPS61222 } from "./TPS61222.circuit.tsx"; -import { TPS61299DRLR } from "./TPS61299DRLR.circuit.tsx"; -import { TPS613771RYHR } from "./TPS613771RYHR.circuit.tsx"; -import { TPS62177DQCT } from "./TPS62177DQCT.circuit.tsx"; -import { TPS62824ADMQR } from "./TPS62824ADMQR.circuit.tsx"; -import { TPS62842DGRR } from "./TPS62842DGRR.circuit.tsx"; -import { TPS628502QDRLRQ1 } from "./TPS628502QDRLRQ1.circuit.tsx"; -import { TPS62933PDRLR } from "./TPS62933PDRLR.circuit.tsx"; -import { TPS62A01PDDCR } from "./TPS62A01PDDCR.circuit.tsx"; -import { TPS62A03ADRLR } from "./TPS62A03ADRLR.circuit.tsx"; -import { TPS631000DRLR } from "./TPS631000DRLR.circuit.tsx"; -import { TPS63900DSKR } from "./TPS63900DSKR.circuit.tsx"; -import { TPS65023BRSBR } from "./TPS65023BRSBR.circuit.tsx"; -import { TPS650250RHBT } from "./TPS650250RHBT.circuit.tsx"; -import { TPS65105PWPR } from "./TPS65105PWPR.circuit.tsx"; -import { TPS65130RGER } from "./TPS65130RGER.circuit.tsx"; -import { TPS65145RGER } from "./TPS65145RGER.circuit.tsx"; -import { TPS6521401VAFR } from "./TPS6521401VAFR.circuit.tsx"; -import { TPS65217CRSLR } from "./TPS65217CRSLR.circuit.tsx"; -import { TPS6521815RSLR } from "./TPS6521815RSLR.circuit.tsx"; -import { TPS6521902RSMR } from "./TPS6521902RSMR.circuit.tsx"; -import { TPS6522430RAHRQ1 } from "./TPS6522430RAHRQ1.circuit.tsx"; -import { TPS65296RJER } from "./TPS65296RJER.circuit.tsx"; -import { TPS65381AQDAPRQ1 } from "./TPS65381AQDAPRQ1.circuit.tsx"; -import { O3853QDCARQ1 } from "./O3853QDCARQ1.circuit.tsx"; -import { TPS65910A31A1RSLR } from "./TPS65910A31A1RSLR.circuit.tsx"; -import { TPS65931211RWERQ1 } from "./TPS65931211RWERQ1.circuit.tsx"; -import { TPS65930A2ZCHR } from "./TPS65930A2ZCHR.circuit.tsx"; -import { TPS70950QDBVRQ1 } from "./TPS70950QDBVRQ1.circuit.tsx"; -import { TPS76350QDBVRQ1 } from "./TPS76350QDBVRQ1.circuit.tsx"; -import { TPS78233DDCR } from "./TPS78233DDCR.circuit.tsx"; -import { TPS7A1633DGNR } from "./TPS7A1633DGNR.circuit.tsx"; -import { TPS7A20 } from "./TPS7A20.circuit.tsx"; -import { TPS7A2525DRVR } from "./TPS7A2525DRVR.circuit.tsx"; -import { TPS7A4901DGNR } from "./TPS7A4901DGNR.circuit.tsx"; -import { TPS7A5301BRPSR } from "./TPS7A5301BRPSR.circuit.tsx"; -import { TPS7A9401DSCR } from "./TPS7A9401DSCR.circuit.tsx"; -import { TPS7A9601DSCR } from "./TPS7A9601DSCR.circuit.tsx"; -import { TPS7B4255QDBVRQ1 } from "./TPS7B4255QDBVRQ1.circuit.tsx"; -import { TPS7B4260QDDARQ1 } from "./TPS7B4260QDDARQ1.circuit.tsx"; -import { TPS7E7101DBVR } from "./TPS7E7101DBVR.circuit.tsx"; -import { TPS7E8150DBVR } from "./TPS7E8150DBVR.circuit.tsx"; -import { TPS92200D2RXLR } from "./TPS92200D2RXLR.circuit.tsx"; -import { TPS922051D1DGNR } from "./TPS922051D1DGNR.circuit.tsx"; -import { TPS92612DBVR } from "./TPS92612DBVR.circuit.tsx"; -import { TPS92640PWPR_NOPB } from "./TPS92640PWPR_NOPB.circuit.tsx"; -import { TPS92761QPHPRQ1 } from "./TPS92761QPHPRQ1.circuit.tsx"; -import { TPSM64406RCHR } from "./TPSM64406RCHR.circuit.tsx"; -import { TPSM828214SILR } from "./TPSM828214SILR.circuit.tsx"; -import { TPSM828223SILR } from "./TPSM828223SILR.circuit.tsx"; -import { TPSM828301ARDSR } from "./TPSM828301ARDSR.circuit.tsx"; -import { TPSM828303ARDSR } from "./TPSM828303ARDSR.circuit.tsx"; -import { TPSM82901SISR } from "./TPSM82901SISR.circuit.tsx"; -import { TPSM82903SISR } from "./TPSM82903SISR.circuit.tsx"; -import { TPSM843620SITR } from "./TPSM843620SITR.circuit.tsx"; -import { TPSM863252RDXR } from "./TPSM863252RDXR.circuit.tsx"; -import { TPSM8A29RDGR } from "./TPSM8A29RDGR.circuit.tsx"; -import { TRF7964ARHBR } from "./TRF7964ARHBR.circuit.tsx"; -import { TRF7970ARHBR } from "./TRF7970ARHBR.circuit.tsx"; -import { TRS3122ERGER } from "./TRS3122ERGER.circuit.tsx"; -import { TRS3232EIRGTR } from "./TRS3232EIRGTR.circuit.tsx"; -import { TRS3243ECDBR } from "./TRS3243ECDBR.circuit.tsx"; -import { TRS3318EIPWR } from "./TRS3318EIPWR.circuit.tsx"; -import { TRS3386ECPWR } from "./TRS3386ECPWR.circuit.tsx"; -import { TRSF3223EIRGWR } from "./TRSF3223EIRGWR.circuit.tsx"; -import { TS3DV642RUATQ1 } from "./TS3DV642RUATQ1.circuit.tsx"; -import { TS3USB221RSER } from "./TS3USB221RSER.circuit.tsx"; -import { TS5A3157DCKR } from "./TS5A3157DCKR.circuit.tsx"; -import { TS5A3159ADBVR } from "./TS5A3159ADBVR.circuit.tsx"; -import { TS5A3160DBVR } from "./TS5A3160DBVR.circuit.tsx"; -import { TS5A3166DBVR } from "./TS5A3166DBVR.circuit.tsx"; -import { TS5A3166QDCKRQ1 } from "./TS5A3166QDCKRQ1.circuit.tsx"; -import { TS5A9411DCKR } from "./TS5A9411DCKR.circuit.tsx"; -import { TSD05DYFR } from "./TSD05DYFR.circuit.tsx"; -import { TSM24CADBZR } from "./TSM24CADBZR.circuit.tsx"; -import { TUSB1004RNQR } from "./TUSB1004RNQR.circuit.tsx"; -import { TUSB1046_DCIRNQR } from "./TUSB1046_DCIRNQR.circuit.tsx"; -import { TUSB8041RGCR } from "./TUSB8041RGCR.circuit.tsx"; -import { TUSB8042ARGCR } from "./TUSB8042ARGCR.circuit.tsx"; -import { TVS0500DRVR } from "./TVS0500DRVR.circuit.tsx"; -import { TVS1400DRVR } from "./TVS1400DRVR.circuit.tsx"; -import { TVS1401DRBR } from "./TVS1401DRBR.circuit.tsx"; -import { TVS2700DRVR } from "./TVS2700DRVR.circuit.tsx"; -import { TVS3300YZFR } from "./TVS3300YZFR.circuit.tsx"; -import { TXE8124DGSR } from "./TXE8124DGSR.circuit.tsx"; -import { TXS0104ERGYR } from "./TXS0104ERGYR.circuit.tsx"; -import { TXS0108EPWR } from "./TXS0108EPWR.circuit.tsx"; -import { TXV0108QWRGYRQ1 } from "./TXV0108QWRGYRQ1.circuit.tsx"; -import { UA78M05CDCYR } from "./UA78M05CDCYR.circuit.tsx"; -import { UC2845D8TR } from "./UC2845D8TR.circuit.tsx"; -import { UCC21330ADR } from "./UCC21330ADR.circuit.tsx"; -import { UCC21550ADWR } from "./UCC21550ADWR.circuit.tsx"; -import { UCC21750DWR } from "./UCC21750DWR.circuit.tsx"; -import { UCC23525CDWYR } from "./UCC23525CDWYR.circuit.tsx"; -import { UCC24610DRBR } from "./UCC24610DRBR.circuit.tsx"; -import { UCC24612_2DBVR } from "./UCC24612_2DBVR.circuit.tsx"; -import { UCC24624DT } from "./UCC24624DT.circuit.tsx"; -import { UCC24630DBVT } from "./UCC24630DBVT.circuit.tsx"; -import { UCC24636DBVR } from "./UCC24636DBVR.circuit.tsx"; -import { UCC25600DR } from "./UCC25600DR.circuit.tsx"; -import { UCC256610DDBR } from "./UCC256610DDBR.circuit.tsx"; -import { UCC25800AQDGNRQ1 } from "./UCC25800AQDGNRQ1.circuit.tsx"; -import { UCC27201ADDAR } from "./UCC27201ADDAR.circuit.tsx"; -import { UCC27211DR } from "./UCC27211DR.circuit.tsx"; -import { UCC27301ADR } from "./UCC27301ADR.circuit.tsx"; -import { UCC27302ADRCR } from "./UCC27302ADRCR.circuit.tsx"; -import { UCC27332QDGNRQ1 } from "./UCC27332QDGNRQ1.circuit.tsx"; -import { UCC27444DR } from "./UCC27444DR.circuit.tsx"; -import { UCC27511ADBVT } from "./UCC27511ADBVT.circuit.tsx"; -import { UCC27517ADBVR } from "./UCC27517ADBVR.circuit.tsx"; -import { UCC27523D } from "./UCC27523D.circuit.tsx"; -import { UCC27614DR } from "./UCC27614DR.circuit.tsx"; -import { UCC27624DSDR } from "./UCC27624DSDR.circuit.tsx"; -import { UCC27734DR } from "./UCC27734DR.circuit.tsx"; -import { UCC27735DR } from "./UCC27735DR.circuit.tsx"; -import { UCC28019ADR } from "./UCC28019ADR.circuit.tsx"; -import { UCC2803DTR } from "./UCC2803DTR.circuit.tsx"; -import { UCC2805DTR } from "./UCC2805DTR.circuit.tsx"; -import { UCC28051DR } from "./UCC28051DR.circuit.tsx"; -import { UCC28056BDBVR } from "./UCC28056BDBVR.circuit.tsx"; -import { UCC28070PWR } from "./UCC28070PWR.circuit.tsx"; -import { UCC28070QPWRQ1 } from "./UCC28070QPWRQ1.circuit.tsx"; -import { UCC28180DR } from "./UCC28180DR.circuit.tsx"; -import { UCC28600DR } from "./UCC28600DR.circuit.tsx"; -import { UCC28700DBVT } from "./UCC28700DBVT.circuit.tsx"; -import { UCC28711DR } from "./UCC28711DR.circuit.tsx"; -import { UCC28740DR } from "./UCC28740DR.circuit.tsx"; -import { UCC287501DBVR } from "./UCC287501DBVR.circuit.tsx"; -import { UCC28881D } from "./UCC28881D.circuit.tsx"; -import { UCC28910DR } from "./UCC28910DR.circuit.tsx"; -import { UCC28911DR } from "./UCC28911DR.circuit.tsx"; -import { UCC28950PWR } from "./UCC28950PWR.circuit.tsx"; -import { UCC28C50DGKR } from "./UCC28C50DGKR.circuit.tsx"; -import { UCC28C52DR } from "./UCC28C52DR.circuit.tsx"; -import { UCC28C53DR } from "./UCC28C53DR.circuit.tsx"; -import { UCC28C54DR } from "./UCC28C54DR.circuit.tsx"; -import { UCC28C55DR } from "./UCC28C55DR.circuit.tsx"; -import { UCC29950DR } from "./UCC29950DR.circuit.tsx"; -import { UCC33420RAQR } from "./UCC33420RAQR.circuit.tsx"; -import { UCC33420QRAQRQ1 } from "./UCC33420QRAQRQ1.circuit.tsx"; -import { UCC38C42DR } from "./UCC38C42DR.circuit.tsx"; -import { UCC38C43DR } from "./UCC38C43DR.circuit.tsx"; -import { UCC38C45DR } from "./UCC38C45DR.circuit.tsx"; -import { UCC5320ECDR } from "./UCC5320ECDR.circuit.tsx"; -import { UCC5350SBDR } from "./UCC5350SBDR.circuit.tsx"; -import { UCC5390ECDWVR } from "./UCC5390ECDWVR.circuit.tsx"; -import { UCC57108CDR } from "./UCC57108CDR.circuit.tsx"; -import { UCD3138ARGCR } from "./UCD3138ARGCR.circuit.tsx"; -import { UCD7138DRSR } from "./UCD7138DRSR.circuit.tsx"; -import { UCD90160RGCT } from "./UCD90160RGCT.circuit.tsx"; -import { UCG28828_1REZR } from "./UCG28828_1REZR.circuit.tsx"; -import { ULN2003AIDR } from "./ULN2003AIDR.circuit.tsx"; -import { ULN2803CDWR } from "./ULN2803CDWR.circuit.tsx"; -import { XTR200DQCR } from "./XTR200DQCR.circuit.tsx"; +import { ADC101C021CIMM_NOPB } from "./ADC101C021CIMM_NOPB.tsx"; +import { ADC128S022CIMTX_NOPB } from "./ADC128S022CIMTX_NOPB.tsx"; +import { ADS1015LIDGSR } from "./ADS1015LIDGSR.tsx"; +import { ADS1114IDGST } from "./ADS1114IDGST.tsx"; +import { ADS1118IDGSR } from "./ADS1118IDGSR.tsx"; +import { ADS114S08IRHBT } from "./ADS114S08IRHBT.tsx"; +import { ADS122S14IRTER } from "./ADS122S14IRTER.tsx"; +import { ADS124S08IRHBT } from "./ADS124S08IRHBT.tsx"; +import { ADS131M03IRUKR } from "./ADS131M03IRUKR.tsx"; +import { ADS7042IDCUT } from "./ADS7042IDCUT.tsx"; +import { ADS7142IRUGR } from "./ADS7142IRUGR.tsx"; +import { ADS7885SDBVT } from "./ADS7885SDBVT.tsx"; +import { ADS8885IDGSR } from "./ADS8885IDGSR.tsx"; +import { AM26C31IDR } from "./AM26C31IDR.tsx"; +import { AM26C32CDR } from "./AM26C32CDR.tsx"; +import { AM3352BZCZ100 } from "./AM3352BZCZ100.tsx"; +import { AM3357BZCZA80 } from "./AM3357BZCZA80.tsx"; +import { AM4376BZDND80 } from "./AM4376BZDND80.tsx"; +import { AM4378BZDND100 } from "./AM4378BZDND100.tsx"; +import { AM4379BZDNA100 } from "./AM4379BZDNA100.tsx"; +import { AM5726BABCXA } from "./AM5726BABCXA.tsx"; +import { AM62A32AOMHIAMBR } from "./AM62A32AOMHIAMBR.tsx"; +import { AM62A74AUMHAAMBR } from "./AM62A74AUMHAAMBR.tsx"; +import { AM62L32BEGHAANBR } from "./AM62L32BEGHAANBR.tsx"; +import { AM6442BSEFHAALV } from "./AM6442BSEFHAALV.tsx"; +import { AM67A74AKGHIAMWR } from "./AM67A74AKGHIAMWR.tsx"; +import { AMC0300DDWVR } from "./AMC0300DDWVR.tsx"; +import { AMC0311DQDWVRQ1 } from "./AMC0311DQDWVRQ1.tsx"; +import { AMC1211AQDWVQ1 } from "./AMC1211AQDWVQ1.tsx"; +import { AMC1351QDWVRQ1 } from "./AMC1351QDWVRQ1.tsx"; +import { ATL431LIBQDBZR } from "./ATL431LIBQDBZR.tsx"; +import { BQ24600RVAR } from "./BQ24600RVAR.tsx"; +import { BQ24725ARGRR } from "./BQ24725ARGRR.tsx"; +import { BQ24780SRUYR } from "./BQ24780SRUYR.tsx"; +import { BQ25185DLHR } from "./BQ25185DLHR.tsx"; +import { BQ25188YBGR } from "./BQ25188YBGR.tsx"; +import { BQ25622RYKR } from "./BQ25622RYKR.tsx"; +import { BQ25630YBGR } from "./BQ25630YBGR.tsx"; +import { BQ25638YBGR } from "./BQ25638YBGR.tsx"; +import { BQ25731RSNR } from "./BQ25731RSNR.tsx"; +import { BQ25756RRVR } from "./BQ25756RRVR.tsx"; +import { BQ25887RGER } from "./BQ25887RGER.tsx"; +import { BQ25895 } from "./BQ25895.tsx"; +import { BQ27426YZFR } from "./BQ27426YZFR.tsx"; +import { BQ32000DR } from "./BQ32000DR.tsx"; +import { BQ51003YFPR } from "./BQ51003YFPR.tsx"; +import { BQ51013CRHLR } from "./BQ51013CRHLR.tsx"; +import { CC1101RGPR } from "./CC1101RGPR.tsx"; +import { CC1120RHBR } from "./CC1120RHBR.tsx"; +import { CC1125RHBR } from "./CC1125RHBR.tsx"; +import { CC113LRGPR } from "./CC113LRGPR.tsx"; +import { CC1310F128RHBR } from "./CC1310F128RHBR.tsx"; +import { CC1311R31T0RKPR } from "./CC1311R31T0RKPR.tsx"; +import { CC1312PSIPMOTR } from "./CC1312PSIPMOTR.tsx"; +import { CC1314R106T0RGZR } from "./CC1314R106T0RGZR.tsx"; +import { CC1354P106T0RSKR } from "./CC1354P106T0RSKR.tsx"; +import { CC2340R21N0RGER } from "./CC2340R21N0RGER.tsx"; +import { CC2340R5 } from "./CC2340R5.tsx"; +import { CC2340R5MODAN0MHAR } from "./CC2340R5MODAN0MHAR.tsx"; +import { CC2500RGPR } from "./CC2500RGPR.tsx"; +import { CC2530F128RHAR } from "./CC2530F128RHAR.tsx"; +import { CC2531F128RHAR } from "./CC2531F128RHAR.tsx"; +import { CC2540F256RHAR } from "./CC2540F256RHAR.tsx"; +import { CC2592RGVR } from "./CC2592RGVR.tsx"; +import { CC2620F128RGZR } from "./CC2620F128RGZR.tsx"; +import { CC2652RB1FRGZR } from "./CC2652RB1FRGZR.tsx"; +import { CC2755P105E0WRHAR } from "./CC2755P105E0WRHAR.tsx"; +import { CC2755P207E0WRHAR } from "./CC2755P207E0WRHAR.tsx"; +import { CC3100R11MRGCR } from "./CC3100R11MRGCR.tsx"; +import { CC3100MODR11MAMOBT } from "./CC3100MODR11MAMOBT.tsx"; +import { CC3200R1M2RGC } from "./CC3200R1M2RGC.tsx"; +import { CC3200MODR1M2AMOBR } from "./CC3200MODR1M2AMOBR.tsx"; +import { CC3220MODASM2MONR } from "./CC3220MODASM2MONR.tsx"; +import { CC3300MODENIAMOZR } from "./CC3300MODENIAMOZR.tsx"; +import { CC3301MODENIAMOZR } from "./CC3301MODENIAMOZR.tsx"; +import { CC3350MODENIAMOZR } from "./CC3350MODENIAMOZR.tsx"; +import { CC3351MODENIAMOZR } from "./CC3351MODENIAMOZR.tsx"; +import { CC3501ENJARSHR } from "./CC3501ENJARSHR.tsx"; +import { CC3551ENJARSHR } from "./CC3551ENJARSHR.tsx"; +import { CD4069UBM96 } from "./CD4069UBM96.tsx"; +import { CD74HC4067SM96 } from "./CD74HC4067SM96.tsx"; +import { CD74HCT21M96 } from "./CD74HCT21M96.tsx"; +import { CD74HCT4067M } from "./CD74HCT4067M.tsx"; +import { CDCE62002RHBT } from "./CDCE62002RHBT.tsx"; +import { CDCE913PWR } from "./CDCE913PWR.tsx"; +import { CDCLVC1106PWR } from "./CDCLVC1106PWR.tsx"; +import { CDCM9102RHBR } from "./CDCM9102RHBR.tsx"; +import { CSD13381F4T } from "./CSD13381F4T.tsx"; +import { CSD17382F4T } from "./CSD17382F4T.tsx"; +import { CSD17483F4T } from "./CSD17483F4T.tsx"; +import { CSD17484F4 } from "./CSD17484F4.tsx"; +import { CSD17571Q2 } from "./CSD17571Q2.tsx"; +import { CSD17573Q5B } from "./CSD17573Q5B.tsx"; +import { CSD17577Q3AT } from "./CSD17577Q3AT.tsx"; +import { CSD17578Q5A } from "./CSD17578Q5A.tsx"; +import { CSD17579Q3A } from "./CSD17579Q3A.tsx"; +import { CSD17581Q3AT } from "./CSD17581Q3AT.tsx"; +import { CSD18510Q5B } from "./CSD18510Q5B.tsx"; +import { CSD18513Q5A } from "./CSD18513Q5A.tsx"; +import { CSD18514Q5A } from "./CSD18514Q5A.tsx"; +import { CSD18531Q5AT } from "./CSD18531Q5AT.tsx"; +import { CSD18532Q5B } from "./CSD18532Q5B.tsx"; +import { CSD18534Q5A } from "./CSD18534Q5A.tsx"; +import { CSD18540Q5BT } from "./CSD18540Q5BT.tsx"; +import { CSD18541F5T } from "./CSD18541F5T.tsx"; +import { CSD18543Q3AT } from "./CSD18543Q3AT.tsx"; +import { CSD19501KCS } from "./CSD19501KCS.tsx"; +import { CSD19502Q5B } from "./CSD19502Q5B.tsx"; +import { CSD19531Q5AT } from "./CSD19531Q5AT.tsx"; +import { CSD19534Q5A } from "./CSD19534Q5A.tsx"; +import { CSD19535KTT } from "./CSD19535KTT.tsx"; +import { CSD19537Q3T } from "./CSD19537Q3T.tsx"; +import { CSD19538Q2T } from "./CSD19538Q2T.tsx"; +import { CSD25481F4 } from "./CSD25481F4.tsx"; +import { CSD87502Q2T } from "./CSD87502Q2T.tsx"; +import { CSD88539NDT } from "./CSD88539NDT.tsx"; +import { DAC121S101CIMK_NOPB } from "./DAC121S101CIMK_NOPB.tsx"; +import { DAC43701DSGR } from "./DAC43701DSGR.tsx"; +import { DAC53202RTER } from "./DAC53202RTER.tsx"; +import { DAC53204YBHR } from "./DAC53204YBHR.tsx"; +import { DAC63001RTER } from "./DAC63001RTER.tsx"; +import { DAC80502DRXR } from "./DAC80502DRXR.tsx"; +import { DAC8411IDCKT } from "./DAC8411IDCKT.tsx"; +import { DAC8564IAPWR } from "./DAC8564IAPWR.tsx"; +import { DCH010505SN7 } from "./DCH010505SN7.tsx"; +import { DLP4500AFQD } from "./DLP4500AFQD.tsx"; +import { DM3730CUSD100 } from "./DM3730CUSD100.tsx"; +import { DP83822HRHBT } from "./DP83822HRHBT.tsx"; +import { DP83822IRHBR } from "./DP83822IRHBR.tsx"; +import { DP83825IRMQT } from "./DP83825IRMQT.tsx"; +import { DP83826AERHBR } from "./DP83826AERHBR.tsx"; +import { DP83826AIRHBR } from "./DP83826AIRHBR.tsx"; +import { DP83826IRHBR } from "./DP83826IRHBR.tsx"; +import { DP83867CRRGZR } from "./DP83867CRRGZR.tsx"; +import { DP83867ERGZR } from "./DP83867ERGZR.tsx"; +import { DP83867IRRGZT } from "./DP83867IRRGZT.tsx"; +import { DP83867ISRGZT } from "./DP83867ISRGZT.tsx"; +import { DRV110APWR } from "./DRV110APWR.tsx"; +import { DRV2605YZFR } from "./DRV2605YZFR.tsx"; +import { DRV2667RGPR } from "./DRV2667RGPR.tsx"; +import { DRV3256EPAPRQ1 } from "./DRV3256EPAPRQ1.tsx"; +import { DRV5013AGQLPG } from "./DRV5013AGQLPG.tsx"; +import { DRV5013ADELPGMQ1 } from "./DRV5013ADELPGMQ1.tsx"; +import { DRV8263HQVAKRQ1 } from "./DRV8263HQVAKRQ1.tsx"; +import { DRV83053QPHPRQ1 } from "./DRV83053QPHPRQ1.tsx"; +import { DRV8363QRGZRQ1 } from "./DRV8363QRGZRQ1.tsx"; +import { DS90LT012ATMF_NOPB } from "./DS90LT012ATMF_NOPB.tsx"; +import { DS90LV011ATMF_NOPB } from "./DS90LV011ATMF_NOPB.tsx"; +import { DS90LV047ATMX_NOPB } from "./DS90LV047ATMX_NOPB.tsx"; +import { DS90LV048ATMX_NOPB } from "./DS90LV048ATMX_NOPB.tsx"; +import { ESD122DMXR } from "./ESD122DMXR.tsx"; +import { ESD204DQAR } from "./ESD204DQAR.tsx"; +import { ESD321DPYR } from "./ESD321DPYR.tsx"; +import { ESD351DPYR } from "./ESD351DPYR.tsx"; +import { ESD401DPYR } from "./ESD401DPYR.tsx"; +import { ESD751DYAR } from "./ESD751DYAR.tsx"; +import { ESDS311DYFR } from "./ESDS311DYFR.tsx"; +import { F28E120SCTPTR } from "./F28E120SCTPTR.tsx"; +import { F28M35H52C1RFPQ } from "./F28M35H52C1RFPQ.tsx"; +import { FDC2212DNTR } from "./FDC2212DNTR.tsx"; +import { HD3SS3220RNHT } from "./HD3SS3220RNHT.tsx"; +import { HDC3020 } from "./HDC3020.tsx"; +import { HDC3021QDEHRQ1 } from "./HDC3021QDEHRQ1.tsx"; +import { HDC3022 } from "./HDC3022.tsx"; +import { INA138NA_3K } from "./INA138NA_3K.tsx"; +import { INA138QPWRQ1 } from "./INA138QPWRQ1.tsx"; +import { INA139NA_3K } from "./INA139NA_3K.tsx"; +import { INA169NA_3K } from "./INA169NA_3K.tsx"; +import { INA181A2IDBVR } from "./INA181A2IDBVR.tsx"; +import { INA186A2IDDFR } from "./INA186A2IDDFR.tsx"; +import { INA188IDR } from "./INA188IDR.tsx"; +import { INA199A3DCKR } from "./INA199A3DCKR.tsx"; +import { INA213BIDCKT } from "./INA213BIDCKT.tsx"; +import { INA2181A2IDGSR } from "./INA2181A2IDGSR.tsx"; +import { INA228AIDGSR } from "./INA228AIDGSR.tsx"; +import { INA230AIRGTR } from "./INA230AIRGTR.tsx"; +import { INA236AIYBJR } from "./INA236AIYBJR.tsx"; +import { INA240A1DR } from "./INA240A1DR.tsx"; +import { INA240A3QDRQ1 } from "./INA240A3QDRQ1.tsx"; +import { INA241A5IDDFR } from "./INA241A5IDDFR.tsx"; +import { INA280A3IDCKT } from "./INA280A3IDCKT.tsx"; +import { INA281A3IDBVR } from "./INA281A3IDBVR.tsx"; +import { INA296A4IDDFR } from "./INA296A4IDDFR.tsx"; +import { INA296B4IDDFR } from "./INA296B4IDDFR.tsx"; +import { INA310A4IDGKR } from "./INA310A4IDGKR.tsx"; +import { INA3221AIRGVR } from "./INA3221AIRGVR.tsx"; +import { INA818IDR } from "./INA818IDR.tsx"; +import { INA826AIDR } from "./INA826AIDR.tsx"; +import { ISO1042DWR } from "./ISO1042DWR.tsx"; +import { ISO1044BD } from "./ISO1044BD.tsx"; +import { ISO1050DWR } from "./ISO1050DWR.tsx"; +import { ISO1176DWR } from "./ISO1176DWR.tsx"; +import { ISO1410BDWR } from "./ISO1410BDWR.tsx"; +import { ISO1541DR } from "./ISO1541DR.tsx"; +import { ISO3082DWR } from "./ISO3082DWR.tsx"; +import { ISO3088DWR } from "./ISO3088DWR.tsx"; +import { ISO5452DWR } from "./ISO5452DWR.tsx"; +import { ISO5851DWR } from "./ISO5851DWR.tsx"; +import { ISO6420DR } from "./ISO6420DR.tsx"; +import { ISO6421DR } from "./ISO6421DR.tsx"; +import { ISO6421DRQ1 } from "./ISO6421DRQ1.tsx"; +import { ISO6431DBQR } from "./ISO6431DBQR.tsx"; +import { ISO6440DBQR } from "./ISO6440DBQR.tsx"; +import { ISO6440DBQRQ1 } from "./ISO6440DBQRQ1.tsx"; +import { ISO6441DWR } from "./ISO6441DWR.tsx"; +import { ISO6442DBQR } from "./ISO6442DBQR.tsx"; +import { ISO6521REUR } from "./ISO6521REUR.tsx"; +import { ISO7760DBQR } from "./ISO7760DBQR.tsx"; +import { ISO7841FDWW } from "./ISO7841FDWW.tsx"; +import { ISO7842DWR } from "./ISO7842DWR.tsx"; +import { IWRL6432BDBAAMFR } from "./IWRL6432BDBAAMFR.tsx"; +import { IWRL6432BRQAAMYR } from "./IWRL6432BRQAAMYR.tsx"; +import { XI6432BAFCLIMBBR } from "./XI6432BAFCLIMBBR.tsx"; +import { LDC1312DNTR } from "./LDC1312DNTR.tsx"; +import { LDC1314RGHR } from "./LDC1314RGHR.tsx"; +import { LDC1612DNTR } from "./LDC1612DNTR.tsx"; +import { LDC1614RGHR } from "./LDC1614RGHR.tsx"; +import { LM111733QKVURQ1 } from "./LM111733QKVURQ1.tsx"; +import { LM20CIM7_NOPB } from "./LM20CIM7_NOPB.tsx"; +import { LM20242MHX_NOPB } from "./LM20242MHX_NOPB.tsx"; +import { LM239N } from "./LM239N.tsx"; +import { LM2901AVQDRG4Q1 } from "./LM2901AVQDRG4Q1.tsx"; +import { LM2902BIDR } from "./LM2902BIDR.tsx"; +import { LM2903DR } from "./LM2903DR.tsx"; +import { LM2903BIDR } from "./LM2903BIDR.tsx"; +import { LM2904BIDGKR } from "./LM2904BIDGKR.tsx"; +import { LM321LVIDBVR } from "./LM321LVIDBVR.tsx"; +import { LM324BIPWR } from "./LM324BIPWR.tsx"; +import { LM339BIDR } from "./LM339BIDR.tsx"; +import { LM339LVPWR } from "./LM339LVPWR.tsx"; +import { LM358BIPWR } from "./LM358BIPWR.tsx"; +import { LM358LVIPWR } from "./LM358LVIPWR.tsx"; +import { LM3644YFFR } from "./LM3644YFFR.tsx"; +import { LM3880MF_1AC_NOPB } from "./LM3880MF_1AC_NOPB.tsx"; +import { LM3881MMX_NOPB } from "./LM3881MMX_NOPB.tsx"; +import { LM393PWR } from "./LM393PWR.tsx"; +import { LM393ADR } from "./LM393ADR.tsx"; +import { LM393BIDR } from "./LM393BIDR.tsx"; +import { LM4041A12IDBZR } from "./LM4041A12IDBZR.tsx"; +import { LM4041CIDCKR } from "./LM4041CIDCKR.tsx"; +import { LM4060A12EDBZR } from "./LM4060A12EDBZR.tsx"; +import { LM5020MM_2_NOPB } from "./LM5020MM_2_NOPB.tsx"; +import { LM5033SDX_NOPB } from "./LM5033SDX_NOPB.tsx"; +import { LM5050MK_1_NOPB } from "./LM5050MK_1_NOPB.tsx"; +import { LM5050Q1MK_1_NOPB } from "./LM5050Q1MK_1_NOPB.tsx"; +import { LM5060Q1MM_NOPB } from "./LM5060Q1MM_NOPB.tsx"; +import { LM5069MM_1_NOPB } from "./LM5069MM_1_NOPB.tsx"; +import { LM5106MMX_NOPB } from "./LM5106MMX_NOPB.tsx"; +import { LM5123QRGRRQ1 } from "./LM5123QRGRRQ1.tsx"; +import { LM51551DSSR } from "./LM51551DSSR.tsx"; +import { LM5156DSSR } from "./LM5156DSSR.tsx"; +import { LM5163DDAR } from "./LM5163DDAR.tsx"; +import { LM5164DDAR } from "./LM5164DDAR.tsx"; +import { LM536005QDSXRQ1 } from "./LM536005QDSXRQ1.tsx"; +import { LM62CIM3_NOPB } from "./LM62CIM3_NOPB.tsx"; +import { LM62460RPHR } from "./LM62460RPHR.tsx"; +import { LM74610QDGKRQ1 } from "./LM74610QDGKRQ1.tsx"; +import { LM74700QDRQ1 } from "./LM74700QDRQ1.tsx"; +import { LM74900QRGERQ1 } from "./LM74900QRGERQ1.tsx"; +import { LM95235DIMMX_NOPB } from "./LM95235DIMMX_NOPB.tsx"; +import { LMC555CMX_NOPB } from "./LMC555CMX_NOPB.tsx"; +import { LMG1210RVRR } from "./LMG1210RVRR.tsx"; +import { LMG3410R150RWHR } from "./LMG3410R150RWHR.tsx"; +import { LMG3411R070RWHR } from "./LMG3411R070RWHR.tsx"; +import { LMG3612REQR } from "./LMG3612REQR.tsx"; +import { LMK04828BISQE_NOPB } from "./LMK04828BISQE_NOPB.tsx"; +import { LMK1C1102PWR } from "./LMK1C1102PWR.tsx"; +import { LMK1C1103PWR } from "./LMK1C1103PWR.tsx"; +import { LMK1C1104DQFR } from "./LMK1C1104DQFR.tsx"; +import { LMK1C1108PWR } from "./LMK1C1108PWR.tsx"; +import { LMK6DA10000ADLFR } from "./LMK6DA10000ADLFR.tsx"; +import { LMP8480MMX_T_NOPB } from "./LMP8480MMX_T_NOPB.tsx"; +import { LMP8601MA_NOPB } from "./LMP8601MA_NOPB.tsx"; +import { LMP8601QMAX_NOPB } from "./LMP8601QMAX_NOPB.tsx"; +import { LMQ66430R5RXBR } from "./LMQ66430R5RXBR.tsx"; +import { LMQ66430MA3RXBRQ1 } from "./LMQ66430MA3RXBRQ1.tsx"; +import { LMR33630CRNXR } from "./LMR33630CRNXR.tsx"; +import { LMR36502F3RPER } from "./LMR36502F3RPER.tsx"; +import { LMR36520FADDAR } from "./LMR36520FADDAR.tsx"; +import { LMR43610R3RPER } from "./LMR43610R3RPER.tsx"; +import { LMR50410Y3FQDBVRQ1 } from "./LMR50410Y3FQDBVRQ1.tsx"; +import { LMR51610XDBVR } from "./LMR51610XDBVR.tsx"; +import { LMR51635YFDDCR } from "./LMR51635YFDDCR.tsx"; +import { LMT01LPG } from "./LMT01LPG.tsx"; +import { LMT70YFQR } from "./LMT70YFQR.tsx"; +import { LMT84DCKR } from "./LMT84DCKR.tsx"; +import { LMT86QDCKRQ1 } from "./LMT86QDCKRQ1.tsx"; +import { LMT88DCKR } from "./LMT88DCKR.tsx"; +import { LMV324AIPWR } from "./LMV324AIPWR.tsx"; +import { LMV331M5X_NOPB } from "./LMV331M5X_NOPB.tsx"; +import { LMV431CM5X_NOPB } from "./LMV431CM5X_NOPB.tsx"; +import { LMV431AIZ_NOPB } from "./LMV431AIZ_NOPB.tsx"; +import { LMV431BIMFX_NOPB } from "./LMV431BIMFX_NOPB.tsx"; +import { LP2980AIM5X_3_3_NOPB } from "./LP2980AIM5X_3_3_NOPB.tsx"; +import { LP2985AIM5_3_3_NOPB } from "./LP2985AIM5_3_3_NOPB.tsx"; +import { LP2998MAX_NOPB } from "./LP2998MAX_NOPB.tsx"; +import { LP5009PWR } from "./LP5009PWR.tsx"; +import { LP5036RJVR } from "./LP5036RJVR.tsx"; +import { LP5813AYBHR } from "./LP5813AYBHR.tsx"; +import { LPV821DBVR } from "./LPV821DBVR.tsx"; +import { LSF0108DGSR } from "./LSF0108DGSR.tsx"; +import { MAX3221CPWR } from "./MAX3221CPWR.tsx"; +import { MAX3221ECDBR } from "./MAX3221ECDBR.tsx"; +import { MSP430F5437AIPNR } from "./MSP430F5437AIPNR.tsx"; +import { MSP430F5528IZXHR } from "./MSP430F5528IZXHR.tsx"; +import { MSP430F5529IPN } from "./MSP430F5529IPN.tsx"; +import { MSP430FR2512IPW16R } from "./MSP430FR2512IPW16R.tsx"; +import { MSP430FR2532IRGER } from "./MSP430FR2532IRGER.tsx"; +import { MSP430FR2533IRHBR } from "./MSP430FR2533IRHBR.tsx"; +import { MSP430FR2632IYQWR } from "./MSP430FR2632IYQWR.tsx"; +import { MSP430FR2633IDAR } from "./MSP430FR2633IDAR.tsx"; +import { MSP430FR2672TRHBR } from "./MSP430FR2672TRHBR.tsx"; +import { MSP430FR2675TPTR } from "./MSP430FR2675TPTR.tsx"; +import { MSP430FR4133IPMR } from "./MSP430FR4133IPMR.tsx"; +import { MSP430FR5869IRGZR } from "./MSP430FR5869IRGZR.tsx"; +import { MSP430FR5969IRGZR } from "./MSP430FR5969IRGZR.tsx"; +import { MSPM0C1103SDSGR } from "./MSPM0C1103SDSGR.tsx"; +import { MSPM0C1104SDDFR } from "./MSPM0C1104SDDFR.tsx"; +import { MSPM0G1107TRHBR } from "./MSPM0G1107TRHBR.tsx"; +import { XMSPM0G1218SRGZR } from "./XMSPM0G1218SRGZR.tsx"; +import { MSPM0G1506SPMR } from "./MSPM0G1506SPMR.tsx"; +import { MSPM0G1518SPMR } from "./MSPM0G1518SPMR.tsx"; +import { MSPM0G5117SPMR } from "./MSPM0G5117SPMR.tsx"; +import { MSPM0L1105TDYYR } from "./MSPM0L1105TDYYR.tsx"; +import { MSPM0L1116SRHBR } from "./MSPM0L1116SRHBR.tsx"; +import { MSPM0L1305SDYYR } from "./MSPM0L1305SDYYR.tsx"; +import { MSPM0L1306SRGER } from "./MSPM0L1306SRGER.tsx"; +import { MSPM0L1343TDGS20R } from "./MSPM0L1343TDGS20R.tsx"; +import { MSPM0L2228SPTR } from "./MSPM0L2228SPTR.tsx"; +import { XM33C321ASPZR } from "./XM33C321ASPZR.tsx"; +import { NA555DR } from "./NA555DR.tsx"; +import { OPA197IDBVT } from "./OPA197IDBVT.tsx"; +import { OPA2188AIDGKR } from "./OPA2188AIDGKR.tsx"; +import { OPA2197ID } from "./OPA2197ID.tsx"; +import { OPA2237UA_2K5 } from "./OPA2237UA_2K5.tsx"; +import { OPA2310IDR } from "./OPA2310IDR.tsx"; +import { OPA2340UA_2K5 } from "./OPA2340UA_2K5.tsx"; +import { OPA2365AQDRQ1 } from "./OPA2365AQDRQ1.tsx"; +import { OPA2607QDGKRQ1 } from "./OPA2607QDGKRQ1.tsx"; +import { OPA2836QDGKRQ1 } from "./OPA2836QDGKRQ1.tsx"; +import { OPA310IDCKR } from "./OPA310IDCKR.tsx"; +import { OPA320SAIDBVR } from "./OPA320SAIDBVR.tsx"; +import { OPA333AIDR } from "./OPA333AIDR.tsx"; +import { OPA350UA_2K5 } from "./OPA350UA_2K5.tsx"; +import { OPA365AIDR } from "./OPA365AIDR.tsx"; +import { OPA365AQDBVRQ1 } from "./OPA365AQDBVRQ1.tsx"; +import { OPA371DDBVR } from "./OPA371DDBVR.tsx"; +import { OPA376AIDBVR } from "./OPA376AIDBVR.tsx"; +import { OPA4192IDR } from "./OPA4192IDR.tsx"; +import { OPA4206APWR } from "./OPA4206APWR.tsx"; +import { OPA4350EA_250 } from "./OPA4350EA_250.tsx"; +import { OPA4991QDYYRQ1 } from "./OPA4991QDYYRQ1.tsx"; +import { OPA607QDBVRQ1 } from "./OPA607QDBVRQ1.tsx"; +import { OPA990IDBVR } from "./OPA990IDBVR.tsx"; +import { OPT3002DNPR } from "./OPT3002DNPR.tsx"; +import { OPT3004DNPR } from "./OPT3004DNPR.tsx"; +import { OPT4001YMNR } from "./OPT4001YMNR.tsx"; +import { P82B96DGKR } from "./P82B96DGKR.tsx"; +import { PCA9306DCUT } from "./PCA9306DCUT.tsx"; +import { PTH08080WAH } from "./PTH08080WAH.tsx"; +import { REF1930AIDDCT } from "./REF1930AIDDCT.tsx"; +import { REF2125IDBVR } from "./REF2125IDBVR.tsx"; +import { REF3016EAIDBZR } from "./REF3016EAIDBZR.tsx"; +import { REF3325AIDBZR } from "./REF3325AIDBZR.tsx"; +import { RF430CL330HCPWR } from "./RF430CL330HCPWR.tsx"; +import { SN6501DBVR } from "./SN6501DBVR.tsx"; +import { SN6505BDBVT } from "./SN6505BDBVT.tsx"; +import { SN65HVD24DR } from "./SN65HVD24DR.tsx"; +import { SN65HVD3082EDR } from "./SN65HVD3082EDR.tsx"; +import { SN65HVD3088EDR } from "./SN65HVD3088EDR.tsx"; +import { SN65HVD32DR } from "./SN65HVD32DR.tsx"; +import { SN65HVD96DR } from "./SN65HVD96DR.tsx"; +import { SN65LV1023ADB } from "./SN65LV1023ADB.tsx"; +import { SN65LV1224BDB } from "./SN65LV1224BDB.tsx"; +import { SN74AC86PWR } from "./SN74AC86PWR.tsx"; +import { SN74AHC08DR } from "./SN74AHC08DR.tsx"; +import { SN74AHC1G09DBVR } from "./SN74AHC1G09DBVR.tsx"; +import { SN74AHC1G14DBVR } from "./SN74AHC1G14DBVR.tsx"; +import { SN74AHCT1G08DBVR } from "./SN74AHCT1G08DBVR.tsx"; +import { SN74AHCT541DWR } from "./SN74AHCT541DWR.tsx"; +import { SN74ALVC08DR } from "./SN74ALVC08DR.tsx"; +import { SN74AUP1G14DBVR } from "./SN74AUP1G14DBVR.tsx"; +import { SN74AUP1G17DBVR } from "./SN74AUP1G17DBVR.tsx"; +import { SN74AUP1G74DQER } from "./SN74AUP1G74DQER.tsx"; +import { SN74AUP1G79DCKR } from "./SN74AUP1G79DCKR.tsx"; +import { SN74AUP2G08DQER } from "./SN74AUP2G08DQER.tsx"; +import { SN74AUP2G14DSFR } from "./SN74AUP2G14DSFR.tsx"; +import { SN74AUP2G17DCKR } from "./SN74AUP2G17DCKR.tsx"; +import { SN74AUP2G240DCUR } from "./SN74AUP2G240DCUR.tsx"; +import { SN74AUP3G14DCUR } from "./SN74AUP3G14DCUR.tsx"; +import { SN74AXC4T245PWR } from "./SN74AXC4T245PWR.tsx"; +import { SN74CB3Q3245DGVR } from "./SN74CB3Q3245DGVR.tsx"; +import { SN74CBTLV3257DGVR } from "./SN74CBTLV3257DGVR.tsx"; +import { SN74HC112DR } from "./SN74HC112DR.tsx"; +import { SN74HC14DR } from "./SN74HC14DR.tsx"; +import { SN74HC21DR } from "./SN74HC21DR.tsx"; +import { SN74HCS03DR } from "./SN74HCS03DR.tsx"; +import { SN74HCS595BQBR } from "./SN74HCS595BQBR.tsx"; +import { SN74LV1T125DBVR } from "./SN74LV1T125DBVR.tsx"; +import { SN74LV1T34DCKR } from "./SN74LV1T34DCKR.tsx"; +import { SN74LV4052ADYYR } from "./SN74LV4052ADYYR.tsx"; +import { SN74LV541ADBR } from "./SN74LV541ADBR.tsx"; +import { SN74LVC08ANSR } from "./SN74LVC08ANSR.tsx"; +import { SN74LVC125APWR } from "./SN74LVC125APWR.tsx"; +import { SN74LVC14ADGVR } from "./SN74LVC14ADGVR.tsx"; +import { SN74LVC1G04YZPR } from "./SN74LVC1G04YZPR.tsx"; +import { SN74LVC1G07DCK3 } from "./SN74LVC1G07DCK3.tsx"; +import { SN74LVC1G08DCKR } from "./SN74LVC1G08DCKR.tsx"; +import { SN74LVC1G11DBVR } from "./SN74LVC1G11DBVR.tsx"; +import { SN74LVC1G125YZPR } from "./SN74LVC1G125YZPR.tsx"; +import { SN74LVC1G126DBVT } from "./SN74LVC1G126DBVT.tsx"; +import { SN74LVC1G14DRLR } from "./SN74LVC1G14DRLR.tsx"; +import { SN74LVC1G17DBVT } from "./SN74LVC1G17DBVT.tsx"; +import { SN74LVC1G3157YZPR } from "./SN74LVC1G3157YZPR.tsx"; +import { SN74LVC1G32DRY2 } from "./SN74LVC1G32DRY2.tsx"; +import { A_74LVC1G332DBVRG4 } from "./A_74LVC1G332DBVRG4.tsx"; +import { SN74LVC1G74DCUR } from "./SN74LVC1G74DCUR.tsx"; +import { SN74LVC1G86DCKR } from "./SN74LVC1G86DCKR.tsx"; +import { SN74LVC1GU04DBVR } from "./SN74LVC1GU04DBVR.tsx"; +import { SN74LVC2G07YZPR } from "./SN74LVC2G07YZPR.tsx"; +import { SN74LVC2G08DCUR } from "./SN74LVC2G08DCUR.tsx"; +import { SN74LVC2G125DCU3 } from "./SN74LVC2G125DCU3.tsx"; +import { SN74LVC2G132DCTR } from "./SN74LVC2G132DCTR.tsx"; +import { SN74LVC2G240DCTR } from "./SN74LVC2G240DCTR.tsx"; +import { SN74LVC2G34YZPR } from "./SN74LVC2G34YZPR.tsx"; +import { SN74LVC3G07DCUR } from "./SN74LVC3G07DCUR.tsx"; +import { TAC5112IRGER } from "./TAC5112IRGER.tsx"; +import { TCA6408APWR } from "./TCA6408APWR.tsx"; +import { TCA9535DBR } from "./TCA9535DBR.tsx"; +import { TCA9803DGKR } from "./TCA9803DGKR.tsx"; +import { TCAN1044AVDRBRQ1 } from "./TCAN1044AVDRBRQ1.tsx"; +import { TCAN1057AVDRQ1 } from "./TCAN1057AVDRQ1.tsx"; +import { TFP401PZP } from "./TFP401PZP.tsx"; +import { THVD1410DR } from "./THVD1410DR.tsx"; +import { THVD1424RGTR } from "./THVD1424RGTR.tsx"; +import { THVD1450DGKR } from "./THVD1450DGKR.tsx"; +import { THVD1451DRBR } from "./THVD1451DRBR.tsx"; +import { THVD1452DGS } from "./THVD1452DGS.tsx"; +import { THVD1500DR } from "./THVD1500DR.tsx"; +import { THVD2410DGKR } from "./THVD2410DGKR.tsx"; +import { THVD2450DGKR } from "./THVD2450DGKR.tsx"; +import { THVD8000DDFR } from "./THVD8000DDFR.tsx"; +import { THVD8010DDFR } from "./THVD8010DDFR.tsx"; +import { A_74ACT16244DGGR } from "./A_74ACT16244DGGR.tsx"; +import { TIOL221RGER } from "./TIOL221RGER.tsx"; +import { TIOS1015DMWT } from "./TIOS1015DMWT.tsx"; +import { TL072HIPWR } from "./TL072HIPWR.tsx"; +import { TL074HIDYYR } from "./TL074HIDYYR.tsx"; +import { TL082HIDR } from "./TL082HIDR.tsx"; +import { TL084HIDYYR } from "./TL084HIDYYR.tsx"; +import { TL331IDBVR } from "./TL331IDBVR.tsx"; +import { TL331LVDBVR } from "./TL331LVDBVR.tsx"; +import { TL391LVDBVR } from "./TL391LVDBVR.tsx"; +import { TL431QDBZR } from "./TL431QDBZR.tsx"; +import { TL7712ACDR } from "./TL7712ACDR.tsx"; +import { TLA2024IRUGR } from "./TLA2024IRUGR.tsx"; +import { TLA2528IRTER } from "./TLA2528IRTER.tsx"; +import { TLA431AIDBZR } from "./TLA431AIDBZR.tsx"; +import { TLA432AQDBZR } from "./TLA432AQDBZR.tsx"; +import { TLC555IDR } from "./TLC555IDR.tsx"; +import { TLC59116 } from "./TLC59116.tsx"; +import { TLC5916IPWR } from "./TLC5916IPWR.tsx"; +import { TLC59283RGER } from "./TLC59283RGER.tsx"; +import { TLC5971PWPR } from "./TLC5971PWPR.tsx"; +import { TLC6946RGER } from "./TLC6946RGER.tsx"; +import { TLC69624QRSNRQ1 } from "./TLC69624QRSNRQ1.tsx"; +import { TLC69634QRSNRQ1 } from "./TLC69634QRSNRQ1.tsx"; +import { TLC69699DRRR } from "./TLC69699DRRR.tsx"; +import { TLE2022CDR } from "./TLE2022CDR.tsx"; +import { PTLIN821DRBRQ1 } from "./PTLIN821DRBRQ1.tsx"; +import { TLV1811QDBVRQ1 } from "./TLV1811QDBVRQ1.tsx"; +import { TLV1824DR } from "./TLV1824DR.tsx"; +import { TLV1842PWR } from "./TLV1842PWR.tsx"; +import { TLV3211DCKR } from "./TLV3211DCKR.tsx"; +import { TLV3212DGKR } from "./TLV3212DGKR.tsx"; +import { TLV333IDBVR } from "./TLV333IDBVR.tsx"; +import { TLV3512DGKR } from "./TLV3512DGKR.tsx"; +import { TLV369IDCKR } from "./TLV369IDCKR.tsx"; +import { TLV3691IDCKT } from "./TLV3691IDCKT.tsx"; +import { TLV376IDBVR } from "./TLV376IDBVR.tsx"; +import { TLV431AIDBVR } from "./TLV431AIDBVR.tsx"; +import { TLV431BQDBZR } from "./TLV431BQDBZR.tsx"; +import { TLV61047DDCR } from "./TLV61047DDCR.tsx"; +import { TLV7031DBVR } from "./TLV7031DBVR.tsx"; +import { TLV70450DBVR } from "./TLV70450DBVR.tsx"; +import { TLV7042DGKR } from "./TLV7042DGKR.tsx"; +import { TLV709A33DBVR } from "./TLV709A33DBVR.tsx"; +import { TLV74218PDQNR } from "./TLV74218PDQNR.tsx"; +import { TLV755P } from "./TLV755P.tsx"; +import { TLV75801PDBVR } from "./TLV75801PDBVR.tsx"; +import { TLV76133KVUR } from "./TLV76133KVUR.tsx"; +import { TLV77133PDBVR } from "./TLV77133PDBVR.tsx"; +import { TLV77330PDBVR } from "./TLV77330PDBVR.tsx"; +import { TLV803SDBZR } from "./TLV803SDBZR.tsx"; +import { TLV803EA30DBZR } from "./TLV803EA30DBZR.tsx"; +import { TLV8802DGKR } from "./TLV8802DGKR.tsx"; +import { TLV9001IDBVR } from "./TLV9001IDBVR.tsx"; +import { TLV9002IDSGR } from "./TLV9002IDSGR.tsx"; +import { TLV9022L1RUGR } from "./TLV9022L1RUGR.tsx"; +import { TLV9061IDPWR } from "./TLV9061IDPWR.tsx"; +import { TLV9062IDR } from "./TLV9062IDR.tsx"; +import { TLV9064IDR } from "./TLV9064IDR.tsx"; +import { TLV9102IDR } from "./TLV9102IDR.tsx"; +import { TLV9152IDR } from "./TLV9152IDR.tsx"; +import { TLV9301IDCKR } from "./TLV9301IDCKR.tsx"; +import { TLVH431AQDBVT } from "./TLVH431AQDBVT.tsx"; +import { TLVH432QDBZR } from "./TLVH432QDBZR.tsx"; +import { TLVM23625RDNR } from "./TLVM23625RDNR.tsx"; +import { TM4C123FH6PMT7 } from "./TM4C123FH6PMT7.tsx"; +import { TM4C123GH6PGEIR } from "./TM4C123GH6PGEIR.tsx"; +import { TM4C123GH6PMI7 } from "./TM4C123GH6PMI7.tsx"; +import { TM4C123GH6PZT7 } from "./TM4C123GH6PZT7.tsx"; +import { TM4C123GH6ZXRI7 } from "./TM4C123GH6ZXRI7.tsx"; +import { TMP102AIDRLR } from "./TMP102AIDRLR.tsx"; +import { TMP107BIDR } from "./TMP107BIDR.tsx"; +import { TMP1075 } from "./TMP1075.tsx"; +import { TMP116NAIDRVR } from "./TMP116NAIDRVR.tsx"; +import { TMP118MAIYMSR } from "./TMP118MAIYMSR.tsx"; +import { TMP119AIYBGR } from "./TMP119AIYBGR.tsx"; +import { TMP20AIDCKR } from "./TMP20AIDCKR.tsx"; +import { TMP235A2DBZR } from "./TMP235A2DBZR.tsx"; +import { TMP275AIDGKR } from "./TMP275AIDGKR.tsx"; +import { TMP302ADRLR } from "./TMP302ADRLR.tsx"; +import { F2800132PTR } from "./F2800132PTR.tsx"; +import { F2800133PMR } from "./F2800133PMR.tsx"; +import { F280025PNSR } from "./F280025PNSR.tsx"; +import { F280039CSPMR } from "./F280039CSPMR.tsx"; +import { F280040PMQR } from "./F280040PMQR.tsx"; +import { F280040CPMQR } from "./F280040CPMQR.tsx"; +import { F280041PZQR } from "./F280041PZQR.tsx"; +import { F280041CPZQR } from "./F280041CPZQR.tsx"; +import { F280049PZQ } from "./F280049PZQ.tsx"; +import { F280049CRSHSR } from "./F280049CRSHSR.tsx"; +import { F280049CPZQR } from "./F280049CPZQR.tsx"; +import { TMS320F28027PTQR } from "./TMS320F28027PTQR.tsx"; +import { TMS320F28035PNQ } from "./TMS320F28035PNQ.tsx"; +import { TMS320F28075PTPQ } from "./TMS320F28075PTPQ.tsx"; +import { TMS320F28374SPTPT } from "./TMS320F28374SPTPT.tsx"; +import { TMS320F28375SPZPQ } from "./TMS320F28375SPZPQ.tsx"; +import { TMS320F28377DZWTQ } from "./TMS320F28377DZWTQ.tsx"; +import { TMS320F28377SPTPS } from "./TMS320F28377SPTPS.tsx"; +import { TMS320F28377SPTPQ } from "./TMS320F28377SPTPQ.tsx"; +import { TMS320F28379DZWTT } from "./TMS320F28379DZWTT.tsx"; +import { F28P550SJ9PZR } from "./F28P550SJ9PZR.tsx"; +import { F28P650DK6PZPR } from "./F28P650DK6PZPR.tsx"; +import { TMS5700432BPZQQ1R } from "./TMS5700432BPZQQ1R.tsx"; +import { TMUX1104DGSR } from "./TMUX1104DGSR.tsx"; +import { TMUX1308APWR } from "./TMUX1308APWR.tsx"; +import { TMUX1574DYYR } from "./TMUX1574DYYR.tsx"; +import { TMUX4051BQBR } from "./TMUX4051BQBR.tsx"; +import { TMUX5411PWR } from "./TMUX5411PWR.tsx"; +import { TMUXHS4212RKSR } from "./TMUXHS4212RKSR.tsx"; +import { TPD1E01B04DPYR } from "./TPD1E01B04DPYR.tsx"; +import { TPD1E04U04DPYT } from "./TPD1E04U04DPYT.tsx"; +import { TPD1E0B04DPLT } from "./TPD1E0B04DPLT.tsx"; +import { TPD1E10B06DYAR } from "./TPD1E10B06DYAR.tsx"; +import { TPD1E1B04DPYR } from "./TPD1E1B04DPYR.tsx"; +import { TPD2E001DRSR } from "./TPD2E001DRSR.tsx"; +import { TPD2E007DCKR } from "./TPD2E007DCKR.tsx"; +import { TPD2E1B06DRLR } from "./TPD2E1B06DRLR.tsx"; +import { TPD2E2U06DRLR } from "./TPD2E2U06DRLR.tsx"; +import { TPD2EUSB30DRTR } from "./TPD2EUSB30DRTR.tsx"; +import { TPD2S017DBVR } from "./TPD2S017DBVR.tsx"; +import { TPD2S300YFFR } from "./TPD2S300YFFR.tsx"; +import { TPD4E001DCKR } from "./TPD4E001DCKR.tsx"; +import { TPD4E001QDBVRQ1 } from "./TPD4E001QDBVRQ1.tsx"; +import { TPD4E05U06DQAR } from "./TPD4E05U06DQAR.tsx"; +import { TPD4E1U06DCKR } from "./TPD4E1U06DCKR.tsx"; +import { TPD4F003DQDR } from "./TPD4F003DQDR.tsx"; +import { TPD4S012DRYR } from "./TPD4S012DRYR.tsx"; +import { TPD4S480RUKR } from "./TPD4S480RUKR.tsx"; +import { TPD6E001RSFR } from "./TPD6E001RSFR.tsx"; +import { TPD6S300ARUKR } from "./TPD6S300ARUKR.tsx"; +import { TPL5100DGSR } from "./TPL5100DGSR.tsx"; +import { TPL5110DDCT } from "./TPL5110DDCT.tsx"; +import { TPL5111DDCR } from "./TPL5111DDCR.tsx"; +import { TPL7407LADR } from "./TPL7407LADR.tsx"; +import { TPS16630PWPR } from "./TPS16630PWPR.tsx"; +import { TPS1HC03PQVAHRQ1 } from "./TPS1HC03PQVAHRQ1.tsx"; +import { TPS1HC100BQPWPRQ1 } from "./TPS1HC100BQPWPRQ1.tsx"; +import { TPS2121RUXR } from "./TPS2121RUXR.tsx"; +import { TPS22860DBVR } from "./TPS22860DBVR.tsx"; +import { TPS22910AYZVR } from "./TPS22910AYZVR.tsx"; +import { TPS22912CYZVR } from "./TPS22912CYZVR.tsx"; +import { TPS22916BYFPR } from "./TPS22916BYFPR.tsx"; +import { TPS22918DBVT } from "./TPS22918DBVT.tsx"; +import { TPS22919 } from "./TPS22919.tsx"; +import { TPS22945DCKR } from "./TPS22945DCKR.tsx"; +import { TPS22946YZPR } from "./TPS22946YZPR.tsx"; +import { TPS22948DCKR } from "./TPS22948DCKR.tsx"; +import { TPS22970YZPR } from "./TPS22970YZPR.tsx"; +import { TPS22975NDSGR } from "./TPS22975NDSGR.tsx"; +import { TPS22990DMLR } from "./TPS22990DMLR.tsx"; +import { TPS22991CNRAAR } from "./TPS22991CNRAAR.tsx"; +import { TPS22992SRXNR } from "./TPS22992SRXNR.tsx"; +import { TPS22995RZFR } from "./TPS22995RZFR.tsx"; +import { TPS2400DBVR } from "./TPS2400DBVR.tsx"; +import { TPS24750RUVR } from "./TPS24750RUVR.tsx"; +import { TPS2491DGS } from "./TPS2491DGS.tsx"; +import { TPS25221DBVR } from "./TPS25221DBVR.tsx"; +import { TPS2553DDBVR } from "./TPS2553DDBVR.tsx"; +import { TPS2590RSAR } from "./TPS2590RSAR.tsx"; +import { TPS259241DRCR } from "./TPS259241DRCR.tsx"; +import { TPS259461ARPWR } from "./TPS259461ARPWR.tsx"; +import { TPS259472ARPWR } from "./TPS259472ARPWR.tsx"; +import { TPS259481AYWPR } from "./TPS259481AYWPR.tsx"; +import { TPS259541DSGR } from "./TPS259541DSGR.tsx"; +import { TPS25972ARPWR } from "./TPS25972ARPWR.tsx"; +import { TPS259814LRPWR } from "./TPS259814LRPWR.tsx"; +import { TPS259830ONRGER } from "./TPS259830ONRGER.tsx"; +import { TPS26400PWPR } from "./TPS26400PWPR.tsx"; +import { TPS26600PWPR } from "./TPS26600PWPR.tsx"; +import { TPS26625DRCR } from "./TPS26625DRCR.tsx"; +import { TPS26632RGET } from "./TPS26632RGET.tsx"; +import { TPS27081ADDCR } from "./TPS27081ADDCR.tsx"; +import { TPS2HC08PQVAHRQ1 } from "./TPS2HC08PQVAHRQ1.tsx"; +import { TPS2HC16PQVAHRQ1 } from "./TPS2HC16PQVAHRQ1.tsx"; +import { TPS3106K33DBVR } from "./TPS3106K33DBVR.tsx"; +import { TPS3305_18DGNR } from "./TPS3305_18DGNR.tsx"; +import { TPS3424A11C13ADRLR } from "./TPS3424A11C13ADRLR.tsx"; +import { TPS3435JFMAFDSER } from "./TPS3435JFMAFDSER.tsx"; +import { TPS35AA38AGADDFRQ1 } from "./TPS35AA38AGADDFRQ1.tsx"; +import { TPS3700DDCT } from "./TPS3700DDCT.tsx"; +import { TPS3700QDDCRQ1 } from "./TPS3700QDDCRQ1.tsx"; +import { TPS3702CX33DDCR } from "./TPS3702CX33DDCR.tsx"; +import { TPS3710DDCR } from "./TPS3710DDCR.tsx"; +import { TPS3808EG33DBVR } from "./TPS3808EG33DBVR.tsx"; +import { TPS3823_33DBVR } from "./TPS3823_33DBVR.tsx"; +import { TPS3828_50DBVR } from "./TPS3828_50DBVR.tsx"; +import { TPS3831G18DQNR } from "./TPS3831G18DQNR.tsx"; +import { TPS3840DL28DBVR } from "./TPS3840DL28DBVR.tsx"; +import { TPS386000RGPR } from "./TPS386000RGPR.tsx"; +import { TPS389030DSER } from "./TPS389030DSER.tsx"; +import { TPS389006007RTER } from "./TPS389006007RTER.tsx"; +import { TPS40210QDGQRQ1 } from "./TPS40210QDGQRQ1.tsx"; +import { TPS43061RTET } from "./TPS43061RTET.tsx"; +import { TPS51200DRCR } from "./TPS51200DRCR.tsx"; +import { TPS51206DSQR } from "./TPS51206DSQR.tsx"; +import { TPS54201DDCT } from "./TPS54201DDCT.tsx"; +import { TPS54338RQFR } from "./TPS54338RQFR.tsx"; +import { TPS54386PWPR } from "./TPS54386PWPR.tsx"; +import { TPS54538RQFR } from "./TPS54538RQFR.tsx"; +import { TPS55285VALR } from "./TPS55285VALR.tsx"; +import { TPS560430XDBVR } from "./TPS560430XDBVR.tsx"; +import { TPS561243DRLR } from "./TPS561243DRLR.tsx"; +import { TPS563252DRLR } from "./TPS563252DRLR.tsx"; +import { TPS564252DRLR } from "./TPS564252DRLR.tsx"; +import { TPS565242DRLR } from "./TPS565242DRLR.tsx"; +import { TPS566231PRQFR } from "./TPS566231PRQFR.tsx"; +import { TPS61021ADSGR } from "./TPS61021ADSGR.tsx"; +import { TPS61094DSSR } from "./TPS61094DSSR.tsx"; +import { TPS61096ADSSR } from "./TPS61096ADSSR.tsx"; +import { TPS61158DRVR } from "./TPS61158DRVR.tsx"; +import { TPS61161DRVR } from "./TPS61161DRVR.tsx"; +import { TPS61165DRVR } from "./TPS61165DRVR.tsx"; +import { TPS61169DCKR } from "./TPS61169DCKR.tsx"; +import { TPS61222 } from "./TPS61222.tsx"; +import { TPS61299DRLR } from "./TPS61299DRLR.tsx"; +import { TPS613771RYHR } from "./TPS613771RYHR.tsx"; +import { TPS62177DQCT } from "./TPS62177DQCT.tsx"; +import { TPS62824ADMQR } from "./TPS62824ADMQR.tsx"; +import { TPS62842DGRR } from "./TPS62842DGRR.tsx"; +import { TPS628502QDRLRQ1 } from "./TPS628502QDRLRQ1.tsx"; +import { TPS62933PDRLR } from "./TPS62933PDRLR.tsx"; +import { TPS62A01PDDCR } from "./TPS62A01PDDCR.tsx"; +import { TPS62A03ADRLR } from "./TPS62A03ADRLR.tsx"; +import { TPS631000DRLR } from "./TPS631000DRLR.tsx"; +import { TPS63900DSKR } from "./TPS63900DSKR.tsx"; +import { TPS65023BRSBR } from "./TPS65023BRSBR.tsx"; +import { TPS650250RHBT } from "./TPS650250RHBT.tsx"; +import { TPS65105PWPR } from "./TPS65105PWPR.tsx"; +import { TPS65130RGER } from "./TPS65130RGER.tsx"; +import { TPS65145RGER } from "./TPS65145RGER.tsx"; +import { TPS6521401VAFR } from "./TPS6521401VAFR.tsx"; +import { TPS65217CRSLR } from "./TPS65217CRSLR.tsx"; +import { TPS6521815RSLR } from "./TPS6521815RSLR.tsx"; +import { TPS6521902RSMR } from "./TPS6521902RSMR.tsx"; +import { TPS6522430RAHRQ1 } from "./TPS6522430RAHRQ1.tsx"; +import { TPS65296RJER } from "./TPS65296RJER.tsx"; +import { TPS65381AQDAPRQ1 } from "./TPS65381AQDAPRQ1.tsx"; +import { O3853QDCARQ1 } from "./O3853QDCARQ1.tsx"; +import { TPS65910A31A1RSLR } from "./TPS65910A31A1RSLR.tsx"; +import { TPS65931211RWERQ1 } from "./TPS65931211RWERQ1.tsx"; +import { TPS65930A2ZCHR } from "./TPS65930A2ZCHR.tsx"; +import { TPS70950QDBVRQ1 } from "./TPS70950QDBVRQ1.tsx"; +import { TPS76350QDBVRQ1 } from "./TPS76350QDBVRQ1.tsx"; +import { TPS78233DDCR } from "./TPS78233DDCR.tsx"; +import { TPS7A1633DGNR } from "./TPS7A1633DGNR.tsx"; +import { TPS7A20 } from "./TPS7A20.tsx"; +import { TPS7A2525DRVR } from "./TPS7A2525DRVR.tsx"; +import { TPS7A4901DGNR } from "./TPS7A4901DGNR.tsx"; +import { TPS7A5301BRPSR } from "./TPS7A5301BRPSR.tsx"; +import { TPS7A9401DSCR } from "./TPS7A9401DSCR.tsx"; +import { TPS7A9601DSCR } from "./TPS7A9601DSCR.tsx"; +import { TPS7B4255QDBVRQ1 } from "./TPS7B4255QDBVRQ1.tsx"; +import { TPS7B4260QDDARQ1 } from "./TPS7B4260QDDARQ1.tsx"; +import { TPS7E7101DBVR } from "./TPS7E7101DBVR.tsx"; +import { TPS7E8150DBVR } from "./TPS7E8150DBVR.tsx"; +import { TPS92200D2RXLR } from "./TPS92200D2RXLR.tsx"; +import { TPS922051D1DGNR } from "./TPS922051D1DGNR.tsx"; +import { TPS92612DBVR } from "./TPS92612DBVR.tsx"; +import { TPS92640PWPR_NOPB } from "./TPS92640PWPR_NOPB.tsx"; +import { TPS92761QPHPRQ1 } from "./TPS92761QPHPRQ1.tsx"; +import { TPSM64406RCHR } from "./TPSM64406RCHR.tsx"; +import { TPSM828214SILR } from "./TPSM828214SILR.tsx"; +import { TPSM828223SILR } from "./TPSM828223SILR.tsx"; +import { TPSM828301ARDSR } from "./TPSM828301ARDSR.tsx"; +import { TPSM828303ARDSR } from "./TPSM828303ARDSR.tsx"; +import { TPSM82901SISR } from "./TPSM82901SISR.tsx"; +import { TPSM82903SISR } from "./TPSM82903SISR.tsx"; +import { TPSM843620SITR } from "./TPSM843620SITR.tsx"; +import { TPSM863252RDXR } from "./TPSM863252RDXR.tsx"; +import { TPSM8A29RDGR } from "./TPSM8A29RDGR.tsx"; +import { TRF7964ARHBR } from "./TRF7964ARHBR.tsx"; +import { TRF7970ARHBR } from "./TRF7970ARHBR.tsx"; +import { TRS3122ERGER } from "./TRS3122ERGER.tsx"; +import { TRS3232EIRGTR } from "./TRS3232EIRGTR.tsx"; +import { TRS3243ECDBR } from "./TRS3243ECDBR.tsx"; +import { TRS3318EIPWR } from "./TRS3318EIPWR.tsx"; +import { TRS3386ECPWR } from "./TRS3386ECPWR.tsx"; +import { TRSF3223EIRGWR } from "./TRSF3223EIRGWR.tsx"; +import { TS3DV642RUATQ1 } from "./TS3DV642RUATQ1.tsx"; +import { TS3USB221RSER } from "./TS3USB221RSER.tsx"; +import { TS5A3157DCKR } from "./TS5A3157DCKR.tsx"; +import { TS5A3159ADBVR } from "./TS5A3159ADBVR.tsx"; +import { TS5A3160DBVR } from "./TS5A3160DBVR.tsx"; +import { TS5A3166DBVR } from "./TS5A3166DBVR.tsx"; +import { TS5A3166QDCKRQ1 } from "./TS5A3166QDCKRQ1.tsx"; +import { TS5A9411DCKR } from "./TS5A9411DCKR.tsx"; +import { TSD05DYFR } from "./TSD05DYFR.tsx"; +import { TSM24CADBZR } from "./TSM24CADBZR.tsx"; +import { TUSB1004RNQR } from "./TUSB1004RNQR.tsx"; +import { TUSB1046_DCIRNQR } from "./TUSB1046_DCIRNQR.tsx"; +import { TUSB8041RGCR } from "./TUSB8041RGCR.tsx"; +import { TUSB8042ARGCR } from "./TUSB8042ARGCR.tsx"; +import { TVS0500DRVR } from "./TVS0500DRVR.tsx"; +import { TVS1400DRVR } from "./TVS1400DRVR.tsx"; +import { TVS1401DRBR } from "./TVS1401DRBR.tsx"; +import { TVS2700DRVR } from "./TVS2700DRVR.tsx"; +import { TVS3300YZFR } from "./TVS3300YZFR.tsx"; +import { TXE8124DGSR } from "./TXE8124DGSR.tsx"; +import { TXS0104ERGYR } from "./TXS0104ERGYR.tsx"; +import { TXS0108EPWR } from "./TXS0108EPWR.tsx"; +import { TXV0108QWRGYRQ1 } from "./TXV0108QWRGYRQ1.tsx"; +import { UA78M05CDCYR } from "./UA78M05CDCYR.tsx"; +import { UC2845D8TR } from "./UC2845D8TR.tsx"; +import { UCC21330ADR } from "./UCC21330ADR.tsx"; +import { UCC21550ADWR } from "./UCC21550ADWR.tsx"; +import { UCC21750DWR } from "./UCC21750DWR.tsx"; +import { UCC23525CDWYR } from "./UCC23525CDWYR.tsx"; +import { UCC24610DRBR } from "./UCC24610DRBR.tsx"; +import { UCC24612_2DBVR } from "./UCC24612_2DBVR.tsx"; +import { UCC24624DT } from "./UCC24624DT.tsx"; +import { UCC24630DBVT } from "./UCC24630DBVT.tsx"; +import { UCC24636DBVR } from "./UCC24636DBVR.tsx"; +import { UCC25600DR } from "./UCC25600DR.tsx"; +import { UCC256610DDBR } from "./UCC256610DDBR.tsx"; +import { UCC25800AQDGNRQ1 } from "./UCC25800AQDGNRQ1.tsx"; +import { UCC27201ADDAR } from "./UCC27201ADDAR.tsx"; +import { UCC27211DR } from "./UCC27211DR.tsx"; +import { UCC27301ADR } from "./UCC27301ADR.tsx"; +import { UCC27302ADRCR } from "./UCC27302ADRCR.tsx"; +import { UCC27332QDGNRQ1 } from "./UCC27332QDGNRQ1.tsx"; +import { UCC27444DR } from "./UCC27444DR.tsx"; +import { UCC27511ADBVT } from "./UCC27511ADBVT.tsx"; +import { UCC27517ADBVR } from "./UCC27517ADBVR.tsx"; +import { UCC27523D } from "./UCC27523D.tsx"; +import { UCC27614DR } from "./UCC27614DR.tsx"; +import { UCC27624DSDR } from "./UCC27624DSDR.tsx"; +import { UCC27734DR } from "./UCC27734DR.tsx"; +import { UCC27735DR } from "./UCC27735DR.tsx"; +import { UCC28019ADR } from "./UCC28019ADR.tsx"; +import { UCC2803DTR } from "./UCC2803DTR.tsx"; +import { UCC2805DTR } from "./UCC2805DTR.tsx"; +import { UCC28051DR } from "./UCC28051DR.tsx"; +import { UCC28056BDBVR } from "./UCC28056BDBVR.tsx"; +import { UCC28070PWR } from "./UCC28070PWR.tsx"; +import { UCC28070QPWRQ1 } from "./UCC28070QPWRQ1.tsx"; +import { UCC28180DR } from "./UCC28180DR.tsx"; +import { UCC28600DR } from "./UCC28600DR.tsx"; +import { UCC28700DBVT } from "./UCC28700DBVT.tsx"; +import { UCC28711DR } from "./UCC28711DR.tsx"; +import { UCC28740DR } from "./UCC28740DR.tsx"; +import { UCC287501DBVR } from "./UCC287501DBVR.tsx"; +import { UCC28881D } from "./UCC28881D.tsx"; +import { UCC28910DR } from "./UCC28910DR.tsx"; +import { UCC28911DR } from "./UCC28911DR.tsx"; +import { UCC28950PWR } from "./UCC28950PWR.tsx"; +import { UCC28C50DGKR } from "./UCC28C50DGKR.tsx"; +import { UCC28C52DR } from "./UCC28C52DR.tsx"; +import { UCC28C53DR } from "./UCC28C53DR.tsx"; +import { UCC28C54DR } from "./UCC28C54DR.tsx"; +import { UCC28C55DR } from "./UCC28C55DR.tsx"; +import { UCC29950DR } from "./UCC29950DR.tsx"; +import { UCC33420RAQR } from "./UCC33420RAQR.tsx"; +import { UCC33420QRAQRQ1 } from "./UCC33420QRAQRQ1.tsx"; +import { UCC38C42DR } from "./UCC38C42DR.tsx"; +import { UCC38C43DR } from "./UCC38C43DR.tsx"; +import { UCC38C45DR } from "./UCC38C45DR.tsx"; +import { UCC5320ECDR } from "./UCC5320ECDR.tsx"; +import { UCC5350SBDR } from "./UCC5350SBDR.tsx"; +import { UCC5390ECDWVR } from "./UCC5390ECDWVR.tsx"; +import { UCC57108CDR } from "./UCC57108CDR.tsx"; +import { UCD3138ARGCR } from "./UCD3138ARGCR.tsx"; +import { UCD7138DRSR } from "./UCD7138DRSR.tsx"; +import { UCD90160RGCT } from "./UCD90160RGCT.tsx"; +import { UCG28828_1REZR } from "./UCG28828_1REZR.tsx"; +import { ULN2003AIDR } from "./ULN2003AIDR.tsx"; +import { ULN2803CDWR } from "./ULN2803CDWR.tsx"; +import { XTR200DQCR } from "./XTR200DQCR.tsx"; export { A_74ACT16244DGGR, diff --git a/lib/chips/ti-sysblocks-footprint-selections.json b/lib/chips/ti-sysblocks-footprint-selections.json deleted file mode 100644 index b60d36d3..00000000 --- a/lib/chips/ti-sysblocks-footprint-selections.json +++ /dev/null @@ -1,5363 +0,0 @@ -{ - "schemaVersion": 1, - "targetCount": 111, - "coverage": { - "targetEntries": 111, - "sourceReadyEntries": 111, - "unavailableEntries": 0 - }, - "targets": { - "74ACT16244DGGR": { - "family": "74ACT16244", - "componentExportName": "A_74ACT16244DGGR", - "manufacturerPartNumber": "74ACT16244DGGR", - "packageDrawing": "DGG0048A", - "status": "source-ready", - "drawingId": "DGG0048A", - "footprintPropSource": "footprint=\"dfn48_p0.4999mm_w9.1498mm_pw0.28mm_pl1.5499mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "pin1": "pin1", - "pin2": "pin2", - "pin3": "pin3", - "pin4": "pin4", - "pin5": "pin5", - "pin6": "pin6", - "pin7": "pin7", - "pin8": "pin8", - "pin9": "pin9", - "pin10": "pin10", - "pin11": "pin11", - "pin12": "pin12", - "pin13": "pin13", - "DVSS": "pin14", - "DVCC": "pin15", - "pin16": "pin16", - "pin17": "pin17", - "pin18": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "pin25": "pin25", - "pin26": "pin26", - "pin27": "pin27", - "pin28": "pin28", - "pin29": "pin29", - "pin30": "pin30", - "pin31": "pin31", - "pin32": "pin32", - "pin33": "pin33", - "pin34": "pin34", - "pin35": "pin35", - "pin36": "pin36", - "pin37": "pin37", - "pin38": "pin38", - "pin39": "pin39", - "pin40": "pin40", - "pin41": "pin41", - "pin42": "pin42", - "pin43": "pin43", - "pin44": "pin44", - "pin45": "pin45", - "pin46": "pin46", - "pin47": "pin47", - "pin48": "pin48" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGG0048A; donor MSP430FR4133IG48R (JLCPCB C2053877)" - }, - "AM5726BABCXA": { - "family": "AM5726", - "componentExportName": "AM5726BABCXA", - "manufacturerPartNumber": "AM5726BABCXA", - "packageDrawing": "ABC0760A", - "status": "source-ready", - "drawingId": "ABC0760A", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - "R", - "T", - "U", - "V", - "W", - "Y", - "AA", - "AB", - "AC", - "AD", - "AE", - "AF", - "AG", - "AH" - ], - "columnOrder": [ - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 25, 26, 27, 28 - ], - "pitchMm": 0.8, - "padShape": "circle", - "padDiameterMm": 0.4 - }, - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing ABC0760A; official source https://www.ti.com/lit/gpn/AM5726 pages 414,415,416" - }, - "AM62A32AOMHIAMBR": { - "family": "AM62A3", - "componentExportName": "AM62A32AOMHIAMBR", - "manufacturerPartNumber": "AM62A32AOMHIAMBR", - "packageDrawing": "AMB0484A", - "status": "source-ready", - "drawingId": "AMB0484A", - "footprintPropSource": "footprint=\"bga484_pin1location(leftside,top)\"", - "physicalPadToPortHint": { - "A1": "pin1", - "VSS_A1": "pin1", - "A2": "pin23", - "VDDSHV_MCU_A2": "pin23", - "DDR0_DQ7": "pin45", - "A3": "pin45", - "A4": "pin67", - "VSS_A4": "pin67", - "DDR0_DQ0": "pin89", - "A5": "pin89", - "A6": "pin111", - "VSS_A6": "pin111", - "CU_PORz": "pin133", - "A7": "pin133", - "WKUP_LFOSC0_XI": "pin155", - "A8": "pin155", - "WKUP_LFOSC0_XO": "pin177", - "A9": "pin177", - "A10": "pin199", - "VSS_A10": "pin199", - "MCU_OSC0_XO": "pin221", - "A11": "pin221", - "MCU_OSC0_XI": "pin243", - "A12": "pin243", - "A13": "pin265", - "VSS_A13": "pin265", - "CK": "pin287", - "A14": "pin287", - "MCU_SPI0_D0": "pin309", - "A15": "pin309", - "DI": "pin331", - "A16": "pin331", - "ADCONFIG111": "pin353", - "A17": "pin353", - "A18": "pin375", - "VSS_A18": "pin375", - "MCASP0_ACLKX": "pin397", - "A19": "pin397", - "MCASP0_AFSX": "pin419", - "A20": "pin419", - "PADCONFIG108": "pin441", - "A21": "pin441", - "A22": "pin463", - "VSS_A22": "pin463", - "AA1": "pin21", - "VDDSHV_MCU_AA1": "pin21", - "AA2": "pin43", - "VSS_AA2": "pin43", - "DDR0_DQ29": "pin65", - "AA3": "pin65", - "AA4": "pin87", - "VSS_AA4": "pin87", - "DDR0_DQ30": "pin109", - "AA5": "pin109", - "MMC0_DAT0": "pin131", - "AA6": "pin131", - "MMC0_DAT3": "pin153", - "AA7": "pin153", - "AA8": "pin175", - "VSS_AA8": "pin175", - "USB0_DP": "pin197", - "AA9": "pin197", - "USB0_DM": "pin219", - "AA10": "pin219", - "AA11": "pin241", - "VSS_AA11": "pin241", - "CSI0_RXP2": "pin263", - "AA12": "pin263", - "CSI0_RXN2": "pin285", - "AA13": "pin285", - "AA14": "pin307", - "VSS_AA14": "pin307", - "RGMII1_RX_CTL": "pin329", - "AA15": "pin329", - "RGMII1_RXC": "pin351", - "AA16": "pin351", - "RGMII1_TD3": "pin373", - "AA17": "pin373", - "ADCONFIG93": "pin395", - "AA18": "pin395", - "ADCONFIG91": "pin417", - "AA19": "pin417", - "ADCONFIG96": "pin439", - "AA20": "pin439", - "ADCONFIG97": "pin461", - "AA21": "pin461", - "VOUT0_PCLK": "pin483", - "AA22": "pin483", - "AB1": "pin22", - "VSS_AB1": "pin22", - "AB2": "pin44", - "VDDSHV_MCU_AB2": "pin44", - "AB3": "pin66", - "VSS_AB3": "pin66", - "DDR0_DQ31": "pin88", - "AB4": "pin88", - "AB5": "pin110", - "VSS_AB5": "pin110", - "PADCONFIG132": "pin132", - "AB6": "pin132", - "PADCONFIG134": "pin154", - "AB7": "pin154", - "ADCONFIG126": "pin176", - "AB8": "pin176", - "AB9": "pin198", - "VSS_AB9": "pin198", - "CSI0_RXP3": "pin220", - "AB10": "pin220", - "CSI0_RXN3": "pin242", - "AB11": "pin242", - "AB12": "pin264", - "VSS_AB12": "pin264", - "CSI0_RXCLKP": "pin286", - "AB13": "pin286", - "CSI0_RXCLKN": "pin308", - "AB14": "pin308", - "AB15": "pin330", - "VSS_AB15": "pin330", - "RGMII1_RD0": "pin352", - "AB16": "pin352", - "RGMII1_TXC": "pin374", - "AB17": "pin374", - "AB18": "pin396", - "VSS_AB18": "pin396", - "RGMII2_TXC": "pin418", - "AB19": "pin418", - "ADCONFIG100": "pin440", - "AB20": "pin440", - "ADCONFIG99": "pin462", - "AB21": "pin462", - "AB22": "pin484", - "VSS_AB22": "pin484", - "B1": "pin2", - "VDDSHV_MCU_B1": "pin2", - "DDR0_DQ6": "pin24", - "B2": "pin24", - "B3": "pin46", - "VSS_B3": "pin46", - "DDR0_DQ1": "pin68", - "B4": "pin68", - "B5": "pin90", - "VSS_B5": "pin90", - "DDR0_DQ2": "pin112", - "B6": "pin112", - "B7": "pin134", - "VSS_B7": "pin134", - "CU_ERRORn": "pin156", - "B8": "pin156", - "CU_PADCONFIG16": "pin178", - "B9": "pin178", - "WKUP_CLKOUT0": "pin200", - "B10": "pin200", - "MCU_PADCONFIG7": "pin222", - "B11": "pin222", - "MCU_SPI0_D1": "pin244", - "B12": "pin244", - "MCU_SPI0_CLK": "pin266", - "B13": "pin266", - "MS": "pin288", - "B14": "pin288", - "SPI0_D0": "pin310", - "B15": "pin310", - "XT_REFCLK1": "pin332", - "B16": "pin332", - "CAN0_TX": "pin354", - "B17": "pin354", - "MCASP0_AXR1": "pin376", - "B18": "pin376", - "CASP0_AXR2": "pin398", - "B19": "pin398", - "MCASP0_AXR0": "pin420", - "B20": "pin420", - "PADCONFIG107": "pin442", - "B21": "pin442", - "ADCONFIG140": "pin464", - "B22": "pin464", - "DDR0_DQS0_n": "pin3", - "C1": "pin3", - "DDR0_DM0": "pin25", - "C2": "pin25", - "DDR0_DQ5": "pin47", - "C3": "pin47", - "C4": "pin69", - "VSS_C4": "pin69", - "DDR0_DQ4": "pin91", - "C5": "pin91", - "RSVD0": "pin113", - "C6": "pin113", - "CU_PADCONFIG13": "pin135", - "C7": "pin135", - "CU_PADCONFIG12": "pin157", - "C8": "pin157", - "WKUP_UART0_RXD": "pin179", - "C9": "pin179", - "WKUP_UART0_CTSn": "pin201", - "C10": "pin201", - "CU_PADCONFIG1": "pin223", - "C11": "pin223", - "CU_RESETz": "pin245", - "C12": "pin245", - "MU0": "pin267", - "C13": "pin267", - "DO": "pin289", - "C14": "pin289", - "ART0_RTSn": "pin311", - "C15": "pin311", - "ADCONFIG110": "pin333", - "C16": "pin333", - "ADCONFIG122": "pin355", - "C17": "pin355", - "CAN0_RX": "pin377", - "C18": "pin377", - "CASP0_AXR3": "pin399", - "C19": "pin399", - "USB0_DRVVBUS": "pin421", - "C20": "pin421", - "PADCONFIG143": "pin443", - "C21": "pin443", - "MC1_DAT2": "pin465", - "C22": "pin465", - "DDR0_DQS0": "pin4", - "D1": "pin4", - "D2": "pin26", - "VSS_D2": "pin26", - "DDR0_DQ15": "pin48", - "D3": "pin48", - "D4": "pin70", - "VSS_D4": "pin70", - "DDR0_DQ3": "pin92", - "D5": "pin92", - "RSVD1": "pin114", - "D6": "pin114", - "CU_MCAN1_TX": "pin136", - "D7": "pin136", - "MCU_UART0_RXD": "pin158", - "D8": "pin158", - "MCU_I2C0_SDA": "pin180", - "D9": "pin180", - "MCU_PADCONFIG8": "pin202", - "D10": "pin202", - "D11": "pin224", - "VSS_D11": "pin224", - "PMIC_LPM_EN0": "pin246", - "D12": "pin246", - "WKUP_I2C0_SCL": "pin268", - "D13": "pin268", - "MCU_RESETSTATz": "pin290", - "D14": "pin290", - "UART0_TXD": "pin312", - "D15": "pin312", - "SPI0_CS0": "pin334", - "D16": "pin334", - "2C0_SCL": "pin356", - "D17": "pin356", - "MMC1_SDWP": "pin378", - "D18": "pin378", - "USB1_DRVVBUS": "pin400", - "D19": "pin400", - "D20": "pin422", - "VSS_D20": "pin422", - "ADCONFIG139": "pin444", - "D21": "pin444", - "MC1_DAT3": "pin466", - "D22": "pin466", - "E1": "pin5", - "VSS_E1": "pin5", - "DDR0_DQ8": "pin27", - "E2": "pin27", - "E3": "pin49", - "VSS_E3": "pin49", - "DDR0_DQ14": "pin71", - "E4": "pin71", - "E5": "pin93", - "VSS_E5": "pin93", - "DDR0_DQ10": "pin115", - "E6": "pin115", - "RSVD2": "pin137", - "E7": "pin137", - "CU_PADCONFIG14": "pin159", - "E8": "pin159", - "WKUP_UART0_TXD": "pin181", - "E9": "pin181", - "MU1": "pin203", - "E10": "pin203", - "MCU_SPI0_CS0": "pin225", - "E11": "pin225", - "MCU_I2C0_SCL": "pin247", - "E12": "pin247", - "WKUP_I2C0_SDA": "pin269", - "E13": "pin269", - "UART0_RXD": "pin291", - "E14": "pin291", - "ADCONFIG113": "pin313", - "E15": "pin313", - "ADCONFIG121": "pin335", - "E16": "pin335", - "ADCONFIG123": "pin357", - "E17": "pin357", - "MMC1_SDCD": "pin379", - "E18": "pin379", - "ESET_REQz": "pin401", - "E19": "pin401", - "MMC2_DAT0": "pin423", - "E20": "pin423", - "PADCONFIG74": "pin445", - "E21": "pin445", - "MMC1_CLK": "pin467", - "E22": "pin467", - "DDR0_DQS1_n": "pin6", - "F1": "pin6", - "F2": "pin28", - "VSS_F2": "pin28", - "DDR0_DM1": "pin50", - "F3": "pin50", - "F4": "pin72", - "VSS_F4": "pin72", - "DDR0_DQ9": "pin94", - "F5": "pin94", - "RSVD3": "pin116", - "F6": "pin116", - "VPP": "pin138", - "F7": "pin138", - "MCU_UART0_TXD": "pin160", - "F8": "pin160", - "VMON_3P3_SOC": "pin182", - "F9": "pin182", - "RSVD4": "pin204", - "F10": "pin204", - "F11": "pin226", - "VSS_F11": "pin226", - "VMON_1P8_SOC": "pin248", - "F12": "pin248", - "F13": "pin270", - "VSS_F13": "pin270", - "ART0_CTSn": "pin292", - "F14": "pin292", - "RSTn": "pin314", - "F15": "pin314", - "F16": "pin336", - "VSS_F16": "pin336", - "EXTINTn": "pin358", - "F17": "pin358", - "ORz_OUT": "pin380", - "F18": "pin380", - "ESETSTATz": "pin402", - "F19": "pin402", - "MMC2_DAT2": "pin424", - "F20": "pin424", - "MMC2_DAT1": "pin446", - "F21": "pin446", - "PADCONFIG73": "pin468", - "F22": "pin468", - "DDR0_DQS1": "pin7", - "G1": "pin7", - "DDR0_DQ11": "pin29", - "G2": "pin29", - "G3": "pin51", - "VSS_G3": "pin51", - "DDR0_DQ13": "pin73", - "G4": "pin73", - "G5": "pin95", - "VSS_G5": "pin95", - "DDR0_DQ12": "pin117", - "G6": "pin117", - "RSVD5": "pin139", - "G7": "pin139", - "CAP_VDDS_CANUART": "pin161", - "G8": "pin161", - "G9": "pin183", - "VSS_G9": "pin183", - "CAP_VDDS_MCU": "pin205", - "G10": "pin205", - "G11": "pin227", - "VDDSHV_MCU_G11": "pin227", - "G12": "pin249", - "VSS_G12": "pin249", - "CAP_VDDS0": "pin271", - "G13": "pin271", - "G14": "pin293", - "VDDSHV0_G14": "pin293", - "CAP_VDDS5": "pin315", - "G15": "pin315", - "G16": "pin337", - "VDDSHV5_G16": "pin337", - "G17": "pin359", - "VSS_G17": "pin359", - "VDDA_TEMP1": "pin381", - "G18": "pin381", - "OSPI0_CSn1": "pin403", - "G19": "pin403", - "OSPI0_CSn3": "pin425", - "G20": "pin425", - "ADCONFIG66": "pin447", - "G21": "pin447", - "MMC2_CMD": "pin469", - "G22": "pin469", - "H1": "pin8", - "VSS_H1": "pin8", - "DDR0_A7": "pin30", - "H2": "pin30", - "DDR0_BA1": "pin52", - "H3": "pin52", - "H4": "pin74", - "VSS_H4": "pin74", - "DDR0_ODT0": "pin96", - "H5": "pin96", - "DDR0_CAL0": "pin118", - "H6": "pin118", - "DDR0_ALERT_n": "pin140", - "H7": "pin140", - "VDDSHV_CANUART": "pin162", - "H8": "pin162", - "H9": "pin184", - "VDD_CANUART_H9": "pin184", - "H10": "pin206", - "VDDSHV_MCU_H10": "pin206", - "H11": "pin228", - "VSS_H11": "pin228", - "VMON_VSYS": "pin250", - "H12": "pin250", - "H13": "pin272", - "VDDSHV0_H13": "pin272", - "H14": "pin294", - "VSS_H14": "pin294", - "H15": "pin316", - "VDDSHV5_H15": "pin316", - "H16": "pin338", - "VDDSHV6_H16": "pin338", - "H17": "pin360", - "VDDSHV6_H17": "pin360", - "OSPI0_D3": "pin382", - "H18": "pin382", - "OSPI0_D5": "pin404", - "H19": "pin404", - "H20": "pin426", - "VSS_H20": "pin426", - "OSPI0_CSn0": "pin448", - "H21": "pin448", - "MMC2_CLK": "pin470", - "H22": "pin470", - "DDR0_A4": "pin9", - "J1": "pin9", - "DDR0_A1": "pin31", - "J2": "pin31", - "J3": "pin53", - "VSS_J3": "pin53", - "DDR0_A2": "pin75", - "J4": "pin75", - "DDR0_A0": "pin97", - "J5": "pin97", - "DDR0_CS0_n": "pin119", - "J6": "pin119", - "J7": "pin141", - "VDDS_DDR_J7": "pin141", - "VDDS_OSC0": "pin163", - "J8": "pin163", - "J9": "pin185", - "VDD_CANUART_J9": "pin185", - "VDDA_MCU": "pin207", - "J10": "pin207", - "J11": "pin229", - "VDD_CANUART_J11": "pin229", - "J12": "pin251", - "VSS_J12": "pin251", - "J13": "pin273", - "VDD_CANUART_J13": "pin273", - "J14": "pin295", - "VDDR_CORE_J14": "pin295", - "J15": "pin317", - "VDD_CANUART_J15": "pin317", - "CAP_VDDS6": "pin339", - "J16": "pin339", - "J17": "pin361", - "VSS_J17": "pin361", - "OSPI0_D1": "pin383", - "J18": "pin383", - "OSPI0_D2": "pin405", - "J19": "pin405", - "SPI0_D6": "pin427", - "J20": "pin427", - "OSPI0_D0": "pin449", - "J21": "pin449", - "SPI0_D7": "pin471", - "J22": "pin471", - "K1": "pin10", - "VSS_K1": "pin10", - "DDR0_A10": "pin32", - "K2": "pin32", - "DDR0_A6": "pin54", - "K3": "pin54", - "K4": "pin76", - "VSS_K4": "pin76", - "DDR0_A5": "pin98", - "K5": "pin98", - "DDR0_BA0": "pin120", - "K6": "pin120", - "K7": "pin142", - "VSS_K7": "pin142", - "K8": "pin164", - "VDDS_DDR_K8": "pin164", - "K9": "pin186", - "VSS_K9": "pin186", - "VDDA_PLL4": "pin208", - "K10": "pin208", - "K11": "pin230", - "VSS_K11": "pin230", - "K12": "pin252", - "VDDR_CORE_K12": "pin252", - "VDDA_PLL3": "pin274", - "K13": "pin274", - "K14": "pin296", - "VDD_CANUART_K14": "pin296", - "K15": "pin318", - "VDDSHV1_K15": "pin318", - "CAP_VDDS1": "pin340", - "K16": "pin340", - "ADCONFIG40": "pin362", - "K17": "pin362", - "PMC0_DIR": "pin384", - "K18": "pin384", - "ADCONFIG35": "pin406", - "K19": "pin406", - "OSPI0_CSn2": "pin428", - "K20": "pin428", - "OSPI0_D4": "pin450", - "K21": "pin450", - "OSPI0_LBCLKO": "pin472", - "K22": "pin472", - "DDR0_CK0_n": "pin11", - "L1": "pin11", - "DDR0_A9": "pin33", - "L2": "pin33", - "L3": "pin55", - "VSS_L3": "pin55", - "DDR0_A3": "pin77", - "L4": "pin77", - "DDR0_A11": "pin99", - "L5": "pin99", - "DDR0_A8": "pin121", - "L6": "pin121", - "L7": "pin143", - "VDDS_DDR_L7": "pin143", - "VDDS_DDR_C": "pin165", - "L8": "pin165", - "L9": "pin187", - "VDD_CANUART_L9": "pin187", - "VDDA_TEMP2": "pin209", - "L10": "pin209", - "L11": "pin231", - "VDD_CANUART_L11": "pin231", - "L12": "pin253", - "VSS_L12": "pin253", - "L13": "pin275", - "VDD_CANUART_L13": "pin275", - "L14": "pin297", - "VSS_L14": "pin297", - "L15": "pin319", - "VDDSHV3_L15": "pin319", - "L16": "pin341", - "VDDSHV1_L16": "pin341", - "ADCONFIG34": "pin363", - "L17": "pin363", - "ADCONFIG33": "pin385", - "L18": "pin385", - "GPMC0_BE0n_CLE": "pin407", - "L19": "pin407", - "L20": "pin429", - "VSS_L20": "pin429", - "OSPI0_DQS": "pin451", - "L21": "pin451", - "OSPI0_CLK": "pin473", - "L22": "pin473", - "DDR0_CK0": "pin12", - "M1": "pin12", - "DDR0_A13": "pin34", - "M2": "pin34", - "DDR0_A12": "pin56", - "M3": "pin56", - "M4": "pin78", - "VSS_M4": "pin78", - "DDR0_CAS_n": "pin100", - "M5": "pin100", - "DDR0_RAS_n": "pin122", - "M6": "pin122", - "M7": "pin144", - "VSS_M7": "pin144", - "M8": "pin166", - "VDDS_DDR_M8": "pin166", - "VDDA_DDR_PLL0": "pin188", - "M9": "pin188", - "M10": "pin210", - "VDDR_CORE_M10": "pin210", - "M11": "pin232", - "VSS_M11": "pin232", - "M12": "pin254", - "VDD_CORE_M12": "pin254", - "VDDA_PLL2": "pin276", - "M13": "pin276", - "M14": "pin298", - "VDDR_CORE_M14": "pin298", - "M15": "pin320", - "VDDSHV3_M15": "pin320", - "CAP_VDDS3": "pin342", - "M16": "pin342", - "M17": "pin364", - "VSS_M17": "pin364", - "ADCONFIG37": "pin386", - "M18": "pin386", - "ADCONFIG42": "pin408", - "M19": "pin408", - "ADCONFIG45": "pin430", - "M20": "pin430", - "ADCONFIG43": "pin452", - "M21": "pin452", - "PMC0_CSn2": "pin474", - "M22": "pin474", - "N1": "pin13", - "VSS_N1": "pin13", - "DDR0_PAR": "pin35", - "N2": "pin35", - "DDR0_ODT1": "pin57", - "N3": "pin57", - "DDR0_CS1_n": "pin79", - "N4": "pin79", - "DDR0_ACT_n": "pin101", - "N5": "pin101", - "DDR0_WE_n": "pin123", - "N6": "pin123", - "N7": "pin145", - "VDDS_DDR_N7": "pin145", - "N8": "pin167", - "VSS_N8": "pin167", - "VDDA_PLL0": "pin189", - "N9": "pin189", - "N10": "pin211", - "VSS_N10": "pin211", - "N11": "pin233", - "VDD_CORE_N11": "pin233", - "N12": "pin255", - "VSS_N12": "pin255", - "N13": "pin277", - "VDD_CORE_N13": "pin277", - "N14": "pin299", - "VSS_N14": "pin299", - "N15": "pin321", - "VDDSHV3_N15": "pin321", - "N16": "pin343", - "VSS_N16": "pin343", - "PMC0_AD4": "pin365", - "N17": "pin365", - "PMC0_AD3": "pin387", - "N18": "pin387", - "PMC0_AD2": "pin409", - "N19": "pin409", - "PMC0_AD1": "pin431", - "N20": "pin431", - "PMC0_AD0": "pin453", - "N21": "pin453", - "PMC0_CLK": "pin475", - "N22": "pin475", - "DDR0_DQS2_n": "pin14", - "P1": "pin14", - "DDR0_DQ20": "pin36", - "P2": "pin36", - "DDR0_CKE0": "pin58", - "P3": "pin58", - "DDR0_BG0": "pin80", - "P4": "pin80", - "DDR0_CKE1": "pin102", - "P5": "pin102", - "DDR0_RESET0_n": "pin124", - "P6": "pin124", - "P7": "pin146", - "VSS_P7": "pin146", - "P8": "pin168", - "VDDS_DDR_P8": "pin168", - "P9": "pin190", - "VDDR_CORE_P9": "pin190", - "P10": "pin212", - "VDD_CORE_P10": "pin212", - "P11": "pin234", - "VSS_P11": "pin234", - "P12": "pin256", - "VDDR_CORE_P12": "pin256", - "P13": "pin278", - "VSS_P13": "pin278", - "P14": "pin300", - "VDD_CORE_P14": "pin300", - "P15": "pin322", - "VSS_P15": "pin322", - "VDDA_TEMP0": "pin344", - "P16": "pin344", - "P17": "pin366", - "VSS_P17": "pin366", - "PMC0_AD5": "pin388", - "P18": "pin388", - "PMC0_AD6": "pin410", - "P19": "pin410", - "P20": "pin432", - "VSS_P20": "pin432", - "PMC0_AD7": "pin454", - "P21": "pin454", - "ADCONFIG23": "pin476", - "P22": "pin476", - "DDR0_DQS2": "pin15", - "R1": "pin15", - "R2": "pin37", - "VSS_R2": "pin37", - "DDR0_DQ21": "pin59", - "R3": "pin59", - "R4": "pin81", - "VSS_R4": "pin81", - "DDR0_DQ19": "pin103", - "R5": "pin103", - "R6": "pin125", - "VSS_R6": "pin125", - "DDR0_BG1": "pin147", - "R7": "pin147", - "CAP_VDDS4": "pin169", - "R8": "pin169", - "R9": "pin191", - "VDD_CORE_R9": "pin191", - "R10": "pin213", - "VSS_R10": "pin213", - "VDDA_PLL1": "pin235", - "R11": "pin235", - "R12": "pin257", - "VSS_R12": "pin257", - "R13": "pin279", - "VDDSHV2_R13": "pin279", - "R14": "pin301", - "VSS_R14": "pin301", - "R15": "pin323", - "VDD_CORE_R15": "pin323", - "R16": "pin345", - "VSS_R16": "pin345", - "ADCONFIG39": "pin367", - "R17": "pin367", - "GPMC0_WAIT0": "pin389", - "R18": "pin389", - "ADCONFIG24": "pin411", - "R19": "pin411", - "PMC0_AD10": "pin433", - "R20": "pin433", - "PMC0_AD13": "pin455", - "R21": "pin455", - "PMC0_AD11": "pin477", - "R22": "pin477", - "T1": "pin16", - "VSS_T1": "pin16", - "DDR0_DQ22": "pin38", - "T2": "pin38", - "T3": "pin60", - "VSS_T3": "pin60", - "DDR0_DQ17": "pin82", - "T4": "pin82", - "T5": "pin104", - "VSS_T5": "pin104", - "DDR0_DQ16": "pin126", - "T6": "pin126", - "T7": "pin148", - "VSS_T7": "pin148", - "T8": "pin170", - "VDDSHV4_T8": "pin170", - "VDDA_CORE_USB": "pin192", - "T9": "pin192", - "VDDA_1P8_USB": "pin214", - "T10": "pin214", - "VDDA_CORE_CSIRX0": "pin236", - "T11": "pin236", - "VDDA_1P8_CSIRX0": "pin258", - "T12": "pin258", - "T13": "pin280", - "VDDSHV2_T13": "pin280", - "CAP_VDDS2": "pin302", - "T14": "pin302", - "T15": "pin324", - "VSS_T15": "pin324", - "T16": "pin346", - "VDD_CORE_T16": "pin346", - "T17": "pin368", - "VSS_T17": "pin368", - "PADCONFIG62": "pin390", - "T18": "pin390", - "PADCONFIG50": "pin412", - "T19": "pin412", - "ADCONFIG29": "pin434", - "T20": "pin434", - "ADCONFIG30": "pin456", - "T21": "pin456", - "PMC0_AD12": "pin478", - "T22": "pin478", - "DDR0_DM2": "pin17", - "U1": "pin17", - "U2": "pin39", - "VSS_U2": "pin39", - "DDR0_DQ23": "pin61", - "U3": "pin61", - "U4": "pin83", - "VSS_U4": "pin83", - "DDR0_DQ18": "pin105", - "U5": "pin105", - "U6": "pin127", - "VSS_U6": "pin127", - "USB1_RCALIB": "pin149", - "U7": "pin149", - "U8": "pin171", - "VDDSHV4_U8": "pin171", - "U9": "pin193", - "VSS_U9": "pin193", - "VDDA_3P3_USB": "pin215", - "U10": "pin215", - "RSVD6": "pin237", - "U11": "pin237", - "U12": "pin259", - "VSS_U12": "pin259", - "U13": "pin281", - "VDDSHV2_U13": "pin281", - "U14": "pin303", - "VSS_U14": "pin303", - "U15": "pin325", - "VDD_CORE_U15": "pin325", - "U16": "pin347", - "VSS_U16": "pin347", - "PADCONFIG63": "pin369", - "U17": "pin369", - "PADCONFIG51": "pin391", - "U18": "pin391", - "VOUT0_DATA3": "pin413", - "U19": "pin413", - "PADCONFIG48": "pin435", - "U20": "pin435", - "PADCONFIG47": "pin457", - "U21": "pin457", - "PADCONFIG46": "pin479", - "U22": "pin479", - "V1": "pin18", - "VSS_V1": "pin18", - "DDR0_DQ25": "pin40", - "V2": "pin40", - "V3": "pin62", - "VSS_V3": "pin62", - "DDR0_DQ26": "pin84", - "V4": "pin84", - "V5": "pin106", - "VSS_V5": "pin106", - "USB1_VBUS": "pin128", - "V6": "pin128", - "V7": "pin150", - "VSS_V7": "pin150", - "USB0_VBUS": "pin172", - "V8": "pin172", - "V9": "pin194", - "VSS_V9": "pin194", - "CSI0_RXRCALIB": "pin216", - "V10": "pin216", - "RSVD7": "pin238", - "V11": "pin238", - "MDIO0_MDC": "pin260", - "V12": "pin260", - "MDIO0_MDIO": "pin282", - "V13": "pin282", - "RGMII1_RD3": "pin304", - "V14": "pin304", - "RGMII1_RD1": "pin326", - "V15": "pin326", - "RGMII1_TD1": "pin348", - "V16": "pin348", - "PADCONFIG64": "pin370", - "V17": "pin370", - "PADCONFIG55": "pin392", - "V18": "pin392", - "PADCONFIG54": "pin414", - "V19": "pin414", - "V20": "pin436", - "VSS_V20": "pin436", - "VOUT0_DATA7": "pin458", - "V21": "pin458", - "PADCONFIG52": "pin480", - "V22": "pin480", - "DDR0_DQS3": "pin19", - "W1": "pin19", - "W2": "pin41", - "VSS_W2": "pin41", - "DDR0_DM3": "pin63", - "W3": "pin63", - "W4": "pin85", - "VSS_W4": "pin85", - "DDR0_DQ27": "pin107", - "W5": "pin107", - "W6": "pin129", - "VSS_W6": "pin129", - "MC0_DAT5": "pin151", - "W7": "pin151", - "W8": "pin173", - "VSS_W8": "pin173", - "MC0_DAT6": "pin195", - "W9": "pin195", - "USB0_RCALIB": "pin217", - "W10": "pin217", - "W11": "pin239", - "VSS_W11": "pin239", - "CSI0_RXN0": "pin261", - "W12": "pin261", - "CSI0_RXP0": "pin283", - "W13": "pin283", - "W14": "pin305", - "VSS_W14": "pin305", - "RGMII1_RD2": "pin327", - "W15": "pin327", - "RGMII1_TX_CTL": "pin349", - "W16": "pin349", - "GMII2_TD3": "pin371", - "W17": "pin371", - "ADCONFIG95": "pin393", - "W18": "pin393", - "PADCONFIG59": "pin415", - "W19": "pin415", - "VOUT0_DATA12": "pin437", - "W20": "pin437", - "PADCONFIG57": "pin459", - "W21": "pin459", - "PADCONFIG56": "pin481", - "W22": "pin481", - "DDR0_DQS3_n": "pin20", - "Y1": "pin20", - "DDR0_DQ24": "pin42", - "Y2": "pin42", - "Y3": "pin64", - "VSS_Y3": "pin64", - "DDR0_DQ28": "pin86", - "Y4": "pin86", - "Y5": "pin108", - "VSS_Y5": "pin108", - "PADCONFIG136": "pin130", - "Y6": "pin130", - "PADCONFIG131": "pin152", - "Y7": "pin152", - "MMC0_DAT4": "pin174", - "Y8": "pin174", - "Y9": "pin196", - "VSS_Y9": "pin196", - "USB1_DP": "pin218", - "Y10": "pin218", - "USB1_DM": "pin240", - "Y11": "pin240", - "Y12": "pin262", - "VSS_Y12": "pin262", - "CSI0_RXN1": "pin284", - "Y13": "pin284", - "CSI0_RXP1": "pin306", - "Y14": "pin306", - "Y15": "pin328", - "VSS_Y15": "pin328", - "RGMII1_TD2": "pin350", - "Y16": "pin350", - "RGMII1_TD0": "pin372", - "Y17": "pin372", - "GMII2_TD1": "pin394", - "Y18": "pin394", - "ADCONFIG89": "pin416", - "Y19": "pin416", - "GMII2_RD1": "pin438", - "Y20": "pin438", - "PADCONFIG60": "pin460", - "Y21": "pin460", - "PADCONFIG61": "pin482", - "Y22": "pin482" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing AMB0484A; donor AM62A74AUMHAAMBR (JLCPCB C22452575)" - }, - "AM67A74AKGHIAMWR": { - "family": "AM67A", - "componentExportName": "AM67A74AKGHIAMWR", - "manufacturerPartNumber": "AM67A74AKGHIAMWR", - "packageDrawing": "AMW0594A", - "status": "source-ready", - "drawingId": "AMW0594A", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - "R", - "T", - "U", - "V", - "W", - "Y", - "AA", - "AB", - "AC", - "AD", - "AE", - "AF", - "AG" - ], - "columnOrder": [ - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 25, 26, 27 - ], - "pitchMm": 0.65, - "padShape": "circle", - "padDiameterMm": 0.35 - }, - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing AMW0594A; official source https://www.ti.com/lit/gpn/AM67A pages 244,245,246" - }, - "AMC0300DDWVR": { - "family": "AMC0300D", - "componentExportName": "AMC0300DDWVR", - "manufacturerPartNumber": "AMC0300DDWVR", - "packageDrawing": "DWV0008A", - "status": "source-ready", - "drawingId": "DWV0008A", - "footprintPropSource": "footprint=\"soic_w12.9002mm_pw0.7mm_pl2mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUT": "pin6", - "GND2": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DWV0008A; donor UCC5390ECDWVR (JLCPCB C882869)" - }, - "AMC0311DQDWVRQ1": { - "family": "AMC0311D-Q1", - "componentExportName": "AMC0311DQDWVRQ1", - "manufacturerPartNumber": "AMC0311DQDWVRQ1", - "packageDrawing": "DWV0008A", - "status": "source-ready", - "drawingId": "DWV0008A", - "footprintPropSource": "footprint=\"soic_w12.9002mm_pw0.7mm_pl2mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUT": "pin6", - "GND2": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DWV0008A; donor UCC5390ECDWVR (JLCPCB C882869)" - }, - "CC2340R21N0RGER": { - "family": "CC2340R2", - "componentExportName": "CC2340R21N0RGER", - "manufacturerPartNumber": "CC2340R21N0RGER", - "packageDrawing": "RGE0024B", - "status": "source-ready", - "drawingId": "RGE0024B", - "footprintPropSource": "footprint=\"qfn24_thermalpad2.7mmx2.7mm_p0.4999mm_w4.6083mm_h4.606mm_pw0.24mm_pl0.58mm\"", - "physicalPadToPortHint": { - "25": "pin25", - "INP2": "pin1", - "PGND2": "pin2", - "PGND1": "pin3", - "VIN": "pin4", - "INN2": "pin5", - "INN1": "pin6", - "BSW": "pin7", - "ENP": "pin8", - "PSP": "pin9", - "ENN": "pin10", - "PSN": "pin11", - "NC2": "pin12", - "OUTN2": "pin13", - "OUTN1": "pin14", - "VNEG": "pin15", - "FBN": "pin16", - "VREF": "pin17", - "CN": "pin18", - "AGND": "pin19", - "NC1": "pin20", - "CP": "pin21", - "FBP": "pin22", - "VPOS": "pin23", - "INP1": "pin24", - "EP": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "25", - "name": "THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal and RF ground pad; connect to the PCB ground plane." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGE0024B; donor TPS65130RGER (JLCPCB C54989)" - }, - "CC2340R5MODAN0MHAR": { - "family": "CC2340R5MODA", - "componentExportName": "CC2340R5MODAN0MHAR", - "manufacturerPartNumber": "CC2340R5MODAN0MHAR", - "packageDrawing": "MHA0024A", - "status": "source-ready", - "drawingId": "MHA0024A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MHA0024A; official source https://www.ti.com/lit/gpn/CC2340R5MODA pages 64" - }, - "CC2531F128RHAR": { - "family": "CC2531-RF4CE", - "componentExportName": "CC2531F128RHAR", - "manufacturerPartNumber": "CC2531F128RHAR", - "packageDrawing": "RHA0040H", - "status": "source-ready", - "drawingId": "RHA0040H", - "footprintPropSource": "footprint=\"qfn40_thermalpad4.6mmx4.6mm_p0.4999mm_pw0.28mm_pl0.8mm\"", - "physicalPadToPortHint": { - "41": "pin41", - "DGND_BUS": "pin1", - "USB_P": "pin2", - "USB_N": "pin3", - "DVDD_USB": "pin4", - "P1_5": "pin5", - "P1_4": "pin6", - "P1_3": "pin7", - "P1_2": "pin8", - "P1_1": "pin9", - "DVDD2": "pin10", - "P1_0": "pin11", - "P0_7": "pin12", - "P0_6": "pin13", - "P0_5": "pin14", - "P0_4": "pin15", - "P0_3": "pin16", - "P0_2": "pin17", - "P0_1": "pin18", - "P0_0": "pin19", - "RESET_N": "pin20", - "AVDD5": "pin21", - "XOSC_Q1": "pin22", - "XOSC_Q2": "pin23", - "AVDD3": "pin24", - "RF_P": "pin25", - "RF_N": "pin26", - "AVDD2": "pin27", - "AVDD1": "pin28", - "AVDD4": "pin29", - "R_BIAS": "pin30", - "AVDD6": "pin31", - "pin32": "pin32", - "pin33": "pin33", - "P2_2": "pin34", - "P2_1": "pin35", - "P2_0": "pin36", - "P1_7": "pin37", - "P1_6": "pin38", - "DVDD1": "pin39", - "DCOUPL": "pin40", - "pin41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "GND", - "type": "Ground", - "description": "Exposed ground pad; the chip ground connection. Connect to a solid ground plane." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RHA0040H; donor CC2540F256RHAR (JLCPCB C22649)" - }, - "CC2755P105E0WRHAR": { - "family": "CC2755P10", - "componentExportName": "CC2755P105E0WRHAR", - "manufacturerPartNumber": "CC2755P105E0WRHAR", - "packageDrawing": "RHA0040T", - "status": "source-ready", - "drawingId": "RHA0040T", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "EGP", - "type": "GND", - "description": "Ground exposed pad; this is the device's only ground connection." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RHA0040T; official source https://www.ti.com/lit/gpn/CC2755P10 pages 91" - }, - "CC2755P207E0WRHAR": { - "family": "CC2755P20", - "componentExportName": "CC2755P207E0WRHAR", - "manufacturerPartNumber": "CC2755P207E0WRHAR", - "packageDrawing": "RHA0040T", - "status": "source-ready", - "drawingId": "RHA0040T", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "41", - "name": "EGP", - "type": "GND", - "description": "Ground exposed pad; this is the device's only ground connection." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RHA0040T; official source https://www.ti.com/lit/gpn/CC2755P10 pages 91" - }, - "CC3100R11MRGCR": { - "family": "CC3100", - "componentExportName": "CC3100R11MRGCR", - "manufacturerPartNumber": "CC3100R11MRGCR", - "packageDrawing": "RGC0064M", - "status": "source-ready", - "drawingId": "RGC0064M", - "footprintPropSource": "footprint=\"qfn64_thermalpad7.3mmx7.3mm_p0.4999mm_h9.6798mm_pw0.28mm_pl0.665mm_pin1location(bottomside,left)\"", - "physicalPadToPortHint": { - "GPIO10": "pin1", - "GPIO11": "pin2", - "GPIO12": "pin3", - "GPIO13": "pin4", - "GPIO14": "pin5", - "GPIO15": "pin6", - "GPIO16": "pin7", - "GPIO17": "pin8", - "VDD_DIG1": "pin9", - "VIN_IO1": "pin10", - "FLASH_SPI_CLK": "pin11", - "FLASH_SPI_DOUT": "pin12", - "FLASH_SPI_DIN": "pin13", - "FLASH_SPI_CS": "pin14", - "GPIO22": "pin15", - "TDI": "pin16", - "TDO": "pin17", - "GPIO28": "pin18", - "TCK": "pin19", - "TMS": "pin20", - "SOP2": "pin21", - "WLAN_TXAL_N": "pin22", - "WLAN_TXAL_P": "pin23", - "VDD_PLL": "pin24", - "LDO_IN2": "pin25", - "NC3": "pin26", - "NC2": "pin27", - "NC1": "pin28", - "ANTSEL1": "pin29", - "ANTSEL2": "pin30", - "RF_BG": "pin31", - "nRESET": "pin32", - "VDD_PA_IN": "pin33", - "SOP1": "pin34", - "SOP0": "pin35", - "LDO_IN1": "pin36", - "VIN_DCDC_ANA": "pin37", - "DCDC_ANA_SW": "pin38", - "VIN_DCDC_PA": "pin39", - "DCDC_PA_SW_P": "pin40", - "DCDC_PA_SW_N": "pin41", - "DCDC_PA_OUT": "pin42", - "DCDC_DIG_SW": "pin43", - "VIN_DCDC_DIG": "pin44", - "DCDC_ANA2_SW_P": "pin45", - "DCDC_ANA2_SW_N": "pin46", - "VDD_ANA2": "pin47", - "VDD_ANA1": "pin48", - "VDD_RAM": "pin49", - "GPIO0": "pin50", - "RTC_XTAL_P": "pin51", - "RTC_XTAL_N": "pin52", - "GPIO30": "pin53", - "VIN_IO2": "pin54", - "GPIO1": "pin55", - "VDD_DIG2": "pin56", - "GPIO2": "pin57", - "GPIO3": "pin58", - "GPIO4": "pin59", - "GPIO5": "pin60", - "GPIO6": "pin61", - "GPIO7": "pin62", - "GPIO8": "pin63", - "GPIO9": "pin64", - "EP": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGC0064M; donor CC3200R1M2RGC (JLCPCB C1526162)" - }, - "CC3300MODENIAMOZR": { - "family": "CC3300MOD", - "componentExportName": "CC3300MODENIAMOZR", - "manufacturerPartNumber": "CC3300MODENIAMOZR", - "packageDrawing": "MOZ0065A", - "status": "source-ready", - "drawingId": "MOZ0065A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32" - }, - "CC3301MODENIAMOZR": { - "family": "CC3301MOD", - "componentExportName": "CC3301MODENIAMOZR", - "manufacturerPartNumber": "CC3301MODENIAMOZR", - "packageDrawing": "MOZ0065A", - "status": "source-ready", - "drawingId": "MOZ0065A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32" - }, - "CC3350MODENIAMOZR": { - "family": "CC3350MOD", - "componentExportName": "CC3350MODENIAMOZR", - "manufacturerPartNumber": "CC3350MODENIAMOZR", - "packageDrawing": "MOZ0065A", - "status": "source-ready", - "drawingId": "MOZ0065A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32" - }, - "CC3351MODENIAMOZR": { - "family": "CC3351MOD", - "componentExportName": "CC3351MODENIAMOZR", - "manufacturerPartNumber": "CC3351MODENIAMOZR", - "packageDrawing": "MOZ0065A", - "status": "source-ready", - "drawingId": "MOZ0065A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MOZ0065A; official source https://www.ti.com/lit/gpn/CC3300MOD pages 32" - }, - "CC3501ENJARSHR": { - "family": "CC3501E", - "componentExportName": "CC3501ENJARSHR", - "manufacturerPartNumber": "CC3501ENJARSHR", - "packageDrawing": "RSH0056G", - "status": "source-ready", - "drawingId": "RSH0056G", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "57", - "name": "EP/THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RSH0056G; official source https://www.ti.com/lit/gpn/CC3501E pages 60" - }, - "CC3551ENJARSHR": { - "family": "CC3551E", - "componentExportName": "CC3551ENJARSHR", - "manufacturerPartNumber": "CC3551ENJARSHR", - "packageDrawing": "RSH0056G", - "status": "source-ready", - "drawingId": "RSH0056G", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "57", - "name": "EP/THERMAL_PAD", - "type": "GND", - "description": "Exposed thermal pad tied directly to ground in the TI reference schematic." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RSH0056G; official source https://www.ti.com/lit/gpn/CC3501E pages 60" - }, - "CSD18531Q5AT": { - "family": "CSD18531Q5A", - "componentExportName": "CSD18531Q5AT", - "manufacturerPartNumber": "CSD18531Q5AT", - "packageDrawing": "DQJ0008A", - "status": "source-ready", - "drawingId": "DQJ0008A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "9": "pin9", - "S3": "pin1", - "S2": "pin2", - "S1": "pin3", - "G": "pin4", - "D4": "pin5", - "D3": "pin6", - "D2": "pin7", - "D1": "pin8", - "D5": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "D", - "type": "Power", - "description": "Exposed power pad electrically connected to the MOSFET drain." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DQJ0008A; donor CSD17578Q5A (JLCPCB C2871447)" - }, - "CSD18541F5T": { - "family": "CSD18541F5", - "componentExportName": "CSD18541F5T", - "manufacturerPartNumber": "CSD18541F5T", - "packageDrawing": "YJK0003A", - "status": "source-ready", - "drawingId": "YJK0003A", - "footprintPropSource": "footprint={\n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing YJK0003A; official source https://www.ti.com/lit/gpn/CSD18541F5 pages 14" - }, - "DAC43701DSGR": { - "family": "DAC43701", - "componentExportName": "DAC43701DSGR", - "manufacturerPartNumber": "DAC43701DSGR", - "packageDrawing": "DSG0008A", - "status": "source-ready", - "drawingId": "DSG0008A", - "footprintPropSource": "footprint=\"dfn8_thermalpad0.9mmx1.6mm_p0.5001mm_w2.4209mm_pw0.25mm_pl0.521mm\"", - "physicalPadToPortHint": { - "9": "pin9", - "AGND": "pin1", - "FB": "pin2", - "VOUT1": "pin3", - "VOUT2": "pin4", - "EN": "pin5", - "SW1": "pin6", - "SW2": "pin7", - "VIN": "pin8", - "EPAD": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "EP", - "type": "Ground", - "description": "Exposed pad tied to the AGND/VSS ground node." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DSG0008A; donor TPS61021ADSGR (JLCPCB C193037)" - }, - "DLP4500AFQD": { - "family": "DLP4500", - "componentExportName": "DLP4500AFQD", - "manufacturerPartNumber": "DLP4500AFQD", - "packageDrawing": "FQD-2510852", - "status": "source-ready", - "drawingId": "FQD-2510852", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "coordinateGrid": { - "rowOrder": ["A", "B", "C", "D", "E", "F", "G", "H", "J", "K"], - "columnOrder": [1, 2, 3, 4, 5, 18, 19, 20, 21, 22], - "rowAxis": "x", - "rowPitchMm": 0.742, - "columnPositionsMm": { - "1": -6.307, - "2": -5.565, - "3": -4.823, - "4": -4.081, - "5": -3.339, - "18": 3.339, - "19": 4.081, - "20": 4.823, - "21": 5.565, - "22": 6.307 - }, - "padShape": "rect", - "padWidthMm": 0.6, - "padHeightMm": 0.6 - }, - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing FQD-2510852; official source https://www.ti.com/lit/gpn/DLP4500 pages 50,51,52" - }, - "DP83826AERHBR": { - "family": "DP83826AE", - "componentExportName": "DP83826AERHBR", - "manufacturerPartNumber": "DP83826AERHBR", - "packageDrawing": "RHB0032M", - "status": "source-ready", - "drawingId": "RHB0032M", - "footprintPropSource": "footprint=\"qfn32_thermalpad2.1mmx2.1mm_p0.4999mm_h5.6798mm_pw0.28mm_pl0.665mm\"", - "physicalPadToPortHint": { - "33": "pin33", - "ModeSelect": "pin1", - "CEXT": "pin2", - "VDDA3V3": "pin3", - "RD_M": "pin4", - "RD_P": "pin5", - "TD_M": "pin6", - "TD_P": "pin7", - "XO": "pin8", - "pin9": "pin9", - "RBIAS": "pin10", - "MDIO": "pin11", - "MDC": "pin12", - "pin13": "pin13", - "pin14": "pin14", - "pin15": "pin15", - "pin16": "pin16", - "VDDIO": "pin17", - "pin18": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "TX_EN": "pin23", - "TX_D0": "pin24", - "TX_D1": "pin25", - "TX_D2": "pin26", - "TX_D3": "pin27", - "pin28": "pin28", - "pin29": "pin29", - "pin30": "pin30", - "pin31": "pin31", - "RST_N": "pin32", - "EP": "pin33" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "33", - "name": "THERMAL_PAD", - "type": "Ground", - "description": "Thermal pad; connect to GND." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RHB0032M; donor DP83826IRHBR (JLCPCB C3225658)" - }, - "DRV3256EPAPRQ1": { - "family": "DRV3256-Q1", - "componentExportName": "DRV3256EPAPRQ1", - "manufacturerPartNumber": "DRV3256EPAPRQ1", - "packageDrawing": "PAP0064N", - "status": "source-ready", - "drawingId": "PAP0064N", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "Exposed Pad": "pin65" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing PAP0064N; official source https://www.ti.com/lit/gpn/DRV3256-Q1 pages 16" - }, - "DRV8363QRGZRQ1": { - "family": "DRV8363-Q1", - "componentExportName": "DRV8363QRGZRQ1", - "manufacturerPartNumber": "DRV8363QRGZRQ1", - "packageDrawing": "RGZ0048M", - "status": "source-ready", - "drawingId": "RGZ0048M", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "49", - "name": "THERMAL_PAD", - "type": "Thermal", - "description": "Used for thermal dissipation, not electrical grounding; has a high-impedance connection to GND and AGND." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RGZ0048M; official source https://www.ti.com/lit/gpn/DRV8363-Q1 pages 101" - }, - "ESD751DYAR": { - "family": "ESD751", - "componentExportName": "ESD751DYAR", - "manufacturerPartNumber": "ESD751DYAR", - "packageDrawing": "DYA0002A", - "status": "source-ready", - "drawingId": "DYA0002A", - "footprintPropSource": "footprint=\"res_p1.4999mm_pw0.6mm_ph0.4mm\"", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "I_O": "pin1", - "GND": "pin2" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DYA0002A; donor TPD1E10B06DYAR (JLCPCB C3712135)" - }, - "HDC3021QDEHRQ1": { - "family": "HDC3021-Q1", - "componentExportName": "HDC3021QDEHRQ1", - "manufacturerPartNumber": "HDC3021QDEHRQ1", - "packageDrawing": "DEH0008A", - "status": "source-ready", - "drawingId": "DEH0008A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DEH0008A; official source https://www.ti.com/lit/gpn/HDC3021-Q1 pages 44" - }, - "INA280A3IDCKT": { - "family": "INA280", - "componentExportName": "INA280A3IDCKT", - "manufacturerPartNumber": "INA280A3IDCKT", - "packageDrawing": "DCK0005A", - "status": "source-ready", - "drawingId": "DCK0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "B": "pin2", - "GND": "pin3", - "Y": "pin4", - "VCC": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" - }, - "ISO6420DR": { - "family": "ISO6420", - "componentExportName": "ISO6420DR", - "manufacturerPartNumber": "ISO6420DR", - "packageDrawing": "D0008B", - "status": "source-ready", - "drawingId": "D0008B", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUTH": "pin6", - "OUTL": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" - }, - "ISO6421DR": { - "family": "ISO6421", - "componentExportName": "ISO6421DR", - "manufacturerPartNumber": "ISO6421DR", - "packageDrawing": "D0008B", - "status": "source-ready", - "drawingId": "D0008B", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUTH": "pin6", - "OUTL": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" - }, - "ISO6421DRQ1": { - "family": "ISO6421-Q1", - "componentExportName": "ISO6421DRQ1", - "manufacturerPartNumber": "ISO6421DRQ1", - "packageDrawing": "D0008B", - "status": "source-ready", - "drawingId": "D0008B", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUTH": "pin6", - "OUTL": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" - }, - "ISO6431DBQR": { - "family": "ISO6431", - "componentExportName": "ISO6431DBQR", - "manufacturerPartNumber": "ISO6431DBQR", - "packageDrawing": "DBQ0016A", - "status": "source-ready", - "drawingId": "DBQ0016A", - "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "INA": "pin2", - "INB": "pin3", - "INC": "pin4", - "IND": "pin5", - "INE": "pin6", - "INF": "pin7", - "GND1": "pin8", - "GND2": "pin9", - "OUTF": "pin10", - "OUTE": "pin11", - "OUTD": "pin12", - "OUTC": "pin13", - "OUTB": "pin14", - "OUTA": "pin15", - "VCC2": "pin16" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" - }, - "ISO6440DBQR": { - "family": "ISO6440", - "componentExportName": "ISO6440DBQR", - "manufacturerPartNumber": "ISO6440DBQR", - "packageDrawing": "DBQ0016A", - "status": "source-ready", - "drawingId": "DBQ0016A", - "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "INA": "pin2", - "INB": "pin3", - "INC": "pin4", - "IND": "pin5", - "INE": "pin6", - "INF": "pin7", - "GND1": "pin8", - "GND2": "pin9", - "OUTF": "pin10", - "OUTE": "pin11", - "OUTD": "pin12", - "OUTC": "pin13", - "OUTB": "pin14", - "OUTA": "pin15", - "VCC2": "pin16" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" - }, - "ISO6440DBQRQ1": { - "family": "ISO6440-Q1", - "componentExportName": "ISO6440DBQRQ1", - "manufacturerPartNumber": "ISO6440DBQRQ1", - "packageDrawing": "DBQ0016A", - "status": "source-ready", - "drawingId": "DBQ0016A", - "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "INA": "pin2", - "INB": "pin3", - "INC": "pin4", - "IND": "pin5", - "INE": "pin6", - "INF": "pin7", - "GND1": "pin8", - "GND2": "pin9", - "OUTF": "pin10", - "OUTE": "pin11", - "OUTD": "pin12", - "OUTC": "pin13", - "OUTB": "pin14", - "OUTA": "pin15", - "VCC2": "pin16" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" - }, - "ISO6442DBQR": { - "family": "ISO6442", - "componentExportName": "ISO6442DBQR", - "manufacturerPartNumber": "ISO6442DBQR", - "packageDrawing": "DBQ0016A", - "status": "source-ready", - "drawingId": "DBQ0016A", - "footprintPropSource": "footprint=\"dfn16_pillpads_p0.635mm_w7.1244mm_pw0.3556mm_pl1.8148mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "INA": "pin2", - "INB": "pin3", - "INC": "pin4", - "IND": "pin5", - "INE": "pin6", - "INF": "pin7", - "GND1": "pin8", - "GND2": "pin9", - "OUTF": "pin10", - "OUTE": "pin11", - "OUTD": "pin12", - "OUTC": "pin13", - "OUTB": "pin14", - "OUTA": "pin15", - "VCC2": "pin16" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBQ0016A; donor ISO7760DBQR (JLCPCB C2868628)" - }, - "IWRL6432BRQAAMYR": { - "family": "IWRL6432AOP", - "componentExportName": "IWRL6432BRQAAMYR", - "manufacturerPartNumber": "IWRL6432BRQAAMYR", - "packageDrawing": "AMY0101A", - "status": "source-ready", - "drawingId": "AMY0101A", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N" - ], - "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], - "rowPitchMm": 0.5, - "columnPositionsMm": { - "1": -5.125, - "2": -4.625, - "3": -4.125, - "4": -3.625, - "5": -3.125, - "6": 3.125, - "7": 3.625, - "8": 4.125, - "9": 4.625, - "10": 5.125 - }, - "padShape": "circle", - "padDiameterMm": 0.25 - }, - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing AMY0101A; official source https://www.ti.com/lit/gpn/IWRL6432AOP pages 72,73,74" - }, - "XI6432BAFCLIMBBR": { - "family": "IWRL6432WMOD", - "componentExportName": "XI6432BAFCLIMBBR", - "manufacturerPartNumber": "XI6432BAFCLIMBBR", - "packageDrawing": "MBB0030A", - "status": "source-ready", - "drawingId": "MBB0030A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing MBB0030A; official source https://www.ti.com/lit/gpn/IWRL6432WMOD pages 30,31,32" - }, - "LM111733QKVURQ1": { - "family": "LM1117-Q1", - "componentExportName": "LM111733QKVURQ1", - "manufacturerPartNumber": "LM111733QKVURQ1", - "packageDrawing": "KVU0003A", - "status": "source-ready", - "drawingId": "KVU0003A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "GND": "pin1", - "OUT": "pin2", - "IN": "pin3", - "Tab": "pin2" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing KVU0003A; donor TLV76133KVUR (JLCPCB C41835077)" - }, - "LM2902BIDR": { - "family": "LM2902B", - "componentExportName": "LM2902BIDR", - "manufacturerPartNumber": "LM2902BIDR", - "packageDrawing": "D0014A", - "status": "source-ready", - "drawingId": "D0014A", - "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "pin2": "pin2", - "B": "pin3", - "pin4": "pin4", - "C": "pin5", - "pin6": "pin6", - "VSS": "pin7", - "pin8": "pin8", - "D": "pin9", - "pin10": "pin10", - "E": "pin11", - "pin12": "pin12", - "F": "pin13", - "VDD": "pin14" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" - }, - "LM3644YFFR": { - "family": "LM3644", - "componentExportName": "LM3644YFFR", - "manufacturerPartNumber": "LM3644YFFR", - "packageDrawing": "YFF0012", - "status": "source-ready", - "drawingId": "YFF0012", - "footprintPropSource": "footprint={\n \n \n \n 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drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016)" - }, - "LMG1210RVRR": { - "family": "LMG1210", - "componentExportName": "LMG1210RVRR", - "manufacturerPartNumber": "LMG1210RVRR", - "packageDrawing": "RVR0019A", - "status": "source-ready", - "drawingId": "RVR0019A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RVR0019A; official source https://www.ti.com/lit/gpn/LMG1210 pages 24" - }, - "LMG3612REQR": { - "family": "LMG3612", - "componentExportName": "LMG3612REQR", - "manufacturerPartNumber": "LMG3612REQR", - "packageDrawing": "REQ0038A", - "status": "source-ready", - "drawingId": "REQ0038A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "39", - "name": "PAD/S", - "type": "Power", - "description": "Thermal power pad internally connected to S, AGND, and NC2; PAD equals S and may conduct all source current." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing REQ0038A; official source https://www.ti.com/lit/gpn/LMG3612 pages 26" - }, - "LMK6DA10000ADLFR": { - "family": "LMK6D", - "componentExportName": "LMK6DA10000ADLFR", - "manufacturerPartNumber": "LMK6DA10000ADLFR", - "packageDrawing": "DLF0006B", - "status": "source-ready", - "drawingId": "DLF0006B", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DLF0006B; official source https://www.ti.com/lit/gpn/LMK6D pages 64" - }, - "LMP8480MMX-T/NOPB": { - "family": "LMP8480", - "componentExportName": "LMP8480MMX_T_NOPB", - "manufacturerPartNumber": "LMP8480MMX-T/NOPB", - "packageDrawing": "DGK0008A", - "status": "source-ready", - "drawingId": "DGK0008A", - "footprintPropSource": "footprint=\"dfn8_pillpads_p0.65mm_w5.8498mm_pw0.38mm_pl1.45mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "OUTA": "pin1", - "-INA": "pin2", - "+INA": "pin3", - "V": "pin4", - "+INB": "pin5", - "-INB": "pin6", - "OUTB": "pin7", - "V_POS": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632)" - }, - "LMP8601MA/NOPB": { - "family": "LMP8601", - "componentExportName": "LMP8601MA_NOPB", - "manufacturerPartNumber": "LMP8601MA/NOPB", - "packageDrawing": "D0008A", - "status": "source-ready", - "drawingId": "D0008A", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "1OUT": "pin1", - "1IN_N": "pin2", - "1IN_P": "pin3", - "GND": "pin4", - "2IN_P": "pin5", - "2IN_N": "pin6", - "2OUT": "pin7", - "VCC": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" - }, - "MSP430F5437AIPNR": { - "family": "MSP430F5437A", - "componentExportName": "MSP430F5437AIPNR", - "manufacturerPartNumber": "MSP430F5437AIPNR", - "packageDrawing": "PN0080A", - "status": "source-ready", - "drawingId": "PN0080A", - "footprintPropSource": "footprint=\"qfn80_pillpads_p0.4999mm_h15.4998mm_pw0.28mm_pl1.5mm\"", - "physicalPadToPortHint": { - "GPIO30": "pin1", - "GPIO31": "pin2", - "GPIO29": "pin3", - "GPIO28": "pin4", - "XRSn": "pin5", - "GPIO46": "pin6", - "VDDIO1": "pin7", - "VDD1": "pin8", - "VSS1": "pin9", - "A6": "pin10", - "C6": "pin11", - "pin12": "pin12", - "pin13": "pin13", - "pin14": "pin14", - "pin15": "pin15", - "pin16": "pin16", - "pin17": "pin17", - "A1": "pin18", - "pin19": "pin19", - "VREFHI": "pin20", - "VREFLO": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "VSSA": "pin25", - "VDDA": "pin26", - "pin27": "pin27", - "pin28": "pin28", - "pin29": "pin29", - "VSS2": "pin30", - "VDD2": "pin31", - "VDDIO2": "pin32", - "FLT2": "pin33", - "FLT1": "pin34", - "GPIO13": "pin35", - "GPIO12": "pin36", - "GPIO11": "pin37", - "GPIO33": "pin38", - "GPIO16": "pin39", - "GPIO17": "pin40", - "GPIO24": "pin41", - "GPIO25": "pin42", - "GPIO26": "pin43", - "GPIO27": "pin44", - "TCK": "pin45", - "pin46": "pin46", - "TMS": "pin47", - "pin48": "pin48", - "GPIO32": "pin49", - "pin50": "pin50", - "pin51": "pin51", - "VDDIO3": "pin52", - "VDD3": "pin53", - "GPIO43": "pin54", - "VSS3": "pin55", - "GPIO39": "pin56", - "GPIO42": "pin57", - "GPIO8": "pin58", - "GPIO4": "pin59", - "GPIO3": "pin60", - "GPIO2": "pin61", - "GPIO1": "pin62", - "GPIO0": "pin63", - "GPIO40": "pin64", - "GPIO23": "pin65", - "GPIO41": "pin66", - "GPIO22": "pin67", - "GPIO7": "pin68", - "GPIO44": "pin69", - "VSS4": "pin70", - "VDD4": "pin71", - "VDDIO4": "pin72", - "GPIO45": "pin73", - "GPIO5": "pin74", - "GPIO9": "pin75", - "GPIO10": "pin76", - "GPIO34": "pin77", - "GPIO15": "pin78", - "GPIO14": "pin79", - "GPIO6": "pin80" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing PN0080A; donor F280025PNSR (JLCPCB C5218674)" - }, - "MSP430FR2532IRGER": { - "family": "MSP430FR2532", - "componentExportName": "MSP430FR2532IRGER", - "manufacturerPartNumber": "MSP430FR2532IRGER", - "packageDrawing": "RGE0024H", - "status": "source-ready", - "drawingId": "RGE0024H", - "footprintPropSource": "footprint=\"qfn24_thermalpad2.7mmx2.7mm_p0.4999mm_h4.6562mm_pw0.28mm_pl0.633mm\"", - "physicalPadToPortHint": { - "IN2": "pin1", - "IN1": "pin2", - "B_GATE": "pin3", - "DRV": "pin4", - "IN_SYS": "pin5", - "UVLO": "pin6", - "PLIM": "pin7", - "GND": "pin8", - "dVdT": "pin9", - "ILIM": "pin10", - "MODE": "pin11", - "SHDN": "pin12", - "IMON": "pin13", - "FLT": "pin14", - "PGTH": "pin15", - "PGOOD": "pin16", - "OUT2": "pin17", - "OUT1": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "EP": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529)" - }, - "MSP430FR5969IRGZR": { - "family": "MSP430FR5969", - "componentExportName": "MSP430FR5969IRGZR", - "manufacturerPartNumber": "MSP430FR5969IRGZR", - "packageDrawing": "RGZ0048B", - "status": "source-ready", - "drawingId": "RGZ0048B", - "footprintPropSource": "footprint=\"qfn48_thermalpad4.1mmx4.1mm_pillpads_p0.5004mm_h7.9995mm_pw0.28mm_pl0.85mm_pin1location(bottomside,left)\"", - "physicalPadToPortHint": { - "TD_P_A": "pin1", - "TD_M_A": "pin2", - "VDDA2P52": "pin3", - "TD_P_B": "pin4", - "TD_M_B": "pin5", - "VDD1P04": "pin6", - "TD_P_C": "pin7", - "TD_M_C": "pin8", - "VDDA2P51": "pin9", - "TD_P_D": "pin10", - "TD_M_D": "pin11", - "RBIAS": "pin12", - "VDDA1P82": "pin13", - "X_O": "pin14", - "X_I": "pin15", - "MDC": "pin16", - "MDIO": "pin17", - "CLK_OUT": "pin18", - "VDDIO3": "pin19", - "JTAG_CLK": "pin20", - "JTAG_TDO": "pin21", - "JTAG_TMS": "pin22", - "JTAG_TDI": "pin23", - "VDD1P03": "pin24", - "TX_D3": "pin25", - "TX_D2": "pin26", - "TX_D1": "pin27", - "TX_D0": "pin28", - "GTX_CLK": "pin29", - "VDDIO2": "pin30", - "VDD1P02": "pin31", - "RX_CLK": "pin32", - "RX_D0": "pin33", - "RX_D1": "pin34", - "RX_D2": "pin35", - "RX_D3": "pin36", - "TX_CTRL": "pin37", - "RX_CTRL": "pin38", - "GPIO_0": "pin39", - "GPIO_1": "pin40", - "VDDIO1": "pin41", - "VDD1P01": "pin42", - "RESET_N": "pin43", - "pin44": "pin44", - "LED_2": "pin45", - "LED_1": "pin46", - "LED_0": "pin47", - "VDDA1P81": "pin48", - "pin49": "pin49", - "Pad": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766)" - }, - "XMSPM0G1218SRGZR": { - "family": "MSPM0G1218", - "componentExportName": "XMSPM0G1218SRGZR", - "manufacturerPartNumber": "XMSPM0G1218SRGZR", - "packageDrawing": "RGZ0048B", - "status": "source-ready", - "drawingId": "RGZ0048B", - "footprintPropSource": "footprint=\"qfn48_thermalpad4.1mmx4.1mm_pillpads_p0.5004mm_h7.9995mm_pw0.28mm_pl0.85mm_pin1location(bottomside,left)\"", - "physicalPadToPortHint": { - "49": "pin49", - "TD_P_A": "pin1", - "TD_M_A": "pin2", - "VDDA2P52": "pin3", - "TD_P_B": "pin4", - "TD_M_B": "pin5", - "VDD1P04": "pin6", - "TD_P_C": "pin7", - "TD_M_C": "pin8", - "VDDA2P51": "pin9", - "TD_P_D": "pin10", - "TD_M_D": "pin11", - "RBIAS": "pin12", - "VDDA1P82": "pin13", - "X_O": "pin14", - "X_I": "pin15", - "MDC": "pin16", - "MDIO": "pin17", - "CLK_OUT": "pin18", - "VDDIO3": "pin19", - "JTAG_CLK": "pin20", - "JTAG_TDO": "pin21", - "JTAG_TMS": "pin22", - "JTAG_TDI": "pin23", - "VDD1P03": "pin24", - "TX_D3": "pin25", - "TX_D2": "pin26", - "TX_D1": "pin27", - "TX_D0": "pin28", - "GTX_CLK": "pin29", - "VDDIO2": "pin30", - "VDD1P02": "pin31", - "RX_CLK": "pin32", - "RX_D0": "pin33", - "RX_D1": "pin34", - "RX_D2": "pin35", - "RX_D3": "pin36", - "TX_CTRL": "pin37", - "RX_CTRL": "pin38", - "GPIO_0": "pin39", - "GPIO_1": "pin40", - "VDDIO1": "pin41", - "VDD1P01": "pin42", - "RESET_N": "pin43", - "pin44": "pin44", - "LED_2": "pin45", - "LED_1": "pin46", - "LED_0": "pin47", - "VDDA1P81": "pin48", - "pin49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "49", - "name": "QFN_PAD/THERMAL_PAD", - "type": "GND", - "description": "QFN exposed thermal pad; TI recommends connection to VSS and a continuous ground plane." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGZ0048B; donor DP83867CRRGZR (JLCPCB C544766)" - }, - "MSPM0G5117SPMR": { - "family": "MSPM0G5117", - "componentExportName": "MSPM0G5117SPMR", - "manufacturerPartNumber": "MSPM0G5117SPMR", - "packageDrawing": "PM0064A", - "status": "source-ready", - "drawingId": "PM0064A", - "footprintPropSource": "footprint=\"lga64_grid16x16_pillpads_p0.4999mm_w12.8998mm_h12.8998mm_pl1.8mm\"", - "physicalPadToPortHint": { - "pin1": "pin1", - "pin2": "pin2", - "pin3": "pin3", - "pin4": "pin4", - "pin5": "pin5", - "pin6": "pin6", - "pin7": "pin7", - "DVSS": "pin8", - "DVCC": "pin9", - "pin10": "pin10", - "pin11": "pin11", - "pin12": "pin12", - "pin13": "pin13", - "pin14": "pin14", - "pin15": "pin15", - "pin16": "pin16", - "pin17": "pin17", - "pin18": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "pin25": "pin25", - "pin26": "pin26", - "pin27": "pin27", - "pin28": "pin28", - "pin29": "pin29", - "pin30": "pin30", - "pin31": "pin31", - "pin32": "pin32", - "pin33": "pin33", - "pin34": "pin34", - "pin35": "pin35", - "pin36": "pin36", - "pin37": "pin37", - "pin38": "pin38", - "pin39": "pin39", - "pin40": "pin40", - "pin41": "pin41", - "pin42": "pin42", - "pin43": "pin43", - "pin44": "pin44", - "pin45": "pin45", - "pin46": "pin46", - "pin47": "pin47", - "pin48": "pin48", - "pin49": "pin49", - "pin50": "pin50", - "pin51": "pin51", - "pin52": "pin52", - "pin53": "pin53", - "pin54": "pin54", - "pin55": "pin55", - "pin56": "pin56", - "pin57": "pin57", - "pin58": "pin58", - "pin59": "pin59", - "pin60": "pin60", - "pin61": "pin61", - "pin62": "pin62", - "pin63": "pin63", - "pin64": "pin64" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing PM0064A; donor MSP430FR4133IPMR (JLCPCB C106759)" - }, - "MSPM0L1343TDGS20R": { - "family": "MSPM0L1343", - "componentExportName": "MSPM0L1343TDGS20R", - "manufacturerPartNumber": "MSPM0L1343TDGS20R", - "packageDrawing": "DGS0020A", - "status": "source-ready", - "drawingId": "DGS0020A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "GNA": "pin1", - "VREF_A": "pin2", - "A1": "pin3", - "A2": "pin4", - "A3": "pin5", - "A4": "pin6", - "A5": "pin7", - "A6": "pin8", - "A7": "pin9", - "A8": "pin10", - "B8": "pin11", - "B7": "pin12", - "B6": "pin13", - "B5": "pin14", - "B4": "pin15", - "B3": "pin16", - "B2": "pin17", - "B1": "pin18", - "VREF_B": "pin19", - "EN": "pin20" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGS0020A; donor LSF0108DGSR (JLCPCB C6653422)" - }, - "XM33C321ASPZR": { - "family": "MSPM33C321A", - "componentExportName": "XM33C321ASPZR", - "manufacturerPartNumber": "XM33C321ASPZR", - "packageDrawing": "PZ0100A", - "status": "source-ready", - "drawingId": "PZ0100A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49", - "50": "pin50", - "51": "pin51", - "52": "pin52", - "53": "pin53", - "54": "pin54", - "55": "pin55", - "56": "pin56", - "57": "pin57", - "58": "pin58", - "59": "pin59", - "60": "pin60", - "61": "pin61", - "62": "pin62", - "63": "pin63", - "64": "pin64", - "65": "pin65", - "66": "pin66", - "67": "pin67", - "68": "pin68", - "69": "pin69", - "70": "pin70", - "71": "pin71", - "72": "pin72", - "73": "pin73", - "74": "pin74", - "75": "pin75", - "76": "pin76", - "77": "pin77", - "78": "pin78", - "79": "pin79", - "80": "pin80", - "81": "pin81", - "82": "pin82", - "83": "pin83", - "84": "pin84", - "85": "pin85", - "86": "pin86", - "87": "pin87", - "88": "pin88", - "89": "pin89", - "90": "pin90", - "91": "pin91", - "92": "pin92", - "93": "pin93", - "94": "pin94", - "95": "pin95", - "96": "pin96", - "97": "pin97", - "98": "pin98", - "99": "pin99", - "100": "pin100" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing PZ0100A; official source https://www.ti.com/lit/gpn/MSPM33C321A pages 111" - }, - "OPA371DDBVR": { - "family": "OPA371D", - "componentExportName": "OPA371DDBVR", - "manufacturerPartNumber": "OPA371DDBVR", - "packageDrawing": "DBV0005A", - "status": "source-ready", - "drawingId": "DBV0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "OUT": "pin1", - "V_NEG": "pin2", - "IN_POS": "pin3", - "IN_NEG": "pin4", - "V_POS": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" - }, - "REF2125IDBVR": { - "family": "REF2125", - "componentExportName": "REF2125IDBVR", - "manufacturerPartNumber": "REF2125IDBVR", - "packageDrawing": "DBV0005A", - "status": "source-ready", - "drawingId": "DBV0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "OUT": "pin1", - "V_NEG": "pin2", - "IN_POS": "pin3", - "IN_NEG": "pin4", - "V_POS": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" - }, - "SN65HVD96DR": { - "family": "SN65HVD96", - "componentExportName": "SN65HVD96DR", - "manufacturerPartNumber": "SN65HVD96DR", - "packageDrawing": "D0008A", - "status": "source-ready", - "drawingId": "D0008A", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "1OUT": "pin1", - "1IN_N": "pin2", - "1IN_P": "pin3", - "GND": "pin4", - "2IN_P": "pin5", - "2IN_N": "pin6", - "2OUT": "pin7", - "VCC": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" - }, - "SN65LV1224BDB": { - "family": "SN65LV1224B", - "componentExportName": "SN65LV1224BDB", - "manufacturerPartNumber": "SN65LV1224BDB", - "packageDrawing": "DB0028A", - "status": "source-ready", - "drawingId": "DB0028A", - "footprintPropSource": "footprint=\"dfn28_pillpads_p0.65mm_w8.9258mm_pw0.364mm_pl2.0155mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "SYNC1": "pin1", - "SYNC2": "pin2", - "DIN0": "pin3", - "DIN1": "pin4", - "DIN2": "pin5", - "DIN3": "pin6", - "DIN4": "pin7", - "DIN5": "pin8", - "DIN6": "pin9", - "DIN7": "pin10", - "DIN8": "pin11", - "DIN9": "pin12", - "pin13": "pin13", - "TCLK": "pin14", - "DGND2": "pin15", - "DGND1": "pin16", - "AVCC2": "pin17", - "AGND4": "pin18", - "DEN": "pin19", - "AGND3": "pin20", - "pin21": "pin21", - "DO_POS": "pin22", - "AGND2": "pin23", - "PWRDN": "pin24", - "AGND1": "pin25", - "AVCC1": "pin26", - "DVCC2": "pin27", - "DVCC1": "pin28" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DB0028A; donor SN65LV1023ADB (JLCPCB C2863118)" - }, - "SN74AUP2G14DSFR": { - "family": "SN74AUP2G14", - "componentExportName": "SN74AUP2G14DSFR", - "manufacturerPartNumber": "SN74AUP2G14DSFR", - "packageDrawing": "DSF0006A", - "status": "source-ready", - "drawingId": "DSF0006A", - "footprintPropSource": "footprint=\"sot963_w1.2001mm_pw0.17mm_pl0.4mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "D": "pin1", - "CLK": "pin2", - "GND": "pin3", - "Q": "pin4", - "NC": "pin5", - "VCC": "pin6" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DSF0006A; donor SN74AUP1G79DSFR (JLCPCB C2677981)" - }, - "SN74AUP2G240DCUR": { - "family": "SN74AUP2G240", - "componentExportName": "SN74AUP2G240DCUR", - "manufacturerPartNumber": "SN74AUP2G240DCUR", - "packageDrawing": "DCU0008A", - "status": "source-ready", - "drawingId": "DCU0008A", - "footprintPropSource": "footprint=\"dfn8_pillpads_p0.5001mm_w3.8498mm_pw0.25mm_pl0.75mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "1A": "pin1", - "1B": "pin2", - "2Y": "pin3", - "GND": "pin4", - "2A": "pin5", - "2B": "pin6", - "1Y": "pin7", - "VCC": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DCU0008A; donor SN74LVC2G08DCUR (JLCPCB C91875)" - }, - "SN74HCS03DR": { - "family": "SN74HCS03", - "componentExportName": "SN74HCS03DR", - "manufacturerPartNumber": "SN74HCS03DR", - "packageDrawing": "D0014A", - "status": "source-ready", - "drawingId": "D0014A", - "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "pin2": "pin2", - "B": "pin3", - "pin4": "pin4", - "C": "pin5", - "pin6": "pin6", - "VSS": "pin7", - "pin8": "pin8", - "D": "pin9", - "pin10": "pin10", - "E": "pin11", - "pin12": "pin12", - "F": "pin13", - "VDD": "pin14" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" - }, - "SN74LVC1G04YZPR": { - "family": "SN74LVC1G04", - "componentExportName": "SN74LVC1G04YZPR", - "manufacturerPartNumber": "SN74LVC1G04YZPR", - "packageDrawing": "YZP0005", - "status": "source-ready", - "drawingId": "YZP0005", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "A": "pin2", - "B1": "pin2", - "GND": "pin3", - "C1": "pin3", - "OE": "pin4", - "A1": "pin4", - "VCC": "pin5", - "A2": "pin5", - "Y": "pin1", - "C2": "pin1" - }, - "ignoredPhysicalPins": ["B2"], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing YZP0005; donor SN74LVC1G125YZPR (JLCPCB C2675663)" - }, - "THVD8010DDFR": { - "family": "THVD8010", - "componentExportName": "THVD8010DDFR", - "manufacturerPartNumber": "THVD8010DDFR", - "packageDrawing": "DDF0008A", - "status": "source-ready", - "drawingId": "DDF0008A", - "footprintPropSource": "footprint=\"soic_p0.65mm_w3.4199mm_pw0.4mm_pl0.9mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VS": "pin1", - "ENABLE": "pin2", - "REF": "pin3", - "GND": "pin4", - "OUT": "pin5", - "NC": "pin6", - "IN_POS": "pin7", - "IN_NEG": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DDF0008A; donor INA186A2IDDFR (JLCPCB C2869854)" - }, - "TIOL221RGER": { - "family": "TIOL221", - "componentExportName": "TIOL221RGER", - "manufacturerPartNumber": "TIOL221RGER", - "packageDrawing": "RGE0024H", - "status": "source-ready", - "drawingId": "RGE0024H", - "footprintPropSource": "footprint=\"qfn24_thermalpad2.7mmx2.7mm_p0.4999mm_h4.6562mm_pw0.28mm_pl0.633mm\"", - "physicalPadToPortHint": { - "IN2": "pin1", - "IN1": "pin2", - "B_GATE": "pin3", - "DRV": "pin4", - "IN_SYS": "pin5", - "UVLO": "pin6", - "PLIM": "pin7", - "GND": "pin8", - "dVdT": "pin9", - "ILIM": "pin10", - "MODE": "pin11", - "SHDN": "pin12", - "IMON": "pin13", - "FLT": "pin14", - "PGTH": "pin15", - "PGOOD": "pin16", - "OUT2": "pin17", - "OUT1": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "EP": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RGE0024H; donor TPS26632RGET (JLCPCB C2862529)" - }, - "TL391LVDBVR": { - "family": "TL391LV", - "componentExportName": "TL391LVDBVR", - "manufacturerPartNumber": "TL391LVDBVR", - "packageDrawing": "DBV0005A", - "status": "source-ready", - "drawingId": "DBV0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "OUT": "pin1", - "V_NEG": "pin2", - "IN_POS": "pin3", - "IN_NEG": "pin4", - "V_POS": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" - }, - "TLA432AQDBZR": { - "family": "TLA432", - "componentExportName": "TLA432AQDBZR", - "manufacturerPartNumber": "TLA432AQDBZR", - "packageDrawing": "DBZ0003A", - "status": "source-ready", - "drawingId": "DBZ0003A", - "footprintPropSource": "footprint=\"sot23w_p0.9813mm_pw0.6494mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "GND": "pin1", - "RESET": "pin2", - "VDD": "pin3" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBZ0003A; donor TLV803SDBZR (JLCPCB C132016)" - }, - "TLC69624QRSNRQ1": { - "family": "TLC69624-Q1", - "componentExportName": "TLC69624QRSNRQ1", - "manufacturerPartNumber": "TLC69624QRSNRQ1", - "packageDrawing": "RSN0032D", - "status": "source-ready", - "drawingId": "RSN0032D", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18" - }, - "TLC69634QRSNRQ1": { - "family": "TLC69634-Q1", - "componentExportName": "TLC69634QRSNRQ1", - "manufacturerPartNumber": "TLC69634QRSNRQ1", - "packageDrawing": "RSN0032D", - "status": "source-ready", - "drawingId": "RSN0032D", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RSN0032D; official source https://www.ti.com/lit/gpn/TLC69624-Q1 pages 18" - }, - "TLC69699DRRR": { - "family": "TLC69699", - "componentExportName": "TLC69699DRRR", - "manufacturerPartNumber": "TLC69699DRRR", - "packageDrawing": "DRR0012G", - "status": "source-ready", - "drawingId": "DRR0012G", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "Exposed Pad": "pin13" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "13", - "name": "NC3", - "type": "NC", - "description": "Exposed pad with no connection; electrically isolate from every signal except Ground." - } - ], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DRR0012G; official source https://www.ti.com/lit/gpn/TLC69699 pages 22" - }, - "PTLIN821DRBRQ1": { - "family": "TLIN821-Q1", - "componentExportName": "PTLIN821DRBRQ1", - "manufacturerPartNumber": "PTLIN821DRBRQ1", - "packageDrawing": "DRB0008J", - "status": "source-ready", - "drawingId": "DRB0008J", - "footprintPropSource": "footprint=\"dfn8_thermalpad1.6mmx2.4mm_pillpads_p0.65mm_w3.8301mm_pw0.35mm_pl0.84mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "9": "pin9", - "TXD": "pin1", - "GND": "pin2", - "VCC": "pin3", - "RXD": "pin4", - "pin5": "pin5", - "CANL": "pin6", - "CANH": "pin7", - "STB": "pin8", - "Pad": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [ - { - "number": "9", - "name": "THERMAL_PAD", - "type": "GND", - "description": "Thermal pad electrically connected to GND; connect to PCB ground." - } - ], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DRB0008J; donor TCAN1044AVDRBRQ1 (JLCPCB C3234119)" - }, - "TLV1811QDBVRQ1": { - "family": "TLV1811-Q1", - "componentExportName": "TLV1811QDBVRQ1", - "manufacturerPartNumber": "TLV1811QDBVRQ1", - "packageDrawing": "DBV0005A", - "status": "source-ready", - "drawingId": "DBV0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "OUT": "pin1", - "V_NEG": "pin2", - "IN_POS": "pin3", - "IN_NEG": "pin4", - "V_POS": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" - }, - "TLV1824DR": { - "family": "TLV1824", - "componentExportName": "TLV1824DR", - "manufacturerPartNumber": "TLV1824DR", - "packageDrawing": "D0014A", - "status": "source-ready", - "drawingId": "D0014A", - "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "pin2": "pin2", - "B": "pin3", - "pin4": "pin4", - "C": "pin5", - "pin6": "pin6", - "VSS": "pin7", - "pin8": "pin8", - "D": "pin9", - "pin10": "pin10", - "E": "pin11", - "pin12": "pin12", - "F": "pin13", - "VDD": "pin14" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" - }, - "TLV3211DCKR": { - "family": "TLV3211", - "componentExportName": "TLV3211DCKR", - "manufacturerPartNumber": "TLV3211DCKR", - "packageDrawing": "DCK0005A", - "status": "source-ready", - "drawingId": "DCK0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "B": "pin2", - "GND": "pin3", - "Y": "pin4", - "VCC": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" - }, - "TLV3212DGKR": { - "family": "TLV3212", - "componentExportName": "TLV3212DGKR", - "manufacturerPartNumber": "TLV3212DGKR", - "packageDrawing": "DGK0008A", - "status": "source-ready", - "drawingId": "DGK0008A", - "footprintPropSource": "footprint=\"dfn8_pillpads_p0.65mm_w5.8498mm_pw0.38mm_pl1.45mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "OUTA": "pin1", - "-INA": "pin2", - "+INA": "pin3", - "V": "pin4", - "+INB": "pin5", - "-INB": "pin6", - "OUTB": "pin7", - "V_POS": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632)" - }, - "TLV369IDCKR": { - "family": "TLV369", - "componentExportName": "TLV369IDCKR", - "manufacturerPartNumber": "TLV369IDCKR", - "packageDrawing": "DCK0005A", - "status": "source-ready", - "drawingId": "DCK0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.65mm_w3.1001mm_pw0.4mm_pl0.9mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "B": "pin2", - "GND": "pin3", - "Y": "pin4", - "VCC": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DCK0005A; donor SN74LVC1G86DCKR (JLCPCB C52350)" - }, - "TLV61047DDCR": { - "family": "TLV61047", - "componentExportName": "TLV61047DDCR", - "manufacturerPartNumber": "TLV61047DDCR", - "packageDrawing": "DDC0005A", - "status": "source-ready", - "drawingId": "DDC0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "IN": "pin1", - "GND2": "pin2", - "EN": "pin3", - "GND1": "pin4", - "OUT": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DDC0005A; donor TPS78233DDCR (JLCPCB C14878)" - }, - "TLV9022L1RUGR": { - "family": "TLV9022L", - "componentExportName": "TLV9022L1RUGR", - "manufacturerPartNumber": "TLV9022L1RUGR", - "packageDrawing": "RUG0010B", - "status": "source-ready", - "drawingId": "RUG0010B", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RUG0010B; official source https://www.ti.com/lit/gpn/TLV9022L pages 35" - }, - "TMP107BIDR": { - "family": "TMP107", - "componentExportName": "TMP107BIDR", - "manufacturerPartNumber": "TMP107BIDR", - "packageDrawing": "D0008A", - "status": "source-ready", - "drawingId": "D0008A", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "1OUT": "pin1", - "1IN_N": "pin2", - "1IN_P": "pin3", - "GND": "pin4", - "2IN_P": "pin5", - "2IN_N": "pin6", - "2OUT": "pin7", - "VCC": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008A; donor LM393BIDR (JLCPCB C2865059)" - }, - "F280041CPZQR": { - "family": "TMS320F280041C-Q1", - "componentExportName": "F280041CPZQR", - "manufacturerPartNumber": "F280041CPZQR", - "packageDrawing": "PZ0100A1", - "status": "source-ready", - "drawingId": "PZ0100A1", - "footprintPropSource": "footprint=\"qfn100_pillpads_p0.4999mm_h17.2996mm_pw0.3mm_pl1.6mm\"", - "physicalPadToPortHint": { - "GPIO28": "pin1", - "XRSn": "pin2", - "VDDIO4": "pin3", - "VDD4": "pin4", - "VSS4": "pin5", - "pin6": "pin6", - "pin7": "pin7", - "pin8": "pin8", - "pin9": "pin9", - "A3": "pin10", - "VDDA2": "pin11", - "VSSA2": "pin12", - "PGA5_GND": "pin13", - "PGA1_GND": "pin14", - "PGA3_GND": "pin15", - "PGA5_IN": "pin16", - "C4": "pin17", - "PGA1_IN": "pin18", - "C0": "pin19", - "PGA3_IN": "pin20", - "C2": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "VREFHIA": "pin25", - "pin26": "pin26", - "VREFLOA": "pin27", - "pin28": "pin28", - "C1": "pin29", - "PGA2_IN": "pin30", - "pin31": "pin31", - "pin32": "pin32", - "VSSA1": "pin33", - "VDDA1": "pin34", - "A5": "pin35", - "pin36": "pin36", - "pin37": "pin37", - "A9": "pin38", - "pin39": "pin39", - "pin40": "pin40", - "B0": "pin41", - "PGA7_GND": "pin42", - "PGA7_IN": "pin43", - "C14": "pin44", - "VSS3": "pin45", - "VDD3": "pin46", - "VDDIO3": "pin47", - "FLT2": "pin48", - "FLT1": "pin49", - "GPIO13": "pin50", - "GPIO12": "pin51", - "GPIO11": "pin52", - "GPIO33": "pin53", - "GPIO16": "pin54", - "GPIO17": "pin55", - "GPIO24": "pin56", - "GPIO25": "pin57", - "GPIO26": "pin58", - "GPIO27": "pin59", - "TCK": "pin60", - "pin61": "pin61", - "TMS": "pin62", - "pin63": "pin63", - "GPIO32": "pin64", - "GPIO56": "pin65", - "GPIO57": "pin66", - "GPIO58": "pin67", - "GPIO18_X2": "pin68", - "X1": "pin69", - "VDDIO2": "pin70", - "VDD2": "pin71", - "VSS2": "pin72", - "VREGENZ": "pin73", - "GPIO8": "pin74", - "GPIO4": "pin75", - "GPIO3": "pin76", - "GPIO2": "pin77", - "GPIO1": "pin78", - "GPIO0": "pin79", - "VDDIO_SW": "pin80", - "GPIO23_VSW": "pin81", - "VSS_SW": "pin82", - "GPIO22_VFBSW": "pin83", - "GPIO7": "pin84", - "GPIO40": "pin85", - "VSS1": "pin86", - "VDD1": "pin87", - "VDDIO1": "pin88", - "GPIO5": "pin89", - "GPIO9": "pin90", - "GPIO39": "pin91", - "GPIO59": "pin92", - "GPIO10": "pin93", - "GPIO34": "pin94", - "GPIO15": "pin95", - "GPIO14": "pin96", - "GPIO6": "pin97", - "GPIO30": "pin98", - "GPIO31": "pin99", - "GPIO29": "pin100" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing PZ0100A1; donor F280049CPZQR (JLCPCB C1880111)" - }, - "TMS320F28027PTQR": { - "family": "TMS320F28027-Q1", - "componentExportName": "TMS320F28027PTQR", - "manufacturerPartNumber": "TMS320F28027PTQR", - "packageDrawing": "PT0048A", - "status": "source-ready", - "drawingId": "PT0048A", - "footprintPropSource": "footprint=\"qfn48_pillpads_p0.4999mm_h10.1001mm_pw0.28mm_pl1.8mm\"", - "physicalPadToPortHint": { - "GPIO29": "pin1", - "pin2": "pin2", - "XRSn": "pin3", - "A6C6GPIO226GPIO228": "pin4", - "pin5": "pin5", - "pin6": "pin6", - "pin7": "pin7", - "pin8": "pin8", - "pin9": "pin9", - "A1": "pin10", - "pin11": "pin11", - "VREFHI": "pin12", - "VREFLO": "pin13", - "pin14": "pin14", - "pin15": "pin15", - "pin16": "pin16", - "VSSA": "pin17", - "VDDA": "pin18", - "pin19": "pin19", - "pin20": "pin20", - "pin21": "pin21", - "VSS1": "pin22", - "pin23": "pin23", - "pin24": "pin24", - "GPIO33": "pin25", - "GPIO16": "pin26", - "GPIO24": "pin27", - "TCK": "pin28", - "pin29": "pin29", - "TMS": "pin30", - "pin31": "pin31", - "GPIO32": "pin32", - "GPIO18_X2": "pin33", - "GPIO19_X1": "pin34", - "VDDIO1": "pin35", - "VDD1": "pin36", - "VSS2": "pin37", - "GPIO4": "pin38", - "GPIO3": "pin39", - "GPIO2": "pin40", - "GPIO1": "pin41", - "GPIO0": "pin42", - "GPIO7": "pin43", - "VSS3": "pin44", - "VDD2": "pin45", - "VDDIO2": "pin46", - "GPIO5": "pin47", - "GPIO6": "pin48" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing PT0048A; donor F2800132PTR (JLCPCB C20345402)" - }, - "TPD1E0B04DPLT": { - "family": "TPD1E0B04", - "componentExportName": "TPD1E0B04DPLT", - "manufacturerPartNumber": "TPD1E0B04DPLT", - "packageDrawing": "DPL0002A", - "status": "source-ready", - "drawingId": "DPL0002A", - "footprintPropSource": "footprint=\"0201\"", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DPL0002A; official source https://www.ti.com/lit/gpn/TPD1E0B04" - }, - "TPS1HC03PQVAHRQ1": { - "family": "TPS1HC03-Q1", - "componentExportName": "TPS1HC03PQVAHRQ1", - "manufacturerPartNumber": "TPS1HC03PQVAHRQ1", - "packageDrawing": "VAH0011A", - "status": "source-ready", - "drawingId": "VAH0011A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing VAH0011A; official source https://www.ti.com/lit/gpn/TPS1HC03-Q1 pages 71" - }, - "TPS22970YZPR": { - "family": "TPS22970", - "componentExportName": "TPS22970YZPR", - "manufacturerPartNumber": "TPS22970YZPR", - "packageDrawing": "YZP0008", - "status": "source-ready", - "drawingId": "YZP0008", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "D2": "pin1", - "D1": "pin2", - "C1": "pin3", - "C2": "pin4", - "B2": "pin5", - "B1": "pin6", - "A1": "pin7", - "A2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing YZP0008; donor SN74LVC2G132YZPR (JLCPCB C2872358)" - }, - "TPS22991CNRAAR": { - "family": "TPS22991", - "componentExportName": "TPS22991CNRAAR", - "manufacturerPartNumber": "TPS22991CNRAAR", - "packageDrawing": "RAA0004A", - "status": "source-ready", - "drawingId": "RAA0004A", - "footprintPropSource": "footprint={\n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RAA0004A; official source https://www.ti.com/lit/gpn/TPS22991 pages 26" - }, - "TPS24750RUVR": { - "family": "TPS24750", - "componentExportName": "TPS24750RUVR", - "manufacturerPartNumber": "TPS24750RUVR", - "packageDrawing": "RUV0036A", - "status": "source-ready", - "drawingId": "RUV0036A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "Pad-1": "pin4", - "Pad-2": "pin5" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RUV0036A; official source https://www.ti.com/lit/gpn/TPS24750 pages 44,45,46" - }, - "TPS25972ARPWR": { - "family": "TPS2597", - "componentExportName": "TPS25972ARPWR", - "manufacturerPartNumber": "TPS25972ARPWR", - "packageDrawing": "RPW0010A", - "status": "source-ready", - "drawingId": "RPW0010A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "pin1": "pin1", - "pin2": "pin2", - "pin3": "pin3", - "pin4": "pin4", - "IN": "pin5", - "OUT": "pin6", - "DVDT": "pin7", - "GND": "pin8", - "ILM": "pin9", - "ITIMER": "pin10" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RPW0010A; donor TPS259472ARPWR (JLCPCB C3662789)" - }, - "TPS2HC08PQVAHRQ1": { - "family": "TPS2HC08-Q1", - "componentExportName": "TPS2HC08PQVAHRQ1", - "manufacturerPartNumber": "TPS2HC08PQVAHRQ1", - "packageDrawing": "VAH0011C", - "status": "source-ready", - "drawingId": "VAH0011C", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing VAH0011C; official source https://www.ti.com/lit/gpn/TPS2HC08-Q1 pages 74" - }, - "TPS2HC16PQVAHRQ1": { - "family": "TPS2HC16-Q1", - "componentExportName": "TPS2HC16PQVAHRQ1", - "manufacturerPartNumber": "TPS2HC16PQVAHRQ1", - "packageDrawing": "VAH0011B", - "status": "source-ready", - "drawingId": "VAH0011B", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing VAH0011B; official source https://www.ti.com/lit/gpn/TPS2HC16-Q1 pages 72" - }, - "TPS3424A11C13ADRLR": { - "family": "TPS3424", - "componentExportName": "TPS3424A11C13ADRLR", - "manufacturerPartNumber": "TPS3424A11C13ADRLR", - "packageDrawing": "DRL0008A", - "status": "source-ready", - "drawingId": "DRL0008A", - "footprintPropSource": "footprint=\"soic_p0.5001mm_w1.9602mm_pw0.28mm_pl0.68mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VOUT": "pin1", - "LX2": "pin2", - "LX1": "pin3", - "VIN": "pin4", - "EN": "pin5", - "MODE": "pin6", - "GND": "pin7", - "FB": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DRL0008A; donor TPS631000DRLR (JLCPCB C5219190)" - }, - "TPS3435JFMAFDSER": { - "family": "TPS3435", - "componentExportName": "TPS3435JFMAFDSER", - "manufacturerPartNumber": "TPS3435JFMAFDSER", - "packageDrawing": "DSE0006A", - "status": "source-ready", - "drawingId": "DSE0006A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "SENSE": "pin1", - "GND": "pin2", - "MR": "pin3", - "VDD": "pin4", - "CT": "pin5", - "RESET": "pin6" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DSE0006A; donor TPS389030DSER (JLCPCB C2066942)" - }, - "TPS389006007RTER": { - "family": "TPS389006", - "componentExportName": "TPS389006007RTER", - "manufacturerPartNumber": "TPS389006007RTER", - "packageDrawing": "RTE0016C", - "status": "source-ready", - "drawingId": "RTE0016C", - "footprintPropSource": "footprint=\"qfn16_thermalpad1.7mmx1.7mm_p0.4999mm_pw0.28mm_pl0.8mm\"", - "physicalPadToPortHint": { - "pin1": "pin1", - "pin2": "pin2", - "pin3": "pin3", - "pin4": "pin4", - "pin5": "pin5", - "pin6": "pin6", - "AVDD": "pin7", - "DECAP": "pin8", - "GND2": "pin9", - "DVDD": "pin10", - "ADDR": "pin11", - "NC": "pin12", - "SCL": "pin13", - "SDA": "pin14", - "pin15": "pin15", - "pin16": "pin16", - "GND1": "pin17" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RTE0016C; donor TLA2528IRTER (JLCPCB C2866175)" - }, - "TPS6521401VAFR": { - "family": "TPS65214", - "componentExportName": "TPS6521401VAFR", - "manufacturerPartNumber": "TPS6521401VAFR", - "packageDrawing": "VAF0024A", - "status": "source-ready", - "drawingId": "VAF0024A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing VAF0024A; official source https://www.ti.com/lit/gpn/TPS65214 pages 139" - }, - "TPS6522430RAHRQ1": { - "family": "TPS65224-Q1", - "componentExportName": "TPS6522430RAHRQ1", - "manufacturerPartNumber": "TPS6522430RAHRQ1", - "packageDrawing": "RAH0036A", - "status": "source-ready", - "drawingId": "RAH0036A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RAH0036A; official source https://www.ti.com/lit/gpn/TPS65224-Q1 pages 11" - }, - "O3853QDCARQ1": { - "family": "TPS653853-Q1", - "componentExportName": "O3853QDCARQ1", - "manufacturerPartNumber": "O3853QDCARQ1", - "packageDrawing": "DCA0048B", - "status": "source-ready", - "drawingId": "DCA0048B", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DCA0048B; official source https://www.ti.com/lit/gpn/TPS653853-Q1 pages 10" - }, - "TPS65930A2ZCHR": { - "family": "TPS65930", - "componentExportName": "TPS65930A2ZCHR", - "manufacturerPartNumber": "TPS65930A2ZCHR", - "packageDrawing": "ZCH0139A", - "status": "source-ready", - "drawingId": "ZCH0139A", - "physicalPadToPortHint": {}, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "coordinateGrid": { - "rowOrder": [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P" - ], - "columnOrder": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14], - "pitchMm": 0.65, - "padShape": "circle", - "padDiameterMm": 0.35 - }, - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing ZCH0139A; official source https://www.ti.com/packaging/tw/docs/searchproductbypackage.tsp?orderablePartNumber=&packageDesignator=ZCH&pinCount=139&results=results" - }, - "TPS7A5301BRPSR": { - "family": "TPS7A53B", - "componentExportName": "TPS7A5301BRPSR", - "manufacturerPartNumber": "TPS7A5301BRPSR", - "packageDrawing": "RPS0012A", - "status": "source-ready", - "drawingId": "RPS0012A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RPS0012A; official source https://www.ti.com/lit/gpn/TPS7A53B pages 41" - }, - "TPS7E7101DBVR": { - "family": "TPS7E71", - "componentExportName": "TPS7E7101DBVR", - "manufacturerPartNumber": "TPS7E7101DBVR", - "packageDrawing": "DBV0005A", - "status": "source-ready", - "drawingId": "DBV0005A", - "footprintPropSource": "footprint=\"dfn6_missing(5)_p0.95mm_w3.7002mm_pl1.1mm_pin1location(rightside,bottom)\"", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "OUT": "pin1", - "V_NEG": "pin2", - "IN_POS": "pin3", - "IN_NEG": "pin4", - "V_POS": "pin5" - }, - "ignoredPhysicalPins": ["Thermal pad"], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DBV0005A; donor TLV9001IDBVR (JLCPCB C398363)" - }, - "TPS92761QPHPRQ1": { - "family": "TPS92761-Q1", - "componentExportName": "TPS92761QPHPRQ1", - "manufacturerPartNumber": "TPS92761QPHPRQ1", - "packageDrawing": "PHP0048L", - "status": "source-ready", - "drawingId": "PHP0048L", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32", - "33": "pin33", - "34": "pin34", - "35": "pin35", - "36": "pin36", - "37": "pin37", - "38": "pin38", - "39": "pin39", - "40": "pin40", - "41": "pin41", - "42": "pin42", - "43": "pin43", - "44": "pin44", - "45": "pin45", - "46": "pin46", - "47": "pin47", - "48": "pin48", - "49": "pin49" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing PHP0048L; official source https://www.ti.com/lit/gpn/TPS92761-Q1 pages 9" - }, - "TPSM828301ARDSR": { - "family": "TPSM828301", - "componentExportName": "TPSM828301ARDSR", - "manufacturerPartNumber": "TPSM828301ARDSR", - "packageDrawing": "RDS0009A", - "status": "source-ready", - "drawingId": "RDS0009A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "VIN": "pin1", - "GND": "pin2", - "MODE": "pin3", - "FB": "pin4", - "VOS": "pin5", - "VOUT": "pin6", - "PG": "pin7", - "SW": "pin8", - "EN": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RDS0009A; donor TPSM828303ARDSR (JLCPCB C22445538)" - }, - "TPSM82901SISR": { - "family": "TPSM82901", - "componentExportName": "TPSM82901SISR", - "manufacturerPartNumber": "TPSM82901SISR", - "packageDrawing": "SIS0011A", - "status": "source-ready", - "drawingId": "SIS0011A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "VIN1": "pin1", - "VIN2": "pin2", - "EN": "pin3", - "pin4": "pin4", - "pin5": "pin5", - "PG": "pin6", - "pin7": "pin7", - "pin8": "pin8", - "VOUT1": "pin9", - "VOUT2": "pin10", - "GND": "pin11" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing SIS0011A; donor TPSM82903SISR (JLCPCB C6290583)" - }, - "TPSM863252RDXR": { - "family": "TPSM863252", - "componentExportName": "TPSM863252RDXR", - "manufacturerPartNumber": "TPSM863252RDXR", - "packageDrawing": "RDX0007A", - "status": "source-ready", - "drawingId": "RDX0007A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RDX0007A; official source https://www.ti.com/lit/gpn/TPSM863252 pages 29" - }, - "TPSM8A29RDGR": { - "family": "TPSM8A29", - "componentExportName": "TPSM8A29RDGR", - "manufacturerPartNumber": "TPSM8A29RDGR", - "packageDrawing": "RDG0025A", - "status": "source-ready", - "drawingId": "RDG0025A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RDG0025A; official source https://www.ti.com/lit/gpn/TPSM8A29 pages 43" - }, - "TUSB1004RNQR": { - "family": "TUSB1004", - "componentExportName": "TUSB1004RNQR", - "manufacturerPartNumber": "TUSB1004RNQR", - "packageDrawing": "RNQ0040A", - "status": "source-ready", - "drawingId": "RNQ0040A", - "footprintPropSource": "footprint={\n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n }", - "physicalPadToPortHint": { - "VCC1": "pin1", - "DPEQ1": "pin2", - "SSEQ1": "pin3", - "SSRXn": "pin4", - "SSRXp": "pin5", - "VCC2": "pin6", - "SSTXn": "pin7", - "SSTXp": "pin8", - "DP0p": "pin9", - "DP0n": "pin10", - "pin11": "pin11", - "DP1p": "pin12", - "DP1n": "pin13", - "pin14": "pin14", - "DP2p": "pin15", - "DP2n": "pin16", - "I2C_EN": "pin17", - "DP3p": "pin18", - "DP3n": "pin19", - "VCC3": "pin20", - "pin21": "pin21", - "pin22": "pin22", - "pin23": "pin23", - "AUXp": "pin24", - "AUXn": "pin25", - "SBU2": "pin26", - "SBU1": "pin27", - "VCC4": "pin28", - "pin29": "pin29", - "RX1p": "pin30", - "RX1n": "pin31", - "pin32": "pin32", - "TX1p": "pin33", - "TX1n": "pin34", - "EQ1": "pin35", - "TX2n": "pin36", - "TX2p": "pin37", - "EQ0": "pin38", - "RX2n": "pin39", - "RX2p": "pin40", - "EP": "pin41" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing RNQ0040A; donor TUSB1046-DCIRNQR (JLCPCB C2151061)" - }, - "TXE8124DGSR": { - "family": "TXE8124", - "componentExportName": "TXE8124DGSR", - "manufacturerPartNumber": "TXE8124DGSR", - "packageDrawing": "DGS0032A", - "status": "source-ready", - "drawingId": "DGS0032A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "25": "pin25", - "26": "pin26", - "27": "pin27", - "28": "pin28", - "29": "pin29", - "30": "pin30", - "31": "pin31", - "32": "pin32" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing DGS0032A; official source https://www.ti.com/lit/gpn/TXE8124 pages 63" - }, - "TXV0108QWRGYRQ1": { - "family": "TXV0108-Q1", - "componentExportName": "TXV0108QWRGYRQ1", - "manufacturerPartNumber": "TXV0108QWRGYRQ1", - "packageDrawing": "RGY0024E", - "status": "source-ready", - "drawingId": "RGY0024E", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12", - "13": "pin13", - "14": "pin14", - "15": "pin15", - "16": "pin16", - "17": "pin17", - "18": "pin18", - "19": "pin19", - "20": "pin20", - "21": "pin21", - "22": "pin22", - "23": "pin23", - "24": "pin24", - "Thermal Pad": "pin25" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing RGY0024E; official source https://www.ti.com/lit/gpn/TXV0108-Q1 pages 30" - }, - "UCC27332QDGNRQ1": { - "family": "UCC27332-Q1", - "componentExportName": "UCC27332QDGNRQ1", - "manufacturerPartNumber": "UCC27332QDGNRQ1", - "packageDrawing": "DGN0008H", - "status": "source-ready", - "drawingId": "DGN0008H", - "footprintPropSource": "footprint=\"vssop8_thermalpad1.5mmx1.8mm_pw0.364mm_pl1.43mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "ENA": "pin1", - "INA": "pin2", - "GND": "pin3", - "INB": "pin4", - "OUTB": "pin5", - "VDD": "pin6", - "OUTA": "pin7", - "ENB": "pin8", - "EP": "pin9" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGN0008H; donor UCC27624DGNR (JLCPCB C6581862)" - }, - "UCC27734DR": { - "family": "UCC27734", - "componentExportName": "UCC27734DR", - "manufacturerPartNumber": "UCC27734DR", - "packageDrawing": "D0008B", - "status": "source-ready", - "drawingId": "D0008B", - "footprintPropSource": "footprint=\"soic8_pillpads_w6.9999mm_pw0.588mm_pl1.8mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "VCC1": "pin1", - "IN_POS": "pin2", - "IN_NEG": "pin3", - "GND1": "pin4", - "VCC2": "pin5", - "OUTH": "pin6", - "OUTL": "pin7", - "VEE2": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0008B; donor UCC5350SBDR (JLCPCB C2878307)" - }, - "UCC27735DR": { - "family": "UCC27735", - "componentExportName": "UCC27735DR", - "manufacturerPartNumber": "UCC27735DR", - "packageDrawing": "D0014A", - "status": "source-ready", - "drawingId": "D0014A", - "footprintPropSource": "footprint=\"soic14_pillpads_w7.276mm_pw0.574mm_pl2.038mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "A": "pin1", - "pin2": "pin2", - "B": "pin3", - "pin4": "pin4", - "C": "pin5", - "pin6": "pin6", - "VSS": "pin7", - "pin8": "pin8", - "D": "pin9", - "pin10": "pin10", - "E": "pin11", - "pin12": "pin12", - "F": "pin13", - "VDD": "pin14" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0014A; donor CD4069UBM96 (JLCPCB C93672)" - }, - "UCC28070QPWRQ1": { - "family": "UCC28070-Q1", - "componentExportName": "UCC28070QPWRQ1", - "manufacturerPartNumber": "UCC28070QPWRQ1", - "packageDrawing": "PW0020A", - "status": "source-ready", - "drawingId": "PW0020A", - "footprintPropSource": "footprint=\"dfn20_pillpads_p0.65mm_w7.4839mm_pw0.364mm_pl1.742mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "A1": "pin1", - "VCCA": "pin2", - "A2": "pin3", - "A3": "pin4", - "A4": "pin5", - "A5": "pin6", - "A6": "pin7", - "A7": "pin8", - "A8": "pin9", - "OE": "pin10", - "GND": "pin11", - "B8": "pin12", - "B7": "pin13", - "B6": "pin14", - "B5": "pin15", - "B4": "pin16", - "B3": "pin17", - "B2": "pin18", - "VCCB": "pin19", - "B1": "pin20" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing PW0020A; donor TXS0108EPWR (JLCPCB C17206)" - }, - "UCC28C50DGKR": { - "family": "UCC28C50", - "componentExportName": "UCC28C50DGKR", - "manufacturerPartNumber": "UCC28C50DGKR", - "packageDrawing": "DGK0008A", - "status": "source-ready", - "drawingId": "DGK0008A", - "footprintPropSource": "footprint=\"dfn8_pillpads_p0.65mm_w5.8498mm_pw0.38mm_pl1.45mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "OUTA": "pin1", - "-INA": "pin2", - "+INA": "pin3", - "V": "pin4", - "+INB": "pin5", - "-INB": "pin6", - "OUTB": "pin7", - "V_POS": "pin8" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing DGK0008A; donor OPA2188AIDGKR (JLCPCB C2865632)" - }, - "UCC29950DR": { - "family": "UCC29950", - "componentExportName": "UCC29950DR", - "manufacturerPartNumber": "UCC29950DR", - "packageDrawing": "D0016A", - "status": "source-ready", - "drawingId": "D0016A", - "footprintPropSource": "footprint=\"soic16_pillpads_w7.4421mm_pw0.602mm_pl1.971mm_pin1location(leftside,bottom)\"", - "physicalPadToPortHint": { - "1A": "pin1", - "1Y": "pin2", - "1Z": "pin3", - "G1": "pin4", - "2Z": "pin5", - "2Y": "pin6", - "2A": "pin7", - "GND": "pin8", - "3A": "pin9", - "3Y": "pin10", - "3Z": "pin11", - "G2": "pin12", - "4Z": "pin13", - "4Y": "pin14", - "4A": "pin15", - "VCC": "pin16" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "exact-jlc-drawing", - "provenanceComment": "TI drawing D0016A; donor AM26C31IDR (JLCPCB C34923)" - }, - "UCG28828-1REZR": { - "family": "UCG28828", - "componentExportName": "UCG28828_1REZR", - "manufacturerPartNumber": "UCG28828-1REZR", - "packageDrawing": "REZ0012A", - "status": "source-ready", - "drawingId": "REZ0012A", - "footprintPropSource": "footprint={\n \n \n \n \n \n \n \n \n \n \n \n \n }", - "physicalPadToPortHint": { - "1": "pin1", - "2": "pin2", - "3": "pin3", - "4": "pin4", - "5": "pin5", - "6": "pin6", - "7": "pin7", - "8": "pin8", - "9": "pin9", - "10": "pin10", - "11": "pin11", - "12": "pin12" - }, - "ignoredPhysicalPins": [], - "supplementalPins": [], - "footprintSource": "official-ti-drawing", - "provenanceComment": "TI drawing REZ0012A; official source https://www.ti.com/lit/gpn/UCG28828 pages 41,42" - } - } -} diff --git a/lib/chips/ti-sysblocks-materialization-report.json b/lib/chips/ti-sysblocks-materialization-report.json deleted file mode 100644 index 42e34190..00000000 --- a/lib/chips/ti-sysblocks-materialization-report.json +++ /dev/null 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"UCG28828_1REZR", - "packageDrawing": "REZ0012A", - "footprintSource": "official-ti-drawing" - } - ], - "blockers": [] -} diff --git a/lib/chips/ti-sysblocks-pinouts.json b/lib/chips/ti-sysblocks-pinouts.json index adf33634..0972e82b 100644 --- a/lib/chips/ti-sysblocks-pinouts.json +++ b/lib/chips/ti-sysblocks-pinouts.json @@ -322,14 +322,14 @@ "packageCode": "ZCZ", "expectedPinCount": 324, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/AM3352BZCZ100.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM3352BZCZ100.tsx", "pinLabelCount": 324, "coordinateLabelCount": 324, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 324, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": 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"pinLabelSourcePath": "lib/chips/AM3357BZCZA80.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM3357BZCZA80.tsx", "pinLabelCount": 324, "coordinateLabelCount": 324, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 324, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"AM3357\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM3357BZCZA80\",\"packageDescription\":\"PBGA-324\",\"packageCode\":\"ZCZ\",\"expectedPinCount\":324,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM3357BZCZA80.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"AM3357\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM3357BZCZA80\",\"packageDescription\":\"PBGA-324\",\"packageCode\":\"ZCZ\",\"expectedPinCount\":324,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM3357BZCZA80.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:03.264Z", "attempts": 1, @@ -4270,14 +4270,14 @@ "packageCode": "ZDN", "expectedPinCount": 491, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/AM4376BZDND80.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM4376BZDND80.tsx", "pinLabelCount": 491, "coordinateLabelCount": 491, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 491, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": 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"pinLabelSourcePath": "lib/chips/AM4378BZDND100.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM4378BZDND100.tsx", "pinLabelCount": 491, "coordinateLabelCount": 491, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 491, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"AM4378\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM4378BZDND100\",\"packageDescription\":\"BGA-491\",\"packageCode\":\"ZDN\",\"expectedPinCount\":491,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM4378BZDND100.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"AM4378\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM4378BZDND100\",\"packageDescription\":\"BGA-491\",\"packageCode\":\"ZDN\",\"expectedPinCount\":491,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM4378BZDND100.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:03.946Z", "attempts": 1, @@ -10232,14 +10232,14 @@ "packageCode": "ZDN", "expectedPinCount": 491, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/AM4379BZDNA100.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM4379BZDNA100.tsx", "pinLabelCount": 491, "coordinateLabelCount": 491, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 491, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": 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"pinLabelSourcePath": "lib/chips/AM62A74AUMHAAMBR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM62A74AUMHAAMBR.tsx", "pinLabelCount": 484, "coordinateLabelCount": 484, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 484, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"AM62A7\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM62A74AUMHAAMBR\",\"packageDescription\":\"FCBGA-484\",\"packageCode\":\"AMB\",\"expectedPinCount\":484,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM62A74AUMHAAMBR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": 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"jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/AM6442BSEFHAALV.circuit.tsx", + "pinLabelSourcePath": "lib/chips/AM6442BSEFHAALV.tsx", "pinLabelCount": 441, "coordinateLabelCount": 441, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 441, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"AM6442\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM6442BSEFHAALV\",\"packageDescription\":\"FCBGA-441(17.2x17.2)\",\"packageCode\":\"ALV\",\"expectedPinCount\":441,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM6442BSEFHAALV.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"AM6442\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"AM6442BSEFHAALV\",\"packageDescription\":\"FCBGA-441(17.2x17.2)\",\"packageCode\":\"ALV\",\"expectedPinCount\":441,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/AM6442BSEFHAALV.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:05.161Z", "attempts": 1, @@ -35713,14 +35713,14 @@ "packageCode": "YBG", "expectedPinCount": 8, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/BQ25188YBGR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/BQ25188YBGR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 8, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": 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"pinLabelSourcePath": "lib/chips/BQ25630YBGR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/BQ25630YBGR.tsx", "pinLabelCount": 30, "coordinateLabelCount": 30, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 30, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"BQ25630\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25630YBGR\",\"packageDescription\":\"DSBGA-30(2.3x2.4)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25630YBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"BQ25630\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25630YBGR\",\"packageDescription\":\"DSBGA-30(2.3x2.4)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25630YBGR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:06.086Z", "attempts": 1, @@ -35997,14 +35997,14 @@ "packageCode": "YBG", "expectedPinCount": 30, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/BQ25638YBGR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/BQ25638YBGR.tsx", "pinLabelCount": 30, "coordinateLabelCount": 30, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 30, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"BQ25638\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25638YBGR\",\"packageDescription\":\"DSBGA-30(2x2.5)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25638YBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"BQ25638\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ25638YBGR\",\"packageDescription\":\"DSBGA-30(2x2.5)\",\"packageCode\":\"YBG\",\"expectedPinCount\":30,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ25638YBGR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:06.159Z", "attempts": 1, @@ -36205,14 +36205,14 @@ "packageCode": "YZF", "expectedPinCount": 9, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/BQ27426YZFR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/BQ27426YZFR.tsx", "pinLabelCount": 9, "coordinateLabelCount": 9, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 9, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"BQ27426\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ27426YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ27426YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"BQ27426\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ27426YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ27426YZFR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:06.376Z", "attempts": 1, @@ -36287,14 +36287,14 @@ "packageCode": "YFP", "expectedPinCount": 28, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/BQ51003YFPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/BQ51003YFPR.tsx", "pinLabelCount": 28, "coordinateLabelCount": 28, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 28, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"BQ51003\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ51003YFPR\",\"packageDescription\":\"DSBGA-28\",\"packageCode\":\"YFP\",\"expectedPinCount\":28,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ51003YFPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"BQ51003\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"BQ51003YFPR\",\"packageDescription\":\"DSBGA-28\",\"packageCode\":\"YFP\",\"expectedPinCount\":28,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/BQ51003YFPR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:07.212Z", "attempts": 1, @@ -40824,14 +40824,14 @@ "packageCode": "YBH", "expectedPinCount": 16, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/DAC53204YBHR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/DAC53204YBHR.tsx", "pinLabelCount": 16, "coordinateLabelCount": 16, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 16, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"DAC53204W\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DAC53204YBHR\",\"packageDescription\":\"DSBGA-16(1.6x1.6)\",\"packageCode\":\"YBH\",\"expectedPinCount\":16,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DAC53204YBHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"DAC53204W\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DAC53204YBHR\",\"packageDescription\":\"DSBGA-16(1.6x1.6)\",\"packageCode\":\"YBH\",\"expectedPinCount\":16,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DAC53204YBHR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:09.333Z", "attempts": 1, @@ -41559,14 +41559,14 @@ "packageCode": "CUS", "expectedPinCount": 423, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/DM3730CUSD100.circuit.tsx", + "pinLabelSourcePath": "lib/chips/DM3730CUSD100.tsx", "pinLabelCount": 423, "coordinateLabelCount": 423, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 423, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"DM3730\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DM3730CUSD100\",\"packageDescription\":\"SPBGA-423\",\"packageCode\":\"CUS\",\"expectedPinCount\":423,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DM3730CUSD100.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"DM3730\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DM3730CUSD100\",\"packageDescription\":\"SPBGA-423\",\"packageCode\":\"CUS\",\"expectedPinCount\":423,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DM3730CUSD100.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:10.247Z", "attempts": 1, @@ -44938,14 +44938,14 @@ "packageCode": "YZF", "expectedPinCount": 9, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/DRV2605YZFR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/DRV2605YZFR.tsx", "pinLabelCount": 9, "coordinateLabelCount": 9, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 9, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"DRV2605\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DRV2605YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DRV2605YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"DRV2605\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"DRV2605YZFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YZF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/DRV2605YZFR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:09.563Z", "attempts": 1, @@ -45757,14 +45757,14 @@ "packageCode": "DPY", "expectedPinCount": 2, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/ESD401DPYR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/ESD401DPYR.tsx", "pinLabelCount": 2, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 2, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"ESD401\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"ESD401DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/ESD401DPYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"ESD401\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"ESD401DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/ESD401DPYR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:09.812Z", "attempts": 1, @@ -45903,14 +45903,14 @@ "packageCode": "DGS", "expectedPinCount": 10, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/INA2181A2IDGSR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/INA2181A2IDGSR.tsx", "pinLabelCount": 10, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 10, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"INA2181\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA2181A2IDGSR\",\"packageDescription\":\"VSSOP-10\",\"packageCode\":\"DGS\",\"expectedPinCount\":10,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/INA2181A2IDGSR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"INA2181\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA2181A2IDGSR\",\"packageDescription\":\"VSSOP-10\",\"packageCode\":\"DGS\",\"expectedPinCount\":10,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/INA2181A2IDGSR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:10.249Z", "attempts": 1, @@ -45991,14 +45991,14 @@ "packageCode": "YBJ", "expectedPinCount": 8, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/INA236AIYBJR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/INA236AIYBJR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 8, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"INA236\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA236AIYBJR\",\"packageDescription\":\"DSBGA-8(0.7x1.5)\",\"packageCode\":\"YBJ\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/INA236AIYBJR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"INA236\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"INA236AIYBJR\",\"packageDescription\":\"DSBGA-8(0.7x1.5)\",\"packageCode\":\"YBJ\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/INA236AIYBJR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:10.403Z", "attempts": 1, @@ -46779,14 +46779,14 @@ "packageCode": "AMF", "expectedPinCount": 102, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/IWRL6432BDBAAMFR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/IWRL6432BDBAAMFR.tsx", "pinLabelCount": 102, "coordinateLabelCount": 102, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 102, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"IWRL6432\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"IWRL6432BDBAAMFR\",\"packageDescription\":\"FCCSP-102(6.5x6.5)\",\"packageCode\":\"AMF\",\"expectedPinCount\":102,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/IWRL6432BDBAAMFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"IWRL6432\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"IWRL6432BDBAAMFR\",\"packageDescription\":\"FCCSP-102(6.5x6.5)\",\"packageCode\":\"AMF\",\"expectedPinCount\":102,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/IWRL6432BDBAAMFR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.013Z", "attempts": 1, @@ -48431,14 +48431,14 @@ "packageCode": "D", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM2901AVQDRG4Q1.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM2901AVQDRG4Q1.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM2901AV-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2901AVQDRG4Q1\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2901AVQDRG4Q1.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM2901AV-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2901AVQDRG4Q1\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2901AVQDRG4Q1.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.155Z", "attempts": 1, @@ -48647,14 +48647,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM2903BIDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM2903BIDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM2903B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2903BIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2903BIDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM2903B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2903BIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2903BIDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.273Z", "attempts": 1, @@ -48723,14 +48723,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM2904BIDGKR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM2904BIDGKR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM2904B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2904BIDGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2904BIDGKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM2904B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM2904BIDGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM2904BIDGKR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.335Z", "attempts": 1, @@ -48799,14 +48799,14 @@ "packageCode": "D", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM339BIDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM339BIDR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM339B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM339BIDR\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM339BIDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM339B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM339BIDR\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM339BIDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.306Z", "attempts": 1, @@ -48911,14 +48911,14 @@ "packageCode": "PW", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM339LVPWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM339LVPWR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM339LV\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM339LVPWR\",\"packageDescription\":\"TSSOP-14\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM339LVPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM339LV\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM339LVPWR\",\"packageDescription\":\"TSSOP-14\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM339LVPWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.389Z", "attempts": 1, @@ -49023,14 +49023,14 @@ "packageCode": "PW", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM358BIPWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM358BIPWR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM358B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358BIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358BIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM358B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358BIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358BIPWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.453Z", "attempts": 1, @@ -49099,14 +49099,14 @@ "packageCode": "PW", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM358LVIPWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM358LVIPWR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM358LV\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358LVIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358LVIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM358LV\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM358LVIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM358LVIPWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.464Z", "attempts": 1, @@ -49267,14 +49267,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LM393BIDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LM393BIDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LM393B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM393BIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM393BIDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LM393B\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LM393BIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LM393BIDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.514Z", "attempts": 1, @@ -49967,14 +49967,14 @@ "packageCode": "YFQ", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/LMT70YFQR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LMT70YFQR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"LMT70\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMT70YFQR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YFQ\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LMT70YFQR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"LMT70\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMT70YFQR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YFQ\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LMT70YFQR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.760Z", "attempts": 1, @@ -50019,14 +50019,14 @@ "packageCode": "PW", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/LMV324AIPWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LMV324AIPWR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"LMV324A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMV324AIPWR\",\"packageDescription\":\"TSSOP-14\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LMV324AIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"LMV324A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LMV324AIPWR\",\"packageDescription\":\"TSSOP-14\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/LMV324AIPWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.906Z", "attempts": 1, @@ -50131,14 +50131,14 @@ "packageCode": "YBH", "expectedPinCount": 12, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/LP5813AYBHR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/LP5813AYBHR.tsx", "pinLabelCount": 12, "coordinateLabelCount": 12, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 12, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"LP5813\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LP5813AYBHR\",\"packageDescription\":\"DSBGA-12\",\"packageCode\":\"YBH\",\"expectedPinCount\":12,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LP5813AYBHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"LP5813\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"LP5813AYBHR\",\"packageDescription\":\"DSBGA-12\",\"packageCode\":\"YBH\",\"expectedPinCount\":12,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/LP5813AYBHR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.819Z", "attempts": 1, @@ -50731,14 +50731,14 @@ "packageCode": "ZXH", "expectedPinCount": 80, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/MSP430F5528IZXHR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/MSP430F5528IZXHR.tsx", "pinLabelCount": 80, "coordinateLabelCount": 80, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 80, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"MSP430F5528\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430F5528IZXHR\",\"packageDescription\":\"NFBGA-80\",\"packageCode\":\"ZXH\",\"expectedPinCount\":80,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430F5528IZXHR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"MSP430F5528\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430F5528IZXHR\",\"packageDescription\":\"NFBGA-80\",\"packageCode\":\"ZXH\",\"expectedPinCount\":80,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430F5528IZXHR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:11.946Z", "attempts": 1, @@ -51482,14 +51482,14 @@ "packageCode": "YQW", "expectedPinCount": 24, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/MSP430FR2632IYQWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/MSP430FR2632IYQWR.tsx", "pinLabelCount": 24, "coordinateLabelCount": 24, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 24, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"MSP430FR2632\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430FR2632IYQWR\",\"packageDescription\":\"DSBGA-24\",\"packageCode\":\"YQW\",\"expectedPinCount\":24,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430FR2632IYQWR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"MSP430FR2632\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"MSP430FR2632IYQWR\",\"packageDescription\":\"DSBGA-24\",\"packageCode\":\"YQW\",\"expectedPinCount\":24,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/MSP430FR2632IYQWR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.190Z", "attempts": 1, @@ -53544,14 +53544,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/OPA2310IDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPA2310IDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"OPA2310\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2310IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2310IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"OPA2310\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2310IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2310IDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.446Z", "attempts": 1, @@ -53620,14 +53620,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/OPA2607QDGKRQ1.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPA2607QDGKRQ1.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"OPA2607-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2607QDGKRQ1\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2607QDGKRQ1.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"OPA2607-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2607QDGKRQ1\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2607QDGKRQ1.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.740Z", "attempts": 1, @@ -53696,14 +53696,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/OPA2836QDGKRQ1.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPA2836QDGKRQ1.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"OPA2836-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2836QDGKRQ1\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2836QDGKRQ1.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"OPA2836-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA2836QDGKRQ1\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA2836QDGKRQ1.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.621Z", "attempts": 1, @@ -53822,14 +53822,14 @@ "packageCode": "PW", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/OPA4206APWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPA4206APWR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"OPA4206\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA4206APWR\",\"packageDescription\":\"-\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA4206APWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"OPA4206\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA4206APWR\",\"packageDescription\":\"-\",\"packageCode\":\"PW\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA4206APWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.818Z", "attempts": 1, @@ -53934,14 +53934,14 @@ "packageCode": "DYY", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/OPA4991QDYYRQ1.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPA4991QDYYRQ1.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"OPA4991-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA4991QDYYRQ1\",\"packageDescription\":\"TSOT-23-14\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA4991QDYYRQ1.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"OPA4991-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPA4991QDYYRQ1\",\"packageDescription\":\"TSOT-23-14\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/OPA4991QDYYRQ1.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:12.814Z", "attempts": 1, @@ -54046,14 +54046,14 @@ "packageCode": "YMN", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/OPT4001YMNR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/OPT4001YMNR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"OPT4001\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPT4001YMNR\",\"packageDescription\":\"PicoStar-4(0.8x1.1)\",\"packageCode\":\"YMN\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/OPT4001YMNR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"OPT4001\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"OPT4001YMNR\",\"packageDescription\":\"PicoStar-4(0.8x1.1)\",\"packageCode\":\"YMN\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/OPT4001YMNR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.114Z", "attempts": 1, @@ -54746,14 +54746,14 @@ "packageCode": "YZP", "expectedPinCount": 5, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/SN74LVC1G125YZPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/SN74LVC1G125YZPR.tsx", "pinLabelCount": 5, "coordinateLabelCount": 5, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 5, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"SN74LVC1G125\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC1G125YZPR\",\"packageDescription\":\"DSBGA-5(0.9x1.4)\",\"packageCode\":\"YZP\",\"expectedPinCount\":5,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC1G125YZPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"SN74LVC1G125\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC1G125YZPR\",\"packageDescription\":\"DSBGA-5(0.9x1.4)\",\"packageCode\":\"YZP\",\"expectedPinCount\":5,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC1G125YZPR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.562Z", "attempts": 1, @@ -54806,14 +54806,14 @@ "packageCode": "YZP", "expectedPinCount": 6, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/SN74LVC1G3157YZPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/SN74LVC1G3157YZPR.tsx", "pinLabelCount": 6, "coordinateLabelCount": 6, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 6, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"SN74LVC1G3157\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC1G3157YZPR\",\"packageDescription\":\"WCSP-6(1.4x0.9)\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC1G3157YZPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"SN74LVC1G3157\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC1G3157YZPR\",\"packageDescription\":\"WCSP-6(1.4x0.9)\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC1G3157YZPR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.533Z", "attempts": 1, @@ -54870,14 +54870,14 @@ "packageCode": "YZP", "expectedPinCount": 6, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/SN74LVC2G07YZPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/SN74LVC2G07YZPR.tsx", "pinLabelCount": 6, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 6, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"SN74LVC2G07\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC2G07YZPR\",\"packageDescription\":\"DSBGA-6(0.9x1.4)\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC2G07YZPR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"SN74LVC2G07\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC2G07YZPR\",\"packageDescription\":\"DSBGA-6(0.9x1.4)\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC2G07YZPR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T20:32:04.772Z", "attempts": 1, @@ -54934,14 +54934,14 @@ "packageCode": "YZP", "expectedPinCount": 6, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/SN74LVC2G34YZPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/SN74LVC2G34YZPR.tsx", "pinLabelCount": 6, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 6, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"SN74LVC2G34\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC2G34YZPR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC2G34YZPR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"SN74LVC2G34\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"SN74LVC2G34YZPR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/SN74LVC2G34YZPR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T20:32:04.803Z", "attempts": 1, @@ -55236,14 +55236,14 @@ "packageCode": "PW", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TL072HIPWR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TL072HIPWR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TL072H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL072HIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL072HIPWR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TL072H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL072HIPWR\",\"packageDescription\":\"TSSOP-8\",\"packageCode\":\"PW\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL072HIPWR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.717Z", "attempts": 1, @@ -55312,14 +55312,14 @@ "packageCode": "DYY", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TL074HIDYYR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TL074HIDYYR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TL074H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL074HIDYYR\",\"packageDescription\":\"SOT-23-14-THIN\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL074HIDYYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TL074H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL074HIDYYR\",\"packageDescription\":\"SOT-23-14-THIN\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL074HIDYYR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.785Z", "attempts": 1, @@ -55424,14 +55424,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TL082HIDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TL082HIDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TL082H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL082HIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL082HIDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TL082H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL082HIDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL082HIDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.944Z", "attempts": 1, @@ -55500,14 +55500,14 @@ "packageCode": "DYY", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TL084HIDYYR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TL084HIDYYR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TL084H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL084HIDYYR\",\"packageDescription\":\"TSOT-23-14\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL084HIDYYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TL084H\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TL084HIDYYR\",\"packageDescription\":\"TSOT-23-14\",\"packageCode\":\"DYY\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TL084HIDYYR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:13.866Z", "attempts": 1, @@ -56600,14 +56600,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV3512DGKR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV3512DGKR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV3512\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV3512DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV3512DGKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV3512\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV3512DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV3512DGKR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.236Z", "attempts": 1, @@ -56776,14 +56776,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV7042DGKR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV7042DGKR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV7042\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV7042DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV7042DGKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV7042\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV7042DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV7042DGKR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.510Z", "attempts": 1, @@ -56852,14 +56852,14 @@ "packageCode": "DGK", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV8802DGKR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV8802DGKR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV8802\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV8802DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV8802DGKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV8802\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV8802DGKR\",\"packageDescription\":\"VSSOP-8\",\"packageCode\":\"DGK\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV8802DGKR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.381Z", "attempts": 1, @@ -56928,14 +56928,14 @@ "packageCode": "DSG", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV9002IDSGR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV9002IDSGR.tsx", "pinLabelCount": 9, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 9, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV9002\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9002IDSGR\",\"packageDescription\":\"WSON-8(2x2)\",\"packageCode\":\"DSG\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9002IDSGR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV9002\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9002IDSGR\",\"packageDescription\":\"WSON-8(2x2)\",\"packageCode\":\"DSG\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9002IDSGR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.385Z", "attempts": 1, @@ -57092,14 +57092,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV9062IDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV9062IDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV9062\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9062IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9062IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV9062\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9062IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9062IDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.492Z", "attempts": 1, @@ -57168,14 +57168,14 @@ "packageCode": "D", "expectedPinCount": 14, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV9064IDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV9064IDR.tsx", "pinLabelCount": 14, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 14, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV9064\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9064IDR\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9064IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV9064\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9064IDR\",\"packageDescription\":\"SOIC-14\",\"packageCode\":\"D\",\"expectedPinCount\":14,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9064IDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.500Z", "attempts": 1, @@ -57280,14 +57280,14 @@ "packageCode": "D", "expectedPinCount": 8, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TLV9152IDR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TLV9152IDR.tsx", "pinLabelCount": 8, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 8, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TLV9152\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9152IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9152IDR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TLV9152\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TLV9152IDR\",\"packageDescription\":\"SOIC-8\",\"packageCode\":\"D\",\"expectedPinCount\":8,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TLV9152IDR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.611Z", "attempts": 1, @@ -57356,14 +57356,14 @@ "packageCode": "ZXR", "expectedPinCount": 168, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TM4C123GH6ZXRI7.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TM4C123GH6ZXRI7.tsx", "pinLabelCount": 168, "coordinateLabelCount": 168, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 168, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TM4C123GH6ZXR\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TM4C123GH6ZXRI7\",\"packageDescription\":\"NFBGA-168\",\"packageCode\":\"ZXR\",\"expectedPinCount\":168,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TM4C123GH6ZXRI7.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TM4C123GH6ZXR\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TM4C123GH6ZXRI7\",\"packageDescription\":\"NFBGA-168\",\"packageCode\":\"ZXR\",\"expectedPinCount\":168,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TM4C123GH6ZXRI7.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.290Z", "attempts": 1, @@ -58489,14 +58489,14 @@ "packageCode": "YMS", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TMP118MAIYMSR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TMP118MAIYMSR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TMP118\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP118MAIYMSR\",\"packageDescription\":\"PICOSTAR-4\",\"packageCode\":\"YMS\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP118MAIYMSR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TMP118\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP118MAIYMSR\",\"packageDescription\":\"PICOSTAR-4\",\"packageCode\":\"YMS\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP118MAIYMSR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.612Z", "attempts": 1, @@ -58541,14 +58541,14 @@ "packageCode": "YBG", "expectedPinCount": 6, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TMP119AIYBGR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TMP119AIYBGR.tsx", "pinLabelCount": 6, "coordinateLabelCount": 6, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 6, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TMP119\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP119AIYBGR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YBG\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP119AIYBGR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TMP119\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMP119AIYBGR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YBG\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMP119AIYBGR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:14.775Z", "attempts": 1, @@ -59616,14 +59616,14 @@ "packageCode": "ZWT", "expectedPinCount": 337, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TMS320F28377DZWTQ.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TMS320F28377DZWTQ.tsx", "pinLabelCount": 337, "coordinateLabelCount": 337, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 337, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TMS320F28377D-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28377DZWTQ\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28377DZWTQ.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TMS320F28377D-Q1\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28377DZWTQ\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28377DZWTQ.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.316Z", "attempts": 1, @@ -61853,14 +61853,14 @@ "packageCode": "ZWT", "expectedPinCount": 337, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TMS320F28379DZWTT.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TMS320F28379DZWTT.tsx", "pinLabelCount": 337, "coordinateLabelCount": 337, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 337, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TMS320F28379D\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28379DZWTT\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28379DZWTT.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TMS320F28379D\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TMS320F28379DZWTT\",\"packageDescription\":\"NFBGA-337\",\"packageCode\":\"ZWT\",\"expectedPinCount\":337,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TMS320F28379DZWTT.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.403Z", "attempts": 1, @@ -64090,14 +64090,14 @@ "packageCode": "DPY", "expectedPinCount": 2, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TPD1E01B04DPYR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPD1E01B04DPYR.tsx", "pinLabelCount": 2, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 2, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TPD1E01B04\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E01B04DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E01B04DPYR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TPD1E01B04\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E01B04DPYR\",\"packageDescription\":\"X1-SON-2(0.6x1)\",\"packageCode\":\"DPY\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E01B04DPYR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.595Z", "attempts": 1, @@ -64162,14 +64162,14 @@ "packageCode": "DYA", "expectedPinCount": 2, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TPD1E10B06DYAR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPD1E10B06DYAR.tsx", "pinLabelCount": 2, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 2, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TPD1E10B06\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E10B06DYAR\",\"packageDescription\":\"SOT-5X3\",\"packageCode\":\"DYA\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E10B06DYAR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TPD1E10B06\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD1E10B06DYAR\",\"packageDescription\":\"SOT-5X3\",\"packageCode\":\"DYA\",\"expectedPinCount\":2,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD1E10B06DYAR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.501Z", "attempts": 1, @@ -64212,14 +64212,14 @@ "packageCode": "DCK", "expectedPinCount": 3, "selectionReason": "jlcpcb-numeric-physical-labels", - "pinLabelSourcePath": "lib/chips/TPD2E007DCKR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPD2E007DCKR.tsx", "pinLabelCount": 3, "coordinateLabelCount": 0, "coordinateLabelRatio": 0, "physicalOnlyPinCount": 3, "physicalOnly": true, "numericPhysicalOnly": true, - "inputFingerprint": "{\"family\":\"TPD2E007\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2E007DCKR\",\"packageDescription\":\"SOT-323\",\"packageCode\":\"DCK\",\"expectedPinCount\":3,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2E007DCKR.circuit.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", + "inputFingerprint": "{\"family\":\"TPD2E007\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2E007DCKR\",\"packageDescription\":\"SOT-323\",\"packageCode\":\"DCK\",\"expectedPinCount\":3,\"selectionReason\":\"jlcpcb-numeric-physical-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2E007DCKR.tsx\",\"coordinateLabelRatio\":0,\"physicalOnly\":true,\"numericPhysicalOnly\":true}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.519Z", "attempts": 1, @@ -64258,14 +64258,14 @@ "packageCode": "YFF", "expectedPinCount": 9, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TPD2S300YFFR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPD2S300YFFR.tsx", "pinLabelCount": 9, "coordinateLabelCount": 9, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 9, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TPD2S300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2S300YFFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YFF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2S300YFFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TPD2S300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPD2S300YFFR\",\"packageDescription\":\"DSBGA-9\",\"packageCode\":\"YFF\",\"expectedPinCount\":9,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPD2S300YFFR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.583Z", "attempts": 1, @@ -64426,14 +64426,14 @@ "packageCode": "YZV", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TPS22910AYZVR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPS22910AYZVR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TPS22910A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22910AYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22910AYZVR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TPS22910A\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22910AYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22910AYZVR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.628Z", "attempts": 1, @@ -64478,14 +64478,14 @@ "packageCode": "YZV", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TPS22912CYZVR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPS22912CYZVR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TPS22912C\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22912CYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22912CYZVR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TPS22912C\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22912CYZVR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZV\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22912CYZVR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.714Z", "attempts": 1, @@ -64530,14 +64530,14 @@ "packageCode": "YFP", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TPS22916BYFPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPS22916BYFPR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TPS22916\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22916BYFPR\",\"packageDescription\":\"DSBGA-4(0.7x0.7)\",\"packageCode\":\"YFP\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22916BYFPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TPS22916\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22916BYFPR\",\"packageDescription\":\"DSBGA-4(0.7x0.7)\",\"packageCode\":\"YFP\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22916BYFPR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.810Z", "attempts": 1, @@ -64582,14 +64582,14 @@ "packageCode": "YZP", "expectedPinCount": 6, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TPS22946YZPR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TPS22946YZPR.tsx", "pinLabelCount": 6, "coordinateLabelCount": 6, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 6, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TPS22946\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22946YZPR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22946YZPR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TPS22946\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TPS22946YZPR\",\"packageDescription\":\"DSBGA-6\",\"packageCode\":\"YZP\",\"expectedPinCount\":6,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TPS22946YZPR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:16.766Z", "attempts": 1, @@ -68266,14 +68266,14 @@ "packageCode": "YZF", "expectedPinCount": 4, "selectionReason": "jlcpcb-physical-coordinate-labels", - "pinLabelSourcePath": "lib/chips/TVS3300YZFR.circuit.tsx", + "pinLabelSourcePath": "lib/chips/TVS3300YZFR.tsx", "pinLabelCount": 4, "coordinateLabelCount": 4, "coordinateLabelRatio": 1, "physicalOnlyPinCount": 4, "physicalOnly": true, "numericPhysicalOnly": false, - "inputFingerprint": "{\"family\":\"TVS3300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TVS3300YZFR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZF\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TVS3300YZFR.circuit.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", + "inputFingerprint": "{\"family\":\"TVS3300\",\"catalogSource\":\"jlcpcb\",\"manufacturerPartNumber\":\"TVS3300YZFR\",\"packageDescription\":\"DSBGA-4\",\"packageCode\":\"YZF\",\"expectedPinCount\":4,\"selectionReason\":\"jlcpcb-physical-coordinate-labels\",\"pinLabelSourcePath\":\"lib/chips/TVS3300YZFR.tsx\",\"coordinateLabelRatio\":1,\"physicalOnly\":true,\"numericPhysicalOnly\":false}", "cacheVersion": 2, "fetchedAt": "2026-08-22T19:09:17.614Z", "attempts": 1, diff --git a/lib/simulations/BQ24074-ovp-fault.circuit.tsx b/lib/simulations/BQ24074-ovp-fault.circuit.tsx index 6696c038..36cc1d4f 100644 --- a/lib/simulations/BQ24074-ovp-fault.circuit.tsx +++ b/lib/simulations/BQ24074-ovp-fault.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { BQ24074RGTR } from "../chips/BQ24074RGTR.circuit.tsx"; +import { BQ24074RGTR } from "../chips/BQ24074RGTR.tsx"; const ovpInputPinLabels = { pin1: ["OUT"], diff --git a/lib/simulations/DRV8876-driver-pwm-operation-ph-en.circuit.tsx b/lib/simulations/DRV8876-driver-pwm-operation-ph-en.circuit.tsx index 10ee3153..52b98699 100644 --- a/lib/simulations/DRV8876-driver-pwm-operation-ph-en.circuit.tsx +++ b/lib/simulations/DRV8876-driver-pwm-operation-ph-en.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { DRV8876 } from "../chips/DRV8876.circuit.tsx"; +import { DRV8876 } from "../chips/DRV8876.tsx"; export const DRV8876DriverPwmOperationPhEnCircuit = ( props: SubcircuitProps, diff --git a/lib/simulations/DRV8876-driver-pwm-operation-with-current-feedback.circuit.tsx b/lib/simulations/DRV8876-driver-pwm-operation-with-current-feedback.circuit.tsx index 635b844c..42aed38d 100644 --- a/lib/simulations/DRV8876-driver-pwm-operation-with-current-feedback.circuit.tsx +++ b/lib/simulations/DRV8876-driver-pwm-operation-with-current-feedback.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { DRV8876 } from "../chips/DRV8876.circuit.tsx"; +import { DRV8876 } from "../chips/DRV8876.tsx"; export const DRV8876DriverPwmOperationWithCurrentFeedbackCircuit = ( props: SubcircuitProps, diff --git a/lib/simulations/TPS22919-turn-off-small-load-capacitance.circuit.tsx b/lib/simulations/TPS22919-turn-off-small-load-capacitance.circuit.tsx index 8636c33d..76e449c6 100644 --- a/lib/simulations/TPS22919-turn-off-small-load-capacitance.circuit.tsx +++ b/lib/simulations/TPS22919-turn-off-small-load-capacitance.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TPS22919 } from "../chips/TPS22919.circuit.tsx"; +import { TPS22919 } from "../chips/TPS22919.tsx"; const onFallingPulseSource = ` .SUBCKT TPS22919_ON_FALL OUT GND diff --git a/lib/simulations/TPS63802-switching-waveforms-pfm-buck-operation.circuit.tsx b/lib/simulations/TPS63802-switching-waveforms-pfm-buck-operation.circuit.tsx index d6e2ed02..c6ff16a8 100644 --- a/lib/simulations/TPS63802-switching-waveforms-pfm-buck-operation.circuit.tsx +++ b/lib/simulations/TPS63802-switching-waveforms-pfm-buck-operation.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TPS63802DLAR } from "../chips/TPS63802DLAR.circuit.tsx"; +import { TPS63802DLAR } from "../chips/TPS63802DLAR.tsx"; export const TPS63802SwitchingWaveformsPfmBuckOperationCircuit = ( props: SubcircuitProps, diff --git a/lib/subcircuits/AudioAmplifier_TAS2505.circuit.tsx b/lib/subcircuits/AudioAmplifier_TAS2505.circuit.tsx index aaa068fd..3a9bb3f0 100644 --- a/lib/subcircuits/AudioAmplifier_TAS2505.circuit.tsx +++ b/lib/subcircuits/AudioAmplifier_TAS2505.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TAS2505 } from "../chips/TAS2505.circuit.tsx"; +import { TAS2505 } from "../chips/TAS2505.tsx"; /** TAS2505 typical application with host, analog, speaker and headphone I/O. */ export const AudioAmplifier_TAS2505 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BatteryManagement_BQ24072.circuit.tsx b/lib/subcircuits/BatteryManagement_BQ24072.circuit.tsx index 445473af..bcd12db8 100644 --- a/lib/subcircuits/BatteryManagement_BQ24072.circuit.tsx +++ b/lib/subcircuits/BatteryManagement_BQ24072.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { BQ24072RGTR } from "../chips/BQ24072RGTR.circuit.tsx"; +import { BQ24072RGTR } from "../chips/BQ24072RGTR.tsx"; export const BatteryManagement_BQ24072 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BatteryManagement_BQ24073.circuit.tsx b/lib/subcircuits/BatteryManagement_BQ24073.circuit.tsx index dd33c22b..c7618bc9 100644 --- a/lib/subcircuits/BatteryManagement_BQ24073.circuit.tsx +++ b/lib/subcircuits/BatteryManagement_BQ24073.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { BQ24073RGTR } from "../chips/BQ24073RGTR.circuit.tsx"; +import { BQ24073RGTR } from "../chips/BQ24073RGTR.tsx"; export const BatteryManagement_BQ24073 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BatteryManagement_BQ24074.circuit.tsx b/lib/subcircuits/BatteryManagement_BQ24074.circuit.tsx index 5e7a4ecc..974187af 100644 --- a/lib/subcircuits/BatteryManagement_BQ24074.circuit.tsx +++ b/lib/subcircuits/BatteryManagement_BQ24074.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { BQ24074RGTR } from "../chips/BQ24074RGTR.circuit.tsx"; +import { BQ24074RGTR } from "../chips/BQ24074RGTR.tsx"; export const BatteryManagement_BQ24074 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BatteryManagement_BQ25895.circuit.tsx b/lib/subcircuits/BatteryManagement_BQ25895.circuit.tsx index 8421c5b9..16645d60 100644 --- a/lib/subcircuits/BatteryManagement_BQ25895.circuit.tsx +++ b/lib/subcircuits/BatteryManagement_BQ25895.circuit.tsx @@ -1,4 +1,4 @@ -import { BQ25895RTWR } from "../chips/BQ25895RTWR.circuit.tsx"; +import { BQ25895RTWR } from "../chips/BQ25895RTWR.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const BatteryManagement_BQ25895 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BatteryManagement_BQ27441G1.circuit.tsx b/lib/subcircuits/BatteryManagement_BQ27441G1.circuit.tsx index a2a0bb19..1122442f 100644 --- a/lib/subcircuits/BatteryManagement_BQ27441G1.circuit.tsx +++ b/lib/subcircuits/BatteryManagement_BQ27441G1.circuit.tsx @@ -1,4 +1,4 @@ -import { BQ27441DRZR_G1B } from "../chips/BQ27441DRZR_G1B.circuit.tsx"; +import { BQ27441DRZR_G1B } from "../chips/BQ27441DRZR_G1B.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const BatteryManagement_BQ27441G1 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BluetoothAudioHost_MSP430F5229.circuit.tsx b/lib/subcircuits/BluetoothAudioHost_MSP430F5229.circuit.tsx index b792ea26..bfb7e81b 100644 --- a/lib/subcircuits/BluetoothAudioHost_MSP430F5229.circuit.tsx +++ b/lib/subcircuits/BluetoothAudioHost_MSP430F5229.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { MSP430F5229IRGCR } from "../chips/MSP430F5229IRGCR.circuit.tsx"; +import { MSP430F5229IRGCR } from "../chips/MSP430F5229IRGCR.tsx"; export const BluetoothAudioHost_MSP430F5229 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BluetoothController_CC2564C.circuit.tsx b/lib/subcircuits/BluetoothController_CC2564C.circuit.tsx index b68bc499..5ca50a07 100644 --- a/lib/subcircuits/BluetoothController_CC2564C.circuit.tsx +++ b/lib/subcircuits/BluetoothController_CC2564C.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { CC2564C } from "../chips/CC2564C.circuit.tsx"; +import { CC2564C } from "../chips/CC2564C.tsx"; const cc2564cNoConnectPins = [ "pin1", diff --git a/lib/subcircuits/BoostConverter_TPS61299X.circuit.tsx b/lib/subcircuits/BoostConverter_TPS61299X.circuit.tsx index 4fe8598a..b6817dfa 100644 --- a/lib/subcircuits/BoostConverter_TPS61299X.circuit.tsx +++ b/lib/subcircuits/BoostConverter_TPS61299X.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TPS61299X } from "../chips/TPS61299X.circuit.tsx"; +import { TPS61299X } from "../chips/TPS61299X.tsx"; export const BoostConverter_TPS61299X = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BuckBoostConverter_TPS63802.circuit.tsx b/lib/subcircuits/BuckBoostConverter_TPS63802.circuit.tsx index c0846322..0903828d 100644 --- a/lib/subcircuits/BuckBoostConverter_TPS63802.circuit.tsx +++ b/lib/subcircuits/BuckBoostConverter_TPS63802.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TPS63802DLAR } from "../chips/TPS63802DLAR.circuit.tsx"; +import { TPS63802DLAR } from "../chips/TPS63802DLAR.tsx"; export const BuckBoostConverter_TPS63802 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/BuckConverter_TPS62933.circuit.tsx b/lib/subcircuits/BuckConverter_TPS62933.circuit.tsx index c664c428..e29221a3 100644 --- a/lib/subcircuits/BuckConverter_TPS62933.circuit.tsx +++ b/lib/subcircuits/BuckConverter_TPS62933.circuit.tsx @@ -1,4 +1,4 @@ -import { TPS6293 } from "../chips/TPS6293.circuit.tsx"; +import { TPS6293 } from "../chips/TPS6293.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const BuckConverter_TPS62933 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/EnvironmentalSensor_HDC2080.circuit.tsx b/lib/subcircuits/EnvironmentalSensor_HDC2080.circuit.tsx index 171f390a..e5f20aea 100644 --- a/lib/subcircuits/EnvironmentalSensor_HDC2080.circuit.tsx +++ b/lib/subcircuits/EnvironmentalSensor_HDC2080.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { HDC2080DMBR } from "../chips/HDC2080DMBR.circuit.tsx"; +import { HDC2080DMBR } from "../chips/HDC2080DMBR.tsx"; export const EnvironmentalSensor_HDC2080 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/EnvironmentalSensor_HDC3020.circuit.tsx b/lib/subcircuits/EnvironmentalSensor_HDC3020.circuit.tsx index afef2350..13ddd699 100644 --- a/lib/subcircuits/EnvironmentalSensor_HDC3020.circuit.tsx +++ b/lib/subcircuits/EnvironmentalSensor_HDC3020.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { HDC3020DEFR } from "../chips/HDC3020DEFR.circuit.tsx"; +import { HDC3020DEFR } from "../chips/HDC3020DEFR.tsx"; export const EnvironmentalSensor_HDC3020 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/EnvironmentalSensor_HDC3022.circuit.tsx b/lib/subcircuits/EnvironmentalSensor_HDC3022.circuit.tsx index 9bbf4db6..443f161e 100644 --- a/lib/subcircuits/EnvironmentalSensor_HDC3022.circuit.tsx +++ b/lib/subcircuits/EnvironmentalSensor_HDC3022.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { HDC3022DEJR } from "../chips/HDC3022DEJR.circuit.tsx"; +import { HDC3022DEJR } from "../chips/HDC3022DEJR.tsx"; export const EnvironmentalSensor_HDC3022 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/FlashMemory_W25Q128JVSIQ.circuit.tsx b/lib/subcircuits/FlashMemory_W25Q128JVSIQ.circuit.tsx index 845d4d4e..cb20f6d3 100644 --- a/lib/subcircuits/FlashMemory_W25Q128JVSIQ.circuit.tsx +++ b/lib/subcircuits/FlashMemory_W25Q128JVSIQ.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { W25Q128JVSIQ } from "../chips/W25Q128JVSIQ.circuit.tsx"; +import { W25Q128JVSIQ } from "../chips/W25Q128JVSIQ.tsx"; export const FlashMemory_W25Q128JVSIQ = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/LEDDriver_TLC59116.circuit.tsx b/lib/subcircuits/LEDDriver_TLC59116.circuit.tsx index bdd01660..0666201b 100644 --- a/lib/subcircuits/LEDDriver_TLC59116.circuit.tsx +++ b/lib/subcircuits/LEDDriver_TLC59116.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TLC59116 } from "../chips/TLC59116.circuit.tsx"; +import { TLC59116 } from "../chips/TLC59116.tsx"; export const LEDDriver_TLC59116 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/LevelShifter_TXB0104.circuit.tsx b/lib/subcircuits/LevelShifter_TXB0104.circuit.tsx index 5e6c3468..769c4d4a 100644 --- a/lib/subcircuits/LevelShifter_TXB0104.circuit.tsx +++ b/lib/subcircuits/LevelShifter_TXB0104.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TXB0104 } from "../chips/TXB0104.circuit.tsx"; +import { TXB0104 } from "../chips/TXB0104.tsx"; export const LevelShifter_TXB0104 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/LevelShifter_TXS0102.circuit.tsx b/lib/subcircuits/LevelShifter_TXS0102.circuit.tsx index e25a050b..256954be 100644 --- a/lib/subcircuits/LevelShifter_TXS0102.circuit.tsx +++ b/lib/subcircuits/LevelShifter_TXS0102.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TXS0102 } from "../chips/TXS0102.circuit.tsx"; +import { TXS0102 } from "../chips/TXS0102.tsx"; export const LevelShifter_TXS0102 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/LoadSwitch_TPS22919.circuit.tsx b/lib/subcircuits/LoadSwitch_TPS22919.circuit.tsx index 2f01807f..7e07d908 100644 --- a/lib/subcircuits/LoadSwitch_TPS22919.circuit.tsx +++ b/lib/subcircuits/LoadSwitch_TPS22919.circuit.tsx @@ -1,4 +1,4 @@ -import { TPS22919 } from "../chips/TPS22919.circuit.tsx"; +import { TPS22919 } from "../chips/TPS22919.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const LoadSwitch_TPS22919 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/Microcontroller_MSPM0G3507.circuit.tsx b/lib/subcircuits/Microcontroller_MSPM0G3507.circuit.tsx index 32987bfb..40514ff4 100644 --- a/lib/subcircuits/Microcontroller_MSPM0G3507.circuit.tsx +++ b/lib/subcircuits/Microcontroller_MSPM0G3507.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { MSPM0G3507SPMR } from "../chips/MSPM0G3507SPMR.circuit.tsx"; +import { MSPM0G3507SPMR } from "../chips/MSPM0G3507SPMR.tsx"; export const Microcontroller_MSPM0G3507 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/Microcontroller_MSPM33C3x.circuit.tsx b/lib/subcircuits/Microcontroller_MSPM33C3x.circuit.tsx index 5f758d7b..b14925ee 100644 --- a/lib/subcircuits/Microcontroller_MSPM33C3x.circuit.tsx +++ b/lib/subcircuits/Microcontroller_MSPM33C3x.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { MSPM33C3x } from "../chips/MSPM33C3x.circuit.tsx"; +import { MSPM33C3x } from "../chips/MSPM33C3x.tsx"; export const Microcontroller_MSPM33C3x = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/MotorDriver_DRV8833.circuit.tsx b/lib/subcircuits/MotorDriver_DRV8833.circuit.tsx index 2df02ab5..881566d8 100644 --- a/lib/subcircuits/MotorDriver_DRV8833.circuit.tsx +++ b/lib/subcircuits/MotorDriver_DRV8833.circuit.tsx @@ -1,4 +1,4 @@ -import { DRV8833 } from "../chips/DRV8833.circuit.tsx"; +import { DRV8833 } from "../chips/DRV8833.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const MotorDriver_DRV8833 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/MotorDriver_DRV8876.circuit.tsx b/lib/subcircuits/MotorDriver_DRV8876.circuit.tsx index 586fecc5..80607af8 100644 --- a/lib/subcircuits/MotorDriver_DRV8876.circuit.tsx +++ b/lib/subcircuits/MotorDriver_DRV8876.circuit.tsx @@ -1,4 +1,4 @@ -import { DRV8876 } from "../chips/DRV8876.circuit.tsx"; +import { DRV8876 } from "../chips/DRV8876.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const MotorDriver_DRV8876 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TLV755P.circuit.tsx b/lib/subcircuits/PowerManagement_TLV755P.circuit.tsx index 2d3e29b1..91e24be7 100644 --- a/lib/subcircuits/PowerManagement_TLV755P.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TLV755P.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TLV755P } from "../chips/TLV755P.circuit.tsx"; +import { TLV755P } from "../chips/TLV755P.tsx"; /** TLV755P 3.3 V LDO typical application with 1 uF input/output capacitors. */ export const PowerManagement_TLV755P = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TPS6521835.circuit.tsx b/lib/subcircuits/PowerManagement_TPS6521835.circuit.tsx index 4606072e..a8c9418e 100644 --- a/lib/subcircuits/PowerManagement_TPS6521835.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TPS6521835.circuit.tsx @@ -2,7 +2,7 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TPS6521835 } from "../chips/TPS6521835.circuit.tsx"; +import { TPS6521835 } from "../chips/TPS6521835.tsx"; export const PowerManagement_TPS6521835 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TPS7A02.circuit.tsx b/lib/subcircuits/PowerManagement_TPS7A02.circuit.tsx index 2ffcdf5a..f68e3559 100644 --- a/lib/subcircuits/PowerManagement_TPS7A02.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TPS7A02.circuit.tsx @@ -1,4 +1,4 @@ -import { TPS7A0230PDBVR } from "../chips/TPS7A0230PDBVR.circuit.tsx"; +import { TPS7A0230PDBVR } from "../chips/TPS7A0230PDBVR.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const PowerManagement_TPS7A02 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TPS7A20.circuit.tsx b/lib/subcircuits/PowerManagement_TPS7A20.circuit.tsx index 1501d0aa..01ec3c8f 100644 --- a/lib/subcircuits/PowerManagement_TPS7A20.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TPS7A20.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TPS7A20 } from "../chips/TPS7A20.circuit.tsx"; +import { TPS7A20 } from "../chips/TPS7A20.tsx"; /** TPS7A20 3.3 V LDO typical application with 1 uF input/output capacitors. */ export const PowerManagement_TPS7A20 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TPS7A2018.circuit.tsx b/lib/subcircuits/PowerManagement_TPS7A2018.circuit.tsx index 65f08d67..737360d5 100644 --- a/lib/subcircuits/PowerManagement_TPS7A2018.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TPS7A2018.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TPS7A2018PDBVR } from "../chips/TPS7A2018PDBVR.circuit.tsx"; +import { TPS7A2018PDBVR } from "../chips/TPS7A2018PDBVR.tsx"; /** TPS7A2018 1.8 V LDO typical application with 1 uF input/output capacitors. */ export const PowerManagement_TPS7A2018 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerManagement_TPS7A2028.circuit.tsx b/lib/subcircuits/PowerManagement_TPS7A2028.circuit.tsx index 0a5c8ccc..ad50fb53 100644 --- a/lib/subcircuits/PowerManagement_TPS7A2028.circuit.tsx +++ b/lib/subcircuits/PowerManagement_TPS7A2028.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TPS7A2028PDBVR } from "../chips/TPS7A2028PDBVR.circuit.tsx"; +import { TPS7A2028PDBVR } from "../chips/TPS7A2028PDBVR.tsx"; /** TPS7A2028 2.8 V LDO typical application with 1 uF input/output capacitors. */ export const PowerManagement_TPS7A2028 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerModule_TPSM82823.circuit.tsx b/lib/subcircuits/PowerModule_TPSM82823.circuit.tsx index 9d63616b..37e5fc18 100644 --- a/lib/subcircuits/PowerModule_TPSM82823.circuit.tsx +++ b/lib/subcircuits/PowerModule_TPSM82823.circuit.tsx @@ -1,4 +1,4 @@ -import { TPSM82823 } from "../chips/TPSM82823.circuit.tsx"; +import { TPSM82823 } from "../chips/TPSM82823.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const PowerModule_TPSM82823 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/PowerMonitor_INA237.circuit.tsx b/lib/subcircuits/PowerMonitor_INA237.circuit.tsx index 0e6de953..8ec5a403 100644 --- a/lib/subcircuits/PowerMonitor_INA237.circuit.tsx +++ b/lib/subcircuits/PowerMonitor_INA237.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { INA237AQDGSRQ1 } from "../chips/INA237AQDGSRQ1.circuit.tsx"; +import { INA237AQDGSRQ1 } from "../chips/INA237AQDGSRQ1.tsx"; export const PowerMonitor_INA237 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/RFIDReader_TRF7960.circuit.tsx b/lib/subcircuits/RFIDReader_TRF7960.circuit.tsx index 1911f51e..c158e5f5 100644 --- a/lib/subcircuits/RFIDReader_TRF7960.circuit.tsx +++ b/lib/subcircuits/RFIDReader_TRF7960.circuit.tsx @@ -1,10 +1,10 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { CoaxialTestPort } from "../chips/CoaxialTestPort.circuit.tsx"; -import { Header2x10 } from "../chips/Header2x10.circuit.tsx"; -import { OscillatorCrystal4 } from "../chips/OscillatorCrystal4.circuit.tsx"; -import { TPS61222 } from "../chips/TPS61222.circuit.tsx"; -import { TRF7960RHB } from "../chips/TRF7960RHB.circuit.tsx"; +import { CoaxialTestPort } from "../chips/CoaxialTestPort.tsx"; +import { Header2x10 } from "../chips/Header2x10.tsx"; +import { OscillatorCrystal4 } from "../chips/OscillatorCrystal4.tsx"; +import { TPS61222 } from "../chips/TPS61222.tsx"; +import { TRF7960RHB } from "../chips/TRF7960RHB.tsx"; export const RFIDReader_TRF7960 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/RealTimeClock_BQ32002.circuit.tsx b/lib/subcircuits/RealTimeClock_BQ32002.circuit.tsx index c4a1fb85..d3ae0df7 100644 --- a/lib/subcircuits/RealTimeClock_BQ32002.circuit.tsx +++ b/lib/subcircuits/RealTimeClock_BQ32002.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { BQ32002 } from "../chips/BQ32002.circuit.tsx"; +import { BQ32002 } from "../chips/BQ32002.tsx"; export const RealTimeClock_BQ32002 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/TargetSocket_MSPTS430D8.circuit.tsx b/lib/subcircuits/TargetSocket_MSPTS430D8.circuit.tsx index 3e2529ab..7b8ebd68 100644 --- a/lib/subcircuits/TargetSocket_MSPTS430D8.circuit.tsx +++ b/lib/subcircuits/TargetSocket_MSPTS430D8.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { MSP430G2230ID } from "../chips/MSP430G2230ID.circuit.tsx"; +import { MSP430G2230ID } from "../chips/MSP430G2230ID.tsx"; /** * TI MSP-TS430D8 8-pin target socket board reference circuit. diff --git a/lib/subcircuits/TemperatureSensor_TMP1075.circuit.tsx b/lib/subcircuits/TemperatureSensor_TMP1075.circuit.tsx index d427775e..b7d3215e 100644 --- a/lib/subcircuits/TemperatureSensor_TMP1075.circuit.tsx +++ b/lib/subcircuits/TemperatureSensor_TMP1075.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { TMP1075DSGR } from "../chips/TMP1075DSGR.circuit.tsx"; +import { TMP1075DSGR } from "../chips/TMP1075DSGR.tsx"; export const TemperatureSensor_TMP1075 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/TemperatureSensor_TMP1827.circuit.tsx b/lib/subcircuits/TemperatureSensor_TMP1827.circuit.tsx index e34ea51d..bf08134b 100644 --- a/lib/subcircuits/TemperatureSensor_TMP1827.circuit.tsx +++ b/lib/subcircuits/TemperatureSensor_TMP1827.circuit.tsx @@ -1,6 +1,6 @@ import type { SubcircuitProps } from "@tscircuit/props"; import "tscircuit"; -import { TMP1827 } from "../chips/TMP1827.circuit.tsx"; +import { TMP1827 } from "../chips/TMP1827.tsx"; export const TemperatureSensor_TMP1827 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/WirelessMCU_CC2340R5.circuit.tsx b/lib/subcircuits/WirelessMCU_CC2340R5.circuit.tsx index cb7ad92c..deb586ac 100644 --- a/lib/subcircuits/WirelessMCU_CC2340R5.circuit.tsx +++ b/lib/subcircuits/WirelessMCU_CC2340R5.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { CC2340R5 } from "../chips/CC2340R5.circuit.tsx"; +import { CC2340R5 } from "../chips/CC2340R5.tsx"; export const WirelessMCU_CC2340R5 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/WirelessMCU_CC2745R10.circuit.tsx b/lib/subcircuits/WirelessMCU_CC2745R10.circuit.tsx index 44257268..5518adbc 100644 --- a/lib/subcircuits/WirelessMCU_CC2745R10.circuit.tsx +++ b/lib/subcircuits/WirelessMCU_CC2745R10.circuit.tsx @@ -1,5 +1,5 @@ import type { SubcircuitProps } from "@tscircuit/props"; -import { CC2745R10 } from "../chips/CC2745R10.circuit.tsx"; +import { CC2745R10 } from "../chips/CC2745R10.tsx"; export const WirelessMCU_CC2745R10 = (props: SubcircuitProps) => ( diff --git a/lib/subcircuits/WirelessMCU_CC3235SF.circuit.tsx b/lib/subcircuits/WirelessMCU_CC3235SF.circuit.tsx index 76a4d65e..45ed27c5 100644 --- a/lib/subcircuits/WirelessMCU_CC3235SF.circuit.tsx +++ b/lib/subcircuits/WirelessMCU_CC3235SF.circuit.tsx @@ -1,4 +1,4 @@ -import { CC3235SF12RGKR } from "../chips/CC3235SF12RGKR.circuit.tsx"; +import { CC3235SF12RGKR } from "../chips/CC3235SF12RGKR.tsx"; import type { SubcircuitProps } from "@tscircuit/props"; export const WirelessMCU_CC3235SF = (props: SubcircuitProps) => ( diff --git a/package.json b/package.json index 9feaa287..37c96cf3 100644 --- a/package.json +++ b/package.json @@ -16,10 +16,13 @@ "build": "tsci build", "snapshot": "tsci snapshot", "snapshot:update": "tsci snapshot --update", + "snapshot:schematics": "tsci snapshot examples --schematic-only --disable-parts-engine --concurrency 8", + "snapshot:schematics:update": "tsci snapshot examples --schematic-only --disable-parts-engine --update --concurrency 8", "start": "tsci dev", "typecheck": "tsc --noEmit", "generate:ti-sysblocks": "bun scripts/generate-ti-sysblocks-exports.ts", "validate:ti-sysblocks": "bun scripts/validate-ti-sysblocks-catalog.ts", + "validate:ti-reference-examples": "bun scripts/validate-ti-reference-examples.ts", "format": "biome format --write", "format:check": "biome format ." }, diff --git a/scripts/cache-ti-sysblocks-pinouts.ts b/scripts/cache-ti-sysblocks-pinouts.ts index 92096b9b..6aed416f 100644 --- a/scripts/cache-ti-sysblocks-pinouts.ts +++ b/scripts/cache-ti-sysblocks-pinouts.ts @@ -251,7 +251,7 @@ const createDefaultComponentSourceReader = ( (candidate): candidate is string => Boolean(candidate), )) { for (const sourcePath of [ - resolve(repoRoot, "lib/chips", `${filename}.circuit.tsx`), + resolve(repoRoot, "lib/chips", `${filename}.tsx`), resolve(repoRoot, "imports", `${filename}.tsx`), ]) { if (!existsSync(sourcePath)) continue; diff --git a/scripts/enrich-ti-array-pin-labels.ts b/scripts/enrich-ti-array-pin-labels.ts index e5b7021e..b6ef2ec6 100644 --- a/scripts/enrich-ti-array-pin-labels.ts +++ b/scripts/enrich-ti-array-pin-labels.ts @@ -101,7 +101,7 @@ const getStringAliases = (expression: ts.Expression) => { export const parsePinLabels = ( sourceText: string, - sourcePath = "component.circuit.tsx", + sourcePath = "component.tsx", ): ParsedPinLabels => { const sourceFile = ts.createSourceFile( sourcePath, @@ -262,7 +262,7 @@ const renderMetadata = (metadata: EnrichedArrayPinMetadata) => export const enrichArrayComponentSource = ( sourceText: string, officialPins: readonly TiDocumentPin[], - sourcePath = "component.circuit.tsx", + sourcePath = "component.tsx", ) => { const parsed = parsePinLabels(sourceText, sourcePath); const metadata = enrichArrayPinMetadata(parsed.labels, officialPins); diff --git a/scripts/generate-ti-reference-examples.ts b/scripts/generate-ti-reference-examples.ts new file mode 100644 index 00000000..11c456cc --- /dev/null +++ b/scripts/generate-ti-reference-examples.ts @@ -0,0 +1,274 @@ +import { dirname, join, resolve } from "node:path"; +import { fileURLToPath } from "node:url"; + +import { + getTiReferenceCoverage, + isGeneratedTiReferenceExample, + renderTiReferenceExample, + type TiReferenceCatalogEntry, + type TiGeneratedReferenceExample, + type TiReferenceExampleManifest, + validateTiReferenceExampleManifest, +} from "./ti-reference-example-schema.ts"; + +const repositoryRoot = join(dirname(fileURLToPath(import.meta.url)), ".."); +const defaultManifestPath = join( + repositoryRoot, + "examples/ti-reference-examples.json", +); +const defaultCatalogPath = join( + repositoryRoot, + "lib/chips/ti-sysblocks-chip-catalog.json", +); + +export type GenerateTiReferenceExamplesOptions = { + repoRoot: string; + manifest: TiReferenceExampleManifest; + catalog: readonly TiReferenceCatalogEntry[]; + family?: string; + check?: boolean; + requireCompleteCatalog?: boolean; + verifyEvidence?: boolean; + readText?: (path: string) => Promise; + writeText?: (path: string, source: string) => Promise; + formatSource?: (source: string, outputPath: string) => Promise; +}; + +export type GeneratedTiReferenceExample = { + family: string; + id: string; + outputPath: string; + changed: boolean; +}; + +const defaultReadText = async (path: string): Promise => + await Bun.file(path).text(); + +const defaultWriteText = async ( + path: string, + source: string, +): Promise => { + await Bun.write(path, source); +}; + +const defaultFormatSource = async ( + source: string, + outputPath: string, +): Promise => { + const process = Bun.spawn( + ["bunx", "biome", "format", "--stdin-file-path", outputPath], + { stdin: "pipe", stdout: "pipe", stderr: "pipe" }, + ); + process.stdin.write(source); + process.stdin.end(); + const [exitCode, formattedSource, standardError] = await Promise.all([ + process.exited, + new Response(process.stdout).text(), + new Response(process.stderr).text(), + ]); + if (exitCode !== 0) { + throw new Error( + `Biome could not format ${outputPath}: ${standardError.trim()}`, + ); + } + return formattedSource; +}; + +const verifyComponentModule = async ( + example: TiGeneratedReferenceExample, + repoRoot: string, + readText: (path: string) => Promise, +): Promise => { + const examplesDirectory = join(repoRoot, "examples"); + const componentPath = resolve( + examplesDirectory, + example.mainDevice.modulePath, + ); + const chipsDirectory = resolve(repoRoot, "lib/chips"); + if (!componentPath.startsWith(`${chipsDirectory}/`)) { + throw new Error(`${example.family}: component module escapes lib/chips`); + } + let source: string; + try { + source = await readText(componentPath); + } catch { + throw new Error( + `${example.family}: component module not found: ${componentPath}`, + ); + } + const exportExpression = new RegExp( + `export\\s+const\\s+${example.mainDevice.componentExportName}\\b`, + ); + if (!exportExpression.test(source)) { + throw new Error( + `${example.family}: ${componentPath} does not export ${example.mainDevice.componentExportName}`, + ); + } +}; + +const verifyFigureEvidence = async ( + example: TiReferenceExampleManifest["examples"][number], +): Promise => { + const response = await fetch(example.evidence.figureUrl, { + method: "HEAD", + headers: { + Accept: "image/*", + "User-Agent": "tscircuit-ti-reference-evidence/1.0", + }, + }); + if (!response.ok) { + throw new Error( + `${example.family}: TI figure asset returned HTTP ${response.status}: ${example.evidence.figureUrl}`, + ); + } + const contentType = response.headers.get("content-type") ?? ""; + if (!contentType.toLowerCase().startsWith("image/")) { + throw new Error( + `${example.family}: TI figure asset is not an image (${contentType || "missing content type"}): ${example.evidence.figureUrl}`, + ); + } +}; + +export const generateTiReferenceExamples = async ( + options: GenerateTiReferenceExamplesOptions, +): Promise => { + const manifest = validateTiReferenceExampleManifest(options.manifest, { + catalog: options.catalog, + }); + const coverage = getTiReferenceCoverage(manifest, options.catalog); + if (options.requireCompleteCatalog && coverage.unresolvedCount > 0) { + throw new Error( + `Reference evidence is incomplete: ${coverage.supportedCount}/${coverage.catalogFamilies} families are verified; ${coverage.unresolvedCount} remain unresolved.`, + ); + } + if (options.verifyEvidence) { + for (const example of manifest.examples) + await verifyFigureEvidence(example); + } + let examples = manifest.examples.filter(isGeneratedTiReferenceExample); + if (options.family) { + const selectedExample = manifest.examples.find( + (example) => example.family === options.family, + ); + if (!selectedExample) { + throw new Error( + `${options.family}: no verified TI reference figure with component, connectivity, value, and placement evidence; refusing to generate a chip-only placeholder.`, + ); + } + if (!isGeneratedTiReferenceExample(selectedExample)) { + throw new Error( + `${options.family}: reference example is handwritten and will not be overwritten by the generator.`, + ); + } + examples = [selectedExample]; + } + + const readText = options.readText ?? defaultReadText; + const writeText = options.writeText ?? defaultWriteText; + const formatSource = options.formatSource ?? defaultFormatSource; + const results: GeneratedTiReferenceExample[] = []; + for (const example of examples) { + await verifyComponentModule(example, options.repoRoot, readText); + const outputPath = join( + options.repoRoot, + "examples", + `${example.id}.circuit.tsx`, + ); + const source = await formatSource( + renderTiReferenceExample(example), + outputPath, + ); + let currentSource: string | undefined; + try { + currentSource = await readText(outputPath); + } catch { + currentSource = undefined; + } + const changed = currentSource !== source; + if (options.check && changed) { + throw new Error( + `${outputPath} is missing or stale; run bun scripts/generate-ti-reference-examples.ts`, + ); + } + if (!options.check && changed) await writeText(outputPath, source); + results.push({ + family: example.family, + id: example.id, + outputPath, + changed, + }); + } + return results; +}; + +type CliOptions = { + manifestPath: string; + catalogPath: string; + family?: string; + check: boolean; + requireCompleteCatalog: boolean; + verifyEvidence: boolean; +}; + +const parseCliOptions = (arguments_: string[]): CliOptions => { + const options: CliOptions = { + manifestPath: defaultManifestPath, + catalogPath: defaultCatalogPath, + check: false, + requireCompleteCatalog: false, + verifyEvidence: false, + }; + for (let index = 0; index < arguments_.length; index += 1) { + const argument = arguments_[index]; + if (argument === "--check") options.check = true; + else if (argument === "--require-complete-catalog") { + options.requireCompleteCatalog = true; + } else if (argument === "--verify-evidence") options.verifyEvidence = true; + else if (argument === "--family") { + options.family = arguments_[index + 1]; + index += 1; + } else if (argument === "--manifest") { + options.manifestPath = resolve(arguments_[index + 1]); + index += 1; + } else if (argument === "--catalog") { + options.catalogPath = resolve(arguments_[index + 1]); + index += 1; + } else { + throw new Error(`Unknown argument: ${argument}`); + } + } + return options; +}; + +const isMain = + process.argv[1] !== undefined && + resolve(process.argv[1]) === fileURLToPath(import.meta.url); + +if (isMain) { + const cliOptions = parseCliOptions(process.argv.slice(2)); + const catalog = (await Bun.file(cliOptions.catalogPath).json()) as + | TiReferenceCatalogEntry[] + | undefined; + const rawManifest: unknown = await Bun.file(cliOptions.manifestPath).json(); + if (!Array.isArray(catalog)) { + throw new Error(`${cliOptions.catalogPath} must contain a catalog array`); + } + const manifest = validateTiReferenceExampleManifest(rawManifest, { catalog }); + const results = await generateTiReferenceExamples({ + repoRoot: repositoryRoot, + manifest, + catalog, + family: cliOptions.family, + check: cliOptions.check, + requireCompleteCatalog: cliOptions.requireCompleteCatalog, + verifyEvidence: cliOptions.verifyEvidence, + }); + const coverage = getTiReferenceCoverage(manifest, catalog); + const changedCount = results.filter((result) => result.changed).length; + console.log( + `${cliOptions.check ? "Checked" : "Generated"} ${results.length} verified TI reference example(s); ${changedCount} ${cliOptions.check ? "stale" : "changed"}.`, + ); + console.log( + `Coverage: ${coverage.supportedCount}/${coverage.catalogFamilies} families verified; ${coverage.unresolvedCount} intentionally unresolved.`, + ); +} diff --git a/scripts/generate-ti-sysblocks-exports.ts b/scripts/generate-ti-sysblocks-exports.ts index d6a2cd4e..77865096 100644 --- a/scripts/generate-ti-sysblocks-exports.ts +++ b/scripts/generate-ti-sysblocks-exports.ts @@ -20,7 +20,7 @@ const entries = [...catalog].sort((left, right) => const imports = entries.map((entry) => { const componentName = entry.componentExportName ?? entry.exportName; - return `import { ${componentName} } from "./${componentName}.circuit.tsx";`; + return `import { ${componentName} } from "./${componentName}.tsx";`; }); const exactExports = entries diff --git a/scripts/materialize-ti-datasheet-components.test.ts b/scripts/materialize-ti-datasheet-components.test.ts deleted file mode 100644 index e2277482..00000000 --- a/scripts/materialize-ti-datasheet-components.test.ts +++ /dev/null @@ -1,596 +0,0 @@ -import assert from "node:assert/strict"; -import { resolve } from "node:path"; -import { describe, test } from "node:test"; - -import { - assertFootprintDestinations, - buildCoordinatePhysicalMap, - buildTiGeneratedPins, - type CommittedFootprintCatalog, - deriveTiPinRole, - extractDonorPinLabels, - mergeTiSupplementalPins, - renderCoordinateGridFootprintProp, - renderTiDatasheetComponent, - type TiDatasheetCatalogEntry, - type TiOfficialPin, -} from "./materialize-ti-datasheet-components.ts"; - -const pin = ( - number: string, - name: string, - type = "", - description = "", -): TiOfficialPin => ({ number, name, type, description }); - -const auditedSupplementalDestinations = new Map< - string, - { physical: string; pinKey: string } ->([ - ["CC2340R21N0RGER", { physical: "25", pinKey: "pin25" }], - ["CC2531F128RHAR", { physical: "41", pinKey: "pin41" }], - ["CC2755P105E0WRHAR", { physical: "41", pinKey: "pin41" }], - ["CC2755P207E0WRHAR", { physical: "41", pinKey: "pin41" }], - ["CC3501ENJARSHR", { physical: "57", pinKey: "pin57" }], - ["CC3551ENJARSHR", { physical: "57", pinKey: "pin57" }], - ["CSD18531Q5AT", { physical: "9", pinKey: "pin9" }], - ["DAC43701DSGR", { physical: "9", pinKey: "pin9" }], - ["DP83826AERHBR", { physical: "33", pinKey: "pin33" }], - ["DRV8363QRGZRQ1", { physical: "49", pinKey: "pin49" }], - ["LMG3612REQR", { physical: "39", pinKey: "pin39" }], - ["XMSPM0G1218SRGZR", { physical: "49", pinKey: "pin49" }], - ["TLC69699DRRR", { physical: "13", pinKey: "pin13" }], - ["PTLIN821DRBRQ1", { physical: "9", pinKey: "pin9" }], -]); - -describe("TI datasheet component materialization", () => { - test("committed footprint selections cover every TI-datasheet target", async () => { - const footprintCatalog = (await Bun.file( - resolve( - import.meta.dir, - "../lib/chips/ti-sysblocks-footprint-selections.json", - ), - ).json()) as CommittedFootprintCatalog; - const chipCatalog = (await Bun.file( - resolve(import.meta.dir, "../lib/chips/ti-sysblocks-chip-catalog.json"), - ).json()) as TiDatasheetCatalogEntry[]; - const entries = chipCatalog.filter( - (entry) => entry.source === "ti-datasheet", - ); - const entriesByMpn = new Map( - entries.map((entry) => [entry.manufacturerPartNumber, entry]), - ); - const targets = Object.values(footprintCatalog.targets); - - assert.equal(footprintCatalog.schemaVersion, 1); - assert.equal(footprintCatalog.targetCount, 111); - assert.equal(footprintCatalog.coverage.targetEntries, 111); - assert.equal(footprintCatalog.coverage.sourceReadyEntries, 111); - assert.equal(footprintCatalog.coverage.unavailableEntries, 0); - assert.equal(entries.length, 111); - assert.equal(entriesByMpn.size, 111); - assert.equal(targets.length, 111); - for (const [manufacturerPartNumber, target] of Object.entries( - footprintCatalog.targets, - )) { - const entry = entriesByMpn.get(manufacturerPartNumber); - assert.ok(entry, `Unexpected footprint target ${manufacturerPartNumber}`); - assert.equal(target.status, "source-ready"); - assert.equal(target.manufacturerPartNumber, manufacturerPartNumber); - assert.equal(target.family, entry.family); - assert.equal(target.componentExportName, entry.componentExportName); - assert.equal(target.packageDrawing, entry.packageDrawing); - assert.equal(target.drawingId, target.packageDrawing); - assert.ok(target.provenanceComment?.includes(target.drawingId ?? "")); - } - }); - - test("every committed footprint destination resolves to a generated port", async () => { - const footprintCatalog = (await Bun.file( - resolve( - import.meta.dir, - "../lib/chips/ti-sysblocks-footprint-selections.json", - ), - ).json()) as CommittedFootprintCatalog; - const chipCatalog = (await Bun.file( - resolve(import.meta.dir, "../lib/chips/ti-sysblocks-chip-catalog.json"), - ).json()) as TiDatasheetCatalogEntry[]; - const pinoutCatalog = (await Bun.file( - resolve(import.meta.dir, "../lib/chips/ti-sysblocks-pinouts.json"), - ).json()) as Record< - string, - { status: "ok" | "unavailable"; pins?: TiOfficialPin[] } - >; - - let auditedSupplementalCount = 0; - for (const entry of chipCatalog.filter( - (candidate) => candidate.source === "ti-datasheet", - )) { - const target = footprintCatalog.targets[entry.manufacturerPartNumber]; - const pinout = pinoutCatalog[entry.family]; - assert.equal(target?.status, "source-ready", entry.family); - assert.equal(pinout?.status, "ok", entry.family); - const coordinatePinAssignment = target.coordinateGrid - ? { - mode: "physical-alias" as const, - rowOrder: target.coordinateGrid.rowOrder, - columnOrder: target.coordinateGrid.columnOrder, - } - : target.coordinatePinAssignment; - const generatedPins = buildTiGeneratedPins({ - pins: mergeTiSupplementalPins( - pinout.pins ?? [], - target.supplementalPins, - ), - expectedPinCount: entry.pinCount, - explicitPhysicalMap: target.physicalPadToPortHint, - ignoredPhysicalPins: target.ignoredPhysicalPins, - coordinatePinAssignment, - }); - const footprintPropSource = target.coordinateGrid - ? renderCoordinateGridFootprintProp({ - pins: generatedPins, - grid: target.coordinateGrid, - }) - : target.footprintPropSource; - assert.ok(footprintPropSource, `${entry.family} has footprint source`); - assertFootprintDestinations({ - pins: generatedPins, - footprintPropSource, - physicalPadToPortHint: target.physicalPadToPortHint, - label: `${entry.family}:${target.drawingId}`, - }); - const audited = auditedSupplementalDestinations.get( - entry.manufacturerPartNumber, - ); - if (audited) { - auditedSupplementalCount += 1; - assert.ok( - target.supplementalPins?.some( - (supplemental) => supplemental.number === audited.physical, - ), - `${entry.family} preserves supplemental physical ${audited.physical}`, - ); - assert.ok( - Object.values(target.physicalPadToPortHint ?? {}).includes( - audited.pinKey, - ), - `${entry.family} maps copper to ${audited.pinKey}`, - ); - assert.ok( - generatedPins.some( - (generated) => generated.pinKey === audited.pinKey, - ), - `${entry.family} generates ${audited.pinKey}`, - ); - } - } - assert.equal(auditedSupplementalCount, 14); - }); - - test("maps BGA coordinates through donor aliases rather than row-major order", () => { - const donorPinLabels = extractDonorPinLabels(` - const pinLabels = { - pin1: ["D2"], - pin2: ["D1"], - pin3: ["C1"], - pin7: ["A1"], - } as const - `); - const generated = buildTiGeneratedPins({ - pins: [ - pin("D1", "GND", "GND"), - pin("D2", "ON", "Input"), - pin("C1", "VOUT", "Output"), - pin("A1", "VOUT", "Output"), - ], - expectedPinCount: 4, - donorPinLabels, - }); - - assert.deepEqual( - generated.map(({ pinKey, physical }) => [pinKey, physical]), - [ - ["pin1", "D2"], - ["pin2", "D1"], - ["pin3", "C1"], - ["pin7", "A1"], - ], - ); - assert.deepEqual( - generated.find(({ pinKey }) => pinKey === "pin7")?.labels, - ["VOUT", "A1", "VOUT_A1"], - ); - }); - - test("maps an official coordinate footprint through physical aliases without a donor", () => { - const pins = [ - pin("D2", "ON", "Input"), - pin("A1", "VOUT", "Output"), - pin("D1", "GND", "Ground"), - pin("C1", "VDD", "Power"), - ]; - const assignment = { - mode: "physical-alias" as const, - rowOrder: ["A", "C", "D"], - }; - - assert.deepEqual( - buildCoordinatePhysicalMap({ - pins, - expectedPinCount: 4, - assignment, - }), - { A1: "pin1", C1: "pin2", D1: "pin3", D2: "pin4" }, - ); - assert.deepEqual( - buildTiGeneratedPins({ - pins, - expectedPinCount: 4, - coordinatePinAssignment: assignment, - }).map(({ pinKey, physical, labels }) => ({ - pinKey, - physical, - labels, - })), - [ - { pinKey: "pin1", physical: "A1", labels: ["VOUT", "A1"] }, - { pinKey: "pin2", physical: "C1", labels: ["VDD", "C1"] }, - { pinKey: "pin3", physical: "D1", labels: ["GND", "D1"] }, - { pinKey: "pin4", physical: "D2", labels: ["ON", "D2"] }, - ], - ); - }); - - test("renders compact grid footprints with physical aliases and custom axes", () => { - const pins = buildTiGeneratedPins({ - pins: [pin("A1", "IN", "Input"), pin("K22", "OUT", "Output")], - expectedPinCount: 2, - coordinatePinAssignment: { - mode: "physical-alias", - rowOrder: ["A", "K"], - columnOrder: [1, 22], - }, - }); - const source = renderCoordinateGridFootprintProp({ - pins, - grid: { - rowOrder: ["A", "K"], - columnOrder: [1, 22], - rowAxis: "x", - rowPitchMm: 0.742, - columnPositionsMm: { "1": -6.307, "22": 6.307 }, - padShape: "rect", - padWidthMm: 0.6, - padHeightMm: 0.6, - }, - }); - - assert.match( - source, - /portHints=\{\["A1"\]\} pcbX="-0.371mm" pcbY="-6.307mm"/, - ); - assert.match( - source, - /portHints=\{\["K22"\]\} pcbX="0.371mm" pcbY="6.307mm"/, - ); - assert.match(source, /width="0.6mm" height="0.6mm" shape="rect"/); - - const bgaPins = buildTiGeneratedPins({ - pins: [pin("A1", "IN", "Input"), pin("P14", "OUT", "Output")], - expectedPinCount: 2, - coordinatePinAssignment: { - mode: "physical-alias", - rowOrder: [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - ], - columnOrder: Array.from({ length: 14 }, (_, index) => index + 1), - }, - }); - const bgaSource = renderCoordinateGridFootprintProp({ - pins: bgaPins, - grid: { - rowOrder: [ - "A", - "B", - "C", - "D", - "E", - "F", - "G", - "H", - "J", - "K", - "L", - "M", - "N", - "P", - ], - columnOrder: Array.from({ length: 14 }, (_, index) => index + 1), - pitchMm: 0.65, - padShape: "circle", - padDiameterMm: 0.35, - }, - }); - assert.match(bgaSource, /pcbX="-4.225mm" pcbY="4.225mm"/); - assert.match(bgaSource, /pcbX="4.225mm" pcbY="-4.225mm"/); - assert.match(bgaSource, /radius="0.175mm" shape="circle"/); - }); - - test("fills omitted numeric positions as no-connect and keeps numbered pads direct", () => { - const generated = buildTiGeneratedPins({ - pins: [pin("1", "VDD", "Power"), pin("3", "OUT", "Output")], - expectedPinCount: 3, - }); - assert.deepEqual( - generated.map(({ pinKey, labels, role, attributes }) => ({ - pinKey, - labels, - role, - attributes, - })), - [ - { - pinKey: "pin1", - labels: ["VDD", "1"], - role: "power", - attributes: { requiresPower: true }, - }, - { - pinKey: "pin2", - labels: ["NC", "2"], - role: "no-connect", - attributes: { doNotConnect: true }, - }, - { - pinKey: "pin3", - labels: ["OUT", "3"], - role: "output", - attributes: undefined, - }, - ], - ); - }); - - test("uses a compact primary display function for multiplexed pins", () => { - const [generated] = buildTiGeneratedPins({ - pins: [pin("1", "P1.0/TA0.1/DMAE0", "I/O")], - expectedPinCount: 1, - }); - - assert.deepEqual(generated.labels, ["P1_0", "TA0_1", "DMAE0", "1"]); - }); - - test("uses explicit copper mappings for special pads and permits a numbered EP", () => { - const generated = buildTiGeneratedPins({ - pins: [ - pin("1", "IN", "Input"), - pin("2", "GND", "Ground"), - pin("Thermal Pad", "GND", "Ground"), - pin("17", "EP", "Ground"), - ], - expectedPinCount: 16, - explicitPhysicalMap: { "Thermal Pad": "pin18" }, - }); - assert.equal( - generated.find(({ physical }) => physical === "Thermal Pad")?.pinKey, - "pin18", - ); - assert.equal( - generated.find(({ physical }) => physical === "17")?.pinKey, - "pin17", - ); - }); - - test("merges multiple physical contacts that intentionally share one copper port", () => { - const generated = buildTiGeneratedPins({ - pins: [ - pin("1", "GND", "Ground"), - pin("2", "OUT", "Output"), - pin("Tab", "OUT", "Output"), - pin("3", "IN", "Input"), - ], - expectedPinCount: 3, - explicitPhysicalMap: { Tab: "pin2" }, - }); - - assert.equal(generated.length, 3); - assert.deepEqual( - generated.find(({ pinKey }) => pinKey === "pin2"), - { - pinKey: "pin2", - physical: "2, Tab", - name: "OUT", - labels: ["OUT", "2", "OUT_2", "TAB", "OUT_TAB"], - role: "output", - attributes: undefined, - }, - ); - }); - - test("ignores target-specific pin-table artifacts before filling numeric NCs", () => { - const generated = buildTiGeneratedPins({ - pins: [ - pin("1", "IN", "Input"), - pin("2", "GND", "Ground"), - pin("3", "EN", "Input"), - pin("4", "NC", "No connect"), - pin("5", "OUT", "Output"), - pin("Thermal pad", "Thermal pad", "Thermal pad"), - ], - expectedPinCount: 5, - ignoredPhysicalPins: ["Thermal pad"], - }); - - assert.deepEqual( - generated.map(({ pinKey }) => pinKey), - ["pin1", "pin2", "pin3", "pin4", "pin5"], - ); - }); - - test("derives schematic roles from official type, name, and description", () => { - assert.equal(deriveTiPinRole(pin("1", "VDD", "Power")), "power"); - assert.equal( - deriveTiPinRole(pin("2", "SDA", "Input/output")), - "bidirectional", - ); - assert.equal(deriveTiPinRole(pin("3", "RESET", "Input")), "control"); - assert.equal( - deriveTiPinRole(pin("4", "NC", "", "Do not connect")), - "no-connect", - ); - assert.equal(deriveTiPinRole(pin("5", "A0", "I")), "input"); - assert.equal(deriveTiPinRole(pin("6", "Y", "O")), "output"); - assert.equal(deriveTiPinRole(pin("7", "SUP", "P")), "power"); - assert.equal( - deriveTiPinRole(pin("8", "P1.0/TA0.1/VREF-", "I/O")), - "bidirectional", - ); - assert.equal( - deriveTiPinRole( - pin("9", "OUT", "O", "Output capacitor returns to ground"), - ), - "output", - ); - assert.equal( - deriveTiPinRole(pin("10", "VREG", "O", "Regulator output")), - "output", - ); - assert.equal( - deriveTiPinRole(pin("11", "IN", "I", "Input supply pin")), - "power", - ); - assert.equal( - deriveTiPinRole( - pin("Pad", "QFN Pad", "", "TI recommends connection to VSS"), - ), - "ground", - ); - assert.equal(deriveTiPinRole(pin("12", "Y", "", "Output")), "output"); - assert.equal(deriveTiPinRole(pin("13", "A", "", "Input")), "input"); - assert.equal( - deriveTiPinRole( - pin( - "14", - "THERMAL_PAD", - "Thermal", - "Used only for thermal dissipation; not electrical grounding", - ), - ), - "thermal", - ); - assert.equal( - deriveTiPinRole( - pin( - "15", - "THERMAL_PAD", - "", - "Thermal pad. Connect to a solid ground plane.", - ), - ), - "ground", - ); - assert.equal( - deriveTiPinRole( - pin("16", "THERMAL_PAD", "", "Can be grounded or left floating."), - ), - "thermal", - ); - assert.equal( - deriveTiPinRole(pin("17", "PAD", "", "No electrical role specified")), - "thermal", - ); - assert.equal( - deriveTiPinRole(pin("18", "GATE", "", "MOSFET gate")), - "control", - ); - assert.deepEqual( - buildTiGeneratedPins({ - pins: [pin("1", "THERMAL_PAD", "", "No electrical connection")], - expectedPinCount: 1, - })[0], - { - pinKey: "pin1", - physical: "1", - name: "THERMAL_PAD", - labels: ["THERMAL_PAD", "1"], - role: "thermal", - attributes: undefined, - }, - ); - }); - - test("fails loudly when selected or inline footprint hints target absent ports", () => { - const generatedPins = buildTiGeneratedPins({ - pins: [pin("1", "IN", "Input"), pin("2", "OUT", "Output")], - expectedPinCount: 2, - }); - assert.throws( - () => - assertFootprintDestinations({ - pins: generatedPins, - footprintPropSource: - 'footprint={}', - physicalPadToPortHint: { Pad: "pin4" }, - label: "missing-destinations", - }), - /physicalPadToPortHint\["Pad"\] -> pin4.*inline portHints -> pin3/, - ); - }); - - test("accepts footprint hints that target a generated physical alias", () => { - const generatedPins = buildTiGeneratedPins({ - pins: [pin("A1", "IN", "Input")], - expectedPinCount: 1, - coordinatePinAssignment: { - mode: "physical-alias", - rowOrder: ["A"], - }, - }); - assert.doesNotThrow(() => - assertFootprintDestinations({ - pins: generatedPins, - footprintPropSource: - 'footprint={}', - }), - ); - }); - - test("renders named and default exports with standard schematic layout", () => { - const entry: TiDatasheetCatalogEntry = { - family: "TEST", - source: "ti-datasheet", - componentExportName: "TESTD", - manufacturerPartNumber: "TESTD", - pinCount: 2, - packageDrawing: "D0002A", - }; - const source = renderTiDatasheetComponent({ - entry, - pins: buildTiGeneratedPins({ - pins: [pin("1", "IN", "Input"), pin("2", "OUT", "Output")], - expectedPinCount: 2, - }), - footprintPropSource: 'footprint="soic2"', - footprintProvenance: "TI drawing D0002A; donor TEST2 (JLCPCB C1)", - }); - assert.match(source, /export const TESTD/); - assert.match(source, /export default TESTD/); - assert.match(source, /getTiSchematicLayout\(pinLabels, \{ pinRoles \}\)/); - assert.match(source, /Footprint provenance: TI drawing D0002A/); - assert.doesNotMatch(source, /schPinSpacing/); - }); -}); diff --git a/scripts/materialize-ti-datasheet-components.ts b/scripts/materialize-ti-datasheet-components.ts deleted file mode 100644 index c99ac643..00000000 --- a/scripts/materialize-ti-datasheet-components.ts +++ /dev/null @@ -1,1350 +0,0 @@ -import { relative, resolve } from "node:path"; -import ts from "typescript"; - -export type TiDatasheetCatalogEntry = { - family: string; - source: "existing" | "jlcpcb" | "ti-datasheet"; - componentExportName: string; - manufacturerPartNumber: string; - packageCode?: string; - pinCount: number; - packageDrawing?: string; -}; - -export type TiOfficialPin = { - number: string; - name: string; - type: string; - description: string; -}; - -type TiPinoutOk = { - family: string; - catalogSource: "ti-datasheet"; - manufacturerPartNumber: string; - expectedPinCount: number; - status: "ok"; - pins: TiOfficialPin[]; -}; - -type TiPinoutUnavailable = { - family: string; - catalogSource: "ti-datasheet"; - manufacturerPartNumber: string; - expectedPinCount: number; - status: "unavailable"; - reason: string; - message: string; -}; - -type TiPinoutRecord = TiPinoutOk | TiPinoutUnavailable; - -export type CommittedFootprintTarget = { - family: string; - componentExportName: string; - manufacturerPartNumber: string; - packageDrawing?: string; - status: "source-ready" | "unavailable"; - drawingId?: string; - footprintPropSource?: string; - physicalPadToPortHint?: Record; - ignoredPhysicalPins?: string[]; - /** Official contacts omitted by the cached function table (usually exposed pads). */ - supplementalPins?: TiOfficialPin[]; - coordinatePinAssignment?: CoordinatePinAssignment; - coordinateGrid?: CoordinateGridFootprint; - footprintSource?: "exact-jlc-drawing" | "official-ti-drawing"; - provenanceComment?: string; - reason?: string; -}; - -export type CommittedFootprintCatalog = { - schemaVersion: 1; - targetCount: 111; - coverage: { - targetEntries: number; - sourceReadyEntries: number; - unavailableEntries: number; - }; - targets: Record; -}; - -export type TiGeneratedPinRole = - | "power" - | "ground" - | "input" - | "control" - | "bidirectional" - | "output" - | "thermal" - | "unknown" - | "no-connect"; - -export type TiGeneratedPin = { - pinKey: string; - physical: string; - name: string; - labels: string[]; - role: TiGeneratedPinRole; - attributes?: { - requiresPower?: true; - requiresGround?: true; - doNotConnect?: true; - }; -}; - -export type CoordinatePinAssignment = { - mode: "physical-alias"; - /** Explicit physical row order; JEDEC coordinate lettering is not alphabetic. */ - rowOrder: string[]; - /** Defaults to ascending numeric columns when omitted. */ - columnOrder?: number[]; -}; - -export type CoordinateGridFootprint = { - /** The letter component of coordinates in JEDEC order. */ - rowOrder: string[]; - /** The numeric component of coordinates in physical order. */ - columnOrder: number[]; - /** Normal BGAs use `y`; optical packages may put letters on x. */ - rowAxis?: "x" | "y"; - /** Shared pitch for axes that do not have a more specific pitch. */ - pitchMm?: number; - rowPitchMm?: number; - columnPitchMm?: number; - /** Optional exact positions along the row axis, keyed by row letter. */ - rowPositionsMm?: Record; - /** Optional exact positions along the column axis, keyed by column number. */ - columnPositionsMm?: Record; - padShape: "circle" | "rect"; - padDiameterMm?: number; - padWidthMm?: number; - padHeightMm?: number; -}; - -type ResolvedFootprint = { - drawingId: string; - footprintPropSource?: string; - physicalPadToPortHint: Record; - ignoredPhysicalPins: string[]; - supplementalPins: TiOfficialPin[]; - coordinatePinAssignment?: CoordinatePinAssignment; - coordinateGrid?: CoordinateGridFootprint; - source: "exact-jlc-drawing" | "official-ti-drawing"; - provenanceComment: string; -}; - -export type MaterializationBlocker = { - family: string; - manufacturerPartNumber: string; - componentExportName: string; - codes: string[]; - details: string[]; -}; - -const normalizeWhitespace = (value: string) => - value.replace(/\s+/g, " ").trim(); - -const normalizeAlias = (value: string) => - normalizeWhitespace(value) - .toUpperCase() - .replace(/[^A-Z0-9]+/g, "_") - .replace(/^_+|_+$/g, ""); - -const normalizePhysical = (value: string) => normalizeAlias(value); - -const getNormalizedPinFunctions = (name: string) => { - const functions = name - .split(/\s*\/\s*/) - .map(normalizeAlias) - .filter(Boolean); - return [...new Set(functions.length > 0 ? functions : ["NC"])]; -}; - -const getTsxSyntaxErrors = (source: string, fileName: string) => - ( - ts.transpileModule(source, { - fileName, - reportDiagnostics: true, - compilerOptions: { - jsx: ts.JsxEmit.ReactJSX, - module: ts.ModuleKind.ESNext, - target: ts.ScriptTarget.ES2020, - }, - }).diagnostics ?? [] - ).filter((diagnostic) => diagnostic.category === ts.DiagnosticCategory.Error); - -const isNumericPhysical = (value: string) => /^\d+$/.test(value.trim()); - -const isCoordinatePhysical = (value: string) => - /^[A-Z]{1,3}\d{1,3}$/i.test(value.trim()); - -const isNoConnect = (value: string) => - /(?:^|_)(?:NC|DNC|DNU|N_C|NO_CONNECT|NOT_CONNECTED|RESERVED|RSVD|DO_NOT_CONNECT)(?:$|_)/.test( - value, - ); - -const isGround = (value: string) => - /(?:^|_)(?:GND|AGND|DGND|PGND|SGND|VSS|VSSA|VSSD|GROUND)(?:\d*|$|_)/.test( - value, - ); - -const isPower = (value: string) => - /(?:^|_)(?:POWER|POWER_SUPPLY|SUPPLY|VCC|VDD|AVCC|AVDD|DVCC|DVDD|PVCC|PVDD|IOVCC|IOVDD|VDDA|VDDD|VDDIO|VBAT|VBUS|VIN|VSUPPLY|VBIAS|VREF|VREG|VLDO|VMOTOR|VM|VPP|VEE)(?:\d*|$|_)/.test( - value, - ); - -const isControl = (value: string) => - /(?:^|_)(?:EN|ENABLE|RESET|RST|SHDN|SHUTDOWN|SLEEP|WAKE|CLK|CLOCK|SCK|SCL|CS|CE|OE|SEL|MODE|ADDR|SYNC|LATCH|TRIG|TRIGGER|PWM|ILIM|ISET|FREQ|SS|BOOT|TEST)(?:\d*|$|_)/.test( - value, - ); - -const isThermalContact = (value: string) => - /^(?:EP|EPAD|PAD|DAP|POWERPAD|PADDLE|EXPOSED|EXPOSED_PAD|THERMAL|THERMALPAD|THERMAL_PAD|QFN_PAD|VQFN_THERMAL_PAD)$/.test( - value, - ); - -export const deriveTiPinRole = (pin: TiOfficialPin): TiGeneratedPinRole => { - const name = normalizeAlias(pin.name); - const type = normalizeAlias(pin.type); - const description = normalizeAlias(pin.description); - const combined = `${name}_${type}_${description}`; - const explicitBidirectional = - /(?:INPUT_OUTPUT|INPUTOUTPUT|I_O|BIDIRECTIONAL|BI_DIRECTIONAL)/.test(type); - const explicitOutput = /(?:^|_)(?:OUTPUT|O)(?:$|_)/.test(type); - const explicitInput = /(?:^|_)(?:INPUT|I)(?:$|_)/.test(type); - const descriptionBidirectional = - /^(?:INPUT_OUTPUT|BIDIRECTIONAL|BI_DIRECTIONAL)(?:_|$)/.test(description); - const descriptionOutput = /^OUTPUT(?:_|$)/.test(description); - const descriptionInput = /^INPUT(?:_|$)/.test(description); - const bidirectionalName = - /(?:^|_)(?:SDA|SDIO|GPIO|DIO|IO|DQ|DATA)(?:\d*|$|_)/.test(name); - const outputName = - /(?:^|_)(?:OUT|OUTPUT|VOUT|IOUT|TX|TXD|SDO|DOUT|MISO|SW|LX|PHASE|GATE|DRV|LED|INT|IRQ|ALERT|FAULT|PGOOD|POWERGOOD|STAT|READY|DONE|LOCK|CLKOUT|REFOUT|Y|Q|Z)(?:\d*|$|_)/.test( - name, - ); - const inputName = /(?:^|_)(?:IN|AIN|RX|RXD|SDI|DIN)(?:\d*|$|_)/.test(name); - const descriptionIndicatesPower = - /^(?:(?:ANALOG|DIGITAL|INPUT|OUTPUT)_)?(?:POWER_)?SUPPLY(?:_|$)|^POWER(?:_|$)/.test( - description, - ); - const descriptionDisclaimsGround = - /(?:NOT|NO)_(?:AN?_)?ELECTRICAL(?:LY)?_GROUND/.test(description) || - /(?:GND|GROUND(?:ED)?|VSS).*?_OR_.*?FLOAT|FLOAT.*?_OR_.*?(?:GND|GROUND|VSS)/.test( - description, - ); - const descriptionIndicatesGround = - !descriptionDisclaimsGround && - (/^(?:(?:ANALOG|DIGITAL|POWER)_)?GROUND(?:_|$)/.test(description) || - /(?:THERMAL|EXPOSED|QFN).*?(?:CONNECT|CONNECTION).*?(?:GND|GROUND|VSS)/.test( - `${name}_${description}`, - )); - const isMosfetGate = - name === "GATE" && /(?:^|_)MOSFET(?:_|$)/.test(description); - - if (isNoConnect(combined)) return "no-connect"; - if (isGround(name) || isGround(type)) return "ground"; - if (isMosfetGate) return "control"; - if (explicitBidirectional || descriptionBidirectional) { - return "bidirectional"; - } - if (explicitOutput || descriptionOutput) return "output"; - if (isControl(name)) return "control"; - if ( - type === "P" || - isPower(type) || - isPower(name) || - descriptionIndicatesPower - ) { - return "power"; - } - if (bidirectionalName) return "bidirectional"; - if (explicitInput || descriptionInput) return "input"; - if (descriptionIndicatesGround) return "ground"; - if (isThermalContact(name)) return "thermal"; - if (outputName) return "output"; - if (inputName) return "input"; - return "unknown"; -}; - -const attributesForRole = ( - role: TiGeneratedPinRole, -): TiGeneratedPin["attributes"] => { - if (role === "power") return { requiresPower: true }; - if (role === "ground") return { requiresGround: true }; - if (role === "no-connect") return { doNotConnect: true }; - return undefined; -}; - -const getStaticStringArray = ( - expression: ts.Expression, -): string[] | undefined => { - if (ts.isStringLiteralLike(expression)) return [expression.text]; - if (!ts.isArrayLiteralExpression(expression)) return undefined; - const values: string[] = []; - for (const element of expression.elements) { - if (!ts.isStringLiteralLike(element)) return undefined; - values.push(element.text); - } - return values; -}; - -const getPropertyName = (name: ts.PropertyName, sourceFile: ts.SourceFile) => { - if (ts.isIdentifier(name) || ts.isStringLiteralLike(name)) return name.text; - return name.getText(sourceFile); -}; - -/** Extract the literal aliases from the donor component's `pinLabels` map. */ -export const extractDonorPinLabels = ( - sourceText: string, - sourcePath = "donor.circuit.tsx", -): Record => { - const sourceFile = ts.createSourceFile( - sourcePath, - sourceText, - ts.ScriptTarget.Latest, - true, - ts.ScriptKind.TSX, - ); - let labels: Record | undefined; - - const visit = (node: ts.Node) => { - if ( - ts.isVariableDeclaration(node) && - ts.isIdentifier(node.name) && - node.name.text === "pinLabels" && - node.initializer - ) { - const initializer = ts.isAsExpression(node.initializer) - ? node.initializer.expression - : node.initializer; - if (!ts.isObjectLiteralExpression(initializer)) return; - const parsed: Record = {}; - for (const property of initializer.properties) { - if (!ts.isPropertyAssignment(property)) continue; - const pinKey = getPropertyName(property.name, sourceFile); - if (!/^pin\d+$/.test(pinKey)) continue; - const values = getStaticStringArray(property.initializer); - if (values) parsed[pinKey] = values; - } - labels = parsed; - return; - } - ts.forEachChild(node, visit); - }; - visit(sourceFile); - if (!labels || Object.keys(labels).length === 0) { - throw new Error(`No literal pinLabels object found in ${sourcePath}`); - } - return labels; -}; - -const specialPhysicalAliases = (physical: string) => { - const normalized = normalizePhysical(physical); - if (/^TAB/.test(normalized)) return new Set([normalized, "TAB"]); - if (/(?:EXPOSED|THERMAL|PAD|EP)/.test(normalized)) { - return new Set([ - normalized, - "EP", - "EPAD", - "EXPOSED_PAD", - "EXPOSEDPAD", - "THERMAL_PAD", - "THERMALPAD", - "POWERPAD", - "PAD", - ]); - } - return new Set([normalized]); -}; - -const normalizeExplicitPhysicalMap = (map: Record) => - Object.fromEntries( - Object.entries(map).map(([physical, pinKey]) => [ - normalizePhysical(physical), - pinKey, - ]), - ); - -const parseCoordinatePhysical = (physical: string) => { - const match = physical - .trim() - .toUpperCase() - .match(/^([A-Z]{1,3})(\d{1,3})$/); - return match ? { row: match[1], column: Number(match[2]) } : undefined; -}; - -export const buildCoordinatePhysicalMap = ({ - pins, - expectedPinCount, - assignment, -}: { - pins: TiOfficialPin[]; - expectedPinCount: number; - assignment: CoordinatePinAssignment; -}) => { - if (assignment.mode !== "physical-alias") { - throw new Error(`Unsupported coordinate assignment mode`); - } - if (pins.length !== expectedPinCount) { - throw new Error( - `Coordinate pin table has ${pins.length} physical balls; expected ${expectedPinCount}`, - ); - } - const normalizedRows = assignment.rowOrder.map((row) => - row.trim().toUpperCase(), - ); - if ( - normalizedRows.some((row) => !/^[A-Z]{1,3}$/.test(row)) || - new Set(normalizedRows).size !== normalizedRows.length - ) { - throw new Error("Coordinate rowOrder must contain unique row names"); - } - const rowIndex = new Map(normalizedRows.map((row, index) => [row, index])); - const parsedPins = pins.map((pin) => { - const coordinate = parseCoordinatePhysical(pin.number); - if (!coordinate) { - throw new Error( - `Coordinate assignment cannot map non-coordinate physical pin ${pin.number}`, - ); - } - const row = rowIndex.get(coordinate.row); - if (row === undefined) { - throw new Error( - `Coordinate row ${coordinate.row} is absent from rowOrder`, - ); - } - return { physical: pin.number, row, column: coordinate.column }; - }); - const normalizedPhysicals = parsedPins.map(({ physical }) => - normalizePhysical(physical), - ); - if (new Set(normalizedPhysicals).size !== normalizedPhysicals.length) { - throw new Error("Coordinate pin table contains duplicate physical balls"); - } - const discoveredColumns = [ - ...new Set(parsedPins.map(({ column }) => column)), - ].sort((left, right) => left - right); - const columns = assignment.columnOrder ?? discoveredColumns; - if ( - columns.some((column) => !Number.isInteger(column) || column < 1) || - new Set(columns).size !== columns.length - ) { - throw new Error( - "Coordinate columnOrder must contain unique positive integers", - ); - } - const columnIndex = new Map(columns.map((column, index) => [column, index])); - for (const { column } of parsedPins) { - if (!columnIndex.has(column)) { - throw new Error(`Coordinate column ${column} is absent from columnOrder`); - } - } - parsedPins.sort( - (left, right) => - left.row - right.row || - (columnIndex.get(left.column) ?? -1) - - (columnIndex.get(right.column) ?? -1), - ); - return Object.fromEntries( - parsedPins.map(({ physical }, index) => [physical, `pin${index + 1}`]), - ); -}; - -const formatMillimeters = (value: number) => { - const rounded = Number(value.toFixed(6)); - return `${Object.is(rounded, -0) ? 0 : rounded}mm`; -}; - -const getExplicitAxisPositions = ( - positions: Record | undefined, -) => - positions - ? new Map( - Object.entries(positions).map(([coordinate, position]) => [ - coordinate.trim().toUpperCase(), - position, - ]), - ) - : undefined; - -/** Render exact pads from a compact official coordinate-grid description. */ -export const renderCoordinateGridFootprintProp = ({ - pins, - grid, -}: { - pins: TiGeneratedPin[]; - grid: CoordinateGridFootprint; -}) => { - const rowOrder = grid.rowOrder.map((row) => row.trim().toUpperCase()); - const columnOrder = [...grid.columnOrder]; - if ( - rowOrder.length === 0 || - rowOrder.some((row) => !/^[A-Z]{1,3}$/.test(row)) || - new Set(rowOrder).size !== rowOrder.length - ) { - throw new Error("Coordinate grid rowOrder must contain unique row names"); - } - if ( - columnOrder.length === 0 || - columnOrder.some((column) => !Number.isInteger(column) || column < 1) || - new Set(columnOrder).size !== columnOrder.length - ) { - throw new Error( - "Coordinate grid columnOrder must contain unique positive integers", - ); - } - const rowIndex = new Map(rowOrder.map((row, index) => [row, index])); - const columnIndex = new Map( - columnOrder.map((column, index) => [column, index]), - ); - const rowPositions = getExplicitAxisPositions(grid.rowPositionsMm); - const columnPositions = getExplicitAxisPositions(grid.columnPositionsMm); - const rowPitch = grid.rowPitchMm ?? grid.pitchMm; - const columnPitch = grid.columnPitchMm ?? grid.pitchMm; - if (!rowPositions && (!rowPitch || rowPitch <= 0)) { - throw new Error("Coordinate grid needs a positive row pitch or positions"); - } - if (!columnPositions && (!columnPitch || columnPitch <= 0)) { - throw new Error( - "Coordinate grid needs a positive column pitch or positions", - ); - } - if (grid.padShape === "circle") { - if (!grid.padDiameterMm || grid.padDiameterMm <= 0) { - throw new Error("Circular coordinate-grid pads need a positive diameter"); - } - } else if ( - !grid.padWidthMm || - grid.padWidthMm <= 0 || - !grid.padHeightMm || - grid.padHeightMm <= 0 - ) { - throw new Error( - "Rectangular coordinate-grid pads need positive width and height", - ); - } - - const getRowPosition = (row: string) => { - const explicit = rowPositions?.get(row); - if (rowPositions) { - if (explicit === undefined || !Number.isFinite(explicit)) { - throw new Error( - `Coordinate grid has no finite position for row ${row}`, - ); - } - return explicit; - } - const index = rowIndex.get(row); - if (index === undefined) { - throw new Error(`Coordinate grid does not contain row ${row}`); - } - const centered = index - (rowOrder.length - 1) / 2; - return (grid.rowAxis ?? "y") === "y" - ? -centered * (rowPitch ?? 0) - : centered * (rowPitch ?? 0); - }; - const getColumnPosition = (column: number) => { - const explicit = columnPositions?.get(String(column)); - if (columnPositions) { - if (explicit === undefined || !Number.isFinite(explicit)) { - throw new Error( - `Coordinate grid has no finite position for column ${column}`, - ); - } - return explicit; - } - const index = columnIndex.get(column); - if (index === undefined) { - throw new Error(`Coordinate grid does not contain column ${column}`); - } - return (index - (columnOrder.length - 1) / 2) * (columnPitch ?? 0); - }; - - const pads = pins.map((pin) => { - const coordinate = parseCoordinatePhysical(pin.physical); - if (!coordinate) { - throw new Error( - `Coordinate grid cannot place non-coordinate physical pin ${pin.physical}`, - ); - } - if (!rowIndex.has(coordinate.row)) { - throw new Error(`Coordinate grid does not contain row ${coordinate.row}`); - } - if (!columnIndex.has(coordinate.column)) { - throw new Error( - `Coordinate grid does not contain column ${coordinate.column}`, - ); - } - if (!pin.labels.includes(normalizePhysical(pin.physical))) { - throw new Error( - `Generated pin ${pin.pinKey} does not expose physical alias ${pin.physical}`, - ); - } - const rowPosition = getRowPosition(coordinate.row); - const columnPosition = getColumnPosition(coordinate.column); - const x = (grid.rowAxis ?? "y") === "y" ? columnPosition : rowPosition; - const y = (grid.rowAxis ?? "y") === "y" ? rowPosition : columnPosition; - const size = - grid.padShape === "circle" - ? `radius=${JSON.stringify(formatMillimeters((grid.padDiameterMm ?? 0) / 2))} shape="circle"` - : `width=${JSON.stringify(formatMillimeters(grid.padWidthMm ?? 0))} height=${JSON.stringify(formatMillimeters(grid.padHeightMm ?? 0))} shape="rect"`; - return ` `; - }); - return `footprint={\n${pads.join("\n")}\n }`; -}; - -export const createPhysicalToPinResolver = ({ - explicitPhysicalMap = {}, - donorPinLabels, -}: { - explicitPhysicalMap?: Record; - donorPinLabels?: Record; -}) => { - const normalizedExplicitMap = - normalizeExplicitPhysicalMap(explicitPhysicalMap); - const donorAliases = Object.entries(donorPinLabels ?? {}).map( - ([pinKey, aliases]) => ({ - pinKey, - aliases: new Set(aliases.map(normalizePhysical)), - }), - ); - - return (physical: string) => { - const trimmed = physical.trim(); - if (isNumericPhysical(trimmed)) { - const pinNumber = Number(trimmed); - if (pinNumber < 1) throw new Error(`Invalid numeric pin ${trimmed}`); - const expectedPinKey = `pin${pinNumber}`; - const explicit = normalizedExplicitMap[normalizePhysical(trimmed)]; - if (explicit && explicit !== expectedPinKey) { - throw new Error( - `Numeric pin ${trimmed} must map to ${expectedPinKey}, not ${explicit}`, - ); - } - return expectedPinKey; - } - - const physicalAliases = specialPhysicalAliases(trimmed); - const explicitMatches = [ - ...new Set( - [...physicalAliases] - .map((alias) => normalizedExplicitMap[alias]) - .filter((pinKey): pinKey is string => Boolean(pinKey)), - ), - ]; - if (explicitMatches.length === 1) { - const [explicit] = explicitMatches; - if (!/^pin\d+$/.test(explicit)) { - throw new Error( - `Physical pin ${trimmed} maps to invalid port hint ${explicit}`, - ); - } - return explicit; - } - if (explicitMatches.length > 1) { - throw new Error( - `Physical pin ${trimmed} has conflicting explicit mappings: ${explicitMatches.join(", ")}`, - ); - } - - const matches = donorAliases.filter(({ aliases }) => - [...physicalAliases].some((alias) => aliases.has(alias)), - ); - if (matches.length === 1) return matches[0].pinKey; - if (matches.length > 1) { - throw new Error( - `Physical pin ${trimmed} is ambiguous in donor pinLabels: ${matches.map(({ pinKey }) => pinKey).join(", ")}`, - ); - } - - if (isCoordinatePhysical(trimmed)) { - throw new Error( - `Physical ball ${trimmed} has no matching alias in donor pinLabels`, - ); - } - throw new Error( - `Special physical pad ${trimmed} needs an explicit or donor pinLabels mapping`, - ); - }; -}; - -const makeNcPin = (number: number): TiOfficialPin => ({ - number: String(number), - name: "NC", - type: "No connect", - description: "No pin function is listed for this package position.", -}); - -/** Add audited package contacts that TI's function table omitted. */ -export const mergeTiSupplementalPins = ( - pins: TiOfficialPin[], - supplementalPins: TiOfficialPin[] = [], -) => { - const merged = [...pins]; - const pinsByPhysical = new Map( - pins.map((pin) => [normalizePhysical(pin.number), pin]), - ); - for (const supplemental of supplementalPins) { - const physical = normalizePhysical(supplemental.number); - if (!physical) { - throw new Error("Supplemental pin has an empty physical identifier"); - } - const existing = pinsByPhysical.get(physical); - if (existing) { - if ( - normalizeAlias(existing.name) !== normalizeAlias(supplemental.name) || - deriveTiPinRole(existing) !== deriveTiPinRole(supplemental) - ) { - throw new Error( - `Supplemental physical pin ${supplemental.number} conflicts with the cached official pin`, - ); - } - continue; - } - pinsByPhysical.set(physical, supplemental); - merged.push(supplemental); - } - return merged; -}; - -export const buildTiGeneratedPins = ({ - pins, - expectedPinCount, - explicitPhysicalMap, - donorPinLabels, - ignoredPhysicalPins = [], - coordinatePinAssignment, -}: { - pins: TiOfficialPin[]; - expectedPinCount: number; - explicitPhysicalMap?: Record; - donorPinLabels?: Record; - ignoredPhysicalPins?: string[]; - coordinatePinAssignment?: CoordinatePinAssignment; -}): TiGeneratedPin[] => { - const ignoredPhysicals = new Set(ignoredPhysicalPins.map(normalizePhysical)); - const includedPins = pins.filter( - (pin) => !ignoredPhysicals.has(normalizePhysical(pin.number)), - ); - const pinByNumericPhysical = new Map( - includedPins - .filter((pin) => isNumericPhysical(pin.number)) - .map((pin) => [Number(pin.number), pin]), - ); - const completedPins = [...includedPins]; - const hasCoordinatePins = includedPins.some((pin) => - isCoordinatePhysical(pin.number), - ); - if (!hasCoordinatePins) { - for (let number = 1; number <= expectedPinCount; number += 1) { - if (!pinByNumericPhysical.has(number)) { - completedPins.push(makeNcPin(number)); - } - } - } - - const repeatedFunctionCounts = new Map(); - for (const pin of completedPins) { - const [primary = "NC"] = getNormalizedPinFunctions(pin.name); - repeatedFunctionCounts.set( - primary, - (repeatedFunctionCounts.get(primary) ?? 0) + 1, - ); - } - - if ( - coordinatePinAssignment && - Object.keys(explicitPhysicalMap ?? {}).length - ) { - throw new Error( - "coordinatePinAssignment cannot be combined with an explicit physical map", - ); - } - const coordinatePhysicalMap = coordinatePinAssignment - ? buildCoordinatePhysicalMap({ - pins: completedPins, - expectedPinCount, - assignment: coordinatePinAssignment, - }) - : undefined; - const resolvePhysical = createPhysicalToPinResolver({ - explicitPhysicalMap: coordinatePhysicalMap ?? explicitPhysicalMap, - donorPinLabels, - }); - const generatedByPinKey = new Map(); - for (const pin of completedPins) { - const pinKey = resolvePhysical(pin.number); - const [primary = "NC", ...alternateFunctions] = getNormalizedPinFunctions( - pin.name, - ); - const physicalAlias = normalizeAlias(pin.number) || pinKey.toUpperCase(); - const labels = [primary, ...alternateFunctions]; - if (physicalAlias !== primary) labels.push(physicalAlias); - if ((repeatedFunctionCounts.get(primary) ?? 0) > 1) { - labels.push(`${primary}_${physicalAlias}`); - } - const role = deriveTiPinRole(pin); - const existing = generatedByPinKey.get(pinKey); - if (!existing) { - generatedByPinKey.set(pinKey, { - pinKey, - physical: pin.number, - name: pin.name, - labels: [...new Set(labels)], - role, - attributes: attributesForRole(role), - }); - continue; - } - if ( - normalizePhysical(existing.physical) === normalizePhysical(pin.number) - ) { - throw new Error( - `Official physical pin ${pin.number} is listed more than once`, - ); - } - let mergedRole = existing.role; - if (mergedRole === "unknown") mergedRole = role; - if (role !== "unknown" && role !== mergedRole) { - throw new Error( - `Physical pins ${existing.physical} and ${pin.number} map to ${pinKey} with conflicting roles ${existing.role} and ${role}`, - ); - } - existing.physical = `${existing.physical}, ${pin.number}`; - if (normalizeAlias(existing.name) !== primary) { - existing.name = `${existing.name} / ${pin.name}`; - } - existing.labels = [...new Set([...existing.labels, ...labels])]; - existing.role = mergedRole; - existing.attributes = attributesForRole(mergedRole); - } - - return [...generatedByPinKey.values()].sort((left, right) => { - const leftNumber = Number(left.pinKey.replace(/^pin/, "")); - const rightNumber = Number(right.pinKey.replace(/^pin/, "")); - return leftNumber - rightNumber; - }); -}; - -const assertFootprintPropSource = (source: string, label: string) => { - const errors = getTsxSyntaxErrors( - `const component = `, - `${label}.tsx`, - ); - if (errors.length > 0 || !/^footprint=/.test(source.trim())) { - throw new Error(`${label} has an invalid footprint prop source`); - } -}; - -/** Extract every statically declared copper destination from inline JSX. */ -export const extractFootprintPortHints = ( - footprintPropSource: string, - label = "footprint", -) => { - assertFootprintPropSource(footprintPropSource, label); - const sourceFile = ts.createSourceFile( - `${label}.tsx`, - `const component = `, - ts.ScriptTarget.Latest, - true, - ts.ScriptKind.TSX, - ); - const portHints: string[] = []; - const visit = (node: ts.Node) => { - if ( - ts.isJsxAttribute(node) && - node.name.getText(sourceFile) === "portHints" - ) { - const initializer = node.initializer; - const values = - initializer && ts.isStringLiteralLike(initializer) - ? [initializer.text] - : initializer && - ts.isJsxExpression(initializer) && - initializer.expression - ? getStaticStringArray(initializer.expression) - : undefined; - if (!values || values.length === 0) { - throw new Error( - `${label} has a non-literal or empty portHints declaration`, - ); - } - portHints.push(...values); - } - ts.forEachChild(node, visit); - }; - visit(sourceFile); - return portHints; -}; - -/** Ensure every selected and inline footprint destination is a generated port. */ -export const assertFootprintDestinations = ({ - pins, - footprintPropSource, - physicalPadToPortHint = {}, - label = "footprint", -}: { - pins: TiGeneratedPin[]; - footprintPropSource: string; - physicalPadToPortHint?: Record; - label?: string; -}) => { - const availableDestinations = new Set( - pins.flatMap((pin) => [pin.pinKey, ...pin.labels]), - ); - const selectedDestinations = Object.entries(physicalPadToPortHint).map( - ([physical, destination]) => ({ - origin: `physicalPadToPortHint[${JSON.stringify(physical)}]`, - destination, - }), - ); - const inlineDestinations = extractFootprintPortHints( - footprintPropSource, - label, - ).map((destination) => ({ origin: "inline portHints", destination })); - const missing = [...selectedDestinations, ...inlineDestinations].filter( - ({ destination }) => !availableDestinations.has(destination), - ); - if (missing.length > 0) { - throw new Error( - `${label} targets absent generated ports: ${missing - .map(({ origin, destination }) => `${origin} -> ${destination}`) - .join(", ")}`, - ); - } -}; - -const resolveFootprint = ({ - entry, - footprintCatalog, -}: { - entry: TiDatasheetCatalogEntry; - footprintCatalog: CommittedFootprintCatalog; -}): ResolvedFootprint => { - const expectedDrawingId = entry.packageDrawing?.trim(); - if (!expectedDrawingId) { - throw new Error("Catalog entry has no exact TI packageDrawing ID"); - } - const selection = footprintCatalog.targets[entry.manufacturerPartNumber]; - if (!selection) throw new Error("Committed footprint target is missing"); - if ( - selection.family !== entry.family || - selection.componentExportName !== entry.componentExportName - ) { - throw new Error( - "Committed footprint target identifies a different component", - ); - } - if (selection.status !== "source-ready") { - throw new Error(selection.reason ?? "No source-ready exact footprint"); - } - if (selection.drawingId !== expectedDrawingId) { - throw new Error( - `Committed footprint drawing ${selection.drawingId} does not exactly match catalog drawing ${expectedDrawingId}`, - ); - } - if ( - (!selection.footprintPropSource && !selection.coordinateGrid) || - !selection.footprintSource || - !selection.provenanceComment - ) { - throw new Error("Source-ready footprint record is incomplete"); - } - if (selection.footprintPropSource) { - assertFootprintPropSource( - selection.footprintPropSource, - `${entry.family}:${expectedDrawingId}`, - ); - } - return { - drawingId: expectedDrawingId, - footprintPropSource: selection.footprintPropSource, - physicalPadToPortHint: selection.physicalPadToPortHint ?? {}, - ignoredPhysicalPins: selection.ignoredPhysicalPins ?? [], - supplementalPins: selection.supplementalPins ?? [], - coordinatePinAssignment: selection.coordinatePinAssignment, - coordinateGrid: selection.coordinateGrid, - source: selection.footprintSource, - provenanceComment: selection.provenanceComment, - }; -}; - -const renderObject = (entries: Array<[string, unknown]>, indent = " ") => - `{ -${entries - .map(([key, value]) => `${indent}${key}: ${JSON.stringify(value)},`) - .join("\n")} -}`; - -export const renderTiDatasheetComponent = ({ - entry, - pins, - footprintPropSource, - footprintProvenance, -}: { - entry: TiDatasheetCatalogEntry; - pins: TiGeneratedPin[]; - footprintPropSource: string; - footprintProvenance: string; -}) => { - const pinLabelsSource = renderObject( - pins.map((pin) => [pin.pinKey, pin.labels]), - ); - const pinRolesSource = renderObject( - pins.map((pin) => [pin.pinKey, pin.role]), - ); - const pinsWithAttributes = pins.filter((pin) => pin.attributes); - const pinAttributesSource = pinsWithAttributes.length - ? `\nconst pinAttributes = ${renderObject( - pinsWithAttributes.map((pin) => [pin.pinKey, pin.attributes]), - )} as const\n` - : ""; - const footprintLines = footprintPropSource.split("\n"); - const indentedFootprint = footprintLines - .map((line, index) => `${index === 0 ? " " : ""}${line}`) - .join("\n"); - - const source = `import type { ChipProps } from "@tscircuit/props" -import { getTiSchematicLayout } from "./get-ti-schematic-layout.ts" - -const pinLabels = ${pinLabelsSource} as const - -const pinRoles = ${pinRolesSource} as const -${pinAttributesSource} -export const ${entry.componentExportName} = ( - props: ChipProps, -) => { - // Footprint provenance: ${normalizeWhitespace(footprintProvenance)} - return ( - - ) -} - -export default ${entry.componentExportName} -`; - const syntaxErrors = getTsxSyntaxErrors( - source, - `${entry.componentExportName}.circuit.tsx`, - ); - if (syntaxErrors.length > 0) { - throw new Error( - `Generated invalid TSX for ${entry.componentExportName}: ${syntaxErrors - .map((diagnostic) => - ts.flattenDiagnosticMessageText(diagnostic.messageText, "\n"), - ) - .join("; ")}`, - ); - } - return source; -}; - -const addBlocker = ( - blockers: MaterializationBlocker[], - entry: TiDatasheetCatalogEntry, - code: string, - detail: string, -) => { - let blocker = blockers.find((candidate) => candidate.family === entry.family); - if (!blocker) { - blocker = { - family: entry.family, - manufacturerPartNumber: entry.manufacturerPartNumber, - componentExportName: entry.componentExportName, - codes: [], - details: [], - }; - blockers.push(blocker); - } - blocker.codes.push(code); - blocker.details.push(detail); -}; - -const formatGeneratedFiles = async ( - repositoryRoot: string, - generatedPaths: string[], -) => { - if (generatedPaths.length === 0) return; - const formatter = Bun.spawn( - ["bunx", "biome", "format", "--write", ...generatedPaths], - { cwd: repositoryRoot, stdout: "inherit", stderr: "inherit" }, - ); - const exitCode = await formatter.exited; - if (exitCode !== 0) throw new Error(`Biome exited with code ${exitCode}`); -}; - -export const materializeTiDatasheetComponents = async ({ - repositoryRoot, - catalogPath, - pinoutsPath, - footprintSelectionsPath, - outputDirectory, - blockerReportPath, - allowPartial = false, -}: { - repositoryRoot: string; - catalogPath: string; - pinoutsPath: string; - footprintSelectionsPath: string; - outputDirectory: string; - blockerReportPath: string; - allowPartial?: boolean; -}) => { - const catalog = (await Bun.file( - catalogPath, - ).json()) as TiDatasheetCatalogEntry[]; - const pinouts = (await Bun.file(pinoutsPath).json()) as Record< - string, - TiPinoutRecord - >; - const footprintCatalog = (await Bun.file( - footprintSelectionsPath, - ).json()) as CommittedFootprintCatalog; - const entries = catalog - .filter((entry) => entry.source === "ti-datasheet") - .sort((left, right) => left.family.localeCompare(right.family)); - if (entries.length !== 111) { - throw new Error( - `Expected 111 ti-datasheet entries; found ${entries.length}`, - ); - } - const entriesByMpn = new Map( - entries.map((entry) => [entry.manufacturerPartNumber, entry]), - ); - if (entriesByMpn.size !== entries.length) { - throw new Error( - "TI-datasheet catalog manufacturer part numbers are not unique", - ); - } - const committedTargets = Object.entries(footprintCatalog.targets); - const actualSourceReadyEntries = committedTargets.filter( - ([, target]) => target.status === "source-ready", - ).length; - const actualUnavailableEntries = committedTargets.filter( - ([, target]) => target.status === "unavailable", - ).length; - if ( - footprintCatalog.schemaVersion !== 1 || - footprintCatalog.targetCount !== 111 || - footprintCatalog.coverage.targetEntries !== 111 || - committedTargets.length !== 111 || - footprintCatalog.coverage.sourceReadyEntries !== actualSourceReadyEntries || - footprintCatalog.coverage.unavailableEntries !== actualUnavailableEntries || - actualSourceReadyEntries + actualUnavailableEntries !== 111 || - committedTargets.some(([manufacturerPartNumber, target]) => { - const entry = entriesByMpn.get(manufacturerPartNumber); - return ( - !entry || - target.manufacturerPartNumber !== manufacturerPartNumber || - target.family !== entry.family || - target.componentExportName !== entry.componentExportName || - target.packageDrawing !== entry.packageDrawing || - (target.status === "source-ready" && - target.drawingId !== entry.packageDrawing) - ); - }) - ) { - throw new Error( - "Committed footprint selection catalog must exactly cover all 111 TI-datasheet targets", - ); - } - - const blockers: MaterializationBlocker[] = []; - const ready: Array<{ - entry: TiDatasheetCatalogEntry; - source: string; - footprintSource: ResolvedFootprint["source"]; - }> = []; - for (const entry of entries) { - const pinout = pinouts[entry.family]; - let usablePinout: TiPinoutOk | undefined; - if (pinout?.status !== "ok") { - addBlocker( - blockers, - entry, - "official-pinout-unavailable", - pinout && pinout.status === "unavailable" - ? `${pinout.reason}: ${pinout.message}` - : "No cached official TI pinout record", - ); - } else if (pinout.manufacturerPartNumber !== entry.manufacturerPartNumber) { - addBlocker( - blockers, - entry, - "official-pinout-mpn-mismatch", - `Pinout is for ${pinout.manufacturerPartNumber}`, - ); - } else if ( - pinout.family !== entry.family || - pinout.expectedPinCount !== entry.pinCount - ) { - addBlocker( - blockers, - entry, - "official-pinout-catalog-mismatch", - `Pinout identifies ${pinout.family} with expectedPinCount ${pinout.expectedPinCount}`, - ); - } else if (pinout.pins.length === 0) { - addBlocker( - blockers, - entry, - "official-pinout-empty", - "Official TI pinout contains no physical pins", - ); - } else { - usablePinout = pinout; - } - - let footprint: ResolvedFootprint | undefined; - try { - footprint = resolveFootprint({ entry, footprintCatalog }); - } catch (error) { - addBlocker( - blockers, - entry, - "exact-footprint-unavailable", - error instanceof Error ? error.message : String(error), - ); - } - if (!usablePinout || !footprint) continue; - - try { - const coordinatePinAssignment = footprint.coordinateGrid - ? { - mode: "physical-alias" as const, - rowOrder: footprint.coordinateGrid.rowOrder, - columnOrder: footprint.coordinateGrid.columnOrder, - } - : footprint.coordinatePinAssignment; - const generatedPins = buildTiGeneratedPins({ - pins: mergeTiSupplementalPins( - usablePinout.pins, - footprint.supplementalPins, - ), - expectedPinCount: entry.pinCount, - explicitPhysicalMap: footprint.physicalPadToPortHint, - ignoredPhysicalPins: footprint.ignoredPhysicalPins, - coordinatePinAssignment, - }); - const footprintPropSource = footprint.coordinateGrid - ? renderCoordinateGridFootprintProp({ - pins: generatedPins, - grid: footprint.coordinateGrid, - }) - : footprint.footprintPropSource; - if (!footprintPropSource) { - throw new Error("Resolved footprint has no renderable source"); - } - assertFootprintDestinations({ - pins: generatedPins, - footprintPropSource, - physicalPadToPortHint: footprint.physicalPadToPortHint, - label: `${entry.family}:${footprint.drawingId}`, - }); - ready.push({ - entry, - source: renderTiDatasheetComponent({ - entry, - pins: generatedPins, - footprintPropSource, - footprintProvenance: footprint.provenanceComment, - }), - footprintSource: footprint.source, - }); - } catch (error) { - addBlocker( - blockers, - entry, - "pin-to-copper-mapping-failed", - error instanceof Error ? error.message : String(error), - ); - } - } - - blockers.sort((left, right) => left.family.localeCompare(right.family)); - const report = { - schemaVersion: 1, - summary: { - targetEntries: entries.length, - readyEntries: ready.length, - blockedEntries: blockers.length, - officialPinoutBlockers: blockers.filter((blocker) => - blocker.codes.some((code) => code.startsWith("official-pinout")), - ).length, - exactFootprintBlockers: blockers.filter((blocker) => - blocker.codes.includes("exact-footprint-unavailable"), - ).length, - pinMappingBlockers: blockers.filter((blocker) => - blocker.codes.includes("pin-to-copper-mapping-failed"), - ).length, - }, - ready: ready.map(({ entry, footprintSource }) => ({ - family: entry.family, - manufacturerPartNumber: entry.manufacturerPartNumber, - componentExportName: entry.componentExportName, - packageDrawing: entry.packageDrawing, - footprintSource, - })), - blockers, - }; - await Bun.write(blockerReportPath, `${JSON.stringify(report, null, 2)}\n`); - - if (blockers.length > 0 && !allowPartial) { - const codes = new Map(); - for (const blocker of blockers) { - for (const code of blocker.codes) { - codes.set(code, (codes.get(code) ?? 0) + 1); - } - } - throw new Error( - `Cannot materialize all 111 TI datasheet components: ${blockers.length} entries are blocked (${[ - ...codes, - ] - .map(([code, count]) => `${code}=${count}`) - .join(", ")}). See ${blockerReportPath}`, - ); - } - - const generatedPaths: string[] = []; - for (const { entry, source } of ready) { - const outputPath = resolve( - outputDirectory, - `${entry.componentExportName}.circuit.tsx`, - ); - await Bun.write(outputPath, source); - generatedPaths.push(relative(repositoryRoot, outputPath)); - } - await formatGeneratedFiles(repositoryRoot, generatedPaths); - - return { ...report.summary, blockerReportPath, generatedPaths }; -}; - -if (import.meta.main) { - const repositoryRoot = resolve(import.meta.dir, ".."); - const allowPartial = Bun.argv.includes("--allow-partial"); - const result = await materializeTiDatasheetComponents({ - repositoryRoot, - catalogPath: resolve( - repositoryRoot, - "lib/chips/ti-sysblocks-chip-catalog.json", - ), - pinoutsPath: resolve(repositoryRoot, "lib/chips/ti-sysblocks-pinouts.json"), - footprintSelectionsPath: resolve( - repositoryRoot, - "lib/chips/ti-sysblocks-footprint-selections.json", - ), - outputDirectory: resolve(repositoryRoot, "lib/chips"), - blockerReportPath: resolve( - repositoryRoot, - "lib/chips/ti-sysblocks-materialization-report.json", - ), - allowPartial, - }); - console.log(JSON.stringify(result, null, 2)); -} diff --git a/scripts/ti-reference-example-schema.test.ts b/scripts/ti-reference-example-schema.test.ts new file mode 100644 index 00000000..3e0da2c3 --- /dev/null +++ b/scripts/ti-reference-example-schema.test.ts @@ -0,0 +1,388 @@ +import assert from "node:assert/strict"; +import { describe, test } from "node:test"; + +import { generateTiReferenceExamples } from "./generate-ti-reference-examples.ts"; +import { + extractTiApplicationSectionLinks, + extractTiReferenceFigures, + getTiReferenceCoverage, + isGeneratedTiReferenceExample, + renderTiReferenceExample, + type TiReferenceCatalogEntry, + type TiGeneratedReferenceExample, + type TiReferenceExampleManifest, + validateTiReferenceExampleManifest, +} from "./ti-reference-example-schema.ts"; +import { validateTiReferenceExamples } from "./validate-ti-reference-examples.ts"; + +const catalog: TiReferenceCatalogEntry[] = [ + { + family: "OPA371D", + exportName: "OPA371D", + componentExportName: "OPA371DDBVR", + }, + { + family: "UNRESOLVED", + exportName: "UNRESOLVED", + componentExportName: "UNRESOLVEDD", + }, +]; + +type TestManifest = TiReferenceExampleManifest & { + examples: [TiGeneratedReferenceExample]; +}; + +const makeManifest = (): TestManifest => ({ + schemaVersion: 1, + examples: [ + { + id: "OPA371D_LowSideCurrentSense", + family: "OPA371D", + implementation: "generated", + title: "OPA371D Low-Side Current-Sense Reference", + description: "Official TI application figure rendered as a circuit.", + evidence: { + kind: "ti-datasheet-typical-application", + datasheetUrl: "https://www.ti.com/lit/gpn/OPA371D", + documentViewerRootUrl: + "https://www.ti.com/document-viewer/OPA371D/datasheet", + sectionUrl: + "https://www.ti.com/document-viewer/OPA371D/datasheet/GUID-APPLICATION", + figureUrl: "https://www.ti.com/ods/images/SLVSM48A/GUID-FIGURE-low.gif", + figure: "Figure 7-1", + figureCaption: "Low-Side, Current-Sensing Application", + pdfPage: 23, + documentRevision: "SLVSM48A", + scope: "Complete signal path and feedback network.", + }, + mainDevice: { + componentExportName: "OPA371DDBVR", + modulePath: "../lib/chips/OPA371DDBVR.tsx", + name: "U1", + position: { x: 0, y: 0 }, + schematicProjection: { + name: "U1_OPAMP", + symbolName: "opamp_with_power_right", + portMap: { + inp1: "pin3", + inp2: "pin4", + out: "pin1", + "V+": "pin5", + "V-": "pin2", + }, + }, + }, + components: [ + { + kind: "resistor", + name: "R_F", + value: "57.6k", + footprint: "0402", + position: { x: 3, y: -1 }, + rotation: 90, + connections: { + pin1: "net.VOUT", + pin2: "net.FEEDBACK", + }, + evidenceLabel: "RF 57.6 kohm", + valueStatus: "specified-by-ti", + }, + ], + traces: [ + { + from: ".U1_OPAMP > .out", + to: ".R_F > .pin1", + evidenceLabel: "VOUT feeds RF", + }, + { + from: ".U1_OPAMP > .inp2", + to: ".R_F > .pin2", + evidenceLabel: "RF feedback drives the inverting input", + schematicRouteHints: [ + { x: -1, y: -0.09 }, + { x: -1, y: -1 }, + ], + }, + { + from: ".U1_OPAMP > .pin5", + to: "net.V5", + evidenceLabel: "positive supply maps to physical pin 5", + }, + { + from: ".U1_OPAMP > .V-", + to: "net.GND", + evidenceLabel: "negative supply maps to physical pin 2", + }, + ], + }, + ], +}); + +describe("TI reference-figure discovery", () => { + test("discovers application leaves and first-party ODS figure assets", () => { + const rootUrl = "https://www.ti.com/document-viewer/TEST/datasheet"; + const links = extractTiApplicationSectionLinks( + `
    +
  1. Typical Application
  2. +
  3. Pin Functions
  4. +
`, + rootUrl, + ); + assert.deepEqual(links, [ + { + sectionUrl: + "https://www.ti.com/document-viewer/TEST/datasheet/GUID-APP", + sectionTitle: "Typical Application", + }, + ]); + + const figures = extractTiReferenceFigures( + `
+ + Figure 7-4 TEST Typical Application +
`, + links[0].sectionUrl, + rootUrl, + links[0].sectionTitle, + ); + assert.deepEqual(figures, [ + { + documentViewerRootUrl: rootUrl, + sectionUrl: links[0].sectionUrl, + sectionTitle: "Typical Application", + figureUrl: "https://www.ti.com/ods/images/TEST/GUID-FIGURE-low.gif", + figure: "Figure 7-4", + figureCaption: "Figure 7-4 TEST Typical Application", + imageTitle: "TEST Typical Application", + }, + ]); + }); + + test("ignores non-TI and non-ODS images", () => { + assert.deepEqual( + extractTiReferenceFigures( + ``, + "https://www.ti.com/document-viewer/TEST/datasheet/GUID-APP", + "https://www.ti.com/document-viewer/TEST/datasheet", + ), + [], + ); + }); +}); + +describe("TI reference-example schema and rendering", () => { + test("validates exact evidence and renders a plain .tsx import", () => { + const manifest = validateTiReferenceExampleManifest(makeManifest(), { + catalog, + }); + const example = manifest.examples[0]; + assert.ok(isGeneratedTiReferenceExample(example)); + const source = renderTiReferenceExample(example); + assert.match(source, /from "\.\.\/lib\/chips\/OPA371DDBVR\.tsx"/); + assert.doesNotMatch(source, /OPA371DDBVR\.circuit\.tsx/); + assert.match(source, /noSchematicRepresentation/); + assert.match(source, /symbolName="opamp_with_power_right"/); + assert.match(source, /"inp1": "\.U1 > \.pin3"/); + assert.match(source, /"V\+": "\.U1 > \.pin5"/); + assert.match(source, /"V-": "\.U1 > \.pin2"/); + assert.match(source, /from="\.U1_OPAMP > \.pin5"/); + assert.match(source, /from="\.U1_OPAMP > \.V-"/); + assert.match(source, /from="\.U1_OPAMP > \.inp2"/); + assert.match(source, /to="\.R_F > \.pin2"/); + assert.match(source, /schematicRouteHints=/); + assert.match(source, /resistance="57\.6k"/); + assert.match(source, /Figure 7-1/); + }); + + test("rejects a non-first-party figure asset", () => { + const manifest = makeManifest(); + manifest.examples[0].evidence.figureUrl = + "https://example.com/copied-figure.gif"; + assert.throws( + () => validateTiReferenceExampleManifest(manifest, { catalog }), + /must be an https:\/\/www\.ti\.com URL/, + ); + }); + + test("rejects chip-only examples and invented symbolic-load values", () => { + const chipOnly = makeManifest(); + chipOnly.examples[0].components = []; + assert.throws( + () => validateTiReferenceExampleManifest(chipOnly, { catalog }), + /components must not be empty/, + ); + + const invented = makeManifest() as unknown as { + examples: Array<{ components: Array> }>; + }; + invented.examples[0].components = [ + { + kind: "symbolic-load", + name: "Z_LOAD", + displayLabel: "ZLOAD", + value: "100k", + position: { x: -3, y: 1 }, + connections: { pin1: "net.VBUS", pin2: "net.VSHUNT" }, + evidenceLabel: "ZLOAD", + valueStatus: "unspecified-by-ti", + }, + ]; + assert.throws( + () => validateTiReferenceExampleManifest(invented, { catalog }), + /must not invent a value/, + ); + }); + + test("reports exact supported and unresolved catalog coverage", () => { + const coverage = getTiReferenceCoverage(makeManifest(), catalog); + assert.deepEqual(coverage, { + catalogFamilies: 2, + supportedFamilies: ["OPA371D"], + supportedCount: 1, + unresolvedFamilies: ["UNRESOLVED"], + unresolvedCount: 1, + }); + }); + + test("rejects traces that bypass a main-device schematic projection", () => { + const manifest = makeManifest(); + manifest.examples[0].traces[0].from = ".U1 > .pin1"; + assert.throws( + () => validateTiReferenceExampleManifest(manifest, { catalog }), + /must route through schematic projection U1_OPAMP/, + ); + }); +}); + +describe("TI reference-example generator", () => { + test("writes a deterministic evidence-backed circuit", async () => { + const writes = new Map(); + const results = await generateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + readText: async (path) => { + if (path === "/repo/lib/chips/OPA371DDBVR.tsx") { + return "export const OPA371DDBVR = () => null"; + } + const source = writes.get(path); + if (source === undefined) throw new Error("ENOENT"); + return source; + }, + writeText: async (path, source) => { + writes.set(path, source); + }, + formatSource: async (source) => source, + }); + assert.deepEqual(results, [ + { + family: "OPA371D", + id: "OPA371D_LowSideCurrentSense", + outputPath: "/repo/examples/OPA371D_LowSideCurrentSense.circuit.tsx", + changed: true, + }, + ]); + assert.match( + writes.get(results[0].outputPath) ?? "", + /Low-Side Current-Sense Reference/, + ); + }); + + test("fails loudly for a family without verified layout evidence", async () => { + await assert.rejects( + generateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + family: "UNRESOLVED", + }), + /refusing to generate a chip-only placeholder/, + ); + }); + + test("can enforce complete-catalog evidence", async () => { + await assert.rejects( + generateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + requireCompleteCatalog: true, + }), + /1\/2 families are verified; 1 remain unresolved/, + ); + }); +}); + +describe("TI reference-example coverage validator", () => { + const makeVirtualReader = (snapshot = "") => { + const manifest = makeManifest(); + const generatedSource = renderTiReferenceExample(manifest.examples[0]); + return async (path: string) => { + if (path === "/repo/lib/chips/OPA371DDBVR.tsx") { + return "export const OPA371DDBVR = () => null"; + } + if (path === "/repo/examples/OPA371D_LowSideCurrentSense.circuit.tsx") { + return generatedSource; + } + if ( + path === + "/repo/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg" + ) { + return snapshot; + } + throw new Error("ENOENT"); + }; + }; + + test("validates committed artifacts while explicitly allowing partial rollout", async () => { + const coverage = await validateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + allowPartial: true, + readText: makeVirtualReader(), + formatSource: async (source) => source, + listSnapshotNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg", + ], + }); + assert.equal(coverage.supportedCount, 1); + assert.deepEqual(coverage.unresolvedFamilies, ["UNRESOLVED"]); + }); + + test("requires complete catalog coverage by default", async () => { + await assert.rejects( + validateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + readText: makeVirtualReader(), + formatSource: async (source) => source, + listSnapshotNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg", + ], + }), + /coverage is incomplete: 1\/2/, + ); + }); + + test("requires exactly one schematic snapshot per manifest entry", async () => { + await assert.rejects( + validateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + allowPartial: true, + readText: makeVirtualReader(), + formatSource: async (source) => source, + listSnapshotNames: async () => [], + }), + /expected exactly one schematic snapshot/, + ); + }); +}); diff --git a/scripts/ti-reference-example-schema.ts b/scripts/ti-reference-example-schema.ts new file mode 100644 index 00000000..4040eb33 --- /dev/null +++ b/scripts/ti-reference-example-schema.ts @@ -0,0 +1,1133 @@ +import { basename } from "node:path"; + +export type TiReferencePoint = { + x: number; + y: number; +}; + +export type TiReferenceConnections = Record; + +export type TiReferenceFigureEvidence = { + kind: + | "ti-datasheet-typical-application" + | "ti-evaluation-module-schematic" + | "ti-reference-design-schematic"; + datasheetUrl: string; + documentViewerRootUrl: string; + sectionUrl: string; + figureUrl: string; + figure: string; + figureCaption: string; + pdfPage: number; + documentRevision: string; + scope: string; +}; + +export type TiReferenceMainDevice = { + componentExportName: string; + modulePath: string; + name: string; + position: TiReferencePoint; + schWidth?: number; + schHeight?: number; + showPinAliases?: boolean; + pinConnections?: TiReferenceConnections; + schematicProjection?: { + name: string; + symbolName: string; + portMap: Record; + }; + pinArrangement?: Partial< + Record<"leftSide" | "rightSide" | "topSide" | "bottomSide", string[]> + >; +}; + +export type TiReferencePassive = { + kind: "resistor" | "capacitor" | "inductor"; + name: string; + value: string; + footprint: string; + position: TiReferencePoint; + rotation?: number; + connections?: TiReferenceConnections; + evidenceLabel: string; + valueStatus: "specified-by-ti"; +}; + +export type TiReferenceSymbolicLoad = { + kind: "symbolic-load"; + name: string; + displayLabel: string; + position: TiReferencePoint; + evidenceLabel: string; + valueStatus: "unspecified-by-ti"; +}; + +export type TiReferenceNetSymbol = { + kind: "net-symbol"; + name: string; + symbolName: + | "digital_ground_down" + | "digital_ground_up" + | "ground_down" + | "rail_up" + | "rail_right" + | "testpoint_right"; + port: string; + net: string; + displayLabel?: string; + position: TiReferencePoint; + evidenceLabel: string; +}; + +export type TiReferenceComponent = + | TiReferencePassive + | TiReferenceSymbolicLoad + | TiReferenceNetSymbol; + +export type TiReferenceAnnotation = TiReferencePoint & { + text: string; + fontSize?: number; +}; + +export type TiReferenceTrace = { + from?: string; + to?: string; + path?: string[]; + evidenceLabel: string; + schematicRouteHints?: TiReferencePoint[]; +}; + +type TiReferenceExampleBase = { + id: string; + family: string; + title: string; + description: string; + evidence: TiReferenceFigureEvidence; +}; + +export type TiGeneratedReferenceExample = TiReferenceExampleBase & { + implementation: "generated"; + mainDevice: TiReferenceMainDevice; + components: TiReferenceComponent[]; + traces: TiReferenceTrace[]; + annotations?: TiReferenceAnnotation[]; +}; + +export type TiHandwrittenReferenceExample = TiReferenceExampleBase & { + implementation: "handwritten"; + sourceFile: string; + sourceSha256: string; +}; + +export type TiReferenceExample = + | TiGeneratedReferenceExample + | TiHandwrittenReferenceExample; + +export const isGeneratedTiReferenceExample = ( + example: TiReferenceExample, +): example is TiGeneratedReferenceExample => + example.implementation === "generated"; + +export type TiReferenceExampleManifest = { + schemaVersion: 1; + examples: TiReferenceExample[]; +}; + +export type TiReferenceCatalogEntry = { + family: string; + componentExportName?: string; + exportName: string; +}; + +export type TiReferenceFigureCandidate = { + documentViewerRootUrl: string; + sectionUrl: string; + sectionTitle: string; + figureUrl: string; + figure: string; + figureCaption: string; + imageTitle: string; +}; + +const SIDE_NAMES = ["leftSide", "rightSide", "topSide", "bottomSide"] as const; + +const assertRecord: ( + value: unknown, + location: string, +) => asserts value is Record = (value, location) => { + if (!value || typeof value !== "object" || Array.isArray(value)) { + throw new Error(`${location} must be an object`); + } +}; + +const assertNonEmptyString: ( + value: unknown, + location: string, +) => asserts value is string = (value, location) => { + if (typeof value !== "string" || value.trim() === "") { + throw new Error(`${location} must be a non-empty string`); + } +}; + +const assertPoint = (value: unknown, location: string): void => { + assertRecord(value, location); + for (const axis of ["x", "y"] as const) { + if (typeof value[axis] !== "number" || !Number.isFinite(value[axis])) { + throw new Error(`${location}.${axis} must be a finite number`); + } + } +}; + +const assertTiUrl = ( + value: unknown, + location: string, + expectedPathPrefix: string, +): void => { + assertNonEmptyString(value, location); + const url = new URL(value); + if (url.protocol !== "https:" || url.hostname !== "www.ti.com") { + throw new Error(`${location} must be an https://www.ti.com URL`); + } + if (!url.pathname.startsWith(expectedPathPrefix)) { + throw new Error(`${location} must start with ${expectedPathPrefix}`); + } +}; + +const assertConnections = (value: unknown, location: string): void => { + assertRecord(value, location); + const entries = Object.entries(value); + if (entries.length === 0) { + throw new Error(`${location} must not be empty`); + } + for (const [pin, net] of entries) { + assertNonEmptyString(pin, `${location} pin`); + assertNonEmptyString(net, `${location}.${pin}`); + if (!/^net\.[A-Za-z_][A-Za-z0-9_]*$/.test(net)) { + throw new Error(`${location}.${pin} must be a net.NAME selector`); + } + } +}; + +const validateEvidence = ( + value: unknown, + location: string, +): TiReferenceFigureEvidence => { + assertRecord(value, location); + if ( + value.kind !== "ti-datasheet-typical-application" && + value.kind !== "ti-evaluation-module-schematic" && + value.kind !== "ti-reference-design-schematic" + ) { + throw new Error(`${location}.kind is not a supported TI evidence kind`); + } + assertTiUrl(value.datasheetUrl, `${location}.datasheetUrl`, "/lit/"); + assertTiUrl( + value.documentViewerRootUrl, + `${location}.documentViewerRootUrl`, + "/document-viewer/", + ); + assertTiUrl(value.sectionUrl, `${location}.sectionUrl`, "/document-viewer/"); + assertTiUrl(value.figureUrl, `${location}.figureUrl`, "/ods/images/"); + assertNonEmptyString(value.figure, `${location}.figure`); + if (!/^Figure\s+\d+(?:[-.]\d+)+$/i.test(value.figure)) { + throw new Error(`${location}.figure must be an exact TI figure locator`); + } + assertNonEmptyString(value.figureCaption, `${location}.figureCaption`); + assertNonEmptyString(value.documentRevision, `${location}.documentRevision`); + assertNonEmptyString(value.scope, `${location}.scope`); + if (!Number.isInteger(value.pdfPage) || (value.pdfPage as number) < 1) { + throw new Error(`${location}.pdfPage must be a positive integer`); + } + return value as TiReferenceFigureEvidence; +}; + +const validateMainDevice = ( + value: unknown, + location: string, + family: string, + catalogByFamily?: ReadonlyMap, +): TiReferenceMainDevice => { + assertRecord(value, location); + assertNonEmptyString( + value.componentExportName, + `${location}.componentExportName`, + ); + assertNonEmptyString(value.modulePath, `${location}.modulePath`); + assertNonEmptyString(value.name, `${location}.name`); + if ( + !/^\.\.\/lib\/chips\/[A-Za-z_$][A-Za-z0-9_$]*\.tsx$/.test(value.modulePath) + ) { + throw new Error( + `${location}.modulePath must reference a plain ../lib/chips/*.tsx module`, + ); + } + if (basename(value.modulePath, ".tsx") !== value.componentExportName) { + throw new Error( + `${location}.modulePath basename must match componentExportName`, + ); + } + assertPoint(value.position, `${location}.position`); + if (value.pinConnections !== undefined) { + assertConnections(value.pinConnections, `${location}.pinConnections`); + for (const pin of Object.keys( + value.pinConnections as Record, + )) { + if (!/^pin\d+$/.test(pin)) { + throw new Error( + `${location}.pinConnections.${pin} must use a physical pinN selector`, + ); + } + } + } + for (const size of ["schWidth", "schHeight"] as const) { + if ( + value[size] !== undefined && + (typeof value[size] !== "number" || (value[size] as number) <= 0) + ) { + throw new Error(`${location}.${size} must be a positive number`); + } + } + if (value.pinArrangement !== undefined) { + assertRecord(value.pinArrangement, `${location}.pinArrangement`); + const arrangedPins = new Set(); + for (const side of SIDE_NAMES) { + const pins = value.pinArrangement[side]; + if (pins === undefined) continue; + if (!Array.isArray(pins) || pins.length === 0) { + throw new Error(`${location}.pinArrangement.${side} must be non-empty`); + } + for (const pin of pins) { + if (typeof pin !== "string" || !/^pin\d+$/.test(pin)) { + throw new Error( + `${location}.pinArrangement.${side} contains an invalid physical pin`, + ); + } + if (arrangedPins.has(pin)) { + throw new Error(`${location}.pinArrangement repeats ${pin}`); + } + arrangedPins.add(pin); + } + } + } + if (value.schematicProjection !== undefined) { + assertRecord(value.schematicProjection, `${location}.schematicProjection`); + assertNonEmptyString( + value.schematicProjection.name, + `${location}.schematicProjection.name`, + ); + assertNonEmptyString( + value.schematicProjection.symbolName, + `${location}.schematicProjection.symbolName`, + ); + assertRecord( + value.schematicProjection.portMap, + `${location}.schematicProjection.portMap`, + ); + const portMapEntries = Object.entries(value.schematicProjection.portMap); + if (portMapEntries.length === 0) { + throw new Error( + `${location}.schematicProjection.portMap must not be empty`, + ); + } + const mappedPhysicalPins = new Set(); + if (value.schematicProjection.symbolName === "opamp_with_power_right") { + const requiredPorts = ["inp1", "inp2", "out", "V+", "V-"]; + const actualPorts = new Set( + portMapEntries.map(([symbolPort]) => symbolPort), + ); + for (const requiredPort of requiredPorts) { + if (!actualPorts.has(requiredPort)) { + throw new Error( + `${location}.schematicProjection.portMap is missing ${requiredPort} for opamp_with_power_right`, + ); + } + } + } + for (const [symbolPort, physicalPin] of portMapEntries) { + assertNonEmptyString( + symbolPort, + `${location}.schematicProjection.portMap port`, + ); + if (typeof physicalPin !== "string" || !/^pin\d+$/.test(physicalPin)) { + throw new Error( + `${location}.schematicProjection.portMap.${symbolPort} must map to a physical pinN selector`, + ); + } + if (mappedPhysicalPins.has(physicalPin)) { + throw new Error( + `${location}.schematicProjection.portMap repeats ${physicalPin}`, + ); + } + mappedPhysicalPins.add(physicalPin); + } + if (value.pinConnections !== undefined) { + for (const physicalPin of Object.keys( + value.pinConnections as Record, + )) { + if (!mappedPhysicalPins.has(physicalPin)) { + throw new Error( + `${location}.schematicProjection.portMap is missing connected ${physicalPin}`, + ); + } + } + } + if (value.pinArrangement !== undefined) { + throw new Error( + `${location} cannot combine a schematicProjection with a box pinArrangement`, + ); + } + } + const catalogEntry = catalogByFamily?.get(family); + if (catalogEntry) { + const expectedName = + catalogEntry.componentExportName ?? catalogEntry.exportName; + if (value.componentExportName !== expectedName) { + throw new Error( + `${location}.componentExportName does not match catalog family ${family}: expected ${expectedName}`, + ); + } + } + return value as TiReferenceMainDevice; +}; + +const validateComponent = ( + value: unknown, + location: string, +): TiReferenceComponent => { + assertRecord(value, location); + assertNonEmptyString(value.kind, `${location}.kind`); + assertNonEmptyString(value.name, `${location}.name`); + assertPoint(value.position, `${location}.position`); + if (value.connections !== undefined) { + assertConnections(value.connections, `${location}.connections`); + } + assertNonEmptyString(value.evidenceLabel, `${location}.evidenceLabel`); + if (value.kind === "net-symbol") { + if ( + value.symbolName !== "digital_ground_down" && + value.symbolName !== "digital_ground_up" && + value.symbolName !== "ground_down" && + value.symbolName !== "rail_up" && + value.symbolName !== "rail_right" && + value.symbolName !== "testpoint_right" + ) { + throw new Error(`${location}.symbolName is not an approved net symbol`); + } + assertNonEmptyString(value.port, `${location}.port`); + if (!/^\d+$/.test(value.port)) { + throw new Error(`${location}.port must be a numeric symbol port`); + } + assertNonEmptyString(value.net, `${location}.net`); + if (!/^net\.[A-Za-z_][A-Za-z0-9_]*$/.test(value.net)) { + throw new Error(`${location}.net must be a net.NAME selector`); + } + if ( + value.displayLabel !== undefined && + typeof value.displayLabel !== "string" + ) { + throw new Error(`${location}.displayLabel must be a string`); + } + return value as TiReferenceNetSymbol; + } + if (value.kind === "symbolic-load") { + assertNonEmptyString(value.displayLabel, `${location}.displayLabel`); + if (value.valueStatus !== "unspecified-by-ti") { + throw new Error( + `${location}.valueStatus must be unspecified-by-ti for a symbolic load`, + ); + } + if ("value" in value) { + throw new Error( + `${location} must not invent a value for a symbolic load`, + ); + } + return value as TiReferenceSymbolicLoad; + } + if ( + value.kind !== "resistor" && + value.kind !== "capacitor" && + value.kind !== "inductor" + ) { + throw new Error(`${location}.kind is not supported`); + } + assertNonEmptyString(value.value, `${location}.value`); + assertNonEmptyString(value.footprint, `${location}.footprint`); + if (value.valueStatus !== "specified-by-ti") { + throw new Error( + `${location}.valueStatus must be specified-by-ti for a passive`, + ); + } + if ( + value.rotation !== undefined && + (typeof value.rotation !== "number" || !Number.isFinite(value.rotation)) + ) { + throw new Error(`${location}.rotation must be a finite number`); + } + return value as TiReferencePassive; +}; + +export const validateTiReferenceExampleManifest = ( + value: unknown, + options: { + catalog?: readonly TiReferenceCatalogEntry[]; + } = {}, +): TiReferenceExampleManifest => { + assertRecord(value, "manifest"); + if (value.schemaVersion !== 1) { + throw new Error("manifest.schemaVersion must be 1"); + } + if (!Array.isArray(value.examples) || value.examples.length === 0) { + throw new Error( + "manifest.examples must contain at least one evidence-backed example", + ); + } + const catalogByFamily = options.catalog + ? new Map(options.catalog.map((entry) => [entry.family, entry])) + : undefined; + const ids = new Set(); + const families = new Set(); + for (const [index, rawExample] of value.examples.entries()) { + const location = `manifest.examples[${index}]`; + assertRecord(rawExample, location); + assertNonEmptyString(rawExample.id, `${location}.id`); + if (!/^[A-Za-z0-9_]+$/.test(rawExample.id)) { + throw new Error(`${location}.id must be filename-safe`); + } + if (ids.has(rawExample.id)) + throw new Error(`duplicate example id ${rawExample.id}`); + ids.add(rawExample.id); + assertNonEmptyString(rawExample.family, `${location}.family`); + if (families.has(rawExample.family)) { + throw new Error(`duplicate family ${rawExample.family}`); + } + families.add(rawExample.family); + if (catalogByFamily && !catalogByFamily.has(rawExample.family)) { + throw new Error(`${location}.family is not present in the TI catalog`); + } + assertNonEmptyString(rawExample.title, `${location}.title`); + assertNonEmptyString(rawExample.description, `${location}.description`); + validateEvidence(rawExample.evidence, `${location}.evidence`); + if (rawExample.implementation === "handwritten") { + assertNonEmptyString(rawExample.sourceFile, `${location}.sourceFile`); + if (rawExample.sourceFile !== `${rawExample.id}.circuit.tsx`) { + throw new Error( + `${location}.sourceFile must be ${rawExample.id}.circuit.tsx`, + ); + } + assertNonEmptyString(rawExample.sourceSha256, `${location}.sourceSha256`); + if (!/^[a-f0-9]{64}$/.test(rawExample.sourceSha256)) { + throw new Error(`${location}.sourceSha256 must be a lowercase SHA-256`); + } + for (const generatedField of [ + "mainDevice", + "components", + "traces", + "annotations", + ]) { + if (rawExample[generatedField] !== undefined) { + throw new Error( + `${location}.${generatedField} is not allowed for a handwritten example`, + ); + } + } + continue; + } + if (rawExample.implementation !== "generated") { + throw new Error( + `${location}.implementation must be generated or handwritten`, + ); + } + if ( + rawExample.sourceFile !== undefined || + rawExample.sourceSha256 !== undefined + ) { + throw new Error( + `${location} generated examples cannot declare handwritten source metadata`, + ); + } + const mainDevice = validateMainDevice( + rawExample.mainDevice, + `${location}.mainDevice`, + rawExample.family, + catalogByFamily, + ); + if ( + !Array.isArray(rawExample.components) || + rawExample.components.length === 0 + ) { + throw new Error(`${location}.components must not be empty`); + } + const componentNames = new Set(); + let passiveCount = 0; + for (const [componentIndex, component] of rawExample.components.entries()) { + const parsed = validateComponent( + component, + `${location}.components[${componentIndex}]`, + ); + if (componentNames.has(parsed.name)) { + throw new Error(`${location} repeats component name ${parsed.name}`); + } + componentNames.add(parsed.name); + if ( + parsed.kind === "resistor" || + parsed.kind === "capacitor" || + parsed.kind === "inductor" + ) { + passiveCount += 1; + } + } + if (passiveCount === 0) { + throw new Error( + `${location} must include at least one TI-specified passive; chip-only examples are forbidden`, + ); + } + if (rawExample.annotations !== undefined) { + if (!Array.isArray(rawExample.annotations)) { + throw new Error(`${location}.annotations must be an array`); + } + for (const [ + annotationIndex, + annotation, + ] of rawExample.annotations.entries()) { + const annotationLocation = `${location}.annotations[${annotationIndex}]`; + assertPoint(annotation, annotationLocation); + assertRecord(annotation, annotationLocation); + assertNonEmptyString(annotation.text, `${annotationLocation}.text`); + } + } + if (!Array.isArray(rawExample.traces) || rawExample.traces.length === 0) { + throw new Error( + `${location}.traces must encode the TI figure connectivity`, + ); + } + const validComponentNames = new Set([ + mainDevice.name, + ...(rawExample.components as TiReferenceComponent[]).map( + (component) => component.name, + ), + ]); + const projection = mainDevice.schematicProjection; + if (projection) validComponentNames.add(projection.name); + let projectionTraceCount = 0; + for (const [traceIndex, trace] of rawExample.traces.entries()) { + const traceLocation = `${location}.traces[${traceIndex}]`; + assertRecord(trace, traceLocation); + assertNonEmptyString( + trace.evidenceLabel, + `${traceLocation}.evidenceLabel`, + ); + const hasPair = trace.from !== undefined || trace.to !== undefined; + const hasPath = trace.path !== undefined; + if (hasPair === hasPath) { + throw new Error( + `${traceLocation} must provide either from/to or a multi-point path`, + ); + } + let endpoints: Array<[string, string]>; + if (hasPath) { + if (!Array.isArray(trace.path) || trace.path.length < 2) { + throw new Error( + `${traceLocation}.path must contain at least two endpoints`, + ); + } + endpoints = trace.path.map((endpoint, endpointIndex) => { + assertNonEmptyString( + endpoint, + `${traceLocation}.path[${endpointIndex}]`, + ); + return [`path[${endpointIndex}]`, endpoint]; + }); + } else { + assertNonEmptyString(trace.from, `${traceLocation}.from`); + assertNonEmptyString(trace.to, `${traceLocation}.to`); + endpoints = [ + ["from", trace.from], + ["to", trace.to], + ]; + } + for (const [endpointName, endpoint] of endpoints) { + if (/^net\.[A-Za-z_][A-Za-z0-9_]*$/.test(endpoint)) continue; + const selectorMatch = endpoint.match( + /^\.([A-Za-z_$][A-Za-z0-9_$]*)\s*>\s*\.([A-Za-z0-9_+\-]+)$/, + ); + if (!selectorMatch) { + throw new Error( + `${traceLocation}.${endpointName} must be net.NAME or .COMPONENT > .port`, + ); + } + if (!validComponentNames.has(selectorMatch[1])) { + throw new Error( + `${traceLocation}.${endpointName} references unknown component ${selectorMatch[1]}`, + ); + } + if (projection && selectorMatch[1] === projection.name) { + projectionTraceCount += 1; + } + if (projection && selectorMatch[1] === mainDevice.name) { + throw new Error( + `${traceLocation}.${endpointName} must route through schematic projection ${projection.name}`, + ); + } + } + if (trace.schematicRouteHints !== undefined) { + if ( + !Array.isArray(trace.schematicRouteHints) || + trace.schematicRouteHints.length === 0 + ) { + throw new Error( + `${traceLocation}.schematicRouteHints must be a non-empty array`, + ); + } + for (const [hintIndex, hint] of trace.schematicRouteHints.entries()) { + assertPoint( + hint, + `${traceLocation}.schematicRouteHints[${hintIndex}]`, + ); + } + } + } + if (projection && projectionTraceCount === 0) { + throw new Error( + `${location}.traces must route through schematic projection ${projection.name}`, + ); + } + } + return value as TiReferenceExampleManifest; +}; + +const decodeHtml = (value: string): string => + value + .replace(/&#x([0-9a-f]+);/gi, (_, hex: string) => + String.fromCodePoint(Number.parseInt(hex, 16)), + ) + .replace(/&#(\d+);/g, (_, decimal: string) => + String.fromCodePoint(Number.parseInt(decimal, 10)), + ) + .replace(/"/g, '"') + .replace(/'|'/g, "'") + .replace(/&/g, "&") + .replace(/</g, "<") + .replace(/>/g, ">"); + +const stripHtml = (value: string): string => + decodeHtml(value.replace(/<[^>]*>/g, " ")) + .replace(/\s+/g, " ") + .trim(); + +const parseAttributes = (tag: string): Record => { + const attributes: Record = {}; + const expression = /([:\w-]+)\s*=\s*(["'])([\s\S]*?)\2/g; + for (const match of tag.matchAll(expression)) { + attributes[match[1].toLowerCase()] = decodeHtml(match[3]); + } + return attributes; +}; + +const normalizeTiUrl = (href: string, baseUrl: string): string => { + const normalized = href.startsWith("//") ? `https:${href}` : href; + const url = new URL(normalized, baseUrl); + url.hash = ""; + return url.toString(); +}; + +export const extractTiApplicationSectionLinks = ( + rootHtml: string, + rootUrl: string, +): Array<{ sectionUrl: string; sectionTitle: string }> => { + const links = new Map(); + for (const match of rootHtml.matchAll(/]*>[\s\S]*?<\/a>/gi)) { + const attributes = parseAttributes(match[0]); + const href = attributes.href; + if (!href) continue; + const title = + attributes["data-navtitle"] || + attributes["data-sectiontitle"] || + stripHtml(match[0]); + const chapter = attributes["data-chaptertitle"] ?? ""; + if ( + !/application|reference schematic|reference design/i.test( + `${chapter} ${title}`, + ) + ) { + continue; + } + const sectionUrl = normalizeTiUrl(href, rootUrl); + if (new URL(sectionUrl).hostname !== "www.ti.com") continue; + links.set(sectionUrl, title); + } + return [...links] + .map(([sectionUrl, sectionTitle]) => ({ sectionUrl, sectionTitle })) + .sort((left, right) => left.sectionUrl.localeCompare(right.sectionUrl)); +}; + +export const extractTiReferenceFigures = ( + sectionHtml: string, + sectionUrl: string, + documentViewerRootUrl: string, + sectionTitle = "Application and Implementation", +): TiReferenceFigureCandidate[] => { + const candidates: TiReferenceFigureCandidate[] = []; + const imageMatches = [...sectionHtml.matchAll(/]*>/gi)]; + for (const [index, imageMatch] of imageMatches.entries()) { + const attributes = parseAttributes(imageMatch[0]); + if (!attributes.src) continue; + const figureUrl = normalizeTiUrl(attributes.src, sectionUrl); + const url = new URL(figureUrl); + if ( + url.hostname !== "www.ti.com" || + !url.pathname.startsWith("/ods/images/") + ) { + continue; + } + const imageEnd = (imageMatch.index ?? 0) + imageMatch[0].length; + const nextImageStart = imageMatches[index + 1]?.index ?? sectionHtml.length; + const followingHtml = sectionHtml.slice( + imageEnd, + Math.min(nextImageStart, imageEnd + 2400), + ); + const captionMatch = followingHtml.match( + /]*class=["'][^"']*caption[^"']*["'][^>]*>([\s\S]*?)<\/span>\s*<\/div>/i, + ); + const figureCaption = captionMatch + ? stripHtml(captionMatch[1]) + : stripHtml(attributes.title || attributes.alt || ""); + const figure = figureCaption.match(/Figure\s+\d+(?:[-.]\d+)+/i)?.[0] ?? ""; + candidates.push({ + documentViewerRootUrl, + sectionUrl, + sectionTitle, + figureUrl, + figure, + figureCaption, + imageTitle: stripHtml(attributes.title || attributes.alt || ""), + }); + } + return candidates; +}; + +export const discoverTiReferenceFigures = async ( + documentViewerRootUrl: string, + options: { fetch?: typeof fetch } = {}, +): Promise => { + assertTiUrl( + documentViewerRootUrl, + "documentViewerRootUrl", + "/document-viewer/", + ); + const fetchImplementation = options.fetch ?? fetch; + const requestInit = { + headers: { + Accept: "text/html,application/xhtml+xml", + "User-Agent": + "Mozilla/5.0 (compatible; tscircuit-ti-reference-evidence/1.0)", + }, + } as const; + const readTiHtml = async ( + url: string, + allowFailure = false, + ): Promise => { + const response = await fetchImplementation(url, requestInit); + if (response.ok) return await response.text(); + // TI sometimes rejects Bun's TLS fingerprint while serving the exact same + // first-party page to curl. Keep injectable fetches deterministic in tests, + // and use curl only as a local CLI fallback for that specific response. + if (!options.fetch && response.status === 403) { + const process = Bun.spawn( + ["curl", "-L", "--fail", "--silent", "--show-error", url], + { stdout: "pipe", stderr: "pipe" }, + ); + const [exitCode, stdout, stderr] = await Promise.all([ + process.exited, + new Response(process.stdout).text(), + new Response(process.stderr).text(), + ]); + if (exitCode === 0) return stdout; + if (!allowFailure) { + throw new Error(`curl failed for ${url}: ${stderr.trim()}`); + } + return undefined; + } + if (allowFailure) return undefined; + throw new Error( + `TI document-viewer returned HTTP ${response.status}: ${url}`, + ); + }; + const rootHtml = await readTiHtml(documentViewerRootUrl); + if (!rootHtml) { + throw new Error( + `TI document-viewer root was empty: ${documentViewerRootUrl}`, + ); + } + const links = extractTiApplicationSectionLinks( + rootHtml, + documentViewerRootUrl, + ); + if (links.length === 0) { + throw new Error( + `No Application and Implementation links found: ${documentViewerRootUrl}`, + ); + } + const candidates: TiReferenceFigureCandidate[] = []; + for (const link of links) { + const sectionHtml = await readTiHtml(link.sectionUrl, true); + if (!sectionHtml) continue; + candidates.push( + ...extractTiReferenceFigures( + sectionHtml, + link.sectionUrl, + documentViewerRootUrl, + link.sectionTitle, + ), + ); + } + const unique = new Map(); + for (const candidate of candidates) + unique.set(candidate.figureUrl, candidate); + return [...unique.values()].sort((left, right) => + left.figureUrl.localeCompare(right.figureUrl), + ); +}; + +const json = (value: string): string => JSON.stringify(value); + +const renderConnections = ( + connections: TiReferenceConnections, + indentation: string, +): string => { + const lines = Object.entries(connections).map( + ([pin, net]) => `${indentation} ${json(pin)}: ${json(net)},`, + ); + return `{{\n${lines.join("\n")}\n${indentation}}}`; +}; + +const renderPinArrangement = ( + arrangement: NonNullable, +): string => { + const sides = SIDE_NAMES.flatMap((side) => { + const pins = arrangement[side]; + if (!pins) return []; + const direction = + side === "leftSide" || side === "rightSide" + ? "top-to-bottom" + : "left-to-right"; + return [ + ` ${side}: { direction: ${json(direction)}, pins: ${JSON.stringify(pins)} },`, + ]; + }); + return `{{\n${sides.join("\n")}\n }}`; +}; + +const renderPinStyle = ( + arrangement: NonNullable, +): string | undefined => { + const styles: string[] = []; + for (const side of SIDE_NAMES) { + const pins = arrangement[side] ?? []; + for (const pin of pins.slice(1)) { + styles.push(` ${json(pin)}: { marginTop: 0.2 },`); + } + } + if (styles.length === 0) return undefined; + return `{{\n${styles.join("\n")}\n }}`; +}; + +const renderMainDevice = (device: TiReferenceMainDevice): string => { + if (device.schematicProjection) { + const physicalConnections = Object.entries( + device.schematicProjection.portMap, + ).map( + ([symbolPort, physicalPin]) => + ` ${json(symbolPort)}: ${json(`.${device.name} > .${physicalPin}`)},`, + ); + return ` <${device.componentExportName} + name=${json(device.name)} + noSchematicRepresentation + /> + + `; + } + const lines = [ + ` <${device.componentExportName}`, + ` name=${json(device.name)}`, + ` schX={${device.position.x}}`, + ` schY={${device.position.y}}`, + ]; + if (device.schWidth !== undefined) + lines.push(` schWidth={${device.schWidth}}`); + if (device.schHeight !== undefined) + lines.push(` schHeight={${device.schHeight}}`); + if (device.showPinAliases !== undefined) { + lines.push(` showPinAliases={${device.showPinAliases}}`); + } + if (device.pinArrangement) { + lines.push( + ` schPinArrangement=${renderPinArrangement(device.pinArrangement)}`, + ); + const pinStyle = renderPinStyle(device.pinArrangement); + if (pinStyle) lines.push(` schPinStyle=${pinStyle}`); + } + if (device.pinConnections) { + lines.push( + ` connections=${renderConnections(device.pinConnections, " ")}`, + ); + } + lines.push(" />"); + return lines.join("\n"); +}; + +const renderComponent = (component: TiReferenceComponent): string => { + if (component.kind === "net-symbol") { + return ` {/* ${component.evidenceLabel} */} + `; + } + if (component.kind === "symbolic-load") { + return ` {/* ${component.evidenceLabel}; TI does not specify an impedance value. */} + `; + } + const valueProp = + component.kind === "resistor" + ? "resistance" + : component.kind === "capacitor" + ? "capacitance" + : "inductance"; + const rotation = + component.rotation === undefined + ? "" + : `\n schRotation=${json(`${component.rotation}deg`)}`; + const connections = component.connections + ? `\n connections=${renderConnections(component.connections, " ")}` + : ""; + return ` <${component.kind} + name=${json(component.name)} + ${valueProp}=${json(component.value)} + footprint=${json(component.footprint)} + schX={${component.position.x}} + schY={${component.position.y}}${rotation}${connections} + />`; +}; + +const renderSharedNets = (example: TiGeneratedReferenceExample): string[] => { + const netSymbols = example.components.filter( + (component): component is TiReferenceNetSymbol => + component.kind === "net-symbol", + ); + const symbolsByNet = new Map(); + for (const symbol of netSymbols) { + const symbols = symbolsByNet.get(symbol.net) ?? []; + symbols.push(symbol); + symbolsByNet.set(symbol.net, symbols); + } + return [...symbolsByNet.entries()].flatMap(([netSelector, symbols]) => { + if (symbols.length < 2) return []; + const netName = netSelector.slice("net.".length); + const connections = symbols.map( + (symbol) => `${symbol.name}.pin${symbol.port}`, + ); + const role = /^GND|AGND|DGND|PGND|VSS/i.test(netName) ? " isGroundNet" : ""; + return [ + ` `, + ]; + }); +}; + +export const renderTiReferenceExample = ( + example: TiGeneratedReferenceExample, +): string => { + const sourceLines = [ + `TI source: ${example.evidence.datasheetUrl}`, + `Document viewer: ${example.evidence.sectionUrl}`, + `${example.evidence.figure}: ${example.evidence.figureCaption}`, + `Figure asset: ${example.evidence.figureUrl}`, + `Scope: ${example.evidence.scope}`, + ]; + const annotations = (example.annotations ?? []).map( + (annotation) => ` `, + ); + const sharedNets = renderSharedNets(example); + return `// Generated by scripts/generate-ti-reference-examples.ts. +// Do not edit by hand; update examples/ti-reference-examples.json. +import { ${example.mainDevice.componentExportName} } from ${json(example.mainDevice.modulePath)}; +import "tscircuit"; + +/** + * ${example.title} + * +${sourceLines.map((line) => ` * ${line}`).join("\n")} + */ +export default () => ( + +${renderMainDevice(example.mainDevice)} +${sharedNets.length > 0 ? `\n\n${sharedNets.join("\n")}` : ""} + +${example.components.map(renderComponent).join("\n\n")} + +${example.traces + .map((trace) => { + const endpoints = trace.path + ? `path={${JSON.stringify(trace.path)}}` + : `from=${json(trace.from as string)}\n to=${json(trace.to as string)}`; + return ` {/* ${trace.evidenceLabel} */} + `; + }) + .join("\n\n")} +${annotations.length > 0 ? `\n\n${annotations.join("\n\n")}` : ""} + +); +`; +}; + +export const getTiReferenceCoverage = ( + manifest: TiReferenceExampleManifest, + catalog: readonly TiReferenceCatalogEntry[], +) => { + const supportedFamilies = manifest.examples + .map((example) => example.family) + .sort((left, right) => left.localeCompare(right)); + const supported = new Set(supportedFamilies); + const unresolvedFamilies = catalog + .map((entry) => entry.family) + .filter((family) => !supported.has(family)) + .sort((left, right) => left.localeCompare(right)); + return { + catalogFamilies: catalog.length, + supportedFamilies, + supportedCount: supportedFamilies.length, + unresolvedFamilies, + unresolvedCount: unresolvedFamilies.length, + }; +}; diff --git a/scripts/validate-ti-reference-examples.ts b/scripts/validate-ti-reference-examples.ts new file mode 100644 index 00000000..7beb3ff0 --- /dev/null +++ b/scripts/validate-ti-reference-examples.ts @@ -0,0 +1,175 @@ +import { createHash } from "node:crypto"; +import { readdir } from "node:fs/promises"; +import { dirname, join, resolve } from "node:path"; +import { fileURLToPath } from "node:url"; + +import { generateTiReferenceExamples } from "./generate-ti-reference-examples.ts"; +import { + getTiReferenceCoverage, + isGeneratedTiReferenceExample, + type TiReferenceCatalogEntry, + type TiReferenceExampleManifest, + validateTiReferenceExampleManifest, +} from "./ti-reference-example-schema.ts"; + +const repositoryRoot = join(dirname(fileURLToPath(import.meta.url)), ".."); +const defaultManifestPath = join( + repositoryRoot, + "examples/ti-reference-examples.json", +); +const defaultCatalogPath = join( + repositoryRoot, + "lib/chips/ti-sysblocks-chip-catalog.json", +); + +export type ValidateTiReferenceExamplesOptions = { + repoRoot: string; + manifest: TiReferenceExampleManifest; + catalog: readonly TiReferenceCatalogEntry[]; + allowPartial?: boolean; + verifyEvidence?: boolean; + readText?: (path: string) => Promise; + listSnapshotNames?: (directory: string) => Promise; + formatSource?: (source: string, outputPath: string) => Promise; +}; + +export const validateTiReferenceExamples = async ( + options: ValidateTiReferenceExamplesOptions, +) => { + const manifest = validateTiReferenceExampleManifest(options.manifest, { + catalog: options.catalog, + }); + const readText = + options.readText ?? (async (path) => await Bun.file(path).text()); + const listSnapshotNames = options.listSnapshotNames ?? readdir; + + await generateTiReferenceExamples({ + repoRoot: options.repoRoot, + manifest, + catalog: options.catalog, + check: true, + verifyEvidence: options.verifyEvidence, + readText, + formatSource: options.formatSource, + }); + + for (const example of manifest.examples) { + if (isGeneratedTiReferenceExample(example)) continue; + const sourcePath = join(options.repoRoot, "examples", example.sourceFile); + let source: string; + try { + source = await readText(sourcePath); + } catch { + throw new Error( + `${example.family}: handwritten source is unreadable: ${sourcePath}`, + ); + } + const sourceSha256 = createHash("sha256").update(source).digest("hex"); + if (sourceSha256 !== example.sourceSha256) { + throw new Error( + `${example.family}: handwritten source is stale; expected SHA-256 ${example.sourceSha256}, received ${sourceSha256}`, + ); + } + } + + const snapshotsDirectory = join(options.repoRoot, "examples/__snapshots__"); + const snapshotNames = await listSnapshotNames(snapshotsDirectory); + for (const example of manifest.examples) { + const expectedSnapshotName = `${example.id}.circuit-schematic.snap.svg`; + const matchingSnapshots = snapshotNames.filter( + (name) => + name.startsWith(`${example.id}.circuit-`) && name.endsWith(".snap.svg"), + ); + if ( + matchingSnapshots.length !== 1 || + matchingSnapshots[0] !== expectedSnapshotName + ) { + throw new Error( + `${example.family}: expected exactly one schematic snapshot ${expectedSnapshotName}; found ${matchingSnapshots.join(", ") || "none"}`, + ); + } + const snapshotPath = join(snapshotsDirectory, expectedSnapshotName); + let snapshot: string; + try { + snapshot = await readText(snapshotPath); + } catch { + throw new Error( + `${example.family}: snapshot is unreadable: ${snapshotPath}`, + ); + } + if (!snapshot.includes(" 0) { + throw new Error( + `TI reference-example coverage is incomplete: ${coverage.supportedCount}/${coverage.catalogFamilies} catalog families have a committed evidence-backed example and snapshot; ${coverage.unresolvedCount} are missing. Re-run with --allow-partial only for staged development.`, + ); + } + return coverage; +}; + +type CliOptions = { + allowPartial: boolean; + verifyEvidence: boolean; + manifestPath: string; + catalogPath: string; +}; + +const parseCliOptions = (arguments_: string[]): CliOptions => { + const options: CliOptions = { + allowPartial: false, + verifyEvidence: false, + manifestPath: defaultManifestPath, + catalogPath: defaultCatalogPath, + }; + for (let index = 0; index < arguments_.length; index += 1) { + const argument = arguments_[index]; + if (argument === "--allow-partial") options.allowPartial = true; + else if (argument === "--verify-evidence") options.verifyEvidence = true; + else if (argument === "--manifest") { + options.manifestPath = resolve(arguments_[index + 1]); + index += 1; + } else if (argument === "--catalog") { + options.catalogPath = resolve(arguments_[index + 1]); + index += 1; + } else { + throw new Error(`Unknown argument: ${argument}`); + } + } + return options; +}; + +const isMain = + process.argv[1] !== undefined && + resolve(process.argv[1]) === fileURLToPath(import.meta.url); + +if (isMain) { + const cliOptions = parseCliOptions(process.argv.slice(2)); + const rawManifest: unknown = await Bun.file(cliOptions.manifestPath).json(); + const catalog: unknown = await Bun.file(cliOptions.catalogPath).json(); + if (!Array.isArray(catalog)) { + throw new Error(`${cliOptions.catalogPath} must contain a catalog array`); + } + const manifest = validateTiReferenceExampleManifest(rawManifest, { + catalog: catalog as TiReferenceCatalogEntry[], + }); + const coverage = await validateTiReferenceExamples({ + repoRoot: repositoryRoot, + manifest, + catalog: catalog as TiReferenceCatalogEntry[], + allowPartial: cliOptions.allowPartial, + verifyEvidence: cliOptions.verifyEvidence, + }); + console.log( + `Validated ${coverage.supportedCount}/${coverage.catalogFamilies} TI catalog families; ${coverage.unresolvedCount} missing.`, + ); + if (coverage.unresolvedCount > 0) { + console.log(`Committed: ${coverage.supportedFamilies.join(", ")}`); + console.log(`Missing: ${coverage.unresolvedFamilies.join(", ")}`); + } +} diff --git a/scripts/validate-ti-sysblocks-catalog.ts b/scripts/validate-ti-sysblocks-catalog.ts index 0f3807e4..d10bd789 100644 --- a/scripts/validate-ti-sysblocks-catalog.ts +++ b/scripts/validate-ti-sysblocks-catalog.ts @@ -20,14 +20,6 @@ const catalogPath = join(chipDirectory, "ti-sysblocks-chip-catalog.json"); const generatedExportsPath = join(chipDirectory, "ti-sysblocks-components.tsx"); const chipIndexPath = join(chipDirectory, "index.tsx"); const rootIndexPath = join(repositoryRoot, "index.ts"); -const footprintSelectionsPath = join( - chipDirectory, - "ti-sysblocks-footprint-selections.json", -); -const materializationReportPath = join( - chipDirectory, - "ti-sysblocks-materialization-report.json", -); const pinoutCachePath = join(chipDirectory, "ti-sysblocks-pinouts.json"); const catalog = (await Bun.file(catalogPath).json()) as CatalogEntry[]; @@ -74,85 +66,6 @@ assert( `expected 111 TI-datasheet families, found ${sourceCounts["ti-datasheet"] ?? 0}`, ); -const footprintSelections = (await Bun.file( - footprintSelectionsPath, -).json()) as { - targetCount: number; - coverage: { - targetEntries: number; - sourceReadyEntries: number; - unavailableEntries: number; - }; - targets: Record< - string, - { - status: "source-ready" | "unavailable"; - drawingId?: string; - footprintSource?: "exact-jlc-drawing" | "official-ti-drawing"; - provenanceComment?: string; - } - >; -}; -assert( - footprintSelections.targetCount === 111, - "footprint catalog targetCount is not 111", -); -assert( - footprintSelections.coverage.targetEntries === 111 && - Object.keys(footprintSelections.targets).length === 111, - "footprint catalog does not cover all 111 TI-datasheet targets", -); -assert( - footprintSelections.coverage.sourceReadyEntries === 111 && - footprintSelections.coverage.unavailableEntries === 0 && - Object.values(footprintSelections.targets).every( - (target) => target.status === "source-ready", - ), - "one or more TI-datasheet footprints are unavailable", -); -const footprintSourceCounts = Object.values(footprintSelections.targets).reduce< - Record ->((counts, target) => { - const source = target.footprintSource ?? "missing"; - counts[source] = (counts[source] ?? 0) + 1; - return counts; -}, {}); -assert( - footprintSourceCounts["exact-jlc-drawing"] === 67 && - footprintSourceCounts["official-ti-drawing"] === 44, - `unexpected TI-datasheet footprint sources: ${JSON.stringify(footprintSourceCounts)}`, -); -for (const target of Object.values(footprintSelections.targets)) { - assert( - Boolean( - target.drawingId && target.provenanceComment?.includes(target.drawingId), - ), - `footprint ${target.drawingId ?? "unknown"}: missing exact-drawing provenance`, - ); - if (target.footprintSource === "exact-jlc-drawing") { - assert( - /JLCPCB C\d+/.test(target.provenanceComment ?? ""), - `footprint ${target.drawingId}: missing JLCPCB donor number`, - ); - } -} - -const materializationReport = (await Bun.file( - materializationReportPath, -).json()) as { - summary: { - targetEntries: number; - readyEntries: number; - blockedEntries: number; - }; -}; -assert( - materializationReport.summary.targetEntries === 111 && - materializationReport.summary.readyEntries === 111 && - materializationReport.summary.blockedEntries === 0, - "TI-datasheet materialization report contains blockers", -); - const pinoutCache = (await Bun.file(pinoutCachePath).json()) as Record< string, { @@ -209,7 +122,7 @@ for (const entry of catalog) { ); const componentName = entry.componentExportName ?? entry.exportName; - const componentPath = join(chipDirectory, `${componentName}.circuit.tsx`); + const componentPath = join(chipDirectory, `${componentName}.tsx`); assert( await Bun.file(componentPath).exists(), `${entry.family}: missing ${componentPath}`, diff --git a/tscircuit.config.ts b/tscircuit.config.ts index 20923857..4d5c63ee 100644 --- a/tscircuit.config.ts +++ b/tscircuit.config.ts @@ -1,13 +1,36 @@ +import type { SpiceEngine } from "@tscircuit/props"; import createEncryptedPspiceNgspiceEngine, { createCdnNgspiceSpiceEngine, } from "./lib/spice/create-encrypted-pspice-ngspice-engine.ts"; +const isCi = + typeof process !== "undefined" && + process.env.CI !== undefined && + process.env.CI !== "false"; + +const disabledInCiSpiceEngine: SpiceEngine = { + async simulate() { + return { + engineVersionString: "disabled-in-ci", + simulationResultCircuitJson: [], + }; + }, +}; + +const spiceEngineMap = isCi + ? { + spicey: disabledInCiSpiceEngine, + ngspice: disabledInCiSpiceEngine, + "encrypted-pspice-ngspice": disabledInCiSpiceEngine, + } + : { + ngspice: createCdnNgspiceSpiceEngine(), + "encrypted-pspice-ngspice": createEncryptedPspiceNgspiceEngine(), + }; + export default { mainEntrypoint: "index.ts", platformConfig: { - spiceEngineMap: { - ngspice: createCdnNgspiceSpiceEngine(), - "encrypted-pspice-ngspice": createEncryptedPspiceNgspiceEngine(), - }, + spiceEngineMap, }, }; From 3ae9b0b06d39e0c6decde2040a09e557914c6991 Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 17:42:56 -0700 Subject: [PATCH 6/8] Add curated TI reference block library --- .github/workflows/reference-schematics.yml | 31 + README.md | 35 +- .../ADS1015L_DualSupplyMonitor.circuit.tsx | 251 ++++++++ .../ADS7042_DirectSensorInterface.circuit.tsx | 158 +++++ .../BQ25185_TypicalBatteryCharger.circuit.tsx | 469 +++++++++++++++ ...C2340R5MODA_TypicalApplication.circuit.tsx | 247 ++++++++ .../DRV8833_ParallelMotorDriver.circuit.tsx | 471 +++++++++++++++ examples/INA138_BasicCurrentSense.circuit.tsx | 125 ++++ ...A181_BidirectionalCurrentSense.circuit.tsx | 303 ++++++++++ .../LM358B_InvertingAmplifier.circuit.tsx | 4 +- .../LMC555_MonostableLedFlasher.circuit.tsx | 197 +++++++ examples/LMK1C1104_ClockFanout.circuit.tsx | 152 +++++ .../LMT70_AnalogTemperatureToAdc.circuit.tsx | 110 ++++ .../MSPM0C1103_AdcInputNetwork.circuit.tsx | 194 ++++++ ...PA320_SecondOrderLowPassFilter.circuit.tsx | 269 +++++++++ examples/OPA333_ThermistorBridge.circuit.tsx | 255 ++++++++ .../OPA371D_LowSideCurrentSense.circuit.tsx | 4 +- ...VD3082E_MultipointRS485Network.circuit.tsx | 171 ++++++ .../SN74AHC1G14_SwitchDebouncer.circuit.tsx | 116 ++++ ...74AUP1G17_TurnOnPulseGenerator.circuit.tsx | 96 +++ examples/TCAN1044A_5VCanInterface.circuit.tsx | 181 ++++++ .../TLV755P_TypicalApplication.circuit.tsx | 220 +++++++ ...MP102_TwoWireTemperatureSensor.circuit.tsx | 187 ++++++ ...9_LoadSwitchTypicalApplication.circuit.tsx | 175 ++++++ examples/TPS61165_WhiteLedDriver.circuit.tsx | 364 ++++++++++++ .../TPS61299_5VBoostConverter.circuit.tsx | 249 ++++++++ .../TPS62A01_1V8BuckConverter.circuit.tsx | 356 +++++++++++ .../TPS7A20_TypicalApplication.circuit.tsx | 4 +- examples/TPS92612_LinearLedDriver.circuit.tsx | 283 +++++++++ ...S3232E_TypicalOperatingCircuit.circuit.tsx | 111 ++++ ...alSupplyMonitor.circuit-schematic.snap.svg | 12 + ...SensorInterface.circuit-schematic.snap.svg | 12 + ...lBatteryCharger.circuit-schematic.snap.svg | 12 + ...icalApplication.circuit-schematic.snap.svg | 61 ++ ...llelMotorDriver.circuit-schematic.snap.svg | 12 + ...sicCurrentSense.circuit-schematic.snap.svg | 12 + ...nalCurrentSense.circuit-schematic.snap.svg | 12 + ...tableLedFlasher.circuit-schematic.snap.svg | 12 + ...104_ClockFanout.circuit-schematic.snap.svg | 12 + ...emperatureToAdc.circuit-schematic.snap.svg | 12 + ...AdcInputNetwork.circuit-schematic.snap.svg | 12 + ...erLowPassFilter.circuit-schematic.snap.svg | 12 + ...hermistorBridge.circuit-schematic.snap.svg | 12 + ...intRS485Network.circuit-schematic.snap.svg | 12 + ...SwitchDebouncer.circuit-schematic.snap.svg | 12 + ...nPulseGenerator.circuit-schematic.snap.svg | 12 + ..._5VCanInterface.circuit-schematic.snap.svg | 103 ++++ ...icalApplication.circuit-schematic.snap.svg | 12 + ...mperatureSensor.circuit-schematic.snap.svg | 12 + ...icalApplication.circuit-schematic.snap.svg | 12 + ..._WhiteLedDriver.circuit-schematic.snap.svg | 12 + ...VBoostConverter.circuit-schematic.snap.svg | 12 + ...V8BuckConverter.circuit-schematic.snap.svg | 12 + ...LinearLedDriver.circuit-schematic.snap.svg | 12 + ...peratingCircuit.circuit-schematic.snap.svg | 68 +++ examples/index.ts | 96 +++ examples/ti-reference-examples.json | 555 +++++++++++++++++- index.ts | 1 + lib/chips/DRV8833.tsx | 4 +- scripts/generate-ti-reference-examples.ts | 32 +- scripts/ti-reference-example-schema.test.ts | 25 +- scripts/ti-reference-example-schema.ts | 75 ++- scripts/validate-ti-reference-examples.ts | 25 +- 63 files changed, 7046 insertions(+), 51 deletions(-) create mode 100644 .github/workflows/reference-schematics.yml create mode 100644 examples/ADS1015L_DualSupplyMonitor.circuit.tsx create mode 100644 examples/ADS7042_DirectSensorInterface.circuit.tsx create mode 100644 examples/BQ25185_TypicalBatteryCharger.circuit.tsx create mode 100644 examples/CC2340R5MODA_TypicalApplication.circuit.tsx create mode 100644 examples/DRV8833_ParallelMotorDriver.circuit.tsx create mode 100644 examples/INA138_BasicCurrentSense.circuit.tsx create mode 100644 examples/INA181_BidirectionalCurrentSense.circuit.tsx create mode 100644 examples/LMC555_MonostableLedFlasher.circuit.tsx create mode 100644 examples/LMK1C1104_ClockFanout.circuit.tsx create mode 100644 examples/LMT70_AnalogTemperatureToAdc.circuit.tsx create mode 100644 examples/MSPM0C1103_AdcInputNetwork.circuit.tsx create mode 100644 examples/OPA320_SecondOrderLowPassFilter.circuit.tsx create mode 100644 examples/OPA333_ThermistorBridge.circuit.tsx create mode 100644 examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx create mode 100644 examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx create mode 100644 examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx create mode 100644 examples/TCAN1044A_5VCanInterface.circuit.tsx create mode 100644 examples/TLV755P_TypicalApplication.circuit.tsx create mode 100644 examples/TMP102_TwoWireTemperatureSensor.circuit.tsx create mode 100644 examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx create mode 100644 examples/TPS61165_WhiteLedDriver.circuit.tsx create mode 100644 examples/TPS61299_5VBoostConverter.circuit.tsx create mode 100644 examples/TPS62A01_1V8BuckConverter.circuit.tsx create mode 100644 examples/TPS92612_LinearLedDriver.circuit.tsx create mode 100644 examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx create mode 100644 examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg create mode 100644 examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg create mode 100644 examples/index.ts diff --git a/.github/workflows/reference-schematics.yml b/.github/workflows/reference-schematics.yml new file mode 100644 index 00000000..7b1822e4 --- /dev/null +++ b/.github/workflows/reference-schematics.yml @@ -0,0 +1,31 @@ +name: TI Reference Schematics + +on: + push: + branches: [main] + pull_request: + branches: [main] + +jobs: + reference-schematics: + runs-on: ubuntu-latest + timeout-minutes: 20 + env: + CI: "true" + + steps: + - uses: actions/checkout@v4 + + - name: Setup bun + uses: oven-sh/setup-bun@v2 + with: + bun-version: latest + + - name: Install dependencies + run: bun install + + - name: Validate reference evidence + run: bun run validate:ti-reference-examples + + - name: Check schematic snapshots + run: bun run snapshot:schematics diff --git a/README.md b/README.md index 79857331..7f937829 100644 --- a/README.md +++ b/README.md @@ -274,6 +274,27 @@ schematics. Their checked-in snapshots are schematic-only so the reference component placement and wiring can be reviewed without running analog simulations or generating PCB output. +The curated set currently contains 28 evidence-backed blocks spanning power +regulation, battery charging, load switching, LED and motor driving, op-amp +filters and bridges, current and temperature sensing, ADC front ends, logic, +CAN, RS-485, RS-232, clocks, wireless, microcontrollers, and timing. Every file +named-exports its reusable block and default-exports the same component. They +are also available from the package entrypoint and from the typed +`TiReferenceBlockComponents` map: + +```tsx +import { + OPA320_SecondOrderLowPassFilter, + TiReferenceBlockComponents, +} from "@tsci/tscircuit.ti" + +const SameBlock = TiReferenceBlockComponents.OPA320_SecondOrderLowPassFilter +``` + +Only circuits with a clear first-party TI schematic are included. A family is +skipped when its public documentation does not provide enough connectivity and +placement evidence to reproduce a useful block. + ### `lib/simulations` The `lib/simulations` directory contains example circuits for simulation-focused @@ -284,6 +305,10 @@ Simulation examples may use model data from `lib/chips/spice-models`. The `lib/simulations/__snapshots__` directory stores generated schematic and simulation SVG snapshots. +CI maps the configured SPICE engines to a no-op engine and checks only the +curated reference manifest and schematic snapshots. Local simulation engines +remain enabled. + ## Development @@ -321,13 +346,15 @@ bun run validate:ti-sysblocks Reference examples are registered in `examples/ti-reference-examples.json` with the exact TI figure used for connectivity and schematic placement. The -strict validator requires every catalog family to have one example and one -schematic snapshot; use `--allow-partial` only while adding the remaining -references: +validator checks that every registered block has fresh source, first-party TI +evidence, and exactly one schematic snapshot. The library intentionally samples +families with useful public reference circuits instead of inventing examples for +parts without one. Full-catalog coverage remains available as an optional audit: ```bash bun run validate:ti-reference-examples -bun scripts/validate-ti-reference-examples.ts --allow-partial --verify-evidence +bun scripts/validate-ti-reference-examples.ts --verify-evidence +bun scripts/validate-ti-reference-examples.ts --require-complete ``` Update visual snapshots when intentional schematic, PCB, or simulation output diff --git a/examples/ADS1015L_DualSupplyMonitor.circuit.tsx b/examples/ADS1015L_DualSupplyMonitor.circuit.tsx new file mode 100644 index 00000000..58883d6b --- /dev/null +++ b/examples/ADS1015L_DualSupplyMonitor.circuit.tsx @@ -0,0 +1,251 @@ +import "tscircuit"; +import { ADS1015LIDGSR } from "../lib/chips/ADS1015LIDGSR.tsx"; + +/** + * TI ADS1015L datasheet (SBASAV7), Figure 9-9: + * "Monitoring Two Supply Voltage Rails Using the ADS1015L" + * https://www.ti.com/document-viewer/ADS1015L/datasheet/GUID-15CF0C0C-4F6E-49F6-A678-8C8E0445438D#TITLE-SBAS822T4758422-11 + * https://www.ti.com/ods/images/SBASAV7/GUID-20230711-SS0I-WZVJ-MZBB-ZCL3HNXRCG50-low.svg + * + * TI gives a 1-kOhm to 10-kOhm range for the bus pullups rather than one + * selected value; those two resistors therefore remain explicitly symbolic. + */ +export const ADS1015L_DualSupplyMonitor = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default ADS1015L_DualSupplyMonitor; diff --git a/examples/ADS7042_DirectSensorInterface.circuit.tsx b/examples/ADS7042_DirectSensorInterface.circuit.tsx new file mode 100644 index 00000000..ed2cbf6b --- /dev/null +++ b/examples/ADS7042_DirectSensorInterface.circuit.tsx @@ -0,0 +1,158 @@ +import "tscircuit"; +import { ADS7042IDCUT } from "../lib/chips/ADS7042IDCUT.tsx"; + +/** + * TI ADS7042 datasheet (SBAS608C), "Interfacing the Device Directly with Sensors": + * https://www.ti.com/document-viewer/ADS7042/datasheet/application_and_implementation#SBAS608129 + * https://www.ti.com/ods/images/SBAS608C/apps_sys_sensor_bas608.gif + * + * TI labels the sensor's ROUT and CFLT but does not prescribe values, so both + * stay symbolic. The digital pins are exposed to make this analog front-end a + * reusable block; the TI figure intentionally focuses only on the sensor path. + */ +export const ADS7042_DirectSensorInterface = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default ADS7042_DirectSensorInterface; diff --git a/examples/BQ25185_TypicalBatteryCharger.circuit.tsx b/examples/BQ25185_TypicalBatteryCharger.circuit.tsx new file mode 100644 index 00000000..42b7b7a6 --- /dev/null +++ b/examples/BQ25185_TypicalBatteryCharger.circuit.tsx @@ -0,0 +1,469 @@ +import "tscircuit"; +import { Fragment } from "react"; +import { BQ25185DLHR } from "../lib/chips/BQ25185DLHR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI BQ25185 datasheet (SLUSF65A), Figure 8-1, "BQ25185 Typical Application": + * https://www.ti.com/lit/ds/symlink/bq25185.pdf#page=20 + * Figure asset: https://www.ti.com/ods/images/SLUSF65A/GUID-20230122-SS0I-PSKM-ZS85-WTN1HZFTWQXP-low.svg + */ +export const BQ25185_TypicalBatteryCharger = () => ( + + + + + + {[ + { y: 1.6, label: "IN" }, + { y: 0.7, label: "STAT1" }, + { y: 0.35, label: "STAT2" }, + { y: 0, label: "/CE" }, + { y: -1, label: "ILIM/VSET" }, + { y: -1.35, label: "ISET" }, + ].map(({ y, label }) => ( + + + + ))} + {[ + { y: 1.6, label: "SYS" }, + { y: 0.65, label: "BAT" }, + { y: -0.55, label: "TS/MR" }, + ].map(({ y, label }) => ( + + + + ))} + + + {[ + { pin: 10, y: 1.6 }, + { pin: 9, y: 0.7 }, + { pin: 3, y: 0.35 }, + { pin: 4, y: 0 }, + { pin: 7, y: -1 }, + { pin: 8, y: -1.35 }, + ].map(({ pin, y }) => ( + + + + ))} + {[ + { pin: 1, y: 1.6 }, + { pin: 2, y: 0.65 }, + { pin: 6, y: -0.55 }, + ].map(({ pin, y }) => ( + + + + ))} + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default BQ25185_TypicalBatteryCharger; diff --git a/examples/CC2340R5MODA_TypicalApplication.circuit.tsx b/examples/CC2340R5MODA_TypicalApplication.circuit.tsx new file mode 100644 index 00000000..8194c965 --- /dev/null +++ b/examples/CC2340R5MODA_TypicalApplication.circuit.tsx @@ -0,0 +1,247 @@ +import "tscircuit"; +import { CC2340R5MODAN0MHAR } from "../lib/chips/CC2340R5MODAN0MHAR.tsx"; +import { CoaxialTestPort } from "../lib/chips/CoaxialTestPort.tsx"; + +/** + * TI SWRS349A, Figure 9-1, "CC2340R5MODA Typical Application Schematic". + * Section: https://www.ti.com/document-viewer/CC2340R5MODA/datasheet/GUID-5A3E26EA-5974-4B44-90E2-924F64CDA09C#TITLE-SWRS224T5681821-41 + * Figure: https://www.ti.com/ods/images/SWRS349A/GUID-0543C849-0B38-4C84-8430-0F7AFF4B6A0A-low.png + * + * TI's antenna-selection and matching branches remain upper-left, the optional + * external RF connector remains left, the 32.768-kHz network stays below, and + * the reset pull-up/capacitor branch remains lower-right. + */ +export const CC2340R5MODA_TypicalApplication = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default CC2340R5MODA_TypicalApplication; diff --git a/examples/DRV8833_ParallelMotorDriver.circuit.tsx b/examples/DRV8833_ParallelMotorDriver.circuit.tsx new file mode 100644 index 00000000..474cc225 --- /dev/null +++ b/examples/DRV8833_ParallelMotorDriver.circuit.tsx @@ -0,0 +1,471 @@ +import "tscircuit"; +import { DRV8833 } from "../lib/chips/DRV8833.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI DRV8833 datasheet (SLVSAR1E), Figure 7, "Parallel Mode": + * https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=12 + */ +export const DRV8833_ParallelMotorDriver = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + } + schX={4.15} + schY={0.45} + /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default DRV8833_ParallelMotorDriver; diff --git a/examples/INA138_BasicCurrentSense.circuit.tsx b/examples/INA138_BasicCurrentSense.circuit.tsx new file mode 100644 index 00000000..c3e22900 --- /dev/null +++ b/examples/INA138_BasicCurrentSense.circuit.tsx @@ -0,0 +1,125 @@ +import "tscircuit"; +import { INA138NA_3K } from "../lib/chips/INA138NA_3K.tsx"; + +/** + * TI INA138 datasheet (SBOS122E), Figure 9, "Basic Circuit Connections": + * https://www.ti.com/document-viewer/INA138/datasheet/application-and-implementation#SBOS1224503 + * https://www.ti.com/ods/images/SBOS122E/basic_circuit_connections_sbos122.gif + * + * RS, RL, and the load are intentionally symbolic: Figure 9 selects RL from + * its gain table and does not assign a single shunt or load value. + */ +export const INA138_BasicCurrentSense = () => ( + + + + + + + + + + + + + + + + + + .1", ".U1 > .pin3"]} /> + .2", ".U1 > .pin4", ".LOAD > .1"]} /> + + + + .pin1", ".R_LOAD > .1", ".VOUT > .1"]} /> + + + + + +); + +export default INA138_BasicCurrentSense; diff --git a/examples/INA181_BidirectionalCurrentSense.circuit.tsx b/examples/INA181_BidirectionalCurrentSense.circuit.tsx new file mode 100644 index 00000000..925d2c4b --- /dev/null +++ b/examples/INA181_BidirectionalCurrentSense.circuit.tsx @@ -0,0 +1,303 @@ +import "tscircuit"; +import { INA181A2IDBVR } from "../lib/chips/INA181A2IDBVR.tsx"; + +/** + * TI INA181 datasheet (SBOS793H), Figure 8-7, "Measuring Bidirectional Current": + * https://www.ti.com/document-viewer/INA181/datasheet/GUID-51EC9609-0E42-451E-BE38-F15C8C75D408#TITLE-SBOS793SBOS7932623 + * https://www.ti.com/ods/images/SBOS793H/GUID-ECDF49FE-1464-4DC3-BE2C-728F776BD407-low.gif + * + * The selectable REF source and divider are retained symbolically because TI + * gives no resistor values in the figure. CBYPASS is the specified 0.1 uF. + */ +export const INA181_BidirectionalCurrentSense = () => ( + + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default INA181_BidirectionalCurrentSense; diff --git a/examples/LM358B_InvertingAmplifier.circuit.tsx b/examples/LM358B_InvertingAmplifier.circuit.tsx index a4684343..83a79ea3 100644 --- a/examples/LM358B_InvertingAmplifier.circuit.tsx +++ b/examples/LM358B_InvertingAmplifier.circuit.tsx @@ -36,7 +36,7 @@ const TiGround = ({ x, y }: { x: number; y: number }) => ( * RF = 36 kOhm for a gain of -3.6. Placement follows Figure 8-1, including * the feedback resistor above the op amp and the grounded lower input. */ -export default () => ( +export const LM358B_InvertingAmplifier = () => ( @@ -257,3 +257,5 @@ export default () => ( /> ); + +export default LM358B_InvertingAmplifier; diff --git a/examples/LMC555_MonostableLedFlasher.circuit.tsx b/examples/LMC555_MonostableLedFlasher.circuit.tsx new file mode 100644 index 00000000..35f19151 --- /dev/null +++ b/examples/LMC555_MonostableLedFlasher.circuit.tsx @@ -0,0 +1,197 @@ +import "tscircuit"; +import { LMC555CMX_NOPB } from "../lib/chips/LMC555CMX_NOPB.tsx"; + +const TI_RED = "#840000"; + +/** + * TI LMC555 datasheet (SNAS558N), Figure 8-1, + * "LMC555 Schematic of Monostable Mode to Flash an LED". + * Section: https://www.ti.com/document-viewer/LMC555/datasheet/GUID-70DF1B73-42F3-448D-B588-86B0175F1C4C#TITLE-SNAS558SNAS5589201 + * Figure: https://www.ti.com/ods/images/SNAS558N/GUID-9517F735-81AC-4C81-8971-FC3F01B7204F-low.gif + * + * The component positions deliberately follow the TI figure: trigger switch + * and pull-up at upper left, LED branch at lower left, timing resistor and + * capacitor at right, and the control-voltage capacitor below pin 5. + */ +export const LMC555_MonostableLedFlasher = () => ( + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default LMC555_MonostableLedFlasher; diff --git a/examples/LMK1C1104_ClockFanout.circuit.tsx b/examples/LMK1C1104_ClockFanout.circuit.tsx new file mode 100644 index 00000000..d75e20bb --- /dev/null +++ b/examples/LMK1C1104_ClockFanout.circuit.tsx @@ -0,0 +1,152 @@ +import "tscircuit"; +import { LMK1C1104DQFR } from "../lib/chips/LMK1C1104DQFR.tsx"; + +/** + * TI SNAS791D, Figure 10-1, "System Configuration Example". + * Section: https://www.ti.com/document-viewer/LMK1C1104/datasheet/GUID-DF196164-2159-47B2-946B-44FD1EF575AA#TITLE-SNAS791SNAS7914064 + * Figure: https://www.ti.com/ods/images/SNAS791D/GUID-467CAA0F-CEDA-47AC-B524-6B7EFFBEAC74-low.gif + * + * A 100-MHz LVCMOS source enters on the left. Two outputs feed CMOS loads + * through source resistors, while a third uses TI's 100-ohm Thevenin load. + */ +export const LMK1C1104_ClockFanout = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default LMK1C1104_ClockFanout; diff --git a/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx b/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx new file mode 100644 index 00000000..b9c87d6d --- /dev/null +++ b/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx @@ -0,0 +1,110 @@ +import "tscircuit"; +import { LMT70YFQR } from "../lib/chips/LMT70YFQR.tsx"; + +/** + * TI LMT70 datasheet (SNIS187A), "Typical Application Schematic": + * https://www.ti.com/document-viewer/LMT70/datasheet/application_and_implementation#SNIS1884528 + * https://www.ti.com/ods/images/SNIS187A/Schem_03_SNIS187.gif + * + * The TI figure names a generic MSP430 rather than a specific orderable part, + * so the MCU is represented as the two labeled reference endpoints shown in + * the source instead of substituting an arbitrary device. + */ +export const LMT70_AnalogTemperatureToAdc = () => ( + + + + + + + + + + + + + + + + + + + + + + + +); + +export default LMT70_AnalogTemperatureToAdc; diff --git a/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx b/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx new file mode 100644 index 00000000..130feec3 --- /dev/null +++ b/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx @@ -0,0 +1,194 @@ +import "tscircuit"; +import { MSPM0C1103SDSGR } from "../lib/chips/MSPM0C1103SDSGR.tsx"; + +const TI_RED = "#840000"; + +/** + * TI SLASF90D, Figure 7-2, "MSPM0C1104/MSPM0C1103 ADC Input Network". + * Section: https://www.ti.com/document-viewer/MSPM0C1103/datasheet/GUID-C6FF21A8-FE93-4A88-B508-50BE3DEF8658#GUID-00AF94FF-7D7E-47C5-922F-56E845B3A5FD + * Figure: https://www.ti.com/ods/images/SLASF90D/GUID-51401E88-ED97-42E3-BA03-EBE514B1C1ED-low.svg + * + * External Rpar/Cpar and Rin stay left of the device boundary. The symbol + * preserves TI's internal input capacitance, sample switch, and SAR labels as + * an equivalent-model drawing rather than extra placed components. + */ +export const MSPM0C1103_AdcInputNetwork = () => ( + + + + + + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + +); + +export default MSPM0C1103_AdcInputNetwork; diff --git a/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx b/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx new file mode 100644 index 00000000..dee1c650 --- /dev/null +++ b/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx @@ -0,0 +1,269 @@ +import "tscircuit"; +import { OPA320SAIDBVR } from "../lib/chips/OPA320SAIDBVR.tsx"; + +/** + * TI OPA320 datasheet (SBOS513F), Figure 45: + * "Second-Order, Butterworth, 500-kHz, Low-Pass Filter" + * https://www.ti.com/document-viewer/OPA320/datasheet/application-and-implementation#SBOS5132327 + * https://www.ti.com/ods/images/SBOS513F/ai_2order_lopass_filt_bos513.gif + * + * The physical OPA320S is projected as the op-amp triangle used by TI. The + * shutdown input is electrically held at V+ but omitted from the drawing, + * matching the simplified TI signal-path figure. + */ +export const OPA320_SecondOrderLowPassFilter = () => ( + + + + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + .pin2", ".R2 > .pin1", ".C1 > .pin1"]} /> + + + + + + + + + + + + + +); + +export default OPA320_SecondOrderLowPassFilter; diff --git a/examples/OPA333_ThermistorBridge.circuit.tsx b/examples/OPA333_ThermistorBridge.circuit.tsx new file mode 100644 index 00000000..9b16db00 --- /dev/null +++ b/examples/OPA333_ThermistorBridge.circuit.tsx @@ -0,0 +1,255 @@ +import "tscircuit"; +import { OPA333AIDR } from "../lib/chips/OPA333AIDR.tsx"; + +/** + * TI OPA333 datasheet (SBOS351E), "Temperature Measurement": + * https://www.ti.com/document-viewer/OPA333/datasheet/application_and_implementation#SBOS3519103 + * https://www.ti.com/ods/images/SBOS351E/ai_measure_tmp_bos351.gif + * + * The bridge, thermistor, feedback resistor, and op-amp orientation follow the + * TI figure. TI specifies the thermistor by type rather than a nominal value, + * so it remains a symbolic resistor instead of receiving an invented value. + */ +export const OPA333_ThermistorBridge = () => ( + + + + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + .1", ".R_LEFT_TOP > .pin1", ".R_RIGHT_TOP > .pin1"]} /> + .1", + ".R_LEFT_BOTTOM > .pin2", + ".R_THERMISTOR > .2", + ]} + /> + + + + + + + + + + + + +); + +export default OPA333_ThermistorBridge; diff --git a/examples/OPA371D_LowSideCurrentSense.circuit.tsx b/examples/OPA371D_LowSideCurrentSense.circuit.tsx index c4144e53..59c76e98 100644 --- a/examples/OPA371D_LowSideCurrentSense.circuit.tsx +++ b/examples/OPA371D_LowSideCurrentSense.circuit.tsx @@ -12,7 +12,7 @@ import "tscircuit"; * Figure asset: https://www.ti.com/ods/images/SLVSM48A/GUID-B2DF1A69-DA22-4522-9874-1574F18368E7-low.gif * Scope: Complete Figure 7-1 signal path and feedback network; ZLOAD remains symbolic because TI does not specify its impedance. */ -export default () => ( +export const OPA371D_LowSideCurrentSense = () => ( @@ -184,3 +184,5 @@ export default () => ( /> ); + +export default OPA371D_LowSideCurrentSense; diff --git a/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx b/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx new file mode 100644 index 00000000..4e405bad --- /dev/null +++ b/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx @@ -0,0 +1,171 @@ +import "tscircuit"; +import { SN65HVD3082EDR } from "../lib/chips/SN65HVD3082EDR.tsx"; + +/** + * TI SLLS562O, Figure 9-2, "Typical Application Circuit". + * Section: https://www.ti.com/document-viewer/SN65HVD3082E/datasheet/GUID-8E8196FF-15F5-4B69-A41E-7D9DBA30E79E#TITLE-SLLS562SLLS5621905 + * Figure: https://www.ti.com/ods/images/SLLS562O/GUID-F8DF2F0D-9F11-4160-A7FF-A80DEBF80CB0-low.gif + * + * Four transceivers share the A/B trunk. End nodes are terminated across the + * pair and the two middle nodes are short unterminated drops, matching TI's + * relative node placement. + */ +export const SN65HVD3082E_MultipointRS485Network = () => ( + + + + + + + + + + + + + + + + + + + + + + + +); + +export default SN65HVD3082E_MultipointRS485Network; diff --git a/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx b/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx new file mode 100644 index 00000000..12a8b224 --- /dev/null +++ b/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx @@ -0,0 +1,116 @@ +import "tscircuit"; +import { SN74AHC1G14DBVR } from "../lib/chips/SN74AHC1G14DBVR.tsx"; + +const TI_RED = "#840000"; + +/** + * TI SCLS321S, Figure 8-1, "SN74AHC1G14 Switch Debouncer". + * Section: https://www.ti.com/document-viewer/SN74AHC1G14/datasheet/GUID-73F0AF56-7849-48C4-9A81-C7F828BB61AE#TITLE-SCLS321SCLS3214279 + * Figure: https://www.ti.com/ods/images/SCLS321S/GUID-BFCCD851-C35C-49FD-86C3-862D2F369B7D-low.gif + * + * The physical push button and pull-up stay to the left of the inverting + * Schmitt trigger, with the receiving microprocessor block on the right. + */ +export const SN74AHC1G14_SwitchDebouncer = () => ( + + + + + + + + + } + /> + + + + + + + + + + + + + + + +); + +export default SN74AHC1G14_SwitchDebouncer; diff --git a/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx b/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx new file mode 100644 index 00000000..4ac605ce --- /dev/null +++ b/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx @@ -0,0 +1,96 @@ +import "tscircuit"; +import { SN74AUP1G17DBVR } from "../lib/chips/SN74AUP1G17DBVR.tsx"; + +const TI_RED = "#840000"; + +/** + * TI SCES579J, Figure 8, "Turn-On Pulse Generator (Normally High Output)". + * Section: https://www.ti.com/document-viewer/SN74AUP1G17/datasheet/application-and-implementation#x5214 + * Figure: https://www.ti.com/ods/images/SCES579J/sces579_app1.gif + * + * The timing node is kept directly left of the non-inverting Schmitt buffer, + * with the pull-up above it and timing capacitor below it as in the TI figure. + */ +export const SN74AUP1G17_TurnOnPulseGenerator = () => ( + + + + + + + + } + /> + + + + + + + + + + + + +); + +export default SN74AUP1G17_TurnOnPulseGenerator; diff --git a/examples/TCAN1044A_5VCanInterface.circuit.tsx b/examples/TCAN1044A_5VCanInterface.circuit.tsx new file mode 100644 index 00000000..014a5263 --- /dev/null +++ b/examples/TCAN1044A_5VCanInterface.circuit.tsx @@ -0,0 +1,181 @@ +import "tscircuit"; +import { TCAN1044AVDRBRQ1 } from "../lib/chips/TCAN1044AVDRBRQ1.tsx"; + +/** + * TI SLLSFJ3D, Figure 9-1, "Transceiver Application Using 5V IO Connections". + * Section: https://www.ti.com/document-viewer/TCAN1044A-Q1/datasheet/GUID-1E00ADFE-29F6-4F59-8BC4-F7463D69B4D9#TITLE-SLLSF17X3660 + * Figure: https://www.ti.com/ods/images/SLLSFJ3D/GUID-20210601-CA0I-KHQN-GM0J-TJ06VSGMRGQJ-low.gif + * + * The supply regulator and MCU are on the left, the transceiver is centered, + * and TI's optional split termination and ESD branches remain on the right. + */ +export const TCAN1044A_5VCanInterface = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TCAN1044A_5VCanInterface; diff --git a/examples/TLV755P_TypicalApplication.circuit.tsx b/examples/TLV755P_TypicalApplication.circuit.tsx new file mode 100644 index 00000000..40e505ae --- /dev/null +++ b/examples/TLV755P_TypicalApplication.circuit.tsx @@ -0,0 +1,220 @@ +import "tscircuit"; +import { TLV75533PDBVR } from "../lib/chips/TLV75533PDBVR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TLV755P datasheet (SBVS320D), Figure 7-4, "TLV755P Typical Application": + * https://www.ti.com/lit/ds/symlink/tlv755p.pdf#page=19 + * Figure asset: https://www.ti.com/ods/images/SBVS320D/GUID-0BCA8AAE-CBC2-4E39-90C5-FF3DE67E3CE3-low.gif + */ +export const TLV755P_TypicalApplication = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TLV755P_TypicalApplication; diff --git a/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx b/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx new file mode 100644 index 00000000..3e11933c --- /dev/null +++ b/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx @@ -0,0 +1,187 @@ +import "tscircuit"; +import { TMP102AIDRLR } from "../lib/chips/TMP102AIDRLR.tsx"; + +/** + * TI TMP102 datasheet (SBOS397I), Figure 7-1, "Typical Connections": + * https://www.ti.com/document-viewer/TMP102/datasheet/GUID-D9972B9C-7EB3-403C-81AA-258B0C731BF1#TITLE-SBOS397SBOS3979928 + * https://www.ti.com/ods/images/SBOS397I/GUID-20240603-SS0I-I73J-3VFC-EL12H6FVKUPM-low.svg + */ +export const TMP102_TwoWireTemperatureSensor = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TMP102_TwoWireTemperatureSensor; diff --git a/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx b/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx new file mode 100644 index 00000000..5120f943 --- /dev/null +++ b/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx @@ -0,0 +1,175 @@ +import "tscircuit"; +import { TPS22919 } from "../lib/chips/TPS22919.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS22919 datasheet (SLVSEN5B), Figure 30, "Typical Application Schematic": + * https://www.ti.com/lit/ds/symlink/tps22919.pdf#page=15 + * Figure asset: https://www.ti.com/ods/images/SLVSEN5B/Typical%20Application.jpg + */ +export const TPS22919_LoadSwitchTypicalApplication = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TPS22919_LoadSwitchTypicalApplication; diff --git a/examples/TPS61165_WhiteLedDriver.circuit.tsx b/examples/TPS61165_WhiteLedDriver.circuit.tsx new file mode 100644 index 00000000..fab86081 --- /dev/null +++ b/examples/TPS61165_WhiteLedDriver.circuit.tsx @@ -0,0 +1,364 @@ +import "tscircuit"; +import { TPS61165DRVR } from "../lib/chips/TPS61165DRVR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS61165 datasheet (SLVS790E), front-page "Typical Application": + * https://www.ti.com/lit/ds/symlink/tps61165.pdf#page=1 + * Figure asset: https://www.ti.com/ods/images/SLVS790E/typ_app_lvs790.gif + */ +export const TPS61165_WhiteLedDriver = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TPS61165_WhiteLedDriver; diff --git a/examples/TPS61299_5VBoostConverter.circuit.tsx b/examples/TPS61299_5VBoostConverter.circuit.tsx new file mode 100644 index 00000000..b0a36044 --- /dev/null +++ b/examples/TPS61299_5VBoostConverter.circuit.tsx @@ -0,0 +1,249 @@ +import "tscircuit"; +import { TPS61299DRLR } from "../lib/chips/TPS61299DRLR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS61299 datasheet (SLVSGS9G), Figure 8-1, + * "3.6-V Input Source to 5-V Boost Converter Under Fast Mode": + * https://www.ti.com/lit/ds/symlink/tps61299.pdf#page=19 + * Figure asset: https://www.ti.com/ods/images/SLVSGS9G/GUID-20230315-SS0I-SNWQ-NK7H-W5SZXM5FNTJP-low.svg + */ +export const TPS61299_5VBoostConverter = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TPS61299_5VBoostConverter; diff --git a/examples/TPS62A01_1V8BuckConverter.circuit.tsx b/examples/TPS62A01_1V8BuckConverter.circuit.tsx new file mode 100644 index 00000000..c3fbb971 --- /dev/null +++ b/examples/TPS62A01_1V8BuckConverter.circuit.tsx @@ -0,0 +1,356 @@ +import "tscircuit"; +import { TPS62A01PDDCR } from "../lib/chips/TPS62A01PDDCR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS62A01 datasheet (SLUSEG9E), Figure 8-1, + * "TPS62A01 Typical Application Circuit": + * https://www.ti.com/lit/ds/symlink/tps62a01.pdf#page=11 + * Figure asset: https://www.ti.com/ods/images/SLUSEG9E/GUID-20230310-SS0I-R5NB-L5XF-FBXFT6BWQ4KP-low.svg + */ +export const TPS62A01_1V8BuckConverter = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TPS62A01_1V8BuckConverter; diff --git a/examples/TPS7A20_TypicalApplication.circuit.tsx b/examples/TPS7A20_TypicalApplication.circuit.tsx index ed1382ff..8b31d40d 100644 --- a/examples/TPS7A20_TypicalApplication.circuit.tsx +++ b/examples/TPS7A20_TypicalApplication.circuit.tsx @@ -36,7 +36,7 @@ const TiGround = ({ x, y }: { x: number; y: number }) => ( * output capacitors. Placement intentionally follows the TI figure: input and * enable on the left, output on the right, and the three ground returns below. */ -export default () => ( +export const TPS7A20_TypicalApplication = () => ( ( ); + +export default TPS7A20_TypicalApplication; diff --git a/examples/TPS92612_LinearLedDriver.circuit.tsx b/examples/TPS92612_LinearLedDriver.circuit.tsx new file mode 100644 index 00000000..e19e805a --- /dev/null +++ b/examples/TPS92612_LinearLedDriver.circuit.tsx @@ -0,0 +1,283 @@ +import "tscircuit"; +import { TPS92612DBVR } from "../lib/chips/TPS92612DBVR.tsx"; + +const PRIMARY = "#840000"; + +const TiGround = ({ x, y }: { x: number; y: number }) => ( + <> + + + +); + +/** + * TI TPS92612 datasheet (SLVSFG3), front-page + * "TPS92612 Typical Application Diagram": + * https://www.ti.com/lit/ds/symlink/tps92612.pdf#page=1 + * Figure asset: https://www.ti.com/ods/images/SLVSFG3/tps92612-typical-application-diagram.gif + */ +export const TPS92612_LinearLedDriver = () => ( + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +); + +export default TPS92612_LinearLedDriver; diff --git a/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx b/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx new file mode 100644 index 00000000..1de0f0ab --- /dev/null +++ b/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx @@ -0,0 +1,111 @@ +import "tscircuit"; +import { TRS3232EIRGTR } from "../lib/chips/TRS3232EIRGTR.tsx"; + +/** + * TI SLLS790E, Figure 8-1, "Typical Operating Circuit and Capacitor Values". + * Section: https://www.ti.com/document-viewer/TRS3232E/datasheet/GUID-053CAD17-BC69-4139-BDE3-BAE1B00ED46F#TITLE-SLLS790SLLS410300 + * Figure: https://www.ti.com/ods/images/SLLS790E/GUID-6C8B4B54-E0F2-409E-B581-B13949C009DB-low.gif + * + * The two flying capacitors and positive/negative reservoir capacitors remain + * on the left of the transceiver. The VCC bypass capacitor remains upper-right. + */ +export const TRS3232E_TypicalOperatingCircuit = () => ( + + + + + + + + + + + + + + + + + + + + + + +); + +export default TRS3232E_TypicalOperatingCircuit; diff --git a/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg b/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg new file mode 100644 index 00000000..defc3444 --- /dev/null +++ b/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +ADS1015LIDGSRADS1015L1ADDR23GND4AIN05AIN16AIN27AIN38VDD9SDA10SCLR_3V3100ΩC_3V30.47uFR_1V8100ΩC_1V80.47uFC_VDD0.1uF3.3 V1.8 V3.3 V1.8 VI2C SCLI2C SDApin2 = ALERT/RDY1 kOhm to 10 kOhm pullupsTI ADS1015L Figure 9-9 · dual-rail monitor \ No newline at end of file diff --git a/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg b/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg new file mode 100644 index 00000000..ef41749d --- /dev/null +++ b/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +ADS7042IDCUTADS70421DVDD2SCLK3SDO4CS5AINM6AINP7AVDD8GNDSensor +Sensor -ROUTCFLTAVDDDVDDSCLKSDOCSTI ADS7042 direct-sensor interface \ No newline at end of file diff --git a/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg b/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg new file mode 100644 index 00000000..b4716244 --- /dev/null +++ b/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +1uF5kΩ1kΩ10uF1uFNTC10kΩINSTAT1STAT2/CEILIM/VSETISETSYSBATTS/MRBQ25185GNDHostRegulatedLoadVBUS \ No newline at end of file diff --git a/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg new file mode 100644 index 00000000..c162d8b8 --- /dev/null +++ b/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg @@ -0,0 +1,61 @@ +CC2340R5MODAN0MHARU11GND2GND3ANT_IN4RFIO5GND6VDDS7VDDS8GND9DIO6_A110DIO811DIO24_A712DIO3_X32P13DIO4_X32N14RSTN15DIO21_A1016DIO1817DIO20_A1118DIO1219DIO17_SWDCK20DIO16_SWDIO22GND23GND24GNDCA115pFZ61Z601pFZ621pFCOAXIAL-TEST-PORTJ11GND_12RF3GND_2CA21pF32.8kHz / 12.5pFY1R2R3C512pFC615pFR4100kΩC7100nFGNDGNDGNDGNDGNDWMCU_VDDWMCU_VDDU1_DIO3_X32PU1_DIO3_X32PU1_RSTNU1_RSTNANT_MATCHZ60-Z62 antenna matchingSelect CA1 for internal antenna or CA2 for external connector \ No newline at end of file diff --git a/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg b/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg new file mode 100644 index 00000000..aa70fefb --- /dev/null +++ b/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +16AIN115AIN29BIN110BIN21NSLEEP13GND11VCP2AOUT14AOUT27BOUT15BOUT28NFAULT14VINT3AISEN6BISEN12VMC410uFC10.01uFC22.2uFR2200mΩDRV8833MIN1IN2LOW = SLEEP, HIGH = RUNVM \ No newline at end of file diff --git a/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg new file mode 100644 index 00000000..127d5cb5 --- /dev/null +++ b/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +INA138NA/3KINA1381OUT2GND3_POS4_NEG5V_POSRS (Shunt)LoadRLVP · 2.7 V to 36 VV+ · 2.7 V to 36 VVOIS →TI INA138 Figure 9 \ No newline at end of file diff --git a/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg new file mode 100644 index 00000000..f57478c9 --- /dev/null +++ b/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +RSENSELoadCBYPASS0.1uFRREF1RREF2Reference BufferBus · -0.2 V to +26 VVS · 2.7 V to 5.5 VReference VoltageOutputINA181IN-IN+OUTREFTI INA181 Figure 8-7 \ No newline at end of file diff --git a/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg b/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg new file mode 100644 index 00000000..960dbc5d --- /dev/null +++ b/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TRIGGEROUTPUTRESETVCCDISCHARGETHRESHOLDCONTROLGNDR_TRIGGER10kΩgreenD1R_LED470ΩR_TIMING10kΩC_TIMING470uFC_CONTROL10nFVCCGNDGNDLMC555pushbutton switch+5 V to +15 V \ No newline at end of file diff --git a/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg b/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg new file mode 100644 index 00000000..7f5be18f --- /dev/null +++ b/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +100-MHz LVCMOS OSCILLATORU51OUT2GNDLMK1C1104DQFRU11CLKIN21G3Y04GND6VDD7Y38Y1R133ΩR233ΩR333ΩR410kΩR5100ΩR6100ΩCMOS CPU CLOCKU21CLKCMOS FPGA CLOCKU31CLKPLL REFERENCEU41REFGNDGNDVDDVDDVDD50-ohm traces \ No newline at end of file diff --git a/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg b/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg new file mode 100644 index 00000000..eebdfdd6 --- /dev/null +++ b/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +LMT70YFQRLMT704GND3VDD2TAO1T_ON2.2 V to 3.6 VMSP430 VDDMSP430 P2.3 · ADCMSP430 P2.5_VREF · 1.5 V1.5 V referenceMSP430 ADC / MUXTI LMT70 typical application \ No newline at end of file diff --git a/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg b/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg new file mode 100644 index 00000000..e5cd10ab --- /dev/null +++ b/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +PA0Rpar100ΩCpar20pFRin1kΩVinGNDADC ModelCIS1CS/H12-bit SARDEVICE BOUNDARY \ No newline at end of file diff --git a/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg b/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg new file mode 100644 index 00000000..5c6b25a2 --- /dev/null +++ b/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +R1549ΩR21.24kΩR3549ΩC11nFC2150pFVINVOUTV+V--+OPA320TI Figure 45 · 500-kHz Butterworth low-pass \ No newline at end of file diff --git a/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg b/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg new file mode 100644 index 00000000..e82fcddc --- /dev/null +++ b/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +R11MΩR21MΩR360kΩNTC ThermistorRF100kΩ3 VVOUT-+OPA333TI OPA333 temperature-measurement bridge \ No newline at end of file diff --git a/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg b/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg new file mode 100644 index 00000000..f6f13f45 --- /dev/null +++ b/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +SN65HVD3082EDRU11R2nRE3DE4D6A7BSN65HVD3082EDRU21R2nRE3DE4D6A7BSN65HVD3082EDRU31R2nRE3DE4D6A7BSN65HVD3082EDRU41R2nRE3DE4D6A7BR1120ΩR2120ΩTERMINATED END NODESHORT UNTERMINATED DROPSTERMINATED END NODE \ No newline at end of file diff --git a/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg b/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg new file mode 100644 index 00000000..ebe87157 --- /dev/null +++ b/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +AYSW1R110kΩMICROPROCESSORMCU1GPIO_INGNDVCCPhysical Push ButtonSN74AHC1G14 \ No newline at end of file diff --git a/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg b/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg new file mode 100644 index 00000000..8a71c08f --- /dev/null +++ b/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +AYR1100kΩC1100nFVOVCCGNDVc \ No newline at end of file diff --git a/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg b/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg new file mode 100644 index 00000000..0b1e6c8d --- /dev/null +++ b/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg @@ -0,0 +1,103 @@ +5-V VOLTAGE REGULATORU21VIN2VOUT3GNDCAN-FD MCUU31VCC2GND3RXD4TXD5STBTCAN1044AVDRBRQ1U11TXD2GND3VCC4RXD6CANL7CANH8STBC11uFC21uFC3100nFR160ΩR260ΩC44.7nFD1D2U1_VCCU1_VCCU1_VCCGNDGNDGNDGNDU1_RXDU1_RXDU1_TXDU1_TXDU1_STBU1_STBCANLCANLCANHCANHOPTIONAL SPLIT TERMINATIONOPTIONAL ESD \ No newline at end of file diff --git a/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg new file mode 100644 index 00000000..c8bd4e02 --- /dev/null +++ b/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TLV75533PDBVR1IN2GND3EN5OUT1uF1uFDC/DCConverterTLV755PLoadONOFF \ No newline at end of file diff --git a/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg b/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg new file mode 100644 index 00000000..349c4eec --- /dev/null +++ b/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TMP102AIDRLRTMP1021SCL2GND3ALERT4ADD05V_POS6SDAR_SCL5kΩR_SDA5kΩR_ALERT5kΩC_BYPASS0.01uF1.4 V to 3.6 VHost SCLHost SDAHost ALERTTwo-Wire Host ControllerTI TMP102 Figure 7-1 \ No newline at end of file diff --git a/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg new file mode 100644 index 00000000..4d1c2410 --- /dev/null +++ b/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +VIN3.3VCIN1uFTPS22919DCKR1IN2GND3ON5QOD6OUTRQOD100kΩCL1uFRL10kΩTPS22919HLON \ No newline at end of file diff --git a/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg b/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg new file mode 100644 index 00000000..f18b6849 --- /dev/null +++ b/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TPS61165DRVR1FB2COMP3GND4SW5CTRL6VIN7EPC14.7uFL110µHD1C21uF Rset570mΩ220nFVIN 5VON/OFFDIMMING CONTROL350 mA \ No newline at end of file diff --git a/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg b/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg new file mode 100644 index 00000000..ee6da29e --- /dev/null +++ b/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TPS61299DRLR1VIN2SW3EN4VSEL5VOUT6GNDL1µHC110uFC210uFTPS61299VINVOUT 5VONOFF \ No newline at end of file diff --git a/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg b/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg new file mode 100644 index 00000000..e7692022 --- /dev/null +++ b/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TPS62A01PDDCR1EN2GND3SW4VIN5PG6FBC14.7uFL11µHR1200kΩR2100kΩC310pFC222uFR4499kΩTPS62A01VIN 2.5V to 5.5VVOUT 1.8V / 1AVINVPG \ No newline at end of file diff --git a/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg b/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg new file mode 100644 index 00000000..d2ba51bd --- /dev/null +++ b/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg @@ -0,0 +1,12 @@ +TPS92612DBVR1GND2PWM3SUPPLY4IN5OUTC(SUPPLY)1uFR(SNS)C(OUT)100nF TPS926124.5—40VPWM \ No newline at end of file diff --git a/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg b/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg new file mode 100644 index 00000000..66037425 --- /dev/null +++ b/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg @@ -0,0 +1,68 @@ +TRS3232EIRGTRU11C1_NEG2C2_POS3C2_NEG4V_NEG5DOUT26RIN27ROUT28DIN29DIN110ROUT111RIN112DOUT113GND14VCC15V_POS16C1_POSC1100nFC2100nFC3100nFC4100nFC5100nFU1_C1_NEGU1_C1_NEGU1_C2_POSU1_C2_POSU1_C2_NEGU1_C2_NEGGNDGNDVCCU1_V_POSU1_V_POS \ No newline at end of file diff --git a/examples/index.ts b/examples/index.ts new file mode 100644 index 00000000..432516f0 --- /dev/null +++ b/examples/index.ts @@ -0,0 +1,96 @@ +// Generated from examples/ti-reference-examples.json. +// Each export is a runnable, evidence-backed TI reference block. +import { ADS1015L_DualSupplyMonitor } from "./ADS1015L_DualSupplyMonitor.circuit.tsx"; +import { ADS7042_DirectSensorInterface } from "./ADS7042_DirectSensorInterface.circuit.tsx"; +import { BQ25185_TypicalBatteryCharger } from "./BQ25185_TypicalBatteryCharger.circuit.tsx"; +import { CC2340R5MODA_TypicalApplication } from "./CC2340R5MODA_TypicalApplication.circuit.tsx"; +import { DRV8833_ParallelMotorDriver } from "./DRV8833_ParallelMotorDriver.circuit.tsx"; +import { INA138_BasicCurrentSense } from "./INA138_BasicCurrentSense.circuit.tsx"; +import { INA181_BidirectionalCurrentSense } from "./INA181_BidirectionalCurrentSense.circuit.tsx"; +import { LM358B_InvertingAmplifier } from "./LM358B_InvertingAmplifier.circuit.tsx"; +import { LMC555_MonostableLedFlasher } from "./LMC555_MonostableLedFlasher.circuit.tsx"; +import { LMK1C1104_ClockFanout } from "./LMK1C1104_ClockFanout.circuit.tsx"; +import { LMT70_AnalogTemperatureToAdc } from "./LMT70_AnalogTemperatureToAdc.circuit.tsx"; +import { MSPM0C1103_AdcInputNetwork } from "./MSPM0C1103_AdcInputNetwork.circuit.tsx"; +import { OPA320_SecondOrderLowPassFilter } from "./OPA320_SecondOrderLowPassFilter.circuit.tsx"; +import { OPA333_ThermistorBridge } from "./OPA333_ThermistorBridge.circuit.tsx"; +import { OPA371D_LowSideCurrentSense } from "./OPA371D_LowSideCurrentSense.circuit.tsx"; +import { SN65HVD3082E_MultipointRS485Network } from "./SN65HVD3082E_MultipointRS485Network.circuit.tsx"; +import { SN74AHC1G14_SwitchDebouncer } from "./SN74AHC1G14_SwitchDebouncer.circuit.tsx"; +import { SN74AUP1G17_TurnOnPulseGenerator } from "./SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx"; +import { TCAN1044A_5VCanInterface } from "./TCAN1044A_5VCanInterface.circuit.tsx"; +import { TLV755P_TypicalApplication } from "./TLV755P_TypicalApplication.circuit.tsx"; +import { TMP102_TwoWireTemperatureSensor } from "./TMP102_TwoWireTemperatureSensor.circuit.tsx"; +import { TPS22919_LoadSwitchTypicalApplication } from "./TPS22919_LoadSwitchTypicalApplication.circuit.tsx"; +import { TPS61165_WhiteLedDriver } from "./TPS61165_WhiteLedDriver.circuit.tsx"; +import { TPS61299_5VBoostConverter } from "./TPS61299_5VBoostConverter.circuit.tsx"; +import { TPS62A01_1V8BuckConverter } from "./TPS62A01_1V8BuckConverter.circuit.tsx"; +import { TPS7A20_TypicalApplication } from "./TPS7A20_TypicalApplication.circuit.tsx"; +import { TPS92612_LinearLedDriver } from "./TPS92612_LinearLedDriver.circuit.tsx"; +import { TRS3232E_TypicalOperatingCircuit } from "./TRS3232E_TypicalOperatingCircuit.circuit.tsx"; + +export { + ADS1015L_DualSupplyMonitor, + ADS7042_DirectSensorInterface, + BQ25185_TypicalBatteryCharger, + CC2340R5MODA_TypicalApplication, + DRV8833_ParallelMotorDriver, + INA138_BasicCurrentSense, + INA181_BidirectionalCurrentSense, + LM358B_InvertingAmplifier, + LMC555_MonostableLedFlasher, + LMK1C1104_ClockFanout, + LMT70_AnalogTemperatureToAdc, + MSPM0C1103_AdcInputNetwork, + OPA320_SecondOrderLowPassFilter, + OPA333_ThermistorBridge, + OPA371D_LowSideCurrentSense, + SN65HVD3082E_MultipointRS485Network, + SN74AHC1G14_SwitchDebouncer, + SN74AUP1G17_TurnOnPulseGenerator, + TCAN1044A_5VCanInterface, + TLV755P_TypicalApplication, + TMP102_TwoWireTemperatureSensor, + TPS22919_LoadSwitchTypicalApplication, + TPS61165_WhiteLedDriver, + TPS61299_5VBoostConverter, + TPS62A01_1V8BuckConverter, + TPS7A20_TypicalApplication, + TPS92612_LinearLedDriver, + TRS3232E_TypicalOperatingCircuit, +}; + +export const TiReferenceBlockComponents = { + ADS1015L_DualSupplyMonitor, + ADS7042_DirectSensorInterface, + BQ25185_TypicalBatteryCharger, + CC2340R5MODA_TypicalApplication, + DRV8833_ParallelMotorDriver, + INA138_BasicCurrentSense, + INA181_BidirectionalCurrentSense, + LM358B_InvertingAmplifier, + LMC555_MonostableLedFlasher, + LMK1C1104_ClockFanout, + LMT70_AnalogTemperatureToAdc, + MSPM0C1103_AdcInputNetwork, + OPA320_SecondOrderLowPassFilter, + OPA333_ThermistorBridge, + OPA371D_LowSideCurrentSense, + SN65HVD3082E_MultipointRS485Network, + SN74AHC1G14_SwitchDebouncer, + SN74AUP1G17_TurnOnPulseGenerator, + TCAN1044A_5VCanInterface, + TLV755P_TypicalApplication, + TMP102_TwoWireTemperatureSensor, + TPS22919_LoadSwitchTypicalApplication, + TPS61165_WhiteLedDriver, + TPS61299_5VBoostConverter, + TPS62A01_1V8BuckConverter, + TPS7A20_TypicalApplication, + TPS92612_LinearLedDriver, + TRS3232E_TypicalOperatingCircuit, +} as const; + +export type TiReferenceBlockName = keyof typeof TiReferenceBlockComponents; +export type TiReferenceBlockComponent = + (typeof TiReferenceBlockComponents)[TiReferenceBlockName]; diff --git a/examples/ti-reference-examples.json b/examples/ti-reference-examples.json index c5f34e0f..129840a2 100644 --- a/examples/ti-reference-examples.json +++ b/examples/ti-reference-examples.json @@ -1,6 +1,300 @@ { "schemaVersion": 1, "examples": [ + { + "id": "ADS1015L_DualSupplyMonitor", + "family": "ADS1015L", + "implementation": "handwritten", + "title": "ADS1015L DualSupplyMonitor", + "description": "Reusable TI-reference block. Filtered 3.3 V drives AIN0 and filtered 1.8 V drives AIN2; AIN1/AIN3 are unused; VDD is locally bypassed; ADDR and GND are grounded; SCL/SDA connect to 1.8-V pullups and host endpoints.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/ADS1015L", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/ADS1015L/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/ADS1015L/datasheet/GUID-15CF0C0C-4F6E-49F6-A678-8C8E0445438D#TITLE-SBAS822T4758422-11", + "figureUrl": "https://www.ti.com/ods/images/SBASAV7/GUID-20230711-SS0I-WZVJ-MZBB-ZCL3HNXRCG50-low.svg", + "figure": "Figure 9-9", + "figureCaption": "Monitoring Two Supply Voltage Rails Using the ADS1015L", + "pdfPage": 29, + "documentRevision": "SBASAV7", + "scope": "Figure 9-9 dual-rail monitor, including both 100-ohm/0.47-uF input filters, 3.3-V device rail and 0.1-uF bypass, grounded ADDR/GND, 1.8-V SCL/SDA pullups, bus endpoints, unused analog channels, and relative placement." + }, + "sourceFile": "ADS1015L_DualSupplyMonitor.circuit.tsx", + "sourceSha256": "4aefa244a55b81014595c2b63fe32bc557a097a012e7a90491114644eaa5b1da" + }, + { + "id": "ADS7042_DirectSensorInterface", + "family": "ADS7042", + "implementation": "handwritten", + "title": "ADS7042 DirectSensorInterface", + "description": "Reusable TI-reference block. Sensor+ -> ROUT -> AINP; CFLT spans AINP to AINM; Sensor- drives AINM and ground; AVDD, DVDD, GND, SCLK, SDO, and CS are exposed as labeled reusable endpoints.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/ADS7042", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/ADS7042/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/ADS7042/datasheet/application_and_implementation#SBAS608129", + "figureUrl": "https://www.ti.com/ods/images/SBAS608C/apps_sys_sensor_bas608.gif", + "figure": "apps_sys_sensor_bas608", + "figureCaption": "Interfacing the Device Directly with Sensors", + "pdfPage": 31, + "documentRevision": "SBAS608C", + "scope": "Exact analog interface shown by TI: differential sensor endpoints, ROUT in series with AINP, CFLT across AINP/AINM, and source-relative placement. Device power and SPI endpoints are additionally exposed outside that figure-specific analog scope to make the block reusable." + }, + "sourceFile": "ADS7042_DirectSensorInterface.circuit.tsx", + "sourceSha256": "bbb8636b115b966184a5307a57363e497a911943c5add4017a25fc68de6663ca" + }, + { + "id": "BQ25185_TypicalBatteryCharger", + "family": "BQ25185", + "implementation": "handwritten", + "title": "BQ25185 TypicalBatteryCharger", + "description": "Reusable TI-reference block. VBUS and CIN feed IN; STAT1/STAT2/CE connect to the host block; ILIM/VSET and ISET use their TI resistors; SYS feeds CSYS and the regulated load; BAT feeds CBAT and the cell; TS/MR feeds the NTC and pushbutton; all returns share GND.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/bq25185.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/BQ25185/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/BQ25185/datasheet/GUID-CAE77349-B33A-4C63-9308-992130231F72#GUID-08F7A30E-83A5-49DC-B0D2-6FEF78ECD8D8", + "figureUrl": "https://www.ti.com/ods/images/SLUSF65A/GUID-20230122-SS0I-PSKM-ZS85-WTN1HZFTWQXP-low.svg", + "figure": "Figure 8-1", + "figureCaption": "BQ25185 Typical Application", + "pdfPage": 20, + "documentRevision": "SLUSF65A", + "scope": "Recreates the external application connectivity and placement in Figure 8-1: VBUS/CIN, host status and CE lines, 5-kohm ILIM/VSET, 1-kohm ISET, SYS load/CSYS, BAT/CBAT/battery, TS/MR pushbutton, and NTC." + }, + "sourceFile": "BQ25185_TypicalBatteryCharger.circuit.tsx", + "sourceSha256": "8b4a0fbdbd54f7bce864eaa542fe4e0f29e3b24400f96ffaf59706a6c785c8f2" + }, + { + "id": "CC2340R5MODA_TypicalApplication", + "family": "CC2340R5MODA", + "implementation": "handwritten", + "title": "CC2340R5MODA TypicalApplication", + "description": "Reusable TI-reference block. CA1/Z60-Z62 form the internal-antenna matching path to ANT_IN; optional CA2 selects the external coax path to RFIO; Y1 with R2/R3/C5/C6 forms the 32.768-kHz network; R4/C7 form the active-low reset branch; VDDS and all ground pads share their named rails.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/CC2340R5MODA", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/CC2340R5MODA/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/CC2340R5MODA/datasheet/GUID-5A3E26EA-5974-4B44-90E2-924F64CDA09C#TITLE-SWRS224T5681821-41", + "figureUrl": "https://www.ti.com/ods/images/SWRS349A/GUID-0543C849-0B38-4C84-8430-0F7AFF4B6A0A-low.png", + "figure": "Figure 9-1", + "figureCaption": "Figure 9-1 CC2340R5MODA Typical Application Schematic", + "pdfPage": 50, + "documentRevision": "SWRS349A, June 2026, revised July 2026", + "scope": "Figure 9-1 module-centered implementation of the internal/external antenna selection and Z60-Z62 matching area, optional RF connector path, 32.768-kHz crystal network, reset RC, VDDS rails, and common ground pads. General-purpose DIO destinations beyond the figure labels remain exposed." + }, + "sourceFile": "CC2340R5MODA_TypicalApplication.circuit.tsx", + "sourceSha256": "405ee826a5032332fe2b1f6ec520ff5a11647f95ac9f23518745b32537254e3b" + }, + { + "id": "DRV8833_ParallelMotorDriver", + "family": "DRV8833", + "implementation": "handwritten", + "title": "DRV8833 ParallelMotorDriver", + "description": "Reusable TI-reference block. IN1 drives AIN1 and BIN1; IN2 drives AIN2 and BIN2; AOUT1/BOUT1 share one motor terminal and AOUT2/BOUT2 share the other; VM feeds C4 and C1 while C1 returns to VCP; VINT uses C2; AISEN/BISEN share R2; U1.GND and passive returns share GND.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/drv8833.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/DRV8833/datasheet", + "sectionUrl": "https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=12", + "figureUrl": "https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=12", + "figure": "Figure 7", + "figureCaption": "Parallel Mode", + "pdfPage": 12, + "documentRevision": "SLVSAR1E", + "scope": "Recreates Figure 7's parallel-mode controller inputs, paired A/B bridge outputs into one brushed motor, VM/C4/C1/VCP network, VINT/C2, combined AISEN/BISEN with 0.2-ohm R2, nSLEEP control, nFAULT stub, and ground." + }, + "sourceFile": "DRV8833_ParallelMotorDriver.circuit.tsx", + "sourceSha256": "010f4d3406c11ca2f3594ceabef7bdacadb7e45bb02dec930cd6c37f88862e00" + }, + { + "id": "INA138_BasicCurrentSense", + "family": "INA138", + "implementation": "handwritten", + "title": "INA138 BasicCurrentSense", + "description": "Reusable TI-reference block. VP -> RS -> load; U1 IN+ and IN- Kelvin-connect across RS; U1 is powered from V+; U1 OUT drives both VO and RL to ground.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/INA138", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/INA138/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/INA138/datasheet/application-and-implementation#SBOS1224503", + "figureUrl": "https://www.ti.com/ods/images/SBOS122E/basic_circuit_connections_sbos122.gif", + "figure": "Figure 9", + "figureCaption": "Basic Circuit Connections", + "pdfPage": 10, + "documentRevision": "SBOS122E", + "scope": "Full external Figure 9 high-side current-sense topology and relative placement, including RS, load, independent V+, RL, VO, and all ground returns." + }, + "sourceFile": "INA138_BasicCurrentSense.circuit.tsx", + "sourceSha256": "05e99c26a6193dd5f0c9eed4cc59b59c22b780983d0dcbe48adf5368ff679849" + }, + { + "id": "INA181_BidirectionalCurrentSense", + "family": "INA181", + "implementation": "handwritten", + "title": "INA181 BidirectionalCurrentSense", + "description": "Reusable TI-reference block. The bus drives RSENSE and load; U1 IN+ and IN- span RSENSE; VS powers and bypasses U1; OUT is exposed; a divider-derived, unity-buffered reference drives REF.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/INA181", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/INA181/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/INA181/datasheet/GUID-51EC9609-0E42-451E-BE38-F15C8C75D408#TITLE-SBOS793SBOS7932623", + "figureUrl": "https://www.ti.com/ods/images/SBOS793H/GUID-ECDF49FE-1464-4DC3-BE2C-728F776BD407-low.gif", + "figure": "Figure 8-7", + "figureCaption": "Measuring Bidirectional Current", + "pdfPage": 30, + "documentRevision": "SBOS793H", + "scope": "Figure 8-7 bus/shunt/load path, INA181 supply and bypass, output, selectable reference divider and buffer, feedback, grounds, and relative left-to-right placement." + }, + "sourceFile": "INA181_BidirectionalCurrentSense.circuit.tsx", + "sourceSha256": "3b0329d5079890826aaf20e9ac65e8c0542f59cb70c0ebf2043aadfcbc83ec8a" + }, + { + "id": "LM358B_InvertingAmplifier", + "family": "LM358B", + "implementation": "handwritten", + "title": "LM358B Inverting-Amplifier Application", + "description": "A hand-authored schematic rendering of TI's inverting-amplifier application using the worked-example RI and RF values.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/LM358B", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/LM358B/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/LM358B/datasheet/GUID-9C4C5A40-20A9-49A2-B940-96F8AF83307C", + "figureUrl": "https://www.ti.com/ods/images/SLOS068AB/GUID-222A75A4-1DA7-47D5-BEE4-7956753D9B15-low.gif", + "figure": "Figure 8-1", + "figureCaption": "Application Schematic", + "pdfPage": 27, + "documentRevision": "SLOS068AB", + "scope": "Figure 8-1 inverting-amplifier topology and placement with section 8.2.2 worked values RI=10 kohm and RF=36 kohm." + }, + "sourceFile": "LM358B_InvertingAmplifier.circuit.tsx", + "sourceSha256": "40543483ef9dc316aec4b8bb050faa3ec6cfca1615f85de9774106431209d8b6" + }, + { + "id": "LMC555_MonostableLedFlasher", + "family": "LMC555", + "implementation": "handwritten", + "title": "LMC555 Monostable LED Flasher", + "description": "A reusable rendering of TI's monostable LED-flasher circuit, preserving the reference switch, LED, timing network, control capacitor, and relative placement.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/LMC555", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/LMC555/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/LMC555/datasheet/GUID-70DF1B73-42F3-448D-B588-86B0175F1C4C#TITLE-SNAS558SNAS5589201", + "figureUrl": "https://www.ti.com/ods/images/SNAS558N/GUID-9517F735-81AC-4C81-8971-FC3F01B7204F-low.gif", + "figure": "Figure 8-1", + "figureCaption": "Schematic of Monostable Mode to Flash an LED", + "pdfPage": 12, + "documentRevision": "SNAS558N, revised March 2024", + "scope": "Complete Figure 8-1 topology and placement, including both 10-kohm resistors, the 470-ohm LED resistor, 470-uF timing capacitor, and 0.01-uF control capacitor shown in the figure." + }, + "sourceFile": "LMC555_MonostableLedFlasher.circuit.tsx", + "sourceSha256": "9b9db1b7def8e2b21a0e97697ff4dca8c7bae882cb5266efa145d9e4d998871c" + }, + { + "id": "LMK1C1104_ClockFanout", + "family": "LMK1C1104", + "implementation": "handwritten", + "title": "LMK1C1104 ClockFanout", + "description": "Reusable TI-reference block. A labeled 100-MHz LVCMOS oscillator U5 drives CLKIN; R4 pulls enable 1G high; Y0/Y1 feed CPU and FPGA clocks through source resistors; Y3 feeds the PLL reference with TI's 100-ohm Thevenin termination.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/LMK1C1104", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/LMK1C1104/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/LMK1C1104/datasheet/GUID-DF196164-2159-47B2-946B-44FD1EF575AA#TITLE-SNAS791SNAS7914064", + "figureUrl": "https://www.ti.com/ods/images/SNAS791D/GUID-467CAA0F-CEDA-47AC-B524-6B7EFFBEAC74-low.gif", + "figure": "Figure 10-1", + "figureCaption": "Figure 10-1 System Configuration Example", + "pdfPage": 11, + "documentRevision": "SNAS791D, December 2019, revised February 2022", + "scope": "Figure 10-1 100-MHz LVCMOS source, active-high enable, two CMOS receiver branches, and one Thevenin-terminated PLL-reference branch. Generic Yn is mapped to Y3 on LMK1C1104; unused Y2 is outside scope." + }, + "sourceFile": "LMK1C1104_ClockFanout.circuit.tsx", + "sourceSha256": "1aed89c9d4d8444e219375569a95ba1aee9e6543f45c4411fd573c8cfdf0ff23" + }, + { + "id": "LMT70_AnalogTemperatureToAdc", + "family": "LMT70", + "implementation": "handwritten", + "title": "LMT70 AnalogTemperatureToAdc", + "description": "Reusable TI-reference block. The supply drives LMT70 VDD and T_ON and the MCU VDD endpoint; LMT70 TAO drives the MCU ADC endpoint; a separate 1.5-V rail drives the MCU VREF endpoint; LMT70 GND is grounded.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/LMT70", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/LMT70/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/LMT70/datasheet/application_and_implementation#SNIS1884528", + "figureUrl": "https://www.ti.com/ods/images/SNIS187A/Schem_03_SNIS187.gif", + "figure": "Schem_03_SNIS187", + "figureCaption": "Typical Application Schematic", + "pdfPage": 16, + "documentRevision": "SNIS187A", + "scope": "Complete LMT70 side of TI's typical application: 2.2-V to 3.6-V supply shared by VDD and T_ON, TAO to the MSP430 ADC endpoint, ground, and the separate 1.5-V MSP430 reference endpoint with source-relative placement." + }, + "sourceFile": "LMT70_AnalogTemperatureToAdc.circuit.tsx", + "sourceSha256": "7c9278ac7a0e93785ecdd5b31be7bf1aec4a6b4b795eabd6ca3f0a01f8090829" + }, + { + "id": "MSPM0C1103_AdcInputNetwork", + "family": "MSPM0C1103", + "implementation": "handwritten", + "title": "MSPM0C1103 AdcInputNetwork", + "description": "Reusable TI-reference block. Vin passes through parasitic Rpar/R1, with Cpar/C1 shunting the intermediate node to ground, then through Rin/R2 to U1.PA0. The U1 symbol reproduces TI's CI, S1, CS/H and 12-bit SAR equivalent model.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/MSPM0C1103", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/MSPM0C1103/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/MSPM0C1103/datasheet/GUID-C6FF21A8-FE93-4A88-B508-50BE3DEF8658#GUID-00AF94FF-7D7E-47C5-922F-56E845B3A5FD", + "figureUrl": "https://www.ti.com/ods/images/SLASF90D/GUID-51401E88-ED97-42E3-BA03-EBE514B1C1ED-low.svg", + "figure": "Figure 7-2", + "figureCaption": "Figure 7-2 MSPM0C1104/MSPM0C1103 ADC Input Network", + "pdfPage": 21, + "documentRevision": "SLASF90D, October 2023, revised January 2026", + "scope": "Complete Figure 7-2 ADC input equivalent network: external Rpar/Cpar and Rin feeding PA0, plus the internal CI, S1, CS/H, and 12-bit SAR representation. Numerical external R/C values are illustrative because TI directs the designer to device characteristics and the external ADC-input circuit." + }, + "sourceFile": "MSPM0C1103_AdcInputNetwork.circuit.tsx", + "sourceSha256": "d47011dec82c9229559fa0f838c66dcac7038c44461fe378280a4d3b2d23e34b" + }, + { + "id": "OPA320_SecondOrderLowPassFilter", + "family": "OPA320", + "implementation": "handwritten", + "title": "OPA320 SecondOrderLowPassFilter", + "description": "Reusable TI-reference block. VIN -> R1 -> R2 -> U1 IN-; C1 shunts the R1/R2 node to ground; R3 returns OUT to the R1/R2 node; C2 returns OUT to U1 IN-; U1 IN+ is grounded; OUT is exposed as VOUT.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/OPA320", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/OPA320/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/OPA320/datasheet/application-and-implementation#SBOS5132327", + "figureUrl": "https://www.ti.com/ods/images/SBOS513F/ai_2order_lopass_filt_bos513.gif", + "figure": "Figure 45", + "figureCaption": "Second-Order, Butterworth, 500-kHz, Low-Pass Filter", + "pdfPage": 26, + "documentRevision": "SBOS513F", + "scope": "External Figure 45 signal path, all five passive values, op-amp polarity/orientation, feedback branches, rails, and relative placement. The physical OPA320S shutdown input is tied to V+ electrically but intentionally omitted from the visible signal-path drawing, as in TI's figure." + }, + "sourceFile": "OPA320_SecondOrderLowPassFilter.circuit.tsx", + "sourceSha256": "d5adfa0bf41dd499feaff4f0cc63579b6a20e1ac8a99040bdda68654540c6269" + }, + { + "id": "OPA333_ThermistorBridge", + "family": "OPA333", + "implementation": "handwritten", + "title": "OPA333 ThermistorBridge", + "description": "Reusable TI-reference block. The left bridge midpoint drives U1 IN+; the 60-kohm/NTC midpoint drives U1 IN-; 100-kohm RF returns VOUT to IN-; bridge and op-amp share 3 V and ground.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/OPA333", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/OPA333/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/OPA333/datasheet/application_and_implementation#SBOS3519103", + "figureUrl": "https://www.ti.com/ods/images/SBOS351E/ai_measure_tmp_bos351.gif", + "figure": "ai_measure_tmp_bos351", + "figureCaption": "Temperature Measurement", + "pdfPage": 20, + "documentRevision": "SBOS351E", + "scope": "Complete TI temperature-measurement bridge: two 1-Mohm arms, 60-kohm arm, NTC thermistor arm, 100-kohm feedback, 3-V excitation, op-amp polarity/orientation, and relative placement." + }, + "sourceFile": "OPA333_ThermistorBridge.circuit.tsx", + "sourceSha256": "5776b897c3b9a89773fe793b4c7fc85d840d0eec9b0dd75704f47bc7a68f6e16" + }, { "id": "OPA371D_LowSideCurrentSense", "family": "OPA371D", @@ -241,6 +535,216 @@ } ] }, + { + "id": "SN65HVD3082E_MultipointRS485Network", + "family": "SN65HVD3082E", + "implementation": "handwritten", + "title": "SN65HVD3082E MultipointRS485Network", + "description": "Reusable TI-reference block. Four transceivers share RS485_A/RS485_B; U1 and U2 are the two end nodes with 120-ohm R1/R2 termination, while U3 and U4 are unterminated midpoint drops.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/SN65HVD3082E", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/SN65HVD3082E/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/SN65HVD3082E/datasheet/GUID-8E8196FF-15F5-4B69-A41E-7D9DBA30E79E#TITLE-SLLS562SLLS5621905", + "figureUrl": "https://www.ti.com/ods/images/SLLS562O/GUID-F8DF2F0D-9F11-4160-A7FF-A80DEBF80CB0-low.gif", + "figure": "Figure 9-2", + "figureCaption": "Figure 9-2 SN65HVD3082E/SN75HVD3082E/SN65HVD3085E/SN65HVD3088E Typical Application Circuit", + "pdfPage": 19, + "documentRevision": "SLLS562O, August 2009, revised July 2023", + "scope": "Complete Figure 9-2 four-node differential-bus topology and relative placement: two terminated end nodes and two short unterminated midpoint drops. The logic-side R, nRE, DE, and D pins remain exposed, matching the figure." + }, + "sourceFile": "SN65HVD3082E_MultipointRS485Network.circuit.tsx", + "sourceSha256": "7873f4ccb630068381e71b4c4063510fc9130d73de65d2824fab6097ff4aac20" + }, + { + "id": "SN74AHC1G14_SwitchDebouncer", + "family": "SN74AHC1G14", + "implementation": "handwritten", + "title": "SN74AHC1G14 SwitchDebouncer", + "description": "Reusable TI-reference block. VCC pull-up R1 and grounded pushbutton SW1 share the U1.A debounce node; the inverting Schmitt output U1.Y drives MCU.GPIO_IN.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/SN74AHC1G14", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/SN74AHC1G14/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/SN74AHC1G14/datasheet/GUID-73F0AF56-7849-48C4-9A81-C7F828BB61AE#TITLE-SCLS321SCLS3214279", + "figureUrl": "https://www.ti.com/ods/images/SCLS321S/GUID-BFCCD851-C35C-49FD-86C3-862D2F369B7D-low.gif", + "figure": "Figure 8-1", + "figureCaption": "Figure 8-1 SN74AHC1G14 Switch Debouncer", + "pdfPage": 9, + "documentRevision": "SCLS321S, March 1996, revised February 2024", + "scope": "Complete Figure 8-1 external signal topology and relative placement: grounded physical pushbutton, VCC pull-up, inverting Schmitt trigger, and symbolic microprocessor input. Package supply pins are outside the figure's implemented scope." + }, + "sourceFile": "SN74AHC1G14_SwitchDebouncer.circuit.tsx", + "sourceSha256": "27a5bbb8c29638b046c951828cb2b7098bf2acb4c580c78f2851fdc413a19825" + }, + { + "id": "SN74AUP1G17_TurnOnPulseGenerator", + "family": "SN74AUP1G17", + "implementation": "handwritten", + "title": "SN74AUP1G17 TurnOnPulseGenerator", + "description": "Reusable TI-reference block. R1 pulls the timing node to VCC, C1 returns it to GND, the timing node drives U1.A, and U1.Y is exposed as VO.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/SN74AUP1G17", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/SN74AUP1G17/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/SN74AUP1G17/datasheet/application-and-implementation#x5214", + "figureUrl": "https://www.ti.com/ods/images/SCES579J/sces579_app1.gif", + "figure": "Figure 8", + "figureCaption": "Figure 8. SN74AUP1G17 Turn-On Pulse Generator (Normally High Output)", + "pdfPage": 14, + "documentRevision": "SCES579J, June 2004, revised September 2017", + "scope": "Complete Figure 8 external RC timing topology and relative placement through the non-inverting Schmitt buffer to VO. TI does not label numerical R or C values in the figure, so 100 kohm and 100 nF are illustrative placeholders." + }, + "sourceFile": "SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx", + "sourceSha256": "4fb55f1452df46381f3fa8bbc9c5b219aa20576f4dc5b4797680af736a585922" + }, + { + "id": "TCAN1044A_5VCanInterface", + "family": "TCAN1044A-Q1", + "implementation": "handwritten", + "title": "TCAN1044A 5VCanInterface", + "description": "Reusable TI-reference block. Generic 5-V regulator U2 powers CAN-FD MCU U3 and transceiver U1; TXD/RXD/STB connect between U3 and U1; CANH/CANL feed optional split R1/R2/C4 termination and D1/D2 ESD branches.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/TCAN1044A-Q1", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TCAN1044A-Q1/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TCAN1044A-Q1/datasheet/GUID-1E00ADFE-29F6-4F59-8BC4-F7463D69B4D9#TITLE-SLLSF17X3660", + "figureUrl": "https://www.ti.com/ods/images/SLLSFJ3D/GUID-20210601-CA0I-KHQN-GM0J-TJ06VSGMRGQJ-low.gif", + "figure": "Figure 9-1", + "figureCaption": "Figure 9-1 TCAN1044A-Q1 Transceiver Application Using 5V IO Connections", + "pdfPage": 22, + "documentRevision": "SLLSFJ3D, August 2023, revised October 2024", + "scope": "Figure 9-1 regulator-to-MCU-to-transceiver signal and supply topology, including the optional split-termination and ESD branches. The regulator and MCU are symbolic functional blocks; unlabeled bypass, filter, and ESD values use explicit example placeholders." + }, + "sourceFile": "TCAN1044A_5VCanInterface.circuit.tsx", + "sourceSha256": "b46c2ce3ae7fc7032e3a2814ebbe138f87cd14db0fd17423c02f67c02c422c59" + }, + { + "id": "TLV755P_TypicalApplication", + "family": "TLV755P", + "implementation": "handwritten", + "title": "TLV755P TypicalApplication", + "description": "Reusable TI-reference block. DC/DC output feeds U1.IN and CIN; U1.OUT feeds COUT and the load; U1.GND, CIN, COUT, converter return, and load return share GND; U1.EN is shown with the TI ON/OFF switch geometry.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tlv755p.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TLV755P/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TLV755P/datasheet/GUID-A60AABD1-BE43-4C40-A985-E24337DDEC89#TITLE-SBVS320X1395", + "figureUrl": "https://www.ti.com/ods/images/SBVS320D/GUID-0BCA8AAE-CBC2-4E39-90C5-FF3DE67E3CE3-low.gif", + "figure": "Figure 7-4", + "figureCaption": "TLV755P Typical Application", + "pdfPage": 19, + "documentRevision": "SBVS320D", + "scope": "Recreates Figure 7-4 from the DC/DC-converter source through the 1-uF input capacitor, TLV755P enable switch, 1-uF output capacitor, shared return, and load block; device operating curves and PCB layout are out of scope." + }, + "sourceFile": "TLV755P_TypicalApplication.circuit.tsx", + "sourceSha256": "40e3a4045c44fe577811dfdf9680d0c462599a102de7fac5d9461341308a3841" + }, + { + "id": "TMP102_TwoWireTemperatureSensor", + "family": "TMP102", + "implementation": "handwritten", + "title": "TMP102 TwoWireTemperatureSensor", + "description": "Reusable TI-reference block. SCL, SDA, and ALERT each connect to a host endpoint and a 5-kohm supply pullup; V+ is bypassed with 0.01 uF; ADD0 and GND are grounded.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/TMP102", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TMP102/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TMP102/datasheet/GUID-D9972B9C-7EB3-403C-81AA-258B0C731BF1#TITLE-SBOS397SBOS3979928", + "figureUrl": "https://www.ti.com/ods/images/SBOS397I/GUID-20240603-SS0I-I73J-3VFC-EL12H6FVKUPM-low.svg", + "figure": "Figure 7-1", + "figureCaption": "Typical Connections", + "pdfPage": 20, + "documentRevision": "SBOS397I", + "scope": "All Figure 7-1 external connections and values: 1.4-V to 3.6-V supply, three 5-kohm pullups, 0.01-uF bypass, SCL/SDA/ALERT host endpoints, ADD0 grounding, device grounding, and relative placement." + }, + "sourceFile": "TMP102_TwoWireTemperatureSensor.circuit.tsx", + "sourceSha256": "d31cb90beb3f4d39ed61174158d8d2effd012077a40d73a48aabeaca828e6193" + }, + { + "id": "TPS22919_LoadSwitchTypicalApplication", + "family": "TPS22919", + "implementation": "handwritten", + "title": "TPS22919 LoadSwitchTypicalApplication", + "description": "Reusable TI-reference block. VIN source and CIN feed U1.IN; U1.OUT feeds CL and RL; U1.QOD returns through RQOD; the source, capacitors, load, and U1.GND share GND; U1.ON uses the H/L switch shown by TI.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tps22919.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS22919/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS22919/datasheet/typical-application-slvsdw88965#SLVSDW88965", + "figureUrl": "https://www.ti.com/ods/images/SLVSEN5B/Typical%20Application.jpg", + "figure": "Figure 30", + "figureCaption": "TPS22919 Typical Application Schematic", + "pdfPage": 15, + "documentRevision": "SLVSEN5B", + "scope": "Recreates Figure 30 with the 3.3-V source, CIN, H/L ON control, TPS22919, QOD resistor, CL, and RL; transient plots and layout guidance are out of scope." + }, + "sourceFile": "TPS22919_LoadSwitchTypicalApplication.circuit.tsx", + "sourceSha256": "c8721280286bfec06a3f132371dfd523d09e5492a359698145613d4b2d5e491f" + }, + { + "id": "TPS61165_WhiteLedDriver", + "family": "TPS61165", + "implementation": "handwritten", + "title": "TPS61165 WhiteLedDriver", + "description": "Reusable TI-reference block. VIN feeds C1, U1.VIN, and L1; the L1/D1 boost path feeds C2 and the LED string; the LED-string return feeds U1.FB and Rset; U1.COMP uses 220 nF; U1.CTRL is the dimming input; GND and EP return to GND.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tps61165.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS61165/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS61165/datasheet/device-images-dv#SLVS791179", + "figureUrl": "https://www.ti.com/ods/images/SLVS790E/typ_app_lvs790.gif", + "figure": "typ_app_lvs790", + "figureCaption": "TPS61165 Typical Application", + "pdfPage": 1, + "documentRevision": "SLVS790E", + "scope": "Recreates the front-page typical application with 5-V input, C1, 10-uH L1, D1, C2, three series white LEDs, 0.57-ohm Rset, 220-nF COMP capacitor, CTRL input, and both ground returns." + }, + "sourceFile": "TPS61165_WhiteLedDriver.circuit.tsx", + "sourceSha256": "22f5b7562ec3d5f202c9fb22a5f452f74f0c9111a01f84157f96ee6c051a848b" + }, + { + "id": "TPS61299_5VBoostConverter", + "family": "TPS61299", + "implementation": "handwritten", + "title": "TPS61299 5VBoostConverter", + "description": "Reusable TI-reference block. VIN feeds CIN, U1.VIN, and L1; L1 feeds U1.SW; U1.VOUT and VSEL share the output node with COUT; U1.GND and both capacitors return to GND; EN is drawn with TI's ON/OFF switch.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tps61299.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS61299/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS61299/datasheet/GUID-58D9AC58-BA8A-4213-8A50-02600AB29320#TITLE-SLVSFH6LIT81756302", + "figureUrl": "https://www.ti.com/ods/images/SLVSGS9G/GUID-20230315-SS0I-SNWQ-NK7H-W5SZXM5FNTJP-low.svg", + "figure": "Figure 8-1", + "figureCaption": "3.6-V Input Source to 5-V Boost Converter Under Fast Mode", + "pdfPage": 19, + "documentRevision": "SLVSGS9G", + "scope": "Recreates Figure 8-1's 1-uH boost path, 10-uF input/output capacitors, VSEL-to-output strap, enable switch, and 5-V output; performance plots are out of scope." + }, + "sourceFile": "TPS61299_5VBoostConverter.circuit.tsx", + "sourceSha256": "9d75992a0dd20161f82d13d726d5d7b32f3eb38f492660ba4c020551969a5718" + }, + { + "id": "TPS62A01_1V8BuckConverter", + "family": "TPS62A01", + "implementation": "handwritten", + "title": "TPS62A01 1V8BuckConverter", + "description": "Reusable TI-reference block. VIN feeds U1.VIN, U1.EN, CIN, and R4; U1.SW feeds L1 and the VOUT rail; R1/R2/C3 form the FB network; R4 pulls up PG to VIN and exposes VPG; CIN, C2, R2, and U1.GND return to GND.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tps62a01.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS62A01/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS62A01/datasheet/GUID-06EEF0EC-A818-4AA6-882B-D38430C06600#GUID-08F7A30E-83A5-49DC-B0D2-6FEF78ECD8D8", + "figureUrl": "https://www.ti.com/ods/images/SLUSEG9E/GUID-20230310-SS0I-R5NB-L5XF-FBXFT6BWQ4KP-low.svg", + "figure": "Figure 8-1", + "figureCaption": "TPS62A01 Typical Application Circuit", + "pdfPage": 11, + "documentRevision": "SLUSEG9E", + "scope": "Recreates Figure 8-1 for the 1.8-V/1-A option, including CIN, L1, R1/R2 feedback divider, C3 feed-forward capacitor, C2, EN-to-VIN strap, and R4/VPG branch." + }, + "sourceFile": "TPS62A01_1V8BuckConverter.circuit.tsx", + "sourceSha256": "539393690204c54a8e393b54ef2e22e77cf0a952761a15f32f0edb4792791d0a" + }, { "id": "TPS7A20_TypicalApplication", "family": "TPS7A20", @@ -260,28 +764,49 @@ "scope": "Complete Figure 7-4 topology and placement using the fixed 2.8 V device and Table 7-1 capacitor values." }, "sourceFile": "TPS7A20_TypicalApplication.circuit.tsx", - "sourceSha256": "ac09f173026d924911caa707a7f4e36aa16c29c897ce361eea3115ef8833fe5e" + "sourceSha256": "85ef12c7c0237515259e633588ae1f16d7130cbb57e97ac3e43ff3017a1ebabf" }, { - "id": "LM358B_InvertingAmplifier", - "family": "LM358B", + "id": "TPS92612_LinearLedDriver", + "family": "TPS92612", "implementation": "handwritten", - "title": "LM358B Inverting-Amplifier Application", - "description": "A hand-authored schematic rendering of TI's inverting-amplifier application using the worked-example RI and RF values.", + "title": "TPS92612 LinearLedDriver", + "description": "Reusable TI-reference block. The supply rail feeds CSUPPLY, U1.SUPPLY, and RSNS; RSNS feeds U1.IN; U1.OUT drives the series LED string; COUT spans OUT to the LED-string ground; U1.GND and CSUPPLY return to GND; PWM is exposed at U1.PWM.", "evidence": { "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/LM358B", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/LM358B/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/LM358B/datasheet/GUID-9C4C5A40-20A9-49A2-B940-96F8AF83307C", - "figureUrl": "https://www.ti.com/ods/images/SLOS068AB/GUID-222A75A4-1DA7-47D5-BEE4-7956753D9B15-low.gif", + "datasheetUrl": "https://www.ti.com/lit/ds/symlink/tps92612.pdf", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TPS92612/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TPS92612/datasheet/description-slds2335709#SLDS2332042", + "figureUrl": "https://www.ti.com/ods/images/SLVSFG3/tps92612-typical-application-diagram.gif", + "figure": "tps92612-typical-application-diagram", + "figureCaption": "TPS92612 Typical Application Diagram", + "pdfPage": 1, + "documentRevision": "SLVSFG3", + "scope": "Recreates the front-page typical application with the 4.5-V-to-40-V rail, supply capacitor, PWM input, high-side R(SNS), C(OUT), and three-LED string to ground." + }, + "sourceFile": "TPS92612_LinearLedDriver.circuit.tsx", + "sourceSha256": "fcd07ad59f5dc5b8853d5fd75ac07018d6278e3caf418a875a8ca618d1d564c6" + }, + { + "id": "TRS3232E_TypicalOperatingCircuit", + "family": "TRS3232E", + "implementation": "handwritten", + "title": "TRS3232E TypicalOperatingCircuit", + "description": "Reusable TI-reference block. C1 and C2 are the two charge-pump flying capacitors; C3 and C4 are the V+/V- reservoirs to ground; C5 bypasses VCC; both RS-232 channels remain exposed as in the TI operating figure.", + "evidence": { + "kind": "ti-datasheet-typical-application", + "datasheetUrl": "https://www.ti.com/lit/gpn/TRS3232E", + "documentViewerRootUrl": "https://www.ti.com/document-viewer/TRS3232E/datasheet", + "sectionUrl": "https://www.ti.com/document-viewer/TRS3232E/datasheet/GUID-053CAD17-BC69-4139-BDE3-BAE1B00ED46F#TITLE-SLLS790SLLS410300", + "figureUrl": "https://www.ti.com/ods/images/SLLS790E/GUID-6C8B4B54-E0F2-409E-B581-B13949C009DB-low.gif", "figure": "Figure 8-1", - "figureCaption": "Application Schematic", - "pdfPage": 27, - "documentRevision": "SLOS068AB", - "scope": "Figure 8-1 inverting-amplifier topology and placement with section 8.2.2 worked values RI=10 kohm and RF=36 kohm." + "figureCaption": "Figure 8-1 TRS3232E Typical Operating Circuit and Capacitor Values", + "pdfPage": 13, + "documentRevision": "SLLS790E, June 2007, revised December 2024", + "scope": "Complete Figure 8-1 external charge-pump and bypass-capacitor topology with both RS-232 channels exposed. Capacitors use the 0.1-uF values specified by Figure 8-1/Table 8-1 for a 3.3-V supply." }, - "sourceFile": "LM358B_InvertingAmplifier.circuit.tsx", - "sourceSha256": "7efdea6837019397b5737f09fbb05f321f91b94f435c3aaa34db26eaf8a5f30d" + "sourceFile": "TRS3232E_TypicalOperatingCircuit.circuit.tsx", + "sourceSha256": "309999ed966cb57693436ec44ead24b1251738f39a820667497a92f2354c8447" } ] } diff --git a/index.ts b/index.ts index bd7ba699..034d711a 100644 --- a/index.ts +++ b/index.ts @@ -84,6 +84,7 @@ import { RFIDReader_TRF7960 } from "./lib/subcircuits/RFIDReader_TRF7960.circuit import { FlashMemory_W25Q128JVSIQ } from "./lib/subcircuits/FlashMemory_W25Q128JVSIQ.circuit.tsx"; export * from "./lib/chips/index.tsx"; +export * from "./examples/index.ts"; export { BatteryManagement_BQ24072, diff --git a/lib/chips/DRV8833.tsx b/lib/chips/DRV8833.tsx index 28c83227..557a6fe4 100644 --- a/lib/chips/DRV8833.tsx +++ b/lib/chips/DRV8833.tsx @@ -5,7 +5,7 @@ export const DRV8833_PIN_LABELS = { pin15: "AIN2", pin9: "BIN1", pin10: "BIN2", - pin1: "NSLEEEP", + pin1: ["NSLEEP", "NSLEEEP"], pin13: "GND", pin11: "VCP", pin2: "AOUT1", @@ -27,7 +27,7 @@ export const DRV8833 = (props: ChipProps) => ( jlcpcb: ["C50506"], }} schPinArrangement={{ - leftSide: ["AIN1", "AIN2", "BIN1", "BIN2", "NSLEEEP"], + leftSide: ["AIN1", "AIN2", "BIN1", "BIN2", "NSLEEP"], rightSide: [ "VCP", "AOUT1", diff --git a/scripts/generate-ti-reference-examples.ts b/scripts/generate-ti-reference-examples.ts index 11c456cc..9083270e 100644 --- a/scripts/generate-ti-reference-examples.ts +++ b/scripts/generate-ti-reference-examples.ts @@ -4,6 +4,7 @@ import { fileURLToPath } from "node:url"; import { getTiReferenceCoverage, isGeneratedTiReferenceExample, + renderTiReferenceBlockIndex, renderTiReferenceExample, type TiReferenceCatalogEntry, type TiGeneratedReferenceExample, @@ -122,9 +123,13 @@ const verifyFigureEvidence = async ( ); } const contentType = response.headers.get("content-type") ?? ""; - if (!contentType.toLowerCase().startsWith("image/")) { + const normalizedContentType = contentType.toLowerCase(); + if ( + !normalizedContentType.startsWith("image/") && + !normalizedContentType.startsWith("application/pdf") + ) { throw new Error( - `${example.family}: TI figure asset is not an image (${contentType || "missing content type"}): ${example.evidence.figureUrl}`, + `${example.family}: TI figure evidence is not an image or PDF (${contentType || "missing content type"}): ${example.evidence.figureUrl}`, ); } }; @@ -138,7 +143,7 @@ export const generateTiReferenceExamples = async ( const coverage = getTiReferenceCoverage(manifest, options.catalog); if (options.requireCompleteCatalog && coverage.unresolvedCount > 0) { throw new Error( - `Reference evidence is incomplete: ${coverage.supportedCount}/${coverage.catalogFamilies} families are verified; ${coverage.unresolvedCount} remain unresolved.`, + `Reference evidence is incomplete: ${coverage.catalogSupportedCount}/${coverage.catalogFamilies} catalog families are verified; ${coverage.unresolvedCount} remain unresolved.`, ); } if (options.verifyEvidence) { @@ -166,6 +171,25 @@ export const generateTiReferenceExamples = async ( const readText = options.readText ?? defaultReadText; const writeText = options.writeText ?? defaultWriteText; const formatSource = options.formatSource ?? defaultFormatSource; + const indexPath = join(options.repoRoot, "examples/index.ts"); + const indexSource = await formatSource( + renderTiReferenceBlockIndex(manifest), + indexPath, + ); + let currentIndexSource: string | undefined; + try { + currentIndexSource = await readText(indexPath); + } catch { + currentIndexSource = undefined; + } + if (options.check && currentIndexSource !== indexSource) { + throw new Error( + `${indexPath} is missing or stale; run bun scripts/generate-ti-reference-examples.ts`, + ); + } + if (!options.check && currentIndexSource !== indexSource) { + await writeText(indexPath, indexSource); + } const results: GeneratedTiReferenceExample[] = []; for (const example of examples) { await verifyComponentModule(example, options.repoRoot, readText); @@ -269,6 +293,6 @@ if (isMain) { `${cliOptions.check ? "Checked" : "Generated"} ${results.length} verified TI reference example(s); ${changedCount} ${cliOptions.check ? "stale" : "changed"}.`, ); console.log( - `Coverage: ${coverage.supportedCount}/${coverage.catalogFamilies} families verified; ${coverage.unresolvedCount} intentionally unresolved.`, + `Coverage: ${coverage.supportedCount} blocks, including ${coverage.catalogSupportedCount}/${coverage.catalogFamilies} sysblocks families; ${coverage.unresolvedCount} catalog families intentionally unresolved.`, ); } diff --git a/scripts/ti-reference-example-schema.test.ts b/scripts/ti-reference-example-schema.test.ts index 3e0da2c3..7c3de5e0 100644 --- a/scripts/ti-reference-example-schema.test.ts +++ b/scripts/ti-reference-example-schema.test.ts @@ -7,6 +7,7 @@ import { extractTiReferenceFigures, getTiReferenceCoverage, isGeneratedTiReferenceExample, + renderTiReferenceBlockIndex, renderTiReferenceExample, type TiReferenceCatalogEntry, type TiGeneratedReferenceExample, @@ -199,6 +200,16 @@ describe("TI reference-example schema and rendering", () => { assert.match(source, /Figure 7-1/); }); + test("renders the reusable block index from the manifest", () => { + const source = renderTiReferenceBlockIndex(makeManifest()); + assert.match( + source, + /import \{ OPA371D_LowSideCurrentSense \} from "\.\/OPA371D_LowSideCurrentSense\.circuit\.tsx";/, + ); + assert.match(source, /export const TiReferenceBlockComponents = \{/); + assert.match(source, /OPA371D_LowSideCurrentSense,/); + }); + test("rejects a non-first-party figure asset", () => { const manifest = makeManifest(); manifest.examples[0].evidence.figureUrl = @@ -244,6 +255,8 @@ describe("TI reference-example schema and rendering", () => { catalogFamilies: 2, supportedFamilies: ["OPA371D"], supportedCount: 1, + catalogSupportedFamilies: ["OPA371D"], + catalogSupportedCount: 1, unresolvedFamilies: ["UNRESOLVED"], unresolvedCount: 1, }); @@ -313,7 +326,7 @@ describe("TI reference-example generator", () => { catalog, requireCompleteCatalog: true, }), - /1\/2 families are verified; 1 remain unresolved/, + /1\/2 catalog families are verified; 1 remain unresolved/, ); }); }); @@ -329,6 +342,9 @@ describe("TI reference-example coverage validator", () => { if (path === "/repo/examples/OPA371D_LowSideCurrentSense.circuit.tsx") { return generatedSource; } + if (path === "/repo/examples/index.ts") { + return renderTiReferenceBlockIndex(manifest); + } if ( path === "/repo/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg" @@ -339,12 +355,11 @@ describe("TI reference-example coverage validator", () => { }; }; - test("validates committed artifacts while explicitly allowing partial rollout", async () => { + test("validates the committed reference-backed sample library", async () => { const coverage = await validateTiReferenceExamples({ repoRoot: "/repo", manifest: makeManifest(), catalog, - allowPartial: true, readText: makeVirtualReader(), formatSource: async (source) => source, listSnapshotNames: async () => [ @@ -355,12 +370,13 @@ describe("TI reference-example coverage validator", () => { assert.deepEqual(coverage.unresolvedFamilies, ["UNRESOLVED"]); }); - test("requires complete catalog coverage by default", async () => { + test("can require complete catalog coverage explicitly", async () => { await assert.rejects( validateTiReferenceExamples({ repoRoot: "/repo", manifest: makeManifest(), catalog, + requireComplete: true, readText: makeVirtualReader(), formatSource: async (source) => source, listSnapshotNames: async () => [ @@ -377,7 +393,6 @@ describe("TI reference-example coverage validator", () => { repoRoot: "/repo", manifest: makeManifest(), catalog, - allowPartial: true, readText: makeVirtualReader(), formatSource: async (source) => source, listSnapshotNames: async () => [], diff --git a/scripts/ti-reference-example-schema.ts b/scripts/ti-reference-example-schema.ts index 4040eb33..aaf3a12a 100644 --- a/scripts/ti-reference-example-schema.ts +++ b/scripts/ti-reference-example-schema.ts @@ -182,15 +182,20 @@ const assertPoint = (value: unknown, location: string): void => { const assertTiUrl = ( value: unknown, location: string, - expectedPathPrefix: string, + expectedPathPrefix: string | readonly string[], ): void => { assertNonEmptyString(value, location); const url = new URL(value); if (url.protocol !== "https:" || url.hostname !== "www.ti.com") { throw new Error(`${location} must be an https://www.ti.com URL`); } - if (!url.pathname.startsWith(expectedPathPrefix)) { - throw new Error(`${location} must start with ${expectedPathPrefix}`); + const expectedPathPrefixes = Array.isArray(expectedPathPrefix) + ? expectedPathPrefix + : [expectedPathPrefix]; + if (!expectedPathPrefixes.some((prefix) => url.pathname.startsWith(prefix))) { + throw new Error( + `${location} must start with ${expectedPathPrefixes.join(" or ")}`, + ); } }; @@ -227,11 +232,22 @@ const validateEvidence = ( `${location}.documentViewerRootUrl`, "/document-viewer/", ); - assertTiUrl(value.sectionUrl, `${location}.sectionUrl`, "/document-viewer/"); - assertTiUrl(value.figureUrl, `${location}.figureUrl`, "/ods/images/"); + assertTiUrl(value.sectionUrl, `${location}.sectionUrl`, [ + "/document-viewer/", + "/lit/", + ]); + assertTiUrl(value.figureUrl, `${location}.figureUrl`, [ + "/ods/images/", + "/lit/", + ]); assertNonEmptyString(value.figure, `${location}.figure`); - if (!/^Figure\s+\d+(?:[-.]\d+)+$/i.test(value.figure)) { - throw new Error(`${location}.figure must be an exact TI figure locator`); + if ( + !/^Figure\s+\d+(?:[-.]\d+)*$/i.test(value.figure) && + !/^[A-Za-z0-9][A-Za-z0-9_-]+$/.test(value.figure) + ) { + throw new Error( + `${location}.figure must be an exact TI figure number or legacy asset locator`, + ); } assertNonEmptyString(value.figureCaption, `${location}.figureCaption`); assertNonEmptyString(value.documentRevision, `${location}.documentRevision`); @@ -502,7 +518,11 @@ export const validateTiReferenceExampleManifest = ( throw new Error(`duplicate family ${rawExample.family}`); } families.add(rawExample.family); - if (catalogByFamily && !catalogByFamily.has(rawExample.family)) { + if ( + catalogByFamily && + !catalogByFamily.has(rawExample.family) && + rawExample.implementation !== "handwritten" + ) { throw new Error(`${location}.family is not present in the TI catalog`); } assertNonEmptyString(rawExample.title, `${location}.title`); @@ -1083,7 +1103,7 @@ import "tscircuit"; * ${sourceLines.map((line) => ` * ${line}`).join("\n")} */ -export default () => ( +export const ${example.id} = () => ( ${renderMainDevice(example.mainDevice)} ${sharedNets.length > 0 ? `\n\n${sharedNets.join("\n")}` : ""} @@ -1108,6 +1128,37 @@ ${example.traces ${annotations.length > 0 ? `\n\n${annotations.join("\n\n")}` : ""} ); + +export default ${example.id}; +`; +}; + +export const renderTiReferenceBlockIndex = ( + manifest: TiReferenceExampleManifest, +): string => { + const examples = [...manifest.examples].sort((left, right) => + left.id.localeCompare(right.id), + ); + const identifiers = examples.map((example) => example.id); + return `// Generated from examples/ti-reference-examples.json. +// Each export is a runnable, evidence-backed TI reference block. +${examples + .map( + (example) => `import { ${example.id} } from "./${example.id}.circuit.tsx";`, + ) + .join("\n")} + +export { +${identifiers.map((identifier) => ` ${identifier},`).join("\n")} +}; + +export const TiReferenceBlockComponents = { +${identifiers.map((identifier) => ` ${identifier},`).join("\n")} +} as const; + +export type TiReferenceBlockName = keyof typeof TiReferenceBlockComponents; +export type TiReferenceBlockComponent = + (typeof TiReferenceBlockComponents)[TiReferenceBlockName]; `; }; @@ -1119,6 +1170,10 @@ export const getTiReferenceCoverage = ( .map((example) => example.family) .sort((left, right) => left.localeCompare(right)); const supported = new Set(supportedFamilies); + const catalogFamilySet = new Set(catalog.map((entry) => entry.family)); + const catalogSupportedFamilies = supportedFamilies.filter((family) => + catalogFamilySet.has(family), + ); const unresolvedFamilies = catalog .map((entry) => entry.family) .filter((family) => !supported.has(family)) @@ -1127,6 +1182,8 @@ export const getTiReferenceCoverage = ( catalogFamilies: catalog.length, supportedFamilies, supportedCount: supportedFamilies.length, + catalogSupportedFamilies, + catalogSupportedCount: catalogSupportedFamilies.length, unresolvedFamilies, unresolvedCount: unresolvedFamilies.length, }; diff --git a/scripts/validate-ti-reference-examples.ts b/scripts/validate-ti-reference-examples.ts index 7beb3ff0..5b201cb2 100644 --- a/scripts/validate-ti-reference-examples.ts +++ b/scripts/validate-ti-reference-examples.ts @@ -26,7 +26,7 @@ export type ValidateTiReferenceExamplesOptions = { repoRoot: string; manifest: TiReferenceExampleManifest; catalog: readonly TiReferenceCatalogEntry[]; - allowPartial?: boolean; + requireComplete?: boolean; verifyEvidence?: boolean; readText?: (path: string) => Promise; listSnapshotNames?: (directory: string) => Promise; @@ -64,6 +64,13 @@ export const validateTiReferenceExamples = async ( `${example.family}: handwritten source is unreadable: ${sourcePath}`, ); } + const namedExport = new RegExp(`export\\s+const\\s+${example.id}\\b`); + const defaultExport = new RegExp(`export\\s+default\\s+${example.id}\\s*;`); + if (!namedExport.test(source) || !defaultExport.test(source)) { + throw new Error( + `${example.family}: ${example.sourceFile} must named-export ${example.id} and default-export the same reusable block`, + ); + } const sourceSha256 = createHash("sha256").update(source).digest("hex"); if (sourceSha256 !== example.sourceSha256) { throw new Error( @@ -105,16 +112,16 @@ export const validateTiReferenceExamples = async ( } const coverage = getTiReferenceCoverage(manifest, options.catalog); - if (!options.allowPartial && coverage.unresolvedCount > 0) { + if (options.requireComplete && coverage.unresolvedCount > 0) { throw new Error( - `TI reference-example coverage is incomplete: ${coverage.supportedCount}/${coverage.catalogFamilies} catalog families have a committed evidence-backed example and snapshot; ${coverage.unresolvedCount} are missing. Re-run with --allow-partial only for staged development.`, + `TI reference-example coverage is incomplete: ${coverage.catalogSupportedCount}/${coverage.catalogFamilies} catalog families have a committed evidence-backed example and snapshot; ${coverage.unresolvedCount} are missing. Remove --require-complete when validating the curated reference-backed sample library.`, ); } return coverage; }; type CliOptions = { - allowPartial: boolean; + requireComplete: boolean; verifyEvidence: boolean; manifestPath: string; catalogPath: string; @@ -122,14 +129,14 @@ type CliOptions = { const parseCliOptions = (arguments_: string[]): CliOptions => { const options: CliOptions = { - allowPartial: false, + requireComplete: false, verifyEvidence: false, manifestPath: defaultManifestPath, catalogPath: defaultCatalogPath, }; for (let index = 0; index < arguments_.length; index += 1) { const argument = arguments_[index]; - if (argument === "--allow-partial") options.allowPartial = true; + if (argument === "--require-complete") options.requireComplete = true; else if (argument === "--verify-evidence") options.verifyEvidence = true; else if (argument === "--manifest") { options.manifestPath = resolve(arguments_[index + 1]); @@ -162,13 +169,13 @@ if (isMain) { repoRoot: repositoryRoot, manifest, catalog: catalog as TiReferenceCatalogEntry[], - allowPartial: cliOptions.allowPartial, + requireComplete: cliOptions.requireComplete, verifyEvidence: cliOptions.verifyEvidence, }); console.log( - `Validated ${coverage.supportedCount}/${coverage.catalogFamilies} TI catalog families; ${coverage.unresolvedCount} missing.`, + `Validated ${coverage.supportedCount} evidence-backed TI reference block(s). Sysblocks catalog sampling: ${coverage.catalogSupportedCount}/${coverage.catalogFamilies}; unsupported or unselected families are skipped.`, ); - if (coverage.unresolvedCount > 0) { + if (cliOptions.requireComplete && coverage.unresolvedCount > 0) { console.log(`Committed: ${coverage.supportedFamilies.join(", ")}`); console.log(`Missing: ${coverage.unresolvedFamilies.join(", ")}`); } From 441db5d01269ca45409211c6b8bcd877a85ce3d9 Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 17:49:27 -0700 Subject: [PATCH 7/8] Drop unstable TRS3232E reference block --- README.md | 4 +- ...S3232E_TypicalOperatingCircuit.circuit.tsx | 111 ------------------ ...peratingCircuit.circuit-schematic.snap.svg | 68 ----------- examples/index.ts | 3 - examples/ti-reference-examples.json | 21 ---- 5 files changed, 2 insertions(+), 205 deletions(-) delete mode 100644 examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx delete mode 100644 examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg diff --git a/README.md b/README.md index 7f937829..37dcbaa7 100644 --- a/README.md +++ b/README.md @@ -274,10 +274,10 @@ schematics. Their checked-in snapshots are schematic-only so the reference component placement and wiring can be reviewed without running analog simulations or generating PCB output. -The curated set currently contains 28 evidence-backed blocks spanning power +The curated set currently contains 27 evidence-backed blocks spanning power regulation, battery charging, load switching, LED and motor driving, op-amp filters and bridges, current and temperature sensing, ADC front ends, logic, -CAN, RS-485, RS-232, clocks, wireless, microcontrollers, and timing. Every file +CAN, RS-485, clocks, wireless, microcontrollers, and timing. Every file named-exports its reusable block and default-exports the same component. They are also available from the package entrypoint and from the typed `TiReferenceBlockComponents` map: diff --git a/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx b/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx deleted file mode 100644 index 1de0f0ab..00000000 --- a/examples/TRS3232E_TypicalOperatingCircuit.circuit.tsx +++ /dev/null @@ -1,111 +0,0 @@ -import "tscircuit"; -import { TRS3232EIRGTR } from "../lib/chips/TRS3232EIRGTR.tsx"; - -/** - * TI SLLS790E, Figure 8-1, "Typical Operating Circuit and Capacitor Values". - * Section: https://www.ti.com/document-viewer/TRS3232E/datasheet/GUID-053CAD17-BC69-4139-BDE3-BAE1B00ED46F#TITLE-SLLS790SLLS410300 - * Figure: https://www.ti.com/ods/images/SLLS790E/GUID-6C8B4B54-E0F2-409E-B581-B13949C009DB-low.gif - * - * The two flying capacitors and positive/negative reservoir capacitors remain - * on the left of the transceiver. The VCC bypass capacitor remains upper-right. - */ -export const TRS3232E_TypicalOperatingCircuit = () => ( - - - - - - - - - - - - - - - - - - - - - - -); - -export default TRS3232E_TypicalOperatingCircuit; diff --git a/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg b/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg deleted file mode 100644 index 66037425..00000000 --- a/examples/__snapshots__/TRS3232E_TypicalOperatingCircuit.circuit-schematic.snap.svg +++ /dev/null @@ -1,68 +0,0 @@ -TRS3232EIRGTRU11C1_NEG2C2_POS3C2_NEG4V_NEG5DOUT26RIN27ROUT28DIN29DIN110ROUT111RIN112DOUT113GND14VCC15V_POS16C1_POSC1100nFC2100nFC3100nFC4100nFC5100nFU1_C1_NEGU1_C1_NEGU1_C2_POSU1_C2_POSU1_C2_NEGU1_C2_NEGGNDGNDVCCU1_V_POSU1_V_POS \ No newline at end of file diff --git a/examples/index.ts b/examples/index.ts index 432516f0..01478025 100644 --- a/examples/index.ts +++ b/examples/index.ts @@ -27,7 +27,6 @@ import { TPS61299_5VBoostConverter } from "./TPS61299_5VBoostConverter.circuit.t import { TPS62A01_1V8BuckConverter } from "./TPS62A01_1V8BuckConverter.circuit.tsx"; import { TPS7A20_TypicalApplication } from "./TPS7A20_TypicalApplication.circuit.tsx"; import { TPS92612_LinearLedDriver } from "./TPS92612_LinearLedDriver.circuit.tsx"; -import { TRS3232E_TypicalOperatingCircuit } from "./TRS3232E_TypicalOperatingCircuit.circuit.tsx"; export { ADS1015L_DualSupplyMonitor, @@ -57,7 +56,6 @@ export { TPS62A01_1V8BuckConverter, TPS7A20_TypicalApplication, TPS92612_LinearLedDriver, - TRS3232E_TypicalOperatingCircuit, }; export const TiReferenceBlockComponents = { @@ -88,7 +86,6 @@ export const TiReferenceBlockComponents = { TPS62A01_1V8BuckConverter, TPS7A20_TypicalApplication, TPS92612_LinearLedDriver, - TRS3232E_TypicalOperatingCircuit, } as const; export type TiReferenceBlockName = keyof typeof TiReferenceBlockComponents; diff --git a/examples/ti-reference-examples.json b/examples/ti-reference-examples.json index 129840a2..76e12f83 100644 --- a/examples/ti-reference-examples.json +++ b/examples/ti-reference-examples.json @@ -786,27 +786,6 @@ }, "sourceFile": "TPS92612_LinearLedDriver.circuit.tsx", "sourceSha256": "fcd07ad59f5dc5b8853d5fd75ac07018d6278e3caf418a875a8ca618d1d564c6" - }, - { - "id": "TRS3232E_TypicalOperatingCircuit", - "family": "TRS3232E", - "implementation": "handwritten", - "title": "TRS3232E TypicalOperatingCircuit", - "description": "Reusable TI-reference block. C1 and C2 are the two charge-pump flying capacitors; C3 and C4 are the V+/V- reservoirs to ground; C5 bypasses VCC; both RS-232 channels remain exposed as in the TI operating figure.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/TRS3232E", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/TRS3232E/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/TRS3232E/datasheet/GUID-053CAD17-BC69-4139-BDE3-BAE1B00ED46F#TITLE-SLLS790SLLS410300", - "figureUrl": "https://www.ti.com/ods/images/SLLS790E/GUID-6C8B4B54-E0F2-409E-B581-B13949C009DB-low.gif", - "figure": "Figure 8-1", - "figureCaption": "Figure 8-1 TRS3232E Typical Operating Circuit and Capacitor Values", - "pdfPage": 13, - "documentRevision": "SLLS790E, June 2007, revised December 2024", - "scope": "Complete Figure 8-1 external charge-pump and bypass-capacitor topology with both RS-232 channels exposed. Capacitors use the 0.1-uF values specified by Figure 8-1/Table 8-1 for a 3.3-V supply." - }, - "sourceFile": "TRS3232E_TypicalOperatingCircuit.circuit.tsx", - "sourceSha256": "309999ed966cb57693436ec44ead24b1251738f39a820667497a92f2354c8447" } ] } From 6c07d82c8cc77c26a62d7934fa8634c530e5c853 Mon Sep 17 00:00:00 2001 From: seveibar Date: Sat, 22 Aug 2026 19:12:57 -0700 Subject: [PATCH 8/8] Autoroute TI reference example schematics --- README.md | 12 +- .../ADS1015L_DualSupplyMonitor.circuit.tsx | 251 -------- .../ADS7042_DirectSensorInterface.circuit.tsx | 38 +- .../BQ25185_TypicalBatteryCharger.circuit.tsx | 555 ++++++------------ ...C2340R5MODA_TypicalApplication.circuit.tsx | 25 +- .../DRV8833_ParallelMotorDriver.circuit.tsx | 507 +++------------- examples/INA138_BasicCurrentSense.circuit.tsx | 15 - ...A181_BidirectionalCurrentSense.circuit.tsx | 303 ---------- .../LM358B_InvertingAmplifier.circuit.tsx | 288 +++------ .../LMC555_MonostableLedFlasher.circuit.tsx | 236 ++++---- examples/LMK1C1104_ClockFanout.circuit.tsx | 37 +- .../LMT70_AnalogTemperatureToAdc.circuit.tsx | 32 +- .../MSPM0C1103_AdcInputNetwork.circuit.tsx | 194 ------ ...PA320_SecondOrderLowPassFilter.circuit.tsx | 188 +----- examples/OPA333_ThermistorBridge.circuit.tsx | 255 -------- .../OPA371D_LowSideCurrentSense.circuit.tsx | 33 +- ...VD3082E_MultipointRS485Network.circuit.tsx | 171 ------ .../SN74AHC1G14_SwitchDebouncer.circuit.tsx | 74 +-- ...74AUP1G17_TurnOnPulseGenerator.circuit.tsx | 57 +- examples/TCAN1044A_5VCanInterface.circuit.tsx | 17 +- .../TLV755P_TypicalApplication.circuit.tsx | 244 +++----- ...MP102_TwoWireTemperatureSensor.circuit.tsx | 187 ------ ...9_LoadSwitchTypicalApplication.circuit.tsx | 203 +++---- examples/TPS61165_WhiteLedDriver.circuit.tsx | 388 ++++-------- .../TPS61299_5VBoostConverter.circuit.tsx | 272 +++------ .../TPS62A01_1V8BuckConverter.circuit.tsx | 372 +++--------- .../TPS7A20_TypicalApplication.circuit.tsx | 255 ++------ examples/TPS92612_LinearLedDriver.circuit.tsx | 270 ++------- ...alSupplyMonitor.circuit-schematic.snap.svg | 12 - ...SensorInterface.circuit-schematic.snap.svg | 4 +- ...lBatteryCharger.circuit-schematic.snap.svg | 4 +- ...eaker_CC2564C_TAS2505.circuit-pcb.snap.svg | 1 - ...icalApplication.circuit-schematic.snap.svg | 88 +-- ...llelMotorDriver.circuit-schematic.snap.svg | 32 +- ...sicCurrentSense.circuit-schematic.snap.svg | 4 +- ...nalCurrentSense.circuit-schematic.snap.svg | 12 - ...ertingAmplifier.circuit-schematic.snap.svg | 4 +- ...tableLedFlasher.circuit-schematic.snap.svg | 4 +- ...104_ClockFanout.circuit-schematic.snap.svg | 2 +- ...emperatureToAdc.circuit-schematic.snap.svg | 4 +- ...AdcInputNetwork.circuit-schematic.snap.svg | 12 - ...erLowPassFilter.circuit-schematic.snap.svg | 4 +- ...hermistorBridge.circuit-schematic.snap.svg | 12 - ...ideCurrentSense.circuit-schematic.snap.svg | 4 +- ...intRS485Network.circuit-schematic.snap.svg | 12 - ...SwitchDebouncer.circuit-schematic.snap.svg | 4 +- ...nPulseGenerator.circuit-schematic.snap.svg | 4 +- ..._5VCanInterface.circuit-schematic.snap.svg | 160 ++--- ...icalApplication.circuit-schematic.snap.svg | 4 +- ...mperatureSensor.circuit-schematic.snap.svg | 12 - ...icalApplication.circuit-schematic.snap.svg | 4 +- ..._WhiteLedDriver.circuit-schematic.snap.svg | 11 +- ...VBoostConverter.circuit-schematic.snap.svg | 4 +- ...V8BuckConverter.circuit-schematic.snap.svg | 4 +- ...icalApplication.circuit-schematic.snap.svg | 4 +- ...LinearLedDriver.circuit-schematic.snap.svg | 4 +- examples/index.ts | 18 - examples/ti-reference-examples.json | 202 +------ scripts/ti-reference-example-schema.test.ts | 86 ++- scripts/ti-reference-example-schema.ts | 61 +- scripts/validate-ti-reference-examples.ts | 39 +- 61 files changed, 1398 insertions(+), 4917 deletions(-) delete mode 100644 examples/ADS1015L_DualSupplyMonitor.circuit.tsx delete mode 100644 examples/INA181_BidirectionalCurrentSense.circuit.tsx delete mode 100644 examples/MSPM0C1103_AdcInputNetwork.circuit.tsx delete mode 100644 examples/OPA333_ThermistorBridge.circuit.tsx delete mode 100644 examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx delete mode 100644 examples/TMP102_TwoWireTemperatureSensor.circuit.tsx delete mode 100644 examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg delete mode 100644 examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-pcb.snap.svg delete mode 100644 examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg delete mode 100644 examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg delete mode 100644 examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg delete mode 100644 examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg delete mode 100644 examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg diff --git a/README.md b/README.md index 37dcbaa7..d53c3812 100644 --- a/README.md +++ b/README.md @@ -274,10 +274,10 @@ schematics. Their checked-in snapshots are schematic-only so the reference component placement and wiring can be reviewed without running analog simulations or generating PCB output. -The curated set currently contains 27 evidence-backed blocks spanning power +The curated set currently contains 21 evidence-backed blocks spanning power regulation, battery charging, load switching, LED and motor driving, op-amp -filters and bridges, current and temperature sensing, ADC front ends, logic, -CAN, RS-485, clocks, wireless, microcontrollers, and timing. Every file +filters, current and temperature sensing, ADC front ends, logic, CAN, clocks, +wireless, and timing. Every file named-exports its reusable block and default-exports the same component. They are also available from the package entrypoint and from the typed `TiReferenceBlockComponents` map: @@ -295,6 +295,12 @@ Only circuits with a clear first-party TI schematic are included. A family is skipped when its public documentation does not provide enough connectivity and placement evidence to reproduce a useful block. +Examples declare electrical connectivity with ordinary `` elements and +let tscircuit autoroute their schematic paths. Validation rejects manual +schematic geometry, ``, custom drawing symbols, and +`schematicRouteHints`; when autorouting cannot reproduce a readable TI layout, +the example is omitted from the curated set. + ### `lib/simulations` The `lib/simulations` directory contains example circuits for simulation-focused diff --git a/examples/ADS1015L_DualSupplyMonitor.circuit.tsx b/examples/ADS1015L_DualSupplyMonitor.circuit.tsx deleted file mode 100644 index 58883d6b..00000000 --- a/examples/ADS1015L_DualSupplyMonitor.circuit.tsx +++ /dev/null @@ -1,251 +0,0 @@ -import "tscircuit"; -import { ADS1015LIDGSR } from "../lib/chips/ADS1015LIDGSR.tsx"; - -/** - * TI ADS1015L datasheet (SBASAV7), Figure 9-9: - * "Monitoring Two Supply Voltage Rails Using the ADS1015L" - * https://www.ti.com/document-viewer/ADS1015L/datasheet/GUID-15CF0C0C-4F6E-49F6-A678-8C8E0445438D#TITLE-SBAS822T4758422-11 - * https://www.ti.com/ods/images/SBASAV7/GUID-20230711-SS0I-WZVJ-MZBB-ZCL3HNXRCG50-low.svg - * - * TI gives a 1-kOhm to 10-kOhm range for the bus pullups rather than one - * selected value; those two resistors therefore remain explicitly symbolic. - */ -export const ADS1015L_DualSupplyMonitor = () => ( - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -); - -export default ADS1015L_DualSupplyMonitor; diff --git a/examples/ADS7042_DirectSensorInterface.circuit.tsx b/examples/ADS7042_DirectSensorInterface.circuit.tsx index ed2cbf6b..2c7a1c45 100644 --- a/examples/ADS7042_DirectSensorInterface.circuit.tsx +++ b/examples/ADS7042_DirectSensorInterface.circuit.tsx @@ -61,8 +61,8 @@ export const ADS7042_DirectSensorInterface = () => ( name="C_FILTER" displayName="CFLT" symbolName="capacitor_down" - schX={-0.65} - schY={-0.1} + schX={-1} + schY={0} /> ( /> - - - - + .pin2", + ".U1 > .pin5", + ".SENSOR_NEG > .1", + ".GND_SENSOR > .1", + ]} + /> @@ -133,25 +134,6 @@ export const ADS7042_DirectSensorInterface = () => ( - - - - ); diff --git a/examples/BQ25185_TypicalBatteryCharger.circuit.tsx b/examples/BQ25185_TypicalBatteryCharger.circuit.tsx index 42b7b7a6..f4e88298 100644 --- a/examples/BQ25185_TypicalBatteryCharger.circuit.tsx +++ b/examples/BQ25185_TypicalBatteryCharger.circuit.tsx @@ -1,468 +1,247 @@ import "tscircuit"; -import { Fragment } from "react"; import { BQ25185DLHR } from "../lib/chips/BQ25185DLHR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI BQ25185 datasheet (SLUSF65A), Figure 8-1, "BQ25185 Typical Application": * https://www.ti.com/lit/ds/symlink/bq25185.pdf#page=20 * Figure asset: https://www.ti.com/ods/images/SLUSF65A/GUID-20230122-SS0I-PSKM-ZS85-WTN1HZFTWQXP-low.svg */ export const BQ25185_TypicalBatteryCharger = () => ( - - - + - - {[ - { y: 1.6, label: "IN" }, - { y: 0.7, label: "STAT1" }, - { y: 0.35, label: "STAT2" }, - { y: 0, label: "/CE" }, - { y: -1, label: "ILIM/VSET" }, - { y: -1.35, label: "ISET" }, - ].map(({ y, label }) => ( - - - - ))} - {[ - { y: 1.6, label: "SYS" }, - { y: 0.65, label: "BAT" }, - { y: -0.55, label: "TS/MR" }, - ].map(({ y, label }) => ( - - - - ))} - - - {[ - { pin: 10, y: 1.6 }, - { pin: 9, y: 0.7 }, - { pin: 3, y: 0.35 }, - { pin: 4, y: 0 }, - { pin: 7, y: -1 }, - { pin: 8, y: -1.35 }, - ].map(({ pin, y }) => ( - - - - ))} - {[ - { pin: 1, y: 1.6 }, - { pin: 2, y: 0.65 }, - { pin: 6, y: -0.55 }, - ].map(({ pin, y }) => ( - - - - ))} - - - - - - - - - - - - - - - } /> + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + .1", ".CIN > .pin1", ".U1 > .pin10"]} /> + + + + + + .pin1", ".CSYS > .pin1", ".SYSTEM_LOAD > .1"]} /> + .pin2", ".CBAT > .pin1", ".BT1 > .pin1"]} /> + .pin6", ".SW1 > .pin2", ".RNTC > .pin1"]} /> + + + + + .pin5", ".U1 > .pin11", ".GND_DEVICE > .1"]} /> + + + + + ); diff --git a/examples/CC2340R5MODA_TypicalApplication.circuit.tsx b/examples/CC2340R5MODA_TypicalApplication.circuit.tsx index 8194c965..fb885f95 100644 --- a/examples/CC2340R5MODA_TypicalApplication.circuit.tsx +++ b/examples/CC2340R5MODA_TypicalApplication.circuit.tsx @@ -95,6 +95,7 @@ export const CC2340R5MODA_TypicalApplication = () => ( ( "U1.pin24", ]} /> - - - - - ); diff --git a/examples/DRV8833_ParallelMotorDriver.circuit.tsx b/examples/DRV8833_ParallelMotorDriver.circuit.tsx index 474cc225..18148514 100644 --- a/examples/DRV8833_ParallelMotorDriver.circuit.tsx +++ b/examples/DRV8833_ParallelMotorDriver.circuit.tsx @@ -1,470 +1,149 @@ import "tscircuit"; import { DRV8833 } from "../lib/chips/DRV8833.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI DRV8833 datasheet (SLVSAR1E), Figure 7, "Parallel Mode": * https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=12 */ export const DRV8833_ParallelMotorDriver = () => ( - - - - - - - - - - - + - + + + - - - - - - - - - - - } - schX={4.15} - schY={0.45} - /> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + .1", ".U1 > .pin16", ".U1 > .pin9"]} /> + .1", ".U1 > .pin15", ".U1 > .pin10"]} /> + + .1", ".U1 > .pin12", ".C4 > .pin1", ".C1 > .pin1"]} /> + + .pin2", ".U1 > .pin7", ".M1 > .pin1"]} /> + .pin4", ".U1 > .pin5", ".M1 > .pin2"]} /> + .pin14", ".C2 > .pin1"]} /> + .pin3", ".U1 > .pin6", ".R2 > .pin1"]} /> + - - - - + + + + ); diff --git a/examples/INA138_BasicCurrentSense.circuit.tsx b/examples/INA138_BasicCurrentSense.circuit.tsx index c3e22900..1a78cfd2 100644 --- a/examples/INA138_BasicCurrentSense.circuit.tsx +++ b/examples/INA138_BasicCurrentSense.circuit.tsx @@ -104,21 +104,6 @@ export const INA138_BasicCurrentSense = () => ( .pin1", ".R_LOAD > .1", ".VOUT > .1"]} /> - - - ); diff --git a/examples/INA181_BidirectionalCurrentSense.circuit.tsx b/examples/INA181_BidirectionalCurrentSense.circuit.tsx deleted file mode 100644 index 925d2c4b..00000000 --- a/examples/INA181_BidirectionalCurrentSense.circuit.tsx +++ /dev/null @@ -1,303 +0,0 @@ -import "tscircuit"; -import { INA181A2IDBVR } from "../lib/chips/INA181A2IDBVR.tsx"; - -/** - * TI INA181 datasheet (SBOS793H), Figure 8-7, "Measuring Bidirectional Current": - * https://www.ti.com/document-viewer/INA181/datasheet/GUID-51EC9609-0E42-451E-BE38-F15C8C75D408#TITLE-SBOS793SBOS7932623 - * https://www.ti.com/ods/images/SBOS793H/GUID-ECDF49FE-1464-4DC3-BE2C-728F776BD407-low.gif - * - * The selectable REF source and divider are retained symbolically because TI - * gives no resistor values in the figure. CBYPASS is the specified 0.1 uF. - */ -export const INA181_BidirectionalCurrentSense = () => ( - - - - - - - - - - - - - - - - } - /> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -); - -export default INA181_BidirectionalCurrentSense; diff --git a/examples/LM358B_InvertingAmplifier.circuit.tsx b/examples/LM358B_InvertingAmplifier.circuit.tsx index 83a79ea3..ba339942 100644 --- a/examples/LM358B_InvertingAmplifier.circuit.tsx +++ b/examples/LM358B_InvertingAmplifier.circuit.tsx @@ -1,58 +1,45 @@ import "tscircuit"; import { LM358BIPWR } from "../lib/chips/LM358BIPWR.tsx"; -const PRIMARY = "#8b0000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI LM358B datasheet (SLOS068AB), Figure 8-1, "Application Schematic": * https://www.ti.com/lit/ds/symlink/lm358b.pdf#page=27 * - * The values are TI's worked example from section 8.2.2: RI = 10 kOhm and - * RF = 36 kOhm for a gain of -3.6. Placement follows Figure 8-1, including - * the feedback resistor above the op amp and the grounded lower input. + * TI's worked example uses RI = 10 kOhm and RF = 36 kOhm for a gain of -3.6. + * The physical device remains the exported LM358BIPWR while a predefined + * tscircuit op-amp symbol presents its first channel. */ export const LM358B_InvertingAmplifier = () => ( - - + + + .pin3", + inp2: ".U1 > .pin2", + out: ".U1 > .pin1", + "V+": ".U1 > .pin8", + "V-": ".U1 > .pin4", + }} + /> - @@ -60,201 +47,60 @@ export const LM358B_InvertingAmplifier = () => ( name="RF" resistance="36k" footprint="0402" - schX={1.375} - schY={1.5} + schX={0.8} + schY={2} schOrientation="horizontal" /> - - {/* TI Figure 8-1 uses the conventional minus-above-plus ordering. */} - - - - - - - - - - - - - - - } + - - - - - - - - - - - - - - - - - + + + .pin2", ".RF > .pin1", ".U1_OPAMP > .inp2"]} /> + .pin2", ".U1_OPAMP > .out", ".VOUT > .1"]} /> + + + + ); diff --git a/examples/LMC555_MonostableLedFlasher.circuit.tsx b/examples/LMC555_MonostableLedFlasher.circuit.tsx index 35f19151..904471e9 100644 --- a/examples/LMC555_MonostableLedFlasher.circuit.tsx +++ b/examples/LMC555_MonostableLedFlasher.circuit.tsx @@ -1,17 +1,11 @@ import "tscircuit"; import { LMC555CMX_NOPB } from "../lib/chips/LMC555CMX_NOPB.tsx"; -const TI_RED = "#840000"; - /** * TI LMC555 datasheet (SNAS558N), Figure 8-1, * "LMC555 Schematic of Monostable Mode to Flash an LED". * Section: https://www.ti.com/document-viewer/LMC555/datasheet/GUID-70DF1B73-42F3-448D-B588-86B0175F1C4C#TITLE-SNAS558SNAS5589201 * Figure: https://www.ti.com/ods/images/SNAS558N/GUID-9517F735-81AC-4C81-8971-FC3F01B7204F-low.gif - * - * The component positions deliberately follow the TI figure: trigger switch - * and pull-up at upper left, LED branch at lower left, timing resistor and - * capacitor at right, and the control-voltage capacitor below pin 5. */ export const LMC555_MonostableLedFlasher = () => ( @@ -19,94 +13,29 @@ export const LMC555_MonostableLedFlasher = () => ( name="U1" schX={0} schY={0} - symbol={ - - - - - - - - - - - - - } + schWidth={2.4} + schHeight={3.2} + schPinArrangement={{ + leftSide: { + direction: "top-to-bottom", + pins: ["TRIGER", "OUTPUT"], + }, + rightSide: { + direction: "top-to-bottom", + pins: ["DC", "TH", "CV"], + }, + topSide: { + direction: "left-to-right", + pins: ["RESET", "V_POS"], + }, + bottomSide: { + direction: "left-to-right", + pins: ["GND"], + }, + }} /> - + ( schOrientation="vertical" /> - - - - - - - - - - + + + + + + + + - - - + + - - - - - + + + + .RESET", ".U1 > .V_POS", ".VCC_DEVICE > .1"]} /> + - - .pin2", + ".C_TIMING > .pin1", + ".U1 > .DC", + ".U1 > .TH", + ]} /> + + + + + + + + + ); diff --git a/examples/LMK1C1104_ClockFanout.circuit.tsx b/examples/LMK1C1104_ClockFanout.circuit.tsx index d75e20bb..84762236 100644 --- a/examples/LMK1C1104_ClockFanout.circuit.tsx +++ b/examples/LMK1C1104_ClockFanout.circuit.tsx @@ -13,6 +13,7 @@ export const LMK1C1104_ClockFanout = () => ( ( resistance="33" footprint="0402" schX={0.55} - schY={-1.2} + schY={-1.55} /> ( resistance="100" footprint="0402" schX={2.6} - schY={-0.7} + schY={-1.05} schOrientation="vertical" /> ( resistance="100" footprint="0402" schX={2.6} - schY={-1.7} + schY={-2.05} schOrientation="vertical" /> + + ( /> ( /> ( + - - + + - - ); diff --git a/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx b/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx index b9c87d6d..def5bea5 100644 --- a/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx +++ b/examples/LMT70_AnalogTemperatureToAdc.circuit.tsx @@ -74,36 +74,12 @@ export const LMT70_AnalogTemperatureToAdc = () => ( - - + + - + - - - - - + ); diff --git a/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx b/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx deleted file mode 100644 index 130feec3..00000000 --- a/examples/MSPM0C1103_AdcInputNetwork.circuit.tsx +++ /dev/null @@ -1,194 +0,0 @@ -import "tscircuit"; -import { MSPM0C1103SDSGR } from "../lib/chips/MSPM0C1103SDSGR.tsx"; - -const TI_RED = "#840000"; - -/** - * TI SLASF90D, Figure 7-2, "MSPM0C1104/MSPM0C1103 ADC Input Network". - * Section: https://www.ti.com/document-viewer/MSPM0C1103/datasheet/GUID-C6FF21A8-FE93-4A88-B508-50BE3DEF8658#GUID-00AF94FF-7D7E-47C5-922F-56E845B3A5FD - * Figure: https://www.ti.com/ods/images/SLASF90D/GUID-51401E88-ED97-42E3-BA03-EBE514B1C1ED-low.svg - * - * External Rpar/Cpar and Rin stay left of the device boundary. The symbol - * preserves TI's internal input capacitance, sample switch, and SAR labels as - * an equivalent-model drawing rather than extra placed components. - */ -export const MSPM0C1103_AdcInputNetwork = () => ( - - - - - - - - - - - - - - - - - - - - } - /> - - - - - - - - - - - - - -); - -export default MSPM0C1103_AdcInputNetwork; diff --git a/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx b/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx index dee1c650..17003330 100644 --- a/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx +++ b/examples/OPA320_SecondOrderLowPassFilter.circuit.tsx @@ -13,134 +13,19 @@ import { OPA320SAIDBVR } from "../lib/chips/OPA320SAIDBVR.tsx"; */ export const OPA320_SecondOrderLowPassFilter = () => ( - + .pin3", + inp2: ".U1 > .pin4", + out: ".U1 > .pin1", }} - symbol={ - - - - - - - - - - - - - - - - - } /> ( schX={0.15} schY={-1.2} /> - - - - + .pin2", ".R2 > .pin1", ".C1 > .pin1"]} /> - - - - - - - - - - - + + + + + + + ); diff --git a/examples/OPA333_ThermistorBridge.circuit.tsx b/examples/OPA333_ThermistorBridge.circuit.tsx deleted file mode 100644 index 9b16db00..00000000 --- a/examples/OPA333_ThermistorBridge.circuit.tsx +++ /dev/null @@ -1,255 +0,0 @@ -import "tscircuit"; -import { OPA333AIDR } from "../lib/chips/OPA333AIDR.tsx"; - -/** - * TI OPA333 datasheet (SBOS351E), "Temperature Measurement": - * https://www.ti.com/document-viewer/OPA333/datasheet/application_and_implementation#SBOS3519103 - * https://www.ti.com/ods/images/SBOS351E/ai_measure_tmp_bos351.gif - * - * The bridge, thermistor, feedback resistor, and op-amp orientation follow the - * TI figure. TI specifies the thermistor by type rather than a nominal value, - * so it remains a symbolic resistor instead of receiving an invented value. - */ -export const OPA333_ThermistorBridge = () => ( - - - - - - - - - - - - - - - - - - } - /> - - - - - - - - - - - - - - .1", ".R_LEFT_TOP > .pin1", ".R_RIGHT_TOP > .pin1"]} /> - .1", - ".R_LEFT_BOTTOM > .pin2", - ".R_THERMISTOR > .2", - ]} - /> - - - - - - - - - - - - -); - -export default OPA333_ThermistorBridge; diff --git a/examples/OPA371D_LowSideCurrentSense.circuit.tsx b/examples/OPA371D_LowSideCurrentSense.circuit.tsx index 59c76e98..980a3daa 100644 --- a/examples/OPA371D_LowSideCurrentSense.circuit.tsx +++ b/examples/OPA371D_LowSideCurrentSense.circuit.tsx @@ -141,14 +141,7 @@ export const OPA371D_LowSideCurrentSense = () => ( .out", ".R_F > .pin1", ".VOUT_TERMINAL > .1"]} /> {/* RF/RG gain divider feeds the inverting input */} - .pin2", ".R_G > .pin1", ".U1_OPAMP > .inp2"]} - schematicRouteHints={[ - { x: -0.8, y: -0.14 }, - { x: -0.8, y: -0.95 }, - { x: 1.5, y: -0.95 }, - ]} - /> + .pin2", ".R_G > .pin1", ".U1_OPAMP > .inp2"]} /> {/* RG returns to ground */} @@ -158,30 +151,6 @@ export const OPA371D_LowSideCurrentSense = () => ( {/* device negative supply returns to ground */} - - - - - - ); diff --git a/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx b/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx deleted file mode 100644 index 4e405bad..00000000 --- a/examples/SN65HVD3082E_MultipointRS485Network.circuit.tsx +++ /dev/null @@ -1,171 +0,0 @@ -import "tscircuit"; -import { SN65HVD3082EDR } from "../lib/chips/SN65HVD3082EDR.tsx"; - -/** - * TI SLLS562O, Figure 9-2, "Typical Application Circuit". - * Section: https://www.ti.com/document-viewer/SN65HVD3082E/datasheet/GUID-8E8196FF-15F5-4B69-A41E-7D9DBA30E79E#TITLE-SLLS562SLLS5621905 - * Figure: https://www.ti.com/ods/images/SLLS562O/GUID-F8DF2F0D-9F11-4160-A7FF-A80DEBF80CB0-low.gif - * - * Four transceivers share the A/B trunk. End nodes are terminated across the - * pair and the two middle nodes are short unterminated drops, matching TI's - * relative node placement. - */ -export const SN65HVD3082E_MultipointRS485Network = () => ( - - - - - - - - - - - - - - - - - - - - - - - -); - -export default SN65HVD3082E_MultipointRS485Network; diff --git a/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx b/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx index 12a8b224..34a804ed 100644 --- a/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx +++ b/examples/SN74AHC1G14_SwitchDebouncer.circuit.tsx @@ -1,8 +1,6 @@ import "tscircuit"; import { SN74AHC1G14DBVR } from "../lib/chips/SN74AHC1G14DBVR.tsx"; -const TI_RED = "#840000"; - /** * TI SCLS321S, Figure 8-1, "SN74AHC1G14 Switch Debouncer". * Section: https://www.ti.com/document-viewer/SN74AHC1G14/datasheet/GUID-73F0AF56-7849-48C4-9A81-C7F828BB61AE#TITLE-SCLS321SCLS3214279 @@ -17,57 +15,15 @@ export const SN74AHC1G14_SwitchDebouncer = () => ( name="U1" schX={0} schY={0} - symbol={ - - - - - - - - } + schWidth={1.6} + schHeight={1.2} + schPinArrangement={{ + leftSide: { direction: "top-to-bottom", pins: ["A"] }, + rightSide: { direction: "top-to-bottom", pins: ["Y"] }, + }} /> - + ( ( - - - ); diff --git a/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx b/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx index 4ac605ce..2a6ceab3 100644 --- a/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx +++ b/examples/SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx @@ -1,8 +1,6 @@ import "tscircuit"; import { SN74AUP1G17DBVR } from "../lib/chips/SN74AUP1G17DBVR.tsx"; -const TI_RED = "#840000"; - /** * TI SCES579J, Figure 8, "Turn-On Pulse Generator (Normally High Output)". * Section: https://www.ti.com/document-viewer/SN74AUP1G17/datasheet/application-and-implementation#x5214 @@ -17,47 +15,12 @@ export const SN74AUP1G17_TurnOnPulseGenerator = () => ( name="U1" schX={1} schY={0} - symbol={ - - - - - - - } + schWidth={1.6} + schHeight={1.2} + schPinArrangement={{ + leftSide: { direction: "top-to-bottom", pins: ["A"] }, + rightSide: { direction: "top-to-bottom", pins: ["Y"] }, + }} /> ( - - ); diff --git a/examples/TCAN1044A_5VCanInterface.circuit.tsx b/examples/TCAN1044A_5VCanInterface.circuit.tsx index 014a5263..24d9c8a5 100644 --- a/examples/TCAN1044A_5VCanInterface.circuit.tsx +++ b/examples/TCAN1044A_5VCanInterface.circuit.tsx @@ -13,6 +13,7 @@ export const TCAN1044A_5VCanInterface = () => ( ( /> ( - - - ); diff --git a/examples/TLV755P_TypicalApplication.circuit.tsx b/examples/TLV755P_TypicalApplication.circuit.tsx index 40e505ae..5238ef7e 100644 --- a/examples/TLV755P_TypicalApplication.circuit.tsx +++ b/examples/TLV755P_TypicalApplication.circuit.tsx @@ -1,219 +1,115 @@ import "tscircuit"; import { TLV75533PDBVR } from "../lib/chips/TLV75533PDBVR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TLV755P datasheet (SBVS320D), Figure 7-4, "TLV755P Typical Application": * https://www.ti.com/lit/ds/symlink/tlv755p.pdf#page=19 * Figure asset: https://www.ti.com/ods/images/SBVS320D/GUID-0BCA8AAE-CBC2-4E39-90C5-FF3DE67E3CE3-low.gif */ export const TLV755P_TypicalApplication = () => ( - - - - - - - + - - - - - - - - - - + + + - - - - - - - - - - - - + .1", ".CIN > .pin1", ".U1 > .pin1"]} /> + + .pin5", ".COUT > .pin1", ".LOAD > .1"]} /> + + + + ); diff --git a/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx b/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx deleted file mode 100644 index 3e11933c..00000000 --- a/examples/TMP102_TwoWireTemperatureSensor.circuit.tsx +++ /dev/null @@ -1,187 +0,0 @@ -import "tscircuit"; -import { TMP102AIDRLR } from "../lib/chips/TMP102AIDRLR.tsx"; - -/** - * TI TMP102 datasheet (SBOS397I), Figure 7-1, "Typical Connections": - * https://www.ti.com/document-viewer/TMP102/datasheet/GUID-D9972B9C-7EB3-403C-81AA-258B0C731BF1#TITLE-SBOS397SBOS3979928 - * https://www.ti.com/ods/images/SBOS397I/GUID-20240603-SS0I-I73J-3VFC-EL12H6FVKUPM-low.svg - */ -export const TMP102_TwoWireTemperatureSensor = () => ( - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -); - -export default TMP102_TwoWireTemperatureSensor; diff --git a/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx b/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx index 5120f943..a168bdd9 100644 --- a/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx +++ b/examples/TPS22919_LoadSwitchTypicalApplication.circuit.tsx @@ -1,101 +1,57 @@ import "tscircuit"; import { TPS22919 } from "../lib/chips/TPS22919.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS22919 datasheet (SLVSEN5B), Figure 30, "Typical Application Schematic": * https://www.ti.com/lit/ds/symlink/tps22919.pdf#page=15 * Figure asset: https://www.ti.com/ods/images/SLVSEN5B/Typical%20Application.jpg */ export const TPS22919_LoadSwitchTypicalApplication = () => ( - - - - - - + - + + + ( displayName="CL" capacitance="1uF" footprint="0402" - schX={3.1} - schY={0.3} + schX={3.2} + schY={0.25} schOrientation="vertical" /> ( displayName="RL" resistance="10k" footprint="0402" - schX={4.1} - schY={0.3} + schX={4.3} + schY={0.25} schOrientation="vertical" /> + - - - - - - - - - - - - + + .1", ".CIN > .pin1", ".U1 > .pin1"]} /> + + .pin6", + ".RQOD > .pin1", + ".CLOAD > .pin1", + ".RLOAD > .pin1", + ".VOUT > .1", + ]} /> + - - - - - + + + + ); diff --git a/examples/TPS61165_WhiteLedDriver.circuit.tsx b/examples/TPS61165_WhiteLedDriver.circuit.tsx index fab86081..85ca4ade 100644 --- a/examples/TPS61165_WhiteLedDriver.circuit.tsx +++ b/examples/TPS61165_WhiteLedDriver.circuit.tsx @@ -1,363 +1,175 @@ import "tscircuit"; import { TPS61165DRVR } from "../lib/chips/TPS61165DRVR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS61165 datasheet (SLVS790E), front-page "Typical Application": * https://www.ti.com/lit/ds/symlink/tps61165.pdf#page=1 * Figure asset: https://www.ti.com/ods/images/SLVS790E/typ_app_lvs790.gif */ export const TPS61165_WhiteLedDriver = () => ( - - - - - - - - - - + + + - + + - - - - - - - - - - - - - - - - - - - - - - - - + .1", ".C1 > .pin1", ".U1 > .pin6"]} /> + + .pin2", ".U1 > .pin4", ".D1 > .pin1"]} /> + .pin2", ".C2 > .pin1", ".LED1 > .anode"]} /> + + + .cathode", ".U1 > .pin1", ".RSET > .pin1"]} /> + + - - - - - - - - + + + .pin3", ".U1 > .pin7", ".GND_DEVICE > .1"]} /> + + ); diff --git a/examples/TPS61299_5VBoostConverter.circuit.tsx b/examples/TPS61299_5VBoostConverter.circuit.tsx index b0a36044..dcf388f9 100644 --- a/examples/TPS61299_5VBoostConverter.circuit.tsx +++ b/examples/TPS61299_5VBoostConverter.circuit.tsx @@ -1,33 +1,6 @@ import "tscircuit"; import { TPS61299DRLR } from "../lib/chips/TPS61299DRLR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS61299 datasheet (SLVSGS9G), Figure 8-1, * "3.6-V Input Source to 5-V Boost Converter Under Fast Mode": @@ -35,214 +8,107 @@ const TiGround = ({ x, y }: { x: number; y: number }) => ( * Figure asset: https://www.ti.com/ods/images/SLVSGS9G/GUID-20230315-SS0I-SNWQ-NK7H-W5SZXM5FNTJP-low.svg */ export const TPS61299_5VBoostConverter = () => ( - - - - - - + - - + + - - - - - - - - - - - - - - - - - - - - - - - + + .1", ".C1 > .pin1", ".U1 > .pin1"]} /> + + + + .pin5", ".C2 > .pin1", ".VOUT > .1"]} /> + + + + + ); diff --git a/examples/TPS62A01_1V8BuckConverter.circuit.tsx b/examples/TPS62A01_1V8BuckConverter.circuit.tsx index c3fbb971..ad2a2ab7 100644 --- a/examples/TPS62A01_1V8BuckConverter.circuit.tsx +++ b/examples/TPS62A01_1V8BuckConverter.circuit.tsx @@ -1,33 +1,6 @@ import "tscircuit"; import { TPS62A01PDDCR } from "../lib/chips/TPS62A01PDDCR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS62A01 datasheet (SLUSEG9E), Figure 8-1, * "TPS62A01 Typical Application Circuit": @@ -35,53 +8,34 @@ const TiGround = ({ x, y }: { x: number; y: number }) => ( * Figure asset: https://www.ti.com/ods/images/SLUSEG9E/GUID-20230310-SS0I-R5NB-L5XF-FBXFT6BWQ4KP-low.svg */ export const TPS62A01_1V8BuckConverter = () => ( - - - - - - - - + - + ( inductance="1uH" footprint="0402" schX={2.1} - schY={0.7} + schY={0.85} schOrientation="horizontal" /> - - - - - - - - - + - - - - - - - - - - - - - + - - - - - .1", ".C1 > .pin1", ".U1 > .pin4"]} /> + + + + .pin2", + ".R1 > .pin1", + ".C3 > .pin1", + ".C2 > .pin1", + ".VOUT > .1", + ]} /> - .pin2", ".C3 > .pin2", ".R2 > .pin1", ".U1 > .pin6"]} /> + + - - - - + + + + ); diff --git a/examples/TPS7A20_TypicalApplication.circuit.tsx b/examples/TPS7A20_TypicalApplication.circuit.tsx index 8b31d40d..0f30eea6 100644 --- a/examples/TPS7A20_TypicalApplication.circuit.tsx +++ b/examples/TPS7A20_TypicalApplication.circuit.tsx @@ -1,232 +1,91 @@ import "tscircuit"; import { TPS7A2028PDBVR } from "../lib/chips/TPS7A2028PDBVR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS7A20 datasheet (SBVS338H), Figure 7-4, "TPS7A20 Typical Application": * https://www.ti.com/lit/ds/symlink/tps7a20.pdf#page=30 * - * Figure 7-4 and Table 7-1 use the fixed 2.8 V device, with 1 uF input and - * output capacitors. Placement intentionally follows the TI figure: input and - * enable on the left, output on the right, and the three ground returns below. + * Figure 7-4 and Table 7-1 use the fixed 2.8 V device with 1 uF input and + * output capacitors. Component placement follows the TI left-to-right signal + * flow while tscircuit autoroutes every schematic trace. */ export const TPS7A20_TypicalApplication = () => ( - - - - - - - - - - - - } - /> + + - - - - - - - - - - + + - - - - - - - - - + .1", ".C1 > .pin1", ".U1 > .VIN"]} /> + + .VOUT", ".C2 > .pin1", ".OUTPUT > .1"]} /> + + + ); diff --git a/examples/TPS92612_LinearLedDriver.circuit.tsx b/examples/TPS92612_LinearLedDriver.circuit.tsx index e19e805a..9d0cf457 100644 --- a/examples/TPS92612_LinearLedDriver.circuit.tsx +++ b/examples/TPS92612_LinearLedDriver.circuit.tsx @@ -1,33 +1,6 @@ import "tscircuit"; import { TPS92612DBVR } from "../lib/chips/TPS92612DBVR.tsx"; -const PRIMARY = "#840000"; - -const TiGround = ({ x, y }: { x: number; y: number }) => ( - <> - - - -); - /** * TI TPS92612 datasheet (SLVSFG3), front-page * "TPS92612 Typical Application Diagram": @@ -35,59 +8,51 @@ const TiGround = ({ x, y }: { x: number; y: number }) => ( * Figure asset: https://www.ti.com/ods/images/SLVSFG3/tps92612-typical-application-diagram.gif */ export const TPS92612_LinearLedDriver = () => ( - - - - - - - - + - + + ( displayName="C(OUT)" capacitance="100nF" footprint="0402" - schX={3.4} - schY={0.15} + schX={3.9} + schY={0.65} schOrientation="horizontal" /> - - - - - - - - - - - - - - - - - + .1", ".CSUPPLY > .pin1", ".U1 > .pin3"]} /> + + + + .pin5", ".COUT > .pin1", ".LED1 > .anode"]} /> + + + .cathode", ".COUT > .pin2", ".GND_RETURN > .1"]} /> - - - - + + ); diff --git a/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg b/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg deleted file mode 100644 index defc3444..00000000 --- a/examples/__snapshots__/ADS1015L_DualSupplyMonitor.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -ADS1015LIDGSRADS1015L1ADDR23GND4AIN05AIN16AIN27AIN38VDD9SDA10SCLR_3V3100ΩC_3V30.47uFR_1V8100ΩC_1V80.47uFC_VDD0.1uF3.3 V1.8 V3.3 V1.8 VI2C SCLI2C SDApin2 = ALERT/RDY1 kOhm to 10 kOhm pullupsTI ADS1015L Figure 9-9 · dual-rail monitor \ No newline at end of file diff --git a/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg b/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg index ef41749d..001e0668 100644 --- a/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg +++ b/examples/__snapshots__/ADS7042_DirectSensorInterface.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -ADS7042IDCUTADS70421DVDD2SCLK3SDO4CS5AINM6AINP7AVDD8GNDSensor +Sensor -ROUTCFLTAVDDDVDDSCLKSDOCS \ No newline at end of file diff --git a/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg b/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg index b4716244..a648914b 100644 --- a/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg +++ b/examples/__snapshots__/BQ25185_TypicalBatteryCharger.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -BQ25185DLHR1SYS2BAT3STAT24CE5GND678ISET9STAT110IN11EPVBUSCIN1uFHost STAT1Host STAT2Host CERILIM5kΩRISET1kΩCSYS10uFRegulated loadCBAT1uFLi-Ion cellMRNTC10kΩ \ No newline at end of file diff --git a/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-pcb.snap.svg b/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-pcb.snap.svg deleted file mode 100644 index 90a7a5d6..00000000 --- a/examples/__snapshots__/BluetoothSpeaker_CC2564C_TAS2505.circuit-pcb.snap.svg +++ /dev/null @@ -1 +0,0 @@ -DC_PLUSGNDJ1U1C1C2TEMPPACK_PLUSPACK_MINUSBT1C3R1R2R3R4D1R5D2U1C1C2U1AR1C18C19C20C1L1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17U10C47C46R12C44S1R28C43R10R11R6D2R7D3R15D5PAD1PAD2PAD3R31R32R33C37C39C41U1R1R2C1C2C3C4J_AINC5C6C7C8C9C10J_SPKC11J_HP \ No newline at end of file diff --git a/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg index c162d8b8..2e167f63 100644 --- a/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg +++ b/examples/__snapshots__/CC2340R5MODA_TypicalApplication.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ - \ No newline at end of file diff --git a/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg b/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg index aa70fefb..670ef89a 100644 --- a/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg +++ b/examples/__snapshots__/DRV8833_ParallelMotorDriver.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -DRV883316AIN115AIN29BIN110BIN21NSLEEP13GND11VCP2AOUT14AOUT27BOUT15BOUT28NFAULT14VINT3AISEN6BISEN12VMIN1IN2nSLEEPVMC410uFC110nFC22.2uFRSENSE200mΩM1 Motor12nFAULTU1_AOUT1U1_AOUT1U1_AOUT2U1_AOUT2 \ No newline at end of file diff --git a/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg index 127d5cb5..4f9427d0 100644 --- a/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg +++ b/examples/__snapshots__/INA138_BasicCurrentSense.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -INA138NA/3KINA1381OUT2GND3_POS4_NEG5V_POSRS (Shunt)LoadRLVP · 2.7 V to 36 VV+ · 2.7 V to 36 VVO \ No newline at end of file diff --git a/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg deleted file mode 100644 index f57478c9..00000000 --- a/examples/__snapshots__/INA181_BidirectionalCurrentSense.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -RSENSELoadCBYPASS0.1uFRREF1RREF2Reference BufferBus · -0.2 V to +26 VVS · 2.7 V to 5.5 VReference VoltageOutputINA181IN-IN+OUTREFTI INA181 Figure 8-7 \ No newline at end of file diff --git a/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg b/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg index 81cbf38c..19a3cadf 100644 --- a/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg +++ b/examples/__snapshots__/LM358B_InvertingAmplifier.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -U1VINRI10kΩRF36kΩVsup+VOUTVsup- \ No newline at end of file diff --git a/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg b/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg index 960dbc5d..f58becae 100644 --- a/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg +++ b/examples/__snapshots__/LMC555_MonostableLedFlasher.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -LMC555CMX/NOPBU11GND2TRIGER3OUTPUT4RESET5CV6TH7DC8V_POSSW1R_TRIGGER10kΩgreenD1R_LED470ΩR_TIMING10kΩC_TIMING470uFC_CONTROL10nF+5 V to +15 V+5 V to +15 V+5 V to +15 V \ No newline at end of file diff --git a/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg b/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg index 7f5be18f..0dc25510 100644 --- a/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg +++ b/examples/__snapshots__/LMK1C1104_ClockFanout.circuit-schematic.snap.svg @@ -9,4 +9,4 @@ .port-label { fill: rgb(0, 100, 100); } .component-name { fill: rgb(0, 100, 100); } - 100-MHz LVCMOS OSCILLATORU51OUT2GNDLMK1C1104DQFRU11CLKIN21G3Y04GND6VDD7Y38Y1R133ΩR233ΩR333ΩR410kΩR5100ΩR6100ΩCMOS CPU CLOCKU21CLKCMOS FPGA CLOCKU31CLKPLL REFERENCEU41REFGNDGNDVDDVDDVDD50-ohm traces \ No newline at end of file + 100-MHz LVCMOS OSCILLATORU51OUT2GNDLMK1C1104DQFRU11CLKIN21G3Y04GND6VDD7Y38Y1R133ΩR233ΩR333ΩR410kΩR5100ΩR6100ΩFrom CPUCMOS CPU CLOCKU21CLKCMOS FPGA CLOCKU31CLKPLL REFERENCEU41REFGNDGNDVDDVDDVDD \ No newline at end of file diff --git a/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg b/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg index eebdfdd6..bbf47bfd 100644 --- a/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg +++ b/examples/__snapshots__/LMT70_AnalogTemperatureToAdc.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -LMT70YFQRLMT704GND3VDD2TAO1T_ON2.2 V to 3.6 VMSP430 VDDMSP430 P2.3 · ADCMSP430 P2.5_VREF · 1.5 V1.5 V reference \ No newline at end of file diff --git a/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg b/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg deleted file mode 100644 index e5cd10ab..00000000 --- a/examples/__snapshots__/MSPM0C1103_AdcInputNetwork.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -PA0Rpar100ΩCpar20pFRin1kΩVinGNDADC ModelCIS1CS/H12-bit SARDEVICE BOUNDARY \ No newline at end of file diff --git a/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg b/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg index 5c6b25a2..e9ccf700 100644 --- a/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg +++ b/examples/__snapshots__/OPA320_SecondOrderLowPassFilter.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -U1R1549ΩR21.24kΩR3549ΩC11nFC2150pFVINVOUT \ No newline at end of file diff --git a/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg b/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg deleted file mode 100644 index e82fcddc..00000000 --- a/examples/__snapshots__/OPA333_ThermistorBridge.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -R11MΩR21MΩR360kΩNTC ThermistorRF100kΩ3 VVOUT-+OPA333TI OPA333 temperature-measurement bridge \ No newline at end of file diff --git a/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg b/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg index c41968bd..22aedde1 100644 --- a/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg +++ b/examples/__snapshots__/OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -U1ZLOADR_SHUNT100mΩR_F57.6kΩR_G1.2kΩVBUS5 VVOUT \ No newline at end of file diff --git a/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg b/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg deleted file mode 100644 index f6f13f45..00000000 --- a/examples/__snapshots__/SN65HVD3082E_MultipointRS485Network.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -SN65HVD3082EDRU11R2nRE3DE4D6A7BSN65HVD3082EDRU21R2nRE3DE4D6A7BSN65HVD3082EDRU31R2nRE3DE4D6A7BSN65HVD3082EDRU41R2nRE3DE4D6A7BR1120ΩR2120ΩTERMINATED END NODESHORT UNTERMINATED DROPSTERMINATED END NODE \ No newline at end of file diff --git a/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg b/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg index ebe87157..16a87b7b 100644 --- a/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg +++ b/examples/__snapshots__/SN74AHC1G14_SwitchDebouncer.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -SN74AHC1G14DBVRU12A4YSW1R110kΩMICROPROCESSORMCU1GPIO_INGNDVCC \ No newline at end of file diff --git a/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg b/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg index 8a71c08f..59ffdb3f 100644 --- a/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg +++ b/examples/__snapshots__/SN74AUP1G17_TurnOnPulseGenerator.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -SN74AUP1G17DBVRU12A4YR1100kΩC1100nFVOVCCGND \ No newline at end of file diff --git a/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg b/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg index 0b1e6c8d..99a89585 100644 --- a/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TCAN1044A_5VCanInterface.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ - \ No newline at end of file diff --git a/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg index c8bd4e02..c3963533 100644 --- a/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TLV755P_TypicalApplication.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TLV75533PDBVR1IN2GND3EN5OUTCIN1uFCOUT1uFDC/DC converterON / OFFLoad \ No newline at end of file diff --git a/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg b/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg deleted file mode 100644 index 349c4eec..00000000 --- a/examples/__snapshots__/TMP102_TwoWireTemperatureSensor.circuit-schematic.snap.svg +++ /dev/null @@ -1,12 +0,0 @@ -TMP102AIDRLRTMP1021SCL2GND3ALERT4ADD05V_POS6SDAR_SCL5kΩR_SDA5kΩR_ALERT5kΩC_BYPASS0.01uF1.4 V to 3.6 VHost SCLHost SDAHost ALERTTwo-Wire Host ControllerTI TMP102 Figure 7-1 \ No newline at end of file diff --git a/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg index 4d1c2410..028b8b91 100644 --- a/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS22919_LoadSwitchTypicalApplication.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS22919DCKR1IN2GND3ON5QOD6OUTVIN 3.3 VCIN1uFONRQOD100kΩCL1uFRL10kΩVOUT \ No newline at end of file diff --git a/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg b/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg index f18b6849..1f5d7848 100644 --- a/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS61165_WhiteLedDriver.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS61165DRVR1FB2COMP3GND4SW5CTRL6VIN7EPVIN 5 VC14.7uFL110µHON/OFF · DimmingCCOMP220nFD1C21uFwhiteLED1whiteLED2whiteLED3RSET · 350 mA570mΩU1_SW \ No newline at end of file diff --git a/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg b/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg index ee6da29e..47b3044a 100644 --- a/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS61299_5VBoostConverter.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS61299DRLR1VIN2SW3EN4VSEL5VOUT6GNDVIN 3.6 VC110uFL11µHEN · Fast modeC210uFVOUT 5 V \ No newline at end of file diff --git a/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg b/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg index e7692022..49e2395d 100644 --- a/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS62A01_1V8BuckConverter.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS62A01PDDCR1EN2GND3SW4VIN5PG6FBVIN 2.5 V to 5.5 VC14.7uFL11µHR1200kΩR2100kΩC310pFC222uFR4499kΩVINVOUT 1.8 V / 1 AVPG \ No newline at end of file diff --git a/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg b/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg index ca35ec06..42b47969 100644 --- a/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS7A20_TypicalApplication.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS7A2028PDBVRU11VIN2GND3VEN5VOUTC11uFC21uFINPUTENABLEOUTPUT \ No newline at end of file diff --git a/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg b/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg index d2ba51bd..e03d0c5e 100644 --- a/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg +++ b/examples/__snapshots__/TPS92612_LinearLedDriver.circuit-schematic.snap.svg @@ -1,4 +1,4 @@ -TPS92612DBVR1GND2PWM3SUPPLY4IN5OUT4.5 V to 40 VC(SUPPLY)1uFPWMR(SNS)C(OUT)100nFwhiteLED1whiteLED2whiteLED3 \ No newline at end of file diff --git a/examples/index.ts b/examples/index.ts index 01478025..50d12dec 100644 --- a/examples/index.ts +++ b/examples/index.ts @@ -1,26 +1,20 @@ // Generated from examples/ti-reference-examples.json. // Each export is a runnable, evidence-backed TI reference block. -import { ADS1015L_DualSupplyMonitor } from "./ADS1015L_DualSupplyMonitor.circuit.tsx"; import { ADS7042_DirectSensorInterface } from "./ADS7042_DirectSensorInterface.circuit.tsx"; import { BQ25185_TypicalBatteryCharger } from "./BQ25185_TypicalBatteryCharger.circuit.tsx"; import { CC2340R5MODA_TypicalApplication } from "./CC2340R5MODA_TypicalApplication.circuit.tsx"; import { DRV8833_ParallelMotorDriver } from "./DRV8833_ParallelMotorDriver.circuit.tsx"; import { INA138_BasicCurrentSense } from "./INA138_BasicCurrentSense.circuit.tsx"; -import { INA181_BidirectionalCurrentSense } from "./INA181_BidirectionalCurrentSense.circuit.tsx"; import { LM358B_InvertingAmplifier } from "./LM358B_InvertingAmplifier.circuit.tsx"; import { LMC555_MonostableLedFlasher } from "./LMC555_MonostableLedFlasher.circuit.tsx"; import { LMK1C1104_ClockFanout } from "./LMK1C1104_ClockFanout.circuit.tsx"; import { LMT70_AnalogTemperatureToAdc } from "./LMT70_AnalogTemperatureToAdc.circuit.tsx"; -import { MSPM0C1103_AdcInputNetwork } from "./MSPM0C1103_AdcInputNetwork.circuit.tsx"; import { OPA320_SecondOrderLowPassFilter } from "./OPA320_SecondOrderLowPassFilter.circuit.tsx"; -import { OPA333_ThermistorBridge } from "./OPA333_ThermistorBridge.circuit.tsx"; import { OPA371D_LowSideCurrentSense } from "./OPA371D_LowSideCurrentSense.circuit.tsx"; -import { SN65HVD3082E_MultipointRS485Network } from "./SN65HVD3082E_MultipointRS485Network.circuit.tsx"; import { SN74AHC1G14_SwitchDebouncer } from "./SN74AHC1G14_SwitchDebouncer.circuit.tsx"; import { SN74AUP1G17_TurnOnPulseGenerator } from "./SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx"; import { TCAN1044A_5VCanInterface } from "./TCAN1044A_5VCanInterface.circuit.tsx"; import { TLV755P_TypicalApplication } from "./TLV755P_TypicalApplication.circuit.tsx"; -import { TMP102_TwoWireTemperatureSensor } from "./TMP102_TwoWireTemperatureSensor.circuit.tsx"; import { TPS22919_LoadSwitchTypicalApplication } from "./TPS22919_LoadSwitchTypicalApplication.circuit.tsx"; import { TPS61165_WhiteLedDriver } from "./TPS61165_WhiteLedDriver.circuit.tsx"; import { TPS61299_5VBoostConverter } from "./TPS61299_5VBoostConverter.circuit.tsx"; @@ -29,27 +23,21 @@ import { TPS7A20_TypicalApplication } from "./TPS7A20_TypicalApplication.circuit import { TPS92612_LinearLedDriver } from "./TPS92612_LinearLedDriver.circuit.tsx"; export { - ADS1015L_DualSupplyMonitor, ADS7042_DirectSensorInterface, BQ25185_TypicalBatteryCharger, CC2340R5MODA_TypicalApplication, DRV8833_ParallelMotorDriver, INA138_BasicCurrentSense, - INA181_BidirectionalCurrentSense, LM358B_InvertingAmplifier, LMC555_MonostableLedFlasher, LMK1C1104_ClockFanout, LMT70_AnalogTemperatureToAdc, - MSPM0C1103_AdcInputNetwork, OPA320_SecondOrderLowPassFilter, - OPA333_ThermistorBridge, OPA371D_LowSideCurrentSense, - SN65HVD3082E_MultipointRS485Network, SN74AHC1G14_SwitchDebouncer, SN74AUP1G17_TurnOnPulseGenerator, TCAN1044A_5VCanInterface, TLV755P_TypicalApplication, - TMP102_TwoWireTemperatureSensor, TPS22919_LoadSwitchTypicalApplication, TPS61165_WhiteLedDriver, TPS61299_5VBoostConverter, @@ -59,27 +47,21 @@ export { }; export const TiReferenceBlockComponents = { - ADS1015L_DualSupplyMonitor, ADS7042_DirectSensorInterface, BQ25185_TypicalBatteryCharger, CC2340R5MODA_TypicalApplication, DRV8833_ParallelMotorDriver, INA138_BasicCurrentSense, - INA181_BidirectionalCurrentSense, LM358B_InvertingAmplifier, LMC555_MonostableLedFlasher, LMK1C1104_ClockFanout, LMT70_AnalogTemperatureToAdc, - MSPM0C1103_AdcInputNetwork, OPA320_SecondOrderLowPassFilter, - OPA333_ThermistorBridge, OPA371D_LowSideCurrentSense, - SN65HVD3082E_MultipointRS485Network, SN74AHC1G14_SwitchDebouncer, SN74AUP1G17_TurnOnPulseGenerator, TCAN1044A_5VCanInterface, TLV755P_TypicalApplication, - TMP102_TwoWireTemperatureSensor, TPS22919_LoadSwitchTypicalApplication, TPS61165_WhiteLedDriver, TPS61299_5VBoostConverter, diff --git a/examples/ti-reference-examples.json b/examples/ti-reference-examples.json index 76e12f83..bc689ac4 100644 --- a/examples/ti-reference-examples.json +++ b/examples/ti-reference-examples.json @@ -1,27 +1,6 @@ { "schemaVersion": 1, "examples": [ - { - "id": "ADS1015L_DualSupplyMonitor", - "family": "ADS1015L", - "implementation": "handwritten", - "title": "ADS1015L DualSupplyMonitor", - "description": "Reusable TI-reference block. Filtered 3.3 V drives AIN0 and filtered 1.8 V drives AIN2; AIN1/AIN3 are unused; VDD is locally bypassed; ADDR and GND are grounded; SCL/SDA connect to 1.8-V pullups and host endpoints.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/ADS1015L", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/ADS1015L/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/ADS1015L/datasheet/GUID-15CF0C0C-4F6E-49F6-A678-8C8E0445438D#TITLE-SBAS822T4758422-11", - "figureUrl": "https://www.ti.com/ods/images/SBASAV7/GUID-20230711-SS0I-WZVJ-MZBB-ZCL3HNXRCG50-low.svg", - "figure": "Figure 9-9", - "figureCaption": "Monitoring Two Supply Voltage Rails Using the ADS1015L", - "pdfPage": 29, - "documentRevision": "SBASAV7", - "scope": "Figure 9-9 dual-rail monitor, including both 100-ohm/0.47-uF input filters, 3.3-V device rail and 0.1-uF bypass, grounded ADDR/GND, 1.8-V SCL/SDA pullups, bus endpoints, unused analog channels, and relative placement." - }, - "sourceFile": "ADS1015L_DualSupplyMonitor.circuit.tsx", - "sourceSha256": "4aefa244a55b81014595c2b63fe32bc557a097a012e7a90491114644eaa5b1da" - }, { "id": "ADS7042_DirectSensorInterface", "family": "ADS7042", @@ -41,7 +20,7 @@ "scope": "Exact analog interface shown by TI: differential sensor endpoints, ROUT in series with AINP, CFLT across AINP/AINM, and source-relative placement. Device power and SPI endpoints are additionally exposed outside that figure-specific analog scope to make the block reusable." }, "sourceFile": "ADS7042_DirectSensorInterface.circuit.tsx", - "sourceSha256": "bbb8636b115b966184a5307a57363e497a911943c5add4017a25fc68de6663ca" + "sourceSha256": "69e0cf0a68000e2423607667375b3bb5eb244ffe3cf5af64f4728c23d41e9a50" }, { "id": "BQ25185_TypicalBatteryCharger", @@ -62,7 +41,7 @@ "scope": "Recreates the external application connectivity and placement in Figure 8-1: VBUS/CIN, host status and CE lines, 5-kohm ILIM/VSET, 1-kohm ISET, SYS load/CSYS, BAT/CBAT/battery, TS/MR pushbutton, and NTC." }, "sourceFile": "BQ25185_TypicalBatteryCharger.circuit.tsx", - "sourceSha256": "8b4a0fbdbd54f7bce864eaa542fe4e0f29e3b24400f96ffaf59706a6c785c8f2" + "sourceSha256": "3070c8c345a3365274dfc36ed5c6bb82b944016fd2795557de5ca3435e55bc97" }, { "id": "CC2340R5MODA_TypicalApplication", @@ -83,7 +62,7 @@ "scope": "Figure 9-1 module-centered implementation of the internal/external antenna selection and Z60-Z62 matching area, optional RF connector path, 32.768-kHz crystal network, reset RC, VDDS rails, and common ground pads. General-purpose DIO destinations beyond the figure labels remain exposed." }, "sourceFile": "CC2340R5MODA_TypicalApplication.circuit.tsx", - "sourceSha256": "405ee826a5032332fe2b1f6ec520ff5a11647f95ac9f23518745b32537254e3b" + "sourceSha256": "f1e5c2c15fb19439105f44e95c0af789b406bd1af949bc160214f84756db01c2" }, { "id": "DRV8833_ParallelMotorDriver", @@ -104,7 +83,7 @@ "scope": "Recreates Figure 7's parallel-mode controller inputs, paired A/B bridge outputs into one brushed motor, VM/C4/C1/VCP network, VINT/C2, combined AISEN/BISEN with 0.2-ohm R2, nSLEEP control, nFAULT stub, and ground." }, "sourceFile": "DRV8833_ParallelMotorDriver.circuit.tsx", - "sourceSha256": "010f4d3406c11ca2f3594ceabef7bdacadb7e45bb02dec930cd6c37f88862e00" + "sourceSha256": "aea956f3c676ad4421027095bd35bcff8a6e36b56b93dd0a39ea1c6f26c46ee1" }, { "id": "INA138_BasicCurrentSense", @@ -125,28 +104,7 @@ "scope": "Full external Figure 9 high-side current-sense topology and relative placement, including RS, load, independent V+, RL, VO, and all ground returns." }, "sourceFile": "INA138_BasicCurrentSense.circuit.tsx", - "sourceSha256": "05e99c26a6193dd5f0c9eed4cc59b59c22b780983d0dcbe48adf5368ff679849" - }, - { - "id": "INA181_BidirectionalCurrentSense", - "family": "INA181", - "implementation": "handwritten", - "title": "INA181 BidirectionalCurrentSense", - "description": "Reusable TI-reference block. The bus drives RSENSE and load; U1 IN+ and IN- span RSENSE; VS powers and bypasses U1; OUT is exposed; a divider-derived, unity-buffered reference drives REF.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/INA181", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/INA181/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/INA181/datasheet/GUID-51EC9609-0E42-451E-BE38-F15C8C75D408#TITLE-SBOS793SBOS7932623", - "figureUrl": "https://www.ti.com/ods/images/SBOS793H/GUID-ECDF49FE-1464-4DC3-BE2C-728F776BD407-low.gif", - "figure": "Figure 8-7", - "figureCaption": "Measuring Bidirectional Current", - "pdfPage": 30, - "documentRevision": "SBOS793H", - "scope": "Figure 8-7 bus/shunt/load path, INA181 supply and bypass, output, selectable reference divider and buffer, feedback, grounds, and relative left-to-right placement." - }, - "sourceFile": "INA181_BidirectionalCurrentSense.circuit.tsx", - "sourceSha256": "3b0329d5079890826aaf20e9ac65e8c0542f59cb70c0ebf2043aadfcbc83ec8a" + "sourceSha256": "dda0ee9d5ffa8a99da42dc623119baf3cc2ec7efbf7562698349f4f08ead5e76" }, { "id": "LM358B_InvertingAmplifier", @@ -167,7 +125,7 @@ "scope": "Figure 8-1 inverting-amplifier topology and placement with section 8.2.2 worked values RI=10 kohm and RF=36 kohm." }, "sourceFile": "LM358B_InvertingAmplifier.circuit.tsx", - "sourceSha256": "40543483ef9dc316aec4b8bb050faa3ec6cfca1615f85de9774106431209d8b6" + "sourceSha256": "1886c08ba8d951339128a8f060046e574a4986fac090e2edbc286ceaf460acd5" }, { "id": "LMC555_MonostableLedFlasher", @@ -188,14 +146,14 @@ "scope": "Complete Figure 8-1 topology and placement, including both 10-kohm resistors, the 470-ohm LED resistor, 470-uF timing capacitor, and 0.01-uF control capacitor shown in the figure." }, "sourceFile": "LMC555_MonostableLedFlasher.circuit.tsx", - "sourceSha256": "9b9db1b7def8e2b21a0e97697ff4dca8c7bae882cb5266efa145d9e4d998871c" + "sourceSha256": "9835b40ce04abdb94fde2a3b1a9c0d7cf206cc13c45e09da593ec7a5317b4055" }, { "id": "LMK1C1104_ClockFanout", "family": "LMK1C1104", "implementation": "handwritten", "title": "LMK1C1104 ClockFanout", - "description": "Reusable TI-reference block. A labeled 100-MHz LVCMOS oscillator U5 drives CLKIN; R4 pulls enable 1G high; Y0/Y1 feed CPU and FPGA clocks through source resistors; Y3 feeds the PLL reference with TI's 100-ohm Thevenin termination.", + "description": "Reusable TI-reference block. A labeled 100-MHz LVCMOS oscillator U5 drives CLKIN; a From CPU endpoint drives 1G with R4 pulling the line high; Y0/Y1 feed CPU and FPGA clocks through source resistors; Y3 feeds the PLL reference with TI's 100-ohm Thevenin termination.", "evidence": { "kind": "ti-datasheet-typical-application", "datasheetUrl": "https://www.ti.com/lit/gpn/LMK1C1104", @@ -209,7 +167,7 @@ "scope": "Figure 10-1 100-MHz LVCMOS source, active-high enable, two CMOS receiver branches, and one Thevenin-terminated PLL-reference branch. Generic Yn is mapped to Y3 on LMK1C1104; unused Y2 is outside scope." }, "sourceFile": "LMK1C1104_ClockFanout.circuit.tsx", - "sourceSha256": "1aed89c9d4d8444e219375569a95ba1aee9e6543f45c4411fd573c8cfdf0ff23" + "sourceSha256": "33123ff5f688180a46a73eb0c2bb5ccaf4c630d525e70e63f51477bf3915ac95" }, { "id": "LMT70_AnalogTemperatureToAdc", @@ -230,28 +188,7 @@ "scope": "Complete LMT70 side of TI's typical application: 2.2-V to 3.6-V supply shared by VDD and T_ON, TAO to the MSP430 ADC endpoint, ground, and the separate 1.5-V MSP430 reference endpoint with source-relative placement." }, "sourceFile": "LMT70_AnalogTemperatureToAdc.circuit.tsx", - "sourceSha256": "7c9278ac7a0e93785ecdd5b31be7bf1aec4a6b4b795eabd6ca3f0a01f8090829" - }, - { - "id": "MSPM0C1103_AdcInputNetwork", - "family": "MSPM0C1103", - "implementation": "handwritten", - "title": "MSPM0C1103 AdcInputNetwork", - "description": "Reusable TI-reference block. Vin passes through parasitic Rpar/R1, with Cpar/C1 shunting the intermediate node to ground, then through Rin/R2 to U1.PA0. The U1 symbol reproduces TI's CI, S1, CS/H and 12-bit SAR equivalent model.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/MSPM0C1103", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/MSPM0C1103/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/MSPM0C1103/datasheet/GUID-C6FF21A8-FE93-4A88-B508-50BE3DEF8658#GUID-00AF94FF-7D7E-47C5-922F-56E845B3A5FD", - "figureUrl": "https://www.ti.com/ods/images/SLASF90D/GUID-51401E88-ED97-42E3-BA03-EBE514B1C1ED-low.svg", - "figure": "Figure 7-2", - "figureCaption": "Figure 7-2 MSPM0C1104/MSPM0C1103 ADC Input Network", - "pdfPage": 21, - "documentRevision": "SLASF90D, October 2023, revised January 2026", - "scope": "Complete Figure 7-2 ADC input equivalent network: external Rpar/Cpar and Rin feeding PA0, plus the internal CI, S1, CS/H, and 12-bit SAR representation. Numerical external R/C values are illustrative because TI directs the designer to device characteristics and the external ADC-input circuit." - }, - "sourceFile": "MSPM0C1103_AdcInputNetwork.circuit.tsx", - "sourceSha256": "d47011dec82c9229559fa0f838c66dcac7038c44461fe378280a4d3b2d23e34b" + "sourceSha256": "4d82c2fc586a0cfd95389a18786e387a194a8fa552d88d0ad0aa97871eb91653" }, { "id": "OPA320_SecondOrderLowPassFilter", @@ -272,28 +209,7 @@ "scope": "External Figure 45 signal path, all five passive values, op-amp polarity/orientation, feedback branches, rails, and relative placement. The physical OPA320S shutdown input is tied to V+ electrically but intentionally omitted from the visible signal-path drawing, as in TI's figure." }, "sourceFile": "OPA320_SecondOrderLowPassFilter.circuit.tsx", - "sourceSha256": "d5adfa0bf41dd499feaff4f0cc63579b6a20e1ac8a99040bdda68654540c6269" - }, - { - "id": "OPA333_ThermistorBridge", - "family": "OPA333", - "implementation": "handwritten", - "title": "OPA333 ThermistorBridge", - "description": "Reusable TI-reference block. The left bridge midpoint drives U1 IN+; the 60-kohm/NTC midpoint drives U1 IN-; 100-kohm RF returns VOUT to IN-; bridge and op-amp share 3 V and ground.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/OPA333", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/OPA333/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/OPA333/datasheet/application_and_implementation#SBOS3519103", - "figureUrl": "https://www.ti.com/ods/images/SBOS351E/ai_measure_tmp_bos351.gif", - "figure": "ai_measure_tmp_bos351", - "figureCaption": "Temperature Measurement", - "pdfPage": 20, - "documentRevision": "SBOS351E", - "scope": "Complete TI temperature-measurement bridge: two 1-Mohm arms, 60-kohm arm, NTC thermistor arm, 100-kohm feedback, 3-V excitation, op-amp polarity/orientation, and relative placement." - }, - "sourceFile": "OPA333_ThermistorBridge.circuit.tsx", - "sourceSha256": "5776b897c3b9a89773fe793b4c7fc85d840d0eec9b0dd75704f47bc7a68f6e16" + "sourceSha256": "55de0700e673be8408062571e9cf4930501d6c45cdec6286706088a3bc40592c" }, { "id": "OPA371D_LowSideCurrentSense", @@ -484,21 +400,7 @@ }, { "path": [".R_F > .pin2", ".R_G > .pin1", ".U1_OPAMP > .inp2"], - "evidenceLabel": "RF/RG gain divider feeds the inverting input", - "schematicRouteHints": [ - { - "x": -0.8, - "y": -0.14 - }, - { - "x": -0.8, - "y": -0.95 - }, - { - "x": 1.5, - "y": -0.95 - } - ] + "evidenceLabel": "RF/RG gain divider feeds the inverting input" }, { "from": ".R_G > .pin2", @@ -515,47 +417,8 @@ "to": ".GND_DEVICE > .1", "evidenceLabel": "device negative supply returns to ground" } - ], - "annotations": [ - { - "text": "ILOAD", - "x": -2.8, - "y": 1.35 - }, - { - "text": "VSHUNT", - "x": -2.8, - "y": 0.1 - }, - { - "text": "TI OPA371D Figure 7-1", - "x": 0, - "y": -3, - "fontSize": 0.14 - } ] }, - { - "id": "SN65HVD3082E_MultipointRS485Network", - "family": "SN65HVD3082E", - "implementation": "handwritten", - "title": "SN65HVD3082E MultipointRS485Network", - "description": "Reusable TI-reference block. Four transceivers share RS485_A/RS485_B; U1 and U2 are the two end nodes with 120-ohm R1/R2 termination, while U3 and U4 are unterminated midpoint drops.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/SN65HVD3082E", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/SN65HVD3082E/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/SN65HVD3082E/datasheet/GUID-8E8196FF-15F5-4B69-A41E-7D9DBA30E79E#TITLE-SLLS562SLLS5621905", - "figureUrl": "https://www.ti.com/ods/images/SLLS562O/GUID-F8DF2F0D-9F11-4160-A7FF-A80DEBF80CB0-low.gif", - "figure": "Figure 9-2", - "figureCaption": "Figure 9-2 SN65HVD3082E/SN75HVD3082E/SN65HVD3085E/SN65HVD3088E Typical Application Circuit", - "pdfPage": 19, - "documentRevision": "SLLS562O, August 2009, revised July 2023", - "scope": "Complete Figure 9-2 four-node differential-bus topology and relative placement: two terminated end nodes and two short unterminated midpoint drops. The logic-side R, nRE, DE, and D pins remain exposed, matching the figure." - }, - "sourceFile": "SN65HVD3082E_MultipointRS485Network.circuit.tsx", - "sourceSha256": "7873f4ccb630068381e71b4c4063510fc9130d73de65d2824fab6097ff4aac20" - }, { "id": "SN74AHC1G14_SwitchDebouncer", "family": "SN74AHC1G14", @@ -575,7 +438,7 @@ "scope": "Complete Figure 8-1 external signal topology and relative placement: grounded physical pushbutton, VCC pull-up, inverting Schmitt trigger, and symbolic microprocessor input. Package supply pins are outside the figure's implemented scope." }, "sourceFile": "SN74AHC1G14_SwitchDebouncer.circuit.tsx", - "sourceSha256": "27a5bbb8c29638b046c951828cb2b7098bf2acb4c580c78f2851fdc413a19825" + "sourceSha256": "cc48af0748529538a5eac4a60431b1f200141afcea139018eeb4cf8fd41fadfd" }, { "id": "SN74AUP1G17_TurnOnPulseGenerator", @@ -596,7 +459,7 @@ "scope": "Complete Figure 8 external RC timing topology and relative placement through the non-inverting Schmitt buffer to VO. TI does not label numerical R or C values in the figure, so 100 kohm and 100 nF are illustrative placeholders." }, "sourceFile": "SN74AUP1G17_TurnOnPulseGenerator.circuit.tsx", - "sourceSha256": "4fb55f1452df46381f3fa8bbc9c5b219aa20576f4dc5b4797680af736a585922" + "sourceSha256": "ddfd1bc6ab9546735782487a1ba53fe0b8a30fc6fe6c69a066831c2a01c22d37" }, { "id": "TCAN1044A_5VCanInterface", @@ -617,7 +480,7 @@ "scope": "Figure 9-1 regulator-to-MCU-to-transceiver signal and supply topology, including the optional split-termination and ESD branches. The regulator and MCU are symbolic functional blocks; unlabeled bypass, filter, and ESD values use explicit example placeholders." }, "sourceFile": "TCAN1044A_5VCanInterface.circuit.tsx", - "sourceSha256": "b46c2ce3ae7fc7032e3a2814ebbe138f87cd14db0fd17423c02f67c02c422c59" + "sourceSha256": "c6024ed3ff38b7b1a8f8c81ae3c32916b85061185fee85b0e01ccb98a7ef61f8" }, { "id": "TLV755P_TypicalApplication", @@ -638,28 +501,7 @@ "scope": "Recreates Figure 7-4 from the DC/DC-converter source through the 1-uF input capacitor, TLV755P enable switch, 1-uF output capacitor, shared return, and load block; device operating curves and PCB layout are out of scope." }, "sourceFile": "TLV755P_TypicalApplication.circuit.tsx", - "sourceSha256": "40e3a4045c44fe577811dfdf9680d0c462599a102de7fac5d9461341308a3841" - }, - { - "id": "TMP102_TwoWireTemperatureSensor", - "family": "TMP102", - "implementation": "handwritten", - "title": "TMP102 TwoWireTemperatureSensor", - "description": "Reusable TI-reference block. SCL, SDA, and ALERT each connect to a host endpoint and a 5-kohm supply pullup; V+ is bypassed with 0.01 uF; ADD0 and GND are grounded.", - "evidence": { - "kind": "ti-datasheet-typical-application", - "datasheetUrl": "https://www.ti.com/lit/gpn/TMP102", - "documentViewerRootUrl": "https://www.ti.com/document-viewer/TMP102/datasheet", - "sectionUrl": "https://www.ti.com/document-viewer/TMP102/datasheet/GUID-D9972B9C-7EB3-403C-81AA-258B0C731BF1#TITLE-SBOS397SBOS3979928", - "figureUrl": "https://www.ti.com/ods/images/SBOS397I/GUID-20240603-SS0I-I73J-3VFC-EL12H6FVKUPM-low.svg", - "figure": "Figure 7-1", - "figureCaption": "Typical Connections", - "pdfPage": 20, - "documentRevision": "SBOS397I", - "scope": "All Figure 7-1 external connections and values: 1.4-V to 3.6-V supply, three 5-kohm pullups, 0.01-uF bypass, SCL/SDA/ALERT host endpoints, ADD0 grounding, device grounding, and relative placement." - }, - "sourceFile": "TMP102_TwoWireTemperatureSensor.circuit.tsx", - "sourceSha256": "d31cb90beb3f4d39ed61174158d8d2effd012077a40d73a48aabeaca828e6193" + "sourceSha256": "224a079fd37b51c7fc77a29dccbc25ad5d247eee86d544f138b9f27041124ff0" }, { "id": "TPS22919_LoadSwitchTypicalApplication", @@ -680,7 +522,7 @@ "scope": "Recreates Figure 30 with the 3.3-V source, CIN, H/L ON control, TPS22919, QOD resistor, CL, and RL; transient plots and layout guidance are out of scope." }, "sourceFile": "TPS22919_LoadSwitchTypicalApplication.circuit.tsx", - "sourceSha256": "c8721280286bfec06a3f132371dfd523d09e5492a359698145613d4b2d5e491f" + "sourceSha256": "db960bdfba196883663f70430f94e3c574a6e62e65c66aa89dc8da03183ce904" }, { "id": "TPS61165_WhiteLedDriver", @@ -701,7 +543,7 @@ "scope": "Recreates the front-page typical application with 5-V input, C1, 10-uH L1, D1, C2, three series white LEDs, 0.57-ohm Rset, 220-nF COMP capacitor, CTRL input, and both ground returns." }, "sourceFile": "TPS61165_WhiteLedDriver.circuit.tsx", - "sourceSha256": "22f5b7562ec3d5f202c9fb22a5f452f74f0c9111a01f84157f96ee6c051a848b" + "sourceSha256": "75b1f6ef9a611ebc36aa3cad487dfe6faa16fcad80bf10a5df3b7da8ee6fce2d" }, { "id": "TPS61299_5VBoostConverter", @@ -722,7 +564,7 @@ "scope": "Recreates Figure 8-1's 1-uH boost path, 10-uF input/output capacitors, VSEL-to-output strap, enable switch, and 5-V output; performance plots are out of scope." }, "sourceFile": "TPS61299_5VBoostConverter.circuit.tsx", - "sourceSha256": "9d75992a0dd20161f82d13d726d5d7b32f3eb38f492660ba4c020551969a5718" + "sourceSha256": "b31555479e143eb463f163a826395f844041fc763186dfaa61208cddac6b1193" }, { "id": "TPS62A01_1V8BuckConverter", @@ -743,7 +585,7 @@ "scope": "Recreates Figure 8-1 for the 1.8-V/1-A option, including CIN, L1, R1/R2 feedback divider, C3 feed-forward capacitor, C2, EN-to-VIN strap, and R4/VPG branch." }, "sourceFile": "TPS62A01_1V8BuckConverter.circuit.tsx", - "sourceSha256": "539393690204c54a8e393b54ef2e22e77cf0a952761a15f32f0edb4792791d0a" + "sourceSha256": "e70123c87dee1c701c6c9fe735c7439e6c0d264e60016b9211725400a980f0a4" }, { "id": "TPS7A20_TypicalApplication", @@ -764,7 +606,7 @@ "scope": "Complete Figure 7-4 topology and placement using the fixed 2.8 V device and Table 7-1 capacitor values." }, "sourceFile": "TPS7A20_TypicalApplication.circuit.tsx", - "sourceSha256": "85ef12c7c0237515259e633588ae1f16d7130cbb57e97ac3e43ff3017a1ebabf" + "sourceSha256": "1bcc1a02c31a445a0d3ae344dd49b90b1e0df8d5b5e67d7e063fc6f769db8020" }, { "id": "TPS92612_LinearLedDriver", @@ -785,7 +627,7 @@ "scope": "Recreates the front-page typical application with the 4.5-V-to-40-V rail, supply capacitor, PWM input, high-side R(SNS), C(OUT), and three-LED string to ground." }, "sourceFile": "TPS92612_LinearLedDriver.circuit.tsx", - "sourceSha256": "fcd07ad59f5dc5b8853d5fd75ac07018d6278e3caf418a875a8ca618d1d564c6" + "sourceSha256": "29313660eace6fab77f46d82391a179364d4da97772907f285af8d77fe534566" } ] } diff --git a/scripts/ti-reference-example-schema.test.ts b/scripts/ti-reference-example-schema.test.ts index 7c3de5e0..950c71d9 100644 --- a/scripts/ti-reference-example-schema.test.ts +++ b/scripts/ti-reference-example-schema.test.ts @@ -14,7 +14,10 @@ import { type TiReferenceExampleManifest, validateTiReferenceExampleManifest, } from "./ti-reference-example-schema.ts"; -import { validateTiReferenceExamples } from "./validate-ti-reference-examples.ts"; +import { + assertNoManualSchematicMarkup, + validateTiReferenceExamples, +} from "./validate-ti-reference-examples.ts"; const catalog: TiReferenceCatalogEntry[] = [ { @@ -99,10 +102,6 @@ const makeManifest = (): TestManifest => ({ from: ".U1_OPAMP > .inp2", to: ".R_F > .pin2", evidenceLabel: "RF feedback drives the inverting input", - schematicRouteHints: [ - { x: -1, y: -0.09 }, - { x: -1, y: -1 }, - ], }, { from: ".U1_OPAMP > .pin5", @@ -195,7 +194,8 @@ describe("TI reference-example schema and rendering", () => { assert.match(source, /from="\.U1_OPAMP > \.V-"/); assert.match(source, /from="\.U1_OPAMP > \.inp2"/); assert.match(source, /to="\.R_F > \.pin2"/); - assert.match(source, /schematicRouteHints=/); + assert.doesNotMatch(source, /schematicRouteHints=/); + assert.doesNotMatch(source, / { assert.match(source, /OPA371D_LowSideCurrentSense,/); }); + test("rejects manual schematic drawing and route markup", () => { + assert.doesNotThrow(() => + assertNoManualSchematicMarkup( + '', + "allowed", + ), + ); + assert.throws( + () => + assertNoManualSchematicMarkup( + '', + "example", + ), + /manual schematic markup/, + ); + assert.throws( + () => + assertNoManualSchematicMarkup( + "", + "example", + ), + /manual schematic markup/, + ); + assert.throws( + () => + assertNoManualSchematicMarkup( + "", + "example", + ), + /manual schematic markup/, + ); + assert.throws( + () => + assertNoManualSchematicMarkup( + "} />", + "example", + ), + /manual schematic markup/, + ); + }); + test("rejects a non-first-party figure asset", () => { const manifest = makeManifest(); manifest.examples[0].evidence.figureUrl = @@ -362,6 +403,9 @@ describe("TI reference-example coverage validator", () => { catalog, readText: makeVirtualReader(), formatSource: async (source) => source, + listExampleSourceNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit.tsx", + ], listSnapshotNames: async () => [ "OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg", ], @@ -379,6 +423,9 @@ describe("TI reference-example coverage validator", () => { requireComplete: true, readText: makeVirtualReader(), formatSource: async (source) => source, + listExampleSourceNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit.tsx", + ], listSnapshotNames: async () => [ "OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg", ], @@ -395,9 +442,36 @@ describe("TI reference-example coverage validator", () => { catalog, readText: makeVirtualReader(), formatSource: async (source) => source, + listExampleSourceNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit.tsx", + ], listSnapshotNames: async () => [], }), /expected exactly one schematic snapshot/, ); }); + + test("rejects manual schematic markup in examples outside the manifest", async () => { + const baseReader = makeVirtualReader(); + await assert.rejects( + validateTiReferenceExamples({ + repoRoot: "/repo", + manifest: makeManifest(), + catalog, + readText: async (path) => + path === "/repo/examples/Unlisted.circuit.tsx" + ? '' + : await baseReader(path), + formatSource: async (source) => source, + listExampleSourceNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit.tsx", + "Unlisted.circuit.tsx", + ], + listSnapshotNames: async () => [ + "OPA371D_LowSideCurrentSense.circuit-schematic.snap.svg", + ], + }), + /Unlisted\.circuit\.tsx: manual schematic markup/, + ); + }); }); diff --git a/scripts/ti-reference-example-schema.ts b/scripts/ti-reference-example-schema.ts index aaf3a12a..0baf8100 100644 --- a/scripts/ti-reference-example-schema.ts +++ b/scripts/ti-reference-example-schema.ts @@ -85,17 +85,11 @@ export type TiReferenceComponent = | TiReferenceSymbolicLoad | TiReferenceNetSymbol; -export type TiReferenceAnnotation = TiReferencePoint & { - text: string; - fontSize?: number; -}; - export type TiReferenceTrace = { from?: string; to?: string; path?: string[]; evidenceLabel: string; - schematicRouteHints?: TiReferencePoint[]; }; type TiReferenceExampleBase = { @@ -111,7 +105,6 @@ export type TiGeneratedReferenceExample = TiReferenceExampleBase & { mainDevice: TiReferenceMainDevice; components: TiReferenceComponent[]; traces: TiReferenceTrace[]; - annotations?: TiReferenceAnnotation[]; }; export type TiHandwrittenReferenceExample = TiReferenceExampleBase & { @@ -566,6 +559,11 @@ export const validateTiReferenceExampleManifest = ( `${location} generated examples cannot declare handwritten source metadata`, ); } + if (rawExample.annotations !== undefined) { + throw new Error( + `${location}.annotations are not allowed; use ordinary components and nets instead of schematic text`, + ); + } const mainDevice = validateMainDevice( rawExample.mainDevice, `${location}.mainDevice`, @@ -602,20 +600,6 @@ export const validateTiReferenceExampleManifest = ( `${location} must include at least one TI-specified passive; chip-only examples are forbidden`, ); } - if (rawExample.annotations !== undefined) { - if (!Array.isArray(rawExample.annotations)) { - throw new Error(`${location}.annotations must be an array`); - } - for (const [ - annotationIndex, - annotation, - ] of rawExample.annotations.entries()) { - const annotationLocation = `${location}.annotations[${annotationIndex}]`; - assertPoint(annotation, annotationLocation); - assertRecord(annotation, annotationLocation); - assertNonEmptyString(annotation.text, `${annotationLocation}.text`); - } - } if (!Array.isArray(rawExample.traces) || rawExample.traces.length === 0) { throw new Error( `${location}.traces must encode the TI figure connectivity`, @@ -691,20 +675,9 @@ export const validateTiReferenceExampleManifest = ( } } if (trace.schematicRouteHints !== undefined) { - if ( - !Array.isArray(trace.schematicRouteHints) || - trace.schematicRouteHints.length === 0 - ) { - throw new Error( - `${traceLocation}.schematicRouteHints must be a non-empty array`, - ); - } - for (const [hintIndex, hint] of trace.schematicRouteHints.entries()) { - assertPoint( - hint, - `${traceLocation}.schematicRouteHints[${hintIndex}]`, - ); - } + throw new Error( + `${traceLocation}.schematicRouteHints are not allowed; schematic traces must be autorouted`, + ); } } if (projection && projectionTraceCount === 0) { @@ -1083,15 +1056,6 @@ export const renderTiReferenceExample = ( `Figure asset: ${example.evidence.figureUrl}`, `Scope: ${example.evidence.scope}`, ]; - const annotations = (example.annotations ?? []).map( - (annotation) => ` `, - ); const sharedNets = renderSharedNets(example); return `// Generated by scripts/generate-ti-reference-examples.ts. // Do not edit by hand; update examples/ti-reference-examples.json. @@ -1116,16 +1080,9 @@ ${example.traces ? `path={${JSON.stringify(trace.path)}}` : `from=${json(trace.from as string)}\n to=${json(trace.to as string)}`; return ` {/* ${trace.evidenceLabel} */} - `; + `; }) .join("\n\n")} -${annotations.length > 0 ? `\n\n${annotations.join("\n\n")}` : ""} ); diff --git a/scripts/validate-ti-reference-examples.ts b/scripts/validate-ti-reference-examples.ts index 5b201cb2..cb49f2d4 100644 --- a/scripts/validate-ti-reference-examples.ts +++ b/scripts/validate-ti-reference-examples.ts @@ -29,10 +29,26 @@ export type ValidateTiReferenceExamplesOptions = { requireComplete?: boolean; verifyEvidence?: boolean; readText?: (path: string) => Promise; + listExampleSourceNames?: (directory: string) => Promise; listSnapshotNames?: (directory: string) => Promise; formatSource?: (source: string, outputPath: string) => Promise; }; +const manualSchematicMarkupPattern = + /<\/?schematic(?:line|path|circle|rect|text|arc|ellipse|polygon)\b|(?:schematicRouteHints|schRouteHints)\s*=|<\/?symbol\b|symbol\s*=\s*\{/i; + +export const assertNoManualSchematicMarkup = ( + source: string, + location: string, +): void => { + const match = source.match(manualSchematicMarkupPattern); + if (match) { + throw new Error( + `${location}: manual schematic markup ${JSON.stringify(match[0])} is not allowed; use components, predefined schematic symbols, and autorouted connectivity`, + ); + } +}; + export const validateTiReferenceExamples = async ( options: ValidateTiReferenceExamplesOptions, ) => { @@ -41,6 +57,7 @@ export const validateTiReferenceExamples = async ( }); const readText = options.readText ?? (async (path) => await Bun.file(path).text()); + const listExampleSourceNames = options.listExampleSourceNames ?? readdir; const listSnapshotNames = options.listSnapshotNames ?? readdir; await generateTiReferenceExamples({ @@ -53,17 +70,29 @@ export const validateTiReferenceExamples = async ( formatSource: options.formatSource, }); + const examplesDirectory = join(options.repoRoot, "examples"); + const exampleSourceNames = await listExampleSourceNames(examplesDirectory); + for (const sourceFile of exampleSourceNames.filter((name) => + name.endsWith(".circuit.tsx"), + )) { + const sourcePath = join(examplesDirectory, sourceFile); + const source = await readText(sourcePath); + assertNoManualSchematicMarkup(source, sourceFile); + } + for (const example of manifest.examples) { - if (isGeneratedTiReferenceExample(example)) continue; - const sourcePath = join(options.repoRoot, "examples", example.sourceFile); + const sourceFile = isGeneratedTiReferenceExample(example) + ? `${example.id}.circuit.tsx` + : example.sourceFile; + const sourcePath = join(options.repoRoot, "examples", sourceFile); let source: string; try { source = await readText(sourcePath); } catch { - throw new Error( - `${example.family}: handwritten source is unreadable: ${sourcePath}`, - ); + throw new Error(`${example.family}: source is unreadable: ${sourcePath}`); } + assertNoManualSchematicMarkup(source, `${example.family}: ${sourceFile}`); + if (isGeneratedTiReferenceExample(example)) continue; const namedExport = new RegExp(`export\\s+const\\s+${example.id}\\b`); const defaultExport = new RegExp(`export\\s+default\\s+${example.id}\\s*;`); if (!namedExport.test(source) || !defaultExport.test(source)) {