[Feature]: Parity with CUDA: vLLM router should have ROCm CI

[functionstackx]

🚀 The feature, motivation and pitch

hi @hongxiayang

+viz @powderluv @chunfangamd @andyluo7

PD disagg is already the current state of optimization that ppl run in prod. currently vLLM router only has CUDA GPU tests and doesn't have AMD GPU test. can u look into fixing this? AMD supports RIXL in vLLM router but there is no tests for that. it should also have tests in vLLM router for MoRI kvcache transfer once it implements that

https://github.com/vllm-project/router/blob/4df9bbc6562bd0ccaddb991efad581bfd14843a5/.buildkite/pipeline.yml#L193-L276

Alternatives

ROCm doesn't improve their user experience & code quality

Additional context

No response

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[github-actions]

CC @tjtanaa @vllmellm for ROCm-related issue

[chunfangamd]

Hi @mpashkovskii, please be aware of the reported issue.

[hongxiayang]

cc @kenroche for awareness

[hongxiayang]

We will check. Does it make sense to post the issue in vllm/router?

[tjtanaa]

@functionstackx Please open the PR in vllm/router. Thanks.

[functionstackx]

vllm-project/router#142

[simondanielsson]

MoRI:

• [CI][ROCm] MoRI e2e test router#164

RIXL:

• First needs [CI][ROCm] Ship RIXL with vllm/vllm-openai-rocm #41634
• Then we can add CI similar to MoRI

Both dependent on #40453 for RDMA userspace libs in official images. Alternatively MoRI could be implemented with the XGMI backend if #41753 is merged, so no RDMA userspace libs would be needed in the official image.